This clock is selectable from the standard 1.8432 MHz. The onboard clock division circuit jumper block determines the rate of data acceleration. This circuit allows the user to select the clocking mode most appropriate to suit the particular application. This allows applications developed with 115.2 Kbps as the maximum setting to run at 460.8 Kbps. Plug the card into an open PCI slot and power up the system.
All ports share a single IRQ, allowing the card's use of system resources to remain very small.
The following article was drafted by Sealevel and appeared in the November 1998 issue of Control and Control Design . As personal computers increase in power and drop in price, they are more frequently being used in applications that were considered not feasible for automation or where proprietary custom designs were used. Designed around the 16554 Quad UART, it provides ensured capability with existing drivers and applications. It is used as the primary source of external input to the PC and this eight-port interface significantly increases the amount of data that can be captured without using up a significant amount of system resources. Deeper FIFOs can be important in graphic-intensive Windows applications requiring a lot of processor overhead, or where data is logged across networks, slowing response time to service the serial line.