The higher number typically leads to better sales. Motorola will be able to achieve faster speeds because of highly technical internal changes to the G4, Iyengar said. The chip will be able to process four instructions per clock cycle, up from three in the current G4s, he said. Longer pipelines allow designers to crank up chip core speeds. The chip will also contain significantly larger caches than current G4 processors.
Caches serve as memory reservoirs for the processor and keep the chip fed with data.
Besides the integrated secondary cache, the chip will contain 2MB of third level cache, he added. Iyengar would not disclose a date when the second generation G4 will come out. However, he noted that Motorola disclosed the architecture for the first generation of the G4 at the 1998 Microprocessor Forum and the first chips appeared in Apple's G4 computers this past August. Inc. All rights reserved.