If there the CPU gets it. Transfers at 16 bytes wide, using 4 cycles for entire line into L1. First it goes to the Bus arbitration and receives permission to travel to main memory to fetch it. Rembember that since it is a RISK chip, this shouldn t happen as much as it does with Pentiums. The basis for the SUN 701 chip but a design that has been licensed to other companies.
Chip has two different memory addressing designs.
64 bit wide memory bus 2. NO L2 cache A CPU with JAVA as its native instuction set.