It is an intelligent IC layout environment. The MAX layout editor includes interactive cross-probing between layout and schematic. With real-time interactive DRC, the MAX layout editor shows any DRC errors right on the layout. No memorizing of design rules or counting grids is required. All this means that layout design is now easy and very fast, and cells are DRC clean.
Automatic connectivity tracing from any layout source easily shows how elements are connected.
No extraction is required. In recent benchmarks, the MAX layout editor has proven to be 50 times faster in loading, displaying and editing physical layout data. It can handle the largest IC design databases with up to billions of devices. This tool is ideal for viewing and editing the results of place and route tools. When loading an entire chip before tapeout, the MAX layout editor accelerates the previously slow and torturous process of reviewing the entire design, the results of LVS and DRC checks, and any last-minute changes.