This flag is set when the DAC channel is set, and cleared when the ADC completes digitizing the new value. The error flag is also set if the analog output is disabled during an ADC conversion. 25.3.1 IEEE Format 1. The ADC buffer memory is read using F1 A0 for each read. Numbers are read sequentially with two 16-bit reads per number.
Analog input is bi-polar.
The input is a high-impedance differential instrumentation amplifier with 1K resistors in series with each input lead for input protection. This register is loaded by F17 A1. W1, W2 Not used. Up to four status bits can be received from the controlled device through optically coupled receivers. These bits are read by F2 A0.