This paper will discuss how ESD is generated, the dangers it presents, and methods to minimize the hazards of ESD in the assembly process. Universal Instruments Reliable estimates put total flip chip production volume at over one billion units for 2000. This article examines equipment and process considerations for establishing an integrated high-volume flip chip assembly line which meets both clean room and precision placement requirements, and retains the flexibility needed for the future all at the same time. A number of manufacturing related issues needed to be addressed. Fluxing and Underfill processes are the most obvious areas.
Additional attention needs to be paid to yield and quality related issues.
This paper reviews these manufacturing issues and discusses how they were solved for a specific product. The process development was performed in partnership with a customer and Universals process lab and was based on research results of the Advanced Process Lab. Jacques Coderre, Universal Instruments, and Robert Peter, Alphasem Die placement techniques all have the handling of semiconductor devices in common. These techniques vary greatly, however, depending on the assembly process used. The most widely used assembly process involves attaching the die with silver-filled epoxy followed by wire bonding to the substrate.