It appears that your browser does not support JavaScript or you have it turned off. You may encounter technical oddities which prevent you from utilizing this site efficiently. This site is best experienced when you have JavaScript enabled. Please enable JavaScript and refresh this page. Typically, formal verification includes both equivalence checking and model checking .
Commercial tools are available today for both methodologies.
Of the two, equivalence checking is the most mature and closest to gaining mainstream acceptance. Model checking still has some time before it takes its place in the mainstream. These factors have renewed interest in formal verification for functional verification and static timing analysis for timing verification. Design size typically determines if a designer should migrate to a flow that includes a formal verification equivalency tool.