That's when changes occur and new technologies enter the market. You can't replace half the tool flow overnight. But FPGA design, according to Rhines, does represent a true discontinuity. This, he said, opens an opportunity to bring ASIC-like synthesis and simulation tools to FPGA designers. But it's not so easy, he noted, because FPGAs are dominated by interconnect delays, and because each FPGA architecture requires its own specialized router.
Cost is another barrier.
That means we need to find a whole new way to serve a new industry. He noted that this previously slow-growth market has been outstripping overall EDA product growth during the past four quarters. The reason, said Rhines, is that technology is changing. SoC verification has already been recognized as a crisis by many observers. He emphasized the importance of simulation acceleration, emulation, and virtual prototyping systems.