All five control lines of the ALU are put together in the simulation and form a single control line. The coding of the ALU commands is simplified. The operation is then executed in the ALU in accordance to the opcode. This is possible since the ALU is addressed only once per instruction execution. A further ease for simulating this processor architecture is the absent of bus structures.
All signals have only one signal driver and thus no bi-directional signals are required.
The execution flow in TOY upon the example of LOAD instruction With the help of the LOAD instruction the execution of a typical instruction within this processor architecture is described. The opcode is located at the opcode input of the controller. Subsequently the controller passes through a control signal to the ALUaccu unit. As a result the ALU is activated and executes the operation according the opcode on its control input. The result is passed then to the ACC part.