Figure 8.8 Bus types Three common classifications. Fairly simple, low-level interface. Were often built into backplane of chassis. Includes a clock in the control lines Protocol is fixed relative to the clock. For example, request on 1 st cycle, data available on 5 th cycle.
Bus is very fast.
Little extra logic required. Every device on bus must run at same clock rate. Must control access to bus, to avoid chaos. Processor initiates and controls all bus usage. Scheme must allow some devices to have higher bus priority .