Compute target PC early in the pipeline. DLX datapath modification. Fill branch delay slots. Filling with an instruction before the branch is always a win. Filling with an instruction from target or from fall through is sometimes a win.
Data dependencies prevent the ideal case from being achievable in every situation.
When using the alternative, accurate prediction is necessary otherwise, there is no win. Adding a cancelling branch instruction adds flexibility to filling the branch delay slot. All instructions before the faulting instruction complete AND And instructions following the faulting instruction, including the faulting instruction, do not change the state of the machine. One way to maintain precise exceptions. Use a exception vector for each instruction to disable writes.