A Buffer-Manager chip provides overall control and buffer chaining during readout. The RICH group is finishing its first prototype board . It will used in a beam test in spring 1997. The PCB layout is finished. It describes the address map of the trigger VME boards as of Jan 22, 1998.
All addresses given below assume the above address match.
Used for decoding the board address. Fill Fifo ie. Flex chips ready. Chip fail enable. Multicast Address Register Loads register for Multicast address.