Infers modules such as adders, comparators, etc., from behavioral descriptions and replaces them with circuits pre-optimized for the target device.
Cypress reserves the right to substitute prototype boards based on product availability.
Functional Description Warp Enterprise is an integration of the Warp Professional CPLD Development package with additional sophisticated EDA software features from Aldec. Plus, it provides a utility to convert HDL text into graphical HDL blocks. For simulation, Warp Enterprise provides a timing simulator, a source-level behavioral simulator, as well as VHDL and Verilog timing models for use with third party simulators. Warp Enterprise also provides the designer with important productivity tools such as a testbench generation wizard and the Architecture Explorer graphical analysis tool. Cypress Semiconductor Corporation.