New sponsorship not available at this time. Please state job number when applying. . As Sr. ASIC Design Engineer, you will be responsible for ASIC architecture and implementation in high performance semiconductors plus perform synthesis, testing, timing analysis and FPGA for SOCs. You will also be responsible for system specification and architecture SOCs. A keen understanding of the use of UNIX, Linux, and Windows as part of design task, development of design methodology and task automation using Perl and TCL scripting languages and in-depth knowledge of ASIC development and tools required.
Company offers excellent compensation and comprehensive benefits, stocks, and relocation package.
New sponsorship not available at this time. Please state job number when applying. . Our client is a publicly traded company developing RF architecture technology that stands to revolutionize the wireless communications industry as we know it. Two positions available for experienced ASIC Layout Designers responsible for layout of BiCMOS ASICs at the transistor level. You must be familiar with Cadence, Mentor Graphics, Tanner, IC Edit tools and design flow.