The mode is ideal when a quality pretrigger is not available since the entire full scale time can be used as the trigger decision time. At the end of the full scale time, the conversion and transfer cycle is initiated. In either mode, if a wire pulse is received during the full scale time, a HIT register will be set to provide a prompt in- dication of valid data. In the Model 4291B, the hit registers are buffered and available in parallel on connector P3 located at the top rear end of the unit. A positive logic option is available upon request.
Data are available after the full scale time until reset.
Rear panel 32-pin connector mates with same connectors as used on front panel. Detailed pin allocation is defined in the 4291 B User Manual. Other options available on request. Gain accuracy within 0. Resets TDC's and HIT registers in less than 300 nsec.