This must contain both data and instructions, which are distinguished by the addresses in the memory stack that they occupy. This system has the drawback that it is possible to overwrite instructions with data and vice-versa, causing the process to crash. Care must be taken with programming the processor to protect against this happening. The second model, the Harvard architecture, overcomes the drawback of the Von Neumann model by allowing separate memory space for data and instructions. The ST7 processor uses the Von Neumann architecture, as should be evident from the memory map shown previously.
Different processors have very different assembly languages and syntaxes.
This should not be too surprising, as each processor has its own architecture and set of instruction codes. It should be noted that a single assembly code mnemonic may represent a large number of binary opcodes. One of the tricks involved in designing efficient programmes is to minimise the number of opcodes required to perform a given task. You should have noticed that some programme constructions used far fewer opcodes to achieve the same effect as more long-winded approaches. One of the advantages of using the ST7 simulation tool is that it allows you to see the opcodes or sequences of opcodes generated by assembly language commands.