UMC and Xilinx are announcing an FPGA with copper interconnect for the top two layers.
Copper has lower resistivity, and ultimately lower resistance, than aluminum.
This reduces the RC delays and resulting in increased performance. Copper will provide lower clock and signal skew and improved on-chip power distribution. Xilinx expects to deploy copper interconnect for all subsequent process migrations for high-density FPGAs. In this way, the main benefits of copper in reducing IR drop and signal skew is realized. We have the base copper technology that can be extended to all layers in a straightforward manner.