In conjunction with specially designed yield test structures, CAA also can predict defect-limited yield loss of a new design on a new technology. This number is divided by the total number of defects at a given defect size. Output is a probability plot such as that shown in Figure 1, computed from an actual CAA run.
Critical area is defined as the probability of failure times the die area.
CAA simulates the effects of random defects on probe yield using the layout databases of critical photolithography mask layers. When new products are designed for use on mature technologies, the defect densities, defect size ranges and distributions are known. Note that the curve showing the benchmark yield was derived by performing cluster analysis on the product labeled A. Given the in-line inspection data for defect density and size distribution by defect type, yield limits for each defect type can be calculated for products A and F. 2. Product F yields significantly below other products in a BiCMOS technology. Test structures including large-area serpentine and comb structures for interconnects and transistor arrays should be used on the first reticle sets of a technology to forecast defect yield limits.