The family features four members, the ispLSI 5128VE, ispLSI 5256VE, ispLSI 5384VE, and ispLSI 5512VE, that support today's mainstream CPLD density requirements. The second-generation SuperWIDE architecture was further optimized, resulting in an additional increase in logic efficiency. The ispLSI 5000VE devices, like their predecessors, support concurrent combinatorial and registered function outputs from each macrocell to provide maximum logic utilization. They also feature multiple control options including programmable register Set, Reset and Clock Enable. Members of the ispLSI 5000VE family are available in a variety of advanced package options.
All devices are available now.
Statements in this news release looking forward in time are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Investors are cautioned that forward-looking statements involve risks and uncertainties including market acceptance and demand for our new products, our dependencies on our silicon wafer suppliers, the impact of competitive products and pricing, technological and product development risks and other risk factors detailed in the Company's Securities and Exchange Commission filings. Actual results may differ materially from forward-looking statements. Other product names used in this publication are for identification purposes only and may be trademarks of their respective holders.