You can then place this block in a system-level hierarchical block diagram. This approach also minimizes overhead, enabling each simulator to achieve maximum performance. In addition to generic C code, the generator produces targeted code for popular floating-point DSPs. And rather than creating code based on predefined rules, the DCG allows you to direct the generation strategy for fast exploration of the implementation space. You control the code size, throughput, and latency of the generated program by selecting a scheduling strategy, specifying the degree of macro pipelining, enabling or disabling code in-lining, and selecting a memory allocation scheme.
Code generation is based on a scalable, synchronous data flow approach.
A block processes data elements at a fixed rate, where the rate of block is a function of its parameters. The final block schedule is a function of the code generation strategy selected by the user. Code in-lining, while leading to faster code, dramatically increases the memory requirements if blocks appear more than once in the block diagram. Similarly, introducing macro pipe-lining typically increases the throughput at the expense of additional memory and larger latency. Because you define the code generation without modifying the original block diagram, it's easy to quickly explore various alternatives.