In this new position, Arora will lead Simplex' interconnect and semiconductor modeling effort. Dr. Arora brings more than 16 years of semiconductor process, device, and interconnect modeling experience to Simplex. Most recently, Arora was consulting engineer and manager of Digital's Device and Interconnect Modeling Group. The HDI libraries, along with VLSI's metal pitches, work with advanced synthesis tools to develop ASICs offering optimal combinations of speed, die size, and power consumption. VLSI and Hitachi have partnered to bring advanced deep submicron micron ASIC technologies to market.
All libraries contain optimized representations for synthesis.
Flip-flops match the synthesis tool's selection criteria. This facilitates lower power systems that mix 3.3 V ASICs with 5 V standard products. Design for testability support includes scan versions of all flip-flops for popular automated test program generation software from Synopsys , Mentor Graphics , and Sunrise. The libraries support boundary scan and multiplexed isolation for all tools. RC back annotation including the interaction between these two delays.