Since 1996 he has been at Intel's Strategic CAD Labs in Oregon. Research interests include asynchronous circuits, VLSI, hardware synthesis and verification. He has been the principal author on three papers that received the best paper award. The design goal was to research the feasibility of achieving high-performance microprocessor design using asynchronous circuits. The design was fabricated in Intel's 0.35 micron process, with silicon arriving in June of 1998.
Asynchronous design has some potential benefits in areas like performance, power, and productivity.
However, the relative simplicity of traditional clocked circuit design, in addition to lack of expertise and tool support for asynchronous design, has thus prevented its widespread use in microprocessors. Full adoption of asynchronous protocols by microprocessor designers will probably not occur unless they hit a wall that blocks further performance improvement in clocked design. However, circuit designers are already using asynchronous self-timed circuits to overcome the problems posed by very high frequency clocked design. The purpose of the asynchronous design research is to find out how to design without a clock in order to bypass the clocked design wall. However, this is as close a comparison as has been published in academia or industry.