By Rick Nelson, Senior Technical Editor For more information, see our product survey chart. Download the article as a PDF . At the end of the decade that saw its emergence, boundary-scan technology is coming into its own.
Additional software derives test-patterns from chip and board design data.
When it's time to actually test some boards on the production floor, you'll need to roll up your sleeves and work with the hardware that applies the test-vector sets to your units under test. Such hardware brings to mind the dedicated boundary-scan controllers from specialized firms like JTAG Technologies, eponymously named for the Joint Test Action Group, an ad hoc group that pushed boundary scan forward toward IEEE standardization. You can choose from a variety of boundary-scan harware configurations. With the TMS pin asserted, a boundary-scan controller clocks serial test data through a UUT's TDI and TDO pins at rates to 25 MHz. You can adopt more complex forms of boundary scan by designing into your UUT registers that can accumulate boundary-scan test data.