This means in simple terms that the processor can execute more than one instruction at once. However, this isn't how it happens in practice. As instructions are dispatched from the queue all the remaining instructions move towards the front of the queue and new instructions are fetched from memory. On every clock cycle the processor tries to dispatch as many instructions as possible from the queue, so if the branch unit and integer unit are free but the floating point unit is not it would be possible for the processor to dispatch one integer and one branch instruction from IQ0 to IQ3 if those types of instructions are present. Generally instructions execute in one cycle but there are exceptions.
Conditional branches can take anywhere from five down to zero cycles.
If you remember back to the beginning we said that condition code flags were not implicitly set when data is moved or the result of a calculation become availalable. There's a very good reason for this, and it's not because the designers were lazy, or they just wanted to save silicon. These are the flags that are tested when we execute a conditional branch. The general rule of thumb is that a conditional branch needs to placed about five instructions down from the instruction that affects the flags. This is possible because the programmer has to explicitly use instructions that change the flags.