9.3 compilation algorithms have been optimized to reduce compile times for timing-driven compilation.
Designers can specify timing requirements on selected logic functions and for a project as a whole.
The new standard provides vendors and developers with a single, universal platform for programming designs into targeted PLDs. These elements create a universal language and toolset that address all ISP-enabled PLDs, and all programming methodologies. Altera's software subscription program simplifies the process of obtaining Altera development tools by consolidating all software products and maintenance charges into one annual subscription payment. These products are targeted for system level integration designs incorporating logic, microcontroller, DSP, memory, analog, and application specific functions into a single chip. The ATL25 and ATC25 are manufactured in Atmel wafer fabs located in Colorado Springs and Rousset, France.