DOI: 10.57760/sciencedb.j00186.00315
title: Data support of 《Low-noise and high-rate front-end ASIC for APD detectors in STCF ECAL》
title: Data support of 《Low-noise and high-rate front-end ASIC for APD detectors in STCF ECAL》

description: This study presents a low-noise, high-rate front-end readout application-specific integrated circuit (ASIC) designed for the electromagnetic calorimeter (ECAL) of the Super Tau-Charm Facility (STCF). To address the high background-count rate in the STCF ECAL, the temporal features of signals are analyzed node-by-node along the chain of the analog front-end circuit. Then, the system is optimized to mitigate the pile-up effects and elevate the count rate to megahertz levels. First, a charge-sensitive amplifier (CSA) with a fast reset path is developed, enabling quick resetting when the output reaches the maximum amplitude. This prevents the CSA from entering a pulse-dead zone owing to amplifier saturation caused by the pile-up. Second, a high-order shaper with baseline holder circuits is improved to enhance the anti-pile-up capability while maintaining an effective noise-filtering performance. Third, a high-speed peak detection and hold circuit with an asynchronous first-input-first-output buffer function is proposed to hold and read the piled-up signals of the shaper. The ASIC is designed and manufactured using a standard commercial 1P6M 0.18 μm mixed-signal CMOS process with a chip area of 2.4mm × 1.6mm. The measurement results demonstrate a dynamic range of 4–500 fC with a nonlinearity error below 1.5%. For periodically distributed input signals, a count rate of 1.5MHz/Ch is achieved with a peak time of 360 ns, resulting in an equivalent noise charge (ENC) of 2500 e−. The maximum count rate is 4MHz/Ch at a peak time of 120 ns. At a peak time of 1.68 μs with a 270 pF external capacitance, the minimum ENC is 1966 e−, and the noise slope is 3.08 e−/pF. The timing resolution is better than 125 ps at an input charge of 200 fC. The power consumption is 35mW/Ch.
description: This study presents a low-noise, high-rate front-end readout application-specific integrated circuit (ASIC) designed for the electromagnetic calorimeter (ECAL) of the Super Tau-Charm Facility (STCF). To address the high background-count rate in the STCF ECAL, the temporal features of signals are analyzed node-by-node along the chain of the analog front-end circuit. Then, the system is optimized to mitigate the pile-up effects and elevate the count rate to megahertz levels. First, a charge-sensitive amplifier (CSA) with a fast reset path is developed, enabling quick resetting when the output reaches the maximum amplitude. This prevents the CSA from entering a pulse-dead zone owing to amplifier saturation caused by the pile-up. Second, a high-order shaper with baseline holder circuits is improved to enhance the anti-pile-up capability while maintaining an effective noise-filtering performance. Third, a high-speed peak detection and hold circuit with an asynchronous first-input-first-output buffer function is proposed to hold and read the piled-up signals of the shaper. The ASIC is designed and manufactured using a standard commercial 1P6M 0.18 μm mixed-signal CMOS process with a chip area of 2.4mm × 1.6mm. The measurement results demonstrate a dynamic range of 4–500 fC with a nonlinearity error below 1.5%. For periodically distributed input signals, a count rate of 1.5MHz/Ch is achieved with a peak time of 360 ns, resulting in an equivalent noise charge (ENC) of 2500 e−. The maximum count rate is 4MHz/Ch at a peak time of 120 ns. At a peak time of 1.68 μs with a 270 pF external capacitance, the minimum ENC is 1966 e−, and the noise slope is 3.08 e−/pF. The timing resolution is better than 125 ps at an input charge of 200 fC. The power consumption is 35mW/Ch.