Data-driven Diagnosis for Digital Circuit Failures
Creators: name: Huang, Qicheng
Publisher: name: Carnegie Mellon University
Year: 2022
Subjects: subject: 90699 Electrical and Electronic Engineering not elsewhere classified
subject: FOS: Electrical engineering, electronic engineering, information engineering

description: Due to the perturbations inherent to integrated circuit (IC) fabrication, an immature or problematic process may systematically introduce defects that significantly reduces yield. Yield learning is a crucial process to identify and mitigate sources of yield loss, so as to increase yield to a satisfactory level. Manufacturing test and logic diagnosis are two key steps in this process for performing yield learning for logic circuits, which happen to be the most difficult due to the lack of regularity at the layout level. Conventional diagnosis is mostly rule-based and developed from the circuit perspective, but in recently years it has become apparent the value embedded in the huge amount of data generatedfrom test and diagnosis. However, the potential of the various data generated at different stages is far from being fully explored. When data are properly contextualized, machine learning (ML), has shown tremendous promise and can be used to capture complex behavior and lead to analysis with high accuracy and fast performance. This dissertation is motivated by the unexplored potential ofvarious data, as well as the need to bridge the gap between ML techniques and diagnosis objectives. Three contributions are described as part of the driving force of more advanced diagnosis, aiming to provide guidelines for practitioners to formulate ML problems and apply ML techniques, and toshed light on the potential of data science in diagnosis and related areas. First, we describe a diagnosis previewer that is able to predict diagnosis outcomes, such as diagnosis success, defect count, defect type and diagnosis runtime. This previewer enables practitioners to have a comprehensive preview of diagnostic outcomes beforehand, so that fail logs can be prioritized for smart allocation of diagnosis resources. Experiments on industrial designsdemonstrate the previewer can bring up to 9x speed-up for a test chip, and 6x for a high-volume IC. Second, a diagnosis quality enhancement method called LAIDAR (Learning for Accuracy and Ideal DiAgnostic Resolution) is described, which produces more accurate diagnosis results withideal resolution. Specifically, semi-supervised learning is deployed to use unlabeled data to augment model training, and a defect-level learning procedure uses characteristics from similar defects to further improve resolution. Experiments involving simulation and silicon datasets demonstrate significant improvements that include: 6:4x increase in the number of perfect diagnoses, and aperformance that consistently outperforms other state-of-the-art diagnosis techniques. Finally, we utilize prior knowledge through various transfer learning strategies to reduce the cost of training data collection for the diagnosis previewer. The basic idea is to adapt a prior modelconstructed from a correlated dataset to very limited training samples from the current design of interest. Experiments performed using real industrial examples demonstrate that transfer learning can significantly improve prediction performance and save training data when a suitable priorknowledge exists. This is an important contribution because it allows diagnosis for a new design to begin during production ramp where yield learning is critical.