title: Ð Ð°Ð·ÑÐ°Ð±Ð¾ÑÐºÐ° Ð¸ Ð¸ÑÑÐ»ÐµÐ´Ð¾Ð²Ð°Ð½Ð¸Ðµ ÑÑÑÐµÐºÑÐ¸Ð²Ð½Ð¾ÑÑÐ¸ Ð°Ð¿Ð¿Ð°ÑÐ°ÑÐ½Ð¾Ð¹ ÑÐµÐ°Ð»Ð¸Ð·Ð°ÑÐ¸Ð¸ Ð¼Ð¾Ð´ÑÐ»Ñ ÑÐµÑÐµÐ½Ð¸Ñ ÑÐ¸ÑÑÐµÐ¼ Ð»Ð¸Ð½ÐµÐ¹Ð½ÑÑ Ð°Ð»Ð³ÐµÐ±ÑÐ°Ð¸ÑÐµÑÐºÐ¸Ñ ÑÑÐ°Ð²Ð½ÐµÐ½Ð¸Ð¹
title: Ð²ÑÐ¿ÑÑÐºÐ½Ð°Ñ ÐºÐ²Ð°Ð»Ð¸ÑÐ¸ÐºÐ°ÑÐ¸Ð¾Ð½Ð½Ð°Ñ ÑÐ°Ð±Ð¾ÑÐ° Ð¼Ð°Ð³Ð¸ÑÑÑÐ°
titleType: Subtitle
title: Development and research of the efficiency of the hardware implementation of the module for solving systems of linear algebraic equations
Creators: name: Ð¡ÐºÐ²Ð¾ÑÑÐ¾Ð², ÐÐ¸ÑÐ°Ð¸Ð»
Publisher: name: Ð¡Ð°Ð½ÐºÑ-ÐÐµÑÐµÑÐ±ÑÑÐ³ÑÐºÐ¸Ð¹ Ð¿Ð¾Ð»Ð¸ÑÐµÑÐ½Ð¸ÑÐµÑÐºÐ¸Ð¹ ÑÐ½Ð¸Ð²ÐµÑÑÐ¸ÑÐµÑ ÐÐµÑÑÐ° ÐÐµÐ»Ð¸ÐºÐ¾Ð³Ð¾
Year: 2021
Subjects: Ð­Ð»ÐµÐºÑÑÐ¾Ð½Ð½ÑÐµ ÑÑ ÐµÐ¼Ñ
ÐÐ»Ð³ÐµÐ±ÑÐ°Ð¸ÑÐµÑÐºÐ¸Ðµ ÑÑÐ°Ð²Ð½ÐµÐ½Ð¸Ñ
Ð»Ð¾Ð³Ð¸ÑÐµÑÐºÐ°Ñ Ð¸Ð½ÑÐµÐ³ÑÐ°Ð»ÑÐ½Ð°Ñ ÑÑ ÐµÐ¼Ð°
Ð±Ð¸Ð±Ð»Ð¸Ð¾ÑÐµÐºÐ¸
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description: ÐÐ°Ð½Ð½Ð°Ñ ÑÐ°Ð±Ð¾ÑÐ° Ð¿ÑÐµÐ´ÑÑÐ°Ð²Ð»ÑÐµÑ ÑÐ°Ð·ÑÐ°Ð±Ð¾ÑÐºÑ Ð¸ Ð¿ÑÐ¾ÐµÐºÑÐ¸ÑÐ¾Ð²Ð°Ð½Ð¸Ðµ Ð°Ð¿Ð¿Ð°ÑÐ°ÑÐ½Ð¾Ð¹ ÑÐµÐ°Ð»Ð¸Ð·Ð°ÑÐ¸Ð¸ Ð°Ð»Ð³Ð¾ÑÐ¸ÑÐ¼Ð° ÑÐµÑÐµÐ½Ð¸Ñ ÑÐ¸ÑÑÐµÐ¼ Ð»Ð¸Ð½ÐµÐ¹Ð½ÑÑ ÑÑÐ°Ð²Ð½ÐµÐ½Ð¸Ð¹, Ð¿ÑÐ¾Ð²ÐµÐ´ÐµÐ½Ð¸Ðµ Ð¾Ð¿ÑÐ¸Ð¼Ð¸Ð·Ð°ÑÐ¸Ð¸ Ñ ÑÐµÐ»ÑÑ Ð¿Ð¾Ð²ÑÑÐµÐ½Ð¸Ñ Ð¿ÑÐ¾Ð¸Ð·Ð²Ð¾Ð´Ð¸ÑÐµÐ»ÑÐ½Ð¾ÑÑÐ¸, Ð¸ÑÑÐ»ÐµÐ´Ð¾Ð²Ð°Ð½Ð¸Ðµ ÑÑÑÐµÐºÑÐ¸Ð²Ð½Ð¾ÑÑÐ¸ Ð¿Ð¾Ð»ÑÑÐµÐ½Ð½Ð¾Ð¹ Ð°Ð¿Ð¿Ð°ÑÐ°ÑÐ½Ð¾Ð¹ ÑÐµÐ°Ð»Ð¸Ð·Ð°ÑÐ¸Ð¸ Ð¸ Ð¿ÑÐ¾Ð²ÐµÐ´ÐµÐ½Ð¸Ðµ ÑÑÐ°Ð²Ð½Ð¸ÑÐµÐ»ÑÐ½Ð¾Ð³Ð¾ Ð°Ð½Ð°Ð»Ð¸Ð·Ð° Ñ ÑÑÑÐµÑÑÐ²ÑÑÑÐ¸Ð¼Ð¸ ÑÐµÐ°Ð»Ð¸Ð·Ð°ÑÐ¸ÑÐ¼Ð¸ Ð°Ð»Ð³Ð¾ÑÐ¸ÑÐ¼Ð°. Ð ÐºÐ°ÑÐµÑÑÐ²Ðµ Ð±Ð°Ð·Ñ Ð´Ð»Ñ ÑÐ°Ð·ÑÐ°Ð±Ð¾ÑÐºÐ¸ Ð¸ Ð¿ÑÐ¾ÐµÐºÑÐ¸ÑÐ¾Ð²Ð°Ð½Ð¸Ñ Ð¸ÑÐ¿Ð¾Ð»ÑÐ·Ð¾Ð²Ð°Ð½Ñ Ð¸Ð½ÑÑÑÑÐ¼ÐµÐ½ÑÑ Ð²ÑÑÐ¾ÐºÐ¾ÑÑÐ¾Ð²Ð½ÐµÐ²Ð¾Ð³Ð¾ ÑÐ¸Ð½ÑÐµÐ·Ð° Ð¿Ð°ÐºÐµÑÐ° Xilinx Vitis HLS. ÐÐ¿Ð¿Ð°ÑÐ°ÑÐ½Ð¾Ð¹ Ð¾ÑÐ½Ð¾Ð²Ð¾Ð¹ Ð´Ð»Ñ Ð°Ð¿ÑÐ¾Ð±Ð°ÑÐ¸Ð¸ ÑÐµÐ°Ð»Ð¸Ð·Ð°ÑÐ¸Ð¸ ÑÐ²Ð»ÑÐµÑÑÑ FPGA-ÑÑÐºÐ¾ÑÐ¸ÑÐµÐ»Ñ Xilinx Alveo U50. ÐÐ¾ÑÐ»Ðµ Ð·Ð°Ð²ÐµÑÑÐµÐ½Ð¸Ñ ÑÑÐ°Ð¿Ð¾Ð² ÑÐ°Ð·ÑÐ°Ð±Ð¾ÑÐºÐ¸ Ð¸ Ð¿ÑÐ¾ÐµÐºÑÐ¸ÑÐ¾Ð²Ð°Ð½Ð¸Ñ Ð±ÑÐ» Ð¿Ð¾Ð»ÑÑÐµÐ½ Ð°Ð¿Ð¿Ð°ÑÐ°ÑÐ½ÑÐ¹ Ð¼Ð¾Ð´ÑÐ»Ñ Ð´Ð»Ñ ÑÑÐºÐ¾ÑÐµÐ½Ð¸Ñ Ð½Ð°Ð¸Ð±Ð¾Ð»ÐµÐµ ÑÑÑÐ´Ð¾ÐµÐ¼ÐºÐ¾Ð¹ ÑÐ°ÑÑÐ¸ Ð°Ð»Ð³Ð¾ÑÐ¸ÑÐ¼Ð° ÑÐµÑÐµÐ½Ð¸Ñ ÑÐ¸ÑÑÐµÐ¼ Ð»Ð¸Ð½ÐµÐ¹Ð½ÑÑ Ð°Ð»Ð³ÐµÐ±ÑÐ°Ð¸ÑÐµÑÐºÐ¸Ñ ÑÑÐ°Ð²Ð½ÐµÐ½Ð¸Ð¹. Ð ÑÐ¾Ð´Ðµ Ð¿ÑÐ¾Ð²ÐµÐ´ÐµÐ½Ð¸Ñ ÑÑÐ°Ð¿Ð° Ð¸ÑÑÐ»ÐµÐ´Ð¾Ð²Ð°Ð½Ð¸Ñ Ð±ÑÐ» Ð²ÑÐ¿Ð¾Ð»Ð½ÐµÐ½ ÑÑÐ°Ð²Ð½Ð¸ÑÐµÐ»ÑÐ½ÑÐ¹ Ð°Ð½Ð°Ð»Ð¸Ð· ÑÐµÐ·ÑÐ»ÑÑÐ°ÑÐ¾Ð² Ð¼Ð¾Ð´ÐµÐ»Ð¸ÑÐ¾Ð²Ð°Ð½Ð¸Ñ Ñ ÑÐµÐ·ÑÐ»ÑÑÐ°ÑÐ°Ð¼Ð¸ Ð´ÑÑÐ³Ð¸Ñ ÑÐµÐ°Ð»Ð¸Ð·Ð°ÑÐ¸Ð¹ Ð°Ð»Ð³Ð¾ÑÐ¸ÑÐ¼Ð°. ÐÐ¾Ð»ÑÑÐµÐ½Ð½ÑÐµ ÑÐµÐ·ÑÐ»ÑÑÐ°ÑÑ Ð¸ÑÑÐ»ÐµÐ´Ð¾Ð²Ð°Ð½Ð¸Ð¹ Ð¿Ð¾ÐºÐ°Ð·Ð°Ð»Ð¸ ÑÐ²ÐµÐ»Ð¸ÑÐµÐ½Ð¸Ðµ ÑÑÑÐµÐºÑÐ¸Ð²Ð½Ð¾ÑÑÐ¸ ÑÐµÑÐµÐ½Ð¸Ñ Ð´Ð°Ð½Ð½Ð¾Ð¹ Ð·Ð°Ð´Ð°ÑÐ¸. ÐÑÐ¾Ð²ÐµÐ´ÐµÐ½Ð° Ð¾ÑÐµÐ½ÐºÐ° ÑÑÑÐµÐºÑÐ¸Ð²Ð½Ð¾ÑÑÐ¸ Ð¸ÑÐ¿Ð¾Ð»ÑÐ·Ð¾Ð²Ð°Ð½Ð¸Ñ Ð¸Ð½ÑÑÑÑÐ¼ÐµÐ½ÑÐ¾Ð² Ð²ÑÑÐ¾ÐºÐ¾ÑÑÐ¾Ð²Ð½ÐµÐ²Ð¾Ð³Ð¾ ÑÐ¸Ð½ÑÐµÐ·Ð° Ð¿Ð°ÐºÐµÑÐ° Xilinx Vitis HLS Ð´Ð»Ñ ÑÑÐºÐ¾ÑÐµÐ½Ð¸Ñ Ð·Ð°Ð´Ð°Ñ, ÑÐ²ÑÐ·Ð°Ð½Ð½ÑÑ Ñ ÑÐµÑÐµÐ½Ð¸ÐµÐ¼ ÑÐ¸ÑÑÐµÐ¼ Ð»Ð¸Ð½ÐµÐ¹Ð½ÑÑ ÑÑÐ°Ð²Ð½ÐµÐ½Ð¸Ð¹. ÐÐ° Ð¾ÑÐ½Ð¾Ð²Ðµ Ð´Ð°Ð½Ð½Ð¾Ð¹ Ð¾ÑÐµÐ½ÐºÐ¸ ÑÐ´ÐµÐ»Ð°Ð½ Ð²ÑÐ²Ð¾Ð´ Ð¾ ÑÐ°ÑÐ¸Ð¾Ð½Ð°Ð»ÑÐ½Ð¾ÑÑÐ¸ Ð¸ÑÐ¿Ð¾Ð»ÑÐ·Ð¾Ð²Ð°Ð½Ð¸Ñ Ð°Ð¿Ð¿Ð°ÑÐ°ÑÐ½Ð¾Ð³Ð¾ ÑÑÐºÐ¾ÑÐµÐ½Ð¸Ñ Ð½Ð° Ð±Ð°Ð·Ðµ FPGA-ÑÑÐºÐ¾ÑÐ¸ÑÐµÐ»ÐµÐ¹ Ð² Ð¿ÑÐ¸Ð¼ÐµÐ½ÐµÐ½Ð¸Ð¸ Ðº Ð¸ÑÑÐ»ÐµÐ´ÑÐµÐ¼Ð¾Ð¹ Ð¾Ð±Ð»Ð°ÑÑÐ¸ Ð·Ð°Ð´Ð°Ñ.
description: This paper presents the development and design of the hardware implementation of the algorithm for solving systems of linear equations, optimization to improve performance, the study of the effectiveness of the resulting hardware implementation and comparative analysis with existing implementations of the algorithm, as well as evaluating the effectiveness of using high-level synthesis tools to speed up problems related to solving systems of linear algebraic equations using FPGA accelerators. The high-level synthesis tools of the Xilinx Vitis HLS package are used as a base for development and design. The hardware basis for testing the implementation is the Xilinx Alveo U50 FPGA accelerator. After completing the development and design stages, a hardware module was obtained to accelerate the most time-consuming part of the algorithm for solving systems of linear algebraic equations. During the research phase, comparative analysis of the simulation results with the results of other implementations of the algorithm was performed. The obtained research results showed an increase in the efficiency of solving this problem in comparison with the considered existing implementations. The efficiency of using the tools of high-level synthesis of the Xilinx Vitis HLS package for accelerating problems related to solving systems of linear equations is evaluated. Based on this assessment, a conclusion is made about the rationality of using hardware acceleration based on FPGA accelerators in the application to the studied field of problems.