title: ÐÑÐ¾ÐµÐºÑÐ¸ÑÐ¾Ð²Ð°Ð½Ð¸Ðµ Ð¼Ð¾Ð´ÑÐ»Ñ Ð±ÑÑÑÑÐ¾Ð¹ Ð·Ð°ÑÑÐ´ÐºÐ¸ Ð½Ð° Ð¾ÑÐ½Ð¾Ð²Ðµ Ð¿ÑÐ¾ÑÐ¾ÐºÐ¾Ð»Ð° USB PD
title: Ð²ÑÐ¿ÑÑÐºÐ½Ð°Ñ ÐºÐ²Ð°Ð»Ð¸ÑÐ¸ÐºÐ°ÑÐ¸Ð¾Ð½Ð½Ð°Ñ ÑÐ°Ð±Ð¾ÑÐ° Ð¼Ð°Ð³Ð¸ÑÑÑÐ°
titleType: Subtitle
title: Design fast charging module based on usb pd protocol
Creators: name: ÐÐ°Ð½ Ð¡ÑÑÐ°Ð½Ñ
Publisher: name: Ð¡Ð°Ð½ÐºÑ-ÐÐµÑÐµÑÐ±ÑÑÐ³ÑÐºÐ¸Ð¹ Ð¿Ð¾Ð»Ð¸ÑÐµÑÐ½Ð¸ÑÐµÑÐºÐ¸Ð¹ ÑÐ½Ð¸Ð²ÐµÑÑÐ¸ÑÐµÑ ÐÐµÑÑÐ° ÐÐµÐ»Ð¸ÐºÐ¾Ð³Ð¾
Year: 2022
Subjects: Ð¢ÐµÑ Ð½Ð¸ÑÐµÑÐºÐ¸Ðµ ÑÐ¸ÑÑÐµÐ¼Ñ
ÐÑÑÐ¸ÑÐ»Ð¸ÑÐµÐ»ÑÐ½ÑÐµ Ð¼Ð°ÑÐ¸Ð½Ñ ÑÐ»ÐµÐºÑÑÐ¾Ð½Ð½ÑÐµ Ð¿ÐµÑÑÐ¾Ð½Ð°Ð»ÑÐ½ÑÐµ
Ð¼Ð¾Ð±Ð¸Ð»ÑÐ½ÑÐ¹ Ð¸ÑÑÐ¾ÑÐ½Ð¸Ðº Ð¿Ð¸ÑÐ°Ð½Ð¸Ñ
mobile power supply

description: Ð¡ Ð½ÐµÐ¿ÑÐµÑÑÐ²Ð½ÑÐ¼ ÑÐ°Ð·Ð²Ð¸ÑÐ¸ÐµÐ¼ ÑÑÑ Ð¸Ð½ÑÐ¾ÑÐ¼Ð°ÑÐ¸Ð¸ Ð¸ Ð¾ÑÐ¸ÑÑÐ¾Ð²ÐºÐ¸ Ð¿Ð¾ÑÑÐµÐ±Ð½Ð¾ÑÑÐ¸ Ð¿ÑÐ¸Ð»Ð¾Ð¶ÐµÐ½Ð¸Ð¹ Ð² Ð¾Ð±Ð»Ð°ÑÑÐ¸ Ð²Ð·Ð°Ð¸Ð¼Ð¾Ð´ÐµÐ¹ÑÑÐ²Ð¸Ñ Ñ Ð´Ð°Ð½Ð½ÑÐ¼Ð¸ Ð¸ Ð¿ÐµÑÐµÐ´Ð°ÑÐ¸ ÑÐ½ÐµÑÐ³Ð¸Ð¸ ÐµÑÐµ Ð±Ð¾Ð»ÑÑÐµ ÑÐ°ÑÑÐ¸ÑÐ¸Ð»Ð¸ÑÑ. ÐÑÐ´Ñ ÑÐ¾ ÑÑÐ°ÑÐ¸Ð¾Ð½Ð°ÑÐ½ÑÐµ ÑÑÑÑÐ¾Ð¹ÑÑÐ²Ð°, ÑÐ°ÐºÐ¸Ðµ ÐºÐ°Ðº Ð½Ð°ÑÑÐ¾Ð»ÑÐ½ÑÐµ ÐºÐ¾Ð¼Ð¿ÑÑÑÐµÑÑ, ÑÐµÐ»ÐµÐ²Ð¸Ð·Ð¾ÑÑ, ÑÐ°Ð±Ð¾ÑÐ¸Ðµ ÑÑÐ°Ð½ÑÐ¸Ð¸, Ð¸Ð»Ð¸ Ð¿Ð¾ÑÑÐ°ÑÐ¸Ð²Ð½ÑÐµ ÑÑÑÑÐ¾Ð¹ÑÑÐ²Ð°, ÑÐ°ÐºÐ¸Ðµ ÐºÐ°Ðº Ð¼Ð¾Ð±Ð¸Ð»ÑÐ½ÑÐµ ÑÐµÐ»ÐµÑÐ¾Ð½Ñ Ð¸ Ð¿Ð»Ð°Ð½ÑÐµÑÐ½ÑÐµ ÐºÐ¾Ð¼Ð¿ÑÑÑÐµÑÑ, Ð¸Ð½ÑÐµÑÑÐµÐ¹Ñ USB, Ð½ÐµÑÐ¾Ð¼Ð½ÐµÐ½Ð½Ð¾, ÑÐ²Ð»ÑÐµÑÑÑ Ð½Ð°Ð¸Ð±Ð¾Ð»ÐµÐµ Ð¿ÑÑÐ¼ÑÐ¼ ÑÐ²ÑÐ·Ñ Ð¼ÐµÐ¶Ð´Ñ Ð¿ÐµÑÐµÐ´Ð°ÑÐµÐ¹ Ð´Ð°Ð½Ð½ÑÑ Ð¸ ÑÐ»ÐµÐºÑÑÐ¾ÑÐ½ÐµÑÐ³Ð¸Ð¸. Ð¡Ð¾Ð²ÑÐµÐ¼ÐµÐ½Ð½Ð¾Ðµ Ð¾Ð±Ð¾ÑÑÐ´Ð¾Ð²Ð°Ð½Ð¸Ðµ Ð½Ðµ ÑÐ¾Ð»ÑÐºÐ¾ Ð¿ÑÐµÐ´ÑÑÐ²Ð»ÑÐµÑ ÑÐ²Ð½ÑÐµ ÑÑÐµÐ±Ð¾Ð²Ð°Ð½Ð¸Ñ Ðº Ð¿Ð¾Ð²ÑÑÐµÐ½Ð¸Ñ ÑÐºÐ¾ÑÐ¾ÑÑÐ¸ Ð¿ÐµÑÐµÐ´Ð°ÑÐ¸ Ð´Ð°Ð½Ð½ÑÑ, Ð½Ð¾ Ð¸ Ð²ÑÐ´Ð²Ð¸Ð³Ð°ÐµÑ Ð´Ð¾Ð¿Ð¾Ð»Ð½Ð¸ÑÐµÐ»ÑÐ½ÑÐµ ÑÑÐµÐ±Ð¾Ð²Ð°Ð½Ð¸Ñ Ðº Ð¿ÑÐ¾Ð¿ÑÑÐºÐ½Ð¾Ð¹ ÑÐ¿Ð¾ÑÐ¾Ð±Ð½Ð¾ÑÑÐ¸ Ð¸Ð½ÑÐµÑÑÐµÐ¹ÑÐ° USB. ÐÐ¾Ð·Ð¼Ð¾Ð¶Ð½Ð¾ÑÑÑ Ð¿ÐµÑÐµÐ´Ð°ÑÐ¸ Ð¼Ð¾ÑÐ½Ð¾ÑÑÐ¸ 100 ÐÑ ÑÑÐ°Ð»Ð° ÑÐµÐ»ÑÑ, ÐºÐ¾ÑÐ¾ÑÑÑ Ð½Ð°Ð´ÐµÑÑÑÑ Ð´Ð¾ÑÑÐ¸ÑÑ Ð² ÑÐ¾Ð¾ÑÐ²ÐµÑÑÑÐ²Ð¸Ð¸ ÑÐ¾ ÑÐ¿ÐµÑÐ¸ÑÐ¸ÐºÐ°ÑÐ¸ÐµÐ¹ Ð¸Ð½ÑÐµÑÑÐµÐ¹ÑÐ° USB3.1, Ð¸ ÑÐ¾Ð»ÑÐºÐ¾ Ð¸Ð½ÑÐµÑÑÐµÐ¹Ñ USB TYPE-C Ð¼Ð¾Ð¶ÐµÑ Ð¿Ð¾Ð´Ð´ÐµÑÐ¶Ð¸Ð²Ð°ÑÑ Ð¿ÐµÑÐµÐ´Ð°ÑÑ ÑÑÐ¾Ð¹ Ð¼Ð¾ÑÐ½Ð¾ÑÑÐ¸. Ð­ÑÐ¾ ÑÑÐµÐ±Ð¾Ð²Ð°Ð½Ð¸Ðµ Ð½Ðµ Ð¼Ð¾Ð¶ÐµÑ Ð±ÑÑÑ Ð²ÑÐ¿Ð¾Ð»Ð½ÐµÐ½Ð¾ Ð² ÑÐ¾Ð¾ÑÐ²ÐµÑÑÑÐ²Ð¸Ð¸ Ñ ÑÑÐ°Ð´Ð¸ÑÐ¸Ð¾Ð½Ð½ÑÐ¼Ð¸ ÑÐ¿ÐµÑÐ¸ÑÐ¸ÐºÐ°ÑÐ¸ÑÐ¼Ð¸ Ð¸Ð½ÑÐµÑÑÐµÐ¹ÑÐ½Ð¾Ð³Ð¾ Ð¿ÑÐ¾ÑÐ¾ÐºÐ¾Ð»Ð° USB 3.0 Ð¸ Ð½Ð¸Ð¶Ðµ, Ð¸ Ð½ÐµÐ¾Ð±ÑÐ¾Ð´Ð¸Ð¼Ð¾ ÑÐ¿Ð¾ÑÐ¾Ð±ÑÑÐ²Ð¾Ð²Ð°ÑÑ Ð¿Ð¾Ð¿ÑÐ»ÑÑÐ¸Ð·Ð°ÑÐ¸Ð¸ Ð¸ Ð¿ÑÐ¸Ð¼ÐµÐ½ÐµÐ½Ð¸Ñ ÑÐ¿ÐµÑÐ¸ÑÐ¸ÐºÐ°ÑÐ¸Ð¸ Ð¿ÑÐ¾ÑÐ¾ÐºÐ¾Ð»Ð° USB 3.1, ÐºÐ¾ÑÐ¾ÑÐ°Ñ Ð¼Ð¾Ð¶ÐµÑ Ð¿Ð¾Ð´Ð´ÐµÑÐ¶Ð¸Ð²Ð°ÑÑ Ð¿ÐµÑÐµÐ´Ð°ÑÑ Ð´Ð°Ð½Ð½ÑÑ Ñ Ð²ÑÑÐ¾ÐºÐ¾Ð¹ Ð¼Ð¾ÑÐ½Ð¾ÑÑÑÑ Ð¸ Ð²ÑÑÐ¾ÐºÐ¾Ð¹ ÑÐºÐ¾ÑÐ¾ÑÑÑÑ. ÐÑÐ½Ð¾Ð²Ð½Ð¾Ðµ ÑÐ¾Ð´ÐµÑÐ¶Ð°Ð½Ð¸Ðµ Ð¸ÑÑÐ»ÐµÐ´Ð¾Ð²Ð°Ð½Ð¸Ñ ÑÑÐ¾Ð¹ ÑÑÐ°ÑÑÐ¸ Ð·Ð°ÐºÐ»ÑÑÐ°ÐµÑÑÑ Ð² ÑÐ»ÐµÐ´ÑÑÑÐµÐ¼: ÑÐ°Ð·ÑÐ°Ð±Ð¾ÑÐ°Ð½Ð¾ Ð¸ÑÑÐ»ÐµÐ´Ð¾Ð²Ð°Ð½Ð¸Ðµ Ð¸ Ð¿ÑÐ¾ÐµÐºÑÐ¸ÑÐ¾Ð²Ð°Ð½Ð¸Ðµ ÑÑÐµÐ¼Ñ Ð±ÑÑÑÑÐ¾Ð¹ Ð·Ð°ÑÑÐ´ÐºÐ¸ USB_PD Ð½Ð° Ð¾ÑÐ½Ð¾Ð²Ðµ Ð¸Ð½ÑÐµÑÑÐµÐ¹ÑÐ° Type_C. ÐÑÐ¾ÐµÐºÑÐ¸ÑÐ¾Ð²Ð°Ð½Ð¸Ðµ Ð¼Ð¾Ð´ÑÐ»ÐµÐ¹ Ð¿ÐµÑÐµÐ´Ð°ÑÐ¸ Ð¸ Ð¿ÑÐ¸ÐµÐ¼Ð° ÑÐ¸Ð·Ð¸ÑÐµÑÐºÐ¾Ð³Ð¾ ÑÑÐ¾Ð²Ð½Ñ Ð¿ÑÐ¾ÑÐ¾ÐºÐ¾Ð»Ð° Ð¿ÐµÑÐµÐ´Ð°ÑÐ¸ ÑÐ½ÐµÑÐ³Ð¸Ð¸ USB_PD Ð·Ð°Ð²ÐµÑÑÐ°ÐµÑÑÑ Ñ Ð¿Ð¾Ð¼Ð¾ÑÑÑ ÑÐ·ÑÐºÐ° Ð¾Ð¿Ð¸ÑÐ°Ð½Ð¸Ñ Ð°Ð¿Ð¿Ð°ÑÐ°ÑÐ½Ð¾Ð³Ð¾ Ð¾Ð±ÐµÑÐ¿ÐµÑÐµÐ½Ð¸Ñ Verilog HDL. ÐÐ¾Ð´ÑÐ»Ñ Ð¿ÐµÑÐµÐ´Ð°ÑÐ¸ Ð·Ð°Ð²ÐµÑÑÐ°ÐµÑ Ð·Ð°ÑÐ¸ÑÑ Ð¿ÐµÑÐµÐ´Ð°ÑÐ¸ ÑÐ°Ð·Ð»Ð¸ÑÐ½ÑÑ ÑÐ¸Ð¿Ð¾Ð² Ð¿Ð°ÐºÐµÑÐ¾Ð² ÑÐ½ÐµÑÐ³ÐµÑÐ¸ÑÐµÑÐºÐ¸Ñ Ð´Ð°Ð½Ð½ÑÑ Ñ Ð¸ÑÐ¿Ð¾Ð»ÑÐ·Ð¾Ð²Ð°Ð½Ð¸ÐµÐ¼ ÐºÐ¾Ð´Ð¸ÑÐ¾Ð²Ð°Ð½Ð¸Ñ 4b5b Ð¸ Ð²ÑÑÐ¸ÑÐ»ÐµÐ½Ð¸Ñ CRC32, Ð° Ð¼Ð¾Ð´ÑÐ»Ñ Ð¿ÑÐ¸ÐµÐ¼Ð° Ð·Ð°Ð²ÐµÑÑÐ°ÐµÑ Ð´ÐµÐºÐ¾Ð´Ð¸ÑÐ¾Ð²Ð°Ð½Ð¸Ðµ 5b4b Ð¸ Ð¿ÑÐ¾Ð²ÐµÑÐºÑ CRC32 Ð¿Ð°ÐºÐµÑÐ¾Ð² Ð´Ð°Ð½Ð½ÑÑ. Ð¿Ð°ÐºÐµÑÑ ÑÐ½ÐµÑÐ³ÐµÑÐ¸ÑÐµÑÐºÐ¸Ñ Ð´Ð°Ð½Ð½ÑÑ.ÐÐ¾ÑÐ¸ÑÐµÐ»ÐµÐ¼ Ð¿ÐµÑÐµÐ´Ð°ÑÐ¸ Ð´Ð°Ð½Ð½ÑÑ Ð² ÑÑÐ¾Ð¹ ÑÑÐ°ÑÑÐµ ÑÐ²Ð»ÑÐµÑÑÑ Ð¸Ð½ÑÐµÑÑÐµÐ¹Ñ Type_C. ÐÐ¾ÑÑÐ¾Ð¼Ñ Ð² ÑÑÐ¾Ð¹ ÑÑÐ°ÑÑÐµ Ð½Ð°ÑÑÑÐ°Ð¸Ð²Ð°ÐµÑÑÑ Ð¿ÐµÑÐ¸ÑÐµÑÐ¸Ð¹Ð½Ð°Ñ ÑÑÐµÐ¼Ð° Ð¸Ð½ÑÐµÑÑÐµÐ¹ÑÐ° Type_C Ð½Ð° Ð¿Ð»Ð°ÑÐµ ÑÐ°Ð·ÑÐ°Ð±Ð¾ÑÐºÐ¸ FPGA Ð´Ð»Ñ Ð¾Ð±ÐµÑÐ¿ÐµÑÐµÐ½Ð¸Ñ ÑÐ°Ð±Ð¾ÑÐµÐ³Ð¾ Ð½Ð°Ð¿ÑÑÐ¶ÐµÐ½Ð¸Ñ 3,3 Ð Ð´Ð»Ñ ÐºÐ°Ð½Ð°Ð»Ð° CC, ÐºÐ¾ÑÐ¾ÑÑÐ¹ Ð¿ÐµÑÐµÐ´Ð°ÐµÑ Ð¸Ð½ÑÐ¾ÑÐ¼Ð°ÑÐ¸Ñ USB_PD. ÐÐµÑÑ Ð¿ÑÐ¾ÑÐµÑÑ Ð·Ð°ÑÑÐ´ÐºÐ¸ Ð¸ ÑÐ°Ð·ÑÑÐ´ÐºÐ¸ Ð±ÑÐ» Ð¿ÑÐ¾Ð°Ð½Ð°Ð»Ð¸Ð·Ð¸ÑÐ¾Ð²Ð°Ð½ Ð¸ Ð¿ÑÐ¾Ð²ÐµÑÐµÐ½ Ð»Ð¾Ð³Ð¸ÑÐµÑÐºÐ¸Ð¼ Ð°Ð½Ð°Ð»Ð¸Ð·Ð°ÑÐ¾ÑÐ¾Ð¼ USB_PD.
description: With the continuous development of the information and digitization era, the needs of applications in the field of data interaction and energy transmission have expanded even further. Whether it is stationary devices such as desktop computers, televisions, workstations, or portable devices such as mobile phones and tablet computers, the USB interface is undoubtedly the most direct connection between data transmission and electricity. Modern equipment not only makes explicit requirements for increasing the data transfer rate, but also puts forward additional requirements for the bandwidth of the USB interface. The ability to transmit 100 watts of power has become a goal that is hoped to be achieved in accordance with the USB3.1 interface specification., and only the USB TYPE-C interface can support the transmission of this power. This requirement cannot be met in accordance with the traditional specifications of the USB 3.0 interface protocol and below, and it is necessary to promote the popularization and application of the USB 3.1 protocol specification, which can support data transmission with high power and high speed. The main content of the research of this article is as follows: the research and design of the USB_PD fast charging circuit based on the Type_C interface has been developed. The design of the transmission and reception modules of the physical layer of the USB_PD power transmission protocol is completed using the Verilog HDL hardware description language. The transmission module completes the transmission protection of various types of energy data packets using 4b5b encoding and CRC32 calculation, and the receiving module completes 5b4b decoding and CRC32 verification of data packets. energy data packets. The data transfer medium in this article is the Type_C interface. Therefore, in this article, the peripheral circuit of the Type_C interface is configured on the FPGA development board to provide an operating voltage of 3.3 V for the CC channel that transmits USB_PD information. The entire charging and discharging process has been analyzed and verified by the USB_PD logic analyzer.