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title: Ð²ÑÐ¿ÑÑÐºÐ½Ð°Ñ ÐºÐ²Ð°Ð»Ð¸ÑÐ¸ÐºÐ°ÑÐ¸Ð¾Ð½Ð½Ð°Ñ ÑÐ°Ð±Ð¾ÑÐ° Ð±Ð°ÐºÐ°Ð»Ð°Ð²ÑÐ°
titleType: Subtitle
title: Development of a multi-kernel polar code encoder architecture for implementation in FPGAs
Creators: name: ÐÐ³Ð°ÑÐ¾Ð½Ð¾Ð², ÐÐµÐ½Ð¸Ñ
Publisher: name: Ð¡Ð°Ð½ÐºÑ-ÐÐµÑÐµÑÐ±ÑÑÐ³ÑÐºÐ¸Ð¹ Ð¿Ð¾Ð»Ð¸ÑÐµÑÐ½Ð¸ÑÐµÑÐºÐ¸Ð¹ ÑÐ½Ð¸Ð²ÐµÑÑÐ¸ÑÐµÑ ÐÐµÑÑÐ° ÐÐµÐ»Ð¸ÐºÐ¾Ð³Ð¾
Year: 2021
Subjects: Ð¿Ð¾Ð¼ÐµÑ Ð¾ÑÑÑÐ¾Ð¹ÑÐ¸Ð²Ð¾Ðµ ÐºÐ¾Ð´Ð¸ÑÐ¾Ð²Ð°Ð½Ð¸Ðµ
Ð¿Ð¾Ð»ÑÑÐ½ÑÐµ ÐºÐ¾Ð´Ñ
Ð¼Ð½Ð¾Ð³Ð¾ÑÐ´ÐµÑÐ½ÑÐµ Ð¿Ð¾Ð»ÑÑÐ½ÑÐµ ÐºÐ¾Ð´Ñ
ÐÐÐÐ¡
Ð°Ð¿Ð¿Ð°ÑÐ°ÑÐ½Ð°Ñ Ð°ÑÑ Ð¸ÑÐµÐºÑÑÑÐ°
encoding
polar codeds
multi-kernel polar codes
FPGA
hardware architecture

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description: Within the framework of the work, several variants of the multi-kernel polar code encoder architectures for implementation in FPGAs were proposed for the first time. A comparative analysis of these architectures was carried out and an opinion was expressed about the best version in terms of delays and the number of resources. Also, the paper presents the basics of classical polar codes and multi-kernel polar codes. The general concepts of these terms are given, the principles of coding are explained. In addition, examples of constructing codes of both types and their differences are given. The advantages of multi-kernel polar codes over classical polar codes are numerically analyzed. The aim of the work is to build several versions of the block diagram of the encoder in the form of block diagrams with numerical estimates of delays and resource consumption. As a result, three architectures were developed with different approaches to obtaining permutations: - Architectures with permutation calculation: - With parallel calculation of the inversion of the product of permutations; - With sequential calculation of the inversion of the product of permutations; - Architecture with pre-loaded permutations in memory. The developed schemes can be used as a support for the implementation of the coder of these codes on the FPGA.