title: Ð Ð°Ð·ÑÐ°Ð±Ð¾ÑÐºÐ° Ð¸ ÑÐµÐ°Ð»Ð¸Ð·Ð°ÑÐ¸Ñ Ð² FPGA ÑÐ¸ÑÑÐ¾Ð²Ð¾Ð³Ð¾ ÑÐ½Ð¸Ð²ÐµÑÑÐ°Ð»ÑÐ½Ð¾Ð³Ð¾ Ð¼Ð½Ð¾Ð³Ð¾ÐºÐ°Ð½Ð°Ð»ÑÐ½Ð¾Ð³Ð¾ Ð¿Ð¾Ð½Ð¸Ð¶Ð°ÑÑÐµÐ³Ð¾ Ð¿ÑÐµÐ¾Ð±ÑÐ°Ð·Ð¾Ð²Ð°ÑÐµÐ»Ñ ÑÐ°ÑÑÐ¾ÑÑ Ð´Ð»Ñ ÑÑÑÑÐ¾Ð¹ÑÑÐ²Ð° Ð¼Ð¾Ð½Ð¸ÑÐ¾ÑÐ¸Ð½Ð³Ð° ÑÐ¿ÑÑÐ½Ð¸ÐºÐ¾Ð²ÑÑ ÑÐ¸ÑÑÐµÐ¼ ÑÐ²ÑÐ·Ð¸
title: Ð²ÑÐ¿ÑÑÐºÐ½Ð°Ñ ÐºÐ²Ð°Ð»Ð¸ÑÐ¸ÐºÐ°ÑÐ¸Ð¾Ð½Ð½Ð°Ñ ÑÐ°Ð±Ð¾ÑÐ° Ð¼Ð°Ð³Ð¸ÑÑÑÐ°
titleType: Subtitle
title: Design and implementation in FPGA of multi-channel digital down converter for monitoring satellite communications systems
Creators: name: ÐÐ¾ÑÐµÐ¹ÑÑÐº, ÐÐ²Ð°Ð½
Publisher: name: Ð¡Ð°Ð½ÐºÑ-ÐÐµÑÐµÑÐ±ÑÑÐ³ÑÐºÐ¸Ð¹ Ð¿Ð¾Ð»Ð¸ÑÐµÑÐ½Ð¸ÑÐµÑÐºÐ¸Ð¹ ÑÐ½Ð¸Ð²ÐµÑÑÐ¸ÑÐµÑ ÐÐµÑÑÐ° ÐÐµÐ»Ð¸ÐºÐ¾Ð³Ð¾
Year: 2020
Subjects: ÑÐ¸ÑÑÐ¾Ð²Ð¾Ð¹ Ð¿Ð¾Ð½Ð¸Ð¶Ð°ÑÑÐ¸Ð¹ Ð¿ÑÐµÐ¾Ð±ÑÐ°Ð·Ð¾Ð²Ð°ÑÐµÐ»Ñ ÑÐ°ÑÑÐ¾ÑÑ
Ð¿Ð»Ð¸Ñ
Ð¼Ð½Ð¾Ð³Ð¾ÐºÐ°Ð½Ð°Ð»ÑÐ½Ð¾ÑÑÑ
Ð´ÐµÑÐ¸Ð¼Ð°ÑÐ¸Ñ
ÑÐ¼ÐµÑÐ¸ÑÐµÐ»Ñ
ÑÐµÑÐµÐ¼Ð¿Ð»ÐµÑ
dsp
fpga
digital down converter
multichannel
decimation
mixer
resampler

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description: The subject of the graduate qualification work is âDesign and implementation in
FPGA of multi-channel digital down converter for monitoring satellite
communications systemsâ.
The given work is devoted to solving the problem of multi-channel digital signal
processing in real time. There is a problem related to the high sampling rate of the
received signal, which makes it difficult to implement parallel digital processing of
several channels in monitoring devices for satellite communication systems. The high
sampling frequency also may be excessive for processing single channel. It is proposed
to develop a universal 16-channel digital down converter with wide range of supported
decimation factors (8-16384) and capturing the input bandwidth of 400 MHz.
Implementation based on FPGA from Xilinx. This qualification work presents the
development of the device architecture and the implementation of functional modules:
decimators, mixers, channel switcher, resampler, channel filter, and other auxiliary
modules. The development uses the principles of model-based design. First, models of
functional blocks are created to evaluate the quality of work. Then the modules are
implemented in the FPGA. The developed configuration topology allows to manage
the parameters of each blocks directly while the device is running. The presented
development can be used both in broadband monitoring systems and in other various
devices for receiving and processing signals.