title: Ð ÐµÐ°Ð»Ð¸Ð·Ð°ÑÐ¸Ñ Ð² FPGA Ð¼Ð¾Ð´ÑÐ»ÑÑÐ¾ÑÐ° DVB-S2/S2X
title: Ð²ÑÐ¿ÑÑÐºÐ½Ð°Ñ ÐºÐ²Ð°Ð»Ð¸ÑÐ¸ÐºÐ°ÑÐ¸Ð¾Ð½Ð½Ð°Ñ ÑÐ°Ð±Ð¾ÑÐ° Ð±Ð°ÐºÐ°Ð»Ð°Ð²ÑÐ°
titleType: Subtitle
title: Implementation of the DVB-S2/S2X modulator in FPGA
Creators: name: ÐÐ¾ÑÐ½ÐµÐ½ÐºÐ¾, ÐÐ½Ð³ÐµÐ»Ð¸Ð½Ð°
Publisher: name: Ð¡Ð°Ð½ÐºÑ-ÐÐµÑÐµÑÐ±ÑÑÐ³ÑÐºÐ¸Ð¹ Ð¿Ð¾Ð»Ð¸ÑÐµÑÐ½Ð¸ÑÐµÑÐºÐ¸Ð¹ ÑÐ½Ð¸Ð²ÐµÑÑÐ¸ÑÐµÑ ÐÐµÑÑÐ° ÐÐµÐ»Ð¸ÐºÐ¾Ð³Ð¾
Year: 2020
Subjects: Ð¼Ð¾Ð´ÑÐ»ÑÑÐ¸Ñ
Ð¼Ð°Ð¿Ð¿ÐµÑ
ÑÐ¸Ð³Ð½Ð°Ð»ÑÐ½Ð¾Ðµ ÑÐ¾Ð·Ð²ÐµÐ·Ð´Ð¸Ðµ
ÑÐµÐ°Ð»Ð¸Ð·Ð°ÑÐ¸Ñ
Ð°ÑÑ Ð¸ÑÐµÐºÑÑÑÐ°
mapper
modulation
PSK
constellation
implementation
archtecture

description: Ð¢ÐµÐ¼Ð° Ð²ÑÐ¿ÑÑÐºÐ½Ð¾Ð¹ ÐºÐ²Ð°Ð»Ð¸ÑÐ¸ÐºÐ°ÑÐ¸Ð¾Ð½Ð½Ð¾Ð¹ ÑÐ°Ð±Ð¾ÑÑ: Â«Ð ÐµÐ°Ð»Ð¸Ð·Ð°ÑÐ¸Ñ Ð² FPGAÐ¼Ð¾Ð´ÑÐ»ÑÑÐ¾ÑÐ° DVB-S2/S2XÂ».Ð¦ÐµÐ»Ñ ÑÐ°Ð±Ð¾ÑÑ: ÑÐ°Ð·ÑÐ°Ð±Ð¾ÑÐºÐ° Ð¸ ÑÐµÐ°Ð»Ð¸Ð·Ð°ÑÐ¸Ñ Ð² FPGA Kintex Ultrascale KU115 Ð¼Ð¾Ð´ÑÐ»Ñ Ð¿ÑÐµÐ¾Ð±ÑÐ°Ð·Ð¾Ð²Ð°Ð½Ð¸Ñ Ð¸Ð½ÑÐ¾ÑÐ¼Ð°ÑÐ¸Ð¾Ð½Ð½ÑÑ Ð±Ð¸ÑÐ¾Ð² Ð² ÐºÐ¾Ð¼Ð¿Ð»ÐµÐºÑÐ½ÑÐµ Ð¼Ð¾Ð´ÑÐ»ÑÑÐ¸Ð¾Ð½Ð½ÑÐµ ÑÐ¸Ð¼Ð²Ð¾Ð»Ñ Ñ Ð¿Ð¾Ð´Ð´ÐµÑÐ¶ÐºÐ¾Ð¹ Ð²ÑÐµÑ ÑÐµÐ¶Ð¸Ð¼Ð¾Ð² ÑÑÐ°Ð½Ð´Ð°ÑÑÐ¾Ð² DVB-S2/S2x Ð½Ð° Ð¾ÑÐ½Ð¾Ð²Ðµ Ð²ÑÑÑÐ¾ÐµÐ½Ð½Ð¾Ð¹ Ð±Ð»Ð¾ÑÐ½Ð¾Ð¹ Ð¿Ð°Ð¼ÑÑÐ¸. ÐÐ°Ð½Ð½Ð°Ñ ÑÐ°Ð±Ð¾ÑÐ° Ð¿Ð¾ÑÐ²ÑÑÐµÐ½Ð° Ð²ÑÑÐ¸ÑÐ»ÐµÐ½Ð¸Ñ Ð¸ Ð¿Ð¾ÑÑÑÐ¾ÐµÐ½Ð¸Ñ ÑÐ¸Ð³Ð½Ð°Ð»ÑÐ½ÑÑ ÑÐ¾Ð·Ð²ÐµÐ·Ð´Ð¸Ð¹, Ð¸ÑÐ¿Ð¾Ð»ÑÐ·ÑÐµÐ¼ÑÑ Ð² ÑÑÐ°Ð½Ð´Ð°ÑÑÐ°Ñ ÑÐ¿ÑÑÐ½Ð¸ÐºÐ¾Ð²Ð¾Ð¹ ÑÐ²ÑÐ·Ð¸ DVB-S2/S2X. Ð Ð°ÑÑÐ¼Ð¾ÑÑÐµÐ½Ñ ÑÐ°Ð·Ð¾Ð²Ð°Ñ (PSK) Ð¸ Ð°Ð¼Ð¿Ð»Ð¸ÑÑÐ´Ð½Ð¾-ÑÐ°Ð·Ð¾Ð²Ð°Ñ (APSK) Ð¼Ð¾Ð´ÑÐ»ÑÑÐ¸Ð¸. ÐÐ°Ð¿Ð¿ÐµÑ (Ð¼Ð¾Ð´ÑÐ»ÑÑÐ¾Ñ) Ð¿ÑÐµÐ´ÑÑÐ°Ð²Ð»ÐµÐ½ Ð±Ð¾Ð»ÑÑÐ¸Ð¼ ÐºÐ¾Ð»Ð¸ÑÐµÑÑÐ²Ð¾Ð¼ ÑÐ¾Ð·Ð²ÐµÐ·Ð´Ð¸Ð¹. ÐÑ Ð½Ð°Ð»Ð¸ÑÐ¸Ðµ Ð¿ÑÐµÐ´Ð¿Ð¾Ð»Ð°Ð³Ð°ÐµÑ, ÑÑÐ¾ Ð¼Ð°Ð¿Ð¿ÐµÑ Ð±ÑÐ´ÐµÑ Ð·Ð°Ð½Ð¸Ð¼Ð°ÑÑ Ð±Ð¾Ð»ÑÑÐ¾Ð¹ Ð¾Ð±ÑÑÐ¼ ÑÐµÑÑÑÑÐ¾Ð² ÐÐÐÐ¡ (Ð¿ÑÐ¾Ð³ÑÐ°Ð¼Ð¼Ð¸ÑÑÐµÐ¼Ð°Ñ Ð»Ð¾Ð³Ð¸ÑÐµÑÐºÐ°Ñ Ð¸Ð½ÑÐµÐ³ÑÐ°Ð»ÑÐ½Ð°Ñ ÑÑÐµÐ¼Ð°). ÐÐ»Ñ ÑÐµÑÐµÐ½Ð¸Ñ ÑÑÐ¾Ð¹ Ð¿ÑÐ¾Ð±Ð»ÐµÐ¼Ñ, ÑÐ¾ ÐµÑÑÑ Ð´Ð»Ñ Ð¼Ð¸Ð½Ð¸Ð¼Ð¸Ð·Ð°ÑÐ¸Ð¸ ÑÐµÑÑÑÑÐ¾Ð², Ð±ÑÐ»Ð° Ð¿ÑÐµÐ´Ð»Ð¾Ð¶ÐµÐ½Ð° Ð°ÑÑÐ¸ÑÐµÐºÑÑÑÐ°,Ð¾Ð¿Ð¸ÑÐ°Ð½Ð½Ð°Ñ Ð² ÑÐ°Ð±Ð¾ÑÐµ. Ð ÑÐ¾Ð´Ðµ ÑÐ°Ð±Ð¾ÑÑ Ð±ÑÐ»Ð¸ Ð¿Ð¾ÑÑÐ°Ð²Ð»ÐµÐ½Ñ Ð¸ ÑÐµÑÐµÐ½Ñ ÑÐ»ÐµÐ´ÑÑÑÐ¸Ðµ Ð·Ð°Ð´Ð°ÑÐ¸: -ÑÐ°Ð·ÑÐ°Ð±Ð¾ÑÐºÐ° Ð°ÑÑÐ¸ÑÐµÐºÑÑÑÑ ÑÐ½Ð¸Ð²ÐµÑÑÐ°Ð»ÑÐ½Ð¾Ð³Ð¾ Ð¼Ð¾Ð´ÑÐ»ÑÑÐ¾ÑÐ° Ñ Ð¿Ð¾Ð´Ð´ÐµÑÐ¶ÐºÐ¾Ð¹ Ð²ÑÐµÑ ÑÐµÐ¶Ð¸Ð¼Ð¾Ð² ÑÑÐ°Ð½Ð´Ð°ÑÑÐ¾Ð² DVB-S2/S2x; -ÑÐµÐ°Ð»Ð¸Ð·Ð°ÑÐ¸Ñ ÑÐ½Ð¸Ð²ÐµÑÑÐ°Ð»ÑÐ½Ð¾Ð³Ð¾ Ð¼Ð¾Ð´ÑÐ»ÑÑÐ¾ÑÐ° Ñ Ð¿Ð¾Ð´Ð´ÐµÑÐ¶ÐºÐ¾Ð¹ Ð²ÑÐµÑ ÑÐµÐ¶Ð¸Ð¼Ð¾Ð² ÑÑÐ°Ð½Ð´Ð°ÑÑÐ¾Ð² DVB-S2/S2xÐ² FPGA -Ð°Ð½Ð°Ð»Ð¸Ð· Ð¸ÑÐ¿Ð¾Ð»ÑÐ·Ð¾Ð²Ð°Ð½Ð½Ð¾Ð³Ð¾ ÐºÐ¾Ð»Ð¸ÑÐµÑÑÐ²Ð° ÑÐµÑÑÑÑÐ¾Ð² Ð¸ Ð¼Ð°ÐºÑÐ¸Ð¼Ð°Ð»ÑÐ½Ð¾Ð¹ Ð¿ÑÐ¾Ð¸Ð·Ð²Ð¾Ð´Ð¸ÑÐµÐ»ÑÐ½Ð¾ÑÑÐ¸ ÑÐµÐ°Ð»Ð¸Ð·Ð¾Ð²Ð°Ð½Ð½Ð¾Ð³Ð¾ Ð¼Ð¾Ð´ÑÐ»ÑÑÐ¾ÑÐ° Ð² FPGA Kintex Ultrascale KU115. ÐÑÐµÐ´Ð»Ð¾Ð¶ÐµÐ½Ð½Ð°Ñ Ð°ÑÑÐ¸ÑÐµÐºÑÑÑÐ° Ð¼Ð°Ð¿Ð¿ÐµÑÐ° Ð´Ð»Ñ ÑÑÐ°Ð½Ð´Ð°ÑÑÐ¾Ð² DVB-S2/S2XÑÐµÐ°Ð»Ð¸Ð·Ð¾Ð²Ð°Ð½Ð° Ð½Ð° ÑÐ·ÑÐºÐµ VHDLÐ¸ ÑÐ¸Ð½ÑÐµÐ·Ð¸ÑÐ¾Ð²Ð°Ð½Ð° Ð² ÑÑÐµÐ´Ðµ Vivado Design Suite. Ð¢Ð°ÐºÐ¶Ðµ Ð±ÑÐ»Ð° Ð²ÑÐ¿Ð¾Ð»Ð½ÐµÐ½Ð° Ð¸Ð¼Ð¿Ð»ÐµÐ¼ÐµÐ½ÑÐ°ÑÐ¸Ñ Ð½Ð° ÑÐ°ÐºÑÐ¾Ð²Ð¾Ð¹ ÑÐ°ÑÑÐ¾ÑÐµ 400 ÐÐÑ Ð² ÐÐÐÐ¡ KintexUltraScaleKU115.
description: The subject of the graduate qualification work is âImplementation of the DVB-S2 / S2X modulator in FPGAâ. The aim of the work is the development and implementation in the Kintex Ultrascale KU115 of a module for converting information bits into complex modulation symbols with support for all modes of DVB-S2 / S2x standards based on block memory. The work is devoted to calculation and construction of signal constellations, which are using in the satellite communications standards DVB-S2 / S2X. The phase (PSK) and amplitude-phase (APSK) modulations are considered in this work. Mapper is represented by a large number of constellations. The use of them means that the mapper will occupy a large amount of FPGA resources. An architecture, which described in this work, proposed for solvingthis problem, that is, to minimize re-sources. The research set the following goals: -development of a universal modulator architecture with support for all modes of DVB-S2 / S2x standards; -implementation of a universal modulator with support for all modes of DVB-S2 / S2x standards in FPGA -analysis of the amount of resources used and the maximum productivity of the implemented modulator in the Kintex Ultrascale KU115 FPGA. The proposed mapper architecture for DVB-S2 / S2X standards is implemented in VHDL and synthesized in the Vivado Design Suite. Implementation was performed at Ð°frequency 400 MHz in FPGA Kintex UltraScale KU115.