DC Measurement Unit as prototype
Creators: name: Cazal, Cesar Andres
name: Guarnieri, Carlo
name: Hamila, Roua
name: Yüksel, Kagan
name: Ponci, Ferdinanda
name: Monti, Antonello
Publisher: name: The HYPERRIDE Consortium
Year: 2023
Subjects: DC
Synchronous
Measurement
DMU
SMU
GPS
Analog-to-Digital
Deliverable
European Union (EU)
H2020
Project
HYPERRIDE
GA 957788

description: The Synchronized Measurement Unit (SMU), as a generalization of the Phasor Measurement Unit (PMU) for both, Alternating Current (AC) and Direct Current (DC) systems, is a single device able to provide synchronized measurements to a time-referenced signal using Global Positioning System (GPS). This concept, developed within the present project and explored within the first chapter, tries to solve different problems within the power grid, like lack of reference points for measurements and long-distance measurements that would require long cables. The SMU, in particular, uses a Raspberry Pi 3-based platform with specific-purpose hardware including a 3D-printed housing for the digitalization of physical values (current and voltages). On the other hand, its different software layers include a low-level driver for data acquisition and higher-level plugins in charge of the data processing. At the end of every main chapter, a special emphasis on the DC operation of the SMU is made, where we call the device as DC Measurement Unit (DMU) to specify the joint hardware and software configurations that characterize it for the DC operation.

In the second chapter, a special emphasis on the Hardware dimension of the DMU is given, where a detailed description of the Hardware-Attached-on-Top (HAT) board is given, where the Analog-to-Digital (ADC) and the GPS block are present, providing the RPi3 with a digital interface to the physical world and a time reference block for a deterministic time frame for the acquired variables respectively. Moreover, the ADC block is not just dependent on the ADC specifications but also on other components of the analog front end, reaching up to 200kSps, ±10V full-range, for eight simultaneous acquisition channels with up to 16-bit precision, while the GPS block provides with sub-microsecond sample-synchronization. In between the performed tests include static as well as a dynamic error quantification (with an offset error of 46μV and gain error of 216ppm, significantly less error than 1%), transient conditions (group delay of 14.9μs to reach 50% of the full-range-scale step-signal), and synchronization error (roughly 188.7ns). Finally, a schematic circuit description for the DMU hardware connection and operation is presented.

In the third chapter, the software architecture of the SMU is explored, where it can be customized to operate as a DMU, PMU, or any other synchronous measurement device. Furthermore, the software layer consists of several blocks, including smuDRV, smuSVC, smuLIB, smuDSP, and smuNET. First, the smuDRV operates as a driver module that uses a finite state machine to acquire data and govern the operation of the HAT board. Second, the smuSVC interfaces with the driver to provide the acquired data to the userspace. The third block, smuLIB provides the different modules with common information and registries to avoid the need for copy-pasting the same data several times. Fourth, the smuDSP is in charge of processing the samples to provide different results from the digitalized analog values. Finally, the smuNET block provides network and communication, providing the data to other programs in need of processed results. Altogether, the first three can be considered as general-purpose blocks, while the last two define mainly the type and characteristics of the Operation as either DMU or PMU. In this case, libraries for raw samples and RMS, DC and AC compressed data formats have been currently prepared for DC systems within the possible smuDSP libraries to be selected,as well as MQTT and TCP server for communication protocols implemented within the smuNET libraries to support the interface of external applications.

In the fourth chapter, the recommendation for a future standard for DMU is discussed and emphasized into two main topics. Firstly, the definition of the extent of the Measurement System must be addressed, where consideration should be given to the signal level adaptation stage, signal conditioning stage, and signal acquisition and processing stage. Secondly, different errors involved in the measurement process should be defined, including static signal error, dynamic signal error, transient error, and synchronization error. Recommendations are provided for each of these errors, with a maximum deviation of 1% recommended for dynamic signal error, and static signal error for the RMS, DC and AC components individually, while a transient error of no more than 2% should be considered for a full-range step-response. A synchronization error of less than 10μs is recommended (i.e. 1% of 1kSps).

Finally, as a conclusion for this Work Package (WP) deliverable, several improvement points have been identified, separated mainly into Hardware and Software improvements. Regarding the Hardware, a surge protection stage, a signal conditioning stage, and fault-tolerant hardware additions, as well as their impact on the measurement are still to be explored within the project. For the Software improvements, the validity of the compressed data proposed within the project is to be reviewed. Further CPU compatibility, code optimization, code maintainability, as well as new communication libraries, and a fault-tolerant operation software layer represent further project needs.