title: ÐÐ»Ð³Ð¾ÑÐ¸ÑÐ¼ ÑÐ¾ÑÐ¼Ð¸ÑÐ¾Ð²Ð°Ð½Ð¸Ñ Ð¾Ð¿Ð¾ÑÐ½Ð¾Ð³Ð¾ ÑÐ¸Ð³Ð½Ð°Ð»Ð°
title: Ð²ÑÐ¿ÑÑÐºÐ½Ð°Ñ ÐºÐ²Ð°Ð»Ð¸ÑÐ¸ÐºÐ°ÑÐ¸Ð¾Ð½Ð½Ð°Ñ ÑÐ°Ð±Ð¾ÑÐ° Ð±Ð°ÐºÐ°Ð»Ð°Ð²ÑÐ°
titleType: Subtitle
title: Algorithm for generating a reference signal
Creators: name: ÐÑÑÐ»Ð¾Ð²Ð°, ÐÐ°ÑÐ¸Ñ
Publisher: name: Ð¡Ð°Ð½ÐºÑ-ÐÐµÑÐµÑÐ±ÑÑÐ³ÑÐºÐ¸Ð¹ Ð¿Ð¾Ð»Ð¸ÑÐµÑÐ½Ð¸ÑÐµÑÐºÐ¸Ð¹ ÑÐ½Ð¸Ð²ÐµÑÑÐ¸ÑÐµÑ ÐÐµÑÑÐ° ÐÐµÐ»Ð¸ÐºÐ¾Ð³Ð¾
Year: 2023
Subjects: Ð¾Ð¿Ð¾ÑÐ½ÑÐ¹ ÑÐ¸Ð³Ð½Ð°Ð»
ÑÐ°Ð·Ð¾Ð²Ð°Ñ Ð°Ð²ÑÐ¾Ð¿Ð¾Ð´ÑÑÑÐ¾Ð¹ÐºÐ° ÑÐ°ÑÑÐ¾ÑÑ
ÑÐ¸Ð½ÑÐµÐ· ÑÐ°ÑÑÐ¾Ñ
Ð±Ð»Ð¾Ðº Ð¾Ð¿Ð¾ÑÐ½Ð¾Ð¹ ÑÐ°ÑÑÐ¾ÑÑ
Ð³ÐµÐ½ÐµÑÐ°ÑÐ¾Ñ ÑÐ°ÑÑÐ¾ÑÑ
Ð¼Ð¸ÐºÑÐ¾ÐºÐ¾Ð½ÑÑÐ¾Ð»Ð»ÐµÑ
reference signal
phase-locked frequency
frequency synthesis
reference frequency block
frequency generator
microcontroller

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description: As a result of the study, the literature was studied and an overview of existing methods of forming a reference signal using PLL using open educational resources and programs for information search and analysis was conducted. The requirements and specifications for the reference frequency unit were analyzed â technical specifications (TU), operating instructions (RE), electrical schematic diagram (E3) / connections (E4) for TSYUI.468782.016, the main characteristics and parameters of the reference signal were determined. A block diagram of the algorithm for generating the reference signal was also developed, considering the features of the PLL, frequency synthesis, MC and FPGA. As a result, this algorithm was implemented at the software and hardware levels using the appropriate programming languages â C for MK and VHDL for FPGA, and development tools â Keil uVision 5 for MK and Quartus II for FPGA, and a circuit analysis of the implemented system on a printed circuit board was carried out.â