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titleType: Subtitle
title: Implementation in FPGA of the algorithm for calculating the syndrome for the decoder of binary BCH codes
Creators: name: ÐÑÐ±Ð»Ð¸ÐºÐ¾Ð², ÐÐ»ÑÑ
Publisher: name: Ð¡Ð°Ð½ÐºÑ-ÐÐµÑÐµÑÐ±ÑÑÐ³ÑÐºÐ¸Ð¹ Ð¿Ð¾Ð»Ð¸ÑÐµÑÐ½Ð¸ÑÐµÑÐºÐ¸Ð¹ ÑÐ½Ð¸Ð²ÐµÑÑÐ¸ÑÐµÑ ÐÐµÑÑÐ° ÐÐµÐ»Ð¸ÐºÐ¾Ð³Ð¾
Year: 2022
Subjects: ÑÐ¸ÐºÐ»Ð¾ÑÐ¾Ð¼Ð¸ÑÐµÑÐºÐ¸Ð¹ Ð°Ð»Ð³Ð¾ÑÐ¸ÑÐ¼
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description: The subject of the graduate qualification work is the algorithm for calculating the syndrome. The given work is devoted to implement a module for FPGAs capable of calculating the value of the syndrome for binary BCH codes. As a result of the research, a module was developed that allows calculating the components of the syndrome for the received binary message in the FPGA. This module can be used in high-performance devices for decoding a large stream of input data. Acceptable scope of application â digital data transmission devices. Since, because of a preliminary study of the literature, no such implementation for FPGAs was found in the public domain, its development is an urgent task in the field of telecommunications, since it will allow using an algorithm for calculating the syndrome with reduced complexity of calculations in FPGA conditions, on which all modern noise-resistant codes are mainly focused, since FPGAs can provide high bandwidth. The results of simulation and implementation of the developed implementations were analysed and interpretated.