Repository: OpenAMP/openamp-docs
Pull request #49: Add a TI reference board page
Author: login: glneo
Created: 2025-04-24T18:31:40Z | Merged: 2025-04-30T07:17:07Z



Diff:
diff --git a/demos/reference_boards.rst b/demos/reference_boards.rst
index d233413..6c60cc6 100644
--- a/demos/reference_boards.rst
+++ b/demos/reference_boards.rst
@@ -13,4 +13,5 @@ In general the OpenAMP feature being exemplified is found in the `OpenAMP source
    system_reference-AMD-Xilinx
    system_reference-ST
    system_reference-NXP
+   system_reference-TI
    inter_process
diff --git a/demos/rpmsg_multi_services.rst b/demos/rpmsg_multi_services.rst
index 77bdd08..290e466 100644
--- a/demos/rpmsg_multi_services.rst
+++ b/demos/rpmsg_multi_services.rst
@@ -161,3 +161,7 @@ This RPMsg Multi Services Sample is demonstrated in the following reference impl
 * :ref:`NXP <reference_board_NXP>`
 
    * Refer to Application Note `AN13970 Running Zephyr RTOS <https://www.nxp.com/docs/en/application-note/AN13970.pdf>`_
+
+* :ref:`Texas Instruments <reference_board_TI>`
+
+   * Refer to `Zephyr Build Instructions <https://github.com/OpenAMP/openamp-system-reference/tree/main/examples/zephyr/rpmsg_multi_services>`_.
diff --git a/demos/system_reference-TI.rst b/demos/system_reference-TI.rst
new file mode 100644
index 0000000..bd574a3
--- /dev/null
+++ b/demos/system_reference-TI.rst
@@ -0,0 +1,45 @@
+.. _reference_board_TI:
+
+==================================
+Texas Instruments Reference Boards
+==================================
+
+A number of the `OpenAMP project examples <https://github.com/OpenAMP/openamp-system-reference/tree/main/examples>`_ can be executed on TI Reference boards.
+
+The `Zephyr <https://www.zephyrproject.org/>`_ demo `OpenAMP using resource table <https://docs.zephyrproject.org/latest/samples/subsys/ipc/openamp_rsc_table/README.html>`_ can be built for the following boards:
+
+.. csv-table::
+   :header: "Board", "Zephyr Identifier", "Deploy Firmware Name"
+   :widths: 50, 50, 50
+
+    `TI SK-AM64B <https://www.ti.com/tool/SK-AM64B>`_, ``sk_am64/am6442/m4``, ``am64-mcu-m4f0_0-fw``
+    `BeagleBoard PocketBeagle 2 <https://www.beagleboard.org/boards/pocketbeagle-2>`_, ``pocketbeagle_2/am6232/m4``, ``am62-mcu-m4f0_0-fw``
+
+Use the Zephyr `Getting Started Guide <https://docs.zephyrproject.org/latest/develop/getting_started/index.html>`_ to setup the build environment. Then build the OpenAMP example firmware with:
+
+.. code-block:: console
+
+   west build -p -b <Zephyr Identifier> samples/subsys/ipc/openamp_rsc_table
+
+This will produce a firmware named ``zephyr_openamp_rsc_table.elf`` which can be deployed to the board. Then copy or symlink it to the expected name in the firmware directory:
+
+.. code-block:: console
+
+   ln -s zephyr_openamp_rsc_table.elf /lib/firmware/<Deploy Firmware Name>
+
+Either restart the board so the kernel can load it on boot, or restart the remote processor manually:
+
+.. code-block:: console
+
+   # check remote processor state
+   cat /sys/class/remoteproc/remoteproc0/state
+
+   # Stop remote processor if running
+   echo stop > /sys/class/remoteproc/remoteproc0/state
+
+   # Load and start target firmware onto remote processor
+   echo start > /sys/class/remoteproc/remoteproc0/state
+
+.. note::
+
+   The remote processor number (remoteproc0) may be different depending on driver probe order. To check which remote processor the number belongs to print out the default firmware name (:code:`cat /sys/class/remoteproc/remoteproc0/firmware`) and match that to the ``Deploy Firmware Name`` above.
diff --git a/protocol_details/asymmetric_mp.rst b/protocol_details/asymmetric_mp.rst
index 3ab3f97..1ec5469 100644
--- a/protocol_details/asymmetric_mp.rst
+++ b/protocol_details/asymmetric_mp.rst
@@ -6,13 +6,14 @@ Asymmetric Multiprocessing (AMP) Intro
 
 An embedded AMP system is characterized by multiple homogeneous and/or heterogeneous processing cores integrated into one System-on-a-Chip (SoC). Examples include:
 
-    - The Xilinx MPSoC that has four ARM Cortex-A53, two ARM Cortex-R5, and potentially a number of MicroBlaze cores.
+    - The AMD Zynq UltraScale+ MPSoCs that utilize four ARM Cortex-A53, two ARM Cortex-R5, and potentially a number of MicroBlaze cores.
     - The NXP i.MX6SoloX/i.MX7d SoCs that utilizes ARM Cortex-A9 and ARM Cortex-M4F cores
-    - The Texas Instruments TI AM57x SoCs that have dual ARM Cortex A15, dual ARM Cortex M4, and C66x DSP cores.
+    - The Texas Instruments Sitara AM625 SoCs that utilize ARM Cortex-A53, ARM Cortex-M4F, ARM Cortex-R5F, and PRU-ICSS cores.
+    - The ST STM32MP15x SoCs that utilize ARM Cortex-A7 and ARM Cortex-M4 cores.
 
 These cores typically run independent instances of homogeneous and/or heterogeneous software environments, such as Linux, RTOS, and Bare Metal that work together to achieve the design goals of the end application. While Symmetric Multiprocessing (SMP) operating systems allow load balancing of application workload across homogeneous processors present in such AMP SoCs, asymmetric multiprocessing design paradigms are required to leverage parallelism from the heterogeneous cores present in the system.
 
-Increasingly, today’s multicore applications require heterogeneous processing power. Heterogeneous multicore SoCs often have one or more general purpose CPUs (for example, dual ARM Cortex A9 cores on Xilinx Zynq) with DSPs and/or smaller CPUs and/or soft IP (on SoCs such as Xilinx Zynq MPSOC). These specialized CPUs, as compared to the general purpose CPUs, are typically dedicated for demand-driven offload of specialized application functionality to achieve maximum system performance. Systems developed using these types of SoCs, characterized by heterogeneity in both hardware and software, are generally termed as AMP systems.
+Increasingly, today’s multicore applications require heterogeneous processing power. Heterogeneous multicore SoCs often have one or more general purpose CPUs (for example, ARM Cortex-A cores) with DSPs (such as TI C7x cores) and/or smaller CPUs (such as ARM Cortex-M and Cortex-R) and/or soft IP (such as AMD MicroBlaze cores). These specialized CPUs, as compared to the general purpose CPUs, are typically dedicated for demand-driven offload of specialized application functionality to achieve maximum system performance. Systems developed using these types of SoCs, characterized by heterogeneity in both hardware and software, are generally termed as AMP systems.
 
 Other reasons to run heterogeneous software environments (e.g. multi-OS) include:
 


Reviews:
user: login: arnopo
body: minor remark and request, else lGTM
state: COMMENTED
author_association: COLLABORATOR
submitted_at: 2025-04-28T16:07:00Z
user: login: tnmysh
state: APPROVED
author_association: COLLABORATOR
submitted_at: 2025-04-28T16:07:37Z
user: login: tnmysh
state: COMMENTED
author_association: COLLABORATOR
submitted_at: 2025-04-28T16:14:51Z
user: login: tnmysh
state: COMMENTED
author_association: COLLABORATOR
submitted_at: 2025-04-28T16:16:04Z
user: login: glneo
state: COMMENTED
author_association: CONTRIBUTOR
submitted_at: 2025-04-28T17:19:13Z
user: login: glneo
state: COMMENTED
author_association: CONTRIBUTOR
submitted_at: 2025-04-28T17:22:26Z
user: login: tnmysh
state: COMMENTED
author_association: COLLABORATOR
submitted_at: 2025-04-28T18:07:34Z
user: login: arnopo
state: APPROVED
author_association: COLLABORATOR
submitted_at: 2025-04-29T07:53:55Z

Review comments:
diff_hunk: @@ -8,11 +8,11 @@ An embedded AMP system is characterized by multiple homogeneous and/or heterogen
 
     - The Xilinx MPSoC that has four ARM Cortex-A53, two ARM Cortex-R5, and potentially a number of MicroBlaze cores.
     - The NXP i.MX6SoloX/i.MX7d SoCs that utilizes ARM Cortex-A9 and ARM Cortex-M4F cores
-    - The Texas Instruments TI AM57x SoCs that have dual ARM Cortex A15, dual ARM Cortex M4, and C66x DSP cores.
+    - The Texas Instruments TI AM625 SoCs that contain ARM Cortex-A53, ARM Cortex-M4F, ARM Cortex-R5F, and PRU-ICSS cores.
 
 These cores typically run independent instances of homogeneous and/or heterogeneous software environments, such as Linux, RTOS, and Bare Metal that work together to achieve the design goals of the end application. While Symmetric Multiprocessing (SMP) operating systems allow load balancing of application workload across homogeneous processors present in such AMP SoCs, asymmetric multiprocessing design paradigms are required to leverage parallelism from the heterogeneous cores present in the system.
 
-Increasingly, today’s multicore applications require heterogeneous processing power. Heterogeneous multicore SoCs often have one or more general purpose CPUs (for example, dual ARM Cortex A9 cores on Xilinx Zynq) with DSPs and/or smaller CPUs and/or soft IP (on SoCs such as Xilinx Zynq MPSOC). These specialized CPUs, as compared to the general purpose CPUs, are typically dedicated for demand-driven offload of specialized application functionality to achieve maximum system performance. Systems developed using these types of SoCs, characterized by heterogeneity in both hardware and software, are generally termed as AMP systems.
+Increasingly, today’s multicore applications require heterogeneous processing power. Heterogeneous multicore SoCs often have one or more general purpose CPUs (for example, ARM Cortex-A9 cores) with DSPs (such as TI C7x cores) and/or smaller CPUs (such as ARM Cortex-R5F) and/or soft IP (such as Xilinx MicroBlaze cores). These specialized CPUs, as compared to the general purpose CPUs, are typically dedicated for demand-driven offload of specialized application functionality to achieve maximum system performance. Systems developed using these types of SoCs, characterized by heterogeneity in both hardware and software, are generally termed as AMP systems.
path: protocol_details/asymmetric_mp.rst
user: login: arnopo
body: ```suggestion
Increasingly, today’s multicore applications require heterogeneous processing power. Heterogeneous multicore SoCs often have one or more general purpose CPUs (for example, ARM Cortex-A cores) with DSPs (such as TI C7x cores) and/or smaller CPUs (such as ARM Cortex-M and Cortex-R) and/or soft IP (such as AMD MicroBlaze cores). These specialized CPUs, as compared to the general purpose CPUs, are typically dedicated for demand-driven offload of specialized application functionality to achieve maximum system performance. Systems developed using these types of SoCs, characterized by heterogeneity in both hardware and software, are generally termed as AMP systems.
```


created_at: 2025-04-28T15:58:00Z
author_association: COLLABORATOR
diff_hunk: @@ -8,11 +8,11 @@ An embedded AMP system is characterized by multiple homogeneous and/or heterogen
 
     - The Xilinx MPSoC that has four ARM Cortex-A53, two ARM Cortex-R5, and potentially a number of MicroBlaze cores.
     - The NXP i.MX6SoloX/i.MX7d SoCs that utilizes ARM Cortex-A9 and ARM Cortex-M4F cores
-    - The Texas Instruments TI AM57x SoCs that have dual ARM Cortex A15, dual ARM Cortex M4, and C66x DSP cores.
+    - The Texas Instruments TI AM625 SoCs that contain ARM Cortex-A53, ARM Cortex-M4F, ARM Cortex-R5F, and PRU-ICSS cores.
path: protocol_details/asymmetric_mp.rst
user: login: arnopo
body: 1) @tnmysh : does we replace Xilinx by AMD?
2) contain or embed or have ? 
   to use same verb for NXP and XilinX Socs
 
3) Could you add missing ST Socs ( else I will do it in a separate PR)?
-  The ST stm32MP15x SoCs that embeded/contain/have ARM Cortex-A7 and ARM Cortex-M4 cores.

created_at: 2025-04-28T16:06:32Z
author_association: COLLABORATOR
diff_hunk: @@ -8,11 +8,11 @@ An embedded AMP system is characterized by multiple homogeneous and/or heterogen
 
     - The Xilinx MPSoC that has four ARM Cortex-A53, two ARM Cortex-R5, and potentially a number of MicroBlaze cores.
     - The NXP i.MX6SoloX/i.MX7d SoCs that utilizes ARM Cortex-A9 and ARM Cortex-M4F cores
-    - The Texas Instruments TI AM57x SoCs that have dual ARM Cortex A15, dual ARM Cortex M4, and C66x DSP cores.
+    - The Texas Instruments TI AM625 SoCs that contain ARM Cortex-A53, ARM Cortex-M4F, ARM Cortex-R5F, and PRU-ICSS cores.
path: protocol_details/asymmetric_mp.rst
user: login: tnmysh
body: @arnopo Yes I had same concern. We use AMD-Xilinx to refer old IP.
created_at: 2025-04-28T16:14:50Z
author_association: COLLABORATOR
diff_hunk: @@ -8,11 +8,11 @@ An embedded AMP system is characterized by multiple homogeneous and/or heterogen
 
     - The Xilinx MPSoC that has four ARM Cortex-A53, two ARM Cortex-R5, and potentially a number of MicroBlaze cores.
     - The NXP i.MX6SoloX/i.MX7d SoCs that utilizes ARM Cortex-A9 and ARM Cortex-M4F cores
-    - The Texas Instruments TI AM57x SoCs that have dual ARM Cortex A15, dual ARM Cortex M4, and C66x DSP cores.
+    - The Texas Instruments TI AM625 SoCs that contain ARM Cortex-A53, ARM Cortex-M4F, ARM Cortex-R5F, and PRU-ICSS cores.
path: protocol_details/asymmetric_mp.rst
user: login: tnmysh
body: But it's a nitpick. I don't see it as a blocker to merge this one. Lot of other place this change is needed.
created_at: 2025-04-28T16:16:04Z
author_association: COLLABORATOR
diff_hunk: @@ -8,11 +8,11 @@ An embedded AMP system is characterized by multiple homogeneous and/or heterogen
 
     - The Xilinx MPSoC that has four ARM Cortex-A53, two ARM Cortex-R5, and potentially a number of MicroBlaze cores.
     - The NXP i.MX6SoloX/i.MX7d SoCs that utilizes ARM Cortex-A9 and ARM Cortex-M4F cores
-    - The Texas Instruments TI AM57x SoCs that have dual ARM Cortex A15, dual ARM Cortex M4, and C66x DSP cores.
+    - The Texas Instruments TI AM625 SoCs that contain ARM Cortex-A53, ARM Cortex-M4F, ARM Cortex-R5F, and PRU-ICSS cores.
 
 These cores typically run independent instances of homogeneous and/or heterogeneous software environments, such as Linux, RTOS, and Bare Metal that work together to achieve the design goals of the end application. While Symmetric Multiprocessing (SMP) operating systems allow load balancing of application workload across homogeneous processors present in such AMP SoCs, asymmetric multiprocessing design paradigms are required to leverage parallelism from the heterogeneous cores present in the system.
 
-Increasingly, today’s multicore applications require heterogeneous processing power. Heterogeneous multicore SoCs often have one or more general purpose CPUs (for example, dual ARM Cortex A9 cores on Xilinx Zynq) with DSPs and/or smaller CPUs and/or soft IP (on SoCs such as Xilinx Zynq MPSOC). These specialized CPUs, as compared to the general purpose CPUs, are typically dedicated for demand-driven offload of specialized application functionality to achieve maximum system performance. Systems developed using these types of SoCs, characterized by heterogeneity in both hardware and software, are generally termed as AMP systems.
+Increasingly, today’s multicore applications require heterogeneous processing power. Heterogeneous multicore SoCs often have one or more general purpose CPUs (for example, ARM Cortex-A9 cores) with DSPs (such as TI C7x cores) and/or smaller CPUs (such as ARM Cortex-R5F) and/or soft IP (such as Xilinx MicroBlaze cores). These specialized CPUs, as compared to the general purpose CPUs, are typically dedicated for demand-driven offload of specialized application functionality to achieve maximum system performance. Systems developed using these types of SoCs, characterized by heterogeneity in both hardware and software, are generally termed as AMP systems.
path: protocol_details/asymmetric_mp.rst
user: login: glneo
body: Works for me, updated.
created_at: 2025-04-28T17:19:13Z
author_association: CONTRIBUTOR
diff_hunk: @@ -8,11 +8,11 @@ An embedded AMP system is characterized by multiple homogeneous and/or heterogen
 
     - The Xilinx MPSoC that has four ARM Cortex-A53, two ARM Cortex-R5, and potentially a number of MicroBlaze cores.
     - The NXP i.MX6SoloX/i.MX7d SoCs that utilizes ARM Cortex-A9 and ARM Cortex-M4F cores
-    - The Texas Instruments TI AM57x SoCs that have dual ARM Cortex A15, dual ARM Cortex M4, and C66x DSP cores.
+    - The Texas Instruments TI AM625 SoCs that contain ARM Cortex-A53, ARM Cortex-M4F, ARM Cortex-R5F, and PRU-ICSS cores.
path: protocol_details/asymmetric_mp.rst
user: login: glneo
body: Updated `Xilinx MPSoC` to `AMD Zynq UltraScale+ MPSoC` which seems to match your current branding, let me know if I didn't get that right.

Added the ST example (makes sense to have an example for each vendor with supported parts).

I've switched to using "utilize" to be consistent in all examples.
created_at: 2025-04-28T17:22:26Z
author_association: CONTRIBUTOR
diff_hunk: @@ -8,11 +8,11 @@ An embedded AMP system is characterized by multiple homogeneous and/or heterogen
 
     - The Xilinx MPSoC that has four ARM Cortex-A53, two ARM Cortex-R5, and potentially a number of MicroBlaze cores.
     - The NXP i.MX6SoloX/i.MX7d SoCs that utilizes ARM Cortex-A9 and ARM Cortex-M4F cores
-    - The Texas Instruments TI AM57x SoCs that have dual ARM Cortex A15, dual ARM Cortex M4, and C66x DSP cores.
+    - The Texas Instruments TI AM625 SoCs that contain ARM Cortex-A53, ARM Cortex-M4F, ARM Cortex-R5F, and PRU-ICSS cores.
path: protocol_details/asymmetric_mp.rst
user: login: tnmysh
body: Above works. Thanks.
created_at: 2025-04-28T18:07:33Z
author_association: COLLABORATOR

PR comments:
user: login: arnopo
created_at: 2025-04-30T07:40:33Z
body: @glneo just see that you push on top of `main_next`. Any reason to not integrate this in `main` branch ? 

author_association: COLLABORATOR
user: login: glneo
created_at: 2025-04-30T16:07:41Z
body: This PR had dependencies on the cleanup commits from Sipke that were only available on `main_next` at the time I posted this PR. If those commits are now in `main` then these can commits can be re-based on that. I can send a new PR targeting `main` if you do not do merges from `main_next` to `main`. Whatever is easier for you.
author_association: CONTRIBUTOR
user: login: arnopo
created_at: 2025-04-30T16:47:40Z
body: > This PR had dependencies on the cleanup commits from Sipke that were only available on `main_next` at the time I posted this PR. If those commits are now in `main` then these can commits can be re-based on that. I can send a new PR targeting `main` if you do not do merges from `main_next` to `main`. Whatever is easier for you.

done in https://github.com/OpenAMP/openamp-docs/pull/57
author_association: COLLABORATOR