Viewing SiGe Heterostructure for Qubits with Dislocation Theory
Authors: Liu Yujia , Gradwohl Kevin-Peter , Lu Chenhsun , Yamamoto Yuji , Remmele Thilo , Corley-Wiciak Cedric , Teubner Thomas , Richter Carsten , Albrecht Martin , Boeck Torsten 
Published: November 2022

SiGe/Si/SiGe heterostructure serves as one of the ideal semiconductor material system to build large scale electron spin qubits[1]. To further push the scalability and extend the coherence times of qubits built on SiGe/Si/SiGe heterostructures, there are several factors to improve, one of that is the lattice homogeneity of strained Si. One source of lattice homogeneity break down are dislocations. Due to the difficulties of high quality SiGe bulk crystal growth [2-3], relaxed SiGe is commonly grown on Si substrates by epitaxy. Viewing the SiGe/Si/SiGe heterostructure on native Si substrate, dislocations half loops form unavoidably because of the misfit between SiGe and the Si substrate. These dislocation half loops consist of threading segments extending through the whole heterostructure (figure 1 (a) and (c)) [4]. Due to the stress caused by the strained Si quantum well layer, the threading dislocations can be driven to glide, resulting in additional misfit segments in the lower interface of strained Si layer when the critical thickness is exceeded (figure 1 (b)) [5]. The extension of these misfit segments is blocked when they meet other perpendicular dislocations (figure 1 (d)) [6]. These misfit dislocations destroy strain uniformity and cause tilt inside the Si layer, resulting in a distortion of the valley splitting and ultimately, reducing the coherence time of qubits [7-8].
In this work, we present the observation of dislocations in SiGe/Si/SiGe heterostructures for qubit application by plan-view TEM (Figure 1 (right)). Here, the experimental observations agree with dislocation theory that threading dislocations (some are marked by (b)) will glide and elongate to have misfit segments (some are marked by (c)) in the interface when two requirements are fulfilled: misfit exists between epitaxial layer and substrate; critical thickness is exceeded. When the misfit dislocations meet perpendicular misfit dislocation line, they are blocked since the thickness is not enough to glide over it [6]. This is the case in figure 1 right marked by (d). Due to the misfit segment generation and blocking effects, the misfit dislocation spacing is proportional to the threading dislocation density both theoretically and experimentally. These misfit dislocations bring local strain field around them [9], which disturb the desired homogeneous strain field by misfit. Therefore, misfit dislocation generation needs to be suppressed if one wants to achieve homogeneous strain in Si thin layer in large scale.
According to Matthews-Blakeslee theory, one can avoid the formation of misfit dislocations in the Si interface by controlling the strained layer within the critical thickness. The critical thickness of Si on Si0.7Ge0.3 is calculated as 8.5 nm. The Electron channeling contrast images of Si with difference thickness 10 nm and 5 nm grown on high threading dislocation relaxed Si0.7Ge0.3 buffer at 700°C by reduced pressure chemical vapor deposition in Figure 2 are collaborating with theory: obviously misfit dislocation appear in 10 nm Si on relaxed Si0.7Ge0.3 (Figure 2 (left)) and no misfit dislocation are presented in 5 nm Si on Si0.7Ge0.3 (Figure 2 (right)).
Our results show that dislocation generation and movement needs to be taken into consideration to further develop SiGe heterostructure based qubits.

References

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Figure 1