bluuebunny/crossref_metadata_2025_split huggingface dataset:
A Drop-in High-Temperature Pb-Free Solder Paste that Outperforms High-Pb Pastes in Power Discrete Applications
Authors: Zhang Hongwen , Richmond Tyler , Lytwynec Samuel , Harter Tybarius , Prado Diego 
Published: May 2023

Sn-based high-temperature lead-free (HTLF) solder pastes have been developed as a drop-in solution to replace the high-Pb solder pastes in power discrete applications. The pastes were designed to combine the merits of two constituent powders. A SnSb-based Ag/Cu-containing high temperature powder, with the melting temperature above 320° C, was designed to maintain a high-temperature performance. A Sn-rich SnAgCu-Sb powder, with a melting temperature around 228° C, was added to the paste to enhance wetting and improve joint ductility. In the design, the final joint will have the low-melting phase (the melting temperature >228o 1. C) in a controllable quantity embedded into the high-melting SnSb matrix. HTLF-1, one of the designs, maintained the bond shear strength up to 15MPa, even around 290° C. Another design, HTLF-2, has a similar bond shear strength as Pb92.5/Sn5/Ag2.5 around 290° C, but exceeds substantially below 250° C. The power discrete components had been built with both HTLF solder pastes for both die-attach and clip-bond through the traditional high-Pb process, which demonstrated the drop-in processing compatibility. The components survived three additional SMT reflows (peak temperature of 260° 1. C) and passed moisture sensitivity level 1. This confirmed that the maintained joint strength (comparable to or stronger than high-lead), helped to keep the joint integrity within the encapsulated components in the following SMT process, even with the controlled quantity of the melting phases above 228° C. Both HTLF solder pastes outperformed Pb92.5/Sn5/Ag2.5 in the resistance from drain to source when power is on (RDS(on)), even after 1000cycles of TCT (-55/175o C), which is attributed to the intrinsic lower electrical resistivity of Sn of both HTLF pastes. Microstructural observation had shown no corner cracks for both die-attach and clip-bond joints after TCT.
Assembly Technology for FO-MCM with HBM in HPC Application
Authors: Liu Shuai-Lin , Kao Nicholas , Lin Vito , Shih Teny , Wang Yu-Po 
Published: May 2023

As the industry moves forward the age of more than Moore, the next generation of packaging moves forward high density of chiplet or die splitting package integration. Especially for high performance computing applications, the advance packaging is to provide the economic benefits to integrate multiple chiplet dies by silicon or organic interposer. Organic interposer is one of the alternative interface for die to die interconnection. It is well-known by FO-MCM to apply in chiplets integration and ASIC to Serdes dies integration by the homogeneous package integration concept. Due to the motivation of AI computing and HPC market growth, the trend is formed to integrate the packaged HBM into packaging module as the heterogeneous integration package (HIP). Both of the platforms, 2.5D with silicon interposer base and FO-EB with partial bridge die as interconnection media, have already launched to market in recent years. FO-MCM with purely organic interposer, is also discussed to implement into the heterogeneous integration field. The fully organic interposer can provide the flexible design in multiple RDL layers and line / space for HPC products. In this study, it is to address FO-MCM platform with purely organic interposer to implement heterogeneous packaging with integrated HBMs. Chip last approach in FO-MCM has the advantage to control RDL quality and take “known-good RDL” for top die cost rescuing. The fan-out RDL configuration is 4 layers with min, L/S of 2/2um. In the verification processes, based on the simulation analysis, the warpage and stress are optimized by material and under-fill selections in this discussion. The assembly results indicated the warpage and reliability validation passed by MSL4, TCT700x, uHAST96, and HTST1000hrs conditions.
A Physics-of-Failure Investigation of Flip Chip Reliability Based on Lead-Free Solder Fatigue Modeling
Authors: Brinlee Sean , Popelar, Ph.D. Scott 
Published: May 2023

Solder fatigue failure is one of the primary wear out failure mechanisms limiting reliability in microelectronics flip chip packaging. Solder fatigue failure occurs when a crack initiates and subsequently propagates through the entirety of the solder joint causing an electrical open. Crack initiation and propagation within a solder joint is caused by a cyclic application of stress, typically induced by exposure to temperature cycle excursions. Understanding the relationship between thermal cycling during product use and the accelerated thermal cycles used for testing is critical for predicting device reliability. MIL-PRF-38535 is the guiding aerospace and high reliability General Specification for Integrated Circuits (Microcircuits) Manufacturing that defines manufacturing, qualification and certification requirements for products to be listed on the Defense Logistic Agency’s (DLA) Qualified Manufacturer Listing (QML). Revision M of this standard, targeted for release in 2022, for the first time includes the use of lead-free solder alloys and organic substrates in the manufacturing of QML flip chip products. Hence there is a strong need to understand the physics-of-failure (PoF) concerning solder fatigue of lead-free flip chip assemblies. This paper demonstrates how finite element modeling can be used to predict solder fatigue for flip chip package assemblies. The authors have leveraged fatigue lives measured for different flip chip daisy chain package configurations, as well as fatigue lives defined and available in published papers. The authors then use the resulting lead-free solder fatigue model to perform parametric studies looking at the impact of different die sizes, underfill material properties, and package substrate materials. Comparisons are also made between eutectic Sn/Pb and lead-free fatigue life predictions. In addition, the authors demonstrate how solder fatigue predictions can be de-rated to use conditions in order to make reliability assessments for flip chip package assemblies. This ultimately leads to a better understanding of the impact of solder alloy and material selection on the mission life of aerospace and high reliability products that fall under the changes introduced in MIL-PRF-38535 Revision M.
Dielectric Property Effect with Dielectric Constant for Millimeter Wave Antenna Design
Authors: Shih Chih-Yuan , Lai Chia Chu , Wang Yu-Po 
Published: May 2023

The millimeter Wave transmission provides large bandwidth for data transfer which can satisfy the 5th generation mobile network architecture three main features: High data rate, Low latency, Mass Connectivity. Due to the high propagation attenuation characteristic of millimeter Wave, the Directivity of Antenna Array greatly increase the transmitting distance. The antenna dimensions are designed relative to wave length for better radiation performance. In millimeter Wave bands, the wave length is under millimeter scale which the antenna can be integrated to Package called AiP (Antenna in Package) This article will discuss the influence of substrate material property for antenna behavior. The Dielectric Constant (Dk) of air is closed to 1, use substrate with low DK for Antenna in Package results better expression to increase Gain and Wider bandwidth. However, the wave length is also affected by Dielectric Constant, since the wavelength is inversely proportional to the square root of the Dk, the substrate with high Dk reduces the AiP size obviously. In this paper, we will provide the comparison of antenna performance for Low/High Dk by Patch Antenna which consider single antenna and antenna array. In the simulation, the result shows the difference between High and Low Dk. When Dielectric Constant increases to 6 from 3, the width of single antenna can be reduced 30% and in contrast the peak gain is 15% higher with low Dk. For handheld devices such as smartphone, the internal space is limited, the size of antenna becomes critical. With the help of pattern design to enhance antenna performance. The high Dk material can be the choice of antenna for handheld devices.
Understanding Criticality of Thermal Performance in Thermal Interface Material Applications
Authors: Mohanty Dr. Rita 
Published: May 2023

Thermal interface material (TIM) is used in between a heat generating component (e.g., microelectronic packaging) and a heat spreading component (e.g., heatsink or cooling plate) to create an effective path for the heat (Phonon) to travel. Standard heatsink and heat generating component surfaces are generally uneven and rough. Actual metal to metal contact is no more than 10%. These surface imperfections allow air to get trapped in between the two surfaces. Air, being a thermal insulator, prevents the heat from dissipating and thus the device/system fails to maintain the required operating temperature to meet the reliability and functionality needed. Replacing the air with the “right” thermal interface material is the focus of this research. TIM is a composite of thermally conductive fillers dispersed in a polymer matrix. A higher filler loading causes a higher bulk conductivity. Common practice among design engineers is to utilize output from thermal modelling & simulation to specify a TIM with a certain thermal conductivity to meet the system’s thermal needs. What many engineers miss is the impact of thermal boundary resistance that could have significant effect on the overall thermal management of the design. This paper discusses how to characterize thermal performance of TIM beyond the bulk thermal conductivity. Boundary/interfacial thermal resistance and impedance will be explored as a function of TIM wetting ability, bond line thickness and surface conditions. This paper will discuss the importance of thermal conductivity, thermal resistance/impedance in a real application scenario.
Interfacial Diffusion Mechanism between ALD Al2O3 passivation/Cu in Direct Bonded Copper Substrate for Power Electronics
Authors: Son Kirak , Oh Aesun , Jeong Bongmin , Bae Hyun-Cheol 
Published: May 2023

Direct bonded copper(DBC) substrate requires surface treatments for oxidation prevention and adhesion enhancement to die-attachment. Conventional surface treatment, electroless nickel immersion gold (ENIG) has a cost and environmental problems, and immersion silver is sensitive to temperature and humidity. To solve these problems, this study presents the invention of aluminum oxide (Al2O3) passivation for DBC Cu pads, which meets the requirements of oxidation prevention and adhesion enhancement to die-attachment. Ultrathin Al2O3 passivation layers (~20nm) by atomic layer deposition(ALD) were coated on DBC Cu pads for replacing conventional ENIG and immersion silver surface finishes. This paper presents bondability and interfacial diffusion mechanism between ALD Al2O3 passivation/Cu in DBC substrate.
Investigation of CuAl IMCs Corrosion in Chloride Environment and its Prevention Strategy
Authors: Alptekin John , Gopalakrishnan Eswar , Kumaravel Dinesh Kumar , Antony Kevin , Langerak Hannah , Chyan Oliver , Mathew Varughese 
Published: May 2023

Abstract In most current wire-bonding applications, electrical interconnection is accomplished by fine Cu wires bonded to Al bonding pads microfabricated on an IC chip and external contact pins of the PCB board. Corrosion-related failure defects between the Cu wire and Al bond pad have been an ongoing un-trackable reliability issue plaguing the IC packaging industry for the past ten years, despite approaching ppb levels. Most prior studies hypothesized that intermetallic compounds (IMCs) like Cu9Al4, and CuAl2 were responsible for the observed acute wire-bond lift-off corrosion defects. Further studies sought to quantify the rates of corrosion of these IMCs and explore the effects of mitigation efforts of adding Pd, relevant to Pd-coated Cu wire-bonding. However, utilizing a novel real-time corrosion screening approach, we previously established that peripheral bimetallic contact between Cu ball-bonds and Al bond pads also plays a substantial role in the aggressive Al pad corrosion, induced by chloride ion penetration, which often leads to device failure. In this work, we further explored the role of IMCs corrosion in wire-bond lift-off failure utilizing fundamental electrochemical studies to quantify rates of galvanic-induced corrosion of IMCs within the broader context of an interconnected stack of Al bond pad, Cu-Al IMCs and Cu bonding wire. We also explored the use of a corrosion inhibitor to suppress the galvanic corrosion currents of Al bond pad, and Al-rich IMCs when electrically connected to Cu wire or Cu-rich IMCs.
Pre-applied underfill Technique for Fine-pitch Cu Pillar 3D Die Stacking to Enable 2.5/3D Advanced Packaging
Authors: Lay Nicholas , DiNapoli Nicholas , Rahim, PhD. Kaysar , Razmyar, PhD. Soheil , Holliday Melissa 
Published: May 2023

Increased performance and smaller form factor have driven demand for next generation architectures for integrated circuit 3D (IC) chip packaging. Advanced chip packaging technologies, such as 2.5D and 3D, offer greater chip compatibility and lower power consumption. Given these advantages, the adoption of advanced packaging is inevitable. One key driver is the copper pillar interconnect technology which offers several benefits such as improved electromigration resistance, improved electrical and thermal conductivity, simplified under bump metallization (UBM), and higher input/output (I/O) density. The fine pitches that copper pillars are capable of helps the technology to supersede solder bump technology, which reaches its lowest pitch around 40 microns. Finer pitches allow for a higher I/O count, which enhances performance. One of the major innovations has been 2.5/3D integration, a technique of vertically stacking multiple dies. However, traditional encapsulation techniques become challenging because traditional capillary underfill methods become restrictive as enlarged surface area is required in order to provide underfill protection on multiple surfaces. Here, we discuss a novel approach of vertically stacking dies with an integrated underfill process that minimizes the required area for underfilling in fine-pitch IC chip packages by creating a technique to apply underfill during thermo-compression bonding. This process offers a reliable method for vertical stacking of multiple chips and eliminates post-processing need for underfill application. Additionally, the process provides precise temperature control to both the substrate and die by using a mechanism of dual heat application. This is used in combination with a controlled variable application of compressive force on the package. Through fine-tuning of the force and temperature applied to the IC components, the bonding process can be tailored to simultaneously provide the ideal underfill curing conditions while forming solder joints. In this work, we used dies with 80µm pitch Cu pillar flip chip copper pillars with tin/silver caps bonded to Electroless Nickel and Immersion Gold (ENIG) pads in conjunction with commercially available pre-applied underfill material. The interconnect strength was determined though destructive shear testing and cross-sectional analysis to evaluate for the bonding quality and strength. A scanning electron microscope was used to visually examine joint properties, and X-ray analysis was conducted to review for underfill voiding. Finally, completed assemblies were thermal-cycled to evaluate for the degradation of joint strength and voiding of underfill under induced stress.
Chiplet Integration by Die-to-Die Pillar-Suspended Bridge
Authors: Kono Ichiro , Wakisaka Shinji , Hirota Toshiaki , Saitou Takashi , Ukawa Ken , Kurita Yoichiro 
Published: May 2023

Chiplet integration technology, which has the potential to scalable expand capabilities by integrating many integrated circuit (IC) chips with different manufacturing processes, structures, and functions while maintaining the data transfer bandwidth between IC chips, is attracting attention as a promising method to solve the problems such as slowdown of Moore’s law and the von Neumann bottleneck. Die-to-die bridge structures that connect dies via locally placed bridge chips with high-density interconnects is expected for scalable chiplet integration. We proposed novel die-to-die bridge architecture called “Pillar-Suspended Bridge (PSB)” that connects between chiplet and bridge via “MicroPillars” in molded form using panel-level manufacturing process. We successfully demonstrated proof-of-concept (PoC) through prototyping chiplets/bridge integrated module with 40 µm pitch MicroPillars using 300 mm × 300 mm panel-level manufacturing process. We confirmed fine-pitch die-to-die connection with MicroPillars and 20 µm thick bridge die by cross-sectional analysis of the module. We also evaluated warpage behavior of the PSB module in the reflow temperature range using shadow moiré method and confirmed warpage of less than 10 µm. Finally, we discussed scalability of this technology including external connections for Fan-Out RDL and optics.
Research in family medicine: Contribution, priorities, and barriers in Saudi Arabia
Authors: Al-Khaldi Yahia M. 
Published: May 2023

BACKGROUND:
Research in family medicine is important. The objectives of this study were to explore the contribution of family physicians, their attitudes and practice, and the barriers to research in family medicine in Saudi Arabia.

MATERIALS AND METHODS:
This study was conducted on Saudi family physicians in 2021. A self-administered questionnaire was sent to family physicians through WhatsApp and email. Information sought included demographic data, scientific profile, number of publications, reasons for conducting research, barriers to the conduct of research, attitudes and skills for the conduct of research, and priority areas of research. Data were analyzed using SPSS version 15. Descriptive statistics included mean and standard deviation for continuous variables and frequencies and percentages for categorical variables. Student’s t-test was used to compare the means of two groups of physicians. Chi-square test and logistic regression analysis were performed to determine the association between categorical variables.

RESULTS:
A total of 313 family physicians filled the questionnaire; majority were male (65%), were married (90%), and worked under the Ministry of Health (73%). The total number of publications since graduation was 1165 papers with an average of 3.8 papers per physician. More than 70% were interested in conducting research, and more than two-thirds considered research important to the advancement of family medicine. One-third of the family physicians were currently involved in conducting research, while 30% were supervising at least one research project. The top five areas of priority were chronic diseases, mental health, health promotion, quality of healthcare, and medical education/training; whereas the top five obstacles to the conduct of research were the lack of time, lack of research environment, lack of financial and technical support, and the absence of skills.

CONCLUSION:
Saudi family physicians make a good contribution to research. The researchers and research bodies should focus on identifying the priority areas for research in family medicine in the next few years and provide support to achieve some of the objectives of the National Vision of 2030.
Investigation of Computed Tomography Numbers on Multiple Imaging Systems using Single and Multislice Methods
Authors: Mehta Akash , Arrington Daniel , Ramachandran Prabhakar , Motley Ryan , Seshadri Venkatakrishnan , Anderson Darcie , Lehman Margot , Perrett Ben 
Published: May 2023

Aim:
The aim of this study is to determine the variation in Hounsfield values with single and multi-slice methods using in-house software on fan-beam computed tomography (FCT), linear accelerator (linac) cone-beam computed tomography (CBCT), and Icon-CBCT datasets acquired using Gammex and advanced electron density (AED) phantoms.

Materials and Methods:
The AED phantom was scanned on a Toshiba computed tomography (CT) scanner, five linac-based CBCT X-ray volumetric imaging systems, and Leksell Gamma Knife Icon. The variation between single and multi-slice methods was assessed by comparing scans acquired using Gammex and AED phantoms. The variation in Hounsfield units (HUs) between seven different clinical protocols was assessed using the AED phantom. A CIRS Model 605 Radiosurgery Head Phantom (TED) phantom was scanned on all three imaging systems to assess the target dosimetric changes due to HU variation. An in-house software was developed in MATLAB to assess the HU statistics and the trend along the longitudinal axis.

Results:
The FCT dataset showed a minimal variation (central slice ± 3 HU) in HU values along the long axis. A similar trend was also observed between the studied clinical protocols acquired on FCT. Variation among multiple linac CBCTs was insignificant. In the case of the water insert, a maximum HU variation of −7.23 ± 68.67 was observed for Linac 1 towards the inferior end of the phantom. All five linacs appeared to have a similar trend in terms of HU variation from the proximal to the distal end of the phantom, with a few outliers for Linac 5. Among three imaging modalities, the maximum variation was observed in gamma knife CBCTs, whereas FCT showed no appreciable deviation from the central value. In terms of dosimetric comparison, the mean dose in CT and Linac CBCT scans differed by <0.5 Gy, whereas at least a 1 Gy difference was observed between CT and gamma knife CBCT.

Conclusion:
This study shows a minimal variation with FCT between single, volume-based, and multislice methods, and hence the current approach of determining the CT-electron density curve based on a single-slice method would be sufficient for producing a HU calibrations curve for treatment planning. However, CBCTs acquired on linac, and in particular, gamma knife systems, show noticeable variations along the long axis, which is likely to affect the dose calculations performed on CBCTs. It is highly recommended to assess the Hounsfield values on multiple slices before using the HU curve for dose calculations.
Optimization of Radiation Shielding Considerations for Designing Halcyon Vault
Authors: Kaur Amanjot , Sahani G. , Shrivastava Ashish , Pawaskar Padmaja N. 
Published: May 2023

Purpose:
To determine the radiation shielding considerations for optimization of Halcyon vault shielding requirements.

Materials and Methods:
The primary and leakage workloads were estimated using actual clinical treatment planning and treatment delivery data acquired from three busy operational clinical Halcyon facilities. The effective use factor was determined based on a newer approach proposed in this paper using the percentage of patients treated with different treatment techniques. The transmission factor of the primary beam block, maximum head leakage, and patient scatter fractions around the Halcyon machine were experimentally determined. The first tenth-value layer (TVL1) and equilibrium tenth-value layer (TVLe) for 6 MV - flattening-filter-free (FFF) primary X-ray beam for ordinary concrete were measured.

Results:
The primary and leakage workloads are estimated as 1 × 105 cGy/wk and 3.1 × 105 cGy/wk at 1 m respectively. The effective use factor is found as 0.114. The primary beam-block transmission factor is determined as 1.7 × 10−4 at 1 m distance from isocenter along the central beam axis. The maximum head leakage is noted as 6.23 × 10−4. The patient scatter fractions are reported for various planar angles around the Halcyon machine at a radial distance of 1 m in a horizontal plane passing through isocenter. The TVL1 and TVLe of 6 MV-FFF X-ray beam energy for ordinary concrete are found to be 33 and 29 cm, respectively.

Conclusion:
Using experimentally determined shielding considerations, the optimized vault shielding requirements for the Halcyon facility are calculated and a typical layout drawing is proposed.