bluuebunny/crossref_metadata_2025_split huggingface dataset:
Design of mask recognition and temperature monitoring system
Authors: Zhou LiLi , Jiang Feng , Li YeJie , liu JiaYing , Zhang JiaShuo , Gu Yang 
Published: June 2023

Abstract
This design is based on the STM32F103C8T6 mask recognition and temperature monitoring system, mainly including the mask recognition module based on the K210 chip, non-contact infrared temperature sensor module based on the ATmega328P chip, liquid crystal display module, infrared tube sensor module and buzzer module. When the infrared tube sensor senses the measured target, the system starts to supply power to ATmega328P. The infrared temperature measurement sensor module MLX90164 is used to measure the temperature of the target. At the same time, the temperature data is displayed on the LCD1602 display screen. If it exceeds the predetermined value, an alarm will be issued. When the temperature is normal, the system starts to supply power to K210, start the camera, lock the face position, identify whether the target is wearing a mask, and display the measured results through the 2.4-inch TFT screen. If the mask is worn correctly, the face frame will turn green. Through the software program, the three chips are mobilized for coordinated operation, the target body temperature is measured by using the temperature compensation algorithm, and the mask recognition is carried out by using the YoloV2 algorithm. The hardware design and software program design are improved, and finally, the material object is made. After repeated debugging of the real object, the expected effect is finally achieved. After gradual product improvement, it will be widely used in the daily monitoring of mask wearing identification and body temperature detection in the normalization of epidemic prevention and control in public places in the future.
A fast and low power consumption crystal oscillator driving circuit design.
Authors: Zhu Hongzhang , Wang Zhiliang , Tan Shuxin 
Published: June 2023

Abstract
Aiming at the disadvantage of high-power consumption and a long start-up time of the traditional Pearce driver circuit, a 32.768KHz crystal driver circuit is designed, which can effectively reduce power consumption and ensure a fast start. The simulation results show that, under the voltage of 1.1 V, the circuit vibration time is 0.5 ms, the output amplitude is about 250 mV, the static current is 48.6 nA, and the power consumption is 53.5nW. This drive circuit has the characteristics of a fast start, stable output, and low power consumption. It can be used as a clock input module in a digital-analog hybrid circuit.
An Enhanced Anti-surge Circuit for New Energy Vehicle Electronics System
Authors: Wu Huizhen , Chen Qunchao 
Published: June 2023

Abstract
This paper presents an input surge protection circuit for automotive electronics systems with an adjustable overvoltage protection threshold suitable for high input voltage applications. Compared with the conventional overvoltage protection circuit, it boasts a new high-voltage bandgap reference circuit design without pre-regulation, which takes up less space and can be used on a limited PCB board, expanding the practical application range of the chip. The gate protection circuit can monitor the gate-source voltage of the power MOS in real-time and control the charge pump’s operating mode to improve the system’s safety. The design and simulation of the circuit adopt the 0.18 μm 5V/25V BCD process. The simulation results show that the bandgap reference voltage varies by only 0.38 mV in the input voltage range of 3.5 V-25 V. The quiescent current is 146 uA at 5 V supply voltage. The power MOS can be turned on quickly within 50 us. The overvoltage response time is 599 ns, permitting the circuit to be shut down when a surge occurs.
Passive matrix Micro-LED display driven by STM32 microcontroller using a two-wire serial transmission method
Authors: Chen Shaohang , He Shuang , He Jun , Zhang Zhi , Xia Zhiming , Huang Zhonghang , Zhang Kaixin , Lin Chang , Su Anjun , Chen Nianrui , Zhou Jun , Yan Qun , Sun Jie 
Published: June 2023

Abstract
In this study, the STM32 microcontroller is used to drive a passive matrix (PM) Micro-LED through two-wire serial transmission and row-column integration. STM32 exhibits superior properties, including simple-to-operate, cost-friendly, and flexible programming. Moreover, it has a lower cost and more straightforward implementation for testing the quality of the device and realizing the graphics. In this design, the connection between the STM32 and the PM array is realized by an LED driver board and flexible printed circuit (FPC) structure. The two-wire serial protocol and row-column integration are adopted, which not only optimizes the circuit structure but also avoids coupling problems. Compared to the existing structures, it is more concise that only four connecting wires are required to transmit data in display devices of any resolution. Besides, the problem of graphics distortion is solved through two buffers to form a data handshake. Using this method, the blue PM array, which has a resolution of 48 × 48, a refresh rate of 60 Hz, a pixel size of 300 μm, and a luminous area of 50 μm, is successfully realized. In addition, p-metal fractures caused by the bulge in the p-lines are also resolved by adding the GaN as a raised substrate.
Ultrafast High Voltage Pulse Generator Based on Power MOSFETs Delay Push-pull Structure
Authors: Chen Jiajie , Wang Jiaheng , Luo Qiuyan , Lin Kaixuan , Wang Dong , Cai Houzhi , Liu Jinyuan 
Published: June 2023

Abstract
In this paper, an ultrafast high voltage pulse generator based on power MOSFETs delay push-pull structure is designed. The two complementary power MOSFETs are connected in the push-pull circuit and driven by the low-power MOSFETs separately. The output ultrafast high-voltage pulse amplitude is +30 V ~ -200 V, and the front edge and back edge times of the pulse are 5 ns and 4 ns, respectively. The width and frequency of the output pulse are controlled by the external trigger input signal. The shortest output pulse width is 12 ns and the maximum operating frequency is 100 kHz while the load is 10 pF. The delay conduction method of power MOSFETs is helpful to reduce power dissipation and improve the reliability of the circuit at a high operating frequency.
Design of a multi-modulus divider with a wide frequency dividing range and low power consumption
Authors: Zhao Minxiong , Huang Jiwei 
Published: June 2023

Abstract
A method of moduli expansion was presented to address the issue of wrongly altering the divider ratio at the boundary of the modulus expansion when multi-mode dividers (MMD) were utilized in fractional-N phase locked loops (PLLs). The multi-mode frequency divider was designed as the cascade of the 2/3 frequency dividers with an RS control terminal. Compared to traditional methods, only one OR gate is required for each modulus expansion, reducing the chip area. The 2/3 divider was designed using a True Single-Phase Clocked (TSPC) D-trigger structure, and each D-trigger uses a logic control technique with clearing and setting the number. An eight-stage multi-mode frequency divider with modulus expansion was developed using SMIC 55 nm CMOS technology. The simulation results demonstrated the large frequency divider range of the multi-mode frequency divider and its ability to carry out consistent switching operations over the 8–511 frequency divider range. The power consumption is 66.04W at a supply voltage of 1V, an input frequency of 2GHz, and an output frequency of 250MHz.
Trap characterization of GaN High-electron-mobility Transistors Based on the Transient Drain Voltage
Authors: Pan Shijie , Zhou Lixing , You Binyu , Bai Kun , Lu Xiaozhuang 
Published: June 2023

Abstract
In this work, we presented a comprehensive investigation of the trapping effect in the GaN-based high-electron-mobility transistors (HEMTs) under the negative gate-source voltage condition. The trapping mechanisms in the OFF state were analyzed and the trapping behaviors were characterized using the pulsed measurements preliminarily. Specifically, the transient drain-source voltage curves under a certain filling condition were monitored to reflect the trapping effect in the OFF state. The spectra of time constant and differential amplitude were combined to obtain the information on traps. Three traps with activation energys of 0.467, 0.552, and 0.067 eV were characterized using the transient drain voltage curves under different temperatures. The trap characterization methods may be useful for the further study of the trapping behaviors and can be helpful for the improvement of the reliability of the devices.
SnO2-Based Optoelectronic Synapses for Artificial Visual Applications
Authors: Wang Jinyong , Leng Yangming , Zhao Tiancheng , Li Chunmei , Gu Deen , Li Wei 
Published: June 2023

Abstract
Optoelectronic synapse units have been drawing a strong interest lately due to their obvious crucial role in the evolution of optoelectronic integration-based neuromorphic computing. Here, optoelectronic synaptic devices are fabricated based on stannic oxide (SnO2) film and with the structure of ITO/SnO2/P++-Si. Using optical stimulation, we found that the synaptic sandwich devices are highly responsive and exhibit fast switching behavior. These optically stimulated synaptic devices accurately could imitate synaptic functions, including paired-pulse facilitation (PPF), excitatory postsynaptic current (EPSC), learning experience behavior, and the conversion from short-term memory (STM) to long-term memory (LTM). The EPSC of such devices could be tuned via light, contributing to an LTM-based analog of optical memory and enhancing learning across affective situations. The work presented here advances the research and manufacture of optoelectronic synapses based on the SnO2 thin films for neuromorphic computing applications.
A thermal resistance detection of heteromorphic devices using SiC diode’s temperature-sensitive parameters
Authors: Qin Junhua , Feng Shiwei , Feng Zhihong , Li Xuan , Bai Kun , Zhang Tiemin 
Published: June 2023

Abstract
Certain special-shaped devices, such as traveling wave tubes, can be called hollow cylindrical structures in aerospace engineering and other applications. However, the structural complexity of such devices means that their heat dissipation characteristics cannot be measured directly using conventional techniques. The present work describes a method to directly measure such devices’ thermal resistance by semiconductors’ temperature-sensitive parameters. We prepared a special probe to collect transient temperature response, and the differential structure-function curves were obtained by processing the data using the structure-function method. We demonstrate that this method can effectively characterize cylindrical devices’ thermal resistance and detect differences caused by different processes and structures.
Design and implementation of microcirculation cooling device for microelectronic devices based on electrostatic force
Authors: Zhang Bohan , Zhang Yamin , Zhang Meng , Cheng Haoxuan 
Published: June 2023

Abstract
This paper presents the design of a cooling device for microelectronic device applications. The proposed device uses parallel plate capacitor electrical bias to generate an electrostatic force that acts on the coolant to enable control of the coolant flow in the radiator. Through a combination of the structural design of the device and the application of an electrical bias on both sides of multiple parallel plate capacitor electrodes, the generation of a radiator coolant eddy current is realized, and the functions of cooling and heat transfer are realized for microelectronic devices placed on the surface of the base platform. Based on this principle, a finite element multi-physical field simulation was used to simulate the flow heat transfer function of the coolant in the device under the action of the electrostatic force and the effects of the channel diameter, channel spacing, voltage, and liquid storage tank depth on the peak coolant velocity were studied. In addition, 3D printing technology was used to fabricate the heat dissipation device. The heat dissipation device was tested by charging, with a basic realization of the function of controlling the cooling liquid flow in the heat dissipation device demonstrated. The device realizes radiator coolant flow rate control through voltage control and has characteristics that include low energy consumption and a convenient and compact structure.
Frequency Band Broadening of Piezoelectric Ultrasonic Transducer Using Multifrequency Impedance Network Coupling Method
Authors: Xin Shouchun , Sun Changhe 
Published: June 2023

Abstract
This paper addresses the bandwidth problem of ultrasonic transducers, and a frequency band broadening technique based on multi-frequency impedance network coupling is proposed. Based on the extended BVD circuit model, three coupled circuits including one first-order and two second-order are designed. The inductor-capacitor value and series-parallel connection method are reasonably chosen for tuning to achieve multi-peak resonance to improve the operating bandwidth of the transducer. The results show that for each order increase of the LC circuit, the resonance peak will increase by one, and the bandwidth will be broadened accordingly. Finally, the bandwidth of the first-order coupling circuit is increased by 50.45% and the bandwidth of the second-order coupling circuit is increased by 88.29%.
FPGA-Based Implementation of Reverse Electrical Pulse Stress and Measurement system for Gallium Nitride High-Electron-Mobility Transistors
Authors: Lu Xiaozhuang , Zhou Lixing , Yao Zhanwu , Qin Junhua 
Published: June 2023

Abstract
This paper presents a pulse electrical stress and measurement system of GaN high-electron-mobility transistors based on FPGA to apply the electrical stress accurately in the form of square wave pulses and switch to the measuring state in time. The design processes for the FPGA program, software system, and hardware circuit are discussed. The system uses a bipolar isolated gate driver to apply pulses of electrical stress to the gate of GaN HEMTs. The mode switch circuit is used to switch from “stress mode” to “measuring mode” to realize the measuring of electrical parameters of the device under test after stress. The system can achieve electrical pulse stress and assist in analyzing the degradation mechanism of GaN HEMTs.
A Transfer Function Analytical Method Suitable for Manual Calculation Based on the TTC
Authors: Zheng Libo , Xie Haowei , Ji Hualong , Guo Yufeng , Liu Yi 
Published: June 2023

Abstract
This paper proposes a new method for analyzing transfer functions based on Generalized Time- and Transfer-Constants (TTC). First, we briefly review and outline the history of manual calculation methods for transfer functions. Second, we focus on the general properties of TTC. Then, a new analytical method based on the TTC that is more applicable to manual calculations is presented in this article. Finally, the application of this method is illustrated with some typical examples, followed by a conclusion.
Efficient Allocation of Resource for Energy Optimization in Heterogeneous V2X with Imperfect CSI
Authors: Chen Can , Huang Jinhang , Zhang Nan , Cui Haixia 
Published: June 2023

Abstract
In heterogeneous V2X networks, the channel state information (CSI) undergoes rapid fluctuations owing to the dynamic mobility of vehicles. Therefore, it is important to redevelop a more suitable channel description for resource allocation in vehicular communications. In this paper, we concentrate on the effect of imperfect CSI with practical channel description to achieve maximum energy efficiency (EE) of vehicle-to-vehicle (V2V) links by jointly performing power-control and channel-allocation. A fractional nonlinear programming model is constructed to address power-control while satisfying link reliability and interference threshold requirements. Since the target function and restrictions are quasi-concave, the problem can be tackled via Dinkelbach and Lagrangian duality. In addition, to further improve the spectrum utilization for channel-allocation, we propose an improved Gale-Shapley strategy so that multiple V2V pairs can reuse the spectrum resource of a single cellular vehicular user (C-VUE). Finally, the numerical experiments simulations validate the performance of our offered strategy and the employed strategy effectively boosts energy-efficiency in dynamic communication environments.
A Single-Ended 9T SRAM Cell With Improved Noise Margin for Low-Power Applications Used in LEDoS
Authors: Wang Yue , Guo Aiying , Qin Shiwei , Zhang Jianghua , Wang Fei , Ran Feng 
Published: June 2023

Abstract
As a silicon-based microdisplay for Augment reality (AR), the high power dissipation of digital CMOS driver is a significant barrier to approaching the higher performance of microdisplay. In this paper, a new low-power SRAM cell with a single bitline is proposed to reduce the power dissipation of digital CMOS drivers. Compared with conventional differential 6T SRAM cell, the proposed 9T uses the single-ended read/write and read/write separation technology by reducing bitline and adding word lines, and write/read static noise margin (WSNM/RSNM) has been improved while the power dissipation is reduced effectively by stacking effect. When VDD is 0.8 V, the proposed cell achieves 1.4× and 2.2× improvement in WSNM and RSNM compared to D6T. Besides, the proposed cell consumes 1.4× less power during hold mode compared to D6T at VDD=0.8 V.
A Pseudo-LDO-Assist Charge-Control SIMO Buck DC-DC with 0.02 mV/mA Cross Regulation
Authors: Liu Yuyang , Wu Zhaohui , Li Bin , Zheng Yanqi 
Published: June 2023

Abstract
Cross-regulation (CR) suppression is a challenge in single-inductor-multiple-output (SIMO) DC-DC. The pseudo-LDO-assist technology is presented to decrease CR of charge-control SIMO Buck DC-DC in this paper. With the fast current compensation of the proposed pseudo-LDO, the CR of the last DC-output, which used to be the largest CR in traditional charge-control SIMO, could be suppressed to the same level as that of the other DC-outputs regulated by charge control. Experimental results show that the largest CR of the proposed SIMO Buck DC-DC is 0.02 mV/mA in 488 mA load transient, which shows a 42.86% improvement compared to the existing charge-control SIMO.
Suppression of Crosstalk in Quantum Computers Based on Instruction Exchange Rules and Duration
Authors: Liu Renjie , Guan Zhijin , Cheng Xueyun , Zhu Pengcheng , Feng Shiguang 
Published: June 2023

Abstract
Crosstalk is the main noise source in quantum computing devices. In quantum computation, the parallel execution of multiple instructions will cause crosstalk, destroy the quantum state, and cause the program to fail to execute correctly. Overcoming the influence of crosstalk is a key requirement for quantum error correction and large-scale fault-tolerant quantum computing. This paper presents a method to suppress crosstalk in quantum computers based on multiple instruction exchange rules and duration. Several Benchmarks experiments verify the effectiveness of the proposed method. Compared with the prior techniques, the fidelity of the proposed method is improved by 15.97% on average.
Design of the vector floating-point unit with high area efficiency
Authors: Lai Shuhao , He Xiaoyong 
Published: June 2023

Abstract
With the development of the information age, there is an increasing trend towards mixed precision and vector operations in floating point arithmetic. Traditional floating-point arithmetic is usually implemented using multiple modules to ensure the required speed. Still, this approach significantly increases area and reduces area efficiency, resulting in the wastage of hardware resources. This paper focuses on optimizing speed and area to improve the area’s efficiency. The proposed floating-point unit designed can perform half-precision, single-precision, and double-precision floating-point operations. Under the TSMC 7 nm process, its maximum operating frequency is increased by 5%–37%, the area is reduced by 33%–58%, and area efficiency is increased by 63%–144%.
A Novel Super-junction MOSFET with Enhanced Switching Performance and Ruggedness
Authors: Wu Jiale , Zhou Houyong , Chen Yi 
Published: June 2023

Abstract
In this paper, a novel super-junction (SJ) MOSFET with enhanced switching performance and ruggedness is proposed and investigated by the method of TCAD simulations. An N+/P- polysilicon junction gate electrode and separation layer between P-base and P-pillar are introduced to the trench SJ-MOSFET. For the N+/P- junction trench gate, the P- polysilicon located in the bottom of the trench plays the role of insulating layer, which efficiently reduces the gate charge (QG), thus increasing the switching speed and reducing the switching loss. The P-pillar does not contact with P-base so a depletion region is formed and the gate to drain charge (QGD) is reduced. Besides, the specific separation layer also inhibits the activation of the parasitic bipolar transistor (BJT) to improve the unclamped inductive switching (UIS) capability. The results of the simulation reveal that the proposed SJ-MOSFET is better in switching performance and ruggedness.
Design of OTN Time-division Conversion Method Based on Time-to-space Transposition Matrix
Authors: He Qinyun , Zhang Rui 
Published: June 2023

Abstract
With the increasing informatization and digitalization of modern society, the commercialization of Optical Transport Network is more and more extensive. In order to meet the requirements of 5G bearers with low delay and improve the OTN transmission efficiency, it is necessary to design an efficient slot to time processing method. This paper designs the multiplexing mapping structure and timeslot processing method of ODUk, takes OPU25 demultiplexing as the research and explanation object, loads 4-channel OPU25 timeslot data into the first-level RAM, reorganizes the timeslot data based on the T2S transpose matrix, writes it into the second-level RAM, and uses barrel shift to avoid RAM address conflicts. Then the timeslot data are read as an address index, and finally, the time division data are output to complete the conversion of the timeslot data to the time-division data of the lower-order channel. The experimental results show that the conversion of timeslot data to low order channel time-division data can reduce the difficulty of RTL design and implementation, and has high conversion efficiency.
SiC MOSFET Trap Characterization Based on the Self-built Test Platform
Authors: Duan Kun , Jiang Shan , Hao Yiming , Zhang Yamin 
Published: June 2023

Abstract
The interface state of SiC/SiO2 is one of the key factors limiting the reliability and performance of SiC MOSFETs. In this paper, we built a dedicated detrap measurement platform to improve the accuracy of trap measurement. Based on the excellent voltage switching time of this platform, the entire voltage switching process can be controlled within 1 µs, and the time resolution is also improved. The original millisecond-level acquisition accuracy is improved to a microsecond level, and the identification range of traps is expanded. The traps were extracted by using the transient current method based on the Bayesian deconvolution algorithm. With this approach, we investigated the trapping mechanism of SiC MOSFETs and mainly characterized the trap locations, energy levels, and trapping time constants. The findings revealed the existence of three different types of traps/defects, Dp1, Dp2, and Dp3, with activation energies of 0.28 eV, 0.035 eV, and 0.084 eV, respectively. The non-destructive characterization of SiC MOSFET defects can be realized through the test platform and Bayesian deconvolution algorithm in this paper, which brings great convenience for trap characterization.