bluuebunny/crossref_metadata_2025_split huggingface dataset:
On Generating Optimal Signal Probabilities for Random Tests: A Genetic Approach
Authors: Srinivas M. , Patnaik L. M. 
Published: September 2007

Genetic Algorithms are robust search and optimization techniques. A Genetic Algorithm based approach for determining the optimal input distributions for generating random test vectors is proposed in the paper. A cost function based on the COP testability measure for determining the efficacy of the input distributions is discussed. A brief overview of Genetic Algorithms (GAs) and the specific details of our implementation are described. Experimental results based on ISCAS‐85 benchmark circuits are presented. The performance of our GAbased approach is compared with previous results. While the GA generates more efficient input distributions than the previous methods which are based on gradient descent search, the overheads of the GA in computing the input distributions are larger.To account for the relatively quick convergence of the gradient descent methods, we analyze the landscape of the COP‐based cost function. We prove that the cost function is unimodal in the search space. This feature makes the cost function amenable to optimization by gradient‐descent techniques as compared to random search methods such as Genetic Algorithms.
DP‐FPGA: An FPGA Architecture Optimized for Datapaths
Authors: Cherepacha Don , Lewis David 
Published: September 2007

This paper presents a new Field‐Programmable Gate Array (FPGA) architecture which reduces the density gap between FPGAs and Mask‐Programmed Gate Arrays (MPGAs) for datapath oriented circuits. This is primarily achieved by operating on data as a number of identically programmed four‐bit slices. The interconnection network incorporates distinct sets of resources for routing control and data signals. These features reduce circuit area by sharing programming bits among four‐bit slices, reducing the total number of storage cells required.This paper discusses the requirements of logic blocks and routing structures that can be used to implement typical circuits containing a number of regularly structured datapaths of various sizes, as well as a small number of irregularities. It proposes a specific set of logic block architectures and analyzes it empirically. Experimental results show that the block with the smallest estimated area contains the following features: a lookup table with four read ports, a dedicated carry chain using a bidirectional four‐bit carry skip circuit, a four‐bit
register with enable and direct input capabilities, and four three‐state buffers. Further estimates of implementation area predict that the area of a design′s datapath can be reduced by a factor of approximately two compared to a conventional FPGA through the use of programming bit sharing.
VLSI Testing for High Reliability: Mixing IDDQ TestingWith Logic Testing
Authors: Hwang S. , Rajsuman R. 
Published: September 2007

In this paper, we examine the effectiveness of combined logic and IDDQ
testing to detect
stuck‐at and bridging faults. The stuck‐at faults are detected by the logic test and IDDQ

testing detects bridging faults.Near minimal stuck‐at test sets are used for this combined logic and IDQQ test environment.
These near minimal stuck‐at test sets are generated using standard test programs, while
using collapsed fault lists. We examined ISCAS ′85 and ISCAS ′89 benchmark circuits
under this combined test environment. A comparison is given for the fault coverage obtained
under this combined test environment with other studies based on pure logic test and IDDQ

test. Also, the results of IDDQ
based test sets (vectors generated specifically for IDDQ
testing)
are compared with that of stuck‐at test sets. Finally, we present a case study on a microprogrammed
processor using a functional test set to detect bridging faults in IDDQ
testing.
On Rectilinear Distance‐Preserving Trees
Authors: Téllez Gustavo E. , Sarrafzadeh Majid 
Published: September 2007

Given a set of terminals on the plane N = {s, ν1, …, νn}, with a source terminal s, a
Rectilinear Distance‐Preserving Tree (RDPT) T(V, E) is defined as a tree rooted at s,
connecting all terminals in N. An RDPT has the property that the length of every source
to sink path is equal to the rectilinear distance between that source and sink. A Min‐
Cost Rectilinear Distance‐Preserving Tree (MRDPT) minimizes the total wire length
while maintaining minimal source to sink linear delay, making it suitable for high
performance interconnect applications.This paper studies problems in the construction of RDPTs, including the following
contributions. A new exact algorithm for a restricted version of the problem in one
quadrant with O(n2) time complexity is proposed. A novel heuristic algorithm, which
uses optimally solvable sub‐problems, is proposed for the problem in a single quadrant.
The average and worst‐case time complexity for the proposed heuristic algorithm are O(n3/2) and O(n3), respectively. A 2‐approximation of the quadrant merging problem is proposed. The proposed algorithm has time complexity O(α2T(n) + α3) for any constant
α > 1, where T(n) is the time complexity of the solution of the RDPT problem on one
quadrant. This result improves over the best previous quadrant merging solution which
has O(n2T(n) + n3) time complexity.We test our algorithms on randomly uniform point sets and compare our heuristic
RDPT construction against a Minimum Cost Rectilinear Steiner (MRST) tree
approximation algorithm. Our results show that RDPTs are competitive with Steiner
trees in total wire‐length when the number of terminals is less than 32. This result makes
RDPTs suitable for VLSI routing applications. We also compare our algorithm to the
Rao‐Shor RDPT approximation algorithm obtaining improvements of up to 10% in
total wirelength. These comparisons show that the algorithms proposed herein produce
promising results.
Boundary Condition for the Modeling of Open‐circuitedDevices in Non‐equilibrium
Authors: Parks Joseph W. , Brennan Kevin F. 
Published: September 2007

A boundary condition specifically designed to model open‐circuited devices in a
macroscopic device simulator is introduced. Other simulation techniques have relied on
an external circuit model to regulate the current flow out of a contact thus allowing the
potential to remain the controlled variable at the boundary. The limitations of these
methods become apparent when modeling open‐circuited devices with an exceptionally
small or zero output current. In this case, using a standard ohmic‐type Dirichlet
boundary condition would not yield satisfactory results and attaching the device to an
arbitrarily large load resistance is physically and numerically unacceptable. This
proposed condition is a true current controlled boundary where the external current is
the specified parameter rather than the potential. Using this model, the external current
is disseminated into electron and hole components relative to their respective
concentration densities at the contact. This model also allows for the inclusion of
trapped interface charge and a finite surface recombination velocity at the contact.
An example of the use of this boundary condition is performed by modeling a silicon
avalanche photodiode operating in the flux integrating mode for use in an imaging
system. In this example, the device is biased in steady‐state to just below the breakdown
voltage and then open‐circuited. The recovery of the isolated photodiode back to its
equilibrium condition is then determined by the generation lifetime of the material, the
quantity of signal and background radiation incident upon the device, and the impact
ionization rates.
Concurrency Preserving Partitioning Algorithm forParallel Logic Simulation
Authors: Kim Hong K. , Jean Jack 
Published: September 2007

A partitioning algorithm for parallel discrete event gate‐level logic simulations is
proposed in this paper. Unlike most other partitioning algorithms, the proposed
algorithm preserves computation concurrency by assigning to processors circuit gates
that can be evaluated at about the same time. As a result, the improved concurrency
preserving partitioning (iCPP) algorithm can provide better load balancing throughout
the period of a parallel simulation. This is especially important when the algorithm is
used together with a Time Warp simulation where a high degree of concurrency can lead
to fewer rollbacks and better performance. The algorithm consists of three phases and
three conflicting goals can be separately considered so to reduce computational
complexity.To evaluate the quality of partitioning algorithms in terms of preserving concurrency,
a concurrency metric that requires neither sequential nor parallel simulation is
proposed. A levelization technique is used in computing the metric so to determine
gates which can be evaluated at about the same time. A parallel gate‐level logic
simulator is implemented on an INTEL Paragon and an IBM SP2 to evaluate the
performance of the iCPP algorithm. The results are compared with several other
partitioning algorithms to show that the iCPP algorithm does preserve concurrency
pretty well and reasonable speedup may be achieved with the algorithm.
Tabu Search: A Meta Heuristic for Netlist Partitioning
Authors: Areibi Shawki , Vannelli Anthony 
Published: September 2007

The main goal of the paper is to explore the effectiveness of a new method called Tabu
Search [1] on partitioning and compare it with two techniques widely used in CAD tools
for circuit partitioning i.e., Sanchis Interchange method and Simulated Annealing, in
terms of the running time and quality of solution. The proposed method integrates the
well known iterative multi‐way interchange method with Tabu Search and leads to a
very powerful network partitioning heuristic. It is characterized by an ability to escape
local optima which usually cause simple descent algorithms to terminate by using a
short term memory of recent solutions. Moreover, Tabu Search permits backtracking to
previous solutions, which explore different directions and generates better partitions.The quality of the test results on MCNC benchmark circuits are very promising in
most cases. Tabu Search yields netlist partitions that contain 20%–67% fewer cut nets
and are generated 2/3 to (1/2) times faster than the best netlist partitions obtained by
using an interchange method. Comparable partitions to those obtained by Simulated
Annealing are obtained 5 to 20 times faster.
Test Generators Need to be Modified to Handle CMOS Designs
Authors: Savir Jacob 
Published: September 2007

CMOS designs have some unique properties that prevent existing test generators from
computing a test vector for a fault when one might exist. The problem lies in the
premises laid out on what it takes to detect a stuck‐at fault. The basic premise that states
that it is required to set a line to 0(1) in order to detect a stuck‐at 1(0) fault, and then
propagate the error to an observable point, needs to be re‐examined. This is due to the
existence of indeterminate states throughout the logic. The paper distinguishes between
the traditional test vector (here called a hard-detect), and a potential test vector (here
called a soft-detect). Our proposed test set is the union of hard and soft‐detects. We also
re‐examine the issue of redundancy and show that it needs to be re‐defined in order to
comply with CMOS technology behavior.This paper shows several examples to illustrate the problem; describes what it takes in
order to remedy it; proposes possible enhancements to existing test generation
algorithms, and outlines the risks faced in the event that no correcting steps are taken.
Low Power Digital Multimedia Telecommunication Designs
Authors: Cho Koon-Shik , Cho Jun-Dong 
Published: September 2007

The increasing prominence of wireless multimedia systems and the need to limit power
capability in very‐high density VLSI chips have led to rapid and innovative
developments in low‐power design. Power reduction has emerged as a significant
design constraint in VLSI design. The need for wireless multimedia systems leads to
much higher power consumption than traditional portable applications. This paper
presents possible optimization technique to reduce the energy consumption for wireless
multimedia communication systems. Four topics are presented in the wireless
communication systems subsection which deal with architectures such as PN
acquisition, parallel correlator, matched filter and channel coding. Two topics include
the IDCT and motion estimation in multimedia application.These topics consider algorithms and architectures for low power design such as using
hybrid architecture in PN acquisition, analyzing the algorithm and optimizing the
sample storage in parallel correlator, using complex matched filter that analog
operational circuits controlled by digital signals, adopting bit serial arithmetic for the
ACS operation in viterbi decoder, using CRC to adaptively terminate the SOVA
iteration in turbo decoder, using codesign in RS codec, disabling the processing
elements as soon as the distortion values become great than the minimum distortion
value in motion estimation, and exploiting the relative occurrence of zero‐valued DCT
coefficient in IDCT.
Simulation of Submicron Silicon Diodeswith a Non‐Parabolic Hydrodynamical Model Basedon the Maximum Entropy Principle
Authors: Muscato O. , Romano V. 
Published: September 2007

A hydrodynamical model for electron transport in silicon semiconductors, free of any
fitting parameters, has been formulated in [1,2] on the basis of the maximum entropy
principle, by considering the energy band described by the Kane dispersion relation and
by including electron‐non polar optical phonon and electron‐acoustic phonon
scattering.In [3] the validity of this model has been checked in the bulk case. Here the
consistence is investigated by comparing with Monte Carlo data the results of the
simulation of a submicron n+–n–n+ silicon diode for different length of the channel,
bias voltage and doping profile.The results show that the model is sufficiently accurate for CAD purposes.
BIST Analysis of an Embedded Memory Associated Logic
Authors: Savir Jacob 
Published: September 2007

Of late some interesting and useful work has been done on the problem of testing logic
surrounding embedded memories. This work assumes that the logic surrounding the
memory is functionally partitioned and that the different partitions are logically isolated
one from the other.This paper expands upon past work using a more flexible design rule which allows
feed‐forward connections between the data‐path Prelogic and Postlogic. The connections
are such that there is no feedback from the memory outputs to its inputs, and both
the Prelogic and the Postlogic are disconnected from the Address and Control logic.
Under this design rule we show the auxiliary circuits used to determine the random
pattern testability of faults in the circuitry driving the address inputs and the controls of
the two‐port memory.The techniques described herein are intended to be used in conjunction with the cutting
algorithm for testability measurement in built‐in self‐test (BIST) designs [2, 11, 17], but
may also be suitable for use with other detection probability tools [9, 19], and simulation
tools [20].
Exploiting Data‐dependencies in Ultra Low‐power DSP Arithmetic
Authors: Bartlett V. A. , Grass E. 
Published: September 2007

Strategies for the design of ultra low power multipliers and multiplier‐accumulators
are reported. These are optimized for asynchronous applications being able to take
advantage of data‐dependent computation times. Nevertheless, the low power
consumption can be obtained in both synchronous and asynchronous environments.
Central to the energy efficiency is a dynamic‐logic technique termed Conditional
Evaluation which is able to exploit redundancies within the carry‐save array and deliver
energy consumption which is also heavily data‐dependent.Energy efficient adaptations for handling two′s complement operands are introduced.
Area overheads of the proposed designs are estimated and transistor level simulation
results of signed and unsigned multipliers as well as a signed multiplier‐accumulator are given.Normalized comparisons with other designs show our approach to use less energy
than other published multipliers.
Menstruation Problems in Nigerian Students and Sex Education
Authors: Osujih Michael 
Published: September 2007

THE ONSET of menarche and subsequent menstruation problems in 420 secondary school girls in the Rivers State, Nigeria, selected on urban/rural equal representation criterion were studied. Results show that the age at which menarche occurs among the girls cluster at the range of 11 to 14 years. Girls in the urban schools attain menarche earlier than those in the rural areas. The emotional and mental preparation of the girls both in the home and school were found to be very inadequate. Six major menstrual disorders; premenstrual syndrome, prolonged flow, painful menstruation, scanty flow, ir regular cycle and vaginal itching were encountered. Personal hygiene including choice of sanitary materials for care of menstruation was equally poor. It is concluded that sex education of the girls on the growth and developmental changes about to take place in their own bodies at puberty and adolescence should be an integral aspect of school curricula, at all levels of the educational system. It is also suggested that the media - radio, television and the press should be mobilised for mass enlightenment on the management of menstruation.
Phenothrin Lotions in the Treatment of Head Louse Infestation
Authors: Miller A.J. , Miller R.B. , Simpson M.B. 
Published: September 2007

FIFTY-SIX PATIENTS with head lice were treated with a single application of one of two alternative preparations of a phenothrin insecticidal lotion, 32 with aqueous/alcoholic formulation and 24 with an alcoholic formulation. Inspection the day following treatment showed that no live lice remained, but that 8 of 30 original cases of viable eggs remained in the aqueous/alcoholic group, and 6 of 23 original cases remained in the alcoholic group. Re-inspection three weeks after treatment showed total resolution of both live lice and viable eggs in both treatment groups. Both lotions were well tolerated although a number of patients complained of smell and stinging, this latter being only mild and of short duration. A questionnaire administered to 32 patients (18 treated with aqueous/alcoholic lotion, and 14 with alcoholic lotion) showed that both lotions were accept able to patients. The aqueous/alcoholic lotion took longer to dry, but this was balanced by a marginal disadvantage of the alcoholic formulation in terms of smell, mild stinging, and less cosmetic acceptability. The study demonstrates the safety and efficacy of the lotion formulations, and suggests that the aqueous/ alcoholic lotion would be a useful addition to a pre viously studied phenothrin shampoo.
Double-Blind Trial on the Effectiveness of the Puspokladany Thermal Water on Arthrosis of the Knee-Joints
Authors: Szucs Laszlo , Ratko Istvan , Lesko Tibor , Szoor Istvan , Genti Gyorgy , Balint Geza 
Published: September 2007

THE AUTHORS examined the effectiveness of the thermal water of Puspokladany on 62 patients suffering from osteoarthritis of the knee in a double-blind, placebo controlled study. Thermal water decreased pain in movement and tenderness of the knee significantly compared to that of the control group. Bath-reaction (increase of ESR, leukocyte number and spontaneous pain) was observed only in the group treated with thermal water. The results indi cate, that the thermal water of Puspokladany is suitable for treating patients suffering from degenerative arthopathies. In a previous announcement, Varga and his colleagues had established that a 20-days bath treat ment in the thermal water of Puspokladany signifi cantly reduced the pain of spondylosis patients when the treatment was applied in the undiluted thermal water. Bath reaction was shown on the patients who were treated in the undiluted thermal water, which was proved by the significant increase of the leucocyte number. The present paper deals with the study and tests we conducted to establish the effect of Puspokla dany's thermal water on patients with osteoarthritis of the knee.
Training of Environmental Health Officers in Anglophone West Africa: How Adequate for Environmental Monitoring?
Authors: Emeharole Patrick O. 
Published: September 2007

There is concern that the curriculum for training Environmental Health Officers (EHO) in Anglophone English speaking West Africa grossly lags behind the skills needed by sanitarians in the sub-region to cope with the challenge of environmental monitoring/control. This paper examines in detail the existing curriculum for the training of EHOs at the diploma and degree levels in the sub-region and observes that both curricula lack sufficient credit weight to impart the desired skills to perform the highly scientific task of environmental monitoring. Suggestions are made on ways and means of enhancing the professional education of EHOs in the sub-region. The paper contends that the situation places sanitarians in the sub-region at a serious academic handicap as many universities are reluctant to accept them for further studies in related fields.
A Pilot Study of Diet and Gallstone Formation in Young Saudi Women
Authors: Abdelmonim Fadlalla Ahmed  , Ali Karar Osman  , Arwa Bashir Bustami  , Aldirwish Salih , Bashir Shaista 
Published: September 2007

The diet of 100 younger than 40 years Saudi females; 50 cases with gallstones and 50 control mean age and SD 30.2 (6.1) and 29.7 (6.4) years respectively, was studied by taking a qualitative dietary history. There was no significant difference between the dietary intake of the 2 groups with regard to cholesterol-rich food and animal fat-rich foods, high fibre foods and the consumption of fast food. However, dates, 'kabsah', 'modabi' and cheese were consumed significantly more by cases (P-value <.001, <.046, <.001 and <.004 respectively) and vegetable oil was used more by controls for cooking purposes (P-value <.05).
Quality Improvement and the Hospital Patient Representative
Authors: Waters Mary Elizabeth , Al-Assaf A.F. 
Published: September 2007

A national survey of hospital patient representatives was con ducted. This study sought to identify and analyse basic demographic and occupational data of patient representatives. An analysis of the patient representatives' perceived roles in the hospital is also conducted. A total of 387 randomly selected United States hospitals were surveyed with a response rate of 66% (256 hospitals). We were able to use only 172 'usable' responses. Of those who responded, we found the typical patient representative to be a female aged 30-5 0 years old, married with a college degree, and about 6 years of experience from a northeast hospital. In general, the majority of the respondents were very positive of their role in the liaison activity between the patient and the administration.