bluuebunny/crossref_metadata_2025_split huggingface dataset:
Design of layered‐neural nonlinear filters using backpropagation algorithm
Authors: Arakawa Kaoru , Harashima Hiroshi 
Published: July 2007

AbstractThe signal such as an image signal is a non‐Gaussian signal with an abrupt change. When a random noise is superposed on such a signal, it is impossible to eliminate the noise effectively by using the traditional linear filter. Then it is desired to develop a nonlinear filter.From such a viewpoint, this paper proposes a nonlinear digital filter using a layered neural network, aiming at the elimination of such a noise. By thus introducing the nonlinearity and the learning ability of the layered neural network, the noise can effectively be eliminated. In this paper, the noise elimination is shown for the case of a one‐dimensional test signal and a two‐dimensional image signal indicating the usefulness.
A modification of the generalized minkowski metrics
Authors: Yaguchi Hiroyuki , Ichino Manabu 
Published: July 2007

AbstractThe authors have reported previously on the generalized Minkowski metrics which are applicable to the data with the mixed quantitative and qualitative features [1]. The metrics can simultaneously handle the ordinary quantitative features as well as the qualitative features with a finite set as the value. It is possible also to handle directly the quantitative features with the values being given by intervals. On the other hand, it is seen that a value sometimes appears which does not fit the human intuition. This paper defines the generalized Minkowski metrics, which have a natural property also for the data with the interval as the value. The usefulness of the approach is demonstrated through examples.
Operational state analysis using piecewise‐linear diode model with a switch and its evaluation
Authors: Tanaka Nobuyuki , Hiyoshi Yasunori , Suzuki Seiji , Asai Hideki 
Published: July 2007

AbstractOne of the methods for analysis of the operational state of the transistor network is the method based on the piecewise‐linear diode model. When the bipolar transistor network is analyzed using the Ebers‐Moll model containing the diode model composed of the voltage source and the switch, it may happen that a cut‐set composed only of current sources or a loop composed only of voltage sources is formed in the course of iteration. Also, depending on the state of the switch, it may happen that a subnetwork is separated. In such cases, the coefficient matrix of the network equation becomes singular.From such a viewpoint, this paper discusses the method in which the modified nodal equation is constructed using the piecewise‐linear diode model containing a switch, and a high‐speed analysis is executed while avoiding the singularity problem by simultaneously changing the states of more than one switch. In the piecewise‐linear diode model, the reverse‐biased characteristic is approximated by connecting a linear resistor R in parallel to the switch branch so that the electrical characteristic of the diode is not violated. The forward‐biased characteristic is approximated by inserting a linear resistor r in series to the switch branch. It is verified that by using the piecewise‐linear diode model containing a switch, the singularity problem is avoided and the limit cycle problem is greatly ameliorated.
A grid‐free maze router
Authors: Kimura Mitsuyuki , Shiraishi Yoichi , Himeno Fumio , Hanaki Soichi , Kusaoke Manabu 
Published: July 2007

AbstractSeveral maze methods using analog LSI as wiring path searching of grid‐free wiring have been reported. These techniques process in microns and the searching range is limited to prevent increases in processing time and used memory capacity. This paper proposes a grid‐free wiring technique for determining the shortest wiring path limits processing time and used memory capacity to within a practical range. This technique takes the conventional wiring grid interval, determined so that the through‐hole used to connect the wiring layers will not violate the design rules and divides the grid into l/n (n: arbitrary integer) and also controls the integer n. It allows for independent layer direction, variable width wiring, and rectangular terminals. A wiring technique is proposed that obeys wiring constraints, such as T‐shape wiring which arise from analog circuit characteristics. This technique was applied to four kinds of modules of analog LSI and improvements in the wirability and its effectiveness were confirmed.
SC pitch extraction for real‐time and continuous processing
Authors: Yamashita Shinsuke , Ogihara Akio , Yoneda Shojiro 
Published: July 2007

AbstractIf speech recognition is applied to man‐machine interface, real‐time processing is naturally desired. It is efficient for real‐time processing that routine preprocesses (extraction of features and analysis) are executed with custom hardware.This paper proposes two kinds of pitch extractors which continuously extract the fundamental period of an input signal in real time. Since the pitch extractors are constructed using the switched capacitor (SC) technique, they can be integrated into an LSI package.The first SC pitch extractor is based on the autocorrelation function, and the extractor calculates two variable multiplication with a programmable capacitor array. The second SC pitch extractor is based on the absolute difference function which is obtained by replacing the multiplication in the autocorrelation function with subtraction, and the absolute difference function is useful to reduce circuit scale.A remarkable feature of both SC pitch extractors is that the pitch period of an input signal is continuously extracted in real time. Hence the pitch synchronous analyzer which performs spectral analysis in real time can be constructed with the proposed SC pitch extractors and the SC DFT circuit. According to the experimental results, the error of the SC pitch extractors made with discrete parts is less than 3.0 percent. In addition, the proposed SC pitch extractors were applied to five Japanese vowels and obtained a satisfactory result.
Abnormal convergence of numerical solutions and Runge‐Kutta‐type methods admitting no such phonemenon
Authors: Maeda Shigeru 
Published: July 2007

AbstractWhen the standard Runge‐Kutta method is applied to a certain system of linear differential equations, the numerical solution converges to the origin but the true solution diverges to infinity. This phenomenon is named the abnormal convergence of numerical solutions. Abnormal convergence has not been studied fully; however, many concepts involving A‐stability have been established to treat the phenomenon that the numerical solution diverges even though the true one converges, as is apt to occur in integration of a stiff system.An example will be illustrated here in which the standard Runge‐Kutta method generates abnormal convergence. Further, it will be proved that the abnormality is caused by the existence of an intersection of the absolute stability region and the right‐half plane. Even if the 1/8 formula method is used instead of the standard one, the same phenomenon can be seen because all four‐stage, fourth‐order, explicit Runge‐Kutta methods have the unique absolute stability region.This paper seeks for Runge‐Kutta methods that are A‐stable and never generate abnormal convergence, even though this might be an excessive requirement. Concretely, two types of methods will be proposed whose absolute stability region coincides with the left‐half plane. Furthermore, it will be reported that Gauss‐Legendre methods are typical ones.
A method of realizing an adaptive normalized ARMA lattice filter
Authors: Haseyama Miki , Nagai Nobuo , Miki Nobuhiro 
Published: July 2007

AbstractThis paper proposes a method of realizing an adaptive normalized ARMA lattice filter. This filter was proposed in a previous paper and can be realized with an arbitrary ARMA order and with all the lattice coefficients less than one. Furthermore, these coefficients are equal, so the structure is simplified. The adaptive realization method proposed in this paper retains these features. In addition, we perform spectral estimation of a time‐varying signal with frequency weighting and model identification of an unknown input system. In our paper we describe an experiment with a real speech signal to prove that our algorithm can be used for frequency‐weighted spectral estimation. The use of real data to perform spectral estimation has not been attempted in other references.
An extension of the adaptive robbins‐monro procedure for a least‐square approximation problem of unknown systems
Authors: Maeda Yutaka , Kawamura Yoshiaki 
Published: July 2007

AbstractThis paper considers an unknown nonlinear static system with an adjustable parameter (input parameter). The problem is to find the least‐square approximation input parameter. A recursive algorithm is proposed that estimates this least‐square approximation parameter without an identification of the system. An output of the system is observed under a noisy environment. Suppose that the dimension of the output is equal to that of the input. In this case, the system characteristic can be regarded as a regression function, hence a recursive algorithm that can be constructed that minimizes the difference between the expectation of the output and a desired value of the output by using the stochastic approximation method or the adaptive Robbins‐Monro procedure. On the other hand, if the dimension of the output is greater than that of the input, the regression equation has no solution. Therefore, the usual stochastic approximation method or the adaptive Robbins‐Monro procedure cannot be used.The algorithm proposed in this paper estimates the least‐square approximation input parameter that minimizes the squared error of the output. Especially, this algorithm agrees with the usual adaptive Robbins‐Monro procedure if the dimension of the output is equal to that of the input. Some numerical simulations are shown and the availability of the algorithm presented herein is confirmed.
A transistor‐island growing algorithm in a CMOS cell pattern generation
Authors: Shiraishi Yoichi , Sakemi Jun'Ya , Kutsuwada Makoto , Tsukizoe Akira 
Published: July 2007

AbstractA transistor placement algorithm which generates a placement from a circuit diagram is described and evaluation results are presented. This algorithm is not guaranteed to be optimum; however, it can generate efficient placements for a wide range of cells with an equal or an unequal number of PMOS and NMOS transistors. The basic idea is to divide a problem into four subproblems, each of which independently attempts to minimize the number of diffusion separations, to straighten the gate‐wirings between PMOS and NMOS transistors, to minimize the estimated total wiring length, and to minimize the trunk density by utilizing the logical structure of an input circuit diagram. This algorithm was applied to the cell library generation and also to some “difficult examples” suggested in other papers. The generated cell patterns can actually be used and are comparable to other results.
Improvement on the error performance of M‐Ary PSK under a rician fading using time domain TCT
Authors: Li Huan‐Bang , Iwanami Yasunori , Ikeda Tetsuo 
Published: July 2007

AbstractTo reduce irreducible error floors that disturb digital mobile satellite links, a pilot tone‐based technique (TCT) has been presented in recent years. Although TCT performs well against the error floors, it is necessary for the TCT to make a null point at the transmitted data spectrum for carrying a pilot tone. This spectrum zero itself, however, usually degrades error performance. Further, the implementation of a narrowband pilot‐extracting BPF at the receiver is difficult. This paper presents a time domain TCT which can overcome these defects. Theoretical analysis and numerical results are given which verify the effectiveness of the presented system.
Design knowledge representation scheme for D‐A converter
Authors: Hayashi Shin‐Ichi , Watanabe Toshinori , Oosawa Hideyuki , Maio Kenji 
Published: July 2007

AbstractWith the advent of the application‐specific IC (ASIC) era, the diverse, small‐quantity production is required. With the progress of semiconductor integration, the fabrication is now in the era of the system‐on‐chip. Thus, it has become important to reduce the design period for the mixed analog/digital LSI. Compared to the digital circuit, the design techniques and the methods in CAD tools on analog circuits are still in the embryonic stage. The design of the analog circuit requires sophisticated decisions, such as the adequate selection from a very large number of possibilities for the topology of the circuit and the circuit constants, according to the purpose of application. Hence, the goal cannot be achieved by the traditional approach, where a relatively fixed problem‐solving procedure is formulated into a program along the particular algorithm. The approach by the knowledge processing will be useful.This paper considers the design knowledge for the D‐A converter. A representation scheme for the design knowledge is proposed, whereby the design knowledge is described by being divided into a static part (production rule for the circuit) and a dynamic part (method of rule application). In this way, the design knowledgebase can be constructed efficiently. The proposed scheme actually is applied to the design of the D‐A converter, and it is shown that the scheme is useful in the design‐support, which has been difficult using earlier approaches. The experiment is made using Prolog as the knowledge processing language, and it is shown that the unification function and the backtrack function of Prolog is suited to the realization of the following design‐support functions for the analog circuits: (1) modification of circuit; (2) generation of abbreviated circuit; (3) documentation; and (4) net‐listing.
A method of constructing circuits containing several kinds of variable elements
Authors: Kawakami Atsushi 
Published: July 2007

AbstractThis paper considers the transfer function containing several kinds of variable parameters and proposes a method for synthesizing the circuit by the state‐space method. The method is to construct separately the denominator and the numerator of the given multiparameter transfer function.Using the proposed method, the multiparameter transfer function can be constructed by the active RC circuit with the minimal number of dynamical elements and about half the number of variable elements, compared with the traditional method. A method is also shown which utilizes free parameters of the circuit structure to minimize the pole‐zero sensitivity of the multi‐parameter transfer function with respect to the variation of the active and passive elements. Finally, an illustrative example is shown to demonstrate the effectiveness of the synthesis method proposed in this paper.
Matching section with a nonuniform transmission line having equivalent representation constructed with lumped brune‐type section and uniform transmission line
Authors: Ohba Yoshifumi , Sato Risaburo , Nemoto Yoshiaki 
Published: July 2007

AbstractThe nonuniform transmission line (NTL‐SR), which is equivalently represented by a lumped series‐resonant circuit, a uniform transmission line and a lumped T‐type Brune section with a negative sign, has the property of extreme points in the characteristic impedance distribution. By utilizing those extreme points positively, an excellent matching section can be produced for the pure‐resistance load using NTL‐SR.This paper first derives the equivalent circuit for the NTL‐SR fitted to matching section (NTL‐SRMS). The NTL‐SRMS is the NTL‐SR where the characteristic impedance distribution has zero derivatives at the input and the output ends. Then the transmission characteristics of NTL‐SR as the matching section are shown. Based on those results, the design of this type of matching section is discussed. Finally, the result of an experiment is reported to demonstrate the validity of the theory.
Dc analysis of nonlinear circuits using solution‐tracing circuits
Authors: Inoue Yasuaki 
Published: July 2007

AbstractThe dc driving‐point and transfer characteristics of nonlinear circuits are the multivalued curves that arise from the nature of the circuit. These curves cannot be analyzed by general‐purpose circuit simulators. One known method for analyzing these kinds of characteristic curves is the backward differentiation formula (BDF) curve‐tracing algorithm proposed by Ushida and Chua. In this method, the circuit equations f(x) = 0, f(·): Rn+1 → Rn, where the input voltage is assumed to be a variable, are analyzed by the predictor‐corrector algorithm where the arc‐length of the solution curve in n + 1‐dimensional space is the parameter. However, it is not clear that this method is practical for large‐scale circuits.In this paper, we extend the Ushida‐Chua method from a practical method standpoint and demonstrate that the multivalued characteristic curves of large‐scale circuits can easily be analyzed using general‐purpose circuit simulators.In the proposed method, first, the solution curve in n + 1‐dimensional space is projected into m + 1‐dimensional space, where m ≤ n and the arc‐length of this new curve is used as the parameter.Second, the relationship between the arc‐length and the components of the curve is expressed by a function generator circuit, the solution‐tracing circuit.Finally, transient analysis is performed using a general‐purpose circuit simulator and the solution curve is traced. The effectiveness of this method is verified through several examples, including a bipolar analog IC with 296 nodes.
Development of functional simulation model of CMOS memory
Authors: Hayashi Shin‐Ichi , Watanabe Toshinori , Hirai Chiaki , Masuda Hiroo 
Published: July 2007

AbstractThe development of semiconductor integration has brought with it the system‐on‐chip era. The small‐quantity productions of diversified kinds of IC are required at the stage of ASIC (application specific IC). Thus, it has become important to reduce the design period for the mixed analog/digital circuit. The capacity of the CMOS memory continues increasing and is expected to expand from the Mbit level to the Gbit level. Then the parasitic effect will be a problem.This paper proposes a functional simulator based on the continuous system simulation technique. It is shown that the proposed simulation including the parasitic effect can effectively be applied to the functional design of CMOS memory, which has been unsatisfactory in the early circuit simulator.In the proposed method, CMOS memory is modeled based on the functional element model of the CMOS memory and the functional simulation can easily be realized considering the parasitic functional effect. This helps to improve the design quality and to reduce the design period.
A study of generating functions of sampling theorems and optimum interpolation functions minimizing some kinds of measures
Authors: Kida Takuro , Sa‐Nguankotchakorn Somsak 
Published: July 2007

AbstractGiven an absolutely square‐integrable waveform bandpass limited to the interval |ω| ≤ ω0, ω0 > 0, and regularly spaced sample points tn = nτ0, (τ0 = π/ω1 > ω0; n = 0, ±1, ±2, …) the interpolation formula which corrects errors in the sample values of the original waveform is not uniquely determined. In this paper, we derive several theorems which establish the relation between the interpolation functions and a two‐variable function of angular frequency ω and time t called the generating function of the sampling theorem. First, we show that these interpolation functions may be considered as functions of time with coefficients obtained from the Fourier series expansion of the generating functions with respect to the angular frequency ω. This theorem depends on another already established theorem, for which a brief proof is given in the Appendix, for the reader's convenience, in the case that the relation is defined on a vector space. Next, under the condition that the generating function is absolutely continuous, we consider the problem of determining a generating function that minimizes the sum of the squares of the weighted interpolation functions. We show that the sum of the squares of the weighted interpolation functions as a measure provides a bound on the magnitude of the interpolation functions and also measures the rate of decrease. In this paper, under two conditions, which are satisfied in the sampling theorem, a generating function in the sampling theorem is determined which minimizes the above‐mentioned measure of the interpolation functions. Using these arguments, we also derive generating functions which minimize various weighting measures related to the interpolation functions ωn(t), such as when the weights are squares, (2k)‐th powers, and (1 + n2ω).
Existence of structurally bounded wave digital filters for arbitrary transfer functions
Authors: Ishiwata Shunichi , Nishihara Akinori , Fujii Nobuo 
Published: July 2007

AbstractStructurally bounded circuits such as properly designed wave digital filters (WDFs) are known to have low sensitivity in the passband. Existing structurally bounded WDFs cannot always realize arbitrary transfer functions.This paper shows first the existence of structurally bounded WDF sections which correspond to reactance E sections and Richards sections and then derives their circuit structures. Such a natural assumption is made in this derivation that multiplier coefficients having the same nominal value continue to have the same value even under finite wordlength condition. Interconnections of the proposed sections cause delay‐free loops, which can be removed using Kuroda's identity. Thus, it is shown that such WDFs that can realize arbitrary transfer functions while inheriting the structural boundedness of prototype reactance filters really exist.
Formalization of teaching materials for a network‐based laboratory support system
Authors: Sugawara Kenji , Ukigai Masahiro , Fukushima Manabu , Miida Yoshiro , Kinoshita Tetsuo 
Published: July 2007

AbstractAs the information in society becomes more complex, the importance of advanced education and lifelong learning in universities and corporations is increasing. Since the current situation in general education at universities, for example, is group instruction of a large number of students, instruction that responds to the differences in ability of each student is becoming difficult.To improve this situation, the trend of the falling price of computers in recent years has been accompanied by energetic research on laboratory support systems. Although when considering the presentation of a superior user interface, the development support and management of the vast amount of teaching materials that accompanies the diversification of the learning objectives, and the implementation of ample teaching support functions, earlier computer‐based systems seem to have functional limits.Therefore, the transition to network‐based laboratory support systems that use advanced workstations is demanded. However, in building this type of laboratory support system, the formalization of the teaching materials suited for use in a distributed environment is required, but this kind of research has not been performed in the past.This paper introduces a new framework for formalizing the structure of teaching materials to be used in distributed environments. In addition, its efficiency is discussed as the model used for teaching materials in the implementation of a network‐based laboratory support system, which is being designed and developed.