bluuebunny/crossref_metadata_2025_split huggingface dataset:
Inspection Techniques Using Scanning Acoustic Microscopy for Silver Sintering Applications in Power Electronic Modules
Authors: Ayala Heaklig , Gonzalez Jose Ortiz , Karout Mohammed-Amer , Cotty James , Rumney Tim , Mawby Philip 
Published: March 2024

This work presents a practical perspective to Scanning Acoustic Microscopy (SAM) for Ag-sintering applications in power electronic modules and devices. It aims to present typical challenges to consider whilst performing C-SAM for inspecting and analysing microstructures within power electronic devices, with emphasis on silver-sintered interconnects. The study presents a vast number of acoustic images (discrete devices in TO-247 packages, power modules, and also custom samples of substrates and devices), where several defects are identified, including voids, cracks, and delamination. Challenges for Ag-sintered layers inspection related to advanced surface finishes are also revealed and discussed in detail. The suitability of C-SAM for inspecting small and large areas of Ag-sintered interfaces is discussed, and showcased with custom samples, and a commercial power module.
Gas Permeable Protection Caps for Wafer Level Chip Scale Packaging (WLCSP) of MEMS Environmental Sensors
Authors: Behrmann Ole , Lisec Thomas , Klingbeil Finn , Kyoushi Niklas , Gojdka Björn 
Published: March 2024

This work presents new porous environmental protection caps designed for wafer level chip scale packaging (WLCSP) of MEMS environmental sensors. The caps consist of gaspermeable microstructures formed from loose aluminum oxide powder solidified by a ceramic thin film, grown using atomic layer deposition (ALD). For the first time, the full process flow of the proposed approach is demonstrated by manufacture of the cap wafer followed by substrate bonding using glass-frit technology. By analyzing the influence of the caps on the response time of MEMS humidity sensors, this study proves the viability of the proposed packaging technology. In addition, the ability to further functionalize the porous caps is demonstrated by the deposition of a superhydrophobic polymer thin film by chemical vapor deposition.
Reliability of Copper Sintered Interconnects under Extreme Thermal Shock Conditions
Authors: Bhogaraju Sri Krishna , Ugolini Francesco , Belponer Federico , Greci Alessio , Elger Gordon 
Published: March 2024

Copper flakes-based sinter paste showed high reliability under thermal shock conditions. A dense and homogeneous interconnect was realized while sintering for 5 min at 275°C under 15 MPa bonding pressure, with the flakes showing the unique behavior of stacking over each other to realize a dense and homogeneous interconnect. Porosity under 10% could be achieved. The paste could be sintered under a constant nitrogen flow and did not need a fully inert atmosphere during sintering. Under high stress thermal shock cycling of +175/-65°C, the sintered interconnects showed a drop of 25% in the shear strength values after 1000 TST, consistent with observations made with Ag sintering. Thermal conductivity more than 200 W/mK and electrical conductivity of 20 Ms/m is achieved using the Cu sinter paste.
Novel Low Temperature and Low Pressure Sintering of ADAS Radar Sensor Antenna Stack
Authors: Bhogaraju Sri Krishna , Mohan Nihesh , Steinberger Fabian , Erdogan Hueseyin , Hadrava Philipp , Elger Gordon 
Published: March 2024

A low temperature and low pressure sintering of antenna stacks with the promising prospect of achieving a single step bonding process of multi-layer wave guide antennas for automotive radar sensors is demonstrated. Silver nanoparticles (Ag-NP) paste with the ability to sinter at 200°C in air allows for easy integration into standard surface mount device reflow process. The paste drying and sintering process of the Ag-NP paste is first optimized using dummy test chips to reduce the typical voiding and channeling in the interconnect when sintered without pressure. In especially, a slow ramp rate with an integrated predrying step is applied after placement of the test chips into the wet paste. Afterwards, the process is transferred to the antenna. However, pre-existing bending in the large antenna layers challenges the sintering process without pressure, e.g. larger amounts of paste need to be applied for compensation of the bending. Therefore, the use of a low bonding force in observed to improve the quality of the sintered interfaces. Near bulk like Ag sintered interconnects were realized.
Improvement of Bonding Strength and Thermal Shock Reliability for Ag Sinter Joining Direct on Al Substrate
Authors: Chen Chuantong , Liu Ran , Kobayashi Koji , Osanai Hideyo , Zhang Zheng , Suganuma Katsuaki 
Published: March 2024

Ag sinter paste joining as a proven die bonding technology have been used in the electric vehicle. However, for the Ag sinter paste joining, metallization layers on substrate are usually necessary such as Ni-P/Au or Ni-P/Ag to get a good bonding quality. The direct bonding on DBC (direct bonded copper) or DBA (Direct Bonded Aluminum) substrates without metallization layers are very attractive. In this study, we investigated the direct bonding on an aluminum (Al) substrate by Ag sinter paste and propose an abrasive blasting processes to treat the Al surface to increase the initial bonding quality. The result show that the shear strength of SiC/Al joint structure by Ag sinter paste can be improved by treating the Al surface. The shear strength of joint structure without surface treatment increased from 26.9 MPa to 32.2 MPa for a strong blasting treatment on Al surface. In addition, the results of thermal shock test (-40 ℃~150℃) also show that the blasting treatment on Al surface can improve the shear strength and reliability of SiC/Al joint structure.
Characterizations for eWLB (Embedded Wafer Level Ball Grid Array) Antenna in Molded Package Integrations in 77GHz Automotive Applications
Authors: Hsieh Ming-Che , Zhang Frank , Zhu Forest , Liu Kang , Chua Linda , Lin Yaojian , Damalerio Joel A. , Goh Hin Hwa , Chan Kai Chong , Chen Zihao 
Published: March 2024

The worldwide IC market has had a significant growth rate in recent years, driving diversified package solutions in the segments of communication, computing, consumer, automotive, industrial, etc. Among these market segments, the automotive market is forecast to have the strongest CAGR (Compound Annual Growth Rate) of any of the end-use segments in the next 5 years, which results in more IC packages and components being designed into automotive vehicle systems such as infotainment, ADAS (Advance Driving Assistance System), instrumentation, body systems, battery control systems and so on. In these applications, the 77GHz short-range radar sensor application that can enable higher EIRP (Effective Isotropic Radiated Power) and adaptive cruise control performance has become more attractive to be commercialized. Due to the benefits of shorter interconnection length, lower conductive loss with smooth Cu surface as well as a lower dielectric constant and dielectric loss of materials in a fan-out wafer level package (FOWLP) technology, the FOWLP is proven as a suitable packaging solution to achieve the high speed and frequency requirements in 5G and mmWave applications. The eWLB Embedded Wafer Level Ball Grid Array) is a versatile FOWLP technology, providing a robust package platform in a space-efficient design with the very dense interconnection and routing of multiple dies as well as a smaller footprint and lower package profile providing a reliable package solution. Meanwhile, since the utilization of an antenna that is integrated into the packages has been studied as a lowcost solution because the packages can be tested in normal FR4 printed circuit board (PCB) instead of the RF function integrated PCB, the eWLB integrated with molded antenna chip packages (called eWLB antenna in molded package) technology is introduced in this paper. The characterizations for assembly process challenges are evaluated and illustrate the process optimizations of equipment handling, antenna molded chip package fabrication, reconstitution process control and warpage characterization of the molded wafer. In addition, the radio frequency (RF) test validation is performed to verify the performance of scattering parameter (S-parameter), radiation pattern, impedance and detection range of the antenna. In order to prove the reliable quality and yield of the evaluated eWLB antenna in molded packages, package-level reliability tests are studied. Through these results, it will show that this eWLB antenna in molded package integration is a robust and costeffective solution for 77GHz automotive applications.
Durability of Lead-Free Solder Interconnections for Printed Circuit Board Applications: Comparing Energy-Based Thermo-Mechanical Fatigue Models
Authors: Huang Chien-Ming , Herrmann Jeffrey W. 
Published: March 2024

Fatigue models for predicting the cycles to failure of solder interconnections under temperature cycling situations have been discussed and developed for decades. However, most models were developed for different solder materials, components, and printed circuit boards. No previous work has systematically compared these models. Therefore, the variability of their durability predictions is unknown. This study compared nine existing low-cycle energy-based fatigue models for different solder materials and components and then analyzed the differences among them. Each fatigue model had a specific combination of the factors that affect the strain energy density accumulation. Therefore, we adjusted the strain energy density (input) and the predicted cycles to failure (output) in a consistent way to compare the selected fatigue models on the same basis. The differences among the predictions on cycles to failure from the fatigue models was significantly reduced after applying the adjustments, and they exhibited excellent consistency around 1 mJ/mm 3 strain energy density. In the end, factors that can affect the prediction consistency of fatigue mode were provided, including the number of data points while building the fatigue model, the range of strain energy density while selecting the electronic components, and the application of volume-weighted averaging technique on the critical solder joint.
One-Probe Nanoprobing of Power Devices and Electronic Packages
Authors: Johnson Greg M. , Huang Chengliang , Viswanathan Vignesh , Rummel Andreas , Stegmann Heiko , Andrew Elliott , Gu Allen , Terada Masako , Rodgers Thomas 
Published: March 2024

Results involving the use of a single nanoprobing contact are presented, on both a SiC planar MOSFET device, and a small system-in package. In both cases, mechanical polished samples were prepared, and then probed with a single contact. For the SiC MOSFET, the depletion zones were imaged while the samples were mounted on a 45 ° stub. Discussion of the different signals generated from Passive Voltage Contrast (PVC) and Electron Beam Induced Current (EBIC), as well as possible artifacts of sample grounding, are provided. For the package, Electron Beam Absorbed Current (EBAC) provided indication of connected features within the sample. The experiment showed the capability of measuring features across three orders of magnitude in size.
Impact of Pad Layouts and Solder Volume on Self- Alignment of Micro Solar Cells
Authors: Kaiser Elisa , Wiesenfarth Maike , Vareilles Victor , Helmers Henning 
Published: March 2024

In micro- concentrating photovoltaics (micro- PV), tiny solar cells (<1 mm2) are assembled on a circuit board on glass. To mount thousands of dies per square meter, a high throughput process is required which still yields alignment accuracy in the order of 10 μm. We developed a micro-CPV module technology where micro cells are accurately mounted directly on a circuit board on glass using a high throughput pick and place process combined with selfalignment based on the restoring force due to surface-tension of the liquid solder. In this work, we study how the selfalignment accuracy is influenced by the pad layout, solder volume and initial position of the die. We show that selfalignment significantly benefits from an induced motion, whether induced by initial displacement of the die or by flowing of molten solder along tracks. Furthermore, we found that lower solder volumes lead to higher alignment accuracies for dies on rectangular pads, whereas the dependence on solder volume is lower for pads with connected tracks where the solder flows out. Overall, alignment accuracies below 15 μm are demonstrated despite initial displacements up to 150 μm. Thus, self-alignment using surface tension of the liquid solder is suitable for micro-CPV.
Evaluation of the Environmental Impact within Semiconductor Packaging Materials
Authors: Kettle Jeff , Bainbridge Andrew , Grant Kathleen , Clark Lewis 
Published: March 2024

This paper reports the sustainability of materials and components required for PCB manufacturing, namely the substrate material, die-attach method and IC chip design. Electronics manufacturing processes are generally decided by the technical and economic requirements, and not sustainability, resulting in poor practices and unintended outcomes. Alternative methods could be used and this paper reviews some of the drivers and opportunities for sustainable PCB manufacturing. A lifecycle assessment (LCA) was performed on simple Printed Circuit Boards (PCB) and a comparison of the manufacturing approach using FR-4, polyimide and paper-based substrates is made. The impacts of different processing steps were considered, all scored using the ReCiPe Endpoint. The results found solder material has a significant influence, with lower-temperature solders reducing the overall environmental impact. However, it has been found that the component that has the biggest environmental impact overall is the IC. We discuss how die size, technology node and packaging formats effects this rating, and also show how the move towards alternative materials can reduce the environmental impact of electronic products.
Innovative Silicon-Ceramic (SiCer) Technology for High-Strength Pressure Sensor Applications Using Different Manufacturing Methods
Authors: Kleinholz Cathleen , Fischer Michael , Gutzeit Nam , Cyriax Andrea , Hintz Michael , Ortlepp Thomas , Müller Jens 
Published: March 2024

A variety of manufacturing methods can be used to assemble silicon-based piezoresistive pressure sensors, such as anodic bonding or silicon direct bonding. To achieve highstrength pressure sensors, a high quality interface connection is required. The combination of silicon and ceramic creates a new innovative composite system known as Silicon-on-Ceramics, short SiCer. By using a special developed bondable Low Temperature Co-fired Ceramic tape, which corresponds to the thermal expansion coefficient of Si, the combination of both materials is possible through a sintering process. Advantages of the SiCer technology are high temperature stability, manufacturing at wafer-level and a high bond strength at the interface. Different manufactured SiCer-based pressure sensors were fabricated, electrically and mechanically characterized and compared with anodic bonded and silicon direct bonded pressure sensors.
LTCC-based Ceramic Substrates for Identification of Trustworthy Electronics
Authors: Krieger Uwe , Schroeter Annett , Bechtold Franz , Hagen Gunter , Goldberg Adrian 
Published: March 2024

The technology of low temperature cofired ceramics (LTCC) is already established in the production of reliable and robust electronic assemblies (e.g., multi-chip modules, system-in-package) as well as in safety-critical areas. With the incorporation of additional features based on surface profiles modular protection functions and barriers will be developed as a contribution to trustworthy electronics. Both obvious and hidden structures are investigated in a modular way, which in combination ensures a one-to-one tamper-proof identification.
Understanding the Contact Resistance in an ACF Bonding
Authors: Kristiansen Helge , Nghiem Giang M. , Bazilchuk Molly , Aasmundtveit Knut E. 
Published: March 2024

Anisotropic Conductive Film (ACF) bonding, the technique of choice for display interconnects, allows very fine pitch interconnect at a moderate process temperature, typically at the expense of a non-negligible interconnect resistance. Modern ACFs have conducting particles in a thin layer of highviscosity adhesive. This allows even finer pitch but comes at the risk of high interconnect resistance due to trapped adhesive between pad and conductive particle. Conductive particles with spikes are designed to penetrate such a trapped adhesive layer. In this paper, we compare spiky conductive particles with the traditional, spherical, ones. We measure interconnect resistance of individual particles in a nano-indentation test setup, as well as the interconnect resistance of ACF bonding using the two different particles, in daisy-chain measurements. Interconnect resistance of individual spiky particles is more than an order of magnitude higher than the one for spherical particles. However, when mixed in an adhesive and used for ACF bonding, the interconnect resistance of ACF with spiky particles is somewhat lower than that of the ACF with spherical particles. The interconnect resistance of ACF with spherical particles is two orders of magnitude higher than that of the individual particles, whereas the interconnect resistance of ACF with spiky particles is comparable to the individual-particle resistance. We conclude that trapped adhesive is a major concern for fine-pitch ACF bonding, and that the use of spiky conductive particles has the potential to overcome these challenges.
Assembly of Ultra-thin MEMS Device on Driver Chip Using Anisotropic Conductive Film
Authors: Nguyen Hoang-Vu , Aasmundtveit Knut Eilif 
Published: March 2024

Assembly solution for large-area, ultra-thin, MEMS-based transducer array dies on driver chips has been investigated using dummy Si dies and substrates. The dummy dies have a thickness of 50 μm, a bonding area on the order of 100 mm2 populated with more than a thousand through-silicon vias connecting corresponding metal pads and redistribution layer (RDL) on both sides. The dummy substrates have conventional thickness as well as necessary RDL and pads for bonding and monitoring electrical resistance and stray capacitance of interconnects. Flip-chip interconnection technology based on anisotropic conductive film (ACF) was selected for bonding and characterization. Handling and ACF bonding of ultra-thin dies to rigid substrates were eased by means of glass carriers attached to the inactive side of the dies. Proper bonding parameters were identified, providing sufficiently low interconnect resistance with satisfactory yield. Stray capacitance of interconnects was found in acceptable range, though lower stray capacitance should be further pursued. The results from this work have demonstrated the feasibility of using ACF for assembling large-area, ultra-thin dies on rigid substrates.
Cu Pumping Analysis during Cu/SiO2 Hybrid Bonding using In-situ SPM Imaging
Authors: Roshanghias Ali , Kaczynski Jaroslaw , Hangen Ude 
Published: March 2024

The assessment of Cu pumping (also known as Cu extrusion) during thermal annealing is vital information for the successful execution of hybrid bonding as well as defect-free processing of the through silicon vias (TSV). Unpredicted Cu pumping can pose major reliability issues. Correspondingly, in this study, high-temperature analysis of Cu pumping was conducted utilizing in-situ scanning probe microscopic (SPM) imaging. Cu/SiO2 surfaces with recessed and protruded Cu topographies were produced by chemical mechanical polishing (CMP) and used for Cu pumping investigations. The amount of Cu pumping upon thermal annealing up to 400°C and cooling down to room temperature was precisely quantified. The SPM results were compared with FEM simulation results, and a numerical equation for Cu pumping was proposed, accordingly. It was shown that by using in-Situ SMP imaging, valuable information on the behavior of hybrid Cu/dielectric surfaces can be generated.
Voiding in Parylene-C Encapsulation of Surface Mount LEDs for an Optogenetic Epilepsy Neuroprosthesis
Authors: Shah Idil Ahmad , Bailey Richard , Escobedo-Cousin Enrique , Gausden Johannes , O’Neill Antony , Donaldson Nick 
Published: March 2024

It is often assumed that Parylene-C encapsulation films are void-free & conformal by nature of their vapour deposition. We present a case study in an optrode device where voiding occurs; we argue the voids originate from the geometry of the substrate and from the use of surface mount components. The segment under study consists of a commercial LED bonded with Au/Au thermosonic bonding onto a custom silicon substrate. We demonstrate via micro-sectioning that there is polymer voiding behaviour (1) in sub-LED surfaces; and (2) within through-hole vias in the silicon substrate (channels designed to allow polymer vapour ingress during deposition). By making a comparison to the solutions found in the IC industry around tungsten vapour filling of blind vias, we present geometric solutions for failure mitigation.
High Frequency Thin Film Magnetics-on-Silicon with Improved Inductance and Resistance
Authors: Sittner Martin , Shousha Mahmoud , Haug Martin 
Published: March 2024

In the electronics industry there is a significant trend towards miniaturization of electronic devices. At the same time, system functionality should continue to be guaranteed or improved. To support the increasing level of integration, magnetics-on-silicon is introduced [1]. The main goal of this paper is to show improvement compared to previous works [1] by increasing the magnetic core and copper thicknesses.
Helicobacter pylori-Associated Immune Thrombocytopenia: Diagnostic and Therapeutic Approach
Authors: Gosavi Siddharth , Krishnan Gokul , Kumar Vinay , Nityandila Chinmayee Anand , Rao Amogh Ananda , Singh Shiana , Shastry Barkur Anantha Krishna 
Published: March 2024

Abstract
The relationship between immune thrombocytopenia (ITP) and Helicobacter
pylori infection has largely been an unexplored entity. This review article aims at focusing on the role of H. pylori in secondary ITP. We also elucidated the importance of diagnostic workup and treatment of H. pylori in this article. The mechanisms of H. pylori-associated ITP have been covered in this article. The factors determining platelet response to H. pylori eradication therapy have been mentioned. It is extremely crucial to be aware that H. pylori is a major causative pathogen for new-onset ITP as well as chronic ITP. Upper gastrointestinal endoscopic biopsy is the best invasive method for the diagnosis of the same. Further studies need to be conducted across larger, more diverse groups to validate our observation that eradication of H. pylori could aid platelet recovery in ITP.
On Numerical Semigroups with Almost-Maximal Genus
Authors: Arroyo Joshua , Autry Jackson , Crandall Charlotte , Lefler Jess , Ponomarenko Vadim 
Published: March 2024

A numerical semigroup is a cofinite subset of N0, containing 0, that is closed under addition. Its genus is the number of nonnegative integers that are missing. A numerical set is a similar object, not necessarily closed under addition. If T is a numerical set, then A(T)={n in N0 : n+T is a subset of T} is a numerical semigroup. Recently a paper appeared counting the number of numerical sets T where A(T) is a numerical semigroup of maximal genus. We count the number of numerical sets T where A(T) is a numerical semigroup of almost-maximal genus, i.e. genus one smaller than maximal.
Tight Frame Graphs Arising as Line Graphs
Authors: Furst Veronika , Grotts Howard 
Published: March 2024

Dual multiplicity graphs are those simple, undirected graphs that have a weighted Hermitian adjacency matrix with only two distinct eigenvalues. From the point of view of frame theory, their characterization can be restated as which graphs have a representation by a tight frame. In this paper, we classify certain line graphs that are tight frame graphs and improve a previous result on the embedding of frame graphs in tight frame graphs.