bluuebunny/crossref_metadata_2025_split huggingface dataset:
Optimum reception in digital communication systems
Authors: Othmer F. E. 
Published: September 2008

AbstractThe reception problem in digital communication is stated in general terms and the corresponding optimum decision rule which minimizes a prescribed performance criterion, called average loss, is derived in general form. The general investigations are specialized to a class of performance criteria containing average symbol and average bit error probability as special cases. Assuming that the cascade connection of transmitter, channel, and (perhaps) some receiver front‐end can be modeled as a discrete‐time, finite‐state probabilistic machine, a receiver structure is derived which minimizes the average symbol (bit) error probability by making optimum decisions on the basis of the entire receiver input sequence and which has only a linearly growing complexity with growing sequence length. It is shown that the probabilistic‐machine assumption is fulfiled in a wide range of practically important transmission situations. It is also shown that in some special cases the optimum receiver structure is independent of the sequence length.
Performance limitations for distributed amplifiers
Authors: Carlin Herbert J. , Civalleri Pier Paolo 
Published: September 2008

AbstractThe model of a distributed amplifier as two cascaded chains coupled at discrete points by active devices is considered from a network theoretic point of view. The active devices are represented by a simplified equivalent circuit, consisting of a current source and of input and output capacitances. The connecting structures are assumed to be lossless, but no initial assumption of image parameter lines is made. This mode of operation is deduced as an optimum from the network equations. The chains can be identified as gate and drain lines formed using a number of MESFET's, if these are assumed to be representable by the equivalent circuits described above. The objective is to sum the gains of the individual devices with maximum gain bandwidth product (GBW) as limited by the parasitic capacitances. If each chain operates with a single resistor, i.e. source in the gate line, load in the drain line, it is shown that with two resistor (input and output) terminations per line, maximum GBW is the sum of individual element GBW's, and requires constant‐k image parameter operation of the lines. Under these conditions the gain must peak sharply at the edge of the band. Any deviation from this mode of operation, e.g. to suppress the peak, will result in a reduction of GBW, and one of the illustrative examples consists of two simple non‐image LC ladder chains designed so the response peak is suppressed with nominal deviation from maximum GBW. The above results strictly hold only under the simplifying assumptions that the whole structure is lossless: although the assumptions of the paper represent ideal operating conditions, the results still provide an upper bound for the limits of reachable gain.
On assessing robustness of recursive digital filters
Authors: Fettweis Alfred 
Published: September 2008

AbstractIn a recursive digital filter the need for applying rounding/truncation and overflow corrections to the signal (data) at appropriate locations causes the filter behaviour to differ in a more or less noticeable way from the desired one. The filter is said to be the more robust the less such differences are pronounced. For assessing robustness, a list of specific effects are proposed which can individually be tested. If the filter behaves properly with respect to all these tests it can be expected to behave properly also in any of the situations it will encounter during its operation. The possibility of guaranteeing robustness is discussed.
Comparison of near‐field and far‐field methods for fiber‐optic DMA measurements
Authors: Behles Manfred , Unrau Udo 
Published: September 2008

AbstractThe near‐field and the modified far‐field techniques to measure the mode power distribution in a multimode optical fiber with graded‐index profile are analyzed for their sensitivity to measurement errors by computer simulation and are directly compared by measurements on a biconically fused coupler. It is found that the near‐field technique is quite insensitive against various measurement errors except of an incorrect determination of the core‐cladding boundary. In contrast to this the modified far‐field method needs high‐precision measurement equipment and measurement results appear unreliable. Therefore, the near‐field or the ordinary far‐field technique are recommended for mode transition matrix measurements.
Interconnections technologies for VLSI circuits
Authors: Santi Giorgio De 
Published: September 2008

AbstractVLSI technologies led to the possibility of integration of more than a million of active devices on a single silicon chip. A significant part of the effort in the geometrical circuitry shrinkage was set in development of suitable interconnection technologies. The goals persued were the improvement of the electrical properties (conductivity and contact resistance) with the simultaneous improvement of reliability performances.
IC packaging and interconnections‐status and trends
Authors: Pfahnl Arnold 
Published: September 2008

AbstractThis paper first presents an overview of present packaging technologies and their market shares for simple and complex (VLSI‐type) IC's, and the resulting trends and driving forces for future packaging developments. Then some of the limiting parameters of packaging of high performance IC's are outlined. The importance and cost of reability evaluations, trends in component qualification procedures, and their combined effects on device manufacturing technology are discussed. Finally, interconnection methods to the next packaging level (PWB etc.), the related assembly technologies, and the subsystem performance factors are described.
VLSI reliability: Contributions from a three year national research program
Authors: Soncini Giovanni , Canali Claudio , Zanoni E. , Cors Francrsco , Diligenti Alessandro , Fantini Fausto , Monaco Vito A. , Masetti Guido , Morandi Carlo 
Published: September 2008

AbstractThe continuous trend to further I.C. miniaturization implies increased local electric field strength and power dissipation density, and a perverse scaling, behaviour of metal interconnections and contacts. This will result in new failure mechanisms while old ones, non under control, may become a threat again.This work reports on the most relevant results, related to VLSI reliability, obtained by the seven University Research Teams involved in a three years Research Program sponsored by the Italian Ministero Pubblica Istruzione.In particular new methods to investigate electromigration and to localize latch‐up phenomena have been successfully developed. Also test and diagnosis techniques to analyze faults in digital I.C. with emphasis on ECL and custom VLSI have been studied, and electromagnetic interference effects, in operational amplifiers have been modelled and simulated.
Optimum and suboptimum detection of weak signals in cyclostationary non‐gaussian noise
Authors: Izzo Luciano , Paura Luigi , Tanda Mario 
Published: September 2008

AbstractThe paper deals with the detection of a signal in additive non‐Gaussian nonstationary noise, with reference to the case where the time‐varying noise intensity exhibits ciclostationarity. The locally optimum noise‐synchronized detector is shown to be the locally oprimum detector for stationary noise preceded by a time‐varying invertible transformation. Since the implementation of such detector is quite involved owing to the requirements that the exact waveform of the noise intensity variations is known and a perfect synchronization of the receiver to such variations is available, the paper proposes also two suboptimum detection structures. The former is the locally optimum detector for the stationary white noise, designed with reference to the time‐averaged value of the periodic noise intensity; the latter performs at the same time an estimate (achieved by two different algorithms) of the noise intensity and the signal detection. The performances of all considered detectors are evaluated and a comparison among them is made via computer simulations.
Implementation of multirate systems by digital signal processors
Authors: Wintermantel Jörg 
Published: September 2008

AbstractThe progress in the field of digital signal processing leads to the development of digital multirate techniques. Due to the fact that every single part of the whole system is processed with a minimum sample rate these techniques result in a very advantageous realization of a digital system with respect to the required processing time. In this paper a systematic procedure is shown leading to an efficient implementation of such multirate systems by digital signal processors. With the introduction of appropriate measures it is possible to make statements about the efficiency of the implementation with respect to the available arithmetical capacity of the signal processor. The presented method is demonstrated by the example of the implementation of a voice frequency telegraph FSK‐modem by a digital signal processor.
A collisionless tree LAN with simultaneous transmission and high throughput: A performance study
Authors: Marano Salvatore 
Published: September 2008

AbstractRecently, some local area networks have been proposed where collision avoidance switches are connected in a rooted tree with stations at its leaves and a communication protocol witch makes possible multiple concurrent transmissions. These avoidance collision switches allow the implementation of random access protocol without having to pay the penalty of packet collisions. The collision avoidance LANS presented are the broadcast Star, the Hubnet rooted tree, the Tinker‐Tree and the Alberonet. In this paper a modified version of station and switch protocols is proposed in order to improve Alberonet performances. In particular, simulation results about performances of new protocols are compared with those obtained previously for Alberonet protocol and for different traffic distributions and network characteristics (size, packet length, etc.,). These results show that Alberonet performances are particularly improved with local traffic distribution. Moreover, improvements are more pronounced when modified station and switch protocols are combined. Finally, some considerations are provided which partially justify why new protocols work better than Alberonet protocols.
From R&D laboratories reduction of the chip area of MMIC distributed amplifiers
Authors: Øifot Anton M. , Pedersen Øystein 
Published: September 2008

AbstractThis paper presents a principle for reduction of the chip area of MMlC distributed amplifiers. It is based upon analysis of the attenuation on the drain line, and results in partly circular gate and drain lines as the basic configuration. Measurements show that s21of an MMlC realization of this principle is approximately 1 dB better thans21of a constant‐kreference amplifier. However, s22and the noise figure are not as good. The achieved reduction of the chip area is approximately 36.5%.
Latch‐up in CMOS circuits: A review
Authors: Sangiorgi Enrico 
Published: September 2008

AbstractIn CMOS technologies, rapidly becoming the most important ones for VLSI microelectronics, the inherent phenomenon of latch‐up, represents one of the most serious limitations for further dimension scaling in the deep sub‐micron range. For this reason latch‐up has attracted a lot of attention in the last decade and a deep understanding of its essential features has been achieved, although a few specific problems are still to be satisfactorily solved.
A new test structure for recombination measurements in thin si layers for VLSI structures
Authors: Bellone Salvatore , Spirito Paolo 
Published: September 2008

AbstractThe capability of two recently proposed measurements methods to evaluate recombination properties of thin layers is discussed. Both methods make use of a novel test structure which allows one to evaluate a) the lifetime profile along submicron epilayers and b) the recombination velocity set by a generic heavily doped layer. Measurements performed on 1 μm thick epilayers demonstrate that the recombination lifetime in these layers is not correlated with the doping level and it has values lower than those reported in thicker layers. Moreover, experimental data collected n+ layers of different technology suggest a phonon‐assisted lifetime value much lower than that reported in literature for uniformly doped bulk material.
Simulation of surface effects in planar GaAs MESFET structures by use of a quasi‐2D model
Authors: Brockerhoff Wolfgang , Versteegen Michael , Bertenburg Ralf , Seiler Ulrich , Heime Klaus 
Published: September 2008

AbstractSurface effects in planar submicron GaAs MESFET are investigated in detail by use of a quasi twodimensional model taking into account the nonstationary transport effects in the channel which are very important for simulation of submicron structures. The model explains the transconductance compression in submicron MESFET due to the influence of the free surface in the parasitic gate‐source and gate‐drain region. The dependence of device performance on the surface potential is shown.
Simulation of surface state dynamics on GaAs MESFETs
Authors: Barton Trevor M. 
Published: September 2008

AbstractThis paper describes a model for surface states on GaAs MESFETs which is used to characterise the dynamic behaviour of these traps under pulsed operating conditions. The surface charge due to trap filling is shown to be highly non‐uniform between the gate and the drain, and the form of the surface charge distribution is found to depend on the current‐voltage characteristics of the gate Schottky contact. The trap filling is calculated in a self‐consistent manner within the framework of a two‐dimensional unipolar physical simulation. The resulting model is used to investigate some anomalous features of the behaviour of the MESFET. In particular, time dependence of the gate‐drain breakdown voltage under transient conditions is explained in terms of a reduction on the gate edge electric fields as surface states near the drain end of the gate fill with excess electrons and thus become more negatively charged at high values of the drain‐gate voltage. This excess surface charge modifies the electric fields near the drain end of the gate. These calculations are supported by experimental measurements on a real device.
Simulation of short‐channel and surface effects in submicron GaAs MESFETs
Authors: Makowitz Rainer , Brockerhoff Wolfgang 
Published: September 2008

AbstractA transient two‐dimensional hydrodynamic device simulator is presented that allows an accurate modelling of charge transport in unipolar devices made of multiple valley semiconductor material. Carrier energy balance is included to account fon non‐equilibrium transport with emphasis on heat transport by convection, which is normally not considered by GaAs device simulators. The transport model allows investigation of realistic GaAs MESFET's fabricated by ion‐implantation with gate lengths down to 0.2 μm and high channel doping.The causes of various short channel effects, namely threshold voltage variation and trans‐conductance compression are examined. It is shown that poor pinch‐off behaviour of devices with short gates has its origins much more in drain induced barrier lowering than in substrate conduction. As drain current increases with shorter gate length it could be expected that trans‐conductance would also be higher because of the larger amount of current that can be controlled by the gate. Instead, lower transconductance at zero gate bias is observed experimentally. It is known that this phenomenon can be attributed to surface depletion effects. TO test this hypothesis, a simple model for a uniform surface charge density has been included in the sirnulator. First results are in good agreement to measured dc‐parameters. Simulation also indicates that the channel narrowing due to surface depletion leads to travelling domain oscillations that are visible in the terminal currents.
Structural optimization of millimeter‐wave subhalf‐micron gate MODFETs
Authors: Shawki Tarek , Salmer Georges 
Published: September 2008

AbstractA study of the variations of the small signal parameters of subhalf‐micron‐gate Het‐erostructure Field Effect Transistors HFETs with device scaling (aspect ratio), gate offset in the recessed zone and hot‐carrier confinement by buffer barriers is carried out for the sake of optimizing sumicron HFET structures for 40–100 GHz applications. We discuss the performance limits of existing structures and investigate new concepts and approaches to circumvent these limitations based on thorough understanding of device physics gained from 2D energy modeling. We project a net improvement in HFET millimetric performance using subhalf‐micron‐gate pseudomorphic structures which we expect to have maximum oscillation frequencies in excess of 400 GHz in the near future.
Harmonic distortion in nearly sinusoidal oscillators
Authors: Borys Andrzej 
Published: September 2008

AbstractAn approach for calculation of harmonic content (h) in nearly sinusoidal oscillators is presented. It uses Volterra series to develop explicit expressions, which are then used to discuss the dependence of h and the dependence of amplitudes of harmonics upon the feedback and upon the oscillation‐amplitude. Finally, the oscillator determining equation is written for two different fictitious points of cutting of the loop to illustrate uniqueness of this equation. Moreover, it is shown that the harmonic content h is generally different at different points in the oscillator‐loop.
Multi‐threshold and signal trend forecasting algorithms for hand‐off in cellular communications
Authors: Muñoz‐Rodríguez David , Lara‐Rodríguez Domingo 
Published: September 2008

AbstractIn this paper field strength profiles are considered as time series and the use of some prediction techniques in the hand‐off process is examined in order to have meaningful handovers. Different forecasting methods are here considered taking into account parameters as memory size requirements, weighting factors and its effect on the mean square error as well as method applicability. A forecasting method is selected and the obtained results are used in novel handover procedures. This procedures use multiple threshold and take into account trend variation. Application results including effect on number of hand‐offs are here presented and it was observed a reduction on number of hand offs for the examined profiles respect to methods that rely only on current field strenght measurements.
From R&D laboratories: A microprocessor controlled dual‐input integrator
Authors: Nandi Rabindranath , Sanyal Salil Kumar 
Published: September 2008

AbstractA grounded capacitor dual‐input active integrator network configuration is presented. For the digital control of the time constant of the integrator, an array of binary weighted switched resistors has been used. The switch activation is done by a digital code generated by a microprocessor. Experimental results on such a digitally programmable integrator design are included.
The microstrip spiral antenna
Authors: Cerri Graziano 
Published: September 2008

AbstractThe Archimedean printed spiral antenna is investigated by numerical methods, usjng the Green's function for stratified media.The integral equation for the current distribution is obtained by imposing the condition of vanishing total electric field tangential to the conducting strip and solved by application of the method of moments.Knowledge of the current on the arms of the antenna allows the evaluation of input impedance and radiation characteristics of the spiral.
High speed and coherent transmission components
Authors: Speier P. , Wünstel K. , Hildebrand O. 
Published: September 2008

AbstractThis paper focusses on research and development activities for discrete components used either in high speed direct modulation or coherent systems, respectively. By taking full benefit of highly advanced epitaxial growth techniques like LPMOVPE and GSMBE new device structures have been realized.On the transmitter side a SIBH laser structure is reported which is especially designed for extremely low parasitics allowing for a transmission speed in excess of 10 Gbit/s. Results on DFB‐MQW lasers are presented. By making use of two dimensional effects these lasers have shown low threshold currents, high output power as well as narrow linewidth, which is of strong interest for both high bit rate and coherent transmission, Wavelength tunable lasers, such as multisection DFB or DBR lasers as well as a YCC‐I3 laser, are investigated. With 3 section DFB‐lasers a linewidth of 3.5 MHz has been obtained. A 4‐channel FSK transmission experiment at 565 Mbit./s has been successfully performed. The passiv DBR lasers have shown a tuning range of 4.2 nm. With the novel YCC‐I3 laser structure an enormous total tuning range of 22 nm together with a continuous tuning range of 1.15 nm with 20 dB sidemode suppression and a linewidth of 35 MHz has been achieved. Semiconductor travelling wave amplifiers are reported with high average internal gain of 28 dB at bias current of 50 mA. Using 4 cascaded amplifiers a 591 Mbit/s direct detection experiment of 279 km has been performed.Results on pin‐photodiodes and APD's are presented. Optimized pin‐detectors have been used to detect 20 Gbit/s pattern in a system experiment. Specially designed APD's are reported with a gain‐bandwidth product of 70 GHz.
Analysis of the influence of spatially localized oxide traps on the capacitance of MIS tunnel diodes
Authors: Nannini Andrea , Bagnoli Paolo Emilio 
Published: September 2008

AbstractA method is proposed to calculate the capacitance of conducting MIS diodes based on a proper solution of the Poisson equation, which holds for any type of trap distribution in the oxide layer. This approach allows us to calculate the electric field and the voltage drop along the whole MIS structure, thus arriving at a general expression of its capacitance. By using these results, we obtain, as a special case, the usual expression for MIS diode capacitance in the presence of interfacial states. The theoretical l/Cz vs reverse voltage characteristics of junctions with spatially distributed oxide traps present different slopes and voltage axis intercepts in comparison with those calculated by localizing interfacial states at the insulator/ semiconductor interface only.
Improving the performances of a radiopaging system by means of a new demodulation procedure
Authors: Ettorre Giuseppe , Marietti Piero 
Published: September 2008

AbstractThis work deals with the problems encountered in radiopaging systems employing the POCSAG code. In order to integrate the receiver's components, a Direct Conversion Receiver (DCR) should be used. When a simple demodulation procedure is employed problems due to the unacceptably high BER arise. The paper describes two solutions of the problem and gives experimental results showing how they reduce the BER in a common RF environment.
Custom integrated circuits for audio processing and signalling in vehicular units
Authors: Chiappano Giovanni , Colamonico Armando , Donati Marcello , Maloberti Franco , Montecchi Federico , Palmisano Giuseppe 
Published: September 2008

AbstractThe circuitry for the audio signal and subaudio signalling processing on the new vehicular unit for Italian Mobile Radio System is described. The overall system was realized with two different kinds of CMOS custom circuits and a few other discrete components. The two chips were designed with the switched capacitor (SC) technique and integrated in a 3u double poly CMOS technology. The system is fed by a 5V single power supply and dissipates about 140 mW.