bluuebunny/crossref_metadata_2025_split huggingface dataset:
A scheduler based on the demand page‐stealing for large‐scale programs
Authors: Murakami Ken‐Ichiro , Matsumoto Takaaki , Kurata Masahiro , Nakao Masayoshi 
Published: July 2007

AbstractLarge‐scale programs (i.e., LSI‐DA) and simulation programs require a working set size of several Mbytes and a long execution time. When executed in parallel with interactive jobs, large‐scale jobs exert a degrading effect on the processing of interactive jobs. In addition, the turn‐around time for large‐scale jobs is degraded. It is therefore necessary to limit the amount of real memory which is made available for large‐scale jobs. However, a sound method for determining the limit has not yet been established.This paper proposes a method for improving the turn‐around time of large‐scale jobs without affecting the processing of interactive jobs executed in parallel. Turnaround time is improved by avoiding the swapping of large‐scale jobs. Furthermore, a look‐ahead push method is employed to ensure some given mean response time for interactive jobs when the memory load suddenly increases. Another feature of the method is that the limitation on real memory is adjusted automatically, thus eliminating the need for the user to set the limit. Simulation results indicate that the adverse effect on interactive jobs is minimized and that CPU utilization by large‐scale jobs is improved by a factor of two or more in systems in which a large number of terminals are connected.
Recovering three‐dimensional structure and motion of jointed objects from orthographically projected optical flow
Authors: Shibata Tsutomu , Sugihara Kokichi , Sugie Noboru 
Published: July 2007

AbstractWhen humans observe two‐dimensional projected images of a moving object, they can recognize its three‐dimensional structure and its motion. This paper presents a method which can recover the three‐dimensional structure from the orthogonally projected image of a jointed object. First, a method is presented for a rigid rod, when the direction of the angular velocity is spatially fixed. Then, the three‐dimensional structure and motion can be recovered by observing the positions and velocities of both ends on the image. The method is extended to the case of two moving jointed rigid rods, where the direction of the angular velocity vector of the rotational motion of one rod is spatially fixed, and that of the other rod is fixed relative to the former. The method can recover the three‐dimensional structure and motion by observing the positions and velocities of the ends and the joint. By a computer simulation, a satisfactory result was obtained.
A method for extracting three‐dimensional information using cone‐shaped beams of light
Authors: Feng Kai‐Hua , Sugihara Kokichi , Sugie Noboru 
Published: July 2007

AbstractThis paper proposes a method which extracts the three‐dimensional information from the single‐view image obtained by projecting a texture on the surface to be measured. In the proposed method, the texture is generated by projecting a number of cone‐shaped beams of light from point sources on the object surface. Based on the generated texture, the three‐dimensional measurement is performed. Since it is difficult to obtain explicit information on the shape of the surface from a single image, more than one light source is used. In other words, two images are obtained by a single camera by varying the location of the point source. By combining the processings of those two images, a simultaneous estimation is made on the normal vector and the three‐dimensional coordinate of each point on the image. Compared with the method by two‐eye stereo‐taxic vision, no processing is needed for determination of correspondence. Compared with the method using slit‐light, less time is required for the delta acquisition. Compared with the method utilizing texture, the extraction can be performed without a priori knowledge about textures on the surface. The extraction can be performed only by the local process of the object surface. These are the features of the method. The result of applying the proposed method to the computer‐simulated images and real image are presented, together with the discussions of the future problems.
A distortion model of handwritten characters and evaluation of its power of expression
Authors: Kondo Shozo , Attachoo Boonwat 
Published: July 2007

AbstractThis paper discusses a distortion model for handwritten characters and its ability of representation. The following three assumptions are made in constructing the distortion model: (1) a standard figure is pre‐set in correspondence to each character category; (2) the handwriting process is a sequential system with the standard figure as the input and the figure with distortion as the output; (3) the whole distortion is a combination of the deterministic and the stochastic distortions. The distortion model for the handwritten characters is constructed under the above assumptions. The feedback by the visual system during the handwriting process is regarded as a resorting force which affects a control on the stochastic distortion. The standard figure is considered as a combination of several elements, and the elements are estimated for each individual from handwritten character data. The distorted figure which is generated from the estimated standard figure, is considered to represent the handwritten character of the individual. Finally, the distance between figures is defined, and using it as the measure, the representation ability of the proposed distortion model is evaluated, indicating the usefulness of the model.
Load scheduling schemes using inter—PE network
Authors: Hiraki Kei , Sekiguchi Satoshi , Shimada Toshio 
Published: July 2007

AbstractThe load distribution among processing elements (PE) in the parallel computer system is one of the major factors affecting the performance of the entire system. This paper discusses the dynamic distribution scheme which distributes the load at the execution of the task. The major factor, which affects the performance in the dynamic load distribution scheme, is the information concerning the loading situation of each PE and the data transfer for distributing the load. This paper proposes a dynamic load distribution scheme, which reduces these overheads considerably by utilizing the network. The idea can be applied to both the circuit‐switching network and the packet‐switching network. Especially, the scheme based on the packet‐switching network is one of the load distribution schemes suited to the instruction‐level data‐driven computer, using the packet as the major communication means among PE's. Based on the proposal of the scheme, the performance of the system is evaluated for a typical configuration example for the parallel processing program. It is verified as a result that the proposed system operates very closely to the ideal dynamic load distribution system.
Analysis of memory fan effect by paired association
Authors: Hirai Yuzo , Hiwatashi Kenji , Kikuchi Tomoko , Kamijo Ken‐Ichi 
Published: July 2007

AbstractThree kinds of psychological experiments were performed by a paired‐association paradigm in order to investigate the properties of human memory. The experiments are based on the fan effect where a longer time is required for retrieval with the increase of the number of items associated with an item. In the first experiment, the association pair of meaningless items is used as the object of memory and the retrieval time is measured for the cued recall and recognition tasks. It is seen that while the fan effect is produced in the recognition task, it is not produced in the cued call recall task. In the second experiment, the seman‐tically related association pair (noun‐verb and noun‐noun) is used and the retrieval time is measured in the same way as in experiment 1. As a result it is seen that the fan effect is produced in both recognition and cued recall tasks. The obtained results seem to suggest that a difference exists in the memory structure for the meaningless and semantically related items. It is also suggested that there is a difference in the memory strategy based on the meanings. In the third experiment, the association pair is used where a verb and a noun are associated with the same noun. As a result of the cued recall task, it is shown that the verb is easier to be recalled than the noun. This will be accounted for by assuming that a kind of case structure exists in the memory.
Analysis of list structures generated by lisp functions
Authors: Ohta Yoshikatsu , Yoshida Yuuji , Fukumura Teruo 
Published: July 2007

AbstractThe occurrence of garbage cells generated by pure‐lisp like programs is formalized. First, we define some classes of LISP functions which characterize the properties of list structures generated by them. Then using these classes, we formalize the occurrence of garbage cells. We also present some results of analysis for pure‐lisp interpreter programs written in LISP.
Error‐secure and error‐propagating concepts for strongly fault‐secure systems
Authors: Nanya Takashi , Kawamura Toshiaki 
Published: July 2007

AbstractThe self‐checking system refers in general to a class of logical systems with an ability to detect a fault during operation. Especially, the self‐checking system with the property that it never produces a code word in a fault, continuing the correct code word output until a noncode word is produced as the output, is called strongly fault‐secure system (SFS). Numerous studies have been made on the SFS systems and the realization of the totally self‐checking (TSC) system, which is a special case of the SFS system. Various kinds of functional circuits (combinational and sequential circuits as subcircuits) and detecting circuits have been discussed. However, there has been little discussion on the condition to be satisfied by the subsystem in order that the system composed of subsystems satisfies the SFS condition. This paper proposes two new concepts concerning the errors produced in the interface between subsystems: the error‐secure and the error‐propagating properties. Using these concepts, the condition to be satisfied by the interface in the SFS system is presented. The proposed concepts are useful in the SFS design of a complex system composed of a large number of subsystems, such as microprocessors.
Description and verification of protocol by temporal logic
Authors: Koshida Ichiro , Saito Tadao , Inose Hiroshi 
Published: July 2007

AbstractWhen a new communication protocol is formulated, some method for protocol description and verification must be employed to describe and verify that protocol. This paper proposes a protocol description method based on McDermott's temporal logic. The features/characteristics of this method include: (1) The ability to describe “event” and “changes of fact” as they occur; (2) Its temporal logic is suitable for description of continuous time element as well as timeout; and (3) Its temporal logic is effective in protocol verification. A canonical form for protocol description is introduced that enables the translation of any logical inference expression into the standard form. The effectiveness of the proposed method is demonstrated by performing the description and verification of Stenning's protocol.
A new video‐thresholding method for recognition of low‐quality stamped alphanumerals
Authors: Nakano Tomoaki , Ozeki Osamu , Yamamoto Shin 
Published: July 2007

AbstractWith the widespread use of factory automation, there has been an increasing demand for the recognition of stamped characters. The stamped characters are sometimes of high‐quality, and sometimes of low‐quality, due to the variation of hollow depth and shape. This paper discusses the thresholding method for the recognition of such low‐quality stamped characters. The proposed method determines the optimum threshold characteristic for each stamped character, by which the thresholding for each character is performed. The recognition experiment was performed using 120 samples of stamped characters O, D and 8 of low quality. Ninety‐four samples were recognized correctly by the traditional fixed‐thresholding method, while all 120 samples were recognized correctly by the proposed optimum thresholding method. The recognition rate was examined for 2000 samples composed of sixteen alphanumerals. The correct recognition rate was 99.8 percent, indicating that the proposed method is effective. The stamped character recognition system has been developed for the cylindrical machine part, which can recognize 3 digits of sixteen alphanumerals in 0.95 s.
Intelligent problem‐solving system based on model building method
Authors: Ohsuga Setsuo 
Published: July 2007

AbstractThis paper discusses the conceptual design of a knowledge processing system. First, by means of knowledge processing technology, a new relationship is established between man and computers, and it becomes possible to adopt a new problem‐solving style. The paper discusses also the need to analyze the types of problems man has to solve, the manner of problem solving, and the limit to the capability of knowledge processing to design an effective computer‐aided problem‐solving system. It is concluded that the new problem‐solving system must be a knowledge processing system founded on the model‐based method. Then the requirements for the knowledge processing system and, in particular, for the knowledge representation language, are discussed. Finally, an example is used to show that a system satisfying these requirements is possible.Here, the importance of the model building concept is stressed for establishing the new problem‐solving style and the declarative langauge including data structure for realizing the knowledge processing system that can aid the process. In general, the real problems are very complex, and it is impossible to solve them by a simple procedure. However, we have to approach the solution through a trial‐and‐error process. The knowledge processing system must be able to aid man in this process very naturally and without any restrictions on man's capability.
Special parallel processor for lu decomposition of a large‐scale sparse matrix
Authors: Asai Hideki , Asai Mitsuo , Tanaka Mamoru 
Published: July 2007

AbstractThe analysis of a nonlinear network is reduced to the solution of a system of equations at each step of Newton's method. In the solution by the direct method, the highspeed realization of the LU decomposition of an large‐scale sparse matrix has become important with the development of the integrated technology. In the past, the applications of the array processor and the supercomputer have been considered. However, the array processor cannot utilize the sparsity of the matrix, resulting in an impractical system with too many processor cells. The efficiency of the vectorization is a problem in the super‐computer, when it is used for the Gauss elimination only for the nonzero elements in the matrix. This paper proposes a dedicated processor for LU decomposition of a large‐scale sparse matrix, which can utilize the sparsity of the matrix and can be realized with a practical number of processors. The processor is composed of q local units, corresponding to the nonzero elements in each row of the coefficient matrix, and those units operate in parallel. In the processing of a sparse matrix, the matching of the label is required in the Gauss elimination. It is realized with a high speed by the data‐shift operation by the inter‐register transfer. Furthermore, a processor with a hierarchical memory structure is proposed which can cope with the case where the number p of nonzero elements in a row exceeds q.
Polytonic fault‐free combinational circuits for alternate‐data‐retry
Authors: Naito Sachio , Fujinawa Osamu 
Published: July 2007

AbstractThe alternate‐data‐retry (ADR) is a scheme which performs the retry using the 1′s complement of the input data, when an error is detected at the output, etc., of the logic circuit. By applying the scheme to the data‐bus and memory unit where the data are processed without modification, all single stuck‐at‐faults can be masked without considerably increasing the hardware complexity. ADR is also known to be useful for the circuit realizing the self‐dual function, such as adder, even though the data are modified. In the circuit realizing the self‐dual function, however, there may be produced a fault which is not masked by ADR, if the circuit contains a gate with two or more fan‐outs. This paper clarifies the necessary and sufficient condition for such a fault to exist. Based on the result, a circuit construction is proposed in which all single stuck‐at‐faults in the circuit can be masked by ADR, when any logical function is realized as a combinational circuit. By extending the method, a construction of the combinational circuit is shown, in which the double stuck‐at‐fault can also be masked, by employing four different inputs.
A quantization method of line drawings using directional‐difference codes with adaptive line segments
Authors: Ishii Ikuo 
Published: July 2007

AbstractThis paper proposes a highly efficient coding method suited to the storage and transmission of complicated line drawings such as topographical map. Instead of using the method based on the fixed‐length segment such as Freeman's chain code, the segment length is made variable according to the state of the curve. The high efficiency is realized by further adding the directional‐difference code. In the method employing variable‐length segment, there is a danger that the approximate error is increased with the length of the segment. Consequently, a scheme is employed in which the permissible error is specified, and the coding is performed within the error limit. To simplify the encoding procedure, several quantization templates are prepared with different segment lengths, and the approximating segment is selected by taking the template according to the state of the curve. Avoiding the increase of coding complexity by adding the template discrimination code, the template to be used is selected based on the code sequence generated in the past. By this scheme, although depending on the complexity of the line drawing, the coding complexity can be reduced by 25 to 40 percent considering only the effect of variable segment length.
Ultrasonic nonlinear parameter CT using nonlinear interaction of sound waves
Authors: Nakagawa Yoshikatsu , Nakagawa Masao , Yoneyama Masahide , Kikuchi Makoto 
Published: July 2007

AbstractThis paper proposes a new ultrasonic CT using the nonlinear interaction between two ultrasonic waves. Two finite‐amplitude waves with different frequencies are radiated along the same axis in the same direction as the primary waves. The secondary wave produced at the difference frequency is measured as the projection data to reconstruct the distribution of the nonlinear parameter within the object. Also reconstructed is the distribution of the attenuation coefficient from the projection data of the primary wave. Since soft tissues exhibit remarkable differences in both nonlinear parameter and attenuation coefficient, this method, which yields two kinds of distribution images of characteristic parameters in parallel, will turn out to be an effective means of information acquisition from the biological object. This paper describes the principle of the proposed ultrasonic CT, and presents the result of a fundamental basic experiment using agar gel phantom as the object. Experimental results indicate the validity of the proposed method.
One‐dimensional bounded cellular acceptor with rotated inputs
Authors: Taniguchi Hiroshi , Inoue Katsushi , Takanami Itsuo 
Published: July 2007

AbstractThe authors previously introduced a two‐dimensional automaton with the following structure. The input two‐dimensional tape is rotated clockwise by 90, 180 and 270 degrees. For each position, the input is scanned by a one‐dimensional serial‐parallel array acceptor, and the acceptance or rejection is determined by combining the result of scanning by intersection ( ) or union ( ). The accepting power of the automaton was discussed. This paper introduces anew the following two‐dimensional automaton. It scans the rotated input by the one‐dimensional bounded cellular acceptor, and the acceptance or rejection is determined by interaction or union. The accepting power of the automaton is discussed with the following results: (1) in any form, the accepting power is properly higher in the scanning by the nondeterministic machine than in the scanning by the deterministic machine; (2) in any form, the accepting power in the scanning by the deterministic machine becomes higher as the number of rotating inputs is increased.
A VLSI architecture for pipeline fft processor
Authors: Takahashi Yukio , Sekine Satoshi 
Published: July 2007

AbstractThis paper considers the fast‐Fourier transform (FFT) which processes a large amount of data, such as image. As a structure for the one‐dimensional FFT processor, aiming at eliminating some restrictions in VLSI design, the constant‐geometry type FFT algorithm and the bit‐serial pipeline floating‐point arithmetic are discussed. The major results are as follows. (1) Using the constant‐geometry algorithm, the memory elements to perform the rearrangement characteristic to FFT can be realized by a uniform structure and uniform control scheme throughout the stages. The memory element for N‐point FFT can be constructed as a simple and regular structure using 2 of N/2‐stage shift‐registers. (2) The multiplication cell with code extender, the serial structure of normalization circuit and the shifter, and the parallel operation covering a longer length than the input word length are employed. By those schemes, the pipeline operation of floatingpoint arithmetic is realized without a guard bit. By this scheme, the restriction in VLSI using the butterfly elements can be reduced drastically. (3) As an additional effect of the regular structure of the memory element, the automatic defecttolerant operation is made possible, using the effective k‐out‐of‐n redundant structure and the self‐testing. By this scheme, the restriction for the VLSI chip‐area can be reduced when the number of sampling points is increased. (4) The one‐dimensional FFT processor can be realized as a modular structure, which is a cascade connection of two kinds of VLSI, i. e., butterfly element and the memory elements.
Determining object attitude and position for bin‐picking tasks guided by an interpretation tree derived from a geometrical modeler
Authors: Ikeuchi Katsushi , Koshikawa Kazutada 
Published: July 2007

AbstractA method is presented in which the position and the attitude of the object can be determined by interpreting the depth map, needle map, and the edge map, following the interpretation tree. Before a matching is tried, the interpretation tree is derived based on the attitude group. The attitude group classifies the attitudes based on the labels of the observable regions. The branch in the interpretation tree is determined based on the dependence of the label on the set of regions. At each stage, the most favorable feature is utilized for the matching at the branch. The matching feature for each attitude group is employed in the precise determination of the attitude in the attitude group. This information is also registered in the interpretation tree. The input information for matching is the edge map obtained by differentiating the density map, the needle map obtained by the density‐difference stereo, and the depth map obtained by the two pairs of density‐difference stereo. The matching is made following the interpretation tree and using the most favorable feature at each stage. The description of the determined position, attitude and the background is stored in the world of geometrical model. Using the stored description, the safe‐grip attitude of the gripper is determined.