bluuebunny/crossref_metadata_2025_split huggingface dataset:
Antimalarial Cation‐dimers Synthesized in Two Steps from an Inexpensive Starting Material, Isonicotinic Acid
Authors: Motoshima Kazunori , Hiwasa Yoshiko , Yoshikawa Mai , Fujimoto Kanji , Tai Akihiro , Kakuta Hiroki , Sasaki Kenji 
Published: July 2007

AbstractMalaria is one of the three major serious infectious diseases in the world. As the area affected by malaria includes a large proportion of developing countries, there is a need for new antimalarials that can be synthesized and supplied inexpensively. To generate low‐cost antimalarials, the MAP series 6–10, bis‐cation dimers, synthesized by amidating the carboxyl group of isonicotinic acid (11) with various amines and by cationizing the nitrogen atoms of the pyridine ring with the corresponding alkyl bromides, were designed. This design enabled expansion of the structural variations of bis‐cation‐type antimalarial compounds. The compounds bearing alkyl or phenyl groups in the amide moieties showed remarkable antimalarial activities in vitro. Moreover, 1,1′‐(1,12‐dodecanediyl)bis[4‐[(buthylamino)carbonyl]pyridinium bromide], MAP‐412 (6 d), exhibited a potent antimalarial activity (ED50=8.2 mg kg−1). Being prepared at low cost, our bis‐cation‐type antimalarial compounds may be useful as lead compounds for inexpensive antimalarials.
Tyings in linear systems of equations modelled with positive and negative penalty functions
Authors: Askes Harm , Piercy Stewart , Ilanko Sinniah 
Published: July 2007

AbstractIn this short note, we focus on tyings (constraints that relate multiple degrees of freedom) modelled by means of penalty functions. In contrast to what is commonly thought, it is possible to obtain convergent results when negative penalty parameters are taken. A mathematical proof and an illustrating example are provided. In particular, we have proven that the results obtained with positive and negative penalty parameters enclose the exact solution from opposite sides. To this end, we have investigated a pseudo‐force that is defined as the derivative of the constraint with respect to the inverse penalty parameter. Copyright © 2007 John Wiley & Sons, Ltd.
Symplectic rigidity, symplectic fixed points, and global perturbations of Hamiltonian systems
Authors: Dragnev Dragomir L. 
Published: July 2007

AbstractIn this paper we study a generalized symplectic fixed‐point problem, first considered by J. Moser in [20], from the point of view of some relatively recently discovered symplectic rigidity phenomena. This problem has interesting applications concerning global perturbations of Hamiltonian systems. © 2007 Wiley Periodicals, Inc.
Partial regularity for harmonic maps and related problems
Authors: Rivière Tristan , Struwe Michael 
Published: July 2007

AbstractVia gauge theory, we give a new proof of partial regularity for harmonic maps in dimensionsm≥ 3 into arbitrary targets. This proof avoids the use of adapted frames and permits us to consider targets of “minimal”C2‐regularity. The proof we present extends to a large class of elliptic systems. © 2007 Wiley Periodicals, Inc.
Theory of weakly non‐linear noisy systems
Authors: Larsen Torben 
Published: July 2007

AbstractThis paper gives a treatment of the theory of noise in general non‐linear multiport systems by use of the Volterra series representation. Expressions for the response of a non‐linear noisy (N + l)‐port system with N signal input ports and one output port under excitation of noise and a deterministic signal at each input port are determined. Noise generated in the system itself is accounted for by equivalent random variable noise voltage or current generators. These internal noise generators are extracted from the system and applied at separate external ports. A noise‐free equivalent of the noisy system is obtained with N signal input ports and Q – I input ports accounting for the systemgenerated noise. the Volterra series representation is used to describe the input‐output response relation of the system. Once the Volterra transfer functions of the system are determined and cross‐and autocorrelations of the noise generators are specified, it is possible to determine the noise performance of the system under arbitrary noise and deterministic signal excitation. the investigation leads to the determination of expressions for the equivalent average exchangeable output noise power density and the average output noise power flow from the system. Expressions for the noise power densitypand the noise power flow at the load of the non‐linear system are determined. As an example of the theory an expression is derived for the effective input noise temperature of a non‐linear system.
Foreground memory management in data path synthesis
Authors: Stok L. , Jess J. A. G. 
Published: July 2007

AbstractThe management of foreground memory is a main issue in data path synthesis. the storage of values in registers and register files not only determines the number of each of them but also has a major impact on the interconnect structure. Both the amount of multiplexing and interconnect are crucial factors to both the delay and area of a circuit. In this paper it is shown that when values are grouped into register files before being assigned to actual registers, significant savings (20 per cent) can be obtained in the number of local interconnections and the amount of global interconnect at the expense of only slightly more register area. These results can be enhanced by splitting the read and write phases of registers and even more by introducing serial (re)write operations for the same value. the value grouping is based on edge‐colouring algorithms that provide a sharp upper bound on the number of register groups needed.After value grouping, the registers are allocated for each register file separately. Algorithms for register allocation published up till now have only considered loop‐free data flow graphs. When these algorithms are applied to data flow graphs with loops, unnecessary register transfer operations can be introduced. In this paper a new algorithm is presented that performs a minimal register allocation eliminating all superfluous register transfer operations. Experiments on a benchmark set have shown that in all cases all register transfers could be eliminated at no increase in register cost.This paper provides a deeper insight to the computational complexity of some problems in the area of data path synthesis. It shows that the various subtasks can be solved exactly using polynomial time algorithms.
Trade‐off prediction and circuit performance optimization using a second‐order model
Authors: Xiangming Xiao , Spence Robert 
Published: July 2007

AbstractA new approach to constrained optimization which is suited to integrated circuit (IC) design is presented and is shown to be additionally capable of the efficient generation of useful trade‐off information. In contrast to existing optimization methods in which the constraint functions are only linearized, the new algorithm employs a newly developed method of using optimization history data to obtain, without extra simulation, a second‐order approximation to both objective and constraint functions. In the new algorithm the search direction created at each optimization iteration is based on this second‐order approximation. As a result the computational efficiency has been greatly improved compared with other constrained optimization methods in terms of the number of function evaluations required, a measure which is crucial in the context of IC design. the effectiveness and efficiency of the new algorithm have been demonstrated by means of some numerical examples which are commonly employed as benchmarks for existing optimization methods and by several electronic circuit examples. In all cases encouraging results have been obtained. It is also demonstrated that the information generated during the last stage of the optimization allows the generation of accurate trade‐off information valid over a wide range of circuit performance.
Analysis of switched networks
Authors: Bedrosian David , Vlach Jiri 
Published: July 2007

AbstractIdeal switches are rarely modelled in network analysis because inconsistent conditions can occur at the instant of switching. This causes standard integration routines to fail. If the initial conditions can be determined, the use of ideal switches can considerably speed up analysis and can make the results easier to understand. This paper, partly a review, presents a method which can handle ideal switching, inconsistent initial conditions, Dirac impulses and signals with discontinuities. It is applicable to networks containing linear or non‐linear elements.
Theory of Transmission Switches and Its Application to Design of CMOS Digital Circuits
Authors: Wu X. 
Published: July 2007

AbstractThis paper distinguishes two kinds of algebra, namely switching algebra and binary signal algebra, in which switching and binary signal variables describe switching states of MOS transistors and signals in digital circuits respectively. Threshold comparison operations, transmission operation and union operation are introduced to connect these two algebras. These new operations conform to the action principle of MOS transistors. Based on the theory of transmission switches proposed in this paper, new design procedures for both constant and variable transmission sources are presented. the logic design of CMOS circuits at switch level is realized and CMOS circuits with simpler construction may be obtained by using variable transmission sources.
Transmission line analysis via taylor series
Authors: Semagina Evelina P. , Beznosova Olga I. 
Published: July 2007

AbstractA simulation technique for transients in transmission lines is presented in which mathematical models of the line and load in the form of integral Volterra equations of the second kind are used. A procedure of numerical analytical solution of these equations is developed on the basis of differential Taylor transforms. A calculation example for the transients in an inductance‐loaded line is presented.
On the universe of stable cellular neural networks
Authors: Chua Leon O. , Wu Chai Wah 
Published: July 2007

AbstractA cellular neural network (CNN) is a novel analogue circuit architecture with many desirable features. This paper extends previous stability results of CNNs to include classes of strictly sign‐symmetric and acyclic templates. We show that most of the 3×3 strictly sign‐symmetric templates are stable almost everywhere, with the unknown templates reduced to three classes. We also introduce template graphs and CNN graphs and utilize them to obtain results concerning stability and irreducibility of CNN templates.
Testability in analogue cellular neural networks
Authors: Rueda A. , Huertas J. L. 
Published: July 2007

AbstractThis paper addresses the problem of testing an ACNN by postulating the need for including some extra hardware to render feasible a postfabrication test. the work presented here deals with a test methodology based on adding some extra circuitry to every cell of a regular ACNN. This methodology is just an initial proposal for taking advantage of the network regularity to perform a global test which can be externally interpreted and hence has potential application for reconfiguring the network.
A digital multiprocessor hardware accelerator board for cellular neural networks: CNN‐HAC
Authors: Roska T. , Bártfai G. , Szolgay P. , Szirányi T. , Radványi A. , Kozek T. , Ugray Z. S. , Zarándy A. 
Published: July 2007

AbstractAnalogue realizations of neural networks are superior in speed. the hardware accelerator boards using catalogue programmable VLSI ICs represent a trade‐off having higher reconfigurability and lower cost. This paper presents such a solution for a cellular neural network (CNN).The architecture of the present design (CNN‐HAC) using four standard DSPs to calculate the transient response of a one‐layer CNN containing (0.25–0.75) × 106 analogue neural cells (depending on the type of template) is presented. the architecture and also the design principles are independent of the number of processors. the actual design was made in the form of a PC add‐on board.The global control unit, which connects the board to the host firmware and communicates control signals to/from the local control units of the DSPs, was realized mainly with EPLDs.A special correspondence between the virtual processing elements—calculating the time‐discrete models of the analogue neural cells—and the physical ones is discussed in detail. It is realized in an architecture with a simple, two‐directional interprocessor communication. This architecture can be ‘scaled down’ using faster processors, EPLDs and memories. the present version runs with 2 μs/cell/iteration speed.
A CNN handwritten character recognizer
Authors: Suzuki H. , Matsumoto T. , Chua Leon O. 
Published: July 2007

AbstractCNNs are used for feature detection in handwritten character recognition. Detected features are fed to a simple classifier network. Performance was tested by using two well‐known ETL data base series: (i) ETL3 consisting of numerals, alphabets and several symbols and (ii) ETL8B2 consisting of Japanese Hirakana characters. the average recognition rate for ETL3 is 94.8%, while that for ETL8B2 is 85.7%. Both series include ‘hard’ characters so distorted that even humans cannot recognize them.
On the evaluation of higher harmonics in nearly sinusoidal oscillators
Authors: Buonomo A. , di Bello C. , Greco O. 
Published: July 2007

AbstractAn approximation method for calculating the periodic oscillations of nearly sinusoidal oscillators is presented which is based upon the classical pertubation method. Both the frequency and the amplitude of the harmonics of the oscillation are calculated to a first approximation by very simple relations which are useful for deriving a design criterion.To demonstrate the possibilities of the proposed method, some illustrative examples are provided.
Synchronization of a forced relaxation oscillator
Authors: Roppel Carsten 
Published: July 2007

AbstractThe paper presents a method of synchronizing a relaxation oscillator to an external signal. the synchronization mechanism is linear and a detailed analysis is given. Very fast acquisition is shown to be possible. the oscillator synchronizes to the frequency of the forcing input or to a sub‐ or superharmonic. Possible applications include highspeed timing recovery systems where high acquisition speed is required.
Linear networks and systems depending polynomially on parameters: Stability for large values subject to tolerance errors
Authors: Ciampa Maurizio , Poletti Mario , Terreni Pierangelo 
Published: July 2007

AbstractThis paper studies the problem of the stability of linear networks or systems depending polynomially on parameters when considering large values of the parameters. It has been taken into account that only the specification of nominal values and tolerances—and not of actual values—is physically meaningful.Algorithms to test the existence of arbitrarily large nominal values of the parameters which ensure stability either with zero tolerance, with non‐zero tolerances depending on the particular nominal values or with a non‐zero tolerance independent of the particular nominal values are proved to exist.Depending on the type of response of the above‐mentioned algorithms, analytic, polynomial and monomial functions—in a single suitable variable—that describe arbitrarily large nominal values which ensure stability in the case of zero tolerance, polynomially decreasing non‐zero tolerance and constant non‐zero tolerance respectively are proved to exist.When a monomial description with constant non‐zero tolerance is assured, algorithms which give the degrees and—in terms of rational numbers—the coefficients of the monomials and the constant non‐zero tolerance are proved to exist.Similar algorithms when only an analytic description with zero tolerance or a polynomial description with polynomially decreasing non‐zero tolerance is ensured cannot exist.
Design of high‐power multiplexers with interacting, synchronously tunable channels
Authors: Rhodes J. D. 
Published: July 2007

AbstractA novel circuit configuration is presented for tunable combining multiplexers. Using reciprocal devices, the new circuit enables any channel to be tuned without the adverse effect of frequency pulling on the other channels. Experimental results in the 900 MHz band using dual‐mode dielectric resonators are in close agreement with theory.
An approach to modelling DC‐DC converter circuits using graph theoretic concepts
Authors: Tse C. K. , Lee Y. S. , So W. C. 
Published: July 2007

AbstractAn approach to modelling DC‐DC converter circuits based on graph theoretic concepts is discussed in this paper. the DC‐DC converter circuits are treated as networks containing switches, with the magnitudes of their associated eigenvalues much smaller than the switching frequency. the procedure for modelling this class of networks essentially involves separating the original network into two N‐port networks, one containing those branches responsible for all phenomena peculiar to the switching action and the other containing the remaining branches of the network. the two N‐port networks thus formed lead to a systematic and convenient way of developing low‐frequency circuit models for DC‐DC converter circuits.
The averaging perturbation method for the dominant behaviour analysis of adiabatic single‐controlled oscillators
Authors: Sommariva Antonino M. 
Published: July 2007

AbstractElectrical oscillators are called single‐controlled when their non‐linear elements depend on a unique variable, while they are termed adiabatic when their transient operation signal can be represented as a narrowband‐modulated Fourier series with only a finite number of dominant components, including the DC one. the novel method presented here allows one to analyse the dominant dynamics, steady state and dynamical stability of such oscillators. the approach devised is perturbative and is termed averaging, since it moves from the differential equation in the oscillator signal to provide a set of simultaneous differential equations in the complex envelopes of the dominant components of that variable. Owing to the treatment generality, investigable circuit topologies comprise a linear lumped time‐invariant network of any order with bias sources, and any number of non‐linear elements, with or without memory, with a common control variable. to illustrate the use of the method, formulae concerning a seventh‐order oscillator are derived.
A spice‐based approach to steady state circuit analysis
Authors: D'Amore Dario , Fornaciari William 
Published: July 2007

AbstractA new SPICE‐based approach for steady state circuit analysis is presented which uses SPICE computational capabilities and a master programme to carry out the periodic response. the master programme implements a suitable method for steady state analysis and is linked with SPICE only via I/O SPICE files. This allows the use of all SPICE analyses together with the new one simply by adding a new statement in the input SPICE file. In this paper the bases of this technique, including the chosen steady state method and the whole system structure, are discussed. Simulation results produced by this technique have been compared, by means of two meaningful examples, with those obtained both by SPICE and by a dedicated simulator for steady state analysis working in the frequency domain.
Tangential nevanlinna‐pick interpolation problem for bounded real matrices—A network approach
Authors: Piekarski Marian S. , Uruski Marceli 
Published: July 2007

AbstractThis paper deals with the so‐called tangential Nevanlinna—Pick interpolation problem for bounded real matrices. This problem can be formulated as follows: given a set of n pairs {(pi,Ki)}, where pi are distinct complex numbers with Re pi > 0 and Ki stands for 2m × li constant matrices, assuming that for every pair (pi, Ki) with pi complex there exists a complex conjugate pair (pi, Ki) and that for every pair (pi, Ki) in which pi is real Ki is also real, find an m × m bounded real matrix S(p) such that [S(pi) 1m]Ki = 0 for i= 1,…,n.The solution of this problem is obtained in an inductive way through the construction at each step of a real lossless multiport section that realizes two complex conjugate pairs or one real pair. After each step the number of pairs (pi, Ki) is reduced by two (if pi is complex) or by one (if pi is real). the procedure is continued until all pairs have been considered. After the last step the final section may be terminated with any bounded real load. the scattering matrix S(p) of the resulting cascade multiport network is bounded real and satisfies the desired interpolation conditions. In this way the tangential interpolation problem is reduced to classical network cascade synthesis by the use of real lossless multiport sections.
Analysis of the effect of periodic fluctuation of switching instants on the transfer characteristics of switched capacitor networks
Authors: Nacaroglu A. , Koksal M. 
Published: July 2007

AbstractA complete description of switched capacitor networks which include an arbitrary number of non‐uniform input and output phases is presented on the basis of the generalized phase transfer matrix by extending a previously introduced state space approach. the input frequency harmonic (main harmonic) of the periodically time‐varying system transfer function is obtained and the effect of periodic fluctuation of the switching instants on the transfer characteristics of the switched capacitor filters is analysed. This procedure also facilitates the evaluation of the effects of non‐uniform multiphase switching. Application of the results to a switched capacitor filter shows that the frequency response is very sensitive to the fluctuation of switching instants.
Design of efficient fir digital differentiators of second and higher degrees by using universal weights
Authors: Kumar Balbir , Roy S. C. Dutta 
Published: July 2007

AbstractWe propose in this paper an efficient design of FIR digital differentiators of degree k, k= 1, 2, 3,…, and their implementation in a novel structure which allows the order to be varied without having to alter the weights used in it. More precisely, we show that by using these ‘universal weights’ in a structure of order Nmax, the order can be varied from N= 3 to Nmax while keeping the weights fixed and retaining the optimality of performance. Mathematical formulae have been derived for these ‘universal weights’ for differentiators performing in the low‐ or midband‐frequency ranges.
Periodic steady state analysis using shooting and wave‐form‐newton
Authors: Kevenaar Tom A. M. 
Published: July 2007

AbstractThis paper describes a method of determining the forced periodic steady state response of non‐linear circuits. the method is closely related to the work of Aprille and Trick Proc. IEEE, 60, 108‐114 (1972) and also to the finite difference method for solving a boundary value problem.The new approach is a shooting method in the sense that in every iteration an initial value problem is solved. It is, however, also a relaxation method, because in every iteration a periodic wave‐form is obtained. This is achieved by solving in each step a linear time‐dependent differential equation whose solution can be easily transformed into a periodic solution satisfying this linear equation. Because the iteration takes place on wave‐forms rather than initial values and every solution satisfies the boundary conditions, the method is robust. It will be shown that for a causal approximation of the time derivatives the iterated wave‐forms are equal to those found using the finite difference methods.
Switched bandstop filters
Authors: Rhodes J. D. 
Published: July 2007

AbstractA new prototype network is derived for a class of allpass networks from which, by a simple switch operation, a cascaded element bandstop filter results. an explicit solution for element values is obtained for the even‐ and odddegree solutions of arbitrary degree. the performance of various degrees is investigated and experimental results are presented for a fifth‐degree suspended substrate stripline bandstop filter operating over a narrow band at 10 GHz.