bluuebunny/crossref_metadata_2025_split huggingface dataset:
Effective methods for suppression of undesired cavity modes using microwave absorbers
Authors: Nogi Shigeji , Fukui Kiyoshi , Kojima Masanobu , Tanaka Satoshi 
Published: July 2007

AbstractTo obtain a method for suppressing undesired modes in a microwave cavity in which a higher‐order mode is desired, the relationship between the location of the absorbers and the suppression effect is evaluated theoretically and experimentally for various suppression methods using microwave absorbers. The suppression methods studied are as follows:(A1) A magnetic absorbing material is placed on the bottom of the cavity in the direction orthogonal to the magnetic field of the desired mode; (A2) the material is placed along the null line of the magnetic field of the desired mode; (B1) a conducting absorber is placed along the null line of the electric field of the desired mode; (B2) the conducting absorber is placed in parallel to the surface current of the desired mode on the bottom of the cavity; (B3) the same is placed along the null line of the surface current.By means of the experiment on the power loss of the absorber for the undesired modes, the suppression methods A1and B1are found effective. Useful results are obtained for the design of the absorber. The experimental results agree qualitatively with the approximate analysis results based on the electromagnetic field in the cavity. The power loss of the desired mode due to the deviation of the location of the absorber is discussed. Further, an experiment is carried out for power combining in the cavity with many active devices, which confirms that the loss of the desired mode is smaller in the method B1than in A1.
Frequency stabilization of a semiconductor laser using the Faraday effect
Authors: Rikukawa Hitoshi , Sato Takashi , Nakagawa Masahiro , Shimba Minoru 
Published: July 2007

AbstractThe frequency stabilization of a semiconductor laser using an absorption line of atoms or molecules has usually been performed by applying a small modulation directly to the injection current.This paper reports one of the frequency stabilization methods without a direct small modulation. This stabilization method uses the Faraday effect to obtain a control signal which is fed back to the injection current. The obtained stability is almost the same value as that in the method using direct modulation.
A high CMRR instrumentation amplifier using common‐mode sampling feedback technique
Authors: Kato Kazuo , Sase Takashi 
Published: July 2007

AbstractIn a practical instrumentation amplifier for low‐level input of 10 mV or less, a high common‐mode rejection ratio (CMRR) of more than 140 dB (107) is desired. This paper considers a three‐operational amplifier‐type instrumentation amplifier as an example and examines the CMRR. Common‐mode sampling feedback is proposed as a means to improve the CMRR. A detailed design procedure is described and an experimental circuit is constructed. The CMRR of 160 dB is obtained, which is comparable to that possible with an insulation amplifier. As a promising application example of the proposed amplifier, the circuit is applied to a high‐speed, low‐level multiplexor system. Satisfactory results are demonstrated. The proposed instrumentation amplifier is suitable for present monolithic technologies.
Integral equation solution method of two‐dimensional electromagnetic fields—a method to employ the transverse field components
Authors: Matsuhara Masanori , Nakamura Keishi 
Published: July 2007

AbstractNew integral equations are introduced in which the transverse electromagnetic field components are unknown for the two‐dimensional (2‐D) electromagnetic scattering problems and electromagnetic waveguide problems. A numerical analysis by the boundary element method is proposed. The conventional integral equations in which the longitudinal electromagnetic field components are unknown are difficult to determine at certain angular frequencies and at certain longitudinal propagation constants for the electromagnetic scattering problem. In the waveguide problem, the spurious modes may enter as nonphysical solutions.The integral equations proposed in this paper do not have conventional difficulties. Here, the integral equations using the transverse electromagnetic fields are derived and the uniqueness of the solution is proven. Further, for practical examples, the integral equations are analyzed numerically by the boundary element methods so that the validity and effectiveness are investigated.
AC hot‐carrier degradation due to gate‐pulse‐induced noise
Authors: Izawa Ryuichi , Umeda Kazunori , Takeda Eiji 
Published: July 2007

AbstractAC hot‐carrier degradation due to gate‐induced noise has been clarified, and a method to suppress noise and to predict ac lifetime is proposed. There have been many arguments on the ac degradation mechanism. This is because the degradation acceleration factor due to the measurement noise was not separated and caused confusion. In particular, the noise generated on the source‐drain electrodes during the gate pulse rise has been found to be an important factor in ac degradation acceleration.The noise is an inductive noise generated by the rapid change in channel current during gate on and off amplified by an inductance due to the source and drain interconnects. If the noise is suppressed, at least for the rise time of more than 10 ns, the carrier trapping and detrapping accompanied by the ac operation can be ignored, and the lifetime can be predicted by the dc hot‐carrier degradation lifetime and the duty cycle.In the future, attention must be given to the ac degradation acceleration due to the increase in the inductive noise by the interconnect scaling. Thus, an interconnect design rule based on the suppression of the source‐drain induced noise is proposed.
Relationship between overwrite repeatability and the disk structure of InSbTe phase‐change optical disks
Authors: Maeda Yoshihito , Andoh Hisashi , Minemura Hiroyuki , Sato Yoshio 
Published: July 2007

AbstractThe overwrite characteristic of an InPbTe phase‐change optical disk is investigated. It is found that the overwritable repetition number of the disk is dependent on the interface structure and adhesion strength between the reflective layer and dielectric layer. To realize optimum thermal conduction and optical characteristics for overwrite, an Mo/Au multilayer reflective structure was developed which has reflectivity and thermal conductivity comparable with those of an Au film. After improving the adhesion strength of the multilayer film to the ZnS‐SiO2dielectric film, the overwritable repetition number for 10−5BER increased from 105to 5 × 105.
Application of variably graded mesh to the spatial network method in three‐dimensional space
Authors: Kukutsu Naoya , Yoshida Norinobu , Fukai Ichiro 
Published: July 2007

AbstractAt present, the devices used in the microwave frequency range are highly dense and employed at higher frequencies as evidenced by MMIC. As these technologies are advanced, the mutual effect between the elements and the loss at the junction between the device and the transmission line affect the device characteristics significantly. Solutions of these problems require studies of the electromagnetic field behaviors such as those between the elements and those at the discontinuities.The authors have used the spatial network method and applied it to a number of problems as a numerical technique for analyzing the three‐dimensional electromagnetic field in the time domain. In the traditional spatial network method, the discretization pitches are identical in all directions. However, due to this limitation, an infinitesimal portion must be divided sufficiently so that the total computer storage capacity increased significantly.In this paper, to resolve this deficiency, a formulation of a new spatial network method is described in which the spatial discretization pitches are arbitrary. The capacitive waveguide window and the fin line are used as examples for the analysis. The validity and effectiveness of the approach are demonstrated.
Characteristics of an open‐boundary Čerenkov laser with applied magnetostatic field of finite strength
Authors: Horinouchi Katsuhiko , Shiozawa Toshiyuki 
Published: July 2007

AbstractThe characteristics of a two‐dimensional open‐boundary Čerenkov laser consisting of a dielectric‐coated conducting plane waveguide and a planar relativistic electron beam focused with a finite magnetostatic field are investigated theoretically and the following results are obtained.First, the growth rate decreases gradually as the strength of the applied magnetostatic field increases. In particular, the decrease of the growth rate becomes greater around the value of the magnetostatic field for which the electron‐cyclotron frequency is equal to the electron plasma frequency.In addition, the decrease of the growth rate results from the fact that the lowest‐order mode of the space‐charge wave in the absence of magnetostatic field is turned gradually into a mode of the electron‐cyclotron wave as the applied magnetostatic field increases and it finally disappears as the strength of the magnetostatic field tends to infinity. Furthermore, the wave modes propagated along a relativistic electron beam focused with a finite magnetostatic field are generally hybrid or a combination of TE and TM modes. However, the major portion of the electromagnetic energy is carried by TM modes and the contribution of TE modes to energy transport is very small.
Improvement of multiplexability of double‐layered homogeneously oriented nematic LCD by simultaneous driving method
Authors: Takahashi Taiju , Saito Susumu 
Published: July 2007

AbstractA new driving method (double‐layer simultaneous driving method) is proposed to improve the time multiplexability of compensation‐type homogeneously oriented LCDs by stacking two homogeneously oriented simple matrix LCDs. The experimental results also are shown. Two cells (cell A and cell B) are made of the same LCD material and with the same amount of Δnd. These cells are stacked so that the projected directions of the optical axes onto the electrode surface are perpendicular to each other. By this method, an optical compensation effect can be obtained, and it has enabled good black‐and‐white display.Whereas in the conventional method only one of the two cells is biased, two cells in the proposed double‐layer simultaneous driving method are time‐multiplexed by the optimized bias method with the same duty ratio.During the nonselect state, the rms voltage of VAB = (Vth · VT max)1/2 is applied. By contrast, during the select state, the rms voltages of VA = K · VAB/K are applied to cell A and cell B, respectively. Here, Vth is the threshold voltage, VT max is the rms voltage at which the transmission takes the first maximum in the V‐T curve during the normally black mode (or the voltage at which the transmission takes the first minimum during the normally white mode), and K indicates {(N1/2 + 1)/(N1/2 – 1)}1/2 where N is the number of scanning lines.It has been confirmed that the contrast ratio is improved to 7.5 by the double‐layer simultaneous driving method when the contrast ratio is only 1 when a single layer is driven with the 1/500 duty ratio. Furthermore, the viewing angle characteristics also are improved compared to those of the conventional compensation‐type single‐layer driving method.
Optimization of black and white representation in phase plate mode STN‐LCDs
Authors: Komura Shin‐Ichi , Hirakata Jun‐Ichi , Nagae Yoshiharu 
Published: July 2007

AbstractAn optimization method to achieve good black and white representation in actual driving of phase plate mode STN‐LCDs is proposed. Its effectiveness is confirmed by numerical simulations. In the actual driving, a bias voltage determined by the duty ratio is applied even for the black representation. Therefore, to achieve optimum black and white representation during the actual driving, the film is optimized such that a black representation is obtained for a liquid‐crystal cell under the bias application. For that purpose, the driving voltages must be determined before determining the film condition. Therefore, using the inner product of the complex vectors of the electric field representing two polarizations, optimum driving voltages are determined only from the optical characteristics of the liquid‐crystal cell before the film optimization.Although the film optimization used a method by the Poincaré sphere notation, the wavelength dispersion characteristics of Δnd were also actively optimized. Using numerical simulations, it has been confirmed that good black and white representation with high transmission and good color characteristics can be realized during the actual driving using this optimization method.
An approach to the associative memorization using binary logic operations
Authors: Mihara Masaaki , Kobayashi Toshifumi , Yamada Michihiro 
Published: July 2007

AbstractThe traditional neural system which conducts the paired association has the real coupling coefficients and is not suited to the implementation on digital processing LSI because of its analog property.From such a viewpoint, this paper applies the traditional idea of calculating the coupling coefficients on the real field to the binary field and proposes a system which conducts the paired association using only the logic operation. More precisely, it is noted that the associative law applies to the matrix operation on the real field as well as the matrix operation for the binary code.The coupling coefficients for the binary code for the paired association are derived by applying the sweeping‐out method to the matrix of binary numbers. By this approach, a paired‐associate system is obtained by a simpler training algorithm with easy LSI implementation.This paper describes first the traditional solution of the paired‐associate problem on the real field and then proposes a method of solution based on that approach for the paired‐associate problem on the binary field. The existence condition for the solution of the paired‐associate problem is discussed for the proposed method. Finally, the noise‐reduction power of the proposed method is estimated.
Electron injection characteristics of MNOS nonvolatile semiconductor memory structure using the reverse breakdown of the PN junction
Authors: Ohnishi Kazunori , Miura Katsuhiro 
Published: July 2007

AbstractIn this paper, we describe an improved carrier injection method for the metal nitride‐oxide semiconductor (MNOS) structure, which is a prospective nonvolatile semiconductor memory device. The investigation is based on the prediction that carrier injection should be improved by increasing the carrier density at the Si surface and by lowering the tunneling barrier height of the SiO2 and that these conditions should be realizable by using the current flow due to reverse breakdown of the pn junction near the channel region of the Si surface under the gate electrode.Experiments indicate that the flatband voltage shift in the presence of electron injection is large as a result of the reverse breakdown current of the pn junction. Electron injection was further improved by an additional lowering of the tunneling barrier height associated with the voltage drop across the resistance connected to the bias circuit of the pn junction. This voltage drop was produced by the current flow due to reverse breakdown of the pn junction.Faster, stronger carrier injection from the Si surface to the traps in the insulator of MNOS structure can be realized by optimizing the doping densities in p and n regions and optimizing the resistance connected to the pn biasing circuit. This method is useful for electrical erasable nonvolatile semiconductor memory (EEPROM) devices without voltage up‐converter circuits.
64 K × 1 BiCMOS ECL RAM with cross‐coupled level conversion circuit
Authors: Shiomi Toru , Takano Satoshi , Honda Hiroki , Hatanaka Masahiro , Anami Kenji 
Published: July 2007

AbstractThis paper considers the high‐speed, low‐power consumption BiCMOS ECL RAM and discusses the input buffer circuit, including the level conversion circuit which transforms the ECL level to MOS level. It is seen that the following circuit is the optimal from the viewpoints of the delay time and the power consumption. The address buffer circuit is composed of the ECL circuit and the emitter follower, the level conversion circuit is a CMOS cross‐coupled circuit, and the driver circuit is composed of the Bi‐nMOS driver. The high speed and low current dissipation performances are obtained with the delay time of 1.6 ns, current dissipation of 2.32 mA.The sense amplifier is constructed using ECL circuit with the constant‐current source with small dependencies on the temperature and the source voltage. A high speed is realized by producing the output from the wired‐OR of the emitter‐follower transistors of the blocks, with the time from the common data line to the output being 1.6 ns. Based on the obtained circuit structure, a 64 KX 1 bit BiCMOS ECL RAM is realized using the 1‐μm BiCMOS, with the access time of 7 ns and the power consumption of 800 mW [1].
Optical beam scanner with phase‐variable waveguides‐improvement on deflection characteristics
Authors: Moriki Kazunori , Aizawa Kouji , Hattori Takeo , Iga Kenichi 
Published: July 2007

AbstractAn optical beam scanner with a variable phase waveguide can perform a high‐speed scanning into an arbitrary angle. Monolithic integration of the scanner with a light source can be realized by means of fabrication with semiconductor materials. However, in principle, the scanned beam has multiple peaks so that the maximum scanning angle and the power efficiency are limited.To relax the limitations and to improve the characteristics, the following methods are investigated in this paper: (1) a method to suppress the subbeams; (2) a method to increase the angle between the main beam and the subbeams; and (3) a method in which the entire envelope is scanned. The following results were obtained.(1) By chirping the waveguide spacing, the limitation of the scan angle due to the existence of the subbeams is removed.(2) By reducing the waveguide spacing and varying the widths of the adjacent waveguides so that the mode coupling between the waveguides is eliminated, the scan angle is increased.(3) Although the fabrication is difficult, the wavefront in the waveguide is tilted so that the envelope itself is scanned and the inherent limitation of the scan angle is eliminated.
Spot sizes of beam waves propagating along a two‐dimensional inhomogeneous medium
Authors: Hashimoto Masahiro 
Published: July 2007

AbstractThe Gaussian beam propagating in an inhomogeneous medium is analyzed based on the complex ray optics, and the analytical solution obtained is reported. It is assumed that the medium is inhomogeneous in the transverse direction and homogeneous in the longitudinal direction. A beam wave is assumed which propagates in such a medium with undulation. Its spot size is derived as a general solution. Further, by means of two examples, the spreading of the beam wave due to the dispersion is studied. The general solution obtained in this paper is the rigorous solution of the geometric optics.
Structure of the test program for vlsi memory devices and its application
Authors: Hamada Mitsuhiro , Nishimura Yasumasa , Tada Tetsuo 
Published: July 2007

AbstractVLSI memories have been diversifying along with high density and high speed. With diversification, the evaluation test program also must handle each VLSI memory, and the efficiency of its generation is an important issue.In this paper, to evaluate diversifying VLSI memories, a program structure is described which can create evaluation test programs quickly for semiconductor test equipment, especially memory testers. The test program presented herein has a module structure consisting of utility groups for evaluation, a main program, and subroutine programs which describe the specific test conditions for each VLSI memory. Also, it can handle the evaluation of various VLSI memories with minimum programming.As a result of using this program structure for the evaluation test programs for 16 kinds of VLSI memories, it has been confirmed that the program development time can be reduced to one‐fifth that of the conventional method and the evaluation time can also be reduced by one hour.
Design of ECL 1‐Mb BiCMOS DRAM
Authors: Kitsukawa Goro , Kawajiri Yoshiki , Itoh Kiyoo , Yanagisawa Kazumasa , Nakamura Masayuki , Miyazawa Kazuyuki , Akiba Takesada 
Published: July 2007

AbstractThis paper describes an experimental 1.3‐μm, 1‐Mb BiCMOS DRAM, the first DRAM to use an ECL interface. The results are as follows: (1) quantitative analysis shows that direct sensing of a small read‐signal voltage on the data lines before amplification by the CMOS rewrite amplifier gives an access time 8 ns (up to about 30 percent) faster than conventional common input/output (I/O) sensing; (2) the bipolar cascode amplifier is characterized by the pulsed emitter‐bias current. Computer simulation and experiments show that its delay time is not sensitive to changes inVccat the rate of about 50 mV/ns; (3) a new bipolar ECL I/O circuit with a power‐switching function is shown to reduce the standby current of a 1‐Mb ECL chip to about one‐fifth that of an ECL chip without a power‐switching function; and (4) the experimental chip has an access time of 24 ns, power dissipation of 730 mW, and a chip area of 62.2 mm2under typical conditions ofVEE= −5.2 V,Ta= 25°C, output capacitanceCL= 10 pF and a cycle time of 70 ns, andnMOS/pMOS transistors with gate lengths of 1.4/1.7 μm.
An evaluation of FFT circuits based on a three‐dimensional VLSI layout model
Authors: Kurokawa Takakazu , Ichijo Yasuhiko , Oowada Masakatsu 
Published: July 2007

AbstractPerformance evaluation of VLSI circuits has been studied widely following the progress of VLSI technology. In these studies, the amount of material as well as the wire routing lengths required for the VLSI layouts for sorting circuits, FFT circuits, interconnection circuits, and so on, have been discussed. These discussions are based on a fact that the wire routing controls the VLSI performance, but they all concentrate on conventional two‐dimensional (2‐D) VLSI circuits. By contrast, new integration technology, i.e., so‐called 3‐D VLSI technologies, have been developed to overcome the barriers to the progress of 2‐D integration technology.This paper discusses the performance evaluation of FFT circuits based on 2‐D VLSI technology as well as 3‐D VLSI technology. As the evaluation results, the amount of material can be reduced about one O(N−1/2 log N)‐th to one O(N−1/2 log−2 N)‐th by using 3‐D construction rather than the conventional 2‐D VLSI circuit. Furthermore, the optimum FFT circuit based on the AT2 complexity for 2‐D integrated circuits cannot always be an optimum circuit based on the V2T3 complexity for 3‐D integrated circuits. Therefore, it will be necessary to reevaluate each circuit based on the V2T3 complexity to fabricate it as a 3‐D VLSI system.