bluuebunny/crossref_metadata_2025_split huggingface dataset:
Coupled mode theory of parallel multi– and single—mode dielectric waveguide
Authors: Ohke Tadafumi , Tomabechi Yoshiro , Matsumura Kazuhito 
Published: July 2007

AbstractWhen Waveguide I supporting several guided modes and Waveguide II supporting a single mode are coupled in a parallel orientation, the electromagnetic field distributions in this coupled guided system are analyzed in such a way that the mode coupling is represented as a weighted sum of the guided modes. In general, when two waveguides are placed closer so that the coupling becomes stronger, the existence of one guide can no longer be neglected by the guided eigenmode of another guide, and its field distribution is perturbed. The method of analysis presented in this paper takes into account this effect by way of weighted expansion coefficients of the mode. Hence, the analysis can be applied even when the coupling is rather dense. As an example, the field distribution of the coupled guided system is analyzed for the case where two rectangular dielectric waveguides having one and two modes, respectively, are placed in parallel. Next, the field distribution along the coupled waveguide is measured and the spatial spectrum is analyzed. A characteristic spatial spectrum is found which is proportional to the difference of the phase constants of the three eigenmodes. It is found that this corresponds to the difference of phase constants of each mode obtained analytically.The present analysis method can readily be extended to the case in which each of the coupled waveguides has multiple guided modes, including the case where both have only one mode. The theory can be used for the design of couplers, dividers, and mode filters made of dielectric waveguides.
Monolithic integration of LD/HBTs on a semiinsulating InP substrate
Authors: Ohnaka Kiyoshi , Tsujii Hiraaki , Shibata Jun 
Published: July 2007

AbstractA ridge‐waveguide laser and heterojunction bipolar transistor were integrated monolithically on a semiinsulating InP. In this device, the n‐cladding layer of the laser, the waveguide layer and the active layer were grown epitaxially on a semiinsulating InP. They are common to the collector and double‐layer base of the transistor. Using this device structure, the step height on the device surface was small and the fabrication of the device was simplified.The threshold current of the laser was 30 mA and the characteristic temperature was 65 K. Since a narrowband gap layer common to the laser active layer exists at the collector side of the base of the heterojunction bipolar transistor, the saturation property of the current‐voltage characteristic in common emitter configuration was good and influenced little by the “Early Effect.” This paper describes the fabrication and analysis of the ridge‐waveguide laser and heterojunction bipolar transistor.
High‐speed Hi‐BiCMOS gate array with RAM
Authors: Nishio Yoji , Murabayashi Fumio , Kotoku Shoichi , Kadono Shinji 
Published: July 2007

AbstractThe newly proposed BiCMOS technology [4] is based on the idea of realizing an LSI with high‐speed and low‐power consumption properties, by combining the bipolar and CMOS technologies in the basic circuit. It was demonstrated in [4] that the designed performance can be realized for logic circuit. This paper reports on the application of the technique to the gate array, where the circuit is constructed by 1.3 μm Hi‐BiCMOS technology and the overall performance as LSI is evaluated experimentally. First, three kinds of master chips suited to the high‐speed processor such as a minicomputer are designed. Among those, a master chip was selected and developed, which includes a multiport RAM and is applicable to the arithmetic logic unit containing a register file. The internal RAM has a structure of 4 kbit and 3‐port, and the access time is less than 10 ns. A basic cell structure to construct the logic circuit by a combination of bipolar and CMOS technologies is devised. A 2‐input NAND gate with a typical delay of 0.45 ns was realized. This type of gate array will be useful in the devices such as those in minicomputer and communication systems, where a high‐speed operation is required.
Measurements on the influence of metallic phase arc on electrode surface for breaking Ag contacts
Authors: Sone Hideaki , Takagi Tasuku , Nakai Masao 
Published: July 2007

AbstractThe influence of metallic phase are discharge on electrode surface was studied for breaking Ag contacts. A whole are duration, metallic phase are duration, contact resistance and electrode material mass change were measured when both conditions of air pressure and circuit current were varied. The result showed that both the material loss and transfer had a close relationship to the metallic phase are duration. The contact resistance increased as the are duration grew in the metallic phase are region, and it became high and almost constant when the are sustained until it transferred to the gaseous phase.
Responses of digital frequency multipliers consisting of coupled‐lines to trains of periodical gaussian pulses
Authors: Sakagami Iwata , Hatori Kozo 
Published: July 2007

AbstractFor the coupled‐line digital frequency multipliers which have been discussed for the impulse train, their output responses are presented for the periodically isolated pulses considered as time‐limited incident signals. In this paper, periodic Gaussian pulse trains are treated as an example. In addition, the physical meaning is given for the nonnegative constant which is determined by the relationship between the reflection and transmission coefficients as the transfer function of the circuit. By means of this constant, it is shown that the attenuation constant of the discrete frequency component passing the circuit is minimum. Similar to the case of unit impulse train input, the input frequency components are discrete at an equal interval on the frequency axis. The amplitude is determined by the Fourier transform of the isolated purse constituting the periodic pulse train. Since the input frequency components are discrete, simulation of the output response requires only the sampled values of the frequency characteristics of the circuit. Since the Fourier transform of a Gaussian waveform is Gaussian, it is possible to determine the transmission frequency range in which most of the energy of the Gaussian pulse train is concentrated. Although the characteristic of the distributed circuit degrades as the frequency is increased, an almost desirable output can be obtained if the frequency characteristics are satisfied within a transmission frequency bandwidth.
Properties of polyimide films cured on copper
Authors: Miura Osamu , Watanabe Hiroshi , Miyazaki Kunio , Numata Shunichi 
Published: July 2007

AbstractA polyimide film (varnish) on a copper film tends to change in color and to show degradation of the thermal and mechanical properties during the thermal‐curing process. The causes of these property changes were investigated by observing the film appearance and analyzing the molecular structure of films and the infrared absorption spectrum. As a result, it was found that copper diffuses into the polyimide film during the imidization process, causing the decomposition of the imide‐bonds which further causes the changes in color and properties of the film.
Finite‐element formulation of quantum wells using transfer matrix
Authors: Nakamura Kenji , Shimizu Akira , Koshiba Masanori , Hayata Kazuya 
Published: July 2007

AbstractWhen the effective mass approximation is used for analysis of electrons bound in a quantum well, the envelope function generally is not continuous at the heterojunction. The boundary condition at the junction is expressed in terms of the transfer matrix. In this paper, an analysis method based on the finite‐element formulation is proposed for electrons bound in a quantum well made of arbitrary materials. It is shown that by using 3rd‐order Hermitian line elements as the approximation functions, the continuities of the envelope function and its derivative are ensured outside the heterojunction, and that introduction of the transfer matrix becomes possible. It is also shown that the problem becomes an asymmetric generalized eigenvalue problem by means of this formulation. As numerical examples, rectangular quantum wells are analyzed in the cases where the envelope function, and its derivative divided by the effective mass, are continuous at the heterojunction (GaAs/A1GaAs quantum well) where also the function and its derivative are discontinuous (InAs/GaSb quantum well). The validity of the calculations is confirmed by comparison with the analytical solutions.
A proposal for polynomial transformer and its design using 3‐D VLSI technology
Authors: Kurokawa Takakazu , Aiso Hideo 
Published: July 2007

AbstractAny relationship among finite fields, or Galois fields, can be transformed into a unique polynomial consisting of one variable using Galois Fields. In this paper, the 3‐D design of the “Polynomial Transformer” which executes this transformation is discussed.The Polynomial Transformer consists of very simple and iterative logic, and it is very suitable for parallel and pipelined VLSI implementation. Moreover, it is possible to transform 3‐D construction. From the 2‐D and 3‐D layout result of the Polynomial Transformer, it appears that 3‐D construction is effective.Some applications of the Polynomial Transformer are substitution in cipher, random number generation, and hashing which is used in compiler.
12‐GHz band triple‐mode filters with waveguide ports—comparison and consideration of two kinds of filter structures
Authors: Nomoto Toshihiro 
Published: July 2007

AbstractThis paper describes the design and development of triple‐mode filters which make possible compact size for use as 12 GHz band broadcast satellite transponder filters. Compared with dual‐mode filters, the realization of triple‐mode filters has further difficulty in controlling the resonant frequency and excitation of the degenerate modes, and in designing the intercavity iris. Two kinds of six‐pole triple‐mode filters which are different in mode‐coupling structures, are presented, and intercavity aperture shapes for each filter capable of a true elliptic function response are newly proposed in this paper. The experimental results showed that these two filters could exhibit almost equal electrical performance, and the proposed intercavity aperture shapes are widely available for controlling three pairs of mode‐couplings between two physical cavities simultaneously and independently. Finally, consideration for application to waveguide manifold multiplexers are made from various viewpoints.
Microwave band push‐pull power amplifiers
Authors: Toyoda Sachihiro 
Published: July 2007

AbstractThis paper describes the push‐pull power amplifier using GaAs power FETs. Two types of phase inverters indispensable for configuration of a push‐pull power amplifier were conceived. The push‐pull amplifiers fabricated for trial were tested at 5‐ and 10‐GHz bands. The bandwidth of the power amplifiers for the 5‐GHz band was 1.48 and 1.8 GHz and the output power was 7.5 W (38.8 dBm). The bandwidth of the power amplifiers for the 10‐GHz band was 1.85 and 2.35 GHz and the output power was 4.5 W (36.5 dBm).
An SOI/CMOS flash A/D converter
Authors: Kumamoto Toshio , Nakaya Masao , Kusunoki Shigeru , Nishimura Tadashi , Yazawa Nobuharu , Akasaka Yoichi , Horiba Yasutaka 
Published: July 2007

AbstractIt is important from the viewpoint of increasing the application range of the three‐dimensional circuit to construct analog circuits such as A/D converters on a silicon substrate formed on an insulating oxide film, or silicon on insulator (SOI) devices. Analog devices on a silicon on sapphire (SOS) substrate have been reported. However, no work on analog circuits has been reported with conventional SOI technology because of the lack of uniformity of the transistor characteristics. Due to the substrate floating effects represented by the kink phenomena characteristic to the configuration, the characteristics of the analog device are degraded. The laser recrystallization technique is improved and the chopper‐type comparator is used which is less susceptible to the variations of the device parameters. Furthermore, a transistor structure that suppresses the kink phenomena is introduced in the amplifier inverter. With these approaches, a 4‐bit flash A/D converter is fabricated successfully with the SOI/CMOS process. As a result, the basic operation is confirmed up to the power supply voltage of 5 V, input signal of 10 kHz, and conversion speed of 30 MS/s. In this paper, the design and evaluation are described for the SOI/CMOS A/D converter for three‐dimensional circuits.
Memory cell design of optically coupled three‐dimensional common memory
Authors: Takata Hirokazu , Mori Hiroki , Hirose Masataka , Koyanagi Mitsumasa 
Published: July 2007

AbstractAn optically coupled three‐dimensional common memory has been proposed for more functional and faster parallel processing of information with several CPUs. A detailed design of the memory cell was carried out. First, the effect of stray light which is a significant problem in the design of the optically coupled three‐dimensional common memory was studied quantitatively by deriving the optical coupling efficiency between the light‐emitting and detecting devices. Next, by means of the static analysis taking into account the fluctuations of the device dimensions, alignment error between the layers and the variation of the power supply voltage, the safe operating region of the memory cell was evaluated. As a result, an optimum condition was found on the transverse pitch between the light‐emitting and detecting devices and the supply current to the emitting device for a stable operation of the memory without being affected by the stray light. Further, with this optimum condition, a dynamic analysis was carried out for the memory cell circuit to which the bit‐line peripheral circuit is attached. In the analysis, the reduction of the load resistance of the memory cell by the optical writing was described with an equivalent circuit consisting of resistors and MOSFETs. The analysis was carried out with the driving circuit for the light‐emitting device characteristic to the optically coupled three‐dimensional common memory taken into account. It was confirmed that the memory cell designed by means of this dynamic analysis operates correctly.
Fundamental properties of ultrathin SOI MOSFETs fabricated by electron‐beam anneal recrystallization
Authors: Yoshimi Makoto , Takahashi Minoru , Hazama Hiroaki , Kambayashi Shigeru , Natori Kenji 
Published: July 2007

AbstractThin‐film SOI MOSFETs made in completely depleted SOI films were fabricated by electron‐beam annealing and their electrical properties were compared with those of conventional SOI MOSFETs. The threshold voltage agreed with the calculated value. With complete depletion of the SOI film, the threshold voltage decreased toward the value determined by the work function difference between the gate material and SOI film as the film thickness decreased. The low field mobility increased with the depletion of the SOI film.When the SOI film was 500 Å thick, the mobility exceeded that of a bulk MOS device fabricated with the same doping concentration. The current overshoot during switching in the thin‐film SOI device was too small to observe.
A novel beam propagation method based on the Galerkin method
Authors: Matsuhara Masanori 
Published: July 2007

AbstractIn the conventional beam propagation method based on the WKB approximation, the spacing between the sampling points is restricted to be sufficiently larger than one‐half the wavelength. This restriction has limited the applicability of the beam propagation method. In this paper, a new beam propagation method is proposed which is based on Galerkin's method. In the new beam propagation method, the forementioned restriction does not apply and a spacing between the sampling points smaller than a half wavelength can be chosen. Hence, it is possible to treat accurately an optical wave with a narrow beam.
Optimum design of high–density circuit boards
Authors: Matsui Norio 
Published: July 2007

AbstractThe method is discussed of determining wire width that minimizes the delay time and crosstalk of the average wiring length of wiring board under the condition that the wiring dimension is scaled down keeping the characteristic impedance of the transmission line constant. By employing the sending‐gate matching method suitable for the fine‐pattern wiring with high resistance, the equation for the relation between the wiring width and the average wiring length is determined from the condition of the gate count, terminal expansion, power consumption and LSI mount area for the multiple wiring layer board that places and routes many LSI chips. The delay time and crosstalk under high wiring resistance are analyzed with the distributed constant circuit model. Then the existence of the optimum wiring width that minimizes simultaneously the delay time and crosstalk for the average wiring length is proved.If the wiring width exceeds this value, the wiring length increases and the delay time and crosstalk are almost proportional to the wiring length. This is because the gate count determines the wiring count and the increase in wiring width increases the wiring board area. If the wiring width is less than the optimum value, only the wiring resistance increases. The wiring length does not decrease because the power consumption and LSI mount area determine the wiring board area. Moreover, the approximated equation that gives the optimum wiring width, delay time and crosstalk is determined to obtain the guidance for the design of the high‐density wiring board.
Design of CMOS multiple–valued logic circuits using only one voltage source
Authors: Taniguchi Kazutaka , Ueno Fumio , Inoue Takahiro 
Published: July 2007

AbstractThis paper presents the design of CMOS multiple‐valued logic circuits using only one voltage source. The circuits designed by the proposed method have only two lines for voltage sources compared with that of the conventional circuits which require many voltage sources in proportion to the number of logical values.The circuit simulation for the proposed circuits has been performed by using the SPICE‐2G program. Their performance and usefulness in the design of multiple‐valued digital systems have been confirmed.
Fabrication of single‐mode optical fiber preforms by sol‐gel method
Authors: Kitagawa Takeshi , Shibata Shuichi , Horiguchi Masaharu 
Published: July 2007

AbstractSingle‐mode optical fibers have been fabricated using fluorine‐doped silica glasses made by the sol‐gel method. A liquid‐phase fluorine doping technique for controlling a refractive index in a fluorine‐doped silica glass was developed and the optimum condition in a sintering process for fabricating a highly transparent glass was clarified. A fluorine out‐diffusion method for making optical fiber preforms is proposed. Using this technique, optical fibers have been obtained with an optical loss of 0.43 dB/km at 1.30 μm wavelength.
Analysis of polarization characteristics of cylindrical waveguide containing anisotropic dielectric using spatial network method
Authors: Ko Youngho , Yoshida Norinobu , Fukai Ichiro 
Published: July 2007

AbstractRecently, various anisotropic materials have been used in the applications to the microwave and millimeter wave circuits. In such a structure, it is indispensable to analyze systematically the medium conditions, boundary conditions and resultant propagation characteristics of complicated electromagnetic fields. Of the electromagnetic characteristics associated with the anisotropic materials, the polarization characteristic is particularly important. Especially, the circular polarization recently has been used extensively as the fundamental propagation mode in satellite communication due to the stability of its propagation characteristics. The polarization characteristics are expected to be applied to the modulation/demodulation in the optical region and to the erasable optical disk memory.The present analysis considers the generating mechanism of these polarizations and carries out a numerical simulation of the fundamental mechanism by means of the spatial network method as applied to a structure made of an anisotropic dielectric disk or plate inserted in a circular waveguide. By taking advantage of the method, studies in the time domain are carried out so that the variations of the amplitude and phase of the electric field components at each spatial point are presented. From their mutual relationship, as the variation of the electric vector, the analysis determines the process in which the polarization plane characteristics are caused, including the rotation of the polarization plane from the linear polarization through elliptic polarizations and, finally, to the circular polarization depending on the rotation of the principal axis of the anisotropy.
Fabrication of dielectric‐coated rectangular hollow waveguides for CO2 laser light transmission
Authors: Karasawa Satoru , Miyagi Mitsunobu , Nakamura Tsutomu , Ishikawa Hitoshi 
Published: July 2007

AbstractA germanium coated rectangular wave‐guide with a square cross section for CO2 laser light was fabricated by plating of germanium and soldering. A coated waveguide with a cross section of 2 mm2, a length of 80 cm and a loss of less than 0.1 dB/m was obtained. It was demonstrated experimentally that the waveguide has a low loss even for a bend.
Low‐temperature annealing of heavily ion‐implanted layer
Authors: Ohmi Tadahiro , Ishihara Yoshio , Shibata Tadashi , Okita Akira 
Published: July 2007

AbstractCrystallinity recovery, impurity activation and stress relief in a heavily ion‐implanted layer by ultrahigh‐vacuum ion‐implantation during low‐temperature annealing were investigated and the following results were obtained. The crystallinity of the layer heavily doped with arsenic ions was recovered at 550°C for 75 min and the impurities were activated sufficiently. Furthermore, the impurity level distribution supported the LSS theory and the maximum carrier concentration was 1.6 × 1020 cm−3.The reverse current of the p‐n junction formed by this method was two orders of magnitude lower than that in a conventional device. In the p‐n junction formed by continuous ion implantation of arsenic and phosphorus to relieve the stress in the implanted layer, the reverse current decreased further. When the stress was most relieved, the carrier activation rate was highest and the p‐n junction reverse current was lowest.
Magnetic properties of cobalt electrodeposited anodic oxide magnetic films
Authors: Arai Ken Ichi , Ohoka Yohsuke , Ishiyama Kazushi , Kang Hee Woo 
Published: July 2007

AbstractA magnetic film was fabricated by electrodeposition of cobalt in the pores of an aluminum anodic oxide. The dependence of coercive force and magnetic anisotropy energy on the packing density and diameter of the cobalt particles was investigated when the pore diameter was kept constant.The dependence of coercive force on the electrodeposition condition of cobalt was also investigated. The coercive force perpendicular to the film surface decreased when the packing density increased because the c‐axis, which is the axis of easy magnetization in a cobalt crystal, tended to incline to the film surface direction when the packing density increased.Magnetic anisotropy energy depended strongly on packing density. When the packing density was less than 0.26, the direction perpendicular to the film surface became the axis of easy magnetization.The perpendicular magnetic anisotropy energy was smaller than the calculated value of the magnetostatic energy because of the in‐plane orientation of the c‐axis. In a magnetic film with a pore diameter of 200 Å, the perpendicular coercive force was varied from 2000 to 1200 Oe by controlling the pH and the temperature of the cobalt electro‐depositing bath.