bluuebunny/crossref_metadata_2025_split huggingface dataset:
Non-invasive stress estimation in simulative endoscopy setting: literature review
Authors: Boyanov Nikola , Andonov Vladimir 
Published: February 2024

One of the most common stressors is so-called “occupational stress.” ﻿It is defined as the sum of physical, mental and physiological responses to work in situations where the workload or stress associated with it intensifies for an extended period of time. It is a gradual process in which individual cognitive assessments of occupational stressors generate adverse health events and may lead to burnout. Since it has become a major problem in the medical field, studying, measuring and limiting it have been set as goals for the future.
We present a literature review on the topic of measuring stress using non-invasive means, such as cardiac indices measured through different devices, electrodermal activity, skin temperature, and salivary biomarkers. A virtual reality simulation could be used in conducting such experiments in order to provide a standardized environment with set variables for researchers to discern the most precise indices to be used in a real-life setting.
Initial experience with Bulgarian Arthroplasty Register
Authors: Panev Atanas , Lukanov Georgi , Luchev Georgi , Dzhambazov Slaveyko , Ivanov Stoyan , Epinette Jean-Alain , Kinov Plamen 
Published: February 2024

Introduction: National arthroplasty registries date back to 1975, when the Swedish Knee Arthroplasty Register was founded. This method of database collecting has since been employed for both patient follow-up and the creation of annual statistical reports. In Bulgaria, there is currently no state-approved software that offers these features.
Aim: The current study aimed to report on the preliminary findings from our use of the OrthoWave software and the launch of the first Bulgarian registry for arthroplasty.
Materials and methods: Using the OrthoWave program, we gathered data on 215 patients who underwent 218 surgical procedures for hip and knee replacement in the Orthopedics and Traumatology Clinic at Tsaritsa Joanna University Hospital, ISUL, between November 2022 and August 2023. Both demographic indicators (sex, age, and BMI) and characteristics of the surgical procedure (intervention execution time, approach used, type and size of prosthesis) were gathered and analyzed.
Results: All subjects had a mean BMI of 29.3 kg/m², calculated using OrthoWave’s statistical analysis system. The average weight during surgery was 93 kg, with an average height of 176 cm. The mean age of patients at the time of surgery was 66.11 years. Sex distribution of patients with hip replacement was as follows: 61.38% of them were men and 32.62% were women. Women accounted for 58.9% of all patients with knee endoprostheses, while operated men accounted for 41.1%.
Conclusion: In the era of evidence-based medicine, the form of register is crucial for further development of the orthopedic specialty. Our initial experience is promising, and we are looking forward to its development on a national level.
Protective effects of Saccharomyces boulardii CNCM I-745 in an experimental model of NSAID-induced enteropathy
Authors: Simon O’Brien E. , Robert A. , Gauthier D. , Le Cavorzin A. , Planchais J. , Roux X. , Verleye M. , Castagné V. 
Published: February 2024

Abstract
Nonsteroidal anti-inflammatory drugs (NSAIDs) induce a broad spectrum of gastro-intestinal adverse effects, including ulceration and bleeding. The pathophysiology of NSAID enteropathy is complex and incompletely understood, but some evidence showed that NSAIDs impair the intestinal barrier and cause a gut dysbiosis. Identifying new treatments aiming to reverse or attenuate NSAID-induced adverse effects would have a significant impact on a high number of patients. The aim of this work is to assess the effects of the probiotic yeast Saccharomyces boulardii CNCM I-745 (Sb) on a model of NSAID-induced enteropathy. Four groups of mice were tested: Control, Indomethacin, Sb, and Sb + Indomethacin. A clinical score was evaluated throughout the experiment. Faecal calprotectin, microbiota and haemoglobin analyses were performed. At the end of the treatments, the small intestine, colon, and caecum lengths, and intestinal permeability were measured. Sections of ileum and jejunum were observed to assess a histological score and ileal cytokines were measured by immunoassay. Indomethacin-treated animals showed an increase in their clinical scores, reflecting a worsening of their general state. Mice co-treated with Sb and indomethacin displayed an improvement of their clinical score in comparison with mice treated with indomethacin alone. Sb prevented the indomethacin-induced shortening of the small intestine and caecum, and significantly attenuated the severity of intestinal lesions. Sb also prevented the increase in faecal calprotectin, reduced faecal haemoglobin, and prevented the increase of intestinal permeability in mice treated with indomethacin. Sb also counteracted the increase of faecal bacteria associated with the pathogenesis of NSAID-enteropathy. In conclusion, our results show a protective effect of Sb in a model of indomethacin-induced enteropathy. Sb improved the intestinal barrier function and exerted a positive action on gut microbiota composition.
Housing and Health in Older Adults With Low Income in the United States: An Integrative Review
Authors: Kantz Mary E. , Enah Comfort , Abdallah Lisa M. , Koren Ainat 
Published: February 2024

Purpose:
The current integrative review was conducted to understand the relationship between housing and health in older adults with low income in the United States.

Method:
A literature search yielded 20 articles that met inclusion criteria. Key data elements were extracted from each article and a five-level social ecological model (SEM) was used as a framework to analyze the findings.

Results:

The analysis yielded themes associated with each SEM level:
Interaction Between Housing and Personal Traits and Behaviors
(individual level);
Burdens and Benefits of Social Relationships
(relational Level);
Building Quality and Health
(environmental level);
Role of Housing Assistance
(structural level); and
Influence of Poverty and Structural and Systemic Racism
(superstructural level).

Conclusion/Implications:

Results clarify housing's role as a social determinant of health affecting older adults with low income and may help nurses tailor patient assessments and treatment plans to better identify and address housing-related health risks. [
Journal of Gerontological Nursing, 50
(3), 25–32.]
Increasing Follow Up With Primary Care Providers After Emergency Department Visits in Older Adults
Authors: Romanelli Sarah , Cuervo Carolina Marie , Rivera Veronica 
Published: February 2024

Purpose:
To increase follow up with the primary care team via telephone outreach within 3 days of emergency department (ED) discharge to schedule a follow-up visit within 14 days. Secondary aims included: identifying high utilizers of the ED (defined as more than three ED visits within 6 months), reinforcing discharge instructions from the ED via nursing education on telephone follow ups, and identifying the reasons patients used the ED.

Method:
Baseline data were gathered retrospectively by reviewing charts of patients discharged from the ED. Charts were reviewed from a biweekly automated report, and RNs initiated follow-up phone calls to patients discharged from the ED, offering appointments and providing pertinent nursing education.

Results:
Primary care follow ups after ED discharges increased from 38% to 71% over 10 months with the new nurse-led workflow. Patients to whom the RN outreached to were more likely to attend their follow-up appointments. However, a 14-day follow-up appointment with the primary care provider (PCP) showed no significant difference in ED revisits or hospital admissions.

Conclusion:

Follow up after ED discharge led to increased coordination of care. Nurses provided education about chronic conditions and reiterated discharge instructions that might have been unclear to patients in the ED. Further studies are needed to analyze the effect of follow up with the PCP on ED utilization and hospital admissions. [
Journal of Gerontological Nursing, 50
(3), 33–39.]
Hybrid Bonding for the Next Generation of High -Performance Devices
Authors: Mirkarimi Laura 
Published: February 2024

The electronics industry continues to pursue optimal performance for the insatiable consumer demand of computation intensive products like GPUs, CPUs and AI accelerators. While the monolithic system on chip approach promises exceptional performance, it is costly. The advanced packaging industry has responded to the challenge with 2.5D and 3D integration solutions that bridge the performance gap with heterogeneous integration. Hybrid bonding combined with chiplet architectures within 2.5D will enable the distribution of function and nodes across a chips within a module, providing a path toward more flexible product introduction and innovation. The design and manufacturing of chip-to chip-communication is complex and has some technology dependencies. One technology limitation in realizing a monolithic performance with heterogeneous integration is solder interconnect scalability. Hybrid bonding is a revolutionary platform technology that solves the interconnect scalability problem and delivers enhance performance compared to the conventional Cu microbump. The Direct Bond Interconnect (DBI®), more generally known as hybrid bonding, offers a performance boost that enables novel 3D architectures via disaggregation and chiplet implementation, in spite Moore’s law slowing. The efficient interconnect between circuit functions at the wafer, die and package level, will fuel semiconductor company roadmaps for decades. The performance advantages, ease of integration of such a hybrid interconnect will be discussed in chip to wafer and chip to chip applications. The key areas of innovation anticipated to proliferate the technology within the entire advanced packaging supply chain will be presented.
FOWLP Thermal Debonding: Easing Manufacturing Constraints
Authors: Sanchez Debbie Claire 
Published: February 2024

Fan-out wafer level packaging enables System-in-package (SiP) and other forms of heterogenous integration. Multi-die configuration or passives for SiP alters the warpage profile of the wafer significantly. Wafers with square-shaped dies typically have bowl or dome type deformations. Wafers with rectangular-shaped dies tend to be deformed in a parabolic shape. However, as the packaging advances to different and more sophisticated technologies, the different chip sizes in one wafer adds complexity to the base structure, which leads to an unpredictable warpage profile and a higher warpage magnitude. Downstream equipment post wafer reconstruction needs to be able to handle this change in magnitude and profile since this could otherwise cause difficulties in high volume production and result in lower yield. The process step that requires the wafer to be placed onto chucks will result in vacuum failure and, if not modified to handle high warpage, the transport mechanism can result in wafer excursion and machine downtime. However, these modifications would require a costly redesign of the machine transport system, handling system, and end effectors. A less cost-intensive solution would be to ensure that the incoming wafer post reconstruction has minimum warpage. Thermal debonding is the last process of the wafer reconstruction flow and it acts as launchpad for layer build-up. It is in this step that warpage is inevitable as the wafer is released from the carrier. Thus, it is essential to have a warpage level that is manageable by these succeeding processes. This paper addresses the issue of warpage in Fan-out Wafer Level Packaging and presents a solution that lessens the warpage in the thermal debonding stage. The efficient processing of warped wafers is critical for the development of Fan-out and the transition to high volume manufacturing of these chips.
Addressing Challenges in Dual Sided SiP Thermal Budget
Authors: Zhang Hanwen 
Published: February 2024

System-in-Package (SiP) has been adopted as the mainstream advanced packaging technology in many consumer applications including 5G smartphones, tablets, wireless earbuds, smart wearables, etc. Heterogeneous integration, smaller form factor, better electrical performance, lower cost of assembly and faster time to market are the key differentiators of SiP as compared to conventional packaging techniques. In applications such as 5G mobile RF Front-End (RFFE) and Antenna-in-package (AiP) modules, dual sided SiP is the popular approach which brings even higher level of integration and smaller form factor. However thermal warpage control is a significant challenge during two times of solder reflow processes for the front and back sides of the package, especially if one side is with underfill and mold materials which have significant CTE mismatch to the substrate and dies, causing delamination failures and yield losses. This study examines the novel solution of reducing thermal budget with the use of a low temperature solder paste material based on SnBiAg alloy in ultra-fine pitch Type 6 solder powders. It allows a minimal peak reflow temperature of only 170 °C that effectively reduces warpage of dual sided SiP substrates. Solder alloy and paste properties and solder joint microstructures are examined in detail for tests including fine-pitch printing and component soldering, thermal aging test on different substrate finishes, thermal cycling test and mechanical drop test for reliability performance.
Electrochemical Plating System Development of Nanotwinned Cu for Multiple WLP Features
Authors: Han Jianwen 
Published: February 2024

We develop a series of electrochemical plating (ECP) baths and processes, generating nano-twinned Cu (nt-Cu) in wafer-level packaging (WLP) applications to fulfill the expanding market demand for copper-to-copper direct bonding and hybrid-bonding. This newly developed system shows a high density of nt-Cu (close to 100%), controllable grain size (0.10 to 1.0 micron), vertical columnar structure (through the full height), and minimal transition layer between Cu seed and nt-Cu initial position (dozens of nanometers). These systems have expansive operating windows which produce high-density nt-Cu films: from the inorganic electrolyte concentrations, including copper, acid and chloride, to the ECP current density, ECP current waveform, agitation speed and additive concentrations. The new ECP system consists of one, two or three additives, depending on the applications, and we demonstrated that this sytem could fill multiple WLP features with a high density of nt-Cu and a flat surface. Unlike the features without recess, there exist more challenges for the components with PI-recess. The balance between conformal and bottom-up ECP must be well-controlled to achieve a flat surface without affecting the nt-Cu formation. To do so, we used two or three additives in the system, including the one that promotes bottom-up fill. Although having an additional additive in the electrolyte weakens the formation of nt-Cu to a certain level, we achieved the balance successfully by adjusting electrolyte compositions and ECP parameters for a series of WLP features. The working window of ECP parameters for generating nt-Cu structure is relatively wide. To achieve a uniform and flat surface of a high density of nt-Cu for specific WLP features, the additive concentrations and plating current waveform should be well-controlled. They are more critical than other parameters for controlling the ECP nt-Cu performance. We evaluated numerous waveforms, such as constant current, multistep current, ramping current ECP and other waveforms to generate nt-Cu films. At the current stage, both within die (WID) and within feature (WIF) of ECP nt-Cu for WLP features tested can be as low as 5.00 % with high density, columnar orientation, and less transition layer nt-Cu. Contrary to some published literature, our ECP process can produce nt-Cu films with Cu(111) orientation irrespective of the direction of the base substrate. Our ECP nt-Cu process does not appear to exhibit such substrate-dependent preference. We can generate high-density nt-Cu films using Cu (111) dominating seed layer and non-Cu (111) dominating substrates and even using stainless steel substrates. This paper will attempt to discuss additive functions, the mechanism of the balance between conformal and bottom-up ECP process, agitation speed, plating current waveform, multi-bath plating, electrolyte compositions, and substrate influence.
Squaring Off with M-Series Fan-Out Technology
Authors: Sandstrom Cliff , San Jose Benedict , Olson Tim , Fang Jen-Kuang , Yang Ping-Feng , Feng-Huang Sheng , Shen Ping-Ching 
Published: February 2024

Currently running at volumes in the millions of units per day on 300mm round format, Deca’s M-Series™ fan-out PLP technology and Adaptive Patterning® are being scaled up at ASE to 600 mm for production. The SEMI standard 600 mm square format pioneered by Deca, provides a 500% increase in usable area per panel providing cost-effective capacity growth as well as a powerful platform for high density integration of multi-die and chiplets in 2D, 2.5D and 3D structures. Deca’s patented Adaptive Patterning® coupled with chip attach compensation modeling overcomes the yield challenges associated with scaling to 600 mm and mitigates the compounding risk associated with the growing number of dies in a package, which is of particular importance for chiplet designs. The use of Laser Direct Imaging (LDI) overcomes the need for reticle stitching and eliminates this barrier for large package body sizes. In addition, 600mm allows for higher efficiency in terms of package count per format area over 300mm round, leading to less waste, thus a lower cost and a more environmentally friendly process. Recent advancements in LDI have allowed the potential to scale the technology to ultra-high density 2µm line & space redistribution layers (RDL) and 5μm vias. Advancement in Adaptive Patterning have led to multi-die packaging solutions without the need for complicated embedded bridge chips. With these ultra-high-density tools at hand, a breakthrough in device interface pitch of 20µm area array for leading edge silicon nodes will be outlined.
The Evolution of Moore’s Law Through Chipletized Architectures
Authors: Medrano Vic , Trinh Tony 
Published: February 2024

Staying ahead of America’s adversaries requires control of the electromagnetic spectrum and therefore an evolution of the sensor processing chain. Agile, chip-scale, direct analog-to-digital solutions at the sensor edge are needed to overcome data bandwidth and latency limitations that are inherent with legacy EW and radar systems, and reduce design cycles, size, weight, power, and cost (SWaP-C). Heterogeneous, 2.5D integration is the next phase of Moore’s Law enabling a new approach to microelectronics based on chipletized architectures. The acceleration of deployable modular, high-performance microelectronics to the tactical edge is achieved by integrating the best silicon processing nodes for analog/digitization, processing, memory, and AI functionality on one chip. Mercury is partnering with leading semiconductor providers to deliver to defense customers the only trusted, RF system-in-package (RFSiP) devices that utilize an ecosystem of advanced, die-level building blocks, called chiplets, at the speed of innovation and purpose-built for each mission. Through assembly of high-density chiplets on a silicon interposer, on-chip die-to-die interconnects enable efficient conversion between analog and digital signals, signal processing, high-speed IO, and power management while reducing system complexity and SWaP-C. The use of open standard die-to-die interfaces allows chiplets to be rapidly upgraded or modified to meet the intended use case. In this paper, Mercury explores how 2.5D integration of state-of-the-art chiplets on a silicon interposer solves next-generation EW and radar system data processing challenges.
Enabling Co-Design of 3D Heterogeneous Packages
Authors: Park John 
Published: February 2024

The days of ‘throwing it over the wall’ are over. Heterogeneous Integration (HI) is ushering in a new era of electronic product design with collaboration at its core – one that lives or dies on seamless interaction between analog/digital IC teams and package design teams. The use of advanced packaging technologies to combine smaller, discrete chiplets into one system-in-package (SiP) not only pushes the need for more advanced multi-die packaging, it makes packaging part and parcel of the process. And in doing so, it significantly reduces dependance on Moore’s Law at a time in which building an advanced monolithic system-on-chip (SoC) has become prohibitively expensive. For many tech companies, Moore’s Law no longer represents the best technical nor economical path to designing a product. And for a great many of those companies, HI presents a solution – SiPs close to the SoC form factor but with far lower overall cost, greater yield and perhaps most importantly, faster time to market. While SiP as a packaging concept has been around for decades, the recent tsunami of designs that have adopted HI is truly a disruptive change. This presentation will outline some potential solutions to the challenges design teams face when pivoting from monolithic IC design to 3D heterogenous package design.
High Speed Copper Plating Process for IC Substrate
Authors: Fleuriel Sean , Rodriguez Confesol , Feng Kesheng , Pan Linyu , Tshitenge Victoire Kayempi , Moon Robert , Cruz Dolores , Hander Jon 
Published: February 2024

The integrated circuit (IC) substrate occupies an interesting place in electronic devices. They serve as the bridge between the integrated circuits and the PCB. In this connecting point, they must meet the requirements of both worlds. They must provide the high density of connections to match the IC chip, while at the same time be a stable and robust platform for the chip to reside on. The IC substrate feature sizes and uniformity requirements are moving closer to what is required in the semi-conductor industry, except these substrates must be made at a scale, speed, and cost expected in the PCB industry. In this paper, we present an acid copper electrolyte for plating 2 in 1 redistribution layers (RDL), with small vias and fine lines down to 10µm wide. The electrolytic process successfully plates these features, while maintaining a uniform surface across the panel. The 510 mm x 515 mm panel had less than 5% variation in Cu thickness. The electrolyte was evaluated in a vertical continuous plating (VCP) style tool and a tool that plates panels at high speed. The standard VCP tool operated around 1.0 – 3.0 ASD, whereas the high-speed plater operated around 4.5 – 6.5 ASD. The obvious benefit of the high-speed tool was to reduce the plating time, but it also provided new degrees of control that are not available in VCPs. In either tool, the electrolyte performed well and produced uniform deposits that met the physical requirements that IC substrate applications demand.