bluuebunny/crossref_metadata_2025_split huggingface dataset:
What's new in reliability engineering?
Authors: Coppola Anthony 
Published: July 2007

AbstractReliability engineering is responding to the trend to computer‐aided design (CAD), and the current emphasis on improving competitiveness through quality. Islands of automation addressing reliability for both hardware design and software engineering exist which are not yet connected, though government–industry teams are developing integrated software packages of reliability (and maintainability) tools. TQM (total quality management) principles are being adopted in many industries, and the U.S. Qualified Manufacturers List (QML) programme, which requires qualification of a process rather than a product, is now used for procuring microcircuits. However, government regulations remain a barrier to creating a ‘quality culture’. ISO 9000 is seen by industry as a requirement for international competitiveness, but criticized by some as counterproductive. Research and development of reliability engineering tools reflect the need for implementation in CAD frameworks, and fuzzy logic analysis has attracted the attention of the theorists.
Implementation of laser beam sensitive cells: A new approach for integrated circuits testing
Authors: Fouillat P. , Gervais‐Ducouret S. , Lapuyade H. , Dom J. P. 
Published: July 2007

AbstractThe use of library cells, specially designed for their sensitivity to a laser beam, is a potential solution for both ‘observability’ and ‘controllability’ problems encountered by the test engineers. The basic principle relies on the photo‐induced current generated in the laser beam‐silicon interaction. The ‘observation’ cells, when probed by the beam, are used to read directly a logic level inside the circuit, whereas the ‘control’ cells are used to force a particular node of the circuit. A test structure including a 16 bits counter with 16 ‘observation’ cells and 1 ‘control’ cell has been fabricated in BiCMOS technology in order to illustrate this new testing method.
Early detection of ageing in solder joints through laser probe thermal analysis of the peltier effect
Authors: Claeys W. , Quintard V. , Dilhaire S. , Lewis D. , Danto Y. 
Published: July 2007

AbstractWe have recently developed an optical contactless method for testing the quality of solder joints during accelerated thermal cycling ageing processes.1 The method was based upon the measurement of the dynamic thermal behaviour of the joint to short bursts of Joule heating. It has proved to be efficient in revealing the formation of cracks at the lead‐solder interface. We present a method to evaluate ageing at a much earlier stage in the cycling process. We have observed in earlier work,1 that before cracks appear, structural changes occur in the solder at the lead‐solder interface. The thermal response of the solder joint is recorded over time to a Peltier heat perturbation produced by flowing a current pulse through the interface where structural changes occur. The key point in this method is to discriminate the Peltier effect from the Joule thermal response because both effects generate heat. The variation of the early Peltier response in the thermal cycling ageing tests is seen as a quantitative signature of the structural changes in the lead‐solder interface.
Reliability modelling for electromigration failure
Authors: Lloyd J. R. 
Published: July 2007

AbstractElectromigration has been recognized as one of the most important wearout failure mechanisms in integrated circuits. As such, the problem of extrapolating test results for the purpose of reliability predictions is very important to the industry, and the topic has understandably received considerable attention in the professional literature. Over the years, however, there have been serious problems correlating experimental results with theoretical predictions. Recently this dilemma has become resolved through a better understanding of the failure process. This paper will review these developments and the process that has led us to where we are today.
Correlation between 1/f noise and semiconductor laser degradation
Authors: Fukuda Mitsuo , Hirono Takuo , Kurosaki Takeshi , Kano Fumiyoshi 
Published: July 2007

AbstractThe origin of the increase in residual spectral linewidth during device degradation is experimentally and theoretically clarified in a multiple quantum well (MQW) distributed feedback (DFB) laser. Non‐radiative recombination current increases during device degradation and causes 1/f noise to increase. This current 1/f noise is the origin of the increase in the residual spectral linewidth. Through these degradation behaviours, a model showing a correlation between 1/f noise and the semiconductor laser degradation is proposed.
Best compromise test plans for weibull distributions with different censoring times
Authors: Yang Guangbin , Jin Ling 
Published: July 2007

AbstractThis paper presents the best compromise three‐level constant stress accelerated life test plans for Weibull distributions with different censoring times. The best compromise test plans choose the stress levels, test units allocated to each stress and censoring times to simultaneously minimize the asymptotic variance of the MLE of the mean log life at design stress and total running time. This paper also compares the test plans with existing three‐level test plans and concludes that the best compromise test plans (1) have less asymptotic variances, (2) are more robust and (3) are more cost‐effective, than the existing three‐level test plans.
Study of the influence of thermal effects on the electromigration tests
Authors: Abdeslam Saǎd , Lormand Gérard 
Published: July 2007

AbstractA simple one‐dimensional thermal model of the electromigration phenomenon shows that the usual measurement methods of the temperature during lifetime tests usually lead to an erroneous determination of Black's relation parameters n and Q. The effects of the current density and the temperature estimation method on the errors on n and Q are analysed. An estimation of the temperature of the site where the flux divergence is maximum allows us to understand the behaviour of n and Q. The difference between real and apparent activation energy, at low current densities, is also calculated.
A kalman filtering process control scheme with an application in semiconductor short run manufacturing
Authors: Castillo Enrique Del , Montgomery Douglas C. 
Published: July 2007

AbstractA quality control chart for monitoring a short run process during the start‐up phase is presented in this article. The chart is based on the Kalman filter recursive equations being applied to a stable process where the process variance is unknown prior to the start of the production run. The run length properties of this control scheme are discussed. It is shown that for the proposed scheme the run length properties are independent of the unknown process variance and that these properties are appropriate for monitoring a stable process during start‐up. An economic model for the optimal design of the control scheme is presented and illustrated with a wet etching process used in semiconductor manufacturing.
Upper voltage and temperature limitations of stress conditions for relevant dielectric breakdown projections
Authors: Vollertsen R.‐P. , Abadeer W. W. 
Published: July 2007

AbstractParameters and their dependence on stress conditions are discussed using a three‐dimensional model, including all possible degrees of freedom. The results, applied to breakdown data for 10 nm oxide, reveal the upper limits for stress conditions. A physical explanation for the upper voltage limit is presented. Furthermore, the thermal activation energy and the slope of lifetime distributions (e.g., the shape factor β of the Weibull distribution) are investigated as functions of electric field and temperature. The results are compared to available literature data.
Design of hardware algorithms by recurrence relations
Authors: Wakabayashi Shin'ichi , Kikuno Tohru , Yoshida Noriyoshi 
Published: July 2007

AbstractWith the progress in VLSI technology, a remarkable attempt, called the hardware algorithm, to realize various kinds of algorithms directly as hardware on VLSI chip has become practical. No significant result, however, has been observed on the systematic formulation of the hardware algorithm or its design method. This paper proposes a new design method for the hardware algorithm using recurrence relations. As the first step, a class C of problems is introduced which is defined by the recurrence relations with two variables. Several practically important problems such as string matching, are contained in this class. It is shown that letting the size of the problem be m, one can always construct a hardware algorithm of 0(m) steps to solve any problem in the class C. Then by imposing a certain restriction on the recurrence relation, a subclass C1 of the class C is defined. It is shown that the hardware algorithm of 0 (log m + m/log m) steps can be constructed for the subclass C1. Finally, the extension of the class C is discussed, and it is shown that its algorithm can be applied, with some modifications, to a class of recurrence relations which is wider than the class C.
Evaluating the parallelism of the feed‐forward machine and algorithms of the machine
Authors: Tomisawa Masayuki , Yamada Hidekazu , Nakamura Tadao , Shigei Yoshiharu 
Published: July 2007

AbstractThe feed‐forward machine (FFM) is an MISD type computer which executes more than one processing for a single‐data stream. Since more than one operational circuit operates at the same time for a set of input data in FFM, a certain degree of parallel computation can be achieved. This paper discusses such parallelism in FFM. As the first step, a data‐flow graph is used to evaluate the parallelism of FFM. Although FFM cannot utilize all parallelism inherent in the program, it can execute the program with far fewer steps than in a Neumann machine. Computation suited to FFM tends to occur with higher probability as the parallelism in the program is decreased. As an example of application to actual computation, exponent calculation and multiplication‐division of complex numbers are considered. An algorithm suited to FFM is constructed at the arithmetic computation level. Then the computational complexity is examined when several kinds of numerical computations are performed using the algorithm and the result is compared with the case of a Neumann machine, indicating the features of the proposed method.
Parallel processing system for communication control
Authors: Yamashita Masahide 
Published: July 2007

AbstractThis paper proposes a parallel processing system dedicated to communication control. The proposed parallel‐processing communication‐control system contains seven kinds of parallelisms‐two reflecting the hierarchical and multiple structures of the communication links, and five reflecting the mutual relations among functions realizing the link control processings. The system efficiently realizes high‐performance communication control processings. This paper outlines the system structure, derives the system including the modelling of the communication control processings, and discusses the problems in implementation. By using the communication control device based on the system, it becomes easy to construct economically a large‐scale data‐communication network system. The proposed scheme also realizes a new network service based on high‐speed communication links.
Construction of up‐down‐type and shift‐register‐type counters using ternary flip‐flop circuits
Authors: Muranaka Noriaki , Imanishi Shigeru 
Published: July 2007

AbstractConstruction methods for ternary logic circuits and ternary tri‐stable flip‐flops, using ternary basic operational circuits composed only of CMOS‐ICs have been reported. This paper discusses the construction methods for ternary sequential circuits, such as ternary counters, using those ternary logic circuits and ternary tri‐stable flip‐flops. Among various types of ternary tri‐stable flip‐flops, this paper uses two‐stage ternary up, down and up‐down type JK flip‐flops. As the logical‐type ternary counters, up, down and up‐down type divide‐by‐10 counters are realized. Considering then, the constructions of divide‐by‐2 to 9 counters, the input equations for the ternary up‐ and down‐type JK flip‐flops are determined. The feedback‐type ternary divide‐by‐8 counter is also discussed. As the ternary shift‐register type counters, ternary ring counter, ternary Johnson counter, clockwise and counter‐clockwise cycling counters are realized.
Hierarchical routing bus
Authors: Sueyoshi Toshinori 
Published: July 2007

AbstractIn MIMD highly parallel processing systems, such as parallel computers and data flow computers, their capability, cost, and implementability are dependent largely on the implementation of their access mechanis m. This paper proposes a hierarchical routing bus (H‐R bus) which is useful as an access mechanism for such system s. In the H‐R bus, 3‐port bus switches, called T switches, are connected in a hierarchical fashio n. This bus has the following characteristics; (1) a modular structure, thus yielding high expandability, and when many modules are added, its access multiplicity increases; (2) when a system becomes large, its average access distance does not increase greatly; (3) in case of an access contention and collision, distributed arbitration is possible without a deadlock; (4) it requires a small amount of hardware, and a simple interfac e. It is known that any hierarchy‐structured multiprocessor system contains a bottleneck, which causes a problem for highly parallel processin g. This paper considers this issue and shows that the bottleneck effect is not so large in memory‐shared multiprocessor systems of fast access tim e. Finally, a method of removing the bottleneck of the H‐R bus by using 4‐port bus switches (called TT switches) is presented.
Data flow schemata of maximum expressive power
Authors: Matsubara Yasuo 
Published: July 2007

AbstractIn this paper, we propose class ADF of data flow schemata, whose expressive power is equivalent to that of class EF of effective functional s. We consider those classes of functionals that can be implemented by schemata of a class as the expressive power of the clas s. In this sense, EF has the most expressive power among the classes of program schemata known to date.In ADF schemata, we use arbitors of data tokens and recursive procedures which are expanded as macro s. We assume that each arc holds at most one token at the same tim e. In the process of verifying the equivalence of ADF and EF, we show that Turing machines can be emulated by ADF schemata.
Real‐time range measurement device using slit‐ray projection
Authors: Yamamoto Shin , Nakano Tomoaki , Ozeki Osamu 
Published: July 2007

AbstractThis paper describes the construction and the performance of a real‐time measurement device for detecting the range, shape and position of a three‐dimensional object, using the slit‐ray projection method. An experimental machine part sorting system by the device is also described. The real‐time range measurement is performed as follows. The laser slit‐ray is projected on the object, scanning its surface with a high speed. In the meantime, the range to each point on the object surface is determined by triangulation. The operations are executed by a dedicated hardware. The experimental device is composed of a slit‐ray projecting unit, a slit‐ray scanning control unit, a TV camera for the imaging of the ray reflected from the object and the signal processing unit, which calculates the range and the shape of the object. The performance of the device is such that the range to the object and its shape, located in the range of 60 cm × 60 cm at the distance of 100 cm are determined for 48 points (x‐direction) × 50 points (z‐direction) in 490 ms. The accuracy of the range measurement is ±3.0 percent in the above condition. An experimental sorting system of machine parts has been developed using this method. By applying a new range gating method to this device, the sorting of three‐dimensional machine parts was realized in realtime by a simple algorithm, indicating the effectiveness of the proposed method and the device.
ALU logic synthesis using templates
Authors: Takagi Shigeru 
Published: July 2007

AbstractThis paper presents a method of automatic synthesis for ALU circuit based on functional specification. The ALU to be synthesized is specified by a table of functions as well as control codes indicating the selection of each function, and the bitwidth of the data. If the functional specification is expanded directly into the two‐level form, the number of conjunctive terms will become prohibitively large. As a result, the method aims at a multilevel realizaization of ALU, and a model (template) representing the essence of the logic structure of ALU is constructed. The logic expressions for parts of the template are derived from the given functional specification by modification and manipulation of logic expressions. After simplifying partial logic expressions, the lejics are combined. By the proposed method, 32‐bit ALU with 32 logic functions is realized in approximately 40 s using a computer of 2 MIPS. The synthesized logic has a quality comparable to the one by manual design. There can be various ways of defining the template, and by using different templates, various kinds of ALU's can be constructed for the same functional specification.
Fundamental concepts of language processor generator MYLANG
Authors: Anzai Hiroyuki , Yamanoue Takashi 
Published: July 2007

AbstractThis paper describes the fundamental concepts of the language processor generator MYLANG. The language machine in the classical automaton theory is used as the practical model. An algebra is introduced to handle the model easily, and a machine is constructed which can synthesize the model as an algebraic computation. As the algebra for the machine model, the semilinear algebra, i.e., an algebra close to the linear algebra on the language semiring is introduced. The hierarchy of the classes or machine models described by that algebra is examined. The machine model realizing the language processor generated by MYLANG and also realizing MYLANG itself are located at the highest hierarchy, and are constructed in a hierarchical way from the machine models in the lower classes. First, the multiple sequential‐transducer system is given as the syntax‐directed translator. Then some additional mechanisms are combined with this class of machines. Its generator is given as the class of machines of that kind. Finally, the attributes are introduced, and the class of machines aimed at is given as the attributed syntax‐directed translator. Its generator is specified as the class of machines of that kind.
Control circuit synthesis system
Authors: Takagi Shigeru 
Published: July 2007

AbstractThis paper presents a systematic and automatic synthesis procedure based on the behavior specifications and the data path. The system automatically determines the control of the data path components and quasiminimizes the hardware complexity of the control circuit. The major contents are as follows: (1) the control circuit is of the Mealy‐type finite‐state sequential circuit; (2) data path is analyzed, and the components to be controlled and the control signals are determined in order to realize the basic manipulations such as operation and data transfer described in the behavior specifications; (3) concurrent operation of the data path is considered, and the control signals to the nonconcurrent component are encoded or shared; (4) the state used in the specification is encoded into the internal states of the control circuit. The code is determined so that the number of product terms in the state‐transition function or the control output function is quasi‐minimized; (5) based on the result of (3) and (4), the state‐transition function and the control output function representing the data path control condition are determined; (6) the state‐transition function and the control output function are realized by PLA and other devices.
Speaker identification based on frequency distribution of vector‐quantized spectra
Authors: Shirai Katsuhiko , Mano Kazunori , Ishige Shunichi 
Published: July 2007

AbstractAt present, one of the most important problems in speech recognition and speaker recognition is the extraction of individual information from the speech waveform. This paper describes the extraction of individual information by the vector‐quantization and the text‐independent speaker information based on that method. A feature vector is proposed for the first time which is the quantized distribution by the frequency of the vector‐quantization code to represent the individual features of the speaker. The properties of the feature vector are investigated, and effectiveness is verified by an actual speaker‐identification experiment. The quantization distribution is a feature representing the distribution density in the space for the acoustic features, e.g., the spectrum uttered by the individual. As the acoustic feature parameters, the cepstrum for stationary part, and the change of the cepstrum, are used to construct the quantization distribution. The identification rates are compared. As a result of the identification experiment for 10 speakers, an identification rate of 100 percent was achieved by the quantization distribution of cepstrum for 10 input words, which are different from the training samples. In the experiment using 200 speakers, an identification rate of 88 percent was achieved for the first candidates, and a cumulative identification rate of 95 percent was achieved for up to the second candidate.
A presentation method of a traveling image for the sensory feedback for control of the paralyzed upper extremity
Authors: Izumi Takashi , Hoshimiya Nozomu , Fujii Akio , Handa Yasunobu 
Published: July 2007

AbstractFunctional electrical stimulation (FES) is applied to restore the holding function of the upper extremity of quadriplegics whose condition is due to spinal chord injury. In that case, the feedback concerning the state of a patient's finger is needed. As a realistic sensory feedback method, the information transmission by surface electrical stimulation to the shoulder of a patient with remaining sensation is considered. Experiments were performed for a normal subject and for quadriplegics, and the psychophysical characteristics were examined. The following observations were made: By using the stimulus with a time‐varying intensity pattern, a phantom sensation (PS) moving on the surface between two electrodes is produced; by extending the idea to the case of three channels, PS is produced which moves around over a wide range on the shoulder. Then a discrimination experiment was performed for the range of PS movement, and it is shown that PS can be used as a practical method of sensory feedback.