bluuebunny/crossref_metadata_2025_split huggingface dataset:
Extreme Ultraviolet Lithography
Authors: Bergmann Klaus , Juschkin Larissa , Poprawe Reinhart 
Published: June 2010

AbstractExtreme ultraviolet (EUV) lithography represents a photon‐based technology for the mass production of semiconductor devices with small feature sizes. It offers the capability of replacing the conventional lithography by defining structural features below 32 nm, and facilitating the further miniaturization of silicon‐based chip technology down to its physical limits. Although the basic physics of the optics is the same as for conventional lithography operating with UV light at a wavelength of 193 nm, the technological step into the EUV range requires changes of all components of the system. This chapter provides an overview of the system architecture of a EUV scanner and the components; that is, the light sources emitting at a wavelength of approximately 13.5 nm, debris mitigation, grazing incidence collectors, multilayer mirrors and the optical system, and also the photo resist. The underlying fundamentals and technological requirements, as well as the current status of development of the essential components, are addressed.
Nanomanipulation with the Atomic Force Microscope
Authors: Requicha Ari 
Published: June 2010

AbstractManipulation with scanning probe microscopes has been under development for over a decade, and now provides the capability of building nanostructures automatically, from the bottom up, by assembling nanoscale objects such as particles, rods, and tubes. In this chapter, the current research on nanomanipulation is surveyed, with special emphasis placed on techniques that use the atomic force microscope (AFM) as a robot, the nanoscopic end‐effector of which – the tip – interacts directly with the nanoscale features of the sample. The principles of operation of the AFM, and the spatial uncertainties associated with it, are briefly described. Protocols for moving nano‐objects with the AFM tip are discussed, and experimental results presented which show that AFM manipulation can be used to accurately and reliably position molecular‐sized components. These can then be linked by chemical or physical means to form subassemblies, which in turn can be further manipulated. Interactive AFM manipulation systems are discussed, as well as recent results on automated nanomanipulation.
Harnessing Molecular Biology to the Self‐Assembly of Molecular‐Scale Electronics
Authors: Sivan Uri 
Published: June 2010

AbstractSome of the remarkable assembly tools provided by molecular biology are harnessed to the construction of functional electronic devices made of inorganic materials. The assembly scheme highlights key ingredients of complex self‐assembly from an algorithmic encoding of information in double stranded DNA templates through recombinant proteins that read the DNA sequence and use it for localizing the electronic components at desired DNA addresses, to metallization of the DNA to form gold wires connecting the components and antibodies that recognize electronic materials. An equivalence between chemical self‐assembly and communication of a message over noisy lines is pointed out and used to introduce a redundancy error suppression scheme from communication for the suppression of DNA synthesis errors.
Formation of Nanostructures by Self‐Assembly
Authors: Homberger Melanie , Karthäuser Silvia , Simon Ulrich , Voigtländer Bert 
Published: June 2010

AbstractThe increasing demands of the semiconductor industry to fabricate nanostructures of only a few nanometers in size has led to an intensified search for alternative nanofabrication methods. One approach is thebottom‐upstrategy, where nanostructures are built up of nanoparticles, molecules, or even atoms. The great challenge to control the nanostructure formation process can be achieved by use of self‐organization methods. In this chapter, selected routes for the fabrication of various nanostructures by self‐assembly processes are described, and details of the underlying basic physical principles are presented. The control over size, shape and composition of the formed nanostructures is an advantage of the methods addressed here, such as the self‐assembly of nanostructures by epitaxial growth, the formation of self‐assembled monolayers, and the formation of nanoparticle assemblies.
Flash‐Type Memories
Authors: Mikolajick Thomas 
Published: June 2010

AbstractThe trend toward more mobile applications drives a rapidly increasing demand for non‐volatile memories. Today, Flash‐type non‐volatile memories offer by far the best trade‐off between cost and performance. In this chapter, Flash concepts relevant to today and the future are reviewed. Following a brief introduction to the market and the history of Flash memories, the basics required to understand the concepts of Flash memory concepts are explained. These mechanisms are involved in charging and discharging the charge storage layer, as well as the architecture used to combine many cells into large memory arrays. The third section details today's mainstream Flash concepts, which are based on the floating‐gate cell, outlines the physics of the floating‐gate transistor, and introduces the concepts of NOR and NAND Flash. Finally, the main reliability‐determining effects are reviewed, and the further scaling path of floating‐gate memories is illustrated. One way of overcoming the limitations of floating‐gate memories is to replace the conductive floating gate with an insulating charge‐trapping layer; hence, the conventional silicon‐oxide‐nitride‐oxide‐silicon (SONOS) cell and its trade‐offs are explained. Multi‐bit charge trapping, a concept recently introduced for both code and data Flash applications is described in detail, and the scaling of charge‐trapping Flash devices is discussed. Finally, a brief introduction is provided to nanocrystal Flash memory devices, which represent another way of overcoming some basic limitations of the floating gate.
Dynamic Random Access Memory
Authors: Horiguchi Fumio 
Published: June 2010

Abstract
In this chapter, we describe the advanced dynamic random access memory (DRAM) concept, its current use, and future challenges. Today, cutting‐edge DRAMs are encountering scaling limitations such as transistor performance degradation and threshold voltage variation. As device scaling advances, memory cell integration encounters difficulties because of the degradation of transistor performance and fine patterning. All these constraints spur interest in a three‐dimensional structural approach to memory device applications. For the DRAM application, trench or stacked capacitors can be used to overcome capacitor area reduction, and an array transistor can be adopted such as the fin‐type double gate or the surrounding gate transistor structure. The new concept of a floating body cell is a one of the most promising candidates for next‐generation DRAMs.
Ferroelectric Random Access Memory
Authors: Park Soon Oh , Bae Byoung Jae , Yoo Dong Chul , Chung U‐In 
Published: June 2010

AbstractFerroelectric random access memory (FRAM) has been pursued as the ultimate memory due to its superb properties, such as fast random access in read/write mode and non‐volatility with unlimited usage. However, FRAM has achieved only limited success in low‐density applications because of its large cell size and reliability issues. Recently, highly reliable mega‐bit density scaled FRAMs with 1T1C COB (capacitor over bit line) cell structure have been developed with many key processes and new integration technologies. In order to achieve high‐density stand‐alone memory, it is highly desirable to develop three‐dimensional ferroelectric capacitor technology, where chemical vapor deposition technology is essential for fabricating ferroelectrics as well as electrodes. In this chapter, a brief review is provided of the basic principles of FRAM, and particular attention is paid to the reliability and scalability of high‐density FRAM.
Magnetoresistive Random Access Memory
Authors: Gaidis Michael C. 
Published: June 2010

AbstractMagnetoresistive random access memory (MRAM) offers the potential of a universal memory, as it can simultaneously be fast, non‐volatile, dense, and show high‐endurance. MRAM differs from earlier incarnations of magnetic memory in that it tightly couples electronic readout with magnetic storage in a compact device structure that is competitive with state‐of‐the‐art semiconductor memories. While small‐scale demonstrations have realized much of the potential of MRAM, shrinking the cell size or embedding the memory with logic circuitry creates difficult challenges. This chapter provides an overview of the basic MRAM magnetic structure, including an explanation of the functions of various elements in the complex multilayer magnetic film stack. The principles of MRAM circuit design and operation are outlined, together with a detailed examination of the design of a single‐bit cell. A discussion of the techniques developed to fabricate large arrays of MRAM devices with high yield is also included, in addition to some aspects of MRAM reliability and the potential for scaling MRAM for future device generations.
Phase‐Change Memories
Authors: Lacaita Andrea L. , Wouters Dirk J. 
Published: June 2010

AbstractPhase‐change memories (PCM) store their information as the material phase (high‐resistive amorphous, respectively low‐resistive crystalline phase) of a chalcogenide metal alloy, the most important compound being Ge2Sb2Te5(GST). PCM are currently evolving from an interesting new concept to a viable, non‐volatile memory technology that is expected eventually to replace no‐longer‐scaling Flash memory technologies. To provide insight into this important evolution, and why PCM are considered an important technology, this chapter describes their different aspects, commencing with basic operation principles and fundamental material properties. Vital to the operation of PCM are not only the vitrification and crystallization properties of the chalcogenide material, but also the phenomenon of electronic threshold switching, thereby enabling low‐voltage Joule heating in the amorphous phase. The understanding and modeling of these effects are outlined, in addition to cell concepts and aspects of integration technology, including optimization schemes aimed at reducing the program current. Finally, the excellent reliability and scaling properties of PCM are discussed.
Memory Devices Based on Mass Transport in Solid Electrolytes
Authors: Kozicki Michael N. , Mitkova Maria 
Published: June 2010

Abstract
This chapter introduces the concept of low‐energy, non‐volatile memory devices based on mass transport in solid electrolytes. In these devices, information is stored as a change in resistance due to the formation of a metallic filament via the reduction of metal ions in the electrolyte. To show how such elements work, basic solid‐state electrochemistry and ion transport are described, along with the materials science of solid electrolytes, with particular emphasis being placed on the nanostructure of ternary ion conductors. The growth, morphology, and electrical characteristics of metal electrodeposits are discussed and related to both the nature of the materials involved and the operation of memory elements. The configuration and performance of a variety of devices are presented, including factors such as programming speed, endurance, and retention, as well as results that demonstrate physical and electrical scalability of the technology.
Non‐Conventional Complementary Metal‐Oxide‐Semiconductor (CMOS) Devices
Authors: Risch Lothar 
Published: June 2010

AbstractSilicon complementary metal‐oxide‐semiconductor (CMOS) has been the dominating semiconductor technology for over 20 years such that, today whilst the 90‐nm generation is in production the 70‐nm generation is already under development. Currently, many critical device dimensions have reached 1 to 20 nm, and microelectronics is now on a transition to nanoelectronics. In spite of many roadblocks, the ITRS Roadmap expects that Si‐CMOS can be scaled down to the 22‐nm node during the next 15 years. Besides new materials and strain, non‐conventional MOSFETs with thin silicon channels, multi‐gate and 3d structures have the potential to go beyond the planar MOSFET. Already, several architectures, such as fully depleted SOI, wafer‐bonded double‐gate and FinFET have been demonstrated with promising electrical characteristics at gate lengths of 25 to 10 nm. In fact, quantum mechanical simulations predict that these devices can be functional down to 2 nm gate length. Multi‐gate transistors have also been implemented in high‐density Flash memory cells down to 20 nm, and largeVtshifts suitable for multi‐level storage have been achieved. Similarly, for DRAM 3d cell transistors with low leakage currents will be utilized in future. It seems very unlikely that the Si roadmap will end at the 22‐nm node and, assuming that manufacturing and cost issues can be fulfilled, it is most likely that CMOS will continue to dominate in the era of nanotechnology and gigabit systems.
Single‐Electron Transistor and its Logic Application
Authors: Ono Yukinori , Inokawa Hiroshi , Takahashi Yasuo , Nishiguchi Katsuhiko , Fujiwara Akira 
Published: June 2010

Abstract
The single‐electron transistor (SET) is a three‐terminal device, the electric characteristics of which are governed by the movement of single electrons. The SET's physical size is quite small and its performance, such as ON‐OFF current ratio, improves as its size is reduced. The SET is therefore thought to be a promising device for large‐scale and low‐power integrated circuits. In addition, its current characteristics are unique and much different from those of conventional transistors. This makes the SET one of the best functional devices, and a rich variety of architectures for SET‐based logic circuits have been proposed and experimentally tested. This chapter describes SET research from the viewpoint of logic‐circuit applications.
Magnetic Domain Wall Logic
Authors: Allwood Dan A. , Cowburn Russell PVthVV. 
Published: June 2010

Abstract
Magnetic domain wall logic technology is based upon controlling the magnetization processes in ferromagnetic nanowire circuits. Opposite magnetization directions in the nanowires are used to denote logical “1” and “0”. Switching between these two states is achieved by using applied magnetic fields to propagate magnetic domain walls through the nanowires. Nanowire junctions are used to perform various operations, including logical NOT, logical AND, signal fan‐out and signal cross‐over. A suitable combination of these structures in a digital circuit allows any computation to be performed. Data writing and erasing can also achieved by using additional circuit features and control of the applied magnetic field. To illustrate the potential use of magnetic domain wall logic, a shift register with continuous data recirculation is presented. Finally, the future potential of this nascent technology is discussed, with particular emphasis on non‐volatile serial data storage.
Monolithic and Hybrid Spintronics
Authors: Bandyopadhyay Supriyo 
Published: June 2010

Abstract

“Spintronics” is the science and technology of using the spin degree of freedom of a charge carrier, either singly or in conjunction with the charge, to store, process and/or communicate information. Both, classical and quantum mechanical information can be encoded by spin. In this chapter, “hybrid” and “monolithic” spintronics are discussed; the distinction between the two is that, in the former case, spin is not used directly to store or process information; rather, that role is still delegated to charge. But spin influences
how
charge stores or manipulates information. The role of spin is secondary and may, at best, augment the role of charge. Examples of hybrid spintronic devices are spin field effect transistors (SPINFETs) and spin bipolar junction transistors (SBJTs). It is also noted that hybrid devices are not likely to yield major advances in device engineering in the short term. On the other hand, monolithic spintronics, which deals with devices in which spin single‐handedly stores and processes information, is much better poised to make major advances. An example of this is “single spin logic” (SSL), where a single electron acts as a binary element (two‐state switch), its two orthogonal spin polarizations being used to encode binary bits 0 and 1. Switching between bits is accomplished simply by flipping the spin of the electron, without physically moving charges in space and causing a current flow. In this way energy is saved, leading to a much‐reduced power dissipation. The switching time is also not limited by the speed of charge carriers as there is no charge motion. The
maximum
energy dissipated in SSL gate operation is the Landauer–Shannon limit of
kT
ln(
p
) per operation (where 1/
p
is the error probability). The chapter concludes with a brief discussion of spin‐based quantum computing, where the spin of an electron in a quantum dot is used to implement a qubit. Of note, this last section is necessarily brief and will most likely be outdated by the time this book is printed, as rapid strides are being made in that area.
Concepts in Single‐Molecule Electronics
Authors: Lüssem Björn , Bjørnholm Thomas 
Published: June 2010

AbstractMolecular electronics is an exciting and rapidly evolving field of research. Since the first notion of single‐molecular electronics, an ever‐growing number of possible functional molecules have been proposed. This chapter provides a short overview on the recent development of molecular electronics, beginning with a short theoretical introduction in which the basic concepts and terminology of molecular electronics are explained. Subsequently, several techniques to contact single molecules and to measure the current transport across these molecules are described. There follows a description of various compounds that have been shown to exhibit electronic functionality and possible circuits, and architectures that are suited for molecular electronics are introduced. Finally, a brief overview is provided of the main future challenges of molecular electronics.
Intermolecular‐ and Intramolecular‐Level Logic Devices
Authors: Remacle Françoise , Levine Raphael D. 
Published: June 2010

AbstractThe design is discussed of molecule‐based logic circuits where each action implements much more than a switch. Results to date that have been validated byproof of conceptexperiments including on the one hand the implementation of combinational circuits on a single molecule and, on the other hand, the inter‐ and intra‐molecular communication of the results of logic operations. A complementary and even more powerful design is that of a finite‐state logic machine on a single molecule and beyond that, programming of a single molecule. Both electrical and optical addressing and readout are discussed, the advantage being that it is not necessary to be able to address many states as with three states a full adder can already be achieved. The chapter concludes with some perspectives for the future and a list of desiderata.
Nanowire‐Based Programmable Architectures
Authors: DeHon André 
Published: June 2010

AbstractThrough bottom‐up synthesis techniques it is now possible to construct wires which are just a few atoms in diameter; these wires can be selectively field‐effect gated, and wire crossings can act as diodes with programmable resistance. These new capabilities present both opportunities and challenges for constructing nanoscale computing systems. The tiny feature sizes offer a path to economically scale down to atomic dimensions. However, the associated bottom‐up synthesis techniques produce only highly regular structures and demonstrate high defect rates and minimal control during assembly. In order to exploit these technologies, nanowire‐based architectures have been developed which can bridge between lithographic and atomic‐scale feature sizes and tolerate defective and stochastic assembly of regular arrays to deliver high‐density, universal computing devices. Using 10 nm pitch nanowires, these nanowire‐based programmable architectures offer one to two orders of magnitude greater mapped‐logic density than defect‐free lithographic field‐programmable gate arrays at 22 nm.
Quantum Cellular Automata
Authors: Macucci Massimo 
Published: June 2010

AbstractThe processing of logical information has been based, since the time of the first electromechanical computers, on the paradigm of a three‐terminal device operating as a controlled switch, be it a relay, a vacuum tube, or a transistor. Therefore, although the technology has undergone extraordinary developments in terms of device miniaturization, switching speed, reliability, and power consumption, the basic concept behind circuit design has remained substantially unchanged. A bold departure from this traditional implementation is represented by the quantum cellular automaton (QCA) concept, whereby logic computation is achieved by means of two‐dimensional arrays of bistable cells. In this chapter the advantages and scalability of the QCA approach are discussed, as well as the technological difficulties that so far have impaired any attempt to make this technology suitable for large‐scale production.
Quantum Computation: Principles and Solid‐State Concepts
Authors: Weides Martin , Goldobin Edward 
Published: June 2010

AbstractIn this chapter we review the basics of quantum computation and discuss promising physical systems for implementation of a qubit. The advantage of quantum computation over classical computation is shown by presenting the quantum algorithms for searching databases and factorizing numbers. In addition, quantum bits are ideal candidates for secure communication. The operation scheme and error correction of quantum computation are reviewed. First experimental realization of quantum computation by nuclear magnetic resonance is outlined. Several types of scalable solid‐state qubits based on semiconductors and superconducting Josephson junctions (charge, flux and fractional flux qubits) are presented.
Nanoparticles for Cancer Detection and Therapy
Authors: Godin Biana , Serda Rita E. , Sakamoto Jason , Decuzzi Paolo , Ferrari Mauro 
Published: June 2010

AbstractThe administration of nanovectors, nanoparticles or other systems having nanoscale components, that direct active agents to concentrate preferentially into their target lesion sites, has emerged as a striking treatment option which can improve therapeutic index and or enhance the imaging contrast. The challenge in achieving desired pharmacokinetic, pharmacodynamic and toxicological profiles, is decoupled from the specificin vitrorecognition of a biological target, but is directly related to the presence of numerous biobarriers which all molecular agents or nanovectors should surpass to efficiently reach their destination. For more than a decade, oncology has been occupying the foremost position in nanomedicine, being the area of medicine for which numerous ‘nanodrugs’ are routinely used in the clinical situation. This chapter starts with an introduction to tumor physiology and medicaments currently used in oncology. Later, therapeutic and imaging delivery vectors from a ‘nano‐toolbox’, in clinical use and under various stages of development, are presented. The ‘pros’ and ‘cons’ of these systems for the design of specific, personalized and targeted medications are then critically discussed. The advantages of the nanovectors' rational design to efficiently negotiate biobarriers and various aspects of a preclinical characterization for the nanoscale systems are further argued. The chapter concludes with an outlook on the unresolved issues and opportunities in cancer nanomedicine.