bluuebunny/crossref_metadata_2025_split huggingface dataset:
Oligoclonal CD4+T Cells Promote Host Memory Immune Responses to Zwitterionic Polysaccharide ofStreptococcus pneumoniae
Authors: Groneck Laura , Schrama David , Fabri Mario , Stephen Tom Li , Harms Fabian , Meemboor Sonja , Hafke Helena , Bessler Martina , Becker Jürgen C. , Kalka-Moll Wiltrud M. 
Published: June 2009

ABSTRACTZwitterionic polysaccharides of the normal flora bacteria represent a novel class of antigens in that they correct systemic CD4+T-cell deficiencies and direct lymphoid organogenesis during colonization of the host. Presentation of these polysaccharides to CD4+T cells depends on major histocompatibility complex class II- and DM-dependent retrograde transport from lysosomes to the cell surface. Yet the phenotype and clonality of the immune response to the polysaccharide in the mature host immune system have not been studied. Using the zwitterionic capsular polysaccharide Sp1 ofStreptococcus pneumoniae, a transient member of the bacterial flora, in an experimental mouse model of cellular immunity, we demonstrated the accumulation of TH1- and TH17-polarized CD4+CD44highCD62lowCD25−memory T cells. Subcutaneous immunization with Sp1 resulted in an increase of serum immunoglobulin G (IgG), predominantly of the IgG1 subclass, and suggested the presence of a humoral memory response to the polysaccharide. CD4+T cells stimulated with polysaccharide in vitro and in vivo showed a nonrestricted pattern for the T-cell receptor (TCR) β-chain variable region, as demonstrated by semiquantitative reverse transcription-PCR and flow cytometry. Clonotype mapping of in vivo and in vitro polysaccharide-activated CD4+T cells revealed clonotypic TCR transcripts. Taken together, the data show the induction of clonal expansion of CD4+T cells by polysaccharides of commensal bacteria. Cellular and humoral memory host responses imply the ability of these polysaccharides to mediate the expansion of T cells via recognition within the CDR3 region of the TCR.
Prolotherapy injections and eccentric loading exercises for painful Achilles tendinosis: a randomised trial
Authors: Yelland Michael J , Sweeting Kent R , Lyftogt John A , Ng Shu Kay , Scuffham Paul A , Evans Kerrie A 
Published: June 2009

ObjectiveTo compare the effectiveness and cost-effectiveness of eccentric loading exercises (ELE) with prolotherapy injections used singly and in combination for painful Achilles tendinosis.DesignA single-blinded randomised clinical trial. The primary outcome measure was the VISA-A questionnaire with a minimum clinically important change (MCIC) of 20 points.SettingFive Australian primary care centres.Participants43 patients with painful mid-portion Achilles tendinosis commenced and 40 completed treatment protocols.InterventionsParticipants were randomised to a 12-week program of ELE (n=15), or prolotherapy injections of hypertonic glucose with lignocaine alongside the affected tendon (n=14) or combined treatment (n=14).Main outcome measurementsVISA-A, pain, stiffness and limitation of activity scores; treatment costs.ResultsAt 12 months, proportions achieving the MCIC for VISA-A were 73% for ELE, 79% for prolotherapy and 86% for combined treatment. Mean (95% CI) increases in VISA-A scores at 12 months were 23.7 (15.6 to 31.9) for ELE, 27.5 (12.8 to 42.2) for prolotherapy and 41.1 (29.3 to 52.9) for combined treatment. At 6 weeks and 12 months, these increases were significantly less for ELE than for combined treatment. Compared with ELE, reductions in stiffness and limitation of activity occurred earlier with prolotherapy and reductions in pain, stiffness and limitation of activity occurred earlier with combined treatment. Combined treatment had the lowest incremental cost per additional responder ($A1539) compared with ELE.ConclusionsFor Achilles tendinosis, prolotherapy and particularly ELE combined with prolotherapy give more rapid improvements in symptoms than ELE alone but long-term VISA-A scores are similar.Trial registration numberACTRN: 12606000179538
Detection of testosterone administration based on the carbon isotope ratio profiling of endogenous steroids: international reference populations of professional soccer players
Authors: Strahm E , Emery C , Saugy M , Dvorak J , Saudan C 
Published: June 2009

Background and objectives:The determination of the carbon isotope ratio in androgen metabolites has been previously shown to be a reliable, direct method to detect testosterone misuse in the context of antidoping testing. Here, the variability in the13C/12C ratios in urinary steroids in a widely heterogeneous cohort of professional soccer players residing in different countries (Argentina, Italy, Japan, South Africa, Switzerland and Uganda) is examined.Methods:Carbon isotope ratios of selected androgens in urine specimens were determined using gas chromatography/combustion/isotope ratio mass spectrometry (GC-C-IRMS).Results:Urinary steroids in Italian and Swiss populations were found to be enriched in13C relative to other groups, reflecting higher consumption of C3 plants in these two countries. Importantly, detection criteria based on the difference in the carbon isotope ratio of androsterone and pregnanediol for each population were found to be well below the established threshold value for positive cases.Conclusions:The results obtained with the tested diet groups highlight the importance of adapting the criteria if one wishes to increase the sensitivity of exogenous testosterone detection. In addition, confirmatory tests might be rendered more efficient by combining isotope ratio mass spectrometry with refined interpretation criteria for positivity and subject-based profiling of steroids.
Non-steroidal anti-inflammatory drugs in sports medicine: guidelines for practical but sensible use: Table 1
Authors: Paoloni J A , Milne C , Orchard J , Hamilton B 
Published: June 2009

Introduction:Non-steroidal anti-inflammatory drugs (NSAID) are commonly used in sports medicine. NSAID have known anti-inflammatory, analgesic, antipyretic and antithrombotic effects, although their in-vivo effects in treating musculoskeletal injuries in humans remain largely unknown. NSAID analgesic action is not significantly greater than paracetamol for musculoskeletal injury but they have a higher risk profile, with side-effects including asthma exacerbation, gastrointestinal and renal side-effects, hypertension and other cardiovascular diseases.Discussion:The authors recommend an approach to NSAID use in sports medicine whereby simple analgesia is preferentially used when analgesia is the primary desired outcome. However, based both on the current pathophysiological understanding of most injury presentations and the frequency that inflammation may actually be a component of the injury complex, it is premature to suppose that NSAID are not useful to the physician managing sports injuries. The prescribing of NSAID should be cautious and both situation and pathology specific. Both dose and duration minimisation should be prioritised and combined with simple principles of protection, rest, ice, compression, elevation (PRICE), which should allow NSAID-sparing. NSAID use should always be coupled with appropriate physical rehabilitation.Conclusion:NSAID are probably most useful for treating nerve and soft-tissue impingements, inflammatory arthropathies and tenosynovitis. They are not generally indicated for isolated chronic tendinopathy, or for fractures. The use of NSAID in treating muscle injury is controversial. Conditions in which NSAID use requires more careful assessment include ligament injury, joint injury, osteoarthritis, haematoma and postoperatively.
Validation of the VISA-A questionnaire for Turkish language: the VISA-A-Tr study: Table 1
Authors: Dogramaci Yunus , Kalaci Aydiner , Kücükkübaş Nigar , Inandı Taceddin , Esen Erdinc , Yanat A Nedim 
Published: June 2009

ObjectivesTo evaluate the validity and reliability of the Turkish version of the Victorian Institute of Sports Assessment-Achilles (VISA-A) questionnaire for patients with Achilles tendinopathy.DesignFifty-five patients with a diagnosis of Achilles tendinopathy and 55 healthy subjects were included in the study. VISA-A questionnaires were translated and culturally adapted into Turkish. The final Turkish version (VISA-A-Tr) was tested for reliability on healthy individuals and patients. Tests for internal consistency, validity and structure were performed on 55 patients.ResultsThe VISA-A-Tr showed good test–retest reliability (Pearson's r=0.99, p<0.001). The patients with Achilles tendinopathy had a significantly lower score (p<0.001) than the healthy individuals. The VISA-A-Tr score correlated significantly with the Stanish tendon grading system (Spearman's r=−0.86; p<0.001).ConclusionThe VISA-A-Tr is a valid and reliable tool for evaluating the severity of Achilles tendinopathy.
DIRECT COMPUTATION OF STRESSES IN PLANAR LINEARIZED ELASTICITY
Authors: CIARLET PHILIPPE G. , CIARLET PATRICK 
Published: June 2009

Given a simply-connected domain Ω in ℝ2, consider a linearly elastic body with [Formula: see text] as its reference configuration, and define the Hilbert space [Formula: see text] Then we recently showed that the associated pure traction problem is equivalent to finding a 2 × 2 matrix field ∊ = (∊αβ) ∈ 𝔼(Ω) that satisfies [Formula: see text] where [Formula: see text] where (Aαβστ) is the elasticity tensor, and ℓ is a continuous linear form over 𝔼(Ω) that takes into account the applied forces. Since the unknown stresses (σαβ) inside the elastic body are then given by σαβ = Aαβστ eστ, this minimization problem thus directly provides the stresses. We show here how the above Saint Venant compatibility condition ∂11 e22 - 2∂12e12 + ∂22e11 = 0 in H-2(Ω) can be exactly implemented in a finite element space 𝔼h, which uses "edge" finite elements in the sense of J. C. Nédélec. We then establish that the unique solution ϵh of the associated discrete problem, viz., find ϵh ∈ 𝔼h such that [Formula: see text] converges to ϵ in the space [Formula: see text]. We emphasize that, by contrast with a mixed method, only the approximate stresses are computed in this approach.
Live-range unsplitting for faster optimal coalescing
Authors: Blazy Sandrine , Robillard Benoit 
Published: June 2009

Register allocation is often a two-phase approach: spilling of registers to memory, followed by coalescing of registers. Extreme live-range splitting (i.e. live-range splitting after each statement) enables optimal solutions based on ILP, for both spilling and coalescing. However, while the solutions are easily found for spilling, for coalescing they are more elusive. This difficulty stems from the huge size of interference graphs resulting from live-range splitting.
This paper focuses on coalescing in the context of extreme live-range splitting. It presents some theoretical properties that give rise to an algorithm for reducing interference graphs. This reduction consists mainly in finding and removing useless splitting points. It is followed by a graph decomposition based on clique separators. The reduction and decomposition are general enough, so that any coalescing algorithm can be applied afterwards.
Our strategy for reducing and decomposing interference graphs preserves the optimality of coalescing. When used together with an optimal coalescing algorithm (e.g. ILP), optimal solutions are much more easily found. The strategy has been tested on a standard benchmark, the optimal coalescing challenge. For this benchmark, the cutting-plane algorithm for optimal coalescing (the only optimal algorithm for coalescing) runs 300 times faster when combined with our strategy. Moreover, we provide all the optimal solutions of the optimal coalescing challenge, including the three instances that were previously unsolved.
Push-assisted migration of real-time tasks in multi-core processors
Authors: Sarkar Abhik , Mueller Frank , Ramaprasad Harini , Mohan Sibin 
Published: June 2009

Multicores are becoming ubiquitous, not only in general-purpose but also embedded computing. This trend is a reflexion of contemporary embedded applications posing steadily increasing demands in processing power. On such platforms, prediction of timing behavior to ensure that deadlines of real-time tasks can be met is becoming increasingly difficult. While real-time multicore scheduling approaches help to assure deadlines based on firm theoretical properties, their reliance on task migration poses a significant challenge to timing predictability in practice. Task migration actually (a) reduces timing predictability for contemporary multicores due to cache warm-up overheads while (b) increasing traffic on the network-on-chip (NoC) interconnect.
This paper puts forth a fundamentally new approach to increase the timing predictability of multicore architectures aimed at task migration in embedded environments. A task migration between two cores imposes cache warm-up overheads on the migration target, which can lead to missed deadlines for tight real-time schedules. We propose novel micro-architectural support to migrate cache lines. Our scheme shows dramatically increased predictability in the presence of cross-core migration.

Experimental results for schedules demonstrate that our scheme enables real-time tasks to meet their deadlines in the presence of task migration. Our results illustrate that increases in execution time due to migration is reduced by our scheme to levels that may prevent deadline misses of real-time tasks that would otherwise occur. Our mechanism imposes an overhead at a fraction of the task's execution time, yet this overhead can be steered to fill idle slots in the schedule,
i.e.
, it does not contribute to the execution time of the migrated task. Overall, our novel migration scheme provides a unique mechanism capable of significantly increasing timing predictability in the wake of task migration.
Synergistic execution of stream programs on multicores with accelerators
Authors: Udupa Abhishek , Govindarajan R. , Thazhuthaveetil Matthew J. 
Published: June 2009

The StreamIt programming model has been proposed to exploit parallelism in streaming applications on general purpose multicore architectures. The StreamIt graphs describe task, data and pipeline parallelism which can be exploited on accelerators such as Graphics Processing Units (GPUs) or CellBE which support abundant parallelism in hardware.
In this paper, we describe a novel method to orchestrate the execution of a StreamIt program on a multicore platform equipped with an accelerator. The proposed approach identifies, using profiling, the relative benefits of executing a task on the superscalar CPU cores and the accelerator. We formulate the problem of partitioning the work between the CPU cores and the GPU, taking into account the latencies for data transfers and the required buffer layout transformations associated with the partitioning, as an integrated Integer Linear Program (ILP) which can then be solved by an ILP solver.We also propose an efficient heuristic algorithm for the work partitioning between the CPU and the GPU, which provides solutions which are within 9.05% of the optimal solution on an average across the benchmark suite. The partitioned tasks are then software pipelined to execute on the multiple CPU cores and the Streaming Multiprocessors (SMs) of the GPU. The software pipelining algorithm orchestrates the execution between CPU cores and the GPU by emitting the code for the CPU and the GPU, and the code for the required data transfers. Our experiments on a platform with 8 CPU cores and a GeForce 8800 GTS 512 GPU show a geometric mean speedup of 6.84X with a maximum of 51.96X over a single threaded CPU execution across the StreamIt benchmarks. This is a 18.9% improvement over a partitioning strategy that maps only the filters that cannot be executed on the GPU -- the filters with state that is persistent across firings -- onto the CPU.
Specification and verification of time requirements with CCSL and Esterel
Authors: André Charles , Mallet Frédéric 
Published: June 2009

The UML Profile for Modeling and Analysis of Real-Time and Embedded (MARTE) systems has recently been adopted by the OMG. Its Time Model extends the informal and simplistic Simple Time package proposed by UML2 and offers a broad range of capabilities required to model real-time systems including discrete/dense and chronometric/logical time. MARTE OMG specification introduces a Time Structure inspired by Time models of the concurrency theory and proposes a new clock constraint specification language (CCSL) to specify, within the context of UML, logical and chronometric time constraints.
This paper introduces the formal semantics of a fundamental subset of CCSL clock constraints and proposes a process to use CCSL both as a high-level specification language for UML models and as a golden model to verify the conformance of implementations with the specification.
A digital filtering video application is used as a running example to support the discussion. The application is first formally specified with CCSL and the specification is refined based on feedback from our CCSL-dedicated simulator. In a second phase, an Esterel program of the application is considered. This program is instrumented with observers derived from the CCSL specification. Esterel Studio formal verification facilities are then used to check the conformity of the Esterel implementation with the CCSL specification. A specific library of Esterel observers has been built for this purpose.
Stream chaining
Authors: Diaz Pedro , Cintra Marcelo 
Published: June 2009

Data prefetching has long been an important technique to amortize the effects of the memory wall, and is likely to remain so in the current era of multi-core systems. Most prefetchers operate by identifying patterns and correlations in the miss address stream. Separating streams according to the memory access instruction that generates the misses is an effective way of filtering out spurious addresses from predictable streams. On the other hand, by localizing streams based on the memory access instructions, such prefetchers both lose the complete time sequence information of misses and can only issue prefetches for a single memory access instruction at a time.
This paper proposes a novel class of prefetchers based on the idea of linking various localized streams into predictable chains of missing memory access instructions such that the prefetcher can issue prefetches along multiple streams. In this way the prefetcher is not limited to prefetching deeply for a single missing memory access instruction but can instead adaptively prefetch for other memory access instructions closer in time.
Experimental results show that the proposed prefetcher consistently achieves better performance than a state-of-the-art prefetcher -- 10% on average, being only outperformed in very few cases and then by only 2%, and outperforming that prefetcher by as much as 55% -- while consuming the same amount of memory bandwidth.
Rigel
Authors: Kelm John H. , Johnson Daniel R. , Johnson Matthew R. , Crago Neal C. , Tuohy William , Mahesri Aqeel , Lumetta Steven S. , Frank Matthew I. , Patel Sanjay J. 
Published: June 2009

This paper considers Rigel, a programmable accelerator architecture for a broad class of data- and task-parallel computation. Rigel comprises 1000+ hierarchically-organized cores that use a fine-grained, dynamically scheduled single-program, multiple-data (SPMD) execution model. Rigel's low-level programming interface adopts a single global address space model where parallel work is expressed in a task-centric, bulk-synchronized manner using minimal hardware support. Compared to existing accelerators, which contain domain-specific hardware, specialized memories, and/or restrictive programming models, Rigel is more flexible and provides a straightforward target for a broader set of applications.We perform a design analysis of Rigel to quantify the compute density and power efficiency of our initial design. We find that Rigel can achieve a density of over 8 single-precision GFLOPS/mm2in 45nm, which is comparable to high-end GPUs scaled to 45nm. We perform experimental analysis on several applications ported to the Rigel low-level programming interface. We examine scalability issues related to work distribution, synchronization, and load-balancing for 1000-core accelerators using software techniques and minimal specialized hardware support. We find that while it is important to support fast task distribution and barrier operations, these operations can be implemented without specialized hardware using flexible hardware primitives.
The performance of PC solid-state disks (SSDs) as a function of bandwidth, concurrency, device architecture, and system organization
Authors: Dirik Cagdas , Jacob Bruce 
Published: June 2009

As their prices decline, their storage capacities increase, and their endurance improves, NAND Flash Solid State Disks (SSD) provide an increasingly attractive alternative to Hard Disk Drives (HDD) for portable computing systems and PCs. This paper presents a study of NAND Flash SSD architectures and their management techniques, quantifying SSD performance under user-driven/PC applications in a multi-tasked environment; user activity represents typical PC workloads and includes browsing files and folders, emailing, text editing and document creation, surfing the web, listening to music and playing movies, editing large pictures, and running office applications.
We find the following: (a) the real limitation to NAND Flash memory performance is not its low per-device bandwidth but its internal core interface; (b) NAND Flash memory media transfer rates do not need to scale up to those of HDDs for good performance; (c) SSD organizations that exploit concurrency at both the system and device level (e.g. RAID-like organizations and Micron-style (superblocks) improve performance significantly; and (d) these system- and device-level concurrency mechanisms are, to a significant degree, orthogonal: that is, the performance increase due to one does not come at the expense of the other, as each exploits a different facet of concurrency exhibited within the PC workload.
End-to-end performance forecasting
Authors: Saidi Ali G. , Binkert Nathan L. , Reinhardt Steven K. , Mudge Trevor 
Published: June 2009

Many important workloads today, such as web-hosted services, are limited not by processor core performance but by interactions among the cores, the memory system, I/O devices, and the complex software layers that tie these components together. Architects designing future systems for these workloads are challenged to identify performance bottlenecks because, as in any concurrent system, overheads in one component may be hidden due to overlap with other operations. These overlaps span the user/kernel and software/hardware boundaries, making traditional performance analysis techniques inadequate.
We present a methodology for identifying end-to-end critical paths across software and simulated hardware in complex networked systems. By modeling systems as collections of state machines interacting via queues, we can trace critical paths through multiplexed processing engines, identify when resources create bottlenecks (including abstract resources such as flow-control credits), and predict the benefit of eliminating bottlenecks by increasing hardware speeds or expanding available resources.
We implement our technique in a full-system simulator and analyze a TCP microbenchmark, a web server, the Linux TCP/IP stack, and an Ethernet controller. From a single run of the microbenchmark, our tool--within minutes--correctly identifies a series of bottlenecks, and predicts the performance of hypothetical systems in which these bottlenecks are successively eliminated, culminating in a total speedup of 3X.We then validate these predictions through hours of additional simulation, and find them to be accurate within 1--17%. We also analyze the web server, find it to be CPU-bound, and predict the performance of a system with an additional core within 6%.