bluuebunny/crossref_metadata_2025_split huggingface dataset:
Floating-Gate Ion Sensitive Field-Effect Transistor for Chemical and Biological Sensing
Authors: Zhao Ben , Sai Tsunehiro , Rahman Arifur , Levon Kalle 
Published: April 2011

ABSTRACTThis paper presents the use of Floating-Gate Ion Sensitive Field-Effect Transistor (FGISFET) as a real-time chemical and biological sensor. The structure of FGISFET is similar to that of an electrically erasable programmable read-only memory (EEPROM). The floating-gate of a FGISFET is connected to an exposed metallic structure, which serves as a probe for detecting ionic activities. By applying ion-sensitive chemical and biological materials to the floating gate, its threshold voltage can be modulated in the presence of selective chemical or biological targets. As a demonstration, FGISFETs have been fabricated in 1.2 μm process technology available through MOSIS [1]. Our preliminary measurements confirmed the basic design and operation of FGISFET, and using doped aniline trimer (TANI) as a sensing material, we were able to sense 70ppm of ammonium gas.
Non Volatile Memory Technologies: Floating Gate Concept Evolution
Authors: Clementi Cesare , Bez Roberto 
Published: April 2011

ABSTRACTThe most relevant phenomenon of this last decade in the field of semiconductor memories has been the explosive growth of the Flash memory market, driven by cellular phones and other types of electronic portable equipments (palm top, mobile PC, mp3 audio player, digital camera and so on). Moreover, in the coming years portable systems will ask even more non volatile memories either with high density and very high writing throughput for data storage application, or with fast random access for code execution in place. The strong consolidated know-how (more than ten years of experience), the flexibility and the cost make the floating gate Flash Memory a largely utilized, well-consolidated and mature technology for most of the non-volatile memory application. Today Flash sales represent a considerable amount of the overall semiconductor market.Nowadays two of the several cell architecture proposed up to now can be considered as industry standard: the common ground NOR Flash that due to its versatility is addressing both the code and data storage segments and the NAND Flash, optimized for the data storage market.The exploitation of the multilevel approach at each technology node allows the increase of the memory efficiency, about doubling the density at the same chip size, widening the application range and reducing the cost per bit.In this paper the main issues related to both NOR and NAND Flash memory technology will be summarized, with the aim of describing both the basic functionality of the memory cell and the main cell architecture today consolidated. Both cells are basically a floating-gate MOS transistor, programmed by channel hot electron (NOR) or by Fowler-Nordheim tunneling (NAND) and erased by Fowler-Nordheim tunnel. The main reliability properties, charge retention and endurance, are presented, together with some comments on the basic physical mechanisms responsible for.A couple of innovative approaches to floating gate cell evolution, namely nanocrystal memory and 3-D cell will be described.Finally the Flash cell scaling issues will be covered, pointing out the main challenges. The Flash cell scaling has been demonstrated to be really possible and to be able to follow the Moore's law down to the 90 nm technology generations. The technology development and the consolidated know-how are expected to sustain the scaling trend down to the 50 nm technology node and below as forecasted by the ITRS roadmap.
Characterization of MFMIS and MFIS Structures for Non-volatile Memory Applications
Authors: Rahman Mosiur , Kalkur T. S. , Sun Shunming , Gnadinger Fred P. , Dalton David , Kim Daesig , Olariu Viorel , Klingensmith David 
Published: April 2011

ABSTRACTTo eliminate the interface reaction problems between ferroelectric and semiconductor in MFS (metal-ferroelectric-semiconductor) as well as ferroelectric and insulator in MFIS (metal-ferroelectric-insulator-semiconductor) structures, a gate layer sandwich of the MFMIS (metal-ferroelectric-metal-insulator-semiconductor) is proposed. This structure consists of Pt-SBT-Pt-ZrO2-SiO2-Si stacks. In the MFMIS structure the MIS capacitor is separated from the ferroelectric MFM capacitor through a metal as a floating gate. Therefore, the MIS capacitor with SiO2 and ZrO2 as an insulator with excellent interface properties can be used and MFM acts as an ideal ferroelectric capacitor. As MFMIS is a series combination of MFM and MIS capacitors, it behaves as a voltage divider. The gate voltage is divided according to the capacitance ratio of the MIS and MFM structures. Since the fabricated devices have access to the floating gate, characteristics of the MFM and MIS capacitors can be determined independently to compare the characteristics of the MFMIS structure as a single capacitor. The ferroelectric can be programmed in one direction and the field effect due to that can be analyzed. The MFMIS structures showed significant memory window due to the polarization of ferroelectric thin films but the retention time was short. The short retention time was due to the depolarization field being larger than coercive field of the ferroelectric thin film.
Characterization of Electronic Charged States of Silicon Nanocrystals as a Floating Gate in MOS Structures
Authors: Miyazaki Seiichi , Shibaguchi Taku , Ikeda Mitsuhisa 
Published: April 2011

ABSTRACTWe have studied capacitance-voltage (C-V) and displacement current-voltage characteristics of MOS capacitors with Si nanocrystals embedded in the gate oxide as a floating gate in dark and under visible light illumination at room temperature to gain a better understanding of discrete charged states of the Si-dots floating gate. The Si-dots floating gate with a dot density of 2.8×1011cm-2 and an average dot size of 8nm was fabricated on ∼2.8nm-thick thermally-grown SiO2 as a tunnel oxide by the thermal decomposition of SiH4, and covered with 7.5nm-thick control oxide prepared by thermal oxidation of a-Si. C-V characteristics of Al-gate MOS capacitors on p-type and n-type Si(100) show unique hystereses due to the charging and discharging of the Si-dots floating gate with a symmetric pattern reflecting the Fermi level of the substrate, which enable us to rule out the contribution of traps with a specific energy state to the observed hystereses. For each of high-frequency C-V curves measured in dark, a single capacitance peak appears only around a flat-band voltage condition, which is attributed to the quick flat-band voltage shift caused by the collective emission of charges retaining in the Si-dots floating gate as confirmed from the corresponding displacement current peak. Under visible light illumination, another capacitance peak due to collective charge injection to the electrically neutral Si-dots floating gate becomes observable in the inversion condition governing the on-state of MOS FETs. Thus, the optimum bias conditions for dot-floating gate MOSFETs can be predicted from the capacitor characteristics measured under light illumination.
Enhanced Spontaneous Polarization of Dysprosium-substituted Lead Zirconate Titanate Thin Films by a Chemical Solution Deposition Method
Authors: Uchida Hiroshi , Nakaki Hiroshi , Okamoto Shoji , Yokoyama Shintaro , Funakubo Hiroshi , Koda Seiichiro 
Published: April 2011

ABSTRACTInfluences of the B-site substitution using Dy3+ ion on the crystal structure and ferroelectric properties of lead zirconate titanate (PZT) films were investigated. Dy3+-substituted PZT films with nominal chemical compositions of Pb1.00Dyx (Zr0.40Ti0.60)1-(3x/4)O3 (x = 0 ∼ 0.06) were fabricated by a chemical solution deposition (CSD). Polycrystalline PZT films with preferential orientation of (111)PZT were obtained on (111)Pt/TiO2/SiO2/(100)Si substrates, while epitaxially-grown (111)PZT films were fabricated on (111)SrRuO3//(111)Pt//(100)YSZ//(100)Si substrate. Ratio of PZT lattice parameters (c/a), which corresponds to its crystal anisotropy, was enhanced by the Dy3+-substitution with x = 0.02. Spontaneous polarization (Ps) of Dy3+-substituted PZT film (x = 0.02) along polar [001] axis of PZT lattice was estimated from saturation polarization (Psat) value of the epitaxially-grown (111)PZT film on (111)SrRuO3//(111)Pt//(100)YSZ//(100)Si to be 84 μC/cm2 that was significantly larger than that of non-substituted PZT (= 71 μC/cm2). We concluded that the enhancement of Ps value could be achieved by the Dy3+-substitution that promoted the crystal anisotropy of PZT lattice.
Synthesis and Electrical Characterization of a MOS Memory Containing Pt Nanoparticles Deposited at a SiO2/ HfO2 Interface
Authors: Sargentis Ch. , Giannakopoulos K. , Travlos A. , Tsamakis D. 
Published: April 2011

ABSTRACTMOS memory devices containing semiconductor nanocrystals have drawn considerable attention recently, due to their advantages when compared to the conventional memories. Only little work has been done on memory devices containing metal nanoparticles.We describe the fabrication of a novel MOS device with embedded Pt nanoparticles in the HfO2 / SiO2 interface of a MOS device. Using as control oxide, a high-k dielectric, our device has a great degree of scalability. The fabricated nanoparticles are very small (about 5 nm) and have high density. High frequency C-V measurements demonstrate that this device operates as a memory device.
Experimental Observation of Non-Volatile Charge Injection and Molecular Redox in Fullerenes C60 and C70 in an EEPROM-Type Device
Authors: Ganguly Udayan , Lee Chungho , Kan Edwin C. 
Published: April 2011

ABSTRACTMolecular interface with CMOS is an area indispensable to the enhancement of our understanding of the nano-scale world. We report the integration of fullerenes in CMOS gate stack and demonstrate a functional molecular interface by effecting molecular redox operations through non-volatile charge injection in an EEPROM-type device. The gate stack of the MOS capacitor consists of a tunneling thermal oxide. A sub-monolayer of fullerenes is deposited. Then the control oxide is deposited and finally the gate metal is patterned. Charge injection occurs at a specific potential of the fullerene molecules with respect to the conduction band of Si at the Si/SiO2 interface, independent of the concentration of the fullerene sub-monolayer. This strongly indicates molecular redox in solid state that is electrostatically controllable. Such molecular interfaces can be used to enhance the spatial sensitivity of chemical sensors like the CνMOS to be able to interface with macromolecular systems.
Synthesis and Spectroellipsometric Characterization of Y2O3-stabilized ZrO2-Au Nanocomposite Films for Smart Sensor Applications
Authors: Sirinakis George , Sun Richard , Siddique Rezina , Efstathiadis Harry , Carpenter Michael A. , Kaloyeros Alain E. 
Published: April 2011

ABSTRACTNoble metal nanoparticles exhibit significant potential in all-optical, smart-sensing applications due to their unique optical properties. In particular, gold (Au) nanoparticles exhibit a strong surface plasmon resonance (SPR) band, the spectral position and shape of which depends on the size, shape, and density of the nanoparticles and the physical and chemical properties of surrounding environment. Embedding the nanoparticles in an yttria-stabilized zirconia (YSZ) matrix is believed to expand their range of operation to temperatures above 500 °C. YSZ is a material that has been proven suitable for optical applications due to its high refractive index, low absorption coefficient and high transparency in the visible and infrared regions. Thus, its use as a base platform for nanocomposite thin films is expected to provide significant benefits in the development of harsh environment multifunctional sensors.In this work YSZ-Au nanocomposite films were synthesized from a YSZ and a Au target by the radio frequency magnetron co-sputtering technique in combination with a post-deposition annealing treatment in an argon atmosphere, with the annealing temperature being varied from 500–1000 °C in steps of 100 °C. The microstructure and the optical properties of the resulting films were characterized by x-ray diffraction spectroscopy, scanning electron microscopy and spectroscopic ellipsometry. Results on the effect of the Au particle size on the real and the imaginary part of the refractive index of the nanostructured composites are presented. Future smart sensor systems utilizing these multifunctional material sets for harsh environment sensing applications will likewise be outlined.
AC Loss Modeling in Ba0.5Sr0.5TiO3 Using Dielectric Relaxation
Authors: Pervez Nadia K. , Lu Jiwei , Stemmer Susanne , York Robert A. 
Published: April 2011

ABSTRACTIn universal relaxation, a material's complex dielectric susceptibility follows a fractional power law f1-n where 0 < n < 1 over multiple decades of frequency. In a variety of materials, including Ba0.5Sr0.5Ti03, dielectric relaxation has been observed to follow this universal relaxation model with values of n close to 1. In this work we have shown that the universal relaxation model can be used to calculate dielectric loss even when n is very close to 1. Our calculated Q-factors agree with measured values at 1 MHz; this agreement suggests that this technique may be used for higher frequencies where network analyzer measurements and electrode parasitics complicate Q-factor determination.
RF Magnetron Sputtered Ba0.96Ca0.04Ti0.84Zr0.16O3 Thin Films for High Frequency Applications
Authors: Mahmud Ali , Kalkur T. S. , Cramer N. 
Published: April 2011

ABSTRACTPerovskite ferroelectric thin films in the paraelectric state exhibit outstanding dielectric properties, even at high frequencies (>1 GHz). The tunable dielectric constant of ferroelectric thin films can be used to design frequency and phase agile components. High dielectric constant thin film ferroelectric materials in the paraelectric state have received enormous attention due to their feasibility in applications such as decoupling capacitors and tunable microwave capacitors; the latter application has been fueled by the recent explosion in wireless and satellite communications. This paper reportsBa0.96Ca 0.04Ti0.84Zr0.16O3 (BCTZ) thin films that were deposited on Pt electrodes using radio frequency magnetron sputtering at a low (450 °C) substrate temperature. Sputtered thin film BCTZ at low substrate temperature is compatible with conventional integrated circuit technology. The structural characterization of the deposited films was performed by x-ray diffraction. The electrical characterization of the films was achieved by capacitance-voltage, current-voltage, and S-parameter (via vector network analyzer) measurements. In addition, the effect of post annealing on the deposited films was investigated. A detailed understanding of both their processing and material properties is discussed for successful implementation in high frequency applications.
An Application of a Low-Loss MOD-Made BST Film Developed Especially with PLD Initial Nucleation Layer to a 20 GHz Tunable Phase Shifter
Authors: Noda Minoru , Popovici Daniel , Okuyama Masanori , Sasaki Yoshinobu , Komaru Makio 
Published: April 2011

ABSTRACTBarium Strontium Titanate (BST) thin films have been deposited on (100)-oriented MgO substrate by combining preparation of initial layer by Pulsed Laser Deposition and main layer by Metal-Organic-Decomposition method. Films with an initial layer of 20, 30 and 40 nm thickness and final thickness of 400, 650 and 800 nm have been obtained. Physical and dielectric properties of the BST thin films have been characterized from the viewpoint of frequency-agile micro and millimeter wave circuit applications. The results reveal that Ba0.6Sr0.4TiO3 thin films have a good crystallinity with characteristic orientation that is affected by the deposition conditions of the initial layer. Interdigital capacitor with a gap of 10 μm has been characterized and the dielectric loss and tunability are as low as 0.002 to 0.004 and 12%, respectively, at frequency of 1 MHz for the applied voltage from -/+40V to +/-40V. At microwave frequencies, classical coplanar waveguide lines formed on BST/(100)MgO were investigated. A differential phase shift of 18 degree was obtained at 20 GHz with insertion loss of about −2 dB at 60 V for Au/Cr interconnection. Finally, a 3-stage LC-ladder-type phase shifter with variable capacitors of BST thin film has been fabricated considering the experimental results obtained for the coplanar waveguide lines and a maximum phase shift of 40 degrees is obtained at 20 GHz at 60 V.
Integrating Ba1-xSrxTiO3 Thin Films with Large Area, Affordable, Industry Standard Substrates for Microwave Applications
Authors: Nothwanga W. D. , Cole M. W. , Joshi P. C. , Hirsch S. , Ngo E. , Hubbard C. , Demaree J. D. 
Published: April 2011

ABSTRACTThe US Army is actively pursuing technologies to enable transformation goals of a lighter, faster, more potent force via affordable, electronically scanned phased array antennas (ESA's) that will provide the means for achieving a high data rate with beyond-line-of-sight, mobile communications. In order to transition this technology to Army applications, it is important that the cost of each device be decreased from current technology. Traditionally, paraelectric, active thin films of magnesium doped barium strontium titanate, have been deposited on expensive ceramic (MgO, LaAlO3, SrTiO3, Al2O3) substrates, and compositionally designed for tunable microwave applications. By integrating an active, thin film material with a large area, low cost, microwave friendly substrate, the cost could be significantly reduced. While Si is not a suitable substrate for microwave applications, a low cost, microwave friendly, buffer layer on silicon would be.A high performance Ta2O5 thin film, passive, buffer layer on Si substrates has been successfully designed, fabricated, characterized, and optimized via metalorganic solution decomposition technique. The optimized Ta2O5 based thin film exhibited suitable microwave material properties, including an enhanced dielectric constant (εr = 45.6), low dielectric loss (tan δ=0.006), low leakage current, high film resistivity (ρ=1012 Ω-cm at E=1 MV/cm), excellent temperature stability (temperature coefficient of capacitance of 52 ppm/°C), and outstanding bias stability of capacitance (∼1.41% at 1 MV/cm). The permittivity and dissipation factor, also of extreme importance, exhibited minimal dielectric dispersion with frequency. The dielectric passive buffer layer film was typified by a uniform dense microstructure with minimal defects, and a smooth, nano-scale fine grain, crack and pinhole free surface morphology. At elevated processing temperature, there was negligible elemental interdiffusion at the interface between the substrate and buffer layer as verified by Rutherford Backscatter Spectroscopy and Auger Spectroscopy, ensuring long-term reliability of the heterostructure.By developing a passive, thin film material that is microwave friendly, we have demonstrated the direct integration of paraelectric active thin films with silicon substrates. This should allow phase shifter materials technology to be implemented across a wide spectrum of Army and commercial applications, specifically, affordable, mobile phased array antenna systems for a variety of DoD applications.
Y-Doping Effects on the Dielectric Behavior of RF-Sputtered BST Thin Films
Authors: Wang Ruey-Ven , McIntyre Paul C. , Baniecki John D. , Nomura Kenji , Shioga Takeshi , Kurihara Kazuaki 
Published: April 2011

AbstractHigh dielectric constant, perovskite-structure materials, such as barium strontium titanate (BST), have been widely investigated for use in GHz LSI decoupling capacitor applications. In addition to modifying deposition process parameters, such as increasing deposition temperature, doping may be a viable way to increase permittivity and tunability in BST thin films without increasing the thermal budget. In this research, the effects of Y dopants on the dielectric behavior of RF-sputtered BST thin films have been systematically investigated. The BST thin films were deposited using ceramic targets with different compositions of yttrium oxide dopant. With Y-doping concentration of ∼ 1.3 at.%, the permittivity at around zero electrical fields can be increased by more than 70% compared to nominally undoped BST thin films produced under the same deposition conditions. Based on x-ray diffraction strain analysis and inductively-coupled plasma composition measurements, the correlations among the dopant composition, BST film elastic strain and dielectric behavior have been systematically studied.
Improvement of Adhesion and Microwave Transmission Characteristics of Indium Bump by Silver Coating for Low Temperature Flip-Chip Applications
Authors: Chu Kun-Mo , Choi Jung-Hwan , Lee Jung-Sub , Cho Han Seo , Park Seong-Ook , Park Hyo-Hoon , Jeon Duk Young 
Published: April 2011

ABSTRACTWe have conducted low-temperature flip-chip bonding for both optical interconnect and microwave applications. Flip-chip bonding of vertical-cavity surface-emitting laser (VCSEL) arrays was performed on a fused silica substrate that provides propagation paths of laser beams and also supports a polymeric waveguide. To avoid thermal damage of the polymeric waveguide during the flip-chip bonding, indium bumps were used and the bonding condition of the flip-chip was determined as a heating temperature of 150 °C and a pressure of 500 gf. Experimentally, a thin silver (Ag) layer coated on the indium bump was very effective to enhance the adhesion strength between the indium bump and the VCSEL chip pads. In addition, the microwave characteristic of coplanar waveguide (CPW) package was slightly improved by the Ag coating.
Embedding Ceramic Thick-Film Capacitors into Printed Wiring Boards
Authors: Borland William , Doyle Marc , Dellis Lynne , Renovales Olga 
Published: April 2011

ABSTRACTEmbedding passives into printed wiring boards have numerous advantages that show up in different segments of the market. For example, the ability to locate decoupling capacitors within a couple hundred microns of semiconductor I/Os greatly improves response time and signal integrity leading to product performance improvements. One crucial need, however, is high capacitance density. High capacitance density can only be readily achieved by ceramic technology. Therefore, the focus of this work has been the development of ceramic thick-film capacitor technology that can be used to bury high capacitance density components within an organic substrate. This allows high value decoupling capacitors to be buried for chip packaging or related applications in spaces available within any layer of the substrate.The dielectric paste is based on doped barium titanate composition and works together with a cofired copper electrode paste. The capacitor system is designed to be screen printed on copper foil in the locations desired in the circuit and fired in nitrogen at 900°C to form the ceramic components. Following this, the foil is laminated, component face down, to the organic laminate using standard prepreg and the inner layer etched to reveal the components in an organic matrix. The system has a dielectric constant of approximately 3000 and achieves a capacitance density of ∼1.5 nF/mm2. In the following sections, issues that we encountered when making embedded capacitors with this first generation system are presented.