bluuebunny/crossref_metadata_2025_split huggingface dataset:
The Reconstructive Crystal Structure and the Exchange Energy
Authors: Yazdani Ahmad , Osati Araghi Reza , Arya Farid 
Published: April 2011

ABSTRACTIn order to describe the role of temperature variation on suppress of broad range of magnetic transition, the effect of annealing on different samples of a Gd-based intermetallic compound (i.e., Gd2Au) is investigated. The X-ray, AC and D.C susceptibility and electrical resistivity measurements for different annealed samples revealed that: (i) A great exchange dispersion is observed in A.C susceptibility (ii) This unstable exchange can be stabilized at certain annealing temperature, where the short rang unstable Ferromagnetic (F.M) breaks down or even changes to an Antiferromagnetic (AF.M) stable state. (iii) The DC susceptibility shows a spin-glass like transition temperature at TN= 61 K, above which the compound exhibits a completely paramagnetic (P.M) behavior and is field independent. (iv) the iso-termal magnetization does not follow the field induced transition (F.I.T) and behaves completely as a paramagnet which is independent of the field up to the highest available fields. The electrical resistivity measurement shows: a) A pronounced sharp bend at TN=61 K is manifested in ρ(T). b)some strong peak of X-ray pattern change into double adjacent lines in some intervals of low temperatures
Nanodomain Size Distribution in Relaxor Ferroelectrics Determined from Temperature Dependent Raman Scattering
Authors: Gupta Sanju 
Published: April 2011

ABSTRACTRelaxors (PZN, in particular) is an important class of self-assembled nanostructure composite ferroelectric oxides (or perovskite) materials. The interesting features associated with the nanoregions/nanodomains required to describe these relaxors give rise to the most relevant device related characteristics and peculiar physical properties in these materials. In addition, they possess astronomical property coefficients by themselves or when modified with lead titanate (PT) forming solid solution. In the past, we conducted temperature dependent Raman scattering studies on solid solution (1−x)PZN−xPT relaxors single crystals with varying composition; x = 0.02, 0.085, and 0.11. These studies were performed to obtain relevant information about lattice/phonon dynamics for matching the application criteria such as electromechanical actuators. We showed that the sharp structural phase transition occurs at or near 460 K which is a first-order transition by fitting two spectroscopic variables in Raman spectra for one of the representative bands occurring at 277 cm−1. Besides structural phase transition, polarization mechanism for the unpoled (x = 0.02) and poled (x = 0.05) specimens is also investigated to understand the polarization mechanism in relaxors using Raman spectroscopy. The difference in the case of poled specimen is accounted for by the influence of residual electric field. Poling also suggested an enhanced local ordering and the increase in the volume of the polar nano-regions. In the present report, we attempted to determine the nanopolar region size and distribution using the above mentioned temperature dependent Raman spectra. We discuss the most suitable mathematical form of nanodomain size distribution for such inhomogeneous material is log-normal and it is bimodal depending upon the temperature regime in addition to composition. These studies helped to determine the size distribution of nanoscopic embodiments in relaxor ferroelectrics using Raman spectroscopy as a function of temperature which is a dynamical phenomenon.
Study of SrTiO3 Gate Dielectrics
Authors: Liu C.Y. , Tseng Tseung-Yuen 
Published: April 2011

ABSTRACTAmong various possible candidates of high-k gate dielectrics, SrTiO3 plays an important role because it has high dielectric constant and it can be epitaxially grown on silicon substrate. The fabrication process and properties of SrTiO3 gate dielectrics are reported. The effect of the addition of SiO2 on the microstructure and electrical properties of SrTiO3 gate dielectric is also presented. The minimization of the effect of interfacial layer between SrTiO3 and Si is the most important issue for obtaining high quality high-k gate dielectrics. The possible methods to improve the interfacial properties and the measurement techniques to characterize the interfacial layer are discussed.
Ferroelectric Gate FET Memory based on Conduction of SBT-SiON Interface
Authors: Okuyama Masanori , Minami Takaaki , Lee Bong-Yeon , Kanashima Takeshi 
Published: April 2011

ABSTRACTA new type of ferroelectric gate field-effect transistor (FET) using ferroelectric-insulator interface conduction has been proposed. Drain current flows along the interface between the ferroelectric and insulator layers and requires no semiconductor. This FET is fabricated by forming of source and drain electrodes on a SiON/Si substrate, dpositing SrBi2Ta2O9(SBT) film, forming topgate electrode, and forming bottom electrode. Drain current versus topgate voltage characteristics show a clockwise hysteresis loop similarly to the conventional metal-ferroelectric-insulator-semiconductor-FET(MFIS-FET). This FET shows that the On/Off ratio of the drain current is 104 to 105 and the Off state current of about 10−9 A.
Rational Design of Highly Filled Reactive Resins for Electronic Material Applications with Multiple Performance Constraints
Authors: Duffy Daniel J , Xiao Allison 
Published: April 2011

ABSTRACTCyanate ester resin and its blends with epoxy resin demonstrate a lower viscosity build up when filled with thermally treated silica fillers than with untreated silica fillers. The reduced viscosity build up resulting from the use of the thermally treated materials results in faster capillary flow rates by a factor of 2 to 5 with respect to untreated silica particles. Surface properties of the filler materials are used to interpret the viscosity and flow rate data and guide design of filler surface properties. The flow rate performance improvement contributes to design of new capillary underfill materials for electronic materials applications.
Effect of crystallization on Adhesion Strength of External Electrode in LTCC
Authors: Ko Minji , Lyoo SooHyun , Choi Yongseok , Kim Hyungho , Choo Hosung , Cho Beomjoon , Park EunTae 
Published: April 2011

ABSTRACTA mixture system of MO-SiO2(M: Ca, Sr, Ba) glass and Al2O3crystalline powder has been investigated as a substrate material for low temperature co-fired ceramics (LTCC). This type of glass-ceramic mixture is known to be crystallized during the sintering process. We found that the adhesion strength of external electrode was strongly related with sintering condition. Crystallization behavior was monitored by means of powder X-ray diffraction (XRD). The microstructure of sintered body after electroless plating was examined by Scanning Electron Microscopy (SEM). It was observed that the degree of crystallization was strongly affected by sintering condition. We focused ourselves on elucidating the relationship between the degree of crystallization and the adhesion strength of external electrode that was made by means of electroless plating.
Process and Material Requirements for Successful Heterogonous Passive Component Integration in RF System
Authors: Beyne Eric , De Raedt Walter , Carchon Geert , Soussan Philippe 
Published: April 2011

AbstractApplications using rf radios operating at frequencies above 1GHz are proliferating. The highest operating frequencies continue to increase and applications above 10GHz and up to 77GHz are already emerging. Systems become more complex and devices need to operate at several different frequency bands using different wireless standards. The rf-front end sections of these devices are characterized by a high diversity of components, in particular high precision passive components. In order to be produced cost-effectively, these elements need to be integrated along with the semiconductor devices. This paper describes the requirements for successful integration of rf-passive devices and proposes multilayer thin film technology as an effective rf-integration technology.
A Charge Feedback Controller for a Piezoelectric Voltage Amplifier/Driver
Authors: Noras Maciej , McAnn Peter , Kieres Jerzy 
Published: April 2011

AbstractIn this paper, authors examine the design and implementation of a new charge feedback control circuitry for a voltage amplifier used in driving of a piezoelectric actuator. Actuators driven in the usual voltage feedback regime display a nonlinear voltage-displacement relationship, known as hysteresis. Use of the new charge feedback control circuitry resulted in significant reduction (70%) of the hysteresis-related nonlinearity.
Integration of PZT on SOI Wafers: Increasing Piezoelectric Film Thickness for Providing a Wide Range of Ultrasonic MEMS Applications
Authors: Belgacem Brahim , Calame Florian , Muralt Paul 
Published: April 2011

AbstractPiezoelectric micromachined ultrasonic transducers comprising a 10 μm thick Si device layer and a 1-4 μm thick piezoelectric PZT layer were investigated. The PZT films were deposited by a sol-gel technique. The transverse piezoelectric coefficient was measured as -14.9 C/m2. The electromechanical coupling increased with PZT thickness, as expected. The influence of both the shape and area of the top electrode on the device performance has been investigated. The electromechanical coupling coefficient (k) and quality factor (Q) have been measured in air and were fitted to an equivalent circuit model. The maximal k2 was obtained as 7.8%.
High Density Direct Bond Interconnect (DBI) Technology for Three Dimensional Integrated Circuit Applications
Authors: Enquist Paul 
Published: April 2011

ABSTRACTA novel direct wafer bonding technology capable of forming a very high density of electrical interconnections across the bond interface integral to the bond process is described. Results presented include an 8 um interconnection pitch, die-to-wafer and wafer-to-wafer bonding formats, temperature cycling reliability × 10 greater than the JEDEC requirement, connection yield ∼ 99.999, > 50% part yield on parts with ∼ 450,000 connections, and < 0.1 Ohm connection resistance at 1pA without requiring a voltage surge to induce current.
Modeling and Simulation of Parasitic Effects in Stacked Silicon
Authors: Elst Gunter 
Published: April 2011

ABSTRACTDevices and interconnect structures of new semiconductor and packaging technologies show parasitic physical effects with a growing influences of the system behavior. Therefore, the design technology has to be developed and adjusted to ensure high system performance and reliability of these very complex systems on chip and in a stack. The influences of parasitic effects on the circuit behavior have to be minimized within the design process.Typical parasitic effects of the Vertical System Integration (VSI®) by stacked silicon are discussed in this paper. Effects like electro thermal coupling, electromagnetic interactions, and the sensitivity due to parameter variations and their influence to the system behavior are identified and modeled. Approaches for minimization of these influences by design modifications are presented.
3-D Integration Technology for High Performance Detector Arrays
Authors: Temple Dorota , Bower Christopher A. , Malta Dean , Robinson James E. , Coffman Phillip R. , Skokan Mark R. , Welch Terry B. 
Published: April 2011

ABSTRACTThis paper describes a technology for three-dimensional (3-D) integration of multiple layers of silicon integrated circuits. The technology promises to dramatically enhance on-chip signal processing capabilities of a variety of detector devices hybridized with Si electronics. The focus of the paper is on high performance infrared focal plane arrays based on HgCdTe, which offer the ultimate in infrared sensitivity and find application in high performance military systems. Performance data from test FPA devices with integrated multilayer Si stacks are discussed in this paper.
Damascene-Patterned Metal-Adhesive (Cu-BCB) Redistribution Layers
Authors: Gutmann Ronald J. , McMahon J. Jay , Lu Jian-Qiang 
Published: April 2011

ABSTRACTA monolithic, wafer-level three-dimensional (3D) technology platform is described that is compatible with next-generation wafer level packaging (WLP) processes. The platform combines the advantages of both (1) high bonding strength and adaptability to IC wafer topography variations with spin-on dielectric adhesive bonding and (2) process integration and via-area advantages of metal-metal bonding. A copper-benzocyclobutene (Cu-BCB) process is described that incorporates single-level damascene-patterned Cu vias with partially-cured BCB as the bonding adhesive layer. A demonstration vehicle consisting of a two-wafer stack of 2-4 μm diameter vias has shown the bondability of both Cu-to-Cu and BCB-to-BCB. Planarization conditions to achieve BCB-BCB bonding with low-resistance Cu-Cu contacts have been examined, with wafer-scale planarization requirements compared to other 3D platforms. Concerns about stress induced at the tantalum (Ta) liner-to-BCB interface resulting in partial delamination are discussed. While across-wafer uniformity has not been demonstrated, the viability of this WLP-compatible 3D platform has been shown.
Vertical Integration: A Confederacy of Alignment, Bonding, and Materials Technologies
Authors: Farrens Shari 
Published: April 2011

ABSTRACTVertical or 3D integration is taking hold in both the CMOS IC industry and the MEMS industry. The need for smaller devices, lower power, increased functionality, and lower cost are driving the market toward chip and wafer level stacking. Equipment suppliers have been faced with numerous challenges to meet the demands of these emerging bonding applications. This paper will discuss the confederacy of alignment, bonding and materials unions that can lead to successful outcomes in integrated manufacturing.1. Alignment strategies for 3D integration: IR, BSA, and ISA as they pertain to specific bond methods2. Pros and Cons of 3D Bonding Techniques (Direct bonds, metal, adhesive, and eutectic)3. Error analysis in alignment of 3D structures
3D Process Integration – Wafer-to-Wafer and Chip-to-Wafer Bonding
Authors: Matthias Thorsten , Wimplinger Markus , Pargfrieder Stefan , Lindner Paul 
Published: April 2011

ABSTRACTMany feasibility and design studies during the last years have shown that devices based on 3D chip stacking and integration can significantly outperform traditional planar (2D) devices. Furthermore, as packaging of the devices is a major cost factor, the possibility to integrate multiple functional entities in one package offers a huge potential for cost reduction. On research level the technical feasibility has been proven for a variety of processes. Today's focus lies on innovative manufacturing technologies and process integration schemes, which meet both, the economic and the technical demands.Stacking of individual chips (both chip-to-wafer and wafer-to-wafer) has the inherent advantage that different functional subsystems like logic and memory can be processed on separate wafers thereby reducing the complexity and the number of process steps greatly. The individual chips can be processed on heterogeneous materials, in different fabs and by different producers.Wafer-level integration has the advantage of higher throughput, enhanced cleanliness and the flexibility that standard fab equipment can be used for further processing. 3D integration applying chip-to-wafer bonding focuses on the yield (“good known die”) and enables to stack dies of different size e.g. several small dies on one big base die. This allows e.g. the integration of a logic device from a 300mm Si wafer with RF devices from a 150mm GaAs wafer.In this paper a higher emphasis lies on the key enabling manufacturing technologies and supported processes.
Novel Wafer Dicing and Chip Thinning Technologies Realizing High Chip Strength
Authors: Takyu Shinya , Kurosawa Tetsuya , Shimizu Noriko , Harada Susumu 
Published: April 2011

ABSTRACTAs telecommunication equipment that supports high-level information networks is being made portable, the requirements for telecommunication equipment to be small and lightweight are becoming stricter. Thus, miniaturization of semiconductor devices is necessary, and wafer dicing and chip thinning technologies are important key technologies to achieve it. Wafers are thinned by mechanical in-feed grinding using a grindstone containing diamond particles, and wafers are divided by mechanical blade dicing using a diamond blade. However, mechanical processes using diamond grits leave damage such as chipping, saw mark or residual strain on chip surfaces; thus, chip strength decreases. At chip thicknesses of 50 to 200 μm, such damage has to be avoided.In this study, the relationship between chip residual damage and chip strength is examined, and novel wafer dicing and thinning technologies that realize an average chip strength have increased from 253 MPa to 1903 MPa are described.
The Energetics of Hydrogen Adsorbed in Nanoporous Silicon. An ab initio Simulational Study
Authors: Valladares Ariel A. , Valladares Alexander , Valladares R. M. , Calles A. G. 
Published: April 2011

ABSTRACTPorous silicon may be an interesting alternative to store hydrogen. Unlike carbon, its bonding multiplicity is limited, and because of this, the probability of having more dangling bonds on the pore surface is larger than in carbon. Using nanoporous silicon periodic supercells with 216 atoms and 50 % porosity, constructed with a novel ab initio approach devised by us, the dangling bonds of the silicon atoms were first saturated with hydrogen, then relaxed and its total energy calculated. Next the same number of hydrogen atoms was placed within the pore in the pure silicon supercell, then the sample relaxed, and finally its total energy calculated, with and without hydrogens. From these results the average energy per hydrogen atom is obtained. We compare our results to SiH bond energies and to previous results for hydrogenated carbon; conclusions are drawn concerning the possibility of using porous silicon as a fuel tank for hydrogen.
Synthesis and Characterization of BaZr0.8Y0.2O3 Protonic Conductor for Intermediate Temperature Solid Oxide Fuel Cells (IT-SOFCs)
Authors: D'Epifanio Alessandra , Fabbri Emiliana , Di Bartolomeo Elisabetta , Licoccia Silvia , Traversa Enrico 
Published: April 2011

AbstractBarium zirconate BaZr0.8Y0.2O3-δ, to be used as protonic conductor under hydrogen containing atmosphere in intermediate temperature (500-700°C) solid oxide fuel cells (IT-SOFCs) was prepared using a sol-gel technique to produce materials with controlled chemical structure and microstructural properties. Several synthetic procedures were investigated, dissolving the metal cations in two solvents (water and ethylene glycol) and using different molar ratios of citric acid with respect to the total metal content. A single phase was obtained at temperature as low as 1100°C. To verify the chemical stability, all the sintered oxides were exposed to CO2 and the phase composition of the resulting specimens was investigated using X-ray diffraction (XRD) and field emission scanning electron microscopy (FE-SEM). Fuel cell polarization curves on symmetric Pt/BZY20/Pt cells of different thickness were measured at intermediate temperatures (500-700°C).
Study on the Perovskite-type Oxide Cathodes in Proton-conducting SOFC
Authors: Yahiro Hidenori , Yamaura Hiroyuki , Asamoto Makiko 
Published: April 2011

AbstractThe cathode performances of perovskite-type oxide electrodes were investigated in the H2-O2 fuel cell with proton-conducting electrolyte. Among the perovskite-type oxides tested in the present study, La1-xSrxFeO3(LSFO) showed the best cathode performance. The cathode performances of LSFO depended on the Sr content and the heat-treatment temperature prior to electrochemical measurements. The cathode reactions of both LSFO and Pt electrodes are discussed briefly based on the cathode overpotentials measured as a function of oxygen partial pressure. Finally, the structure and the electrical conductivity of the proton-conducting ceramic film fabricated on LSFO electrode substrate are presented.
Interfacial Structure and Point Defects in Ceria/Zirconia Superlattices
Authors: Dyer Michael , El-Azab Anter , Gao Fei 
Published: April 2011

AbstractWe report the results of a molecular dynamics simulation study aiming to understand the interfacial structure in ceria/zirconia superlattices and the impact of the interfaces on the energies of oxygen vacancy formation and Gd ion substitution in ceria and zirconia layers of the superlattice structure. It is found that the semi-coherent interface is characterized by misfit dislocations, paired at approximately 3-4 nm, with stacking-fault-like region in between, which agrees with the TEM observations. It is also found that the vacancy formation energy and the Gd substitution energy vary as a function of distance from the interface in the individual layers, and that these energies depend on the layer thickness. In addition, the simulations showed that the defect energy variations across the thickness of the ceria and zirconia layers are consistent with the XPS data for composition profile in the superlattice structure. Finally, in the semi-coherent superlattice structure, the formation energy of oxygen vacancies and the Gd substitution energy are found to depend on the position of these defects relative to the interfacial dislocation core. In particular, the oxygen vacancy formation energy is found to be negative close to the dislocation core, indicating that vacancy concentration will increase in such regions allowing for high conduction parallel to the interface.
New Polybenzimidazole-Based Membranes for Fuel Cells
Authors: Quartarone Eliana , Carollo Arianna , Mustarelli Piercarlo , Magistris Aldo , Tomasi Corrado , Garlaschelli Luigi , Righetti Pier Paolo 
Published: April 2011

AbstractOne of current trends of the PEM research is the development of new membranes working at high temperature and low humidity.Acid-doped polybenzimidazoles are particularly appealing because of high proton conductivity without humidification and promising fuel cells performances. PBI contains basic functional groups that can easily interact with strong acids, such as H3PO4, H2SO4, allowing proton migration along the anionic chains via a Grotthuss mechanism.In this work phosphoric acid-doped membranes, synthesised from benzimidazole-based monomers with increased basicity and molecular weight, are described and discussed. The influence of the monomer structure on the transport properties and on the physico-chemical interactions between acid and polymer has been investigated by means of impedance spectroscopy and 31P solid-state NMR. Test of methanol crossover and diffusion have been performed to check the membrane suitability for DMFCs.
State of Water in Nafion 117 Proton Exchange Membranes Studied by Dielectric Relaxation Spectroscopy
Authors: Polizos Georgios , Lu Zijie , Macdonald Digby D , Manias Evangelos 
Published: April 2011

AbstractDynamics of water in Nafion 117 membranes, in the acid form, at two hydration levels and several temperatures were investigated by means of dielectric relaxation spectroscopy in both, low (10−2to 107Hz, 25 to −80 °C) and microwave (0.045-26 GHz, 35 °C) frequency regions by employing different experimental setups. Three states of water were identified: a) strongly bound to the sulfonic groups (in agreement with other investigations) forming the first hydration layer; b) loosely bound, surrounding the first layer and c) free water, having similar dynamics as in the bulk state.