bluuebunny/crossref_metadata_2025_split huggingface dataset:
Real-time Control System for Improved CMP Pad Profiles
Authors: Menk Gregory E , Dhandapani Sivakumar , Garretson Charles Chad , Chang Shou-Sung , Cocca Christopher , Fung Jason , Qian Jun , Tsai Stan 
Published: August 2010

AbstractChemical mechanical planarization (CMP) pads require conditioning to maintain the surfaces yielding optimal performance. However, conditioning not only regenerates the pad surface but also wears away the pad material and slurry transport grooves. Non-optimized conditioning may result in non-uniform pad profiles, limiting the productive lifetimes of pads. A new approach to conditioning uses closed-loop control (CLC) of conditioning sweep to enable uniform groove depth removal across the pad, throughout pad life. A sensor integrated into the conditioning arm enables the pad stack thickness to be monitored in situ and in real time. Feedback from the thickness sensor is used to modify pad conditioner dwell times across the pad surface, correcting for drifts in the pad profile that may arise as the pad and disk age. Pad profile CLC enables uniform reduction in groove depth with continued conditioning, providing longer consumables lifetimes and reduced operating costs.
Contact Pressure Distribution in the Chemical Mechanical Planarization of 450mm Wafers
Authors: Timoney Padraig , Ahearne Eamonn , Byrne Gerald 
Published: August 2010

AbstractOptimisation of spatial uniformity of material removal in chemical mechanical planarization requires an understanding of the mechanics of the wafer carrier system. Finite element analyses have been carried out by researchers identifying relationships between von Mises stress distribution and material removal rate. However, in many of these wafer scale models, the derivation of the material properties of the polishing pad and sub pad is unclear and consequently a large variation in values used is observed. Models are generally validated with a procedure different to that simulated in the model and with different output variables. Few models have incorporated the industry standard method of pressurizing the backside of the wafer independently to the wafer carrier loading using a pressurized air chamber located directly behind the backside of the wafer. The anticipated introduction of 450mm diameter wafers has surprisingly not been accompanied by wafer scale models investigating the issues that will arise from the diameter and thickness scaling ratio of the wafer.This paper presents a unique approach to finite element modeling of CMP incorporating realistic boundary conditions for the wafer carrier and platen assemblies. Model predictions of interfacial contact pressure for a 200mm wafer loaded by a lip seal type carrier head were validated by unique measurements of the contact pressure between the wafer and the pad using Fujifilm Prescale TM pressure measurement film and accompanying analysis software. The results demonstrated a close correlation between the model's prediction and the measured values. Results are presented for the upscaling of this validated model to 450mm wafer dimensions. The results indicate a doubling of the contact pressure maximum values compared to the 200mm wafer model. These results illustrate the extent of the challenge facing CMP tool vendors in increasing the level of control of the mechanical force distributed by the wafer carrier on 450mm wafers. The model can be used as a design tool to optimize machine and process parameters.
Fabrication of Organic Thin Films for Copper Diffusion Barrier Layers Using Molecular Layer Deposition
Authors: Bent Stacey , Loscutoff Paul William , Clendenning Scott 
Published: August 2010

AbstractDevice scaling predicts that copper barrier layers of under 3 nm in thickness will soon be needed in back-end processing for integrated circuits, motivating the development of new barrier layer materials. In this work, nanoscale organic thin films for use as possible copper diffusion barrier layers are deposited by molecular layer deposition (MLD) utilizing a series of self-limiting reactions of organic molecules. MLD can be used to tailor film properties to optimize desirable barrier properties, including density, copper surface adhesion, thermal stability, and low copper diffusion. Three systems are examined as copper diffusion barriers, a polyurea film deposited by the reaction of 1,4-phenylene diisocyanate (PDIC) and ethylenediamine (ED), a polyurea film with a sulfide-modified backbone, and a polythiourea films using a modified coupling chemistry. Following deposition of the MLD films, copper is sputter deposited. The copper diffusion barrier properties of the film are tested through adhesion and annealing tests, including 4-point bend testing and TEM imaging to examine the level of copper penetration. The promise and challenges of MLD-formed organic copper diffusion barriers will be discussed.
Potential of the Ultra-thin Layer Fabricated by Wet-process as a Pore-seal for Porous Low-k Films
Authors: Ono Shoko Sugiyama , Kohmura Kazuo , Tanaka Hirofumi , Nakayama Kentaro , Kagayama Akifumi , Tsuchiya Toshihiko , Nakaura Makoto , Matsuoka Osamu , Takaki Toshihiko , Maekawa Kou 
Published: August 2010

AbstractWe succeeded in fabricating ultra-thin (<3 nm-thick) layer on top of the surface of porous low-k. The roughness of the surface of porous low-k remains homogeneous even after covering by the thin layer. Furthermore, we found that such ultra-thin layer suppresses the diffusion of metal into porous low-k film. Concerning adhesion property, the abrasion between the thin layer and copper was not detected after annealing at 350 deg C in forming gas. TVS measurement suggested that pH control of solution is the key to reduce damages of porous low-k and mobile ions. We believe that such ultra-thin layer, which we propose here, has a potential as a pore seal layer for porous low-k films.
Nanoscale Ruthenium Coatings of MEMS Switches Contacts
Authors: Karabanov Sergey , Karabanov Andrey S. , Suvorov Dmitriy V. , Grappe Benoit , Coutier Caroline , Sibuet Henri , Sazhin Boris N. , Krutilin Anatoliy A. 
Published: August 2010

AbstractThe paper reports the tests results of ruthenium contacts coatings of magnetically controlled MEMS switches. During the tests the contact resistance was measured and the lifetime of MEMS switches was evaluated. After testing the analysis of the form and contact surface structure using SEM-method was carried out. The experiment results showed that the application of ruthenium nanolayers as the contact coating at slight increase of the contact resistance improves the lifetime of MEMS switches considerably.Nowadays the increase of the lifetime of all MEMS switch types (RF MEMS relays, magnetically controlled on-off MEMS switches) is the most actual problem. The work resource and operating characteristics, first of all, contact resistance, of any switching unit, the basis of the construction of which is a dry contact, are determined by the contact coating properties. This is true for MEMS switches too.The paper presents the results of the study of the operating characteristics of magnetically controlled MEMS switches with ruthenium and gold contact coatings of up to 100 nm thickness. During tests the following switching mode was used: switching voltage – 3 V, current - 10 μA. Each MEMS switch was subjected to 100 million cycles switching at the frequency of 100 Hz. After testing the contact surface investigation by SEM-method and electrical characteristics measurement was carried out. The paper presents SEM-images of the contacts surface and statistical date of electrical characteristics.After 100 million switching cycles MEMS switches with nanoscale ruthenium coating have shown 100% operating capacity; 16% of switches with gold contacts turned out to be inoperative due to electrical contacts sticking.The results of researches by SEM-method show that the contacts without nanoscale coating have the traces of strong erosion and melting; the contacts with nanoscale ruthenium coating practically did not change the form and flatness.So, the test results indicate that nanoscale ruthenium coatings of the electrical contacts provide excellent resource for the switches operation of hundred millions and more cycles.
Material, Process and Geometry Effects on Through-Silicon Via Reliability and Isolation
Authors: Karmarkar Aditya P , Xu Xiaopeng , Ramaswami Sesh , Dukovic John , Sapre Kedar , Bhatnagar Ajay 
Published: August 2010

AbstractThrough-silicon via (TSV) structures with various material and geometry configurations are assessed to study their impact on reliability, isolation and performance. Oxide liner insulators show a larger performance impact as compared to low-k liners and the effect decreases with increasing liner insulator thickness. Higher density of the TSV array causes greater stress impact on carrier mobility and increases the parasitic capacitance. Additionally, low-k liner reduces the parasitic capacitance, but exhibits lower strength and adhesion, therefore degraded reliability. These results provide an important perspective of performance and reliability trade-offs necessary for a robust TSV design.
The Quantitative Study of Trapped Charges in Nano-Scale Ge Islands probed by EFM Measurement
Authors: Lin Zhen , Brunkov Pavel , Bassani Franck , Bremond Georges 
Published: August 2010

AbstractIn this work, an individual Ge island on top of silicon dioxide layer has been charged by a conductive EFM tip and quantitatively characterized at room temperature. Electrons or holes were successfully injected and were trapped homogenously in the isolated nano-scale Ge island. In order to quantitatively study these trapped charges, a truncated capacitor model was used to approximate the real capacitance between the tip and island surface. The analytical expression of the quantity of trapped charges in isolated Ge island as a function of the EFM phase signal was deduced. Applying a tip bias for -7V during 30 seconds leads to an injection about 800 electrons inside an individual Ge island.
Electrical Properties of TaOx Thin Films for ReRAM Prepared by Reactive RF Magnetron Sputtering Method
Authors: Fukuda Natsuki , Kurihara Hidenao , Horita Kazumasa , Yoshida Yoshiaki , Kokaze Yutaka , Nishioka Yutaka , Suu Koukou 
Published: August 2010

AbstractRecently the Flash Memory is scaling limit, Thus the Memory of various types is now under study for the next generation large capacity nonvolatile memory. Resistance random access memory (ReRAM) is attracts much attention due to its advantage for integration in the next generation nonvolatile memory, because it is depend on scaling by lithography compared with the Flash Memory of capacity type. The material for ReRAM is classified roughly into binary oxides and perovskite oxides. Several binary oxides such as a TaOx have the advantage for low-temperature process and low-cost materials compared with perovskite oxides such as a (Pr,Ca)MnO3 (PCMO). In this study, TaOx film with the thickness of 10nm were prepared by reactive RF magnetron sputtering on 8inch-Pt/Si substrate using a Ta metal target in oxygen ambient. The sputtering system was the multi chamber type mass production tool. The TaOx thin film was amorphous phase as a result of measurement by X-ray diffraction meter. Ta top electrodes with 50 um diameters were deposited on the surface of TaOx layer by the DC sputtering method using a shadow mask. The “Forming” voltage of TaOx-ReRAM was 5.0V. After “Forming” process, the “Set” and “Reset” voltage were 3.0V and –3.0V respectively. It has good switching properties with large on/off resistance ratio above 1,000.
A Ferroelectric NAND Flash Memory for Low-power and Highly Reliable Enterprise SSDs and a Ferroelectric 6T-SRAM for 0.5V Low-power CPU and SoC
Authors: Miyaji Kousuke , Hatanaka Teruyoshi , Tanakamaru Shuhei , Yajima Ryoji , Noda Shinji , Takahashi Mitsue , Sakai Shigeki , Takeuchi Ken 
Published: August 2010

AbstractThis paper overview recent research results about ferroelectric FETs such as a Ferroelectric (Fe-) NAND flash memory for enterprise SSDs and a Ferroelectric 6T-SRAM for 0.5V operation low-power CPU and SoC.In the last five years, as the data through internet increases, the power consumption at the data center doubled. To solve the power crisis SSD is expected to replace HDD. For such an enterprise SSD, the Fe-NAND flash memory is most suitable due to a low power consumption and a high reliability. The Fe-NAND is composed of Metal Ferroelectric Insulator Semiconductor transistors. The program/erase voltage decreases from 20V to 6V. In the Fe-NAND, the electric polarization in the ferroelectric layer flips with a lower electric field and theVthof a memory cell shifts. Due to a low program/erase voltage, a low power operation is achieved. In the Fe-NAND, a high write/erase endurance, 100Million cycle, four orders of magnitudes higher than the conventional NAND, is realized because there is no stress-induced leakage current.The Fe-NAND flash memory with a non-volatile (NV) page buffer is also proposed. The data fragmentation of SSD in a random write is removed by introducing a batch write algorithm. As a result, the SSD performance can double. The NV-page buffer realizes a power outage immune highly reliable operation. In addition, a zeroVthmemory cell scheme is proposed to best optimize the reliability of the Fe-NAND. TheVthshift caused by the read disturb, program disturb and data retention decreases by 32%, 24% and 10%, respectively. A 1.2V operation adaptive charge pump circuit for the low voltage and low power Fe-NAND is introduced. By using Fe-FETs as diodes in the charge pump and optimizing theVthof Fe-FETs at each pump stage, the power efficiency and the output voltage increase by 143% and 25% without the circuit area and process step penalty.Finally, a ferroelectric 6T-SRAM is proposed for the 0.5V operation low power CPU and SoC. During the read/hold, theVthof Fe-FETs automatically changes to increase the static noise margin by 60%. During the stand-by, theVthincreases to decrease the leakage current by 42%. As a result, the supply voltage by 0.11V, which decreases the active power by 32%.
Studies of Ge-Sb-Te Phase Change Materials At and Above Melting Temperatures and Set to Reset Transition of Memory Devices
Authors: Savransky Semyon D , Wicker Guy 
Published: August 2010

AbstractThe results of calorimetric and electrical studies of bulk Ge2Sb2Te5 and GeSb2Te4 alloys around melting temperature Tm are presented together with characteristics of phase-change memory devices from such alloys. The endothermic melting region is wider in Ge2Sb2Te5 than GeSb2Te4. Electrical resistivities of the alloys in this region have semiconductor characteristics. The width of the melting region correlates with breadth of set to reset transition in devices. This empirical correlation is probably important for alloy selection for multi-level memory cells.
Ce Doped-GeSbTe Thin Films Applied to Phase-change Random Access Memory Devices
Authors: Huang Yu-Jen , Tsai Min-Chuan , Wang Chiung-Hsin , Hsieh Tsung-Eong 
Published: August 2010

AbstractA study on microstructure and electrical property of cerium (Ce)-doped Ge2Sb2Te5 (GST) layers for phase-change memory (PCM) application were presented. Ce doping does not suppress the resistivity of amorphous GST and the resistivity ratio of amorphous and crystalline GST remains at about 105. Further, Ce-doping escalates the recrystallization temperature (Tx) of GST from 159 to 236°C. Such a unique behavior would greatly benefit the preservation of signal contrast as well as the high-density signal storage and will not cause the increase of device writing current. X-ray diffraction (XRD) indicated that Ce doping stabilizes amorphous GST and suppresses the formation of hexagonal phase. Transmission electron microscopy (TEM) revealed Ce doping refines the grain size of GST. Kissinger's analysis found that Tx and activation energy (Ea) of phase transition for doped-GST both increase with the increase of Ce content. Isothermal experiment found the Ce doping increases temperature for 10-yr data retention from 76 and 170°C. This is attributed to the presence of Ce solutes in GST matrix that inhibits the grain growth during recrystallization.Static-mode electrical test on PCM device containing doped GST as the programming layer found that Ce incorporation indeed increases the switching threshold voltage (Vth). This confirmed that Ce doping effectively retards the crystallization of GST and improves the stability of amorphous GST.
Study of crystalline structure N-doped GeSb Phase Change Material for PCRAM applications
Authors: Bastard Audrey , Lhostis Sandrine , Bonafos Caroline , Schamm-Chardon Sylvie , Coulon Pierre-Eugène , Fillot Frederic , Ghezzi Giada , Fantini Andrea , Perniola Luca , Loubriat Sebastien , Roule Anne , Gourvest Emmanuel , Arbaoui Edrisse , Fargeix Alain , Armand Marilyn , Hyot Berangere , Maitrejean Sylvain , Sousa Véronique 
Published: August 2010

Abstract100 nm-thick GeSbN films with high Sb content were investigated by XRD and TEM in order to investigate crystalline phases. We observe the crystallization of the two phases separatly. First, Sb rhomboedral crystallizes at 250°C and then cubic Ge appears at 340°C according to Reflectivity and X-Ray Diffraction measurements. With the incorporation of nitrogen in the thick films, a delay to crystallization of the two phases is observed. Grain size measurements with Scherrer formula support the decrease of grain crystallization with N content. Moreover, TEM observations show clearly the separation of the two phases in the layer and the reduction in size of the grains with nitrogen content. This allows a better re-amorphization than films without nitrogen.
Electrical Resistance Change with Crystallization in Si-Te Amorphous Thin Films
Authors: Saito Yuta , Sutou Yuji , Koike Junichi 
Published: August 2010

AbstractThe electrical resistance change of amorphous SixTe100-x (x: 10-23) films during heating was investigated by a two-point probe method. The SixTe100-x films showed two-stage crystallization processes. The film was firstly crystallized to Te and subsequently crystallized to Si2Te3 with an electrical resistance drop. The first crystallization temperature Tx1st slightly increased with increasing Si content, while the second crystallization temperature Tx2nd was independent on the composition and was a constant temperature of 310 °C. In all films, the electrical resistance once increased in the temperature range from 250 to 295 °C before the crystallization of the Si2Te3. This temporal resistance increase could be explained by considering a formation of high-resistivity Si-rich amorphous phase.
Giant ac electrical response of La0.7Sr0.3MnO3in sub-kilogauss magnetic fields
Authors: Rebello Alwyn , Naik Vinayak Bharat , Barik Sujit Kumar , Lam Mark Choong , Ramanathan Mahendiran 
Published: August 2010

AbstractWe report ac electrical transport in the metallic ferromagnet La0.7Sr0.3MnO3. Both ac resistance (R) and reactance (X) were measured as a function of temperature (T= 400-100 K), frequency of the ac current (f= 100 kHz – 20 MHZ) and external dc magnetic field (H= 0-100 mT) applied parallel to the current direction. It is shown that, whileR(H= 0 T) decreases smoothly around the Curie temperature (TC) forf= 100 kHz, an abrupt increase followed by a peak close toTCoccurs forf≥ 500 kHz. The peak decreases in magnitude, broadens and shifts down in temperature with increasing values ofH. The peak inRis completely suppressed underH= 100 mT resulting in a huge low-field ac magnetoresistance (R/R= -53 % forf= 2MHz) whereas the dc magnetoresistance only -31 % even at H = 7 T. While the reactanceX(H= 0 T) also shows an abrupt increase atTCforf< 10 MHz, it decreases abruptly atTCforf≥ 12 MHz. The magnetoreactance is largest (X/X= -47 %) atf= 100 kHz and it changes sign from negative to positive with increasing frequency. It is suggested that the observed huge ac magnetoresistance arises from decrease of magnetic permeability which enhances skin depth under a magnetic field. Our results indicate that the extraordinary sensitivity of the ac magnetoresistance to low dc magnetic fields can be exploited for device applications.
Phenomena And Mechanism On Phase Transformation Twinning In Nanocrystalline BaTiO3
Authors: Mazumder Sujata , Ghosh Jiten 
Published: August 2010

AbstractThe detailed structure of nanocrystalline BaTiO3 powder during ball milling has been studied using XRD & TEM. The study illustrates important advances in understanding atomic scale properties of this material. Ferroelectric BaTiO3 powder undergoes phase transformation along the sequence Cubic(Pm3m)-tetragonal(P4mm)-orthohombic (Amm2)-rhombohedral(R3m) structure when pressureless sintered samples are cooled from high temperature to low temperature. The high to low symmetry phases are not related to group subgroup symmetry as transformation is discontinuous and first order in nature and the twin relationship in the low symmetry is forbidden by Landau theory. In case of ball milled BaTiO3 powder a continuous and diffusionless phase transition occur via second order to and from a metastable intermediate phase. In this pathway crystallites in the aggregation are twinned and the twin structure is related to crystal point group m3m which in the present case is illustrated as having 6mm symmetry formed under low driving force. The unit cell evolution due to phase transition and the crystallographic relationship are established. The phase transformation, coalescence and twin structure of thermally annealed BaTiO3 nanocrystals under high vacuum has been investigated using in situ high temperature XRD. The structure analysis is performed with the use of the method of computer modelling of disorder structure and simulation of corresponding diffraction pattern.
Fabrication of Transparent, Conductive Phase-segregated ITO/PC Composites
Authors: Mason Celeste , Gerhardt Rosario 
Published: August 2010

AbstractFabrication of transparent, conductive phase-segregated ITO/PC composites was accomplished by compression molding of dry mixed constituents. Mixtures of 50nm indium tin oxide particles in a polycarbonate matrix of compositions ranging from phr = 1.0 to 0.001 were measured by optical and electrical methods. Measured transmittance ranged from 5% to 68% at 400nm, 15% to 80% at 700nm, and averaged 10% to 75% across the visible spectrum. Resistance was measured by impedance spectroscopy. Resistivities of the different composites spanned 10 orders of magnitude. Electrical percolation was found to occur near phr = 0.15.
Electron Microscopy (TEM) and X-ray Spectromicroscopy (STXM) of PP/MMT/PP-g-MA and PP/MMT/SEBS Nanocomposites
Authors: Martin Zulima , Gomez M. Angeles , Jimenez Ignacio 
Published: August 2010

AbstractHere we present a study on the polypropylene/montmorillonite interaction based on x-ray diffraction, transmission electron microscopy (TEM) and scanning transmission x-ray microscopy (STXM) measurements, which provides a complete picture of the intercalation and exfoliation processes taking place.
Highly Controllable Nano-texturing of Silicon Using Hydrogen-assisted Reactive Ion Etching
Authors: Mehran Mahdieh , Sanaee Zeinab , Mohajerzadeh Shamsoddin 
Published: August 2010

AbstractWe propose a hydrogen assisted reactive ion etching method for generating nano-grass and nano-texturing of silicon substrates in desirable shapes and locations. The etching technique is based on sequential etching and passivation steps where a combination of three gases of H2, O2 and SF6 in the presence of RF plasma is exploited. Using this method it has been possible to realize high aspect ratio features on silicon substrates whereas by adjusting the etching parameters, it is possible to form texturing of silicon in desired places. This technique is highly programmable where the pressure, gas flows, plasma power and duration of each cycle can be preset to achieve desired features. The formation of nano-grass on the silicon surface improves its wetability both to water and oil spills.