bluuebunny/crossref_metadata_2025_split huggingface dataset:
Packaging Of Ultrathin Semiconductor Devices Through The ELO Packaging Process
Authors: Sickmiller Mike 
Published: April 2011

ABSTRACTThe trend in semiconductor packaging is moving toward thinner and thinner packages. Likewise, chip profile is moving toward thinner and thinner chips. Presented here is a technique used to obtain a semiconductor package containing chips as slim as one micron in thickness. The ELO Packaging Process yields ultrathin chips for applications such as advanced heat sinking, high-efficiency optoelectronics, multiple stacked chips in a single package, and thin mechanically flexible semiconductor circuits. This technology is being developed around both the fab and packaging house so as not to interfere with the conventional semiconductor fabrication process flow.Through a combination of back-grinding and chemical etch techniques, chips have been thinned to as little as 1 µm and bonded to a variety of new host substrates[1]. Several bonding methods have been utilized – including thin solder or epoxy layers – to bond these functional chips to a variety of new substrates. Ultrathin microwave power amplifiers have been bonded to heat sinks and optoelectronic devices have been bonded to transparent substrates. In both cases, the ultrathin chip configuration coupled with the desired substrate can increase performance of the chip by a factor of 10X.
A Novel Ultra-miniature catheter tip pressure sensor fabricated using silicon and glass thinning techniques
Authors: Allen Henry , Ramzan Kamrul , Knutti Jim , Withers Stan 
Published: April 2011

ABSTRACTA novel subminiature pressure sensor for blood pressure measurement has been fabricated. The device is only 250 microns wide and 70 microns thick. It is 1.1 mm in length. The sensor is housed in a guide-wire lead for use in measuring coronary artery blood pressure. The device has a 5 micron thick silicon diaphragm and senses pressure using a 1/2 bridge piezoresistive network. Glass is processed to provide depressions above the sensing area as well as above the connection area of the device. A full-thickness silicon wafer is processed using standard micromachining techniques. V-Groove notches are micro-machined on the top surface of the silicon to provide locators/guides for the lead-wires. Diaphragm windows are patterned on the back of the silicon wafer and the wafer is etched down to form the 5 micron diaphragm, using electro-chemical etch-stop techniques. The Glass and Silicon wafers are aggressively cleaned prior to bond. The glass and silicon wafers are then precisely aligned to better than 10 microns and bonded using anodic bonding techniques.The glass/silicon wafer sandwich then has the silicon thinned from 400 microns to 37 microns using both grinding and polishing. Then the full-thickness glass wafer is etched in HF to a thickness of 37 microns as well, for a composite 74-micron thick structure. The wafer is then diced to form the micro-mechanical structure.
Atomic-Layer Cleaving and Non-contact Thinning and Thickening for Fabrication of Laminated Electronic and Photonic Materials
Authors: Current Michael I. , Farrens Shari N. , Fuerfanger Martin , Kang Sien , Kirk Harry R. , Malik Igor J. , Feng Lucia , Henley Francois J. 
Published: April 2011

ABSTRACTAn innovative suite of layer transfer technologies, collectively called the NanoCleaveTM Process, includes a non-porous cleave plane utilizing a compressive strain layer, growth of a high purity, crystalline device layer, plasma activation coupled with vacuum bonding, room-temperature cleaving along an atomically flat plane and a variety of post-cleave CVD processes to thicken or thin the device layer to a desired final thickness is described. Applications of this process include fabrication of SOI wafers containing Si and SiGe alloy device layers.
Characterization & Analysis of Sub-Grain Boundaries in Sequential Lateral Solidification Processed SOI Films
Authors: Crowder M. A. , Limanov A. B. , Turk B. A. , Im James S. 
Published: April 2011

AbstractThe nature of the formation of sub-grain boundaries within sequential lateral solidification (SLS) processed thin silicon films has been examined using single crystal Si films as a pre- cursor material. Experimental details include the use of an excimer laser projection system and straight-slit beamlets to produce directionally solidified microstructures. Within the SLS processed silicon-on-insulator (SOI) films, three microstructurally distinct regions are identi-fied: (1) an initial planar defect-free area (the extent of which can depend on laser fluence and orientation); (2) a transitional area within which the sub-grain boundaries appear and propagate in a well-defined direction relative to the crystallographic orientation; and (3) a final area characterized by sub-grain boundaries aligning approximately to the scan direction, and the in-plane texture becoming more random. We discuss the results within the context of a plastic deformation model of sub-grain boundary formation.
Oxidation of Molybdenum Thin Films and its Impact on Molybdenum Field Emitter Arrays
Authors: Chalamala Babu R. , Reuss Robert H. , Wei Yi , Bernhard John M. , Sosa Edward D. , Golden David E. , Aggarwal Sanjeev , Ramesh R. 
Published: April 2011

AbstractOxidation of emitter surfaces can be a serious problem for Mo field emitter arrays. We studied the oxidation and related changes in the electronic properties of Mo thin films as a function of annealing temperature. Experiments were done on Mo thin films prepared on Si and sodalime glass substrates. These films were thermally oxidized and characterized using a variety of techniques including x-ray diffraction (XRD), x-ray photoelectron spectroscopy (XPS), ultraviolet photoelectron spectroscopy (UPS), and thermal desorption spectroscopy (TPD) methods. For films oxidized below 400°C, partial oxidation was observed, with MoO3(110) being the principal oxide phase. However, at a temperature of 500°C and above, oxidation of the film was complete. Electrical characteristics of the films undergo a rapid transition from semiconductive to highly insulating at temperatures between 475 to 500°C. Temperature programmed desorption spectra showed that the oxides are stable at elevated temperature with only a principal O2 desorption peak at approximately 786°C.
Porous Silicon Coated with Ultra-Thin Diamond-Like Carbon Film Cathodes
Authors: Evtukh Anatoli A. , Litovchenko Volodimir G. , Litvin Yurii M. , Fedin Dmitrii V. , Rassamakin Yurii V. , Sarikov Andrey V. , Chakhovskoi Andrei G. , Hunt Charles E. , Felter Thomas E. 
Published: April 2011

AbstractThe main requirements to electron field emission cathodes are their efficiency, stability and uniformity. In this work we combined the properties of porous silicon layers and diamond-like carbon (DLC) film to obtain emission cathodes with improved parameters. The layered structures of porous silicon and DLC film were formed both on flat n-Si surface and silicon tips created by chemical etching. The conditions of the anodic and stain etching of silicon in HF containing solution under the illumination have been widely changed. The influence of thin (≤10nm) DLC film coating of the porous silicon layer on electron emission has been investigated. The parameters of emission efficiency such as field enhancement coefficient, effective emission areas and threshold voltages have been estimated from current-voltage dependencies to compare and characterize different layered structures. The improvement of the emission efficiency of silicon tip arrays with porous layers coated with thin DLC film has been observed. These silicon-based structures are promising for flat panel display applications.
Effect of Deposition Condition of Precursor Amorphous Silicon Thin Films on the Behavior of Milc
Authors: Yoon Y.-G. , Kim G.-B. , Park H.-H , Lee S.-W , Joo S.-K. 
Published: April 2011

AbstractWe studied on the effect of a deposition condition of precursor a-Si thin films on the shape and micro-structure of MILC. The a-Si thin films were prepared by Plasma Enhanced Chemical Vapor Deposition (PECVD) with silane and hydrogen as a source gas and the deposition temperature was varied from 100 to 400∼. The a-Si films deposited at a lower temperature showed a tendency to (111) crystals and leaving some a-Si residues in MILC region, while those with higher deposition temperature tended to be crystallized to (110). These differences were explained in terms of original hydrogen content and following structural changes by the dehydrogenation during annealing.
Analysis of ITO Films Deposited on Various Polymer Substrates for High-Resolution Plastic Film LCDs
Authors: Han Jeong In , Park Sung Kyu , Lee Chan Jae , Kim Won Keun , Kwak Min Gi 
Published: April 2011

AbstractThe electrical and mechanical properties in indium-tin-oxide films deposited on polymer substrate were examined. The materials of substrates are polyethersulfone(PES), polycarbonate(PC), polyethylene terephthalate(PET) which have gas barrier layer and anti-glare coating for plastic-based devices. The experiments were performed by rf-magnetron sputtering using a special instrument and buffer layers. Therefore, we obtained a very flat polymer substrate deposited ITO film and investigated the effects of buffer layers, in addition to the instrument. Moreover, the influences of an oxygen partial pressure and post-deposition annealing in ITO films deposited on polymer substrates were clarified. X-ray diffraction observation, measurement of electrical property, and optical microscope observation were performed for the investigation of micro-structure and electro-mechanical properties. They indicated that as-deposited ITO thin films are amorphous and become quasi-crystalline after adjustment of oxygen partial pressure and thermal annealing above 180 °C. As the results, we obtained 20-25 Ω/ of ITO films with a good transmittance (above 80%) under 0.2 % oxygen contents and vacuum annealing. Furthermore, using organic buffer layer, we obtained ITO films which have rather high electrical resistance (40-45 Ω/ ) but have improved optical (more than 85%) and mechanical characteristics compared to the counterparts.
Diffusion Behavior of Ion-Implanted n-type Dopants in Silicon Germanium
Authors: Eguchi S. , Leitz C. W. , Fitzgerald E. A. , Hoyt J. L. 
Published: April 2011

AbstractThe diffusion behavior of ion implanted arsenic and phosphorus in relaxed-Si0.8Ge0.2 is investigated. Both dopants exhibit enhanced diffusivities in SiGe compared to those in Si under equilibrium conditions. The ratio of the effective diffusivity in SiGe relative to that in Si is found to be approximately seven for arsenic, and roughly two for phosphorus at high concentrations. Under transient diffusion conditions, arsenic diffusion in SiGe is retarded while arsenic diffusion in Si is enhanced by the ion implant damage. The transient retardation of arsenic diffusion in SiGe is observed at temperatures ranging from 900 to 1050°C. These results suggest that using arsenic, it is possible to form n+/p junctions in relaxed-Si0.8Ge0.2 as shallow as those in Si, by optimizing the implant annealing conditions.
Electrical Properties of Ultra Shallow p Junction on n type Si Wafer Using Decaborane Ion Implantation
Authors: Song Jae-Hoon , Choi Duck-Kyun , Oh Min-Seok , Choi Won-Kook 
Published: April 2011

AbstractThe junction depth should be less than 0.05 microns to fabricate sub 0.1 micron devices. This requires implanting boron with energy of less than 1 keV. One drawback in a low energy ion source is low throughput due to low ion beam current. At present, boron known for a major p-type dopant for PMOSFET has problem to easily diffuse into Si wafer even in rapid thermal processing by high diffusivity. To resolve this problem, decaborane (B10H14) molecules are implanted to make p+/n junction on n-type Si wafers for low-energy boron dopant source. Ionized decaborane is accelerated at 1∼10 kV and implanted up to dosages from 1×1012/cm2 to 5×1013/cm2. Afterwards, Decaborane implanted Si wafers were post-annealed for 10 sec at 800, 900 and 1000°C, respectively. From RBS results on as-implanted n-type Si wafer implanted at 5 kV, it is observed there are amorphous Si layers with 4 nm in depth and boron ions are implanted up to 1∼5 nm in depth from SIMS analysis. The electrical properties of these p-n junctions are 127∼130 ω/sq. as sheet resistance, +0.3 V turn-on voltage and −1.1 V breakdown voltage obtained from I-V measurement.
Growth and Characterization of UHV/CVD Si/SiGe Strained-Layer Superlattices on Bulk Crystal SiGe Substrates
Authors: Sheng S.R. , Dion M. , Mcalister S.P. , Rowell N.L. 
Published: April 2011

AbstractHigh-quality short-period Si/SiGe strained-layer superlattices have been grown on bulk single-crystal SiGe substrates using a commercial low-temperature ultrahigh vacuum chemical vapor deposition (UHV/CVD) reactor. These superlattices were characterized by high-resolution x-ray diffraction (HRXRD), Auger electron spectroscopy (AES), atomic force microscopy (AFM), cross-sectional transmission electron microscopy (XTEM) and photoluminescence (PL). HRXRD, AES, and XTEM results confirm that the materials deposited are high crystal-quality superlattice layers with abrupt interfaces and excellent thickness and composition uniformity across superlattices of 5 periods. AFM images show similar surface RMS roughness of much less than 1 nm for both the top layer surface and the starting substrate surface, indicating very smooth surfaces. PL measurements further confirm material quality and composition, and show sharp, well-resolved near band-edge BE and FE PL and strong broad sub-gap PL perhaps related to direct-gap superlattice transitions. The materials grown here are very promising for applications of both high-speed electronic devices and high-efficiency optoelectronic devices.
Poly-SiGe TFTs Fabricated by Low Temperature Chemical Vapor Deposition at 450°C
Authors: Shimizu Kousaku , Zhang Jianjun , Lee Jeong-woo , Hanna Jun-ichi 
Published: April 2011

AbstractLow temperature growth of poly-SiGe has been investigated by reactive thermal chemical vapor deposition technique, which is a newly developed technique for preparing polycrystalline materials with using redox reactions in a set of source materials, Si2H6 and GeF4.. In order to prepare high uniformity and reproducibility of Si-rich poly-SiGe, total pressure, gas flow ratio, and residence time are optimized at 450°C of substrate temperature. Through optimizing the conditions, poly-Si1−xGex (x<0.04) films have been prepared in the reproducibility more than 90% and uniformity more than 88%. Bottom gate type of n-channel thin film transistors has been fabricated in various grain size of poly-Si1−xGex on SiO2 (100nm)/Si substrates. 5-36 cm2/Vs of field effect mobility of thin film transistors (L/W = 50μm/50μm) have been achieved after hydrogenation, whose threshold voltage is around 2±0.5V, and on/off ratio is more than 104.
Mechanical Testing of Free-Standing Thin Films
Authors: Sharpe W. N. , Hemker K. J. 
Published: April 2011

AbstractAn overview is given of methods for testing thin-film tensile specimens of either MEMS materials or surface coatings. MEMS specimens are deposited in a final shape and need only to be released for testing, while specimens of coating materials must be extracted. Very brief descriptions of the specimen designs, force application approaches, and strain measurements are given along with a limited number of references. Representative stress-strain curves for polysilicon, silicon nitride, silicon carbide, electroplated nickel and diffusion aluminide bond coating are presented. Results at high temperatures are presented for the latter two materials.
Bonding of Bulk Piezoelectric Material to Silicon Using a Gold-Tin Eutectic Bond
Authors: Turner Kevin T. , Mlcak Richard , Roberts David C. , Spearing S. Mark 
Published: April 2011

AbstractA class of MEMS devices, which utilizes microfabrication technology and bulk piezoelectric material, is currently being developed to produce high power density transducers. A thin-film gold-tin eutectic solder bond has been developed to bond electrically and mechanically bulk piezoelectric elements to microfabricated silicon structures in these devices. A 4.3 [.proportional]m thick multilayer film structure, consisting of a titanium adhesion layer, a platinum diffusion barrier, a gold-tin (80 wt.% Au - 20 wt.% Sn) alloy layer, and a pure gold capping layer, was sputter deposited on the piezoelectric components to be bonded. Bonding was accomplished by mating the piezoelectric components with silicon components metallized with a titanium-platinum-gold multilayer film and heating to approximately 300°C in a reducing atmosphere. The bonding technology allows thin, electrically conductive bonds to be formed between dissimilar materials with minimal amounts of applied pressure during bonding. Successful bonding has been achieved between single crystal silicon and polycrystalline lead-zirconate-titanate (PZT-5H) as well as between silicon and single crystal lead zinc niobate-lead titanate (PZN-PT). The process was optimized to produce mechanically robust, void-free bonds. The absence of voids was verified through scanning electron microscope examinations of bond cross-sections. Tensile tests conducted on representative structures indicated that the strength of the bond was limited by the strength of the titanium – PZT-5H interface.
Electro-Mechanical Coupling and Power Generation in a Pzt Micro-Engine
Authors: Bahr D.F. , Bruce K.R. , Olson B.W. , Eakins L.M. , Richards C.D. , Richards R.F. 
Published: April 2011

AbstractA piezoelectric thin film MEMS device for generating power from a novel heat engine which approaches a Carnot cycle has been developed. The structure of the underlying electrode and PZT thin film generator has been optimized for increased adhesion. Atomic force microscopy was used to track electrode grain size and roughness; generating grain sizes of approximately 100 and 200 nm in diameter and a roughness of about 14-20 nm provide substantial improvements in film adhesion over systems with smaller grains and smoother surfaces. This has led to the ability to operate the engine at frequencies between 10 and 1500 Hz. The system of interest (a fluid filled cavity sealed by a micromachined silicon membrane and the PZT film) shows increased deflections for a given pressure applied to the membrane at frequencies where the system resonates. By operating the system dynamically, it is possible to generate more than 2 V from a single generator structure.
Ferromagnetic NiMnGa and CoNiGa Shape Memory Alloy Films
Authors: Craciunescu C. , Kishi Y. , Saraf L. , Ramesh R. , Wuttig M. 
Published: April 2011

AbstractThis paper reports results on Heusler-type NiMnGa and CoNiGa ferromagnetic shape memory alloy films deposited by magnetron sputtering and pulsed laser deposition respectively, on silicon cantilever-type substrates.NiMnGa FMSMA films deposited by magnetron sputtering on silicon substrates show good ferromagnetic and shape memory properties if the substrate is heated above 350°C or if the films deposited at RT are annealed above 600°C. The growth of the film is columnar. TEM examination shows typical martensitic variants while the SAED pattern suggests an orthorhombic structure. CoNiGa FMSMA films deposited at 550°C by PLD are crystalline. Mechanical spectroscopy data proves the presence of a typical martensitic transformation that develops below room temperature: the phase transitions manifest themselves by typical changes of the modulus defect and displacement vs. temperature characteristics similar to those associated with the martensitic transformation in known shape memory alloy films.The change in the elastic modulus as a function of the magnetic field suggests that in both NiMnGa and CoNiGa films the spontaneous magnetization is clamped by the magnetic anisotropy field.
On the Unification of Material Strength Testing for MEMS Applications
Authors: Chen Kuo-Shen 
Published: April 2011

AbstractIn MEMS, the geometry and applied loads between strength testing coupon and structures for design are usually different and the strength data cannot be directly applied without modification for designing brittle MEMS structures. In this paper, a method based on equal failure probability is proposed to find the equivalent strength for design by scaling the test strength with a parameter called stress ratio. By the same approach, it is also possible to correlate MEMS material strength data obtained by different testing schemes.
The Early Stages of the Microstructural Development of the Colony Structure in Bi-2223 Tapes
Authors: Holesinger T. G. 
Published: April 2011

ABSTRACTThe current protocol for processing (Bi,Pb)2Sr2Ca2Cu3O10-x (Bi-2223) multifilamentary tapes involves the in situ formation of the primary phase from a suitable mixture of precursor phases. As such, the developments during the first few minutes of heat treatment determine to a large extent the efficiency of primary phase development, competing secondary phase development, texture evolution, and grain-to-grain connectivity. This work documents the development of the liquid phase, secondary phases, defects which may affect alignment and reaction kinetics, and the precipitation of Bi-2223 from the liquid phase.
High-Jc YBCO coatings on reel-to-reel dip-coated Gd2O3 seed buffer layers epitaxially fabricated on biaxially textured Ni and Ni-(3at%W-1.7at%Fe) alloy tapes
Authors: Aytug Tolga , Paranthaman M. , Sathyamurthy S. , Kang B. W. , Beach D. B. , Vallet C. E. , Specht E. D. , Lee D. F. , Feenstra R. , Goyal A. , Kroeger D. M. , Leonard K. J. , Martin P. M. , Christen D. K. 
Published: April 2011

ABSTRACTA low-cost, non-vacuum reel-to reel dip-coating system has been used to continuously fabricate epitaxial Gd2O3 buffer layers on mechanically strengthened, biaxially textured Ni- (3at.%W-1.7at%Fe), defined as Ni-alloy, metal tapes. X-ray diffraction analysis of the seed Gd2O3 layers indicated that well textured films can be obtained at processing temperatures (Tp) between 1100 and 1175°C. Processing speed did not significantly affect the crystalline quality of the Gd2O3. Scanning electron microscopy revealed a continuous, dense and crack-free surface morphology for these dip-coated buffers. The Gd2O3 layer thickness led to remarkable differences in the growth characteristics of the subsequent YSZ and CeO2 layers deposited by rfmagnetron sputtering. Epitaxial YBCO films grown by pulsed laser deposition on the short prototype CeO2/YSZ/Gd2O3/Ni-(3at%W-1.7at%Fe) conductors yielded self-field critical current densities (Jc) as high as 1.2×106 A/cm2 at 77 K. Pure Ni tapes were used to asses the viability of dip-coated buffers for long length coated conductor fabrication. The YBCO films, grown on 80 cm long and 1 cm wide CeO2/YSZ/Gd2O3 buffered Ni tapes by the industrially scalable ex-situ BaF2 precursor process, exhibited end-to-end self-field Jc of 6.25×105 A/cm2 at 77 K.