bluuebunny/crossref_metadata_2025_split huggingface dataset:
Magnetoresistance in Thin Films of Silver Chalcogenides
Authors: Chuprakov I.S. , Lyalikov V.B. , Dahmen K.-H. , Xiong P. 
Published: April 2011

AbstractOriented and non-oriented thin films of silver(I) telluride, Ag2Te, were prepared by e-beam evaporation, vapor transport technique and Chemical Vapor Deposition (CVD). Crystallinity and orientation of the films were studied by Θ−2Θ XRD, rocking curve and pole figure measurements. The origin and conditions for the oriented growth are discussed. Special microdevice was prepared by photolitography from the oriented films of Ag2Te in order to investigate magnetoresistance (MR) in this material. It was proved that the reported earlier negative MR in Ag2Te films is a completely geometrical effect, which can be observed using non-linear arrangement of current and voltage contacts.
Narrow-Linewidth Yttrium Iron Garnet Films for Heterogeneous Integration
Authors: Levy M. , Osgood R.M. , Rachford F. J. , Kumar A. , Bakhru H. 
Published: April 2011

AbstractWe report on the fabrication and characterization of single-crystal films of yttrium iron garnet (YIG) for heterogeneous integration onto growth-incompatible substrates. The process entails the implantation of energetic helium ions into the material, resulting in the formation of a fast etching sacrificial layer. Separation from the growth substrate is followed by an annealing step, yielding a ferromagnetic resonance (FMR) linewidth of 0.70 Oe from a virgin sample of linewidth 0.55 Oe. Magnetization measurements show a distinct softening of the in-plane response to an applied field.
Performance of a Ferroelectric Tunable Pre-Select Filter/Low Noise Amplifier Hybrid Circuit
Authors: Subramanyam Guru , Miranda Felix A. , Romanofsky Robert R. , Keuls Fred Van , Chen Chonglin 
Published: April 2011

AbstractIn this paper we discuss the performance of a proof-of-concept of a tunable band pass filter (BPF)/Low Noise Amplifier (LNA) hybrid circuit for a possible gain-compensated down-converter targeted for the next generation of K-band satellite communication systems. Electrical tunability of the filter is obtained through the nonlinear electric field dependence of the relative dielectric constant of a ferroelectric thin-film such as strontium titanate (SrTiO3) or barium strontium titanate (BaxSr1−xTiO3). Experimental results show that the BPFs are tunable by more than 5%, with a bipolar biasing scheme employed. The BPF/LNA tunable hybrid circuit was used to study the effect of tuning on the hybrid circuit's performance especially on the amplifier's noise-figure and the gain.
Junctions for Deep Sub-100 NM MOS: How Far will Ion Implantation Take Us?
Authors: Gossmann H.-J. , Rafferty C. S. , Keys P. 
Published: April 2011

AbstractWe analyze the requirements that the International Technology Roadmap for Semiconductors (ITRS) implicitly imposes on the two-dimensional source/drain (SD) dopant profile and translate the results into implant parameters (energy, dose, peak concentration). We do this by determining the voltage drop that the SD current develops across the three main (exclusive of the channel) resistive components in the current path: the spreading resistance in the extension region; the metal-semiconductor contact; and the resistance in the link-up region where the SDregion meets the channel. The largest resistance occurs in the link-up region, followed by the resistance of the contact; the extension contribution is the smallest. The extension resistance requirement can be satisfied by ion-implantation for all generations of the ITRS. The link-up region requires very abrupt lateral profiles, not demonstrated so far by ion-implantation. It is found that such resistance cannot be reduced without impacting the intrinsic device behavior. The contact eventually necessitates dopant concentrations in excess of solid solubility and for NMOS in excess of the fundamental limit of dopant activation.
Ultrashallow Junction Formation and Gate Activation in Deep-Submicron CMOS
Authors: Stolk P. A. , Cubaynes F. N. , Meyssen V. M. H. , Mannino G. , Cowern N. E. B. , Zijl J. P. van , Roozeboom F. , Verhoeven J. F. C. , Berkum J. G. M. van , Wijgert W. M. van de , Schmitz J. , Tuinhout H.P. , Woerlee P. H. 
Published: April 2011

AbstractThis paper addresses the optimization of ion implantation and rapid thermal annealing for the fabrication of shallow junctions and the activation of polycrystalline silicon gates in deepsubmicron CMOS transistors. Achieving ultrashallow, low-resistance junctions was studied by combining low-energy B and As implantation with spike annealing. In addition, experiments using B doping marker superlattices were performed to identify the critical physical effects underlying dopant activation and diffusion. The combination of high ramp rates (∼100 °C/s) and ∼1 s cycles at temperatures as high as 1100 °C can be used to improve dopant activation without inducing significant thermal diffusion after TED has completed. MOS capacitors were used to identify the implantation and annealing conditions needed for adequate activation of the gate electrode. In comparison to the conventional recrystallized amorphous Si gates, it was found that fine-grained poly-Si allows for the use of lower processing temperatures or shorter annealing times while improving the gate activation level. The fine-grained crystal structure enhances the de-activation of B dopants in PMOS gates during the thermal treatments following gate activation. Yet, the resulting dopant loss stays within acceptable limits as verified by excellent 0.18 μm device performance. The feasibility of spike annealing and poly-Si gate materials for 100-nm technology was proven by full integration using gate lengths down to 80 nm.
Analysis and Suppression of Process-Induced Defects in Memory Devices.
Authors: Annunziata R. , Bottini R. , Colpani P. , Cremonesi C. , Ghidini G. , Gomiero E. , Pavia G. , Pio F. , Polignano M. L. , Servalli G. , Higgs V. 
Published: April 2011

AbstractIn this paper we show that dopant decoration of process-induced defects is responsible for a failure mechanism of memory devices. From the electrical point-of-view, the defect-related failure consists in a source-to-drain resistive path formed by junction piping. This mechanism is made active by the very close spacing which is typical of present device structures. A device-like test structure is used for defect detection. This structure proves to be a very effective tool for studying the impact of various process steps on defect generation, in that it allowes statistical data about the formation of these defects to be collected. TEM analyses are extensively used for studying the evolution of end-of-range defects during subsequent thermal treatments and for measuring the amorphous layer width under various implantation conditions.The role of high dose implantations in the generation of this sort of defects is discussed. Even if the amorphous layer is completely recovered by a suitable recristallization annealing, residual defects grow and become dopant-decorated during post-implantation thermal treatments. Defect density is increased by oxidizing treatments. In this case point defect injection is active both in enhancing dopant diffusion and in growing defects.Defect formation is suppressed if the amorphous layer is made very shallow (≤ 50 nm) by suitable choices of the screen oxide and of the implantation energy. A binary collision code is used in order to estimate the dependence on energy of the self-interstitial excess outside the amorphous region. The results of these calculations indicate that defect suppression can be tentatively explained by point defect annihilation at the silicon surface.
Ultra - Shallow p+/n Junction Formed by Plasma Ion Implantation
Authors: Baek Sungkweon , Choi Chel-Jong , Seong Tae-Yeon , Hwang Hyunsang , Kim H. K. , Moon D. W. 
Published: April 2011

AbstractWe have investigated the electrical characteristics, junction depth and defect of ultrashallow junctions formed by using a plasma doping procedure. Compared with ultralow energy boron ion implantation at 500eV, the plasma doping process exhibits both a shallow junction depth and a low sheet resistance. The junction depths of the plasma doped samples were 15 nm and 33 nm after annealing for 10s at 900 °C and 950 °C, respectively. For the same junction depth, the sheet resistance of the B2H6 plasma doped sample is an order of magnitude less than that of the 500eV B ion implanted sample. Based on cross-sectional transmission electron microscope (TEM) and deep level transient spectroscopy (DLTS) analysis, the defects formed by the B2H6 plasma doping process can be completely removed by annealing at 950 °C for 10s.
Post-Oxidation Enhanced Diffusion of Low-Energy Implanted Boron in Ultra-Shallow P+/N Junctions Formation
Authors: Lenoble D. , Halimaoui A. , Grouillet A. 
Published: April 2011

AbstractIn this paper, we report for the first time the effect of sacrificial oxide (sacox) on the boron diffusion in ultra-shallow P+/N junctions. It is shown that the boron diffusivity is enhanced when low energy implantations are performed through sacrificial oxide. The various experimental data lead to conclude that the Post-Oxidation Enhanced Diffusion (POED) is due to a « mirror effect » seen by the Si interstitials incoming into the sacox layer. POED occurs even for sacox as thin as 1.5 nm. From a simple model, the reflection coefficient is estimated to be about 100 % for a 2.5 nm-thick sacox.
A Historical View of the Role of Ion-Implantation Defects in PN Junction Formation for Devices
Authors: Fair R.B. 
Published: April 2011

AbstractThe early use of ion bombardment of semiconductors for forming doped regions was viewed as a room-temperature process by solid-state scientists. Many interesting, but relatively useless devices were made by implanting species such as Na and Cs ions to form pn junctions from radiation damage or interstitial impurities. The revolutionary idea that one could implant Group III and V dopants into semiconductors and then heat the implanted substrate to above 800C didn't appear until 10 years after Shockley's 1954 patent. At that time, implantation damage became relatively unimportant as processes evolved with high temperature, long time diffusions. With the advent of rapid thermal processing, the attention shifted back to implantation-induced defects to explain transient-enhanced-diffusion effects. Today's challenges in forming ultra-shallow junctions by ion-implantation are in controlling and minimizing the damage structures that dominate junction activation and diffusion. Low-energy implants have been effective in this regard.
A Comparative Study of Dose Loss and Diffusion for B11 and BF2 Implants
Authors: Kasnavi Reza , Griffin Peter B. , Plummer James D. 
Published: April 2011

AbstractWe have studied dose loss for B11 and BF2 implants with energies ranging from 10 keV to 1keV for B11 and 45 keV to 2keV for BF2. We found that B11 implants during a 1050C-10s RTA anneal segregate mainly to the bulk of the oxide. High dose BF2 implants on the other hand, show significantly larger amounts of dose loss after stripping the oxide, due to a pile-up of boron at the Si/SiO2 interface. In order to simulate B11 diffusion we have introduced a simple average cluster size model to simulate Boron-Interstitial-Cluster (BIC) evolution. For BF2 implants, we have simulated the effect of F by reducing the damage and we have used interface traps to account for the dose loss observed experimentally. Using these models, we have been able to fit the SIMS profiles across the whole matrix of implant conditions for both B11 and BF2 implants.
Effect of Ge Pre-amorphization on Junction Characteristics for Low Energy B Implants
Authors: Liu Jinning , Mehta Sandeep 
Published: April 2011

AbstractThe drive towards developing deep sub-micron CMOS devices places more challenges on semiconductor processing. From the standpoint of doping technology, the challenge is to achieve ultra-shallow p+/n source/drain extension junctions for PMOS. Among the various approaches being pursued to meet this challenge, pre-amorphization was used to curtail channeling of the as-implanted Boron. The effect of pre-amorphization on junction depth and junction sheet resistance in the ultra-low implant energy regime is investigated in this study. Pre-amorphization was achieved with Ge implant. B was implanted at energies of 250eV to 5keV and at a dose of 1×1015cm−2 into crystalline and pre-amorphized wafers. Both spike anneal at 1050°C and furnace anneal at 500°C to 750°C were performed after B implants. In all spike anneal cases, the pre-amorphized wafers exhibit higher sheet resistance and shallower junction depth than crystalline wafers. In all furnace anneal cases, shallower junction depth as well as lower sheet resistance can be achieved with pre-amorphized wafers. Higher pre-amorphization energy induces lower sheet resistance after both furnace and rapid thermal anneal (RTA).
Non-destructive, In-line Characterization of Shallow Junction Processes
Authors: Kluth G. Jonathan , Bechtler Laurie , Borden Peter , Mi Jian 
Published: April 2011

AbstractThis paper describes the application of a novel optical metrology tool to in-line monitoring of shallow junction processes in a production setting. Recent results demonstrate the sensitivity of junction depth to implant dose and energy, as well as to annealing temperature and time. Results are also presented on monitoring of amorphizing implants and low dose implants. The in-line measurement has been performed on both bare wafers and product wafers. Measurements are compared with results obtained by destructive techniques such as SIMS and SRP. These results demonstrate that the optical method has the capability to provide in-line control of shallow junction processes.
Non-destructive Characterization of Activated Shallow B and as Implants in full NMOS and PMOS Process Flows
Authors: Borden Peter G. , Bechtler Laurie , Larson Lawrence , Murto Bob , Covington Billy , Ferguson Clarence , Nguyen Billy 
Published: April 2011

AbstractA new method for non-destructive, small area characterization of ultra-shallow junctions, called Carrier Illumination™ (CI) has recently been developed. This work validates the CI measurement in full CMOS and NMOS process flows, with the aim of demonstrating its capability to provide in-line characterization of junction depth and uniformity on product wafers. Measurements have been carried out on both unpatterned and patterned wafers at various steps in the SEMATECH standard process flow. CI was used to characterize annealed 800 eV B11 PLDD implants into n-wells and annealed As75 NLDD source/drain (S/D) implants into p-wells. This work demonstrates correlation to dose, junction depth as measured with SIMS and SRP, and electrical properties of test structures.(1) Proceedings of the Fifth International Workshop on Measurement, Characterization and Modeling of Ultra-Shallow Doping Profiles in Semiconductors, usj-99, Research Triangle Park, NC, March 1999, pp. 314-18.
Energy Dependence of Transient Enhanced Diffusion and {311} Defect Kinetics
Authors: Saleh Hugo , Law Mark E. , Bharatan Sushil , Jones Kevin S. , Krishnamoorthy Wish , Buyuklimanli Temel 
Published: April 2011

AbstractBoron, a P-type dopant, experiences Transient Enhanced Diffusion (TED) via interstitials. The Boron TED and {311} dissolution rates are explored as a function of implant energy dependence. Silicon implants of 1014/cm2 at 20, 40, 80, and 160 keV were used to damage the surface of a wafer with an epitaxially grown boron marker layer. Samples were annealed at 750°C for 15 to 135 minutes and 800°C for 10 to 30 minutes to observe the diffusion exhibited by the marker layer and to correlate this with the dissolution of {311} type defects. The diffusion enhancement depends strongly on implant energy but the {311} dissolution rate is weakly dependent.
Depth Profiles of High-energy Recoil Implantation of Boron into Silicon
Authors: Shao Lin , Lu Xinming , Jin Jianyue , Li Qinmian , Rusakova Irene , Liu Jiarui , Chu Wei-Kan 
Published: April 2011

AbstractWe have studied boron profiles by using the ion beam recoil implantation. A boron layer was first deposited onto Si, followed by irradiation with Si ions at various energies to knock the boron. Conventional belief is that the higher the implantation energy, the deeper the recoil profiles. While this is true for low-energy incident ions, we show here that the situation is reversed for incident Si ions of higher energy due to the fact that recoil probability at a given angle is a strong function of the energy of the primary projectile. Our experiments show that 500-keV high-energy recoil implantation produces a shallower B profile than lower-energy implantation such as 10 keV and 50 keV. The secondary-ion-massspectrometry (SIMS) analysis shows that the distribution of recoiled B atoms scattered by the energetic Si ions agrees with our calculation results. Sub-100 nm p+/n junctions have been realized with a 500-keV Si ion beam.
Influence of Carbon on the Diffusion of Interstitials and Boron in Silicon
Authors: Law Mark E. , Griglione Michelle D. , Northridge Misty 
Published: April 2011

AbstractCarbon is a native impurity in Si which is known to trap self-interstitials and decrease their diffusivity. Carbon has also been observed to decrease B transient enhanced diffusion (TED) in Si through these interstitial interactions. Recently it has been proposed that vacancies must also be considered when accounting for the reduction of B TED. We have incorporated both the kick-out mechanism and the Frank-Turnbull (F-T) mechanism in simulations of interstitial diffusion and carbon diffusion, as well as experiments involving B diffusion in B doped superlattices (DSLs) with varying C concentration regions. We have used the binding energy between a carbon atom and a self-interstitial as a basis for the reaction rates for both mechanisms, and have found that an single energy of 2.25 eV best reproduces the results from several experiments, assuming equilibrium initial conditions for both mechanisms and ab-initio equilibrium values for all point defects.
Calibration of the Au Labeling Technique to Measure Vacancy Defects in Si
Authors: Kalyanaraman R. , Haynes T. E. , Venezia V. C. , Jacobson D. C. , Gossmann H.-J. , Rafferty C. S. 
Published: April 2011

AbstractIt has been shown recently that Au labeling can be used to profile vacancy-type defects located near half the projected range (½Rp) in MeV-implanted Si. In this work we have quantified the technique by determining the ratio of vacancies annihilated to decrease in the number of Au atoms trapped (calibration factor ‘k’) for the Au labeling technique. The 3 step experiment involved: 1) a high-energy Si-self implant (HEI) followed by an anneal to form stable vacancy clusters, 2) a controlled removal of vacancies via a medium energy Si self implant and interstitial-cluster dissolution anneal, and finally 3) Au labeling to count the change in vacancy concentration in the near surface region (0.1-1.6μm). It is seen that the Au concentration decreases linearly with increasing interstitial injection and the slope of this decrease determined the number of vacancies per trapped Au atom. The value of k was determined to be 1.2±0.2 vacancies per trapped Au atom.
Structural and Chemical Characterization of Tungsten Gate Stack for 1 Gb Dram
Authors: Gluschenkov O. , Benedict J. , Clevenger L.A. , DeHaven P. , Dziobkowski C. , Faltermeier J. , Lin C. , McStay I. , Wong K. 
Published: April 2011

ABSTRACTMaterial interaction during integration of tungsten gate stack for 1 Gb DRAM was investigated by Transition Electron Microscopy (TEM), X-ray Diffraction analysis (XRD) and Auger Electron Spectroscopy (AES). During selective side-wall oxidation tungsten gate conductor undergoes a structural transformation. The transformation results in the reduction of tungsten crystal lattice spacing, re-crystallization of tungsten and/or growth of grains. During a highly selective oxidation process, a relatively small but noticeable amount of oxygen was incorporated into the tungsten layer. The incorporation of oxygen is attributed to the formation of a stable WO x (x<2) composite.
Thin Ni-Silicides for Low Resistance Contacts and Growth of Thin Crystalline Si Layers
Authors: Guliants Elena A. , Anderson Wayne A. 
Published: April 2011

ABSTRACTA new technological method of producing the Ni silicide with metal-like conductivity by deposition of a thin Si film over an ultrathin Ni prelayer at low temperature has been developed. The interaction of a metallic Ni with the Si atoms provided by the deposition source leads to the formation of the Ni-rich silicide phases immediately after the onset of Si deposition. Continued Si deposition results in the transformation of the Ni-rich silicide phases into the more Si-rich ones which implies that the phase composition is controlled by the Ni-to-Si concentration ratio rather than temperature. After Ni is completely consumed, the Si grains grow epitaxially on the disilicide crystals. The silicide layer has been studied in detail with respect to both the dynamics of the silicide growth and the electrical properties. The Ni silicide resistivity was found to be 2×10-4Ωcm. The technique has advantages in two respects: it provides a high crystallinity Si film and allows fabrication of an ohmic contact directly on the substrate thus leaving the front surface of the film available for the formation of the active device junction.
Effects of Nitridation by N2O or No on the Electrical Properties of Thin Gate or Tunnel Oxides
Authors: Gerardi C. , Rossetti T. , Melanotte M. , Lombardo S. , Crupi I. 
Published: April 2011

ABSTRACTWe have studied the effects of nitridation on the leakage current of thin (7-8 nm) gate or tunnel oxides. A polarity dependence of the tunneling current has been found this behavior is related to the presence of a thin silicon oxynitride layer at the SiO2/Si-substrate interface. The oxynitride layer lowers the tunneling current when electrons are injected from the interface where the oxynitride is located (substrate injection). The current flowing across the oxide when electrons are injected from the opposite interface (gate injection) is not influenced by the oxynitride. The increase of nitrogen concentration leads to a decrease of the tunneling current for substrate electron injection.
Silicide engineering: influence of alloying elements on CoSi2 nucleation
Authors: Detavernier C. , Van Meirhaeghe R.L. , Maex K. , Cardon F. 
Published: April 2011

ABSTRACTEvidence is presented that the nucleation of CoSi2 can be influenced by the presence of small amounts of other elements. The presence of trace amounts of Ti in the CoSi (originating from either a Ti capping layer or interlayer) causes an increase in the CoSi2 nucleation temperature. Moreover, the presence of Ti in the CoSi induces a preferential orientation of the CoSi2 : for an increasing amount of Ti, we observed a transition from polycrystalline CoSi2 over preferential (220) orientation towards epitaxial (400) CoSi2. We observed similar effects for other elements (e.g. Ta, W, C, Mo, Cr). We were able to explain these findings based on the heterogeneous nucleation of CoSi2.
Modeling of Self-Aligned Silicidation in 2D and 3D: Growth Suppression by Oxygen Diffusion
Authors: Moroz Victor , Okada Takako 
Published: April 2011

ABSTRACTStress-strain effects and physical processes during formation of the self-aligned silicides are analyzed. A new model for predictive simulation of the self-aligned silicidation is suggested. The model is based on suppression of diffusion and reaction rate of the silicon atoms inside silicide in the presence of oxygen atoms, injected into silicide from the neighbor oxide regions such as oxide spacer, TEOS at STI (Shallow Trench Isolation) and pad oxide. The model is demonstrated to explain the experimentally observed silicide shape.