bluuebunny/crossref_metadata_2025_split huggingface dataset:
Characterization and Optimization of The Tco/a-Si:H(,B) Interface for Solar Cells by In-Situ Ellipsometry and Sims/XPS Depth Profiling
Authors: Wanka H.N. , Lotter E. , Schubert M.B. 
Published: April 2011

ABSTRACTThe chemical reactions at the surface of transparent conductive oxides (SnO2, ITO and ZnO) have been studied in silane and hydrogen plasmas by in-situ ellipsometry and by SIMS as well as XPS depth profiling. SIMS and XPS of the interface reveal an increasing amount of metallic phases upon lowering a-Si:H growth rates (controlled by plasma power), indicating that the ion and radical impact is more than compensated by protecting the surface by a rapidly growing a-Si:H film. Hence, optical transmission of TCO films as well as the efficiency of solar cells can be improved if the first few nanometers of the p-layer are grown at higher rates. Comparing a-Si:H deposition on top of different TCOs, reduction effects on ITO and SnO2 have been detected whereas ZnO appeared to be chemically stable. Therefore an additional shielding of the SnO2 surface by a thin ZnO layer has been investigated in greater detail. Small amounts of H are detected close to the ZnO surface by SIMS after hydrogen plasma treatment, but no significant changes occur to the optical and electrical properties. In-situ ellipsometry indicates that a ZnO layer as thin as 20 nm completely protects SnO2 from being reduced to metallic phases. This provides for shielding of textured TCOs, and hence rising solar cell efficiencies, too. Regarding light trapping efficiency we additionally investigated the smoothing of initial TCO texture when growing a-Si:H on top by combining atomic force microscopy and spectroscopie ellipsometry.
An Exploratory Survey of p-Layers for a-Si:H Solar Cells
Authors: Li Y.-M. , Jackson F. , Yang L. , Fieselmann B.F. , Russell L. 
Published: April 2011

ABSTRACTThe window layer (p-layer) critically affects the conversion efficiency of a-Si:H based p-i-n type solar cells. This paper surveys possible alternative window materials in comparison with the standard boron doped a-SiC:H p-layer. A novel wide-gap amorphous silicon alloy, a-Si:F:H, will be shown to be a good alternative p-layer. As an example of nontraditional p-layer, boron based alloys (e.g., a-B:H) exhibit notable photovoltaic action in a-Si:H solar cells. We comment on attempts to deposit μc-Si alloy window layers on textured TCO-coated glass substrates.
High-Growth Rate a-Si:H Deposited by Hot-Wire CVD
Authors: Brogueira P. , Chu V. , Conde J.P. 
Published: April 2011

ABSTRACTWe present a study of the optoelectronic and structural properties of a-Si:H deposited by Hot-Wire chemical vapor deposition (HW-CVD) from SiH4 and H2 at “Medium” (Tfil ≃ 1500°C) and “high” (Tfil ≃ 1900 °C) filament temperatures. For each tungsten filament temperature regime, the following deposition parameters are varied: (i) pressure (p ∼ 10−2 — 0.5 Torr); (ii) substrate temperature (Tsub ∼ 180 — 270 °C); (iii) silane flow rate (FsiH4 ∼ 1 — 10 ccm) and (iv) hydrogen flow rate (FH2 ∼ 0 — 10 seem). Films deposited at Tfil ∼ 1900 °C in a low pressure regime (p ∼ 2.7 × 10−2Torr) using flows of 5 sccm for both H2 and SiH4 had high deposition rates (rd ∼ 8 Ås−1). These films showed an optical bandgap, E9Tauc ≃ 1.7 eV, a dark conductivity σd ∼ 10−8Scm−1 with an activation energy Eα,σd ≃ 0.8 eV, and photoconductivity σph ≥ 10−5Scm−1 (σph ∼ 10−5). Films deposited at Tju = 1500 °C and p ≃ 0.3 Torr, showed 1.7 < E9Tauc < 2 eV, 10−5 < σd < 10−3Scm−1, 0.2 < Eα,σ d < 0.5 eV and σph/Σd < 102. For the same Tfit and p ∼ 3 × 10−2 — 0.1 Torr, the films show 1.7 < E9Tauc < 2 eV, 10−3 < Σd < 10−1Scm−1 and σph/σd < 1. Films deposited using molybdenum and rhenium filaments at Tfil ≃ 1900 °C show E9Tauc ≃ 1.7 eV and σd ∼ σph ∼ 10−7Scm−1
Saturation Behavior and Thermal Annealing Recovery of Light-Induced Degradation in a-SiGe:H Alloy Solar Cells
Authors: Guha S. , Xu X. , Yang J. 
Published: April 2011

ABSTRACTWe have studied the saturation behavior and thermal annealing recovery of light-induced degradation in amorphous silicon-germanium (a-SiGe:H) alloy solar cells with various Ge contents. In contrast to amorphous silicon (a-Si:H) alloy cells, a-SiGe:H alloy cells with high microvoid density show similar thermal annealing behavior to those with lower microvoid density. Infrared studies show that unlike a-Si:H alloys, a-SiGe:H alloys with higher microvoid density do not show higher hydrogen or dihydride content. Moreover, even with a Ge-content of 41 %, there is saturation in degradation after light soaking for 1000 hours.
Non-Local Recombination in “Tunnel Junctions” of Multijunction Amorphous Si Alloy Solar Cells
Authors: Hou Jingya , Xi Jianping , Kampas Frank , Bae Sanghoon , Fonash S. J. 
Published: April 2011

ABSTRACTThis paper analyzes the charge transport in “tunnel junctions” of amorphous Si Material based multijunction solar cells and proposes some guidelines for making good “tunnel junctions” based on the analysis. The Mechanism of the current flow in these “tunnel” junctions is recombination. However, the recombination mechanism is not the usual localized recombination but is non-localized recombination. The energy analysis shows that the usual localized recombination will cause a large energy loss and result in much lower energy conversion efficiency and Voc than the experimentally measured values. In non-local recombination, opposite charge carriers located at different locations can recombine by tunneling into a defect state. Based on this Mechanism, a good “tunnel junction” should be thin, with a large defect state density in the middle region of the “tunnel junction”. Broad tail states material and a thin layer small band gap material in tunnel junctions may improve the non-local recombination by providing more intermediate states for charge to tunnel through.
Investigation of Shunt Resistances in Single-Junction a-Si:H Alloy Solar Cells
Authors: Lord Kenneth R. , Walters Michael R. , Woodyard James R. 
Published: April 2011

ABSTRACTDark current-voltage characteristics of one hundred twenty single-junction a-Si:H alloy solar cells were studied. Parametric Modelling of dark I-V Measurements was used to determine some of the cell parameters. Average shunt resistances were 31 to 1200 kΩ for intrinsic layer thicknesses of 200 to 800 nm, respectively. Current switching was observed during dark I-V Measurements; the current in the reverse-bias region varies approximately as the square of the voltage following the onset of switching. The I-V characteristics in the switched mode are not understood. Voltage history and scan rate play a role in dark I-V characteristics.
AD-Layer for Spatial Control of Light Induced Degradation on Pin Devices
Authors: Vieira M. , Fantoni A. , Fortunato E. , Lavareda G. , Martins R. 
Published: April 2011

ABSTRACTIn this work we report experimental results on light induced metastability of a-Si:H p.i.n. devices with different Microscopic/Macroscopic structures and we discuss them in terms of improved stability through spatial control of charged defects grown during light exposure. By placing a thin (few Å) intrinsic layer (i') between both p/i and i/n a-Si:H interfaces we are able to reduce the effective degradation rate through spatial modification of the electric field profile in the device. The electronic transport and the stability changes that accompany the change in Microstructure (R) and hydrogen content (CH) of the i- and i'-layer, were monitored throughout the entire light induced degradation process and compared with the corresponding μτ product (for both carriers) inferred through steady state photoconductivity and Flying Spot Technique (FST) Measurements. Results show that the degradation rate is a function of CH and R of both layers and can be correlated with the density of microvoids and di-hydride bonding. Since the i'- layers have a higher Cfj bonded mainly as SiH1 radicals (R≈0.4), they act as an hindrance to the growth of the defect, in the active region, generating “gettering centers” whose localisation and density are tailored in such a way that they will control spatially the electric field profile during light exposure.Preliminary results show improvements in film's stability when the interfacial layer is included. So future progress toward more stable and efficient a-Si:H solar cells will depend on a careful engineering design of the devices.
a-Si TFT Technologies for AM-LCDS
Authors: Ibaraki Nobuki 
Published: April 2011

ABSTRACTA technical trend for a-Si TFTs is their application to large-size, high-pixel density AM-LCDs such as XGA, EWS, and HDTV. In order to realize these LCDs, the TFT device characteristics must be improved. Future technologies, which will be necessary to fabricate TFTs with improved characteristics are as follows(1) Fully self-aligned TFT technology: A SA-TFT structure reduces the feedthrough voltage caused by parasitic capacitance due to gate/source overlap. This results in an improved picture quality and a higher aperture ratio. Fabrication of such a structure would require ion doping technology.(2) Ion doping technology: This non-Mass-separated implantation technique has large area doping capability and much higher doping speed compared to conventional ion implantation technique. The Major problems with the ion doping technique is the implantation of unwanted species which deteriorate the quality of source/drain and channel regions of TFTs.
Surface and Interface Modification of Copper for Electronic Application
Authors: Lanford W. A. , Ding P. J. , Hymes S. , Murarka S. P. 
Published: April 2011

ABSTRACTBefore copper will be used in the manufacture of microelectronic circuits, a number of its surface and interface properties have to be addressed. These include corrosion resistance, adhesion to dielectrics, and ability to block the transport of copper ions from the metal into adjacent materials. Different schemes have been explored to meet copper's material properties needed for electronic application. For surface modification, these include ion implantation, plasma treatments, formation of surface silicides, and annealing of copper films doped with other elements. For interface control, most schemes have involved deposition of an adhesion/barrier film. The present paper will discuss our present understanding of the mechanisms that govern surface and interface passivation. Special attention will be given to schemes that might lead to both surface and interface passivation in the same process.
A New Electrical Model for Calculating the Sheet Resistance Parameter in Alloyed Ohmic Contacts
Authors: Reeves Geoffrey K. , Barry Harrison H. 
Published: April 2011

ABSTRACTThis paper briefly reviews the standard Transmission Line Model (TLM) commonly used to measure the specific contact resistance ρc and the sheet resistance Rsk beneath a planar ohmic contact. In the case of an alloyed ohmic contact, a more realistic three layer (Tri-Layer Transmission Line Model (TLTLM)) can be used for the analysis. This model is based on three layers (metal layer, alloyed semiconductor layer and the unalloyed semiconductor layer) and the two interfaces between them. By using appropriate TLTLM parameters, it is possible to calculate the sheet resistance Rsk that has been experimentally derived from the standard TLM. The new TLTLM model predicts that values of Rsk greater and less than Rsh (the unmodified epitaxial layer sheet resistance) are possible in agreement with experimentally reported observations.
Studies on the Interface of TiN/n-GaAs
Authors: Jie Ho , Gaolong Jin , Liwu Lu , Zhenjia Xu , Lichun Zhang 
Published: April 2011

ABSTRACTRecent reports on refractory metal nitrides/n-GaAs Schottky contacts have demonstrated that improved electrical performance can be obtained after annealing at temperature between 750 and 850°C . It is thought that a p+-type layer should be responsible for this phenomenon, which may be generated by N or N related defects. In this paper, the role of nitrogen in SI-GaAs and n-GaAs has been investigated by Hall effect and DLTS measurements. No evidence of the formation of a p+-type layer has been observed. A deep energy level of Ec-0.36eV which is thought to be related to N and an enhanced effect of N on the density of EL2 level were observed. DLTS and SIMS techniques were used to study the interface of TiN/n-GaAs Schottky contacts. The Ti3+(3d1)/Ti2+(3d2) single acceptor level at Ec-0.21 eV was observed, but the EL2 donor level is dominant. Combining the experimental results, a discussion is made about the reasons for the improvements of electrical performance after annealing.
Optimization of Pd/Zn/Pd/Au Ohmic Contacts to p-Type inGaAs/ InP
Authors: W Leech Patrick , Reeves Geoffrey K. 
Published: April 2011

ABSTRACTThe electrical properties of Pd/Zn/Pd/Au based ohmic contacts to p-type In0 47Ga0 53As/ InP with an interposed superlattice of 50Å In047Gao 53As/ 50 Å InP have been investigated. In this study, several configurations of the Pd/Zn/Pd/Au metallization were fabricated with varying thicknesses of the Zn and interfacial Pd layers in the range 0 to 400 Å. The lowest values of specific contact resistance, ρc, were 1.2 x 10-5 Ω cm2 as-deposited and 7.5 x 106 Ω cm2 for samples annealed at 500 °C. In the as-deposited structures, ρc was reduced by an increase in thickness of both the Zn and Pd layers to 300 Å. For annealed samples, a critical thickness of the Zn ≥ 50 Å and Pd ≥ 100 Å layers was required in order to significantly reduce the magnitude of ρc. These results are consistent with a model of Pd/Zn contacts based on Zn doping of the interface. Studies of thermal stability of the contacts at 400 °C and 500 °C have shown that the Zn/Pd/Au and Pd/Zn/Pd/Au configurations were significanty lower in ρc at extended ageing times than the Pd/Au contacts.
Copper Metallization Manufacturing Issues for Future ICs
Authors: Gutmann Ronald J. , Paul Chow T. , Gill William N. , Kaloyeros Alain E. , Lanford William A. , Murarka Shyam P. 
Published: April 2011

ABSTRACTCopper metallization for on-chip multilevel interconnects is receiving increasing attention for future generations of ICs, with advantages of low line resistance, low interconnect delay, high electromigration resistance and, possibly, overall back-end process simplicity. However, copper introduces a set of processing and manufacturing issues which must be addressed in the research and development phases of the technology. This paper summarizes the most likely processing steps for integrating copper metallization into IC technology and presents the manufacturing issues (materials, unit processing and process integration issues) that need to be addressed.
Selective Copper Cvd on Diamond Surfaces Using Self-Assembled Monolayers
Authors: Potochnik Stephen J. , Hsu David S. Y. , Calvert Jeffrey M. , Pehrsson Pehr E. 
Published: April 2011

ABSTRACTSelective chemical vapor deposition (CVD) of conductive, adherent copper films was achieved on single-crystal and polycrystalline diamond substrates modified with a ligating aminosilane and a Pd-based catalyst. Only isolated copper particles deposited on hydrogenated or aminosilane-coated diamond substrates without Pd. The Pd catalyst enhanced selectivity by a factor of 103 to 104. Copper CVD was performed in a cold-walled chamber at 446-456 K and 8x10-3 Pa using hexafluoroacetylacetonate-Cu-trimethylvinylsilane in H2 (1:1). Surfaces were characterized with x-ray photoelectron spectroscopy (XPS) and scanning electron microscopy (SEM). Patterned Cu features were formed by exposing the aminosilane films to patterned ultraviolet (193 nm) radiation prior to Pd-catalyst addition and Cu CVD.
Deposition of Conductive Titanium Sub-Oxide Films by Reactive Ion-Beam Sputtering
Authors: Grigorov K.G. , Benhocine A.H. , Bouchier D. , Meyer F. 
Published: April 2011

ABSTRACTTitanium monoxide films were deposited on silicon by reactive ion beam sputtering from a Ti target. The film composition was measured in situ by Auger electron spectrometry. It was observed that oxygen content in the deposit does not depend on the substrate temperature, up to 600 °C. Synthesized TiO films had a cubic structure with a lattice parameter of 4.17 Å, which confirmed that the O/Ti concentration ratio in the films was very close to the expected value. The films were found to be conductive, with a resistivity value equal to 170 μΩ cm. They had a yellowish metallic appearence and a very smooth surface. Sequences of annealings at increasing temperatures were performed under ultra-high-vacuum. No AES signal from silicon was observed up to a temperature of 700 °C.
Simulation of Collimated Titanium Nitride Physical Vapor Deposition using EVOLVE
Authors: Toprac Anthony J. , Wang Shi-Qing , Schlueter Jim , Cale Timothy S. 
Published: April 2011

ABSTRACTSimulation of the physical vapor deposition (PVD) of titanium nitride (TiN) in micronscale contacts was performed using EVOLVE, a physically-based model of non-continuum
mass transport. Simulations of uncollimated TiN PVD using a sub-unity sticking coefficient of 0.6 provide accurate model predictions of experimental data. Using this value in simulations of PVD with a 1:1 aspect ratio collimator results in a significant underprediction of titanium nitride deposition in the feature bottom in comparison to the experimental results. This under-prediction was compensated for empirically by adjusting
a “beaming” coefficient to produce good model predictions of the experimental data.
Development of A Silane Rich CVD Tungsten Process
Authors: Tripathi Sanjay , Moghadam Farhad 
Published: April 2011

ABSTRACTThe economics of manufacturing is driving the use of larger wafer sizes. At the same time smaller device geometries place more stringent requirements on film properties. Maintaining tight control of metal film properties in larger reactors presents unique challenges in the development of manufacturing worthy processes. This paper presents the development of a CVD tungsten process that was necessitated by the requirement for stable deposition uniformity with the conversion of wafer sizes from 6“ to 8”. The scaled up version of the 6“ process was rendered obsolete in the 8” tool due to unacceptable drifts in deposition uniformity.Fluorine build up in the reaction chamber from the silane (SiH4) and hydrogen (H2) reduction of tungsten hexafloride (WF6) was identified to be the main cause for the process instability. We discuss how the problem was identified and how the new process was developed. Data on the uniformity of deposited films, collected over several hundred wafers with the old process and the new process show the new process to be superior. Device yield and electrical parameter data show the new process to be at least as good as the previous process.
Focused Ion Beam: Advanced Technique for Device Modification
Authors: Abramo Marsha , Hahn Loren 
Published: April 2011

ABSTRACTFocused ion beam (FIB) technology is used to modify circuits for early-product design debug; it also has the capability to create probe points to underlying metallurgy, allowing device characterization while maintaining full functionality. These techniques provide critical feedback to designers for rapid verification of proposed design changes.Current FIB technology has its limitations because of redeposition of sputtered material; this phenomena may induce vertical electrical shorts and limit the achievable aspect ratio of a milled via to 6:1. Therefore, innovative enhancements are required to provide modification capability on planar chip technology which may utilize up to five levels of metallurgy. The ability to achieve high-aspect-ratio milling is required to access underlying circuitry. Vias with aspect ratios of 10:1 are necessary in some cases.This paper reviews a gas-assisted etching (GAE) process that enhances FIB milling by volatilizing the sputtered material, examines the results obtained from utilizing the GAE process for high-aspect-ratio milling, and discusses selectivity of semiconductor materials (silicon, aluminum, tungsten and silicon dioxide).
The Selectivity of Reactive Ion Etch of Ga0.5LIn0.49P/Gaas
Authors: Wu J.W. , Chan S.H. , Lin K.C. , Chang C.Y. , Chang E.Y. 
Published: April 2011

ABSTRACTThe Ga0.51In0.49p/GaAs system has better desired property (ΔEC >ΔEV) than the conventional AlGaAs/GaAs system for heterojunction bipolar transistor (HBT) application. However, in the fabrication of HBTs, a precise control of the etch of the epilayer is very important. In this study, CH4/H2 and BCl3/SF6 were used for the reactive ion etch of the Ga0.51In0.49P/GaAs. It is found that the etch rate of Ga0.51In0.49P could be higher than that of GaAs with CH4/H2 gas mixture under appropriate etching conditions. While in the case of BCl3/SF6, the etching rate of GaAs could be much higher than that of the Ga0.51In0.49P. By properly using CH4/H2 and BCl3/SF6, the fabrication of Ga0.51In0.49P-based device using reactive ion etch could be easily achieved.
Test of A Diamond-Tungsten Sampling Calorimeter
Authors: Stone R. , Franklin M. , Fujino D. , Gan K. K. , Gilman R. , Han S. , Kagan H. , Kanda S. , Kania D. R. , Kass R. , Kim S. K. , Kumbartski G. , Lee M. H. , Malchow R. , Morozov B. , Palmer W. , Pan L. S. , Rutf P. , Sannes F. , Schnetzer S. , Somalwar S. V. , Sugimoto Y. , Tesarek R. J. , Thomson G. B. , White C. , Zhao S. 
Published: April 2011

ABSTRACTDiamond is suitable for use as an ionizing particle detector for high rate, high radiation, and/or chemically harsh environments. A sampling calorimeter, a detector measuring the total energy of an incident particle, consisting of 20 alternating layers of diamond and tungsten has been constructed and tested. The diamond for the detector layers was grown by chemical vapor deposition with an averaged thickness of 500 μm. The active area of each layer was 3×3 cm2 with ohmic contacts on opposite faces forming a metal-insulator-metal structure. The calorimeter was tested with electrons of energies up to 5.0 GeV. The response of the diamond/tungsten calorimeter was found to be linear as a function of incident energy. A direct comparison of diamond/tungsten and silicon/tungsten calorimeters was made.
Properties of MOS Structure Fabricated on 3C-SiC Grown by Reactive Magnetron Sputtering.
Authors: Turan R. , Wahab Q. , Hultman L. , Willander M. , Sundgren J. -E. 
Published: April 2011

ABSTRACTWe report the fabrication and the characterization of Metal Oxide Semiconductor (MOS) structure fabricated on thermally oxidized 3C-SiC grown by reactive magnetron sputtering. The structure and the composition of the SiO2 layer was studied by cross-sectional transmission electron microscopy (XTEM) Auger electron spectroscopy (AES). Homogeneous stoichiometric SiO2 layers formed with a well-defined interface to the faceted SiC(lll) top surface. Electrical properties of the MOS capacitor have been analyzed by employing the capacitance and conductance techniques. C-V curves shows the accumulation, depletion and deep depletion phases. The capacitance in the inversion regime is not saturated, as usually observed for wide-bandgap materials. The unintentional doping concentration determined from the 1/C2 curve was found to be as low as 2.8 × 1015 cm-3. The density of positive charges in the grown oxide and the interface states have been extracted by using high-frequency C-V and conductance techniques. The interface state density has been found to be in the order of 1011cm2-eV-1.