bluuebunny/crossref_metadata_2025_split huggingface dataset:
The Effect of H2 Dilution on the Stability of a-Si:H based Solar Cells
Authors: Yang Liyou , Chen Liang-Fan 
Published: April 2011

ABSTRACTWe have systematically investigated the effect of H2 dilution on the stability of a-Si:H based solar cells. The results clearly show that the device stability against light soaking improves substantially with increasing H2 dilution until a threshold is reached. Beyond this threshold which depends on the substrate temperature, the stability no longer changes with further increase in H2 dilution. On the other hand, at a given ratio of H2 to the reactant gases, the device stability generally improves with increasing substrate temperature. Multi-step light soaking experiments have shown that devices made with H2 dilution saturate much faster (∼100 hours) under one-sun illumination and exhibit little overshoot effect in the recovery process, in sharp contrast to devices made without H2 dilution. Based on the simple two-component model for defect kinetics, these observations and the fact that the apparent saturation time coincides with the time constant of the “fast” defects strongly suggest that negligible amount of “slow” defects exist in materials made with H2 dilution. While H2 dilution generally suppresses the formation of microstructure giving rise to dihydride bonding and microvoids, the differences in the kinetics of light induced degradation cannot always be traced to obvious differences in these structural properties.
Stability Test Of 4 Ft2 Triple-Junction a-Si Alloy PV Production Modules
Authors: Deng X. , Izu M. , Narasimhan K. L. , Ovshinsky S. R. 
Published: April 2011

ABSTRACTWe report results of stability tests of 4 ft2 triple-junction a-Si alloy photovoltaic (PV) Modules. These Modules were produced in ECD's 2 Megawatt (MW) continuous, roll-to-roll PV Manufacturing line during the early stage of optimization. The stable module efficiency after 600 hours of 1 sun light soaking at approximately 50°C under load, is 8%. This is the highest stable efficiency for large area (≥4 ft2) a-Si alloy PV Modules Made in a production line.
Accurate Light Absorption Profile in Tandem A-SI:H Solar Cells on Textured TCO Substrates
Authors: Tao G. , Makaro Zs. , Zeman M. , Metselaar J.W. 
Published: April 2011

ABSTRACTWhile a-Si:H tandem solar cells deposited on textured TCO substrates have already shown high efficiency and good stability [1], the light absorption profile in such cells is still one of the important quantities to know. An accurate absorption profile is required when we do solar cell analysis, design, and optimization, or when we do computer simulations.With the computer program GENPRO2D [2] which was developed in our laboratory, and was based on the incoherent Multi-rough-interfaces (scattering) Model, we are able to calculate the light absorption profile in a tandem a-Si:H solar cell for different light spectra and different light incident angles, provided that the scattering of light at every interface in the cell is known. In this paper, we will present our calculated results with comparison to the measured results of a real tandem cell.
A New Method for the Derivation of the Output Characteristics of Amorphous Silicon Thin-Film Transistors.
Authors: Mittiga A. , Mariucci L. , Carluccio R. , Pecorai A. , Fortunato G. 
Published: April 2011

ABSTRACTA novel method to derive the output characteristics of a-Si:H thin film transistors from the channel conductance curve is presented. The Method well reproduces the experimental data both in the linear and saturation regimes without using any adjustable parameter. The Method is simple and fast enough to be used in a circuit simulator.
The Kinetics of Removal of Defects in a-Si:H TFTs Made with PECVD Oxide Gate Insulator Material
Authors: Morgan P. N. , Milne W. I. , Deane S. C. , Powell M. J. 
Published: April 2011

ABSTRACTAMorphous silicon thin film transistors may be manufactured using a variety of gate insulator Materials. The sign and magnitude of the fixed charge, Qf, in the gate insulator material determines the as-deposited density of states in the a-Si:H as predicted by the defect pool Model [1]. For the case of PECVD nitride Qf is positive giving rise to a defect peak in the lower part of the bandgap. In thermal oxide, which has small negative Qf the states are in the upper part of the bandgap. Using the technique of low temperature bias stress or high temperature bias anneal it is possible to create further defects in the bandgap on top of those already present, facilitating the study of upper (Dh) and lower (De) gap states. In a previous work we studied the removal kinetics of such defects using TSDR (Thermally Stimulated Defect Removal) in both PECVD nitride and thermal oxide devices [2]. Here we repeat the experiments on thin film transistors made with PECVD helium diluted oxide as the gate insulator Material. PECVD helium diluted oxide is interesting as its Qf May be varied during Manufacture. Thus TFTs with characteristics similar to either thermal oxide or PECVD nitride can be obtained.
The Power Law Dependence of Electroluminescence Intensity on Forward Current in a-Si:H p-i-n Devices
Authors: Wang Keda , Han Daxing , Silver Marvin 
Published: April 2011

ABSTRACTBoth total electroluminescence intensity and spectrum have been measured as a function of applied voltage at various temperatures on p-i-n devices with i-layer thickness from 0.2 μm to 2.0 μm. At constant temperature the luminescence intensity shows a power-law dependence on forward bias current with an exponent, γ. As the temperature increases from 80 K to 300 K, γ decreases from 1.5 to 0.9 in thin (≤ 0.5 μm) samples. Thick, 2.0 μm, samples on the other hand, show γ ≈ 1 over the same temperature range. Each electroluminescence spectrum has been decomposed into two gaussian functions corresponding to the main band and the defect band luminescence, respectively. We find that the integral intensity of the high energy luminescence band versus the current obeys a power-law with exponent γ1, while the integral intensity of the low energy luminescence band versus the current obeys a power-law with exponent γ2· γ1 > γ2 for all samples at all temperatures in these Measurements.
Manufacturing Considerations for VLSI Interconnect Systems
Authors: Thomas Michael E. 
Published: April 2011

ABSTRACTIn the next decade, it is expected that integrated circuits having 5 to 7 levels of metal will be common in VLSI technologies with linear interconnect densities approaching 200 meters/cm2/level. Multilevel interconnect technology needs are presently generating processing and structural issues which will dominate the future manufacturing yield and performance of these integrated circuits. The challenge of meeting these needs will require a concurrent improvement in design and manufacturing simplicity and cleanliness. This presentation will examine the architectural needs of future multilevel metal systems in light of the lithography, materials, and electrical requirements which must be addressed by the interconnect engineer. A comparison of interconnect systems based on different conductor materials will be presented.
Comparative Cu Diffusion Studies in Advanced Metallizations of Cu and Al-Cu Based Thin Films
Authors: Gupta D. 
Published: April 2011

ABSTRACTAvailability of diffusion data is important in the evaluation of the prospect of substituting Cu for Al-Cu metallization for improving electrical and electromigration performance. Measurements have been made of 67Cu radioactive tracer diffusion in Cu, Cu-0.4Zr and several Al-Cu thin films of commonly used compositions. Grain boundary self diffusion in Cu is described by δDb= 1.5xl0-9 exp( — 0.92eV/kT) cm3/ sec. The activation energy for Cu diffusion in Al, Al-l%Cu and Al-0.5Cu-0.15Ti thin films depends on the amount of Cu present and varies in the 0.4 - 1.0 eV range. The measured diffusion parameters in the two alloy systems are compared and contrasted with those available from electromigration studies.
The Stability of TiH2 Used as Diffusion Barrier on SiO2 Substrates
Authors: Murarka Shyam P. , Ko Sen-Hou , Ding Pei-Jun , Lanford William A. 
Published: April 2011

ABSTRACTTiH2 has been considered as a diffusion barrier and adhesion promoter between oxide and Cu. This phase is formed by reaction of Ti with hydrogen during rapid thermal annealings. In this investigation the stability of TiH2 on PECVD and thermal oxides has been studied during Ar anneal at 400 and 500°C. X-ray diffraction, sheet resistance measurements, RBS, and nuclear reaction technique to profile hydrogen have been used in this study. The results indicate that the stability of TiH2 is dependent on the nature of the oxide, for example, the water concentration and the density of the oxide and on the temperature of the anneal. These results will be discussed in view of the applicability of TiH2 which has a low thin film electrical resistivity of about 100 μΩ-cm.
Refractory Metal Encapsulation in Copper Wiring
Authors: Palleau J. , Oberlin J.C. , Braud F. , Torres J. , Mermet J. L. , J Mouche M- , Ermolieff A. , Piaget J. 
Published: April 2011

ABSTRACTThe thermal stability at the Cu / SiO2 interface has been studied as a function of the annealing atmosphere composition. Using either good vacuum conditions or refractory metal encapsulation, no copper diffusion into SiO2 has been found even for thermal treatments at 500°C for l0h. Moreover, a noticeable accumulation of the refractory metal, ( Cr, Ti ), at the Cu / SiO2 interface has been observed. The diffusion phenomena allows the self-aligned formation of a refractory metal barrier layer at the SiO2 surface.
W/Pt and Ti/Pt Based Contacts to Algaas/Gaas Heterojunction Bipolar Transistors
Authors: Kalkur T.S. , Wright P.D. 
Published: April 2011

ABSTRACTTi/Pt and W/pt was used form contacts on hevily doped InAs and InGaAs emitter layers of heterojunction Bipolar transistors (HBTs) . The as deposited contacts were ohmic for Ti/Pt on InAs and W/Pt on InGaAs. The rapid thermal annealing was performed in the temperature range of 300-600 C. The contact characteristics of Ti/Pt and W/Pt were compared with Au/Cr contacts.
Correlation Between the Microstructures and the Electrical Properties of Ni/Au/Te/Au Contacts on n-GaAs
Authors: Lin X. W. , Watté J. , Wuyts K. , Swider W. , Silverans R.E. , Liliental-Weber Z. , Washburn J. 
Published: April 2011

ABSTRACTThe structural evolution of Ni/Au/Te/Au contacts on n-GaAs (001) was examined, in correlation with their electrical properties as a function of rapid thermal annealing in the temperature range 350 - 600°C. It was found that heating at temperatures ≥ 550°C results in the formation of ohmic contacts, while contacts annealed at lower temperatures remain nonohmic. Transmission electron microscopy revealed that heating ≥ 450°C leads to extensive reactions between Ni/Au/Te/Au and GaAs and deep spike formation into the GaAs. The major reaction products were identified as NiAs and β-AuGa. Ga2Te3 grains, growing epitaxially on GaAs, were detected only in 550°C annealed samples. Heating to 600°C caused considerable Ga2Te3 loss. Implications of these results concerning the ohmic contact formation mechanism are discussed.
Ohmic Contacts To p+-GaAs and Al0.26Ga0.74As
Authors: Han W. Y. , Cole M. W. , Casas L. M. , DeAnni A. , Wade M. , Jones K. A. , Lapore A. , Lu Y. , Yang L. W. 
Published: April 2011

ABSTRACTOhmic contacts, with metallization scheme of Pd/Ge/Ti/Pt, were formed on heavily carbon doped GaAs and AlxGa1-xAs. The lowest specific contact resistances were 4.7x10-7 and 8.9x 10-6 Ω-cm2 for the p+-GaAs and Al0.26Ga0.74As. The p+-GaAs and Al0.26Ga0.74As were doped with carbon to 5x1019 and 2x1019 cm-3 respectively. Interfacial reactions and elemental diffusion of the contacts were investigated via transmission electron microscopy and Auger electron spectrometry with depth profiles.
A Proposed Regrowth Mechanism for the Enhancement of Schottky Barrier Height to N-GAAS
Authors: Chen C-P. , Chang Y. A. , Kuech T.F. 
Published: April 2011

ABSTRACTA systematic study of the enhancement of Schottky barriers to n-GaAs diodes has been carried out using the Ni-Al binary system. The diodes, Ni2Al3/n-GaAs, Ni2Al3/Ni/n-GaAs, Ni/Al/Ni/n-GaAs and NiAl/Al/Ni/n-GaAs, have been realized by sputter deposition at a base pressure ∼2xl0-7 Torr. A high Schottky barrier height ranging from 0.95 to 0.98 eV (deduced from current-voltage measurements) was observed for all the annealed contacts except for Ni2Al3/n-GaAs contacts. The enhancement of the Schottky barrier height in all the contacts was attributed to the formation of a high Al content (Al,Ga)As layer at the metal/semiconductor interface. The formation of this (Al,Ga)As layer was explained in terms of a regrowth mechanism. In this mechanism, Ni reacts with GaAs initially at low temperatures, forming NixGaAs. The NixGaAs layer is believed to react with the Ni-Al layer to form the (Al,Ga)As layer when subjected to a high temperature annealing. A (200) dark field XTEM image of the annealed contact was used to demonstrate the existence of this (Al,Ga)As phase.
Substrate Dependence of Electrical Properties of Contacts on p-InP
Authors: Park Moon-Ho , Yeh C.L. , Wang L.C. , Deng F. , Liu Q. Z. , Clawson A.R. , Lau S. S. 
Published: April 2011

ABSTRACTPd and Ni contacts on various p-InP substrates which were grown by liquid-encapsulation Czochralski (LEC) and metal organic chemical vapor deposition (MOCVD) were investigated. Pd contacts on the substrates supplied by one manufacturer were found to be ohmic contacts with a minimum contact resistivity of ∼ 5xl0-5Ω-cm2 for annealing temperature between 420°C and 500°C. However, ohmic behavior was not observed for Pd contacts on other substrates. Hall measurement and double-crystal x-ray diffractometer were used to evaluate the substrates. It was speculated that existence of intrinsic defects in p-InP grown by LEC method may be responsible for the observed ohmic behavior. This defect-assisted tunneling mechanism is potentially usefully for making ohmic contacts on other compound semiconductors.
Current Transport in Cryogenic Processed Metal/InP and GaAs Interfaces
Authors: He L. , Shi Z.Q. , Anderson W.A. 
Published: April 2011

ABSTRACTSchottky contacts to n type InP and GaAs have been made by deposition on substrates cooled to low temperature (LT=77K) in a vacuum close to 10-7 Torr.The Schottky barrier height, ФB, was found to be as high as 0.96eV with Pd/InP and 0.95eV for Au/GaAs. This indicated a significant increase in ФB compared with the room temperature (RT=300K) deposition. For diodes fabricated at room temperature, the reverse saturation current density, JO, decreased sharply with decrease in measuring temperature. For the RT InP diodes, the conduction mechanism was controlled by thermionic emission (TE). For the LT InP diodes, the value of JO was about six orders smaller than for the RT diode at the same temperature. As testing temperature decreased, the barrier height was increased from 0.96 to 1.15eV, with a temperature coefficient of -3.2 x 10-4 eV/K. The forward transport mechanism was controlled by thermionic field emission (TFE). For the GaAs diodes, thermionic emission (TE) dominated in the current transport at room temperature for both RT and LT diodes. At low testing temperature, RT diodes exhibited an excess current component at low forward bias.
Metallizing and Die Attaching to Cvd Diamond
Authors: Iacovangelo CD , DiConza PJ , Jerabek EC , Zarnoch KP 
Published: April 2011

ABSTRACTThe high thermal conductivity of diamond (four times that of copper) and its low dielectric constant (less than alumina or aluminum nitride) makes it a desirable material for electronic substrates. The advent of CVD methods for depositing diamond in large areas at reasonable cost has spurred numerous applications for metallized CVDD. This paper describes several processes developed to provide reliable and stable metallization on CVDD including bond coats, diffusion barriers, vias, and solder die attach. Transition metals were found to provide well-adhered bond coats through carbide formation at the metal/CVDD interface. XPS depth profiles and conductivity measurements of three metallization systems: Ti/Pt/Au, WTi/Au, and Nb/Au after various heat treatments show WTi/Au to be the most stable system. Via filling was accomplished by LPCVD-W and electrolytic Cu for high and low aspect ratio holes respectively. The low thermal expansion coefficient of CVDD, -1.5 ppm/°C, presents a major challenge for reliable die attach of GaAs (5.85 ppm/°C). A novel concept for a compliant interface on CVDD which can overcome this problem will be presented.
Thermal Stability of Ti/Pt/Au Non-Alloyed Ohmic Contacts on InN
Authors: Ren F. , Abernathy C. R. , Pearton S. J. , Wisk P. W. 
Published: April 2011

ABSTRACTExtremely low contact resistance of non-alloyed Ti/Pt/Au metallization on n-type InN is demonstrated. The contacts were annealed at different temperatures up to 420 °C to investigate their thermal stability. A low contact resistivity of 1.8 x 10-7 ohm-cm2 was measured at room temperature using the transmission line method. This was due to the extremely high doping level (5 x 1020 cm-3) in the InN. After 300 °C annealing, the contact resistivity increased to 2.4 x 10-7 ohm-cm2- For 360 °C annealing, the contact morphology showed some degradation, but the contact resistivity was almost the same as at 300 °C. There was serious degradation of the contacts after 420 °C annealing. The morphology became very rough, and the contact and sheet resistances increased by factors of 3-5 times. This degradation is believed due to the decomposition of the InN film. The contact resistivities between n-type epitaxial GaAs and InN were also investigated, and showed values around 10-4 ohm-cm2.
Epitaxial Growth of CoSi2/Si Hetero-Structure by Solid State Interaction of Co/Ti/Si Multilayer
Authors: Li Bing-zong , Wu Wei-Jun , Shao Kai , Gu Zhi-Guang , Jiang Guo-Bao , Huang Wei-Ning , Fang Hua , Sun Zhen , Liu Ping , Zhou Zu-Yao 
Published: April 2011

ABSTRACTA new method of epitaxial growth of CoSi2 film on Si substrate by ternary solid state interaction is investigated. XRD, RBS and TEM show that single-crystalline CoSi2 can be formed on both Si (111) and (100) substrates by using Co/Ti/Si or TiN/Co/Ti/Si multilayer. The evolution of multilayer structure and its resistivity is studied and epitaxy mechanism is discussed. Experimental results indicate strong affinity between Co and Si. During the ternary interaction the epitaxial CoSi2 can be grown directly on Si and its growth may behave as a diffusion controlled process. The thickness of Ti layer and the annealing procedure have important effect on CoSi2 epitaxial growth.
The Effect of Titanium Silicidation on Type II End-of-Range Dislocation Loops
Authors: Herner S.B. , Krishnamoorthy V. , Robinson H.G. , Jones K. S. 
Published: April 2011

ABSTRACTThe shrinkage in type II end-of-range dislocation loops was used to determine the relative flux of vacancies from the silicidation of titanium on silicon (100) wafers. A low temperature anneal (700°C 20 min.) in a forming gas ambient formed the initial silicide (approximately 750 Å thick), and several higher temperature anneals with the silicide intact and etched off followed to study the diffusion of the vacancies. The concentration of vacancies captured by the loops after a 900°C 60 minute post silicidation anneal was approximately 7.8 x 1013 /cm2 while the concentration after a 700°C 60 minute post silicidation anneal was only 9 x 1012 /cm2. Removal of the silicide prior to the high temperature post silicidation anneals resulted in fewer vacancies captured by the loops.
In-Situ Tem Observation of Interfacial Reactions in the Zr/Si System
Authors: Tanaka Htroyuki , Konno Toyohiko J. , Sinclair Robert 
Published: April 2011

ABSTRACTThe interfacial reactions in the Zr/Si system were studied by in-situ cross-section TEM including high resolution mode. The reactions consisted of formation of an amorphous interlayer followed by the nucleation and growth of crystalline ZrSi2- The development of the amorphous layer was found to involve two different stages. The ZrSi2 was also found to grow layer-by-layer into the Si via a ledge mechanism.
Comparison of Cosi2- and Tisi2-Polycide Interconnections Tested by Conventional and High Accelerated Reliability Tests
Authors: Depta Dirk , Hollenbeck Ingo 
Published: April 2011

ABSTRACTBased on 2μm-wide CoSi2-n+- and TiSi2-n+-polycide structures with a l00nm-thick silicide and a standard AlSi-metallization a comparison between conventional and the high accelerated SWEAT-test was carried out. Supported by simulations different parameters (e.g. activation energie EA) were determined by time-to-failure-measurements. Because of comparable results out of both different tests the SWEAT-test will be prefered due to short time-to-test. Also it will be shown that both silicide systems have an about three times higher activation energy for the inducing of EM-based “open”-failures than the tested standard AlSi-metallization. The failure-rate was less than 100 FIT for both polycides but because of process advantages the CoSi2-polycide should be a promissing metallization to improve the reliability of single and/or multilevel-metallization.
Stress Migration in Aluminum Lines in Integrated Circuits
Authors: Okabayashi H. 
Published: April 2011

ABSTRACTThis paper reports on two types of voiding which occur in Al lines in integrated circuits.The first type of voiding occurs in high-temperature processes during chip fabrication, in which the thermal stress is expected to be compressive. Ultrahigh voltage electron microscopy (UHVEM) observations of the voids and voiding process show interrelations between the evolution and morphology of voids and grain-boundaries.The other type of voiding occurs at low temperatures where highly tensile thermal stress develops in Al lines. This type of voiding occurs in accelerated life tests and actual operation. The results of accelerated life tests of intentionally oxygen-contaminated samples are described. Voids observed in low-oxygen samples are mostly large-angle-wedge-shaped and induce essentially no open failures in the early-failure period. In high-oxygen samples, crack-like voids occur, and parallel-slit-like voids also occur. These narrow voids result in high open-failure rates in the early-failure period.
Reliable Metallization and Wet Etch Process for Waveguide Formation on InP/InGaAs Mqw Modulator Structures
Authors: Thirstrup Carsten , Clausen Thomas 
Published: April 2011

ABSTRACTA simple process for making reliable InP/InGaAs multiple quantum well (MQW) modulator waveguide devices optimized with respect to electro-refractive modulation has been developed. The main concern of this study is the surface properties of the InP surface prior to metallization and etching. A new protective surface passivation technique combining vacuum procurement (∼5xl0-7 Torr) to reduce the water content in the native oxides with an in situ rf-sputter deposition of reactive SiOx onto the surface of InP is reported. This procedure provides smooth surfaces and good optical properties of GaInAs/InP based strip-loaded waveguides.
Anisotropy of Aluminum Porous Anodization Process for Vlsi Planar Metallization
Authors: Lazarouk S. , Baranov I. , de Cesare G. , Maiello G. , Proverbio E. , Ferrari A. 
Published: April 2011

ABSTRACTIn this work factors affecting the anisotropy (i.e., difference in vertical and lateral anodization rates) of the aluminum anodization process are investigated. By varying the electrochemical process parameters, a degree of anisotropy of about 0.6 was obtained. The structure of the aluminum porous oxide was determined by a Scanning Electron Microscope. The difference in the anodization conditions for porous aluminum oxide growth along lateral and vertical direction was determined. The developed processing technique was used for forming multilevel VLSI metallization with feature sizes of about 1.2 µm.