bluuebunny/crossref_metadata_2025_split huggingface dataset:
Microstructure and Electrical Characteristics of La1−xSrxMnO3 (0.19≤x≤0.31) Thin Films Prepared by Sputter Techniques
Authors: Heo H. , Lim S.J. , Sung G.Y. , Cho N.-H. 
Published: April 2011

AbstractLa1−x SrxMnO3(0.19≤x≤0.31) thin films were prepared on silicon wafers by sputter techniques. The effect of substrate temperature, chemical composition and post-deposition heat-treatment on the crystalline structure and electrical characteristics of the films was investigated. The films grown at a substrate temperature of 500°C were found to be of the pseudo-tetragonal system (0.97≤a/c≤1) and exhibited a strong tendency of {001} planes to lie parallel to substrate surface. With the increase of x, the electrical resistivity of the films decreased and the transition temperature between the metallic and semiconducting electrical transport behaviors shifted to high temperature. With a magnetic field of 0.18 Tesla, the maximum magneto-resistance ratio (MR%) of La0.69Sr0.31MnO3 polycrystalline thin films was about 390%.
Structural and Dielectric Properties of Pulsed Laser Deposited Pb[Yb1/2Nb1/2]O3-PbTiO3 Thin Films
Authors: Bornand Véronique , Trolier-McKinstry Susan 
Published: April 2011

AbstractHeterostructures consisting of (001) LaAlO3 or (111) SrTiO3 substrates, SrRuO3 metallic oxide bottom electrodes and Pb[Yb1/2Nb1/2]O3-PbTiO3 ferroelectric films were deposited by pulsed laser deposition. The combination of oxidic perovskite-type materials results in highly <001>- or <111>-heteroepitaxial capacitors with well-defined and homogeneous columnar microstructures. Most of the films show room temperature dielectric constant greater than 1500 associated with low dielectric loss (tgδ < 4%) and exhibit saturated hysteresis loops with remanent polarizations up to Pr ∼ 50µC.cm−2. It was found that the ferroelectric characteristics and, in particular, the fatigue phenomena greatly depend on the orientation and crystalline quality of the as-grown films. The stabilization of the <001>-orientation enhances the fatigue resistance and a good endurance up to 1011 cycles has been determined for highly <001>-textured samples. In contrast, fatigue tests performed on strongly <111>-oriented capacitors have revealed poor fatigue performances, with a progressive decrease in the switchable polarization by ac voltage cycling.
Electronic Structure of Tunable Materials MnAl and MnGa
Authors: Chantis A. N. , Demchenko D. O. , Petukhov A. G. , Lambrecht W. R. L. 
Published: April 2011

AbstractWe present first-principle calculations of equilibrium lattice constants, band structures, densities of states and magnetocrystaline anisotropy energy for bulk MnAl and MnGa. The linear-muffin-tin-orbital (LMTO) method has been used within the framework of the local spin density approximation (LSDA). Both the atomic sphere approximation (ASA) and the full-potential (FP) versions of the LMTO method were employed. Calculations of the equilibrium structures were performed both for paramagnetic and ferromagnetic phases of MnAl and MnGa. The results of these calculations indicate that the large tetragonal distortion of the crystal structure is caused by the spin polarization of the electronic subsystem. The magnetocrystalline anisotropy energy per unit cell for MnAl and MnGa is shown to be 0.244 meV and 0.422 meV respectively. This is in good agreement with previous calculations and some experimental data. Magnetic moments, density of states and dependence of magnetocrystalline anisotropy energy on the lattice constant ration c/a are also found to be in good agreement with previous results.
Analysis and Optimization of Thin-Film Ferroelectric Phase Shifters
Authors: Romanofsky R. R. , Keuls F. W. Van , Warner J. D. , Mueller C. H. , Alterovitz S. A. , Miranda F. A. , Qureshi A. H. 
Published: April 2011

AbstractMicrowave phase shifters have been fabricated from (YBa2Cu3 O7-δ or Au)/SrTiO3 and Au/BaxSr1−xTiO3 films on LaAlO3 and MgO substrates. These coupled microstrip devices rival the performance of their semiconductor counterparts at Ku- and K-band frequencies. Typical insertion loss for room temperature ferroelectric phase shifters at K-band is ≈5 dB. An experimental and theoretical investigation of these novel devices explains the role of the ferroelectric film in overall device performance. A roadmap to the development of a 3 dB insertion loss phase shifter that would enable a new type of phased array antenna is discussed.
First Demonstration of a Periodically Loaded Line Phase Shifter Using BST Capacitors
Authors: Nagra Amit S. , Taylor Troy R. , Periaswamy Padmini , Speck James , York Robert A. 
Published: April 2011

AbstractPeriodically loaded line phase shifter circuits using voltage tunable BaSrTiO3 (BST) parallel plate capacitors have been demonstrated at X-band. The first such phase shifter circuit was capable of 100° of phase shift with an insertion loss of 7.6 dB at 10 GHz. Subsequently, the monolithic fabrication procedure was refined resulting in an improved phase shifter circuit with 200° of phase shift and an insertion loss of 6.2 dB at 10 GHz. In addition to promising loss performance (32°/dB) at 10 GHz, the circuits reported here have several desirable features such as moderate control voltages (20 V), room temperature operation, and compatibility with monolithic fabrication techniques.
In-Plane Uniaxial Magnetic Anisotropy of Cobalt Doped Y3Fe5O12 Epitaxial Films
Authors: Dale Darren , Hu G. , Balbarin Vincent , Suzuki Y. 
Published: April 2011

AbstractIn an effort to develop a magnetic biasing layer for potential applications in integrated devices, we have grown thin films of Y3Fe5O12 with increased uniaxial anisotropy by doping with varying Co2+, concentration. To compensate for the charge differential between Co2+ and Fe3+, Ge4+ and Ce4+ are substituted for Fe3+ and y3+, respectively. These garnet films, prepared using pulsed laser deposition on (110) oriented Gd3Ga5O12 substrates, exhibit excellent crystallinity as determined from X-ray diffraction and Rutherford backscattering spectroscopy. The addition of Co2+ in Y3Fe5O12 films enhances the in-plane uniaxial anisotropy over an order of magnitude, depending on composition.
Defect Reduction in Laser Thermal Processing
Authors: Banisaukas Heather , Jones Kevin S. , Talwar Somit , Falk Scott , Downey Dan F. 
Published: April 2011

AbstractLaser thermal processing (LTP) of Si involves laser melting a preamorphized layer in order to activate dopants and create a low resistivity contact. Defects are often observed to form during the recrystallization of the molten layer. This work focuses on varying the implant conditions and the pre-LTP annealing conditions in an effort to reduce these defect concentrations. The effect of very low temperature anneals (VLTA) and varying dose rates on the amorphous/crystalline interface roughness prior to LTP and the defect density after LTP have been investigated. The amorphous layer was created by a 10 keV 1×1015/cm2 Si+ implant. VLTA were conducted in a nitrogen gas furnace at temperatures between 400°C and 450°C for times between 5 minutes and 60 minutes. These anneals were chosen to minimize recrystallization of the amorphous layer by solid phase epitaxial regrowth. Variation in the dose rate from 0.06 mA/cm2 to 0.48 mA/cm2 was achieved by changing the beam current in the ion implanter. High-resolution crosssectional transmission electron microscopy (HR-XTEM) was used to analyze the effect of the VLTA or dose rate on the amorphous/crystalline interface. Results show that the 400°C 60 minute VLTA or the 0.48 mA/cm2 dose rate reduced the roughness of the amorphous/crystalline interface from over 45Å to around 15Å. This reduction in amorphous/crystalline interface roughness prior to laser thermal processing results in a reduction in LTP recrystallization defects by as much as an order of magnitude.
A Physically Based Modeling of Boron TED in Amorphised Si
Authors: Lampin Evelyne , Senez Vincent , Claveriel Alain 
Published: April 2011

AbstractWe have developed a physically based modeling of TED of implanted boron in amorphised Si. The simulation starts with a supersaturation of Si free interstitials located below the amorphous/crystalline interface which, upon annealing, tend to diffuse out or to precipitate in the form of extended defects (clusters, {113}s, dislocation loops). The modeling of the nucleation and growth of these defects is divided into three distinct stages: the nucleation, the “pure growth” and the Ostwald ripening. This system can interact with a surface (characterized by a given recombination velocity for Si interstitials) only after the SPE regrowth is completed. Implementation of this model into a process simulator allows to describe the isothermal and isochronal evolutions of the sizes and of the densities of dislocation loops in agreement with TEM observations. Assuming that boron diffusion is caused by the concomitant time and space variations of the free interstitial supersaturation in the wafer, TED can be accurately predicted for a variety of experimental conditions.
On the Energetics of Extrinsic Defects in Si and their Role in Nonequilibrium Dopant Diffusion
Authors: Claverie Alain , Cristiano Filadelfo , Colombeau Benjamin , Cowern Nicholas 
Published: April 2011

AbstractIn this paper, we discuss the mechanisms by which small clusters evolve through “magic” sizes into {113} defects and then, at sufficiently high dose levels, transform into dislocation loops of two types. This ripening process is mediated by the interchange of free Si(int)s between different extended defects, leading to a decrease of their formation energy. The calculation of the supersaturation of free Si-interstitials in dynamical equilibrium with these defects shows a hierarchy of levels of nonequilibrium diffusion, ranging from supersaturations S of about 106 in the presence of small clusters, through 103 in the presence of {113} defects, to S in the range 100 down to 1 as loops are formed, evolve and finally evaporate. A detailed analysis of defect energetics has been carried out and it is shown that Ostwald ripening is the key concept for understanding and modelling defect interactions during TED of dopants in silicon.
Effect of N+ Ion Implantation and Gox Process on in and B Channel Profile
Authors: Curello G. , Rengarajan R. , Faul J. , Wurzer H. , Amon J. , Gaertner T. , Henke D. , Schmeide M. , Kieslich A. 
Published: April 2011

AbstractIn this work, we report on the effect of different dual gate oxide (DGox) processes on the electrical properties of CMOS devices in deep submicron embedded DRAM (eDRAM) technology. Also discussed, is the effect of N+ Ion Implantation on the diffusion / segregation behaviour of B and In channel dopants. In particular, it will be shown that the N+ dose required to obtain a certain combination of dual gate oxide thickness varies with the gate oxide process. Effects of N+ dose on the In and B channel profiles are studied using SIMS. The impact of “thickness-equivalent” DGox processes on short channel effect (SCE) and carrier mobility is analyzed and tradeoffs for optimization of device performances are discussed.
Junction Depth Reduction of ion Implanted Boron in Silicon Through Fluorine ion Implantation
Authors: Robertson L. S. , Warnes P. N. , Jones K. S. , Earles S. K. , Law M. E. , Downey D. F. , Falk S. , Liu J. 
Published: April 2011

AbstractThe interaction between boron and excess silicon interstitials caused by ion implantation hinders the formation of ultra-shallow, low resistivity junctions. Previous studies have shown that fluorine reduces boron transient enhanced diffusion, however it is unclear whether this observed phenomenon is due to the fluorine interacting with the boron atoms or silicon self-interstitials. Amorphization of a n-type Czochralski wafer was achieved with a 70 keV Si+ implantation at a dose of 1×1015/cm2. The Si+ implant produced a 1500Å deep amorphous layer, which was then implanted with 1.12 keV 1×1015/cm2 B+. The samples were then implanted with a dose of 2×1015/cm2F+ at various energies ranging from 2 keV to 36 keV. Ellipsometry measurements showed no increase in the amorphous layer thickness from either the boron or fluorine implants. The experimental conditions allowed the chemical species effect to be studied independent of the implant damage caused by the fluorine implant. Post-implantation anneals were performed in a tube furnace at 750° C. Secondary ion mass spectrometry was used to monitor the dopant diffusion after annealing. Transmission electron microscopy (TEM) was used to study the end-of-range defect evolution. The addition of fluorine reduces the boron transient enhanced diffusion for all fluorine energies. It was observed that both the magnitude of the boron diffusivity and the concentration gradient of the boron profile vary as a function of fluorine energy.
Vacancy Enhanced Boron Activation during Room Temperature Implantation and Low Temperature Annealing
Authors: Jina Jian-Yue , Rusakova Irene , Li Qinmian , Liu Jiarui , Chu Wei-Kan 
Published: April 2011

AbstractLow temperature annealing combined with pre-damage (or preamorphization) implantation is a very promising method to overcome the activation barrier in ultra-shallow junction formation. We have made a 32 nm p+/n junction with sheet resistance of 290 /sq. using 20 keV 4×1014 Ω/cm2 Si followed by 2 keV 1×1015 at./cm2 B implantation and 10 minutes 550 °C annealing. This paper studies the boron activation mechanism during low temperature annealing. The result shows that placing B profile in the vacancyrich region has much better boron activation than placing B profile in interstitial-rich region or without pre-damage. It also shows that a significant portion of boron is in substitutional positions before annealing. The amount of substitutional boron is correlated to the amount of vacancies (damage) by the pre-damage Si implantation. The result supports our speculation that vacancy enhances boron activation.
Boron Implantation into Silicon Subject to Hydrogen Plasma
Authors: Rangan Sanjay , Horn Mark , Ashok S. 
Published: April 2011

AbstractAlleviating transient enhanced diffusion (TED) is one among several issues that has to be solved to realize deep sub-micron CMOS. In this paper we present the influence of hydrogen plasma on TED of boron, along with deep level transient spectroscopic (DLTS) studies on defect evolution as a function of anneal temperature. The studies reveal that TED monotonically increases as a function of anneal temperature up to 650°C, where maximum TED occurs. Further increase in anneal temperature reveals TED reduction. The DLTS reveals a corresponding increase in defect density up to 650°C and then decreases when annealed at 850°C for the same amount of time.
Effect of Nitrogen Implants on Boron Transient Enhanced Diffusion
Authors: Dokumaci Omer , Ronsheim Paul , Hegde Suri , Chidambarrao Dureseti , Shaik-Adam Lahir , Law Mark E. 
Published: April 2011

AbstractThe effect of nitrogen implants on boron transient enhanced diffusion was studied for nitrogen-only, boron-only, and boron plus nitrogen implants. A boron buried layer was used as a detector for interstitial supersaturation in the samples. Boron dose ranged from 1×1014 to 1×1015 cm−2 and N2+ dose from 5×1013 and 5×1014 cm−2. The energies were chosen such that the location of the nitrogen and boron peaks matched. After the implants, RTA and low temperature furnace anneals were carried out. The diffusivity enhancements were extracted from the buried layer profiles by simulation. Nitrogen-only implants were found to cause significant enhanced diffusion on the buried boron layer. For lower doses, the enhancement of the nitrogen implant is about half as that of boron whereas the enhancements are equal at higher doses. Nitrogen coimplant with boron increases the transient enhanced diffusion of boron at low boron doses, which implies that nitrogen does not act as a strong sink for excess interstitials unlike carbon. At high boron doses, nitrogen co-implant does not significantly change boron diffusion. Sheet resistance measurements indicate that low nitrogen doses do not affect the activation of boron whereas high nitrogen doses either reduce the activation of boron or the mobility of the holes.
Transient Enhanced Diffusion of Arsenic by Self-Implantation —The role of As-I clusters—
Authors: Kim Ryangsu , Aoki Takenori , Furuta Yoshikazu , Kobyashi Hiroyuki , Xia Jianxin , Saito Tomoya , Kamakura Yoshinari , Taniguchi Kenji 
Published: April 2011

AbstractTransient enhanced diffusion of implanted arsenic in silicon with/without additional self-implantation has been investigated. The experimental results show the suppression of As diffusion with Si self-implantation during initial stage of annealing in contrast to the prediction of conventional models. The results suggest that the arsenic and self-interstitial atoms might form immobile clusters during Si implantation or initial stage of annealing. After the clusters dissolve for further annealing, the transient enhanced diffusion of As increases with silicon implantation dose as expected from the “+1” model. These results clarify that interstitials/ As-I clusters play a major role in transient arsenic diffusion.
The Structure of Plasma-Deposited and Annealed Pseudo-Binary ZrO2-SiO2 Alloys
Authors: Rayner G. , Therrien R. , Lucovsky G. 
Published: April 2011

ABSTRACTThe internal structures of various (ZrO2)x(SiO2)1-x alloys (x ≤ 0.5) were investigated. A remote plasma enhanced-metal organic chemical vapor deposition (RPEMOCVD) process was used to deposit films with varying alloy composition on Si(100) substrates. This study indicates that for the glassy silicate phase, g-ZrSiO4, a glass transition temperature, Tg, exists between 800°C and 900°C at which phase separation into the end-member components, SiO2 and ZrO2, occurs.
Physical and Electrical Properties of Yttrium Silicate Thin Films
Authors: Chambers James J. , Parsons Gregory N. 
Published: April 2011

ABSTRACTThis article reports on the physical and electrical properties of yttrium silicate, which is a possible high-k replacement for the SiO2 gate dielectric in CMOS devices. The yttrium silicate (Y-O-Si) films are formed by sputtering yttrium onto clean silicon, annealing in vacuum to form yttrium silicide and then oxidizing in N2O to form the silicate. Shifts in the Y 3d, Si 2p and O 1s photoelectron spectra with respect to Y2O3 and SiO2 indicate that the films are fully oxidized yttrium silicate. FTIR results that reveal a Si-O stretching mode at 950 cm−1 and Y-O stretching modes in the far-IR are consistent with XPS. XPS and FTIR results are in accordance with the donation of electron density from the yttrium to the Si-O bond in the silicate. The yttrium silicate films contain a fixed charge density of ∼9×1010 cm−2 negative charges as calculated from measured C-V behavior. The properties of ultra-thin yttrium silicate films with an equivalent silicon dioxide thickness (electrical) of ∼1.0 nm will be discussed elsewhere.
Electrical Characteristics of TaOxNy for High-k MOS Gate Dielectric Applications
Authors: Im Kiju , Jung Hyungsuk , Jeon Sanghun , Yang Dooyoung , Hwang Hyunsang 
Published: April 2011

ABSTRACTIn this paper, we report a process for the preparation of high quality amorphous tantalum oxynitride (TaOxNy) via ammonia annealing of Ta2O5 followed by wet reoxidation for use in gate dielectric applications. Compared with tantalum oxide(Ta2O5), a significant improvement in the dielectric constant was obtained by the ammonia treatment followed by light reoxidation in a wet ambient. We confirmed nitrogen incorporation in the tantalum oxynitride (TaOxNy) by Auger Electron Spectroscopy. By optimizing the nitridation and reoxidation process, we obtained an equivalent oxide thickness of less than 1.6nm and a leakage current of less than 10mA/cm2 at -1.5V. Compared with NH3 nitridation, nitridation of Ta2O5 in ND3 improve charge trapping and charge-to-breakdown characteristics of tantalum oxynitride.
Ultra-thin Gate Oxide Prepared by Nitridation in ND3 for MOS Device Applications
Authors: Kwon Hyungshin , Hwang Hyunsang 
Published: April 2011

ABSTRACTThe electrical and reliability characteristics of ultra-thin gate oxide, annealed in ND3 gas, have been investigated. Compared with a control oxide, which had been annealed in NH3, the ND3-nitrided oxide exhibits a significant reduction in charge trapping and interface state generation. The improvement of electrical and reliability characteristics can be explained by the strong Si-D bond at the Si/SiO2 interface. This nitridation process of gate dielectric using ND3 has considerable potential for future ultra large scaled integration (ULSI) device applications.
Zr Oxide Based Gate Dielectrics with Equivalent SiO2 Thickness of Less than 1.0 nm and Device Integration with Pt Gate Electrode
Authors: Ma Yanjun , Ono Yoshi 
Published: April 2011

ABSTRACTZrO2 films are investigated as an alternative to SiO2 gate dielectric below 1.5nm. A maximum accumulation capacitance ∼35 fF/μm2 with a leakage current of less than 0.1 A/cm2 has been achieved for a 3 nm Zr-O film, suggesting that ZrO2 can be scaled to below an equivalent oxide thickness of 0.5 nm. Al and Si doping is also investigated to reduce leakage currents and to increase the crystallization temperature of the film. Submicron MOSFETs with TiN or Pt gate electrodes have been fabricated with these gate dielectrics with excellent characteristics, demonstrating the feasibility of CMOS process integration. In particular, Pt damascene gate PMOS is shown to have the proper threshold voltage for dual metal gate CMOS application.
Low-Oxygen Nitride Layers Produced by UHV Ammonia Nitridation of Silicon
Authors: Shriver Mark A. , Higman T.K. , Campbell S.A. , Taylor Charles J. , Roberts Jeffrey 
Published: April 2011

ABSTRACTIf chemically vapor deposited high permittivity materials such as TiO2 and Ta2O5 are to gain wide acceptance as alternatives to SiO2 gates in silicon MOSFETs, the interface between the deposited high-k material and the silicon must be abrupt and have a low density of electrically active defects. Unfortunately, the process for depositing these materials often produces an unacceptably thick, low-permittivity amorphous layer at the interface, which reduces the effectiveness of the high-k material and often contains unacceptably large numbers of charge states. One way to prevent this layer from forming is to deliberately introduce a very thin layer of Si3N4 to act as a diffusion barrier prior to deposition of the high-k material. Previous work has shown nitrides to have high concentrations of traps and interface states, but these films also had considerable oxygen contamination, particularly at the nitride-silicon interface. In this paper, we show that direct thermal nitridation of the silicon surface in ammonia can provide a low interface state density surface that is also an excellent diffusion barrier. A key feature of this process is the various techniques needed to obtain very low oxygen incorporation in the Si3N4. Even at the Si3N4-Si interface, the oxygen content was near the detection limits (0.5%) of Auger Electron Spectroscopy (AES). The nitride films were grown in a range of temperatures that resulted in self-limited thicknesses from a few monolayers to a few nanometers. These films were then characterized by Auger, Time-of-Flight SIMS, and in the case of the thicker films, capacitance-voltage techniques on both n- and p-type silicon substrates. The data shows very low levels of oxygen contamination in the nitride films and low interface state densities in capacitors fabricated from this material.