bluuebunny/crossref_metadata_2025_split huggingface dataset:
Properties of Large Grain-Size poly-Si Films by Catalytic Chemical Sputtering
Authors: Masuda Atsushi , Kamesaki Koji , Izumi Akira , Matsumura Hideki 
Published: April 2011

ABSTRACTLarge grain-size polycrystalline Si (poly-Si) films are obtained on glass substrate by newly developed catalytic chemical sputtering method at low temperatures around 400 C. Si films are also epitaxially grown on (100) single-crystalline Si substrates. In the method Si films are deposited by the chemical transport of SiH4 species generated by the reaction between solid Si target and catalytically generated H atoms. Efficient deposition is realized using the remarkable difference in the etch rate depending on Si target temperatures. That is, SiH4 species are efficiently generated on cooled Si target by atomic-H etching and deposited on substrates with suppressed etching phenomena by heating. Full-width at half maximum of transverse-optical Raman signals originating from crystalline phase for the obtained poly-Si films is narrower than that for poly-Si prepared by excimer-laser annealing. It was noticeable that the grain size exceeds 1 m for the films with a thickness of about 1 m. Growth mode of poly-Si films especially in the initial stage is remarkably changed with a difference in the substrate material. It was found that formation of seed layer enhances the growth of poly-Si films on glass substrate.
Phase Diagrams for the Optimization of rf Plasma Enhanced Chemical Vapor Deposition of a-Si:H: Variations in Plasma Power and Substrate Temperature
Authors: Ferlauto Andre S. , Koval Randy J. , Wronski Christopher R. , Collins Robert W. 
Published: April 2011

ABSTRACTReal time spectroscopic ellipsometry (RTSE) has been applied to characterize surface roughening transitions during the growth of undoped hydrogenated silicon (Si:H) thin films by rf plasma-enhanced chemical vapor deposition (PECVD). In particular, the amorphous–to–amorphous surface roughening transition [→] and the amorphous–to–(mixed-phase-microcrystalline) roughening transition [a→(a+µc)] observed during Si:H growth have been studied under different PECVD conditions of hydrogen dilution ratio R=[H2]/[SiH4], rf plasma power P, and substrate temperature T. For Si:H growth on crystalline Si substrates under the different conditions, phase diagrams have been constructed by plotting the bulk film thicknesses at which these transitions occur as a function of R. The effects of the substrate (c-Si wafers versus amorphous Si:H films) on the a→(a+µc) transition of the phase diagram are also explored. The results provide deeper insights into recent attempts to improve the material properties and solar cell performance for a-Si:H i-layers prepared by rf PECVD at higher rates.
Cluster-less Plasma CVD Reactor and Its Application to a-Si:H Film Deposition
Authors: Shiratani Masaharu , Koga Kazunori , Watanabe Yukio 
Published: April 2011

ABSTRACTEven under the conventional device-quality discharge conditions, large amount of clusters are found to exist in silane radio frequency (RF) discharges. The size and density of clusters near the substrate on the grounded electrode are 2 nm and 1011 cm-3, respectively. In order to prevent such clusters from depositing on hydrogenated amorphous silicon (a-Si:H) films, we have developed a cluster-less plasma CVD reactor which can significantly suppress cluster amount by using gas viscous and thermophoretic forces exerted on clusters, and by reducing gas stagnation region. Using the reactor, we have demonstrated deposition of ultra high quality a-Si:H films which have a significantly less concentration of Si-H2 bonds compared to conventional device-quality films.
A Novel Back-Reflecting UV-Assisted Metal-Induced Crystallization of Silicon on Glass
Authors: Rezaee Leila , Mohajerzadeh Shamsoddin , Khakifirooz Ali , Haji Saber , Soleimani Ebrahim Asl 
Published: April 2011

ABSTRACTA novel method of UV-assisted metal-induced-crystallization is introduced to grow polysilicon films on ordinary glass at temperatures as low as 400°C. Annealing is accomplished in the presence of an ultra-violet exposure, leading to high crystallinity of the silicon film as confirmed by XRD, TEM and SEM analyses. A back-reflecting chromium layer is incorporated to further trap UV photons and enhance their absorption in the silicon film. This results in a significant increase in the crystallization rate as studied by XRD spectroscopy. A growth rate of 2 µm/hr is observed at 400 °C, when employing this method for lateral crystallization. Thin-film transistors fabricated using the proposed UV-assisted MILC show a threshold voltage of 1V and hole mobility of about 50 cm2/V.s.
Large Red Shift of PL Peak Energy in High Growth Rate a-Si:H Prepared by Hot-Wire CVD
Authors: Han Daxing , Yue Guozhen , Weinberg-Wolf Jennifer , Owens Jessica M. , Xu Yueqin , Wang Qi 
Published: April 2011

ABSTRACTWe characterized the electronic states and microstructure of high-growth-rate a-Si:H films by employing photoluminescence (PL) and Raman spectroscopies. The growth rate was from 50 to 115 Å/s compared to the standard rate of less than 10 Å/s. For the high-growth-rate a-Si:H films, we observed typical a-Si:H features in Raman but new features in PL. The new PL features are: a) the PL peak energy is as low as ∼1.15 eV compared to the standard ∼1.4 eV at 80 K; and b) the total intensity is more than one order of magnitude higher then the standard. We suggest that the nano-scale microstructure may be responsible for the anomalous PL features.
Stress Induced Lateral Concentration Profiles in SiGe Layers Grown on Si(001) Non-Planar Substrates
Authors: Eshed Anat , Beserman Robert , Dettmer Klauss 
Published: April 2011

ABSTRACTIn this paper we report lateral variation of Si and Ge concentration profiles measured in SiGe layers grown on mesa shaped Si(001) substrates. Si(001) substrate was patterned using conventional lithography process in forms of mesa with two crystal planes: (001) top plane and the etched (111) side plane. 50 nm thick Si0.7Ge0.3 strained epitaxial layer was grown using Molecular Beam Epitaxy (MBE), on top of the substrate. Thickness on the center of both crystal planes agrees with the expected values. Lateral image of composition profiles has been obtained from Micro Raman spectra taken at various locations on the mesa. Lower concentration of Ge was found at the vicinity of the edges of the (001) planes relative to the centers. We introduce a diffusion model using stress enhanced activation energy to explain our data, taking into account stress profiles along the mesas, by modifying the activation energy for planar diffusion model. The planar diffusion length was used as a fitting parameter in the model, with good agreement to known values from the literature.
Microscopic Analysis of Residuals on Polycrystalline CdTe Following Wet CdCl2 Treatment
Authors: Gessert Timothy A. , Romero Manuel J. , Perkins Craig L. , Asher Sally E. , Matson Rick , Moutinho Helio , Rose Doug 
Published: April 2011

ABSTRACTIn this study we report on the spatial distribution and composition of residuals on the CdTe surface following a typical wet CdCl2 treatment, and the effect that our ion-beam milling has on this residual-coated surface. Results show that residuals are spatially discrete, located primarily along grain boundaries, and are likely a cadmium oxychloride. Results also show that the residuals may penetrate deep into the CdTe surface such that typical ion-beam milling procedures do not produce complete residual removal.
CIGS2 Thin Film Solar Cells on Stainless Steel Foil
Authors: Dhere Neelkanth G. , Ghongadi Shantinath R. 
Published: April 2011

ABSTRACTCuIn1−xGaxS2 (CIGS2) thin-film solar cells are of interest for space power applications because of the near optimum bandgap for AM0 solar radiation in space. CuIn1−xGaxSe2−ySy (CIGS) and CIGS2 solar cells are expected to be superior to Si and GaAs solar cells for the space missions especially in terms of the performance at the end of low earth orbit (LEO) mission. Ultra-lightweight thin-film solar cells deposited on flexible stainless steel (SS) foils have a potential for achieving high specific power.Magnetron-sputter-deposition parameters of molybdenum back-contact layer were optimized so as to minimize residual stress. Cu-rich Cu-Ga/In layers were sputter-deposited on unheated Mo-coated SS foils from CuGa(22%) and In targets. Well-adherent, large (3 μm), compact-grain Cu-rich CIGS2 films were obtained by sulfurization in a Ar:H2S 1:0.04 mixture and argon flow rate of 650 sccm, at the maximum temperature of 475° C for 60 minutes with intermediate 30 minute annealing step at 120° C. p-type CIGS2 thin films were obtained by etching away the Cu- rich layer segregated at the surface in a dilute KCN solution. XRD analysis of a CIGS2 film on SS foil revealed growth of chalcopyrite CIGS2 phase having ao= 5.519 Å and co= 11.125 Å and {112} preferred orientation. Positive SIMS depth profile of CIGS2 film showed gallium concentration increasing toward the back contact.Solar cells were completed by deposition of CdS heterojunction partner layer by chemical bath deposition, transparent-conducting ZnO/ZnO:Al window bilayer by RF sputtering, and vacuum deposition of Ni/Al contact fingers through metal mask. PV parameters of a CIGS2 solar cell on SS flexible foil measured under AM 0 conditions at the NASA GRC were: Voc = 802.9 mV, Jsc = 25.07 mA/cm2, FF = 60.06%, and η = 8.84%. For this cell, AM 1.5 PV parameters measured at NREL were: Voc = 788 mV, Jsc = 19.78 mA/cm2, FF = 59.44%, η = 9.26%. Quantum efficiency curve showed a sharp QE cutoff equivalent to CIGS2 bandgap of ∼1.50 eV, fairly close to the optimum value for efficient AM0 PV conversion in the space.
Alloying and selenization of Cu-In stacked layers evaporated onto large areas
Authors: Caballero Raquel , Guillén Cecilia , Bayón Rocío 
Published: April 2011

ABSTRACTIn this work, Cu and In thin films, as precursors for CuInSe2 (CIS) formation, have been deposited on glass substrate up to 30 × 30 cm2 area using an electron beam evaporator in sequential processes. In order to obtain a similar global composition, three types of sequential processes of evaporation: A) Cu/In/Cu/In, B) Cu/In/Cu/In/Cu/In and C) In/Cu/In/Cu have been tested. As-grown thin films were studied at room temperature and after 120° C annealing. XRD analysis of these films showed mainly the CuIn2−x (0≤ × ≤ 1) phase at room temperature, and Cu11In9 after annealing at 120° C. After alloying, the films were selenized at temperature between 250° and 400° C in vacuum using elemental selenium vapour. XRD of the selenized thin films corresponding to In/Cu/In/Cu sequence and previously annealing at 120° C, showed the major presence of the polycrystalline chalcopyrite structure CuInSe2 with preferential orientation (112) plane at temperature as low as 250° C. From SEM studies and profilometer measurements a decrease in the mean roughness could be observed after annealing at 120° C. In contrast the resistivity of the films increased.
Improvement in Diffusion Length Estimation using the Photocurrent-Capacitance Method in CuInSe2-based Cells
Authors: Champness Clifford H. 
Published: April 2011

ABSTRACTThe experimental technique in the photocurrent-capacitance method of estimating minority diffusion lengths, as applied to CuInSe2-based photovoltaic cells, has been improved, principally by replacing the earlier chopped light and monochromator technique by one employing a steady strong stable light source and a long pass optical filter. The filter requires an absorption edge at an appropriate wavelength to provide the penetrating light at sufficient intensity, which has been found to be 1.1 μm for CuInSe2 cells and 1.0 μ for Cu(In,Ga)Se2 cells. In addition, the parallel capacitance is determined with reverse bias under the same illumination as that during the photocurrent measurements and at a suitable frequency, such as 10 kHz. With these changes, the technique has been found to be more tolerant to cell imperfections and reproducible estimates of diffusion length have been obtained on CuInSe2 and Cu(In,Ga)Se2 cells.
Photoelectrochemical Study of State of Art Copper Indium Gallium Diselenide Thin Films
Authors: Clolus E. , Galtayries A. , Canava B. , Guillemoles J. F. , Lincot D. 
Published: April 2011

ABSTRACTState of the art CIGS thin films have been studied by means of the semiconductorelectrolyte junction. They appear as chemically robust allowing to use aggressive electrolyte compositions as for instance more acidic pH, down to 0 in sulfuric acid environment. In these electrolytes, reliable capacitance and photo-current related characterization techniques have been used. It has been shown that a short treatment in a gold (III) solution can facilitate the characterizations, and stabilize the surface composition. These results tend towards settling a standardized electrochemical testing procedure for CIGS layers
High Permittivity Oxide Gate Stacks on Silicon Incorporating UHV Silicon Nitride Interfacial Layers
Authors: Shriver Mark A. , Gabrys Ann M. , Higman T. K. , Campbell S. A. 
Published: April 2011

ABSTRACTCurrent high permittivity material deposition techniques produce a low permittivity oxide interfacial layer consequently increasing the equivalent oxide thickness. This interfacial oxide layer can be prevented by initially growing a thin nitride layer to act as a diffusion barrier. The interfacial nitride layer must also have low interface state densities comparable to state-of-the-art SiO2 insulators in order to be suitable for MOSFETs. The nitride layer used in this study was formed by thermal nitridation in a UHV system, with the subsequent high permittivity deposition done in an adjoining system. After forming capacitors from these films, capacitance vs. voltage (C-V) techniques were used to determine the interface state density and equivalent oxide thickness of the films. Gate stack films were produced on Si(100) and Si(111) and the results are compared. Gate stacks on Si(100) show a slight increase in stretchout in the high frequency C-V curves for both n-type and p-type samples. Initial data suggests that Si(111) has a lower interface state density than the Si(100) gate stacks. This may be attributed to the Si3N4layer on Si(111) being epitaxial nitride.
Development of Polycide Application and Control of Process Conditions on DCS Based WSix
Authors: Park Young-Kyou , Won Jaihyung , Park Ju-Hwan , Park Jung-Ho 
Published: April 2011

ABSTRACTDichlorosilane based CVD WSix is deposited by the reaction of tungsten fluoride (WF6) and dichlorosilane (SiH2Cl2; DCS). The reaction is thermodynamically favorable and results in WSix film with less fluorine (F) concentration than monosilane (SiH4; MS) based WSix. DCS based WSix shows less expansion of gate oxide and better step coverage than monosilane based WSix. Due to its DCS based stable film stoichiometry, WSix has low resistivity and therefore has been widely applied in ULSI memory devices. However, DCS is a source of chlorine, which is a major impurity. This means special considerations have to be made when using DCS based WSix in comparison with MS based WSix. This work provides evaluation and control of chlorine behaviors in DCS based WSix film.
CoSi2 formation using a Ti capping layer - The influence of processing conditions on CoSi2 nucleation.
Authors: Detavernier C. , Van Meirhaeghe R.L. , Maex K. 
Published: April 2011

ABSTRACTA reactive Ti capping layer is needed to getter oxygen contamination and to make the cobalt silicidation reaction a more robust process. However, the presence of a Ti capping layer induces two other effects (in addition to the beneficial gettering of oxygen impurities): the formation temperature of CoSi2 is increased and the CoSi2 layer has a strong (220) preferential orientation. Because of the current technological importance of the Ti/Co/Si system, we have made a detailed investigation of the influence of several process parameters (annealing temperature, selective etching, layer thickness) on the nucleation of CoSi2 in the Ti/Co/Si system. Moreover, it is shown that the addition of Ni (i.e. a Ti/Co/Ni/Si or Ti/Ni/Co/Si structure) causes a decrease of the CoSi2 nucleation temperature.
Stress evolution in a Ti/Al(Si,Cu) dual layer during annealing
Authors: Bostrom Ola , Gergaud Patrice , Thomas Olivier , Boivin Philippe 
Published: April 2011

ABSTRACTMechanical stress and stress evolution in interconnections may cause reliability problems in IC circuits. It is thus of great importance to understand the origin of this stress.In this paper, the stress evolution during the solid state reaction between blanket titanium and aluminum films has been studied by in-situ substrate curvature measurements. Whereas the formation of TiAl3 is expected to induce large tensile stress because of a global volume decrease of 6-8%, curvature measurements of titanium/aluminum dual layers during annealing at 450°C suggests the formation of a compressive compound.The evolution of the average force per unit width of the layer during the solid state reaction is interpreted on the basis of a phenomenological model used to describe stress evolution during silicide formation.
Study of the Yielding and Strain Hardening Behavior of a Copper Thin Film on a Silicon Substrate Using Microbeam Bending
Authors: Florando Jeffrey N. , Nix William D. 
Published: April 2011

ABSTRACTRecently a new microbeam bending technique utilizing triangular beams was introduced. For this geometry, the film on top of the beam deforms uniformly when the beams are deflected, unlike the standard rectangular geometry in which the bending is concentrated at the support. The yielding behavior of the film can be modeled using average stress-strain equations to predict the stress-strain relation for the film while attached to its substrate. This model has also been used to show that the gradint of stress and strain through the thickness of the film, which occurs during beam bending, does not obscure the measurement of the yield stress in our analysis.Utilizing this technique, the yielding and strain hardening behavior of bare Cu thin films has been investigated. The Cu film was thermally cycled from room temperature to 500 °C, and from room temperature to –196°C. The film was tested after each cycle. The thermal cycles were performed to examine the effect of thermal processing on the stress-strain behavior of the film.
Bonding, Splitting and Thinning by Porous Si in ELTRAN®; SOI-Epi Wafer™
Authors: Yamagata Kenji , Yonehara Takao 
Published: April 2011

ABSTRACTELTRAN is a unique technique to produce the SOI wafers using a porous Si material in semiconductor process. In ELTRAN process, it is required to form the porous Si layer on entire wafer surface uniformly, stably and mass productively without contaminations. In this investigation, we have carried out the simulation of current density distribution to unify the porous layer thickness by finite element method. Canon designed and completed an automatic anodization apparatus. As a result, we could produce the 8 and 6 inches porous Si wafers and ELTRAN SOI wafers stably. And we also developed successfully 300mm ELTRAN SOI wafers with excellent SOI film thickness uniformity.
Transfer and handling of thin semiconductor materials by a combination of wafer bonding and controlled crack propagation
Authors: Bagdahn J. , Katzer D. , Petzold M. , Wiemer M. , Alexe M. , Dragoi V. , Goesele U. 
Published: April 2011

ABSTRACTDirect waferbonding is an appropriate technology to join two or more wafers of the same or of different materials. Waferbonding can be used to stiffen thin wafers during fabrication. However, conventional fabrication processes lead to an increase of the bond strength, which inhibits the required de-bonding. The propagation of cracks, which is based on a subcritical crack growth in the bonded interface, was used to cleave the bonded wafers. The subcritical crack growth is limited to the bonded interface, since the adjacent bulk semiconductor materials are inherently resistant to subcritical crack growth. The process allows the separation of Si-Si and Si-GaAs wafers after annealing. Wafer-bonded SOI wafers can also be separated with this technology even if they were annealed at 1100°C. The first examples for wafer stiffening during fabrication and wafer transfer using the developed approach will be presented.
Single-Axis Projection Scheme for Conducting Sequential Lateral Solidifica-tion of Si Films for Large-Area Electronics
Authors: Limanov Alexander , Borisov Vladimir 
Published: April 2011

AbstractThis paper deals with some results of research in SLS performed in the excimer laser laboratory of TRINITI research institute, Russia, where different types of excimer lasers have been developed and manufactured. The research used a new simple SLS approach based on single-axis (i.e., cylinder) projection optics. The method employs a long single melting line extended many centimeters in length. The line is formed by projection through a single slit in a bulk metal mask. Some aspects of the efficiency, potential, and technical challenge of the method are discussed. This method is particularly useful with low pulse energy and high frequency excimer lasers, and one of the most efficient ways of providing directionally crystallized Si films over a large area. Several types of excimer lasers were tested for the SLS technique. It was found that among various parameters, pulse duration is a more important one, e.g., an increase in pulse duration from 25 to 150 ns results in enlargement of lateral growth distance by about three times.
Electrical Properties of Srta2O6 Thin Films Deposited by Plasma Enhanced Atomic Layer Deposition (Peald)
Authors: Lee Won-Jae , Shin Chang-Ho , You In-Kyu , Yang Il-Suk , Ryu Sang-Ouk , Yu Byoung-Gon , Cho Kyoung-Ik , Yoon Soon-Gil , Lee Chun-Su 
Published: April 2011

AbstractThe SrTa2O6 (STO) thin films were prepared by plasma enhanced atomic layer deposition (PEALD) with alternating supply of reactant sources, Sr[Ta(C2H5O)5(C4H10NO)]2 {Strontium bis-[tantalum penta-ethoxide dimethyllaminoethoxide]; Sr(Ta(OEt)5▪dmae)2} and O2plasma. It was observed that the uniform and conformal STO thin films were successfully deposited using PEALD and the film thickness per cycle was saturated at about 0.8 nm at 300°C. Electrical properties of SrTa2O6 (STO) thin films prepared on Pt/SiO2/Si substrates with annealing temperatures have been investigated. While the grain size and dielectric constant of STO films increased with increasing annealing temperature, the leakage current characteristics of STO films slightly deteriorated. The leakage current density of a 40nm-STO film was about 5×10−8A/cm2 at 3V.
Electron Transmission Through Modified Schottky Barriers
Authors: Jensen Kevin L. 
Published: April 2011

AbstractThe effects of a Coulomb-like potential in the Schottky barrier existing between a material-diamond interface is analyzed. The inclusion is intended to mimic the effects of an ionized trap within the barrier, and therefore to account for charge injection into the conduction band of diamond via a Poole-Frenkel transport mechanism. The present treatment is to provide a qualitative account of the increase in current density near the inclusion, which can be substantial. The model is first reduced to an analytically tractable one-dimensional tunneling problem addressable by an Airy Function approach in order to investigate the nature of the effect. A more comprehensive numerical approach is then applied. Finally, statistical arguments are used to estimate emission site densities using the results of the aforementioned analysis.