bluuebunny/crossref_metadata_2025_split huggingface dataset:
Interaction of Cu and CoSi2
Authors: Shepard C. L. , Lanford W. A. , Shy Y-T. , Murarka S. 
Published: March 2011

ABSTRACTInteraction of thin film Cu and CoSi2 has been studied using Rutherford backscattering spectroscopy and sheet resistance measurements. For temperatures ≤ 600° C. , no measurable diffusion of Cu into CoSi2 is observed.
Growth and Characterization of Epitaxial CoSi2-Contacts
Authors: Adamski C. , Meiser S. , Uffmann D. , Niewöhner L. , Schäffer C. 
Published: March 2011

ABSTRACTThe growth of epitaxial CoSi2 by means of SPE on heavily ion implanted Si(111) was investigated with LEED, RBS and TEM. After silicide formation, the dopant distribution in silicide and silicon was determined by means of SIMS. In a self-aligned process epitaxial CoSi2/Si p+ contacts have been produced. The specific contact resistance was found to be lower than for polycrystalline CoSi2 contacts.
Structure of the Ti-Single Crystal Si Interface
Authors: Ogawa S. , Kouzaki T. , Yoshida T. , Sinclair R. 
Published: March 2011

ABSTRACTThe Ti-single crystal Si interfaces, before and after annealing in argon, were examined by cross section high resolution transmission electron microscopy (HRTEM) combined for the first time with 2nmΦ probe for energy dispersive spectrometry (EDS). HRTEM shows that there is amorphous alloy formation at the Ti-Si interface. The thickness of the reacted layer is ∼1.7nm for single crystal Si, independent of doping level and impurity species such as As and B, and is ∼2.5nm for back sputter-amorphized Si. After annealing at 430°C for 30min, the thickness of the amorphous alloy increases up to ∼11.5nm. High spatial resolution EDS microanalysis has been obtained. The results show that reliable compositions can be deduced at this level since some of the layers are only about 2nm thick. The amorphous alloy formed at the deposition step was found to be Ti55Si45. After annealing, the composition across the amorphous layer varied from about 70%Si near the substrate to about 30%S1 close to the Ti interface. The substrate interface is atomically flat. Interpretation of the behavior in terms of the metastable Ti-Si phase diagram calculated by Holloway and Bormann will be discussed.
Initial Phase Formation and Distribution in the Pt-GexSi1−x and Cr-GexSi1−x Systems
Authors: Hong Q. Z. , Mayer J. W. 
Published: March 2011

ABSTRACTMetal-GeSi reactions have been investigated in the Pt-GeSi and Cr-GeSi systems. Pt started to diffuse into and react with the alloys at 250 °C. The reacted region consisted of a uniform mixture of Pt2Si and Pt2Ge, with the same ratios of Ge to Si as those in the unreacted region. On the other hand, the Cr-GeSi reaction was induced by Ge motion at 375 °C. As a result a two-layer phase separation was observed. A Si-rich ternary layer was sandwiched between a germanide layer and the unreacted alloy
Thermal Stability of CoSi2 on Single Crystal and Polycrystalline Silicon
Authors: Phillips J. R. , Revesz P. , Olowolafe J. O. , Mayer J. W. 
Published: March 2011

ABSTRACTThe thermal stability of Co silicide on single crystal and polycrystalline Si has been investigated. Co films were evaporated onto (100) Si and undoped polycrystalline Si and annealed in vacuum. Resulting silicide films were examined using Rutherford backscattering spectroscopy, scanning electron microscopy, electron-induced x-ray spectroscopy, and sheet resistivity measurements. We find that CoSi2 on single crystal (100) Si remains stable through 1000°C. In contact with undoped polycrystalline Si, intermixing begins at temperatures as low as 650°C for 30min annealing. The Co silicide and Si layers are intermixed after 750°C 30min annealing, giving islands of Si surrounded by silicide material, with both components extending from the surface down to the underlying oxide layer. The behavior of CoSi2 contrasts with results reported for TiSi2 which agglomerates on single crystal Si around 900°C but is stable on polycrystalline silicon as high as 800°C. Resistivity measurements show that the Co silicide remained interconnected despite massive incursion by Si into the silicide layer.
Tisi2 Thin Films Formed on Crystalline and Amorphous Silicon
Authors: Xiao Z.G. , Jiang H. , Honeycutt J. , Osburn C.M. , McGuire G. , Rozgonyi G.A. 
Published: March 2011

ABSTRACTTiSi2 thin films were formed on crystalline and amorphous silicon substrates obtained by Ge+ and Ge++B+ implantation and optional subsequent annealing. Transmission electron microscopy, X-ray diffraction and electrical resistivity analysis revealed that the silicide formed on amorphous Si has more tendency to have a C54 structure rather than the metastable C49 structure. Also, the grain size is smaller and the silicide/silicon interface is smoother for silicides formed on amorphous Si. Comparison between implanted and unimplanted, (100) and (111) Si substrates indicated that the origin of the differences can be attributed to the latent energy stored in amorphous silicon, which favors the silicide with fine grains and promotes the transformation to the C54 phase. Non-random distribution of planar defects in C49 grains has been observed by plan-view TEM. A proposal that these defects are transformation stress induced microtwins is presented.
The Effect of Amorphous Silicon Layer in Pe-Cvd Titanium Polycide Gate Dielectrics
Authors: Chen Shih-Chang , Sakamoto Akihiro , Tamura Hiroyuki , Yoshimaru Masaki , Ino Masayoshi 
Published: March 2011

ABSTRACTTitanium silicide (TiSix), used as polycide gate consists of TiSi1.1 and amorphous silicon (a-Si), was deposited by Plasma Enhanced Chemical Vapor Deposition method (PE-CVD). The effect of a-Si layer in PE-CVD Ti polycide gate dielectrics has been studied. In order to evaluate the a-Si layer effect, three types of samples were prepared on gate SiO2 film with following structures : a) a-Si / TiSi-1.1 / a-Si / phosphorus (P) doped poly-Si, b) a-Si / TiSi-1.1 / non-doped poly-Si / P doped poly-Si and c) a-Si / TiSi1.1 / P doped poly-Si, respectively. Furthermore, in order to avoid the influence of native oxide existence at the interface, the pre-cleaning treatment was performed in-situ on the poly-Si film surface before TiSi1.1 film deposition. The gate dielectric strengths of these samples indicate that the gate dielectric degradation in PE-CVD Ti polycide gate is greatly dependent on Si under layer crystallization. It is effective using a-Si film as the under layer in decreasing the gate dielectric degradation . This is due to the Ti oxide interlayer, formed at the interface of TiSi2.0 and poly-Si films, which restrains the TiSix local penetration.
Microanalysis of Tungsten Silicide/Polysilicon Interface: Effectiveness of

In Situ

Rie Clean on Removal of Native Oxide
Authors: Nowicki Ronald S. , Geraghty Patrice , Harris David W. , Lux Gayle 
Published: March 2011

ABSTRACTThe presence of a thin (10-30Å) oxide (“native oxide”) layer on a silicon surface prior to the deposition of another film on that surface can contribute to difficulties with subsequent device processing steps, e.g. contact metallization and high-temperature annealing or oxidation. Thus, the in situ process capability of “native oxide” removal affords an advantage over the conventional method of aqueous hydrofluoric acid cleaning prior to a film deposition step. This study describes such a technique, in which an in situ pre-deposition clean with C2F6 gas, using reactive ion etching (RIE) prior to tungsten silicide deposition, is employed. This technique allows post-silicide deposition high-temperature heat treatment and wet oxidation without loss of film adhesion or other obvious degradative effects. We also report the use of Secondary Ion Mass Spectrometry (SIMS) to show that this procedure has been effective in the removal of the oxide layer prior to silicide deposition. This study includes definition of the RIE etch parameters which provide acceptable etch selectivity of the oxide to silicon, and avoidance of excessive fluoropolymer formation on the silicon surface.
Rapid Thermal Annealed Tiw/Ti Contact Metallization for Advanced Vlsi Si Circuits
Authors: Chung Henry W , Yao Agnes T. 
Published: March 2011

ABSTRACTRapid thermal annealed (RTA) bilayers of TiW/Ti were evaluated for contact metallization in advanced VLSI Si circuits. It was found that RTA and a minimum thickness of Ti are necessary to achieve consistently low p+ contact resistance. RTA has little effect on n+ and polysilicon contact resistances. With RTA, TiSi2 is formed at the Ti/Si interface and a thin nitrogen-containing layer is formed on the TiW surface. By controlling RTA temperature and time, the interaction between Si and TiW during RTA could be minimized while the gain factor of p-channel MOSFETs was not degraded. Moreover, the leakage currents of n+ and p+ contact chains did not increase after 30 minute anneals up to 525C
Selective Oxidation and Etching of Reacted Pt Films on Gaas
Authors: Weiss Eliezer , Keller Robert C. , Kniffin Margaret L. , Helms C.R. 
Published: March 2011

ABSTRACTThe oxidation of prereacted Pt films on (100)-oriented n-GaAs substrates was studied in the temperature range between 550 and 750°C using Auger electron spectroscopy and Xe+ ion profiling. The GaPt/PtAs2/GaAs structure formed during annealing in hydrogen was oxidized using a mixture of water vapor and hydrogen. The GaPt phase can be oxidized completely, whereas the inner PtAs2 and GaAs interfaces are left unoxidized. The oxidation of the platinum-gallium phase is self limited by the diffusion of the Ga through the gallium oxide overlayer. The oxide can be etched off to leave a structure consisting only of platinum-arsenide on the GaAs substrate.
Thermal Behaviour of Au/Pd/GaAs Contacts
Authors: Pécz B. , Veresegyházy R. , Mojzes I. , Radnóczi G. , Sulyok A. , Malina V. 
Published: March 2011

ABSTRACTAu(85nm)/Pd(55nm)/GaAs(100) samples were heat treated in the 325-425°C temperature range. The annealed samples have been investigated using Rutherford Backscattering Spectrometry, Auger Electron Spectroscopy and Transmission Electron Microscopy. The gold layer remained largely unreacted up to 300°C. Significant Pd diffusion into GaAs consuming a 50–60 nm thick layer of GaAs .is evident in the case of sample annealed at 325°C and a slight Au diffusion is also noticeable. In the sample annealed at 350°C the spreading of palladium was very quick. A strong reaction took place between the GaAs and the metallization in the case of sample heat treated at 375°C. At this temperature we have identified the PdGa phase using electron diffraction.
Thermoelectric Power in Quantum Confined Optoelectronic Materials under Classically Large Magnetic Field
Authors: Ghatak Kamakhya P. , De B. , Mondal M. , Biswas S. N. 
Published: March 2011

ABSTRACTWe shall study the thermoelectric power under classically large magnetic field (TPM) in optoelectronic materials of quantum wells (QWs), quantum well wires (QWW’s), quantum dots (QDs) and compare the same with the hulk specimens of optoelectronic materials by formulating the respective electron dispersion law. The TPM increases with decreasing electron concentration in an oscillatory manner in all the cases, taking n-Hg1-xC dxTe as an example. The TPM in QD is greatest and the least for quantum wells respectively. The theoretical results are in agreement with the experimental observations as reported elsewhere.
The Effect of Microstructure and Processing Procedures on the Resistivity of Co-Sputtered W-Si Layers on GaAs Substrates
Authors: Carter S. , Staton-Bevan A. E. , Allan D. A. , Herniman J. 
Published: March 2011

ABSTRACTThe relationship between microstructure, composition, resistivity and processing procedures of W-Si layers on (100) GaAs was examined for both “as deposited” specimens and specimens annealed at temperatures between 100°C and 1000°C. TEM, EDAX, SIMS, AUGER and four point probe resistivity measurements were employed.The layers, exhibiting a columnar growth structure typical of sputter deposition, are amorphous below ≈ 800°C. At 700°C, the formation of pits, attributed to the outdiffusion of Ga and As into the W-Si layer, is observed at the W-Si/GaAs interface. The Ga and As outdiffusion was confirmed for temperatures above 700°C. The layers annealed between 800°C and 1000°C consist of a polycrystalline mixture of αW, βW and W5Si3 with coarse particles, thought to be W5Si3 precursors, formed along the W-Si/GaAs interface and protruding into the substrate. As the frequency of these protrusions increases with increasing temperature, the resistivity of the W-Si layers decreases.Both the composition and the resistivity of the W-Si thin films are affected by the processing procedure. The Si/W ratio of the W-Si thin films decreases whilst their resistivity significantly increases as a result of etching away the Si3N4 capping layer using HF. It is thought that this is due to the removal of Si-oxides formed within the layer during the W and Si sputtering. The decrease in the Si/W ratio and the increase in resistivity are not observed if an A1N capping layer is used.
The Relationship Between Microstructure and Contact Resistance in NiAuGe/ZrB2/Au Ohmic Contacts to GaAs.
Authors: Grimshaw M. P. , Staton-Bevan A. E. , Herniman J. , Allan D. A. 
Published: March 2011

ABSTRACTThe microstructure and contact resistance of NiAuGe contacts to n-type GaAs were determined as a function of initial contact composition. The contact microstructures were found to contain varying amounts of of α, α’ and β (or Au7Ga2) Au-Ga, epitaxial Ge, NiGe and NiGeAs phases. A previously unidentified NiAsx (Zr,B) phase was also observed. The contact resistance was found to vary between 0.22-0.38±0.03Ωmm. Comparison of the microstructural and contact resistance data revealed that the ohmic formation models based on (i) the formation of a recrystallised n+ GaAs layer and (ii) the presence of a graded Ge/GaAs heterojunction were not applicable to this contact system.
Process Design for Non-Alloyed Contacts to InP-Based Laser Devices
Authors: Katz A. , Dautremont-Smith W. C. , Chu S. N. G. , Pearton S. J. , Geva M. , Weir B. E. , Thomas P. M. , Kimerling L. C. 
Published: March 2011

ABSTRACTPl/Ti and W thin films on n- and p- type InP and related materials have been investigated for potential use as a refractory ohmic contacts for conventional, single-side coplanar contacted and self-aligned barrier hetcrostructurc laser devices. Pt and Ti films were deposited sequentially by electron gun evaporation, while the W layer was rf sputtered, both onto p+ -In0.53Ga0.47As (Zn doped 5×l018cm−3) and n−- InP (S doped, 5×l018cm−3). The deposition parameters of the two metal systems were optimized to produce adherent films with the lowest possible induced stress. Almost all the studied systems performed as ohmic contacts already as-deposited and were heat treated by means of rapid thermal processing in the temperature range of 300–900°C. The final contact processing conditions were tuned to provide the lowest possible contact resistance values accompanied by low mechanical stress and stable microstructure.
Tantalum and Tantalum Nitride as Diffusion Barriers Between Copper and Silicon
Authors: Holloway Karen , Fryer Peter 
Published: March 2011

ABSTRACTWe have investigated the effectiveness of thin tantalum layers as diffusion barriers to copper. Fifty nm Ta films were sputtered onto unpatterned single crystal Si wafers and overlaid with 100 nm Cu. Material reactions in these films were followed as a function of annealing temperature by in-situ resistance measurements, and characterized by by Rutherford Backscattering and cross-section TEM. The effect of the incorporation of nitrogen was explored by reactively depositing Ta(5 at.% N) and Ta2N. Pure Ta prevents Cu - silicon interaction to at least 600 °C. At higher temperatures, reaction of the Si substrate with Ta forms a planar TaSi2 layer. Cu rapidly penetrates to the Si substrate, forming Cu silicide precipitates at the TaSi2 - Si interface. A study performed on the Si/Ta(N)/Cu film had very similar results. Ta2N is an even more effective barrier to copper penetration, preventing Cu reaction with the substrate for temperatures up to at least 700 °C.
Lateral Spreading of Au Contacts on InP
Authors: Fatemi Navid S. , Weizer Victor G. 
Published: March 2011

ABSTRACTWe have investigated the contact spreading phenomenon observed when small area Au contacts on InP are annealed at temperatures above about 400 C. We have found that the rapid lateral expansion of the contact metallization which consumes large quantities of InP during growth is closely related to the third stage in the series of solid state reactions that occur between InP and Au, i.e., to the AU3In-to-AugIn4 transition. We present detailed descriptions of both the spreading process and the Au3In-to-AugIn4 transition along with arguments that the two processes are manifestations of the same basic phenomenon.
Preparation and Characterization of LPCVD TiB2Thin Films
Authors: Choi Chang , Ruggles G. A. , Osburn C. M. , Shea P. , Xing G. C. 
Published: March 2011

ABSTRACTTitanium diboride is an interesting new candidate for VLSI interconnection applications due to its high electrical conductivity and its excellent chemical inertness at high temperatures.A thermodynamic analysis of the chemical vapor deposition of TiB2from gaseous mixtures of TiCl4, B2H6and H2onto silicon or SiO2substrates was performed using the SOLGASMIX computer program. Results indicate that at an input gas ratio corresponding to stoichiometry, TiB2should form in the solid phase. For non-stoichiometric input gas mixtures, other solid phases, including oxides and silicides, are expected to result from the reaction with the Si or SiO2substrate. Both the addition of hydrogen to the system and increased deposition temperature are expected to enhance the deposition efficiency of TiB2.Thin films of TiB2, 50 – 120 nm thick, were experimentally deposited on thermally grown SiO2by low pressure CVD using various gas mixtures in the temperature range 400 – 700°C. Depth profiling of the deposited films, using XPS and RBS, indicated the successful growth of a uniform, stoichiometric TiB2film. After deposition, the films were rapid thermal annealed at various temperatures in an effort to reduce their resistivity. Resistivity was reduced by 80 % after an 1150°C, 10 sec RTA in Ar to a value as low as 40μΩ-cm, only 4 times larger than that reported for hot pressed polycrystalline TiB2. X-ray diffraction of as-deposited samples showed no crystalline peaks; however, annealed films exhibited the expected TiB2peaks as well as those of Ti3O5and TiO2. The titanium oxide was most likely produced during annealing due to trace amounts of oxygen in the Ar atmosphere. The average grain size measured 0.1μm via TEM. More careful control of growth and annealing conditions is expected to result in even lower resistivity TiB2films.
Instabilities in the Mechanical Stress in Deposited SiO2 Films Caused by Thermal Treatments
Authors: Bhushan Bharat , Murarka S.P. 
Published: March 2011

ABSTRACTUsing an in-situ stress measurement technique that measures stress as a function of annealing temperature, instabilities in mechanical stress induced by heat treatment in a variety of doped/undoped SiO2 films deposited by APCVD, LPCVD and PECVD techniques have been investigated. A large hysteresis in mechanical stress, caused by first heat treatment to which the as-deposited films are subjected, has been observed in films deposited by APCVD/LPCVD techniques. No such hysteresis is obsesrved in films deposited by PECVD technique. Hysteresis in APCVD/LPCVD films is found to vanish once the films are heat treated at or above 800°C. The results are discussed in terms of oxide densification, the presence of hydrogenous species, and phosphorous.
Acceptor Delta-Doping for Schottky Barrier Enhancement on n-Type GaAs
Authors: Pearton S. J. , Ren F. , Abernathy C. R. , Katz A. , Hobson W. S. , Chu S. N. G. , Kovalchick J. 
Published: March 2011

ABSTRACTThe incorporation of thin C- or Zn-doped layers under metal Schottky contacts on n-type GaAs can lead to significant enhancements in the effective barrier height. A single C δ-doped layer (p = 1.3 × 1020 cm–3) within 100 Å of the surface leads to a barrier height of ∼0.9 eV, a significant increase over the value for a control sample (∼0.75 eV). The use of two sequential δ-doped layers can lead either to a further enhancement in barrier height, or a decrease depending on whether these layers are fully depleted at zero applied bias. The temperature dependence of current conduction in barrier-enhanced diodes was measured. Both the ideality factor and breakdown voltage degrade with increasing temperature. Zinc δ-doping in a similar fashion produces barrier heights of 0.81 eV for one spike and 0.95 eV for two spikes.
Metal/Silicide Interactions in the Ti-Co-Si System.
Authors: Setton M. , Van Der Spiegel J. , Madar R. , Thomas O. 
Published: March 2011

ABSTRACTConfirming the results obtained for Ti-Co bilayers on Si and in accordance with the phase diagram, the high temperature formation and stability of three ternary silicides Ti0.75Co0.25Si2 (T phase), TiCoSi (E) and Ti4Co4Si7 (V) is reported. The Si rich T phase grows for Ti / CoSi2 and Co / TiSi2 structures. The tetragonal V compound is obtained by annealing Ti (400 Å) / Co (250 Å) / Si (900 Å) / SiO2 whereas orthorhombic TiCoSi is prepared using Ti / CoSi / Si3N4 samples.
Reactive Ion Beam Assisted Evaporation of Tin Films for Use as Diffusion Barriers in GaAs MMICs
Authors: Kazior T. E. , Brooks R. C. 
Published: March 2011

ABSTRACTWe report on the development of an evaporated diffusion barrier for incorporation into the metallizations currently used in GaAs MMICs. Results indicated that TiN films formed by reactive ion beam assisted evaporation - the simultaneous evaporation of metal atoms and bombardment with reactive ions - were as stable as TiN films formed by reactive sputter deposition and far superior to films formed by reactive evaporation. In addition the formation of these films is compatible with photoresist lift-off techniques. Chemical and electrical analysis has shown that these films are effective barriers against Au, Ga and As diffusion under extensive (up to 1500 hrs) elevated temperature storage (280°C). TiN-Au gate electrodes whose electrical characteristics are comparable to conventional Ti-Pt-Au gates have also been fabricated.
Phase Stability of Molybdenum-Silicon Nitride-Silicon Mis Schottky Diode at High Temperatures
Authors: Park Heungsoo , Helms C.R. 
Published: March 2011

ABSTRACTPreviously our group[1,2] has demonstrated metal-thin insulator- silicon Schottky diode structures which allow the Si Schottky barrier height to be adjusted over nearly the full range of the silicon band gap by appropriate choice of insulator thickness and metal. However, previous attempts to achieve a structure with a high barrier height to p-type that is stable above 400C(using primarily Titanium) have failed. In this paper we report on results for a metal, Molybdenum, which has a stable tie line to Sio2 and Si3N4 in metal-silicon-oxygen(nitrogen) ternary phase diagram which leads to a more stable system.
Characterization of a Rapid Thermal Annealed TiNxOy/TiSi2 Barrier Layer
Authors: Chittipeddi Sailesh , Kelly Michael J. , Dziuba Charles M. , Oates Anthony S. , Cochran William T. 
Published: March 2011

ABSTRACTIn this paper we characterize the thin film formed by rapid thermal anneal of a magnetron sputtered titanium film in a nitrogen atmosphere. The barrier properties of this material have been characterized for both n- and p-type junctions in our CMOS technology. We have characterized the physical properties of the film using Auger, RBS and TEM analysis in the same range of temperatures, and find that as the annealing temperature is increased a better quality TiNxOy film is formed. The electromigration characteristics for Aℓ/TiNxOy/TiSi2 runners, as well as the role that this system plays in minimizing failures due to stress induced voiding are examined in this study.