bluuebunny/crossref_metadata_2025_split huggingface dataset:
Stability Studies of Hydrogenated Amorphous Silicon Alloy Solar Cells Prepared with Hydrogen Dilution
Authors: Yang J. , Xu X. , Guha S. 
Published: April 2011

ABSTRACTWe have fabricated hydrogenated amorphous silicon alloy solar cells using hydrogen dilutions at 175 °C and 300 °C, and obtained improved photovoltaic characteristics in both the initial and degraded states for the highly diluted cells; both the fill factor and the open-circuit voltage exhibit higher values before and after light soaking. Infrared analyses reveal that for a given deposition temperature the amount of bonded hydrogen has similar concentrations between the high and low hydrogen diluted samples. Optical Modelling shows a 20 MeV difference in their optical bandgap. Defect densities obtained from constant photocurrent measurements give similar values for a given deposition temperature both before and after light soaking, inconsistent with solar cell performance.
Control of the Electron and Hole Drift mobilities in Plasma Deposited a-Si:H
Authors: Ganguly Gautam , Matsuda Akihisa 
Published: April 2011

ABSTRACTThe ‘time-of-flight’ technique measured electron and hole drift mobilities are shown to be independent of deposition parameters in capacitively coupled, diode type RF-PECVD a-Si:H. However, the carrier mobilities can be varied by orders of magnitude by changing the bias applied to the mesh type controlling electrode in a triode type reactor. The room temperature hole drift mobility increases to 10−1cm2/Vs when an appropriate bias is applied to the mesh providing optimum energy ion stimulation of the film growth surface during deposition. Analysis of the field and temperature dependences of the drift mobilities shows that in the best specimens the conduction (valence) band tail density of states are approximately exponential with a reciprocal slope of lOMeV (25MeV).
Considerations for Large Area Fabrication of Integrated a-Si and Poly-Si TFTs
Authors: Mei P. , Anderson G. B. , Boyce J. B. , Fork D. K. , Hack M. , Johnson R. I. , Lujan R. A. , Ready S. E. 
Published: April 2011

ABSTRACTThe combination of a-Si low leakage pixel TFTs with poly-Si TFTs in peripheral circuits provides an excellent method for reducing the number of external connections to large-area imaging arrays and displays. To integrate the fabrication of the peripheral poly-Si TFTs with the a-Si pixel TFTs, we have developed a three-step laser process which enables selective crystallization of PECVD a-Si:H. X-ray diffraction and transmission electron microscopy show that the polycrystalline grains formed with this three-step process are similar to those crystallized by a conventional one step laser crystallization of unhydrogenated amorphous silicon. The grain size increases with increasing laser energy density up to a peak value of a few Microns. The grain size decreases with further increases in laser energy density. The transistor field effect mobility is correlated with the grain size, increasing gradually with laser energy density until reaching its maximum value. Thereafter, the transistors suffer from leakage through the gate insulators. A dual dielectric gate insulator has been developed for these bottom-gate thin film transistors to provide the correct threshold voltages for both a-Si and poly-Si TFTs.
The Origin and Nature of Contact Resistance in a-Si:H TFTs
Authors: Gadelrab Serag M. , Chamberlain Savvas G. 
Published: April 2011

ABSTRACTThe origin of contact resistance in a-Si:H TFTs is investigated by formulating a model for the contact limited current. The Model accounts for the independent contributions of the Metal–n+a-Si:H interface resistance and the space charge limited conduction through the intrinsic a-Si:H film. Using our contact current model we investigated the I–V behavior of an n–i–n structure with a thin a-Si:H layer (=700Å) and found that the resistance of the Metal–n+a-Si:H interface is nonlinear. We incorporated the contact limited current expression into a full TFT Model and simulated the TFT performance for a wide range of Metal–n+a-Si:H interface resistance values and intrinsic a-Si:H film thicknesses. We found that the Metal–n+a-Si:H interface resistance dominates over space charge limited conduction for the thicknesses of intrinsic a-Si:H films used in AM-LCD switches. This trend is sustained even when the effective resistance of the Metal–n+a-Si:H interface decreases due to the nonlinear current conduction across it.
A Novel α-Si(C):H Color Sensor Array
Authors: Zhu Q. , Stiebig H. , Rieve P. , Fischer H. , Böhm M. 
Published: April 2011

ABSTRACTA novel α-Si(C):H color sensor array has been developed. In this device a single pixel consists of a combination of an amorphous silicon nipin detector and a crystalline operational amplifier. Steady state and transient opto electronic behavior of the nipin structure have been studied in order to optimize the design of the image sensor. Nipin structures are found to exhibit excellent dynamic range (125 dB) and linearity. The crystalline electronics causes only very little signal distortion which makes this sensor device a potential candidate for color image capture and processing for a wide range of illumination levels.
In Situ Ellipsometric Study of the Dependence of a-Si:H Film Growth on Substrate Properties and Ignition Procedures
Authors: Schmidt U.I. , Herbst W. , Schröder B. , Oechsner H. 
Published: April 2011

ABSTRACTIn situ ellipsometry reveals that particle formation influences the growth of glow discharge a-Si:H. This particle formation is observed even under discharge conditions leading to the deposition of device quality Material. It is found that less dense material is deposited during the particle-induced initial transient stage of the discharge which influences the properties of the subsequently growing “bulk” film. The effect of special power gradient ignition procedures is discussed. A significant increase of solar cell efficency is achieved by choosing “soft” start conditions for the i-layer deposition.
Characterization of Chemical-Mechanical Polishing Dielectrics for Multilevel Metallization
Authors: Sun S.C. , Yeh F.L. , Tien H.Z. 
Published: April 2011

ABSTRACTThis paper presents the results obtained from a systematic study on dielectric planarization using a chemical mechanical polishing (CMP) technique. This technique is readily applicable to intermetal and pre-metal dielectric films for advanced CMOS device fabrication. Results indicate that polishing rates vary with different dielectrics; with BPSG having the highest removal rate, while PECVD nitride having the lowest removal rate. Key parameters in determining the polishing rate are down force pressure and platen rotation speed. It is demonstrated that planarization becomes a reality on patterned wafers.
Surface Effects in the Mocvd of Copper
Authors: Nuesca G. M. , Prasad J. , Kelber J. A. 
Published: April 2011

ABSTRACTRecent findings concerning the surface chemistry of Cu(I)) and Cu(II) betadiketonate precursors on metal and TiN surfaces are reviewed. Interactions of Cu(I) hexafluoroacetylacetonate (L) (Cu(I)(hfac)(L); L=Lewis base) with the surface result in an adsorbed Cu(I)hfac intermediate. Cu(II)(hfac)2 adsorbtion yields the Cu(I)hfac intermediate plus adsorbed hfac. Subsequent exposure to atomic hydrogen volatilizes the adsorbed hfac and results in the reduction of Cu(I) via disproportionation: 2Cu(I)(hfac) ⇒ Cu(0) + Cu(II)(hfac)2 (desorbed). These results demonstrate that disproportionation can occur on contaminant free surfaces under UHV conditions, and that the mechanisms for Cu(I) and Cu(II)/H2 film growth are similar. Implications for selectivity and low temperature deposition are explored. Potential shortcomings of TiN as an adhesion/diffusion barrier are also discussed.
Process Integration and Manufacturasility Issues for High Performance Multilevel Interconnect
Authors: Jeng Shin-Puu , Havemann Robert H. , Chang Mi-Chang 
Published: April 2011

ABSTRACTInterconnect delay is shown to be a performance-limiting factor for ULSI circuits when feature size is scaled into the deep submicron region, due to a rapid increase in interconnect resistivity and capacitance. Dielectric materials with lower values of permittivity are needed to reduce the line-to-line capacitance as metal spacing decreases. However, the challenge is to successfully integrate these materials into on-chip interconnects. A new multilevel interconnect scheme has been developed that gives improved performance through insertion of a low-dielectric-constant material between metal leads. A novel polymer/Si02 composite dielectric structure provides lower line-to-line capacitance while alleviating many of the integration and reliability problems associated with polymers in standard interconnect processing.
Fast Thermal Cycling and Electro-Migration Properties of Si/TaSi2/TiN/Al-Si Multilayer Thin Film Contacts
Authors: V.Baranov Valentin , M.Ivkin Victor , L.Sakovitch Elena 
Published: April 2011

ABSTRACTFor the electromigration test of Si/TaSi2/(Al-1wt%Si) and Si/TaSi2/TiN/(Al-1wt%Si) multilayer contacts we employed the special test structures which allow to passage a pulsed electrical current through the semiconductor region lying under investigated contacts and insulated from them by n+/p-junction. The contacts were tested in the optimal conditions (temperature was cycled in the ranges from 50°C to 175°C with 300ms thermal cycle period at 25 mA constant electrical current passaged through the investigated contacts). It has been shown that the electromigration life time has been shortened by more than an order of the magnitude compared to 200°C constant temperature test. SEM investigations of the sputter deposited thin film of multilayer contact have also shown that the Al-Si thin film on the TaSi2 layer had a fine structure with the average grain size about 0,3 μm. However a presense of the TiN interlayer with the thickness of 0.05 - 0.1 pm results in an increase of the average grain size of the upper Al-Si film up to 0,8μm. The result is the increase in the electromigration process activation energy that improves the electromigration life time contacts containing the TiN interlayer.
Lateral Variation in the Schottky Barrier Height and Observation of Critical Lengths at Au/PtSi/(100)Si and Au/(100)GaAs Diodes
Authors: Talin A. Alec , Ngo Tue , Stanley Williams R. , Morgan Brent A. , Ring Ken M. , Kavanagh Karen L. 
Published: April 2011

ABSTRACTLateral variations in the Schottky barrier height (SBH) formed at Au/PtSi/(100)Si and Au/(100)GaAs diodes were measured on length scales ranging from a few to several hundred nanometers using ballistic electron emission microscopy (BEEM). All of the contacts investigated showed SBH spatial inhomogeneity. The most severe SBH variations observed were 0.09eV/0.7nm in Au/(100)GaAs contacts and 0.08eV/14nm for Au/PtSi/(100)Si contacts. Based on the lateral maps of the SBH at each interface, the difference between the locally averaged SBH and the globally averaged BEEM SBH was computed. This analysis showed that there is a critical diode length scale below which the SBH deviates significantly from the SBH averaged over a macroscopic length scale. This result implies that the uniformity of electrical characteristics of arrays of small devices (e.g.. PtSi/Si photodetectors and GaAs FET gates) can be expected to deteriorate significantly when device dimensions decrease below the critical length.
Rapid Thermal Nitridation of Tungsten-Capped Shallow Ohmic Contacts to GaAs
Authors: Kaminska E. , Piotrowska A. , Mizera E. , Guziewicz M. , Barcz A. , Dynowska E. , Kwiatkowski S. 
Published: April 2011

ABSTRACTWe report on the use of AuGeNi/W and AuZn/W metallizations and their further processing by rapid thermal nitridation. Nitrided tungsten serves as a cap suppressing the sublimation of As. To study the effect of annealing conditions on the properties of the W cap, comparative experiments involving conventional annealing in H2, and RTA in N2 or O2 flow, have been performed. TEM, XRD, RBS, and SIMS have been employed to investigate contact microstructures. The obtained results prove the superiority of the contacts with nitrided W cap over conventional insulating cap. No W-N phase is observed in nitrided W layers, which is consistent with the model of a "stuffed" barrier by Nicolet.
Au/Zn Contacts to p-InP: Electrical and Metallurgical Characteristics and the Relationship Between Them
Authors: Weizer Victor G. , Fatemi Navid S. , Korenyi-both Andras L. 
Published: April 2011

ABSTRACTThe metallurgical and electrical behavior of Au/Zn contacting metallization onp-type InP was investigated as a function of the Zn content in the metallization. It was found that ohmic behavior can be achieved with Zn concentrations as small as 0.05 atomic percent Zn. For Zn concentrations between 0.1 and 36 at.%, the contact resistivity ρc was found to be independent of the Zn content For low Zn concentrations the realization of ohmic behavior was found to require the growth of the compound Au2P3 at the metal-InP interface. The magnitude of ρc is shown to be very sensitive to the growth rate of the interfacial Au2P3 layer. The possibility of exploiting this sensitivity to provide low resistance contacts while avoiding the semiconductor structural damage that is normally attendant to contact formation is discussed.
Manufacturability Versus Reliability Issues Relevant to Interconnect Metallizations.
Authors: Rodbell K.P. , Colgan E.G. , Hu C-K. 
Published: April 2011

ABSTRACTInterconnections on silicon-based integrated circuits are almost exclusively aluminum alloys (Al-Si, Cu and various other solutes, e.g., Pd, Sc). The effects of film microstructure (grain size, grain size distribution, crystallographic texture and precipitate distribution) on the reliability of single level Al metallization has been well established. The final film microstructure obtained is dependent on both the deposition conditions and the thermal history during the manufacturing process. This paper will consider the role of microstructure in multi-level interconnects consisting of (1) AI(Cu) lines (in SiO2) with W and/or AI(Cu) studs and (2) an all Cu/polyimide multi-level structure. Methods for microstructure optimization during manufacturing of both Al and Cu based multilevel structures are explored. The variables important in determining the reliability of submicrometer single level versus multi-level structures and reliability testing methods (e.g., samples with versus without reservoirs and wafer level techniques) will be reviewed. Two relevant questions raised are; (1) What can be done during manufacturing to "build-in" reliability?, and (2) What are the trade-offs between manufacturing complexity (i.e., cost) and inherent reliability?
Eutectic Bonding for Inducing In-Plane Strain in Gaas and Gaas/Algaas MQW Thin Films
Authors: Lu Y. , Kuo H. C. , Lin C. H. , Shen H. , Ren F. , Wraback M. , Pamulapati J. , Taysing-Lara M. , Dutta M. , Kuo J. M. 
Published: April 2011

ABSTRACTWe present a process for creating in-plane anisotropic strain in (100) GaAs and GaAs/AlGaAs multiple quantum well (MQW) thin films. The host substrates used for bonding include (100) GaAs, (100) silicon, and lithium tantalate (LiTaO3) with a special crystalline orientation. A mutilayer metallization consisting of Au-Sn (Au: 80 wt% , Sn: 20 wt%, 0.95μm), Ti (500Å) adhesion layer and Pt (500Å) barrier layer is deposited on the thin films and the host substrates. By choosing a proper annealing temperature (380°C) and thickness of eutectic layer, the thin films and the substrates are bonded together. Photoluminescence measurements do not reveal any thermally induced strain in the thin films bonded to GaAs; however, they show the existence of in-plane biaxial strain in the films bonded on Si. Linearly polarized reflectance measurements reveal an optical anisotropy in the MQW bonded to LiTaO3, which possesses an orientation-dependent thermal expansion. This indicates that the in-plane strain in the thin films is induced by the different thermal expansions between the thin films and the substrates. This process can be used to develop a new class of devices with an artificially induced in-plane strain.
Enhanced Adhesion of Copper Films to SiO2, PSG and BPSG by Refractory Metal Additions
Authors: Rafalski S.A. , Spreitzer R.L. , Russell S.W. , Alford T.L. , Li J. , Moinpour M. , Moghadam F. , Mayer J.W. 
Published: April 2011

ABSTRACTCopper films generally exhibit poor adhesion on dielectrics. It has been shown that the addition of refractory metals promotes adhesion via an interfacial reaction or better wetting to the dielectric. We investigate the adhesion of Cu-refractory metal (Cr, Ti) alloy films and bilayers on various silicon oxide substrates (SiO2, PSG, BPSG) after annealing in the temperature range 400-600°C by conventional furnace using N2/H2 forming gas. Rutherford backscattering spectrometry (RBS) was used to determine the interfacial reaction characteristics. The efficacy of a variation of the standard Scotch™ tape testing was evaluated. We found that the combined Scotch™ tape/scribe adhesion test revealed excellent qualitative bonding information and could be correlated well to RBS characterization. We were able to optimize the sample configurations and chemical compositions to achieve the best adhering film.
Investigation of Chromium Nitridation Using Ion Beam Resonance Analysis
Authors: Russell S.W. , Bair A.E. , Rack M.J. , Adams D. , Spreitzer R.L. , Alford T.L. , Culbertson R.J. 
Published: April 2011

ABSTRACTWe investigate the nitridation of chromium films in an NH3 ambient at 500°C. Rutherford backscattering spectrometry using 2.0 MeV He2+ was utilized to determine the compositions of thick reacted layers and to provide calibration for the other techniques. In addition, analysis was performed using the 14N(α,α)14N resonance at 3.72 MeV in order to enhance sensitivity to nitrogen. Sputter-deposited TiN was used as a calibration for the cross section a for this resonance over the energy range 3.05-3.85 MeV and compared to the literature value. We find that analysis just above the peak in the resonance provides excellent sensitivity to N concentration in the nitride layers. This approach may be readily used in conjunction with 2.0 MeV backscattering to determine the overall composition and sample configuration. Auger electron spectroscopy was used to provide more depth sensitivity in compositional profiling and to monitor the oxygen impurity distribution. X-ray diffraction was used to identify phases in both as-deposited and annealed films.
Interfacial Reactions of Copper/Refractory Alloy and Bilayer Films on Si02
Authors: Spreitzer R. L. , Rafalski S.A. , Adams D. , Russell S.W. , Atzmon Z. , Li J. , Alford T.L. , Mayer J.W. 
Published: April 2011

ABSTRACTWe studied interfacial phase formation between copper and copper-alloy films on SiO2 in order to understand how to improve adhesion. CuCr and CuTi alloy and bilayer films on SiO2 were annealed from 400-600°C for 30 min in an N2 + H2 (5%) ambient. The bilayer systems exhibited refractory metal migration from the interface to the surface where they oxidized. In the CuTi bilayer system, an oxidized interfacial Ti layer was observed. Both CuCr and CuTi alloy systems exhibited refractory metal segregation to the interface and surface. Rutherford backscattering spectrometry and Auger electron spectroscopy were used for elemental depth profiling.
Effect of Polishing Pad Material Properties on Chemical Mechanical Polishing (Cmp) Processes
Authors: Bajaj Rajeev , Desai Mukesh , Jairath Rahul , Stell Matthew , Tolles Robert 
Published: April 2011

ABSTRACTChemical mechanical polishing (CMP) technology has successfully met the stringent requirements of ultraplanarized surfaces in semiconductor manufacture. Commonly, polyurethane based pads have been used to achieve this level of planarization. Recent studies have shown that the material properties of polishing pads used in the CMP process strongly influence the ability to reduce topography. In addition, past work has shown that in the absence of pad regeneration, polishing rate drops dramatically with polishing time. This decrease in material removal rate is believed to coincide with deterioration of the pad surface due to “cold flow” and/or “caking” of the pad material. This study attempts to correlate the intrinsic polymer properties and cellular structure of the pad material to CMP process indices like polishing rate and planarity. For example, the drop off in removal rate as a function of time can be attributed to the mechanical response of polyurethanes under conditions of critical shear. Moreover, planarity achieved is a function of pad stiffness - which itself is dependant upon intrinsic polymer stiffness and cell density.
Reliability Study of On-Chip Interconnects : Prediction of Electromigration Resistance on A Short Time Scale
Authors: De Ceuninck W. , D’Haeger V. , Stulens H. , De Schepper L. , Stals L.M. 
Published: April 2011

ABSTRACTA new method is presented to evaluate the resistance to electromigration (EM) of on-chip interconnects. The method is based on high resolution in-situ electrical measurements. In this way, the electrical resistance is measured with high accuracy during electromigration at high temperature. After careful analysis of the isothermal results, it was found that the metallization can be characterized by one parameter: the rate of resistance change (RRC). It is shown that the RRC is very sensistive to the electromigration performance. The performance level of the different metallizations can easily be detected and can be qualified in a quantitative way. The results are also compared with classic Mean Time To Failure (MTTF) results and it is found that there exists an almost linear relationship between the RRC results and the MTTF results. However, the in-situ technique offers the benifit that a metallization can be characterized on a time scale as short as a few days, which is certainly not the case for the classical techniques.
Properties of Metal / Polyphenylquinoxaline Interfaces
Authors: Bellard L. , Themlin J.M. , Palmino F. , Cros A. 
Published: April 2011

ABSTRACTWe have investigated the microscopic properties of copper and chromium layers deposited on polyphenylquinoxaline (PPQ). PPQ is a thermostable polymer used for multichip module applications. The metal is deposited under ultra-high vacuum conditions and analysed in-situ by X-ray photoemission (XPS) and atomic force microscopy (ex situ). Copper does not react significantly with the PPQ and tends to diffuse into the polymer matrix upon annealing. On the contrary, chromium strongly reacts with the polymer surface at room temperature. With increasing metal coverage, chromium grows in a layer-by-layer mode and the reacted interface is progressively burried under the pure metal layer.
High Density Magnetically Confined Dry Etching of Metallization and Dielectrics in Gaas Device Technology
Authors: Pearton S. J. , Abernathy C. R. , Ren F. , Lothian J. R. , Kopf R. F. , Katz A. 
Published: April 2011

ABSTRACTDry etching of common masking materials used in GaAs device technology was examined down to temperatures of −30°C. The etch rates of SiNx, SiO2 and W in SF6/Ar are reduced below 0°C, but the anisotropy of the etching is improved at low temperature. Microwave enhancement of the SF6/Ar discharges produces increases in etch rates of several times at 25°C, but much lower increases at −30°C substrate temperature. The underlying GaAs surface shows increased S and F coverage after low temperature etching, but these species are readily removed either by an ex-situ wet chemical cleaning step or an in-situ H2 plasma exposure. Photoresist etching is less sensitive to temperature and anisotropic profiles are produced between −30 and + 60°C in pure 02 discharges.