bluuebunny/crossref_metadata_2025_split huggingface dataset:
Effect of Zn Addition on the Interfacial Reactions between Cu and Lead-Free Solders
Authors: Yang Su-Chun , Ho Cheng-En , Chang Chien-Wei , Kao C. Robert 
Published: April 2011

ABSTRACTRecently, it was reported that adding Zn to solder was an effective way for reducing the formation of both Cu3Sn and Cu6Sn5 and inhibiting Kirkendall voids formation. The objective of this study is to investigate this Zn effect in detail. Three Sn-xZn solders (x = 0.5, 0.7, and 2 wt. %) were reacted with Cu substrates at 250°J for 2-10 mins. A slight variation in the Zn concentration changed the reaction product formed at the interface. When the Zn concentration was low (x = 0.5 wt. %), the reaction product was Cu6Sn5. At high Zn concentration (x = 2 wt. %), the reaction product became Cu5Zn8. When Zn concentration was in-between (x = 0.7 wt. %), Cu6Sn5 and CuZn co-existed. The above findings are explained using the Cu–Sn–Zn phase diagram. The implication is that the type of compound forms at the interface can be controlled by adjusting the Zn concentration of the Sn-based solders.
Thermal Management in High-Density, Stacked-Die, Multi-chip Modules
Authors: Marinis Thomas , Pryputniewicz Dariusz , Kondoleon Caroline , Haley Jason 
Published: April 2011

ABSTRACTVery high density multi-chip modules are being manufactured by tiling an alumina substrate with IC chips and passive components, laminating a film of Kapton over them, laser drilling vias to their I/O pads, and interconnecting them with photo patterned, copper metallization. Additional layers of components and interconnects are added on top of the base layer, as needed, to allow greater integration of large circuits. Current products are typically two layers of chips and seven layers of interconnect. As higher power applications have emerged and the power density of IC chips has increased, thermal management has become a significant factor impacting module design. We have been conducting a thermal modeling effort to map the design space for this technology. Our principal objective is to define and evaluate low thermal impedance (heat removal) configurations for a given chip set. A second objective is to determine what gains in module performance might be realized by improvements in material properties or changes in the relative thicknesses of dielectric and metal layers.
Milling and Additive Effects on Hydrogen Desorption Reactions of Li-N-H and Li-Mg-N-H Hydrogen Storage Systems
Authors: Matsumoto Mitsuru , Kojima Yoshitsugu , Towata Shin-ichi , Nakamori Yuko , Orimo Shin-ichi 
Published: April 2011

ABSTRACTHydrogen desorption reactions of the mixtures of (i) lithium amide and lithium hydride (LiNH2/LiH), and (ii) magnesium amide and lithium hydride (Mg(NH2)2/4LiH) were studied. Titanium compounds and nano-particles including fullerene (C60), were doped to those hydrogen storage mixtures respectively. The hydrogen desorption reactions were monitored by means of temperature programmed desorption (TPD) technique under an Ar atmosphere. The reaction of LiNH2/LiH was accelerated by adding either 1 mol% of Ti species or 0.2 mol% of fullerene (C60), while those additives did not show significant acceleration effects on the reaction of Mg(NH2)2/4LiH. Kinetic studies revealed the enhanced hydrogen desorption reaction rate constant for TiCl3 doped LiNH2/LiH, k = 3.1 × 10−4 s−1 at 493 K, and the prolonged ball-milling further improved reaction rate, k = 1.1 × 10−3 s−1 at the same temperature. For the dehydrogenation reaction of TiCl3 doped LiNH2/LiH, the activation energies estimated by Kissinger plot (95 kJ mol−1) and Arrhenius plot (110 kJ mol−1) were in reasonable agreement each other. The LiNH2/LiH mixture without additive exhibited slower hydrogen desorption process and the kinetic traces deviated from single exponential behavior. The results indicated the Ti(III) additives change the hydrogen desorption reaction mechanism of LiNH2/LiH.
Characterization of (La0.9Sr0.1)0.95Cr0.85Mg0.1Ni0.05O3 Perovskite Ceramics for a Perovskite Related Membrane Reactor
Authors: Rosten Rachel , Swanson Matthew , Kuebler Jakob , Kapat Jayanta , Orlovskaya Nina 
Published: April 2011

AbstractIn this research we investigated the sintering behavior of (La0.9Sr0.1)0.95Cr0.85Mg0.1Ni0.05O3 perovskite which is a potential candidate material for enhancing the oxidation reactions in oxygen separation and syngas production. It was found that solid state sintering occurs as a single step event and it was possible to produce gas tight ceramics after using cold isostatic pressing followed by sintering at 1700°C in air. Grain size, porosity, and lattice parameter measurements of the presureless sintered ceramics were performed as a function of sintering temperature. A small amount of secondary phases was also detected by XRD and EDS analysis.
Thermoelectric Power Devices Based on InN Thin Films
Authors: Matsumoto Takayuki , Yamaguchi Shigeo , Yamamoto Atsushi 
Published: April 2011

ABSTRACTWe have studied the temperature dependence of thermoelectric properties of amorphous InN thin films prepared by reactive radio-frequency sputtering. We fabricated 60-pair and 120-pair InN-chromel films, which were deposited on polyimide films. For the 120-pair device, the maximum open output voltage and the maximum output power were 210 mV and 65 nW, respectively, at temperature difference of 168 K.
Development of Nano-Micro-Macro-Structured Porous Nickel Electrodes for use in Supercapacitors
Authors: Manning Jason , Campbell Roger , Woo Renee , O'Neil Brenda , McKenzie Leigh , Bakker Martin Gerard , Montoya Velma , Havrilla George 
Published: April 2011

ABSTRACTThe extremely high surface areas required for supercapacitors has limited the use of metal based electrodes, despite the other advantages such electrodes might have. Self-assembling surfactants and block co-polymers can be used as templates to produce nanostructured thin films that readily give 60-140 fold increases in surface area on both planar and three-dimensional substrates. However, even when relatively high surface area porous metal substrates such as nickel foam are used as a starting point, the resultant material still has surface area density well short of that available in other types of materials. Micro-emulsions offer a method of generating microstructure that bridges the gap between the 100 micron scale structures of foamed metals and the 10-50 nm scale structure of self-assembling block co-polymers. Electrodeposition of nickel and cobalt from micro-emulsions of Tween surfactants gives rise to structure on the 0.1-10 micron length scale. The scale of the microstructure is strongly influenced by the metal ion concentration and the potential at which the electrodeposition. The nature of the metal ion also strongly effects the ease with which the microstructure can be generated and the distribution of the microstructured film on foamed nickel electrodes. For microstructured nickel films ten fold surface area increases can be achieved. The microstructured films are expected to be compatible with a number of the nanostructuring methods to yield cumulative surface area increases of 1000-2000 fold.
Exciton Lifetime in PbS Quantum Dots in Glass
Authors: Persans Peter D , Filin A. , Berry N. E. , Huang F. , Chan E. 
Published: April 2011

ABSTRACTWe report experimental measurements and analysis of HOMO-LUMO transition photoluminescence and photoinduced bleaching magnitude and decay kinetics in lead sulfide quantum dots in glass. We find that the radiative lifetime is independent of temperature from 77K to 500K. The lifetime of the HOMO-LUMO state decreases dramatically for T>300K, indicating thermally activated nonradiative recombination. The excitation decay time is much greater than the radiative lifetime and increases monotonically with decreasing temperature with decay times of 2 μs at room temperature and 4-10 μs at 77K.
Electron Tomography of SPM Probes, Nanoparticles and Precipitates
Authors: Xu Xiaojing , Saghi Zineb , Yang Guang , Peng Yong , Inkson Beverley , Gay Ralph , Möbus Günter 
Published: April 2011

ABSTRACTNanoscale tomographic reconstructions from objects with diameters of 100nm or smaller can only be achieved non-destructively with transmission electron tomography. The application of this technique to W tips, which are common probes for scanning tunneling microscopy and nanoindentation, is demonstrated with emphasis on visualizing oxide layers and functionally attached nanoparticles. For the reconstruction of facetted free-standing catalyst nanoparticles, such as CeO2 octahedra, we propose a combination of energy-filtered (EF) and bright field (BF) TEM tomography to achieve high fidelity of the projection relationship via EFTEM, due to its incoherent imaging mode, and high resolution definition of the particle circumference from the edge-enhancement effects of the BF tomogram. Finally, electron tomography applications to CeO2 nanoprecipitates embedded in a multicomponent oxide glass matrix are shown, which comprises the first tomographic 3D reconstruction of a nanoscale dendrite.
Dependence of the Electronic Properties of Hot-Wire CVD Amorphous Silicon-Germanium Alloys on Oxygen Impurity Levels
Authors: Datta Shouvik , Cohen J. David , Xu Yueqin , Mahan A. H. , Branz Howard M. 
Published: April 2011

AbstractWe report the effects of intentionally introducing up to ∼ 5×1020/cm3 oxygen impurities into hydrogenated amorphous silicon-germanium alloys (of roughly 30at.% Ge) grown by the hot-wire chemical vapor deposition (HWCVD) method. Deep defect densities determined by drive-level capacitance profiling (DLCP) indicated a modest increase with increasing oxygen content (up to a factor of 3 at the highest oxygen level). Transient photocapacitance (TPC) spectra indicated a clear spectral signature for an optical transition between the valence band and an additional defect level which is attributed to oxygen impurities. The oxygen impurity related defect transition has an optical threshold around 1.4eV above the valence band and also results in a negative contribution to the TPC signal. This initially led us to believe that the bandtail for the higher oxygen samples was much narrower than it actually is. Surprisingly, this additional oxygen related defect level appears to have only a very minor effect upon the estimated minority carrier collection fraction. The effects of light-induced degradation upon some of these oxygen contaminated samples were also examined. We infer the existence of a significant thermal barrier to explain the observed spectral signatures of this oxygen impurity defect.
Stability of Amorphous Silicon Thin Film Transistors under Prolonged High Compressive Strain
Authors: Chen Jian-Zhang , Cheng I-Chun , Wagner Sigurd , Jackson Warren , Perlov Craig , Taussig Carl 
Published: April 2011

AbstractWe studied the effect of prolonged mechanical strain on the electrical characteristics of thin-film transistors of hydrogenated amorphous silicon made at a process temperature of 150°C on 51-μm thick Kapton polyimide foil substrates. Effects are observed only at very high compressive strain of 1.8%. Tensile strain up to fracture at 0.3% to 0.5% does not show any effect, nor does compressive strain substantially less than 1.8%. The TFTs were stressed for times up to 23 days by bending around a tube with axis perpendicular to the channel length, and were evaluated in the flattened state. The changes observed are small. The threshold voltage is increased, the “on” current and the field effect mobility remain essentially constant, and the subthreshold slope, “off” current and gate leakage current drop somewhat. Overall, the observed changes are small. We conclude that mechanical strain caused by roll-to-roll processing and permanent shaping will have negligible effects on TFT performance.
Amorphous Silicon Based TFT and MIS Nonvolatile Memories
Authors: Kuo Yue , Nominanda Helinda 
Published: April 2011

AbstractThe amorphous silicon (a-Si:H) TFT and MIS capacitor, which include an a-Si:H layer embedded in the silicon nitride gate dielectric layer, have been prepared and characterized for memory functions. Large shifts of the threshold voltage and flat band voltage were detected in the current-voltage and capacitance-voltage hysteresis measurements. The embedded a-Si:H film functioned as a charge retention medium that stores and releases injected carriers. The devices memory capacity varied with the thickness of the embedded a-Si:H layer and the sweep voltage. These low-cost memory devices can be used in many low-temperature prepared circuits.
&[mu]-Watt Enhanced Electroluminescent Power of Silicon Nanocrystal Light-Emitting Diodes Made on Nano-Scale Silicon-Tip-Array Substrate
Authors: Lin Gong-Ru , Lin Chun-Jung 
Published: April 2011

AbstractA Si nanocrystal based metal-oxide-semiconductor light-emitting diode (MOSLED) on Si nano-pillar array is preliminarily demonstrated. Rapid self-aggregation of Ni nanodots on Si substrate covered with a thin SiO2 buffered layer is employed as the etching mask for obtaining Si nano-pillar array. Dense Ni nanodots with size and density of 30 nm and 2.8×10 cm-2, respectively, can be formatted after rapid thermal annealing at 850°C for 22 s. The nano-roughened Si surface contributes to both the relaxation of total-internal reflection at device-air interface and the Fowler-Nordheim tunneling enhanced turn-on characteristics, providing the MOSLED a maximum optical power of 0.7 uW obtained at biased current of 375 uA. The optical intensity, turn-on current, power slope and external quantum efficiency of the MOSLED are 140 μW/cm2, 5 uA, 2+-0.8 mW/A and 1×10-3, respectively, which is almost one order of magnitude larger than that of a same device made on smooth Si substrate.
Advanced Deposition Phase Diagrams for Guiding Si:H-Based Multijunction Solar Cells
Authors: Collins Jason , Podraza Nikolas J. , Li Jian , Cao Xinmin , Deng Xunming , Collins Robert W. 
Published: April 2011

AbstractPhase diagrams have been established to describe very high frequency (vhf) plasma-enhanced chemical vapor deposition (PECVD) processes for intrinsic hydrogenated silicon (Si:H) and silicon-germanium alloy (Si1-xGex:H) thin films using crystalline Si substrates that have been over-deposited with n-type amorphous Si:H (a-Si:H). The Si:H and Si1-xGex:H processes are applied for the top and middle i-layers of triple-junction a-Si:H-based n-i-p solar cells fabricated at University of Toledo. Identical n/i cell structures were co-deposited on textured Ag/ZnO back-reflectors in order to correlate the phase diagram and the performance of single-junction solar cells, the latter completed through over-deposition of the p-layer and top contact. This study has reaffirmed that the highest efficiencies for a-Si:H and a-Si1-xGex:H solar cells are obtained when the i-layers are prepared under maximal H2 dilution conditions.
Laser Crystallization of Silicon for Large Area Electronics
Authors: Sameshima Toshiyuki 
Published: April 2011

AbstractLaser crystallization of silicon is discussed for forming polycrystalline silicon thin films used to fabricate polycrystalline silicon thin film transistors (poly-Si TFTs). Laser-induced rapid heating is important for crystalline film formation with a low thermal budget. Structural and electrical properties of poly-Si films are discussed. Reduction of electrical active defects located at grain boundaries is essential for achieving poly-Si TFTs with high performances. The internal film stress is attractive to increase the carrier mobility. Recent development in laser crystallization methods with pulsed and continuous wave (CW) lasers is then reviewed. Control of the heat flow results in crystalline grain growth in the lateral direction, which is essential for fabrication of large crystalline grains. We also report an annealing method using a high power infrared semiconductor laser. High power lasers will be attractive for rapid crystallization of silicon films over a large area and activation of doped regions.
Defect characterization of polycrystalline silicon layers obtained by aluminum-induced crystallization and epitaxy
Authors: Van Gestel Dries , Gordon Ivan , Carnel Lodewijk , Beaucarne Guy , Poortmans Jef 
Published: April 2011

AbstractTo reduce the harmful influence of grain boundaries in polycrystalline Si layers we make absorber layers on foreign substrates with columnar grains with a grain width larger than the grain thickness. Such layers with a grain size in the range of ~1-100 µm can be obtained by aluminum-induced crystallization and epitaxy. Until now however, the open-circuit voltage of solar cells made from such layers was quasi-independent of the grain size. To understand this fact, defect etching and Electron Backscattered diffraction (EBSD) measurements were performed to investigate the crystallographic defects. A very large density (~ 109 cm-2) of intra-grain defects (IGD) was found. Room temperature Electron Beam Induced Current (EBIC) measurements were done to localize and investigate the electrically active defects. The intra-grain defects found with defect etching showed a strong recombination activity. These results indicate that the unexpected quasi-independence on the grain size of the open-circuit voltage of our pc-Si solar cells is due to the presence of numerous electrically active intra-grain defects.
Influence of Amorphous Layers on Performance of Nanocrystalline/Amorphous Superlattice Si Solar Cells
Authors: Madhavan Atul , Ghosh Debju , Noack Max , Dalal Vikram 
Published: April 2011

AbstractNanocrystalline Si:H is an important material for solar cells. The electronic properties of the material depend critically upon the degree of crystallinity, the efficacy of passivation of the grain boundaries and impurities, particularly oxygen, in the material. In this paper, we examine different degrees of passivation of grain boundaries by amorphous Si, by deliberately introducing various thicknesses of amorphous tissue layers at the grain boundaries. The device structure consisted of a p+nn+ cell on stainless steel where the base n layer was fabricated using alternating layers of amorphous (a-Si) and crystalline (nc-Si) phases, creating a superlattice structure. The thicknesses of the amorphous and crystalline phases were varied to study their influence on structural and electrical properties such as grain size and diffusion length. We find that <111> grain continued to be nucleate independently of the thickness of the amorphous layer, but the grain size in <220> grain decreased when the thickness of the tissue layer became very large. We also find that as the thickness of the amorphous tissue layer increased, the quantum efficiency at 800 nm decreased and the open circuit voltage increased. For significant thickness of amorphous layer, the transport properties degrade dramatically, causing an inflection in the I-V curve, probably because of difficulty of holes tunneling across the barriers.
Computational Solid Mechanics Modeling of Asperity Deformation and Pad-Wafer Contact in CMP
Authors: Jiang Bo , Muldowney Gregory P. 
Published: April 2011

ABSTRACTAsperity-scale pad deformation and dynamic pad-wafer contact area are crucial to the fundamental understanding of material removal and defect formation mechanisms in CMP. Pad asperity stress and strain are also central to characterizing pad wear rate during polishing and cut rate during conditioning. While it is very difficult to isolate and measure stress and strain in individual asperities, finite element modeling may be used in conjunction with experimental surface characterization to predict asperity-scale deformation and pad-wafer contact. Asperity sub-domains up to 1270 microns across are reproduced from three-dimensional point cloud data on porous polyurethane CMP pads obtained by confocal microscopy, meshed to high resolution, and analyzed using ABAQUS finite element software. Physical properties are derived from dynamic mechanical experiments. Pad stacks are simulated both with and without sub-pads. Results show that while a sub-pad increases pad-wafer contact area overall, it limits the local spreading of individual contact regions as polishing load increases. This finding identifies a direct mechanical origin of the trade-off in pad design between wafer-scale and die-scale planarity. As expected, the real contact area between a pad and wafer is much smaller than the cross-sectional or “bearing” area, but the difference is notably greater when a sub-pad is present. Values of asperity stress and strain under typical CMP polishing pressures reveal that plastic deformation takes place both on and beneath the contacting surface. Hence upon release of the polishing load the asperities do not fully rebound to their pre-compressed shapes. Each pass under the wafer thus reshapes the pad asperities such that a slightly different texture is presented upon the next pass. These deformation mechanics clarify the impact of top pad and sub-pad properties on real contact area, allowing better optimization of CMP pad performance.
Influence of Microstructure on Aggressive Chemical Mechanical Planarization Processes for Thick Copper Films
Authors: Andersen Patrick J. , Frary Megan 
Published: April 2011

ABSTRACTNovel die-stacking schema using through-wafer vias may require thick electrodeposited copper and aggressive first-step chemical mechanical planarization (CMP). However, the effect of microstructural parameters, including surface orientation and grain size, on the CMP behavior of thick electrodeposited copper is not well understood. Here we explore the relationship be-tween the surface orientation of copper grains and local CMP removal parameters using electron backscatter diffraction and topography correlation techniques. In the present work, solid copper disks are studied which are annealed to produce samples with differing grain sizes. In addition, aggressive CMP is performed on copper films (30 μm) electrodeposited on silicon. At the bulk level, the slurry composition is found to have the greatest effect on the removal rate and surface roughness. At the microstructural level, the nature of the grain boundaries (e.g. coincidence site lattice (CSL) vs. non-CSL boundaries) is shown to impact the depth of grooving at the grain boundaries. A relationship between surface orientation and local removal rate is found.
High Rate Silicon Carbide Polishing to Ultra-smooth Surfaces
Authors: White Michael , Moeggenborg Kevin , Batllo Francois , Gilliland Jeffrey , Naguib Nevin 
Published: April 2011

ABSTRACTSilicon Carbide has a unique combination of properties that include a nearly diamond-like hardness, intrinsic electrical semiconductivity and a high thermal conductivity. This combination of properties has led to it's use in a number of applications including substrates for Light Emitting Diodes (LEDs), power, RF (radio frequency) and other electronic devices in addition to mirror substrates and optical devices as well as stop layers in integrated circuit chip manufacture. In addition, the chemical inertness and high hardness of SiC has historically resulted in low removal rates during chemical mechanical Planarization (CMP). Recent efforts in our labs have led to being able to polish single crystal silicon carbide at removal rates up to 400 nm/hr yielding a root mean squared roughness on the order of a nanometer as determined by AFM and interferometry. The high rates and smoothness obtained are expected to translate to other types of silicon carbide. Fundamental studies by FTIR, streaming potential and ESCA have been done to elucidate the mechanism of silicon carbide polishing.