bluuebunny/crossref_metadata_2025_split huggingface dataset:
ESR Studies on Hot-Wire Amorphous Silicon
Authors: Unold T. , Mahan A. H. 
Published: April 2011

ABSTRACTWe measure a series of hot-wire (HW) amorphous silicon films grown with hydrogen contents cH varying between 0.5–17at.%. From constant photocurrent method (CPM) measurements and the steady-state photocarrier grating method (SSPG) we find good agreement with previous measurements on similar hot-wire films. Electron spin resonance measurements on the same samples, however, yield significantly higher spin densities than expected. A thickness series indicates a highly defective layer close to the substrate interface. We propose that this defective layer may be due to excessive out diffusion of hydrogen during growth at high temperatures, as seen by secondary ion mass spectroscopy. ESR measurements on light-degraded samples indicate an improved stabilityof samples with cH < 9at.%.
Modeling of a-Si:H Alloy Solar Cells on Textured Substrates
Authors: Zeman M. , van den Berg J. H. , Vosteen L. L. A. , Willemen J. A. , Metselaar J. W. , Schropp R. E. I. 
Published: April 2011

ABSTRACTComputer modeling is used as a tool for determining current matching in hydrogenated amorphous silicon (a-Si:H) alloy tandem cells on textured substrates. The increasing complexity of a-Si:H based solar cells requires continuous extending and testing of the computer models which are used for their simulation. To take light scattering at the textured interfaces of the cell into account we developed a multi-rough-interface optical model GENPR02 which was used for calculating the absorption profiles in the solar cells. The results of a sensitivity study of the parameters of this optical model such as the scattering coefficients of the reflected and transmitted light and the dependence of scattered light on the in-going and out-going angle are presented. In order to simulate multi-junction solar cell as a complete device we implemented a novel model for tunnel/recombination junction (TRJ), which combines the trap assisted tunneling and enhanced carrier transport in the high field region of the TRJ.The current matching conditions were determined both for a-Si:H and a-SiGe:H bottom cells, while the top cell was an a-Si:H cell. We investigated the influence of light scattering at the textured interfaces and of the thickness of the intrinsic layer of the bottom cell on the optimal ratio (i2/i1) between the thicknesses of the bottom (i2) and top (il) intrinsic layers in the current-matched cell. The results show that increasing amount of scattering at the textured interfaces leads to higher efficiencies and lower ratio (i2/i1) in the current-matched cell. The use of a-SiGe:H material in the bottom cell leads to higher efficiency and 3 to 4 times lower i2/i1 ratio than in case of a-Si:H/a-Si:H cells.
Computer Analysis of a-Si:H Based Double Junction Solar Cells
Authors: Palit N. , Chatterjee P. 
Published: April 2011

ABSTRACTAn integrated electrical-optical model has been used to simulate and examine ways of optimising the performance of double junction solar cells, where both the component cells have a-Si:H absorber layers of identical material quality. In the optical modelling part we take into account both specular interference effects; and diffused reflectances and transmittances due to interface roughness. The model simulates carrier transport in the junction between the two p-i-n subcells with the help of a thin heavily defective recombination layer (RL) having a reduced band gap.Our results reveal that in order to simulate the current-voltage and the quantum efficiency (QE) characteristics of these cells, window losses and light-trapping effects need to be properly accounted for. Results indicate that the highest open-circuit voltage is attained when the majority carrier quasi-Fermi levels on either side of the RL coincide. Also for the highest multijunction cell efficiency the thicknesses of the component subcells are such that the electric field in both are fairly close to one another. Finally, the QE under AM 1.5 bias light at the maximum power point has been shown to be extremely sensitive to thickness variations of the component subcells and hence an useful tool for multijunction cell optimisation.
Characterization and Modeling of Frequency Dispersion in Amorphous Silicon Thin Film Transistors
Authors: Slade H. C , Shur M. S. , Ytterdal T. 
Published: April 2011

ABSTRACTThe large number of localized energy states in amorphous and polysilicon thin film transistors causes non-crystalline effects in both the DC and AC transistor characteristics. The observed frequency dispersion of the device capacitances is linked to the characteristic times of electron trapping and emission from localized thin film transistors and is modeled analytically by introducing effective RC time constants, which are proportional to the electron transit times, determined by the field effect mobility. The small-signal gate-to-source and gate-to-drain capacitances have been derived using Meyer's approach, which takes into account the non-zero drain-source voltage to achieve a partitioning of the channel capacitance. We have verified the model for amorphous silicon thin film transistors for varying gate lengths and frequencies.
Near-Intrinsic Microcrystalline Silicon for Use in Thin Film Transistors
Authors: Froggatt M. W. D. , Milne W. I. , Powell M. J. 
Published: April 2011

ABSTRACTInverted-staggered thin film transistors (TFTs) incorporating hydrogenated microcrystalline silicon for both contact and channel regions have been fabricated by plasma enhanced chemical vapour deposition (PECVD) using the high hydrogen-dilution method. The deposition parameters for the channel region were chosen to yield near-intrinsic material with a dark conductivity activation energy of 0.7 eV and a Tauc gap of 1.98 eV, while the doped contact layer was optimised to produce a high dark conductivity of 10 S/cm.These devices exhibit a low off-current but the field effect mobility is found to be lower than that of similar devices incorporating an optimised amorphous silicon channel region. The mobility activation energy in these devices is similar to those incorporating an amorphous channel, but the mobility pre-factor is reduced. We propose that this is due to inhomogeneous conduction through a microcrystalline region with a smaller grain size at the dielectric/channel interface.
Amorphous Silicon Thin-Film Transistors with a Hot-Wire Active-Layer Deposited at High Growth Rate
Authors: Chu V. , Jarego J. , Silva H. , Silva T. , Boucinha M. , Brogueira P. , Conde J. P. 
Published: April 2011

ABSTRACTHigh-quality thin film transistors (TFT) with hydrogenated amorphous silicon (a-Si:H) deposited by hot-wire (HW) chemical vapor deposition as the active layer at growth rates above 20 Å/s are compared to TFTs with a-Si:H deposited by RF glow discharge at 1 Å/s. The subgap absorption measured by the constant photocurrent method and steady-state photoconductivity measured between source and drain are used to characterize the a-Si:H in the TFT. The activation energy of the dark conductivity is measured as a function of the gate voltage to obtain the position of the Fermi level. The effect of a bias stress on the TFT transfer curve is obtained.
Time Dependence of the Reverse Current in Amorphous Silicon Schottky Diodes
Authors: Aflatooni K. , Hornsey R. , Nathan A. 
Published: April 2011

ABSTRACTWe present measurement results of the time-dependent reverse current in amorphous silicon Schottky diodes for a broad range of bias voltage stress conditions. The resultant behavior can be divided into three regimes, depending on the bias. At low biases, the reverse current exhibits a power-law dependence attributable to dispersive electron transport. In the medium bias regime, the current shows a dramatic increase which may be due to enhanced thermionic emission and tunneling of electrons across the barrier, enabled by hole transport to the metal-semiconductor interface. At high biases, the effects of prolonged stress were found to be irreversible. Here, an eventual decrease in reverse current was observed, with an associated loss of rectifying characteristics.
Structure, Electronic Properties, Defects and Doping of AlN Using a Self-Consistent Molecular Dynamics Method
Authors: Stumm Petra , Drabold D. A. 
Published: April 2011

ABSTRACTMolecular dynamics simulations are employed to study native defects and dopants in AlN. We use local basis density functional theory within the local density approximation where charge transfer between the ions is included in a self-consistent fashion. Employing this code we find reasonable agreement for the band structure compared to other recent calculations, suggesting the suitability of our method to adequately describe AlN.Wurtzite and zincblende 96 atom AlN cells are used to study the relaxations and electronic properties of common defects in the crystal structure, including vacancies and antisites. We investigate the electronic signatures of these defects. The local topology of column-IV impurities in anion and cation sites is studied. We analyze the lattice relaxations and electronic consequences of these impurities and identify midgap defect, donor and acceptor levels.
Movpe Growth and Characterization of AlxGa1-xN Layers on Sapphire
Authors: Clur S. , Briot O. , Rouviere J. L. , Andenet A. , Le Vaillant Y-M. , Gil B. , Aulombard R. L. , Demangeot J. F. , Frandon J. , Renucci M. 
Published: April 2011

ABSTRACTAlGaN is an important material for the realization of nitride heterostructures, involved in most device designs. We have studied the growth of this alloy using low pressure MOVPE (76 Torr), and using triethyl-gallium (TEGa), trimethyl-aluminum (TMA1) and ammonia (NH3) as precursors. First the solid -gas aluminum segregation was studied in order to calibrate the incorporation of Al in the solid phase. We found that aluminum is more readily incorporated than gallium in the solid, leading to an apparent Al segregation coefficient greater than unity. A simple kinetic model is used to fit the experimental data. Scanning electron microscopy has been used to investigate the morphology of the samples through the whole range of Al content (x = 0 to 1), and we observe a clear evolution of the surface features versus aluminum concentration: at low Al contents, small (below 1 pm) hexagonal holes are observed while at high Al, acicular features are observed, with a sudden transition between those morphologies around x = 0.5. Transmission electron microscopy was used to analyze the crystalline structure of these samples. Finally, the samples were studied by low temperature (2K) reflectivity and Raman spectroscopy. We report the evolution of the optical quality of samples (x < 0.4) versus Al content, as evaluated from the broadening of the observed excitonic transitions in the 2K reflectivity.
Photoluminescence of Strain-Engineered MBE-Grown GaN and InGaN Quantum Well Structures
Authors: Krüger Joachim , Kisielowski Christian , Klockenbrink Ralf , Sudhir G. S. , Kim Yihwan , Rubin Michael , Weber Eicke R. 
Published: April 2011

ABSTRACTThe paper describes the influence of strain on the optical quality of GaN films grown by MBE on c-plane sapphire. The photoluminescence (PL) line width of the donor-bound exciton can be designed to be as narrow as 1.2 meV by actively utilizing hydrostatic and biaxial stress components. Unstrained p-type Mg-doped GaN films exhibit comparably narrow near band edge transitions. A sharp PL line at 3.261 eV in some of our films is identified as the donor bound exciton of the cubic phase. The formation of these cubic inclusions can be stimulated by a high III/V flux ratio at the growth temperature of T = 725°C. The PL spectrum of an InGaN multi quantum well structure is significantly broadened compared with the spectra of single quantum well structures. Combination of PL and TEM indicates that this effect relates to a progressive increase of the quantum well widths and their spacing along the growth direction. It is argued that strain affects the growth rate and the incorporation of Indium into the quantum well structures.
Influence of Free Charge on the Lattice Parameters of GaN and Other Semiconductors
Authors: Leszczyński M. , Bąk-Misiuk J. , Domagała J. , Suski T. 
Published: April 2011

ABSTRACTLattice parameters of semiconductors depend on the concentration of free electrons via the deformation potentials of the occupied minima of the conduction bands. In the presented work we examined the lattice parameters of variously doped GaN samples (epitaxial layers on sapphire and on SiC, bulk crystals grown at high hydrostatic pressure and homoepitaxial layers). The following dopants were used: Si, Mg and O. The measurements were performed using high resolution X-ray diffractometry. The results indicate that free electrons expand the lattice what confirms a negative value of the deformation potential of the Γ minimum of the conduction band. However, for Mg-doping (acceptor) we observed the lattice expansion as well. This violates the Vegard's law, as Mg ions are smaller than Ga ions.
Processing Challenges for GaN-Based Photonic and Electronic Devices
Authors: Pearton S. J. , Ren F. , Shul R. J. , Zolper J. C. , Katz A. 
Published: April 2011

ABSTRACTThe wide gap materials SiC, GaN and to a lesser extent diamond are attracting great interest for high power/high temperature electronics. There are a host of device processing challenges presented by these materials because of their physical and chemical stability, including difficulty in achieving stable, low contact resistances, especially for one conductivity type, absence of convenient wet etch recipes, generally slow dry etch rates, the high temperatures needed for implant activation, control of suitable gate dielectrics and the lack of cheap, large diameter conducting and semi-insulating substrates. The relatively deep ionization levels of some of the common dopants (Mg in GaN; B, Al in SiC; P in diamond) means that carrier densities may be low at room temperature even if the impurity is electrically active - this problem will be reduced at elevated temperature, and thus contact resistances will be greatly improved provided the metallization is stable and reliable. Some recent work with CoSix on SiC and W-alloys on GaN show promise for improved ohmic contacts. The issue of unintentional hydrogen passivation of dopants will also be covered - this leads to strong increases in resistivity of p-SiC and GaN, but to large decreases in resistivity of diamond. Recent work on development of wet etches has found recipes for AlN (KOH), while photochemical etching of SiC and GaN has been reported. In the latter cases p-type materials is not etched, which can be a major liability in some devices. The dry etch results obtained with various novel reactors, including ICP, ECR and LE4 will be compared - the high ion densities in the former techniques produce the highest etch rates for strongly-bonded materials, but can lead to preferential loss of N from the nitrides and therefore to a highly conducting surface. This is potentially a major problem for fabrication of dry etched, recessed gate FET structures.
Toward Growing III-V Clusters with Metalorganic Precursors
Authors: Demchuk A. , Porter J. , Koplitz B. 
Published: April 2011

ABSTRACTThe present work reports on the formation of GaN-containing clusters from metalorganic precursors by combining pulsed laser photolysis and pulsed nozzle methods. Ammonia (NH3) and triethylgallium (C2H5)3Ga (TEG) or trimethylgallium (CH3)3Ga (TMG) with He, Ar, or N2 as the carrier gas are introduced into a high vacuum chamber via a specialized dual pulsed nozzle source. The light from an ArF excimer laser (193 nm, 23 ns FWHM) is focused into the mixing and reaction region of the nozzle source, and the products are then mass analyzed with a quadrupole mass spectrometer. Efficient laser-assisted growth of (GaN)x-containing clusters is shown with this technique.
InxGa(1-x)N Alloys as Electronic Materials
Authors: Semchinova O. K. , Alexandrov S. E. , Neff H. , Uffmann D. 
Published: April 2011

ABSTRACTIn this work, we present growth of InxGa(1-x)N films by CVD technique and their optical characterization. Experimental results indicate that these films are promising materials for semiconductor device applications. We focus on solar cells and present preliminary experimental data on prototype devices.
Electrical Properties of Schottky Contacts of TiW on RTCVD Si1-x-yGexCy Films
Authors: Mi Jian , Zhang Yilu , Warren Patricia , Yang Cary Y. 
Published: April 2011

ABSTRACTHigh-quality epitaxial Si1-x-yGexCy layers were grown on Si by rapid thermal chemical vapor deposition. Schottky diodes of TiW/SiGeC were fabricated using conventional Si processes. I-V and C-V measurements were performed to assess effects of crystal defects in the alloy on the electrical properties. For defective SiGeC films due to non-substitutional carbon, high series resistance and additional tunneling current were measured under forward bias, as well as leakage current under reverse bias. A transport mechanism of deep generation/recombination centers formed by carbon complexes is proposed to explain the I-V characteristics.
Selective Rapid Thermal Chemical Vapor Deposition of Titanium Disilicide on Silicon and Polysilicon
Authors: Nie Lixin , Weintraub Chad E. , Öztürk Mehmet C. 
Published: April 2011

ABSTRACTSelective rapid thermal chemical vapor deposition (RTCVD) of TiSi2 is a promising alternative to the conventional self-aligned suicide (SALICIDE) process to form low-resistivity contacts to ultra-shallow source/drain junctions of deep submicron MOS transistors. The process makes use of TiCl4 and SiH4 as the Ti and Si source gases in a temperature range of 750 – 825 °C. The primary advantage of the process over the conventional SALICIDE process is that by providing sufficient levels of Si from the gas phase, junction consumption can be eliminated. Furthermore, the process eliminates wet etch and reduces the number of process steps from four to one. For the process to be compatible with CMOS manufacturing, low-resistivity TiSi2 deposition must be achieved on both source/drain junctions as well as the poly cry stalline silicon gate electrode. It is the objective of this paper to compare basic characteristics of the process on these two surfaces. The results indicate that the crystallinity of the surface on which TiSi2 is deposited can impact the nature of the deposited film. Our experimental results indicate enhanced Si consumption on polysilicon, smaller TiSi2 grains and consequently higher sheet resistance. However, the process conditions and TiSi2 thickness can be optimized to achieve consumption free TiSi2 deposition on the junctions with acceptable performance on polysilicon.
Benefits and Limitations of Radiatively Heated Suszeptors
Authors: Kersch A. 
Published: April 2011

ABSTRACTIn radiatively heated single wafer reactors, suszeptors are used to control the wafer temperature. This temperature, however, might be significantly different than the suszeptor temperature. The reason is that the conductive coupling of the suszeptor to the wafer is often small, even when the wafer is placed directly on the suszeptor, and the temperature difference is then determined by the optical properties and the spectral distribution of the illumination.In this paper these temperature differences are calculated with reactor scale simulation for typical geometries. Furthermore the pattern effect is investigated whose magnitude depends on the pattern and the configuration of wafer and suszeptor.The radiation is modeled with Monte Carlo and the optical properties of the surfaces are calculated from the electromagnetic theory of thin films.A commercial system with a thick suszeptor for Si-CVD at reduced pressure serves as an example for the size of the discussed effect. The comparison of the simulation with measurements provides a model validation. Then, a typical RTP system equipped with a thin suszeptor is investigated. The configuration is identified under which the thin suszeptor leads to a reduced temperature variation in case of a changing wafer coating and in case of a pattern.
A New Temperature Compensation Method For Si Wafers In Rapid Thermal Processor Using Separated Si Rings As Susceptors
Authors: Lee Kuo-Chung , Chang Hong-Yuan , Hwu Jenn-Gwo 
Published: April 2011

ABSTRACTA new temperature compensation concept suitable for rapid thermal processor (RTP) with non-uniform temperature distribution was proposed in this work. Concentric Si rings with different diameters are placed between wafer and planar susceptor and are regarded as a patterned susceptor. By properly arranging the Si rings on the planar quartz or Si susceptor, one can make the semiconductor wafers have more uniform temperature distribution in a non-uniform temperature RTP system. This is a very simple and cheap method for solving the temperature non-uniformity problem in the RTP system.
Understanding the Impact of Batch vs. Single Wafer in Thermal Processing Using Cost of Ownership Analysis
Authors: Hossain-Pas S. , Pas M. F. 
Published: April 2011

IntroductionBatch thermal processing satisfies device requirements for 0.5μm and larger technology nodes for silicon semiconductor manufacturing and continues to satisfy these requirements as feature sizes decrease beyond 0.5μm to 0.35μm. At the transition from 0.35μm to 0.25μm, source/drain (S/D) anneal, TiSi form, and TiSi anneal require rapid thermal processing (RTP) because of improvements in thermal budget, lateral dopant diffusion, and in silicidation, with RTP. RTP and rapid thermal chemical vapor deposition (RTCVD) become enabling technology for devices at 0.25μm and smaller technology nodes.A cost of ownership (CoO) analysis provides a comparison between the financial impact of alternatives and helps in determining the lowest cost answer for that process, assuming all other process parameters can be met equally by all alternatives. This report analyzes primary cost drivers, their importance within each analysis, and potential for improvements which may cause a significant change in CoO values at 200mm.
Gate Stack Formation using a Fully Integrated Single Wafer Cluster Tool
Authors: Frystak David C. , Kuehne John , Wise Rick , Fowler Burt , Grothe Phil , Barnett Joel , Miner Gary 
Published: April 2011

ABSTRACTA single wafer gate cluster tool has been evaluated in an effort to quantify the effects of gate clustering on defect density, process capability and device performance. The single wafer gate cluster tool consists of a hydrofluoric vapor (HF-vapor) pre-gate cleanup module, a rapid thermal oxidation (RTO) module and a polysilicon rapid thermal chemical vapor deposition (RTCVD) module. The gate dielectric charge to breakdown (Qbd) of capacitor structures formed using the integrated single wafer gate cluster tool process sequence typically averaged 9.1 to 12.3 coulombs per square centimeter (C/cm2). Excellent gate oxide integrity yield values in the range of 99.8% to 100% were also routinely obtained. The films were free of low field and mid field gate dielectric breakdown events and the devices exhibited dielectric breakdown field strength in excess of fourteen megavolts per centimeter (MV/cm). The cluster tool process was successfully integrated into a transistor device flow. The characteristics of devices formed using the cluster tool process were equivalent to those of devices formed using conventional batch processing at the gate level.
Creation and Annealing out Mechanism of Defects in Ion-Implanted Si Crystals Investigated by Positron Annihilation
Authors: Tanigawa S. 
Published: April 2011

ABATRACTVacancy-type defects in Si crystals introduced by ion implantation have been investigated by an energy-variable positron beam The present paper describes the general feature of point defects induced by ion implantation from the point of view of their dependence on implanted ion species, ion dose, ion energy, implanted targets, thermal after implantation, the presence of oxide overlayers and so on.