bluuebunny/crossref_metadata_2025_split huggingface dataset:
Fabrication of Tin Loaded Resorcinol Formaldehyde Aerogel Spheres for Extreme Ultraviolet Source Emission
Authors: Paguio Reny R , Nikroo Abbas , Frederick Chris A , Hund Jared F , Thi Mary 
Published: April 2011

ABSTRACTLow density Sn doped resorcinol formaldehyde aerogels were fabricated for extreme ultraviolet (EUV) source emission lithography experiments (EUVL). EUVL is a candidate to succeed conventional optical lithography. EUVL requires a reliable emission (13.5 nm) source. One type of source is a laser-produced plasma. Several laser-plasma source materials have been considered such as lithium, xenon and tin. Tin is considered ideal because it has a high conversion effeciency. However, solid tin targets create a large quantity of debris which can damage the optics of the laser system. As a solution to this problem, we minimized the amount of tin by dispersing it in a low density resorcinol formaldehyde (R/F) matrix. These targets were fabricated into small spheres using the microencapsulation method. Initial experimental results show that these targets yield a similar intensity in the EUV regime when compred to a full density Sn target.
Tin Oxide Based Transparent Ferromagnetic Semiconductor Thin Films by Spray Pyrolysis
Authors: Kashyap Subhash Chand , Gopinadhan Kalon , Chaudhary Sujeet , Pandya Dinesh K. 
Published: April 2011

ABSTRACTCobalt- and manganese-incorporated SnO2 thin films exhibiting room temperature ferromagnetism have been prepared by spray pyrolysis technique. Analysis of structural, magnetic and electrical properties of Sn1−xCoxO2−δ thin films indicates that the origin of ferromagnetism, seen for x<0.125, lies in the polarization of free carriers, leading to the necessary exchange interaction. The films exhibit a Curie temperature > 500K. The XRD study indicates that Sn1−xCoxO2−δ films with x<0.125 is single phasic with no evidence of any Co clusters or magnetic oxides, which supports the intrinsic nature of the ferromagnetism. The electrical transport studies indicate that extra electrons are generated on Co-incorporation in the SnO2 lattice. In the case of Sn1−xMnxO2·δ films, ferromagnetism is observed in a narrow range of manganese (0.075≤x≤0.10) with an associated increase in carrier concentration. The detailed analysis of various properties suggests that Mn-ions have been incorporated in the SnO2 lattice, and there is absence of any Mn-clusters, Mn-related secondary phases.
AC-Susceptibility Measurements of the Superparamagnetic Relaxation in Systems of Ni1−xZnxFe2O4 Nanoparticles
Authors: Adair Antony , Galindo Jose T. Elizalde , Botez Cristian , Flores Verónica Corral , Baques Dario Bueno , Cobas Luis Fuentes , Matutes-Aquino José A. 
Published: April 2011

ABSTRACTWe have investigated the effect of Zn-doping on the superparamagnetic relaxation of nanosized nickel ferrite particles. Our temperature-resolved AC-susceptibility data demonstrate that the relaxation of these systems is well described by an Arrhenius-type law, behavior which allows a precise determination of the effective energy barrier to magnetization reversal, Ueff. We observe that the Zn-content dependence of Ueff exhibits a pronounced maximum when half on the magnetic Ni2+ ions are replaced by nonmagnetic Zn2+. The average blocking temperature (measured at a given frequency) shows a similar behavior. The observed increase of Ueff is attributed to an enhanced magnetic anisotropy induced by the crossover between two magnetocrystalline regimes. Our findings demonstrate the ability to control the superparamagnetic relaxation of ferrimagnetic spinel nanoparticles through chemical manipulations.
Thermo-optical Properties of Nanoparticles and Nanoparticle Complexes Embedded in Ice: Characterization of Heat Generation and Actuation of Larger-scale Effects
Authors: Richardson Hugh H. , Hickman Zachary N. , Thomas Alyssa C. , Kordesch Martin E. , Govorov Alexander O. 
Published: April 2011

ABSTRACTWe have investigated the thermo-optical properties of gold NPs embedded in an ice matrix [1]. Resonant laser light of relatively weak intensity is able to melt ice with embedded Au NPs, whereas even a very intense laser beam does not melt ice alone. This comes from strong absorption in Au NPs in the regime of plasmon resonance. By recording time-resolved Raman signals, we observe the melting process and determine the threshold melting power , where is the background temperature. We also observe relatively large scattering in the threshold laser intensity that leads to melting of the ice because of the mesoscopic nature of the sample. We can understand this observation using the TEM images of NPs, showing that geometry of NP complexes varies greatly. In our recent theoretical paper we showed that the local temperature inside and around a NP complex depends strongly on its geometry, and this leads to large scattering for the measured as a function of the reduced temperature, for different complexes [2].We recently discovered that NPs immobilized on glass surfaces can be characterized by single particle spectroscopy. Single and small NP clusters can be discriminated using the integrated intensity of the plasmon emission band. A cluster of four gold NPs has ∼ 4 times the intensity of a single gold NP. When the NPs are aggregated into a cluster then broadening of the intensity profile plot is not observed Gold NPs that are not clustered together but are found within the excitation volume will lead to a broadening of a cross sectional slice. We will use these principles to determine the amount of heat generation from single and clustered gold NPs.[1] H. H. Richardson, Z. N. Hickman, A. O. Govorov, A. C. Thomas, W. Zhang, M. E. Kordesch, Nano Lett. (2006); DOI: 10.1021/nl060105l.[2] A. O. Govorov, H. H. Richardson, W. Zhang, and T. Skeini, Nanoscale Res. Lett. 1, 100101 (2005).
Influence Of Cation Vacancies on the Ferroelectric Properties of SBT Doped with Praseodymium
Authors: Mata Jorge , Durán Alejandro , Martínez Eduardo , Siqueiros Jesus 
Published: April 2011

ABSTRACTDielectric and ferroelectric properties were studied in Sr0.85−yPr0.15VyBi2Ti2O9 polycrystalline samples where cation vacancies were induced. DRX characterization shows that the Aurivillius structure can accept 10% of induced vacancies without precipitation of second phases. Thermoelectric analysis and ferroelectric hysteresis measurements show that the vacancies modify the transition temperature Tc and slightly the polarization values. From the ε-T curves it was observed that the polarization magnitude and Tc are affected as a consequence of the induced vacancies. A broad peak at Tc, typical of the diffuse phase transition behavior of this material was also observed. Furthermore, the induced vacancies in praseodymium-modified SBT produce an increased on Tc from ∼180 to ∼240 °C, these facts show that induced vacancies in the structure are a tuning mechanism for the dielectric and ferroelectric properties.
Dielectric Permittivity Enhancement in PZT by Light Doping with Gd
Authors: Portelles Jorge J. , Almodovar Nelson S , Fuentes Juan , Martinez Eduardo , Raymond Oscar , Heiras Jesus L , Siqueiros Jesus M 
Published: April 2011

ABSTRACTPbZr0.53Ti0.4703 doped with 0.6% at. of Gd2O3 has been produced following the traditional solid state reaction technique. The ferro-paraelectric transition temperature is reduced from 386 °C to 352 °C. Remnant polarization and coercive field measurements were made from the hysteresis loops obtained at 23 °C and at different applied electric fields up to a maximum of 17 kV/cm. Piezoelectric performance was studied in the 4 Hz to 4 MHz frequency range at 25 °C and the radial electromechanical coupling factor was determined. A detailed electrical conductivity study in the 30-450 °C temperature range is performed in a wide frequency interval. The different participating transport mechanisms are elucidated and the corresponding activation energies were determined by fitting the experimental data. In particular, in the 30 to 300 °C temperature interval, the ac conductivity follows Jonscher universal relaxation law.
Brillouin and Raman Scattering Studies on the Relaxor Ferroelectric 0.71Pb(Ni1/3Nb2/3)O3-0.29PbTiO3 Single Crystal
Authors: Tsukada Shinya , Ike Yuji , Kano Jun , Wang Ruiping , Shimojo Yoshiro , Sekiya Tadashi , Kojima Seiji 
Published: April 2011

ABSTRACTBrillouin and Raman spectra of a 0.71Pb(Ni1/3Nb2/3)O3-0.29PbTiO3 single crystal were measured in two light scattering geometries to elucidate the origins of central peaks that is related to the dynamics of the polar nanoregions. Two Lorentzian-type central peaks exist in the Brillouin spectra. The shape and the full width at half maximum of the broader peak in Brillouin spectra are almost same as that observed in Raman spectra. This indicates that two relaxations occur in the polar nanoregions. These two processes might be originated from the different switching directions of polarization.
Advanced Thermal Interface Materials
Authors: Zhang Yimin , Xiao Allison , McVey Jeff 
Published: April 2011

ABSTRACTThermal interface materials (TIMs) are used to dissipate thermal energy from a heat-generating device to a heat sink via conduction. The growing power density of the electronic device demands next-generation high thermal conductivity and/or low thermal resistance TIMs. This paper discusses the current state-of-art TIM solutions, particularly fusible particles for improved thermal conductivity. The paper will address the benefits and limitations of this approach, and describe a system with unique filler morphology. Thermal resistance and diffusivity/conductivity characterization techniques are also discussed.
Smart Lead-Free Solders via Shape-Memory Alloy Reinforcement
Authors: Dutta Indranath , Majumdar Bhaskar S. , chen Tiandan , Chung Koh Choon , Ye Bing 
Published: April 2011

ABSTRACTMicroelectronic solder joints are exposed to aggressive thermo-mechanical cycling (TMC) during service, resulting in strain localization near solder / bond-pad interfaces, which eventually leads to low-cycle fatigue (LCF) failure of the joint. In order to mitigate these strain concentrations and thereby improve LCF life, a ‘smart solder’ reinforced with a martensitic NiTi based shape memory alloy (SMA) is being developed. This paper presents an overview of processing, characterization and modeling of these composite solders, and articulates the role of NiTi particles on strain evolution in composite solders. Based on finite element modeling and experiments on model single fiber composites, it is shown that NiTi pariculate reinforcements can reduce inelastic strain levels in the solder via shape recovery associated with the B19′→B2 transformation. In situ TMC studies in the SEM, in conjunction with strain analysis via digital image correlation, show evidence of reverse deformation in the solder commensurate with the NiTi phase transformation, demonstrating the conceptual viability of the smart solder approach. Details of processing and joint formation, and the resultant microstructures of smart solder are discussed. Finally, results of TMC experiments on monolithic solder and NiTi/solder composite joints are reported, highlighting the beneficial effect of shape-memory transformation in reducing inelastic strain range, and hence enhancing the LCF life, of solders.
High Performance Conductive Adhesives for Lead-Free Interconnects
Authors: Li Yi , Wong ChingPing 
Published: April 2011

ABSTRACTTin-lead solder alloys are widely used in the electronic industry. With the recognition of toxicity of lead, however, electrically conductive adhesives (ECAs) have been considered as one of the most promising alternatives of tin-lead solder. While silver is the most widely used conductive fillers for ECA, silver migration has been the major concern for the high power and fine pitch applications. In this paper, a novel approach of using self-assembled monolayers (SAMs) passivation has been introduced to control the silver migration in nano-Ag ECAs. The protection of silver nano particles with SAMs reduced the silver migration dramatically and no migration was observed upon application of high voltages (up to 500 V) due to the formation of surface chelating compounds between the SAM and nano silver fillers. Unlike other migration control approaches which sacrifice electrical performance, the SAM passivated nano Ag fillers also enhanced the electrical conductivity and current carrying capability of adhesive joints significantly due to the improved interfacial properties and high current density of those molecular monolayers. The joint resistance of the SAM incorporated nano-Ag conductive adhesive could be achieved as low as 10−5 Ohm (the contact area is 100 ×100 μm2) and the maximum allowable current was higher than 3500 mA. As such, a fine pitch, high performance, non-migration and high reliability adhesives are developed for potential solder replacement in high voltage, high power device applications.
Surface Flatness and Interface Stability of Ni-P Film using New Electroless Plating Method with the Emulsion of Supercritical CO2
Authors: Uchiyama Hiroki , Sone Masato , Ishiyama Chiemi , Higo Yakichi 
Published: April 2011

ABSTRACTThis paper proposes a novel coating method combining supercritical fluid technology and electroless plating in a hybrid technique. The electroless plating reactions are carried out in an emulsion of supercritical carbon dioxide (sc-CO2) and an electroless plating solution with surfactants. The Ni-P film obtained by this proposed technique was a uniform and conformal film without the pinholes and nodules. The Ni-P film fabricated by our technique was smoother and more uniform than the substrate after pretreatment and the conventional electroless plating.
Influence of Full-filled Polymer Molding on High-frequency Circuits
Authors: Nakanishi Kiyoshi , Fujimoto Masayuki 
Published: April 2011

AbstractThe influence of full-filled polymer molding on high-frequency circuits in cellular phones is evaluated using computer simulations and high-frequency measurements. Polymer-molded high-frequency circuits of cellular phones increase radiation harmonics and line and antenna phase errors. High-frequency properties are degraded due to a decrease in line impedance and an increase in stray capacitance of land electrodes that are used in the assembly of components. Degradation problems caused by full-filled polymer molding can be alleviated by appropriate circuit design, such as by adjusting the distance of components and creating more effective electromagnetic shielding. Better circuit design must satisfy the specifications of several different types of cellular phones, including global systems mobile telecommunications and digital cellular systems.
An Approach for Characterizing Residual Mechanical Stress Caused by Packaging Processes
Authors: Hirsch Soeren , Schmidt Bertram 
Published: April 2011

Abstractthis paper reports on a method for estimation and minimization of mechanical stress on MEMS sensor and actuator structures due to packaging processes based on flip chip technology. For studying mechanical stress a test chip with silicon membranes was fabricated. Finite element method simulation was calculate the stress profile and to determine the optimum positions for placing the resistor network.
Recent Advances in 3D Integration at IMEC
Authors: De Moor Piet , Ruythooren Wouter , Soussan Philippe , Swinnen Bart , Baert Kris , Van Hoof Chris , Beyne Eric 
Published: April 2011

ABSTRACTIMEC is focusing its 3D-integration technology developments in 3 distinct directions: 3D-System-in-a-Package (3D-SiP), 3D-Wafer-Level-Packaging (3D-WLP) and 3D-Stacked-IC (3D-SiC). First, the background of these separate approaches will be given. Next the materials and technologies involved, the typical characteristics and the ongoing developments will be discussed. Finally, the roadmap for the 3D-integration in IMEC will be presented.
Through Wafer Interconnects for 3-D Packaging
Authors: Moll Amy J. , Knowlton William B. , Oxford Rex 
Published: April 2011

ABSTRACTSemiconductor technology has reached a point in its evolution where the package now plays an important role in the overall performance of the device. In MEMs devices, the package is often more than 75% of the cost and has a significant impact in the overall size. Through wafer interconnects allow for advanced 3-D packaging schemes. Additional miniaturization, increased interconnection density, and higher performance is possible by stacking die with through wafer interconnects. Key technologies for creating TWIs are the ability to create a via through the silicon wafer, dielectric isolation of the via metal from the substrate, and filling or coating the via with a conducting material. Through wafer interconnects have been demonstrated in silicon wafers. The process to create TWIs has been optimized. The TWI has been tested electrically and proven reliable. TWIs were incorporated into an active device wafer and a two die stack connected through solder bump technology. In current work, specific applications which take advantage of the benefits of TWI's are being explored including 3-D inductors, unique sensor packages and MEMs applications.
Design and Fabrication of 3D Microprocessors
Authors: Morrow Patrick , Black Bryan , Kobrinsky Mauro J , Muthukumar Sriram , Nelson Don , Park Chang-Min , Webb Clair 
Published: April 2011

ABSTRACTStacking multiple device strata can improve system performance of a microprocessor (μP) by reducing interconnect length. This enables latency improvement, power reduction, and improved memory bandwidth. In this paper we review some of our recent design analysis and process results which quantitatively show the benefits of stacking applied to μPs.We report on two applications for stacking which take advantage of reduced wire length- “logic+logic” stacking and “logic+memory” stacking. In addition to optimizing minimum wire length, we considered carefully the thermal ramifications of the new designs. For the logic+memory application, we considered the case of reducing off-die wiring by stacking a DRAM cache (32 to 64MB) onto a high performance μP. Simulations showed 3x reduced off-die bandwidth, Cycles Per Memory Access (CPMA) reduction of 13%, and a 66% average bus power reduction. For logic+logic applications, we considered a high performance μP where the unit blocks were repartitioned into two strata. For this case, simulations showed that stacking can simultaneously reduce power by 15% while increasing performance by 15% with a minor 14° C increase in peak temperature compared to the planar design. Using voltage scaling, this translates to 34% power reduction and 8% performance improvement with no temperature increase. We found that these results can be further improved by a secondary splitting of the individual blocks. As an example, we split a 32KB first level data cache resulting in 25% power reduction, 10% latency reduction, and 20% area reduction.We also discuss the fabrication of stacked structures with two complimentary process flows. In one case, we developed a 300mm wafer stacking process using Cu-Cu bonding, wafer thinning, and through-silicon vias (TSVs). This technology provides reliable bonding with non-detectable bonding-interface resistance and inter-strata via pitch below 8μm. We investigated the impact of this wafer stacking process to the transistor and interconnect layers built using a 65nm strained-Si/Cu-Low-K process technology and found no impact to either discrete N- and P-MOS devices or to thin 4Mb SRAMs. We verified fully functional SRAMs on thinned wafers with thicknesses down to 5μm. Although wafer stacking leads itself well to tight-pitch same-die-size stacking, die stacking enables integration of different size dies and includes opportunity to improve yield by stacking known good dies. We demonstrated a die stack process flow with 75μm thinned die, TSV, and inter-strata via pitch below 100μm. We also found negligible impact to transistors using this process flow. Multiple stacks of up to seven 75μm thin dies with TSVs were fabricated and tested. Prospects for high volume integration of 3D into μPs are discussed.
Silicon Layer Stacking Enabled by Wafer Bonding
Authors: Tan Chuan Seng , Chen Kuan-Neng , Fan Andy , Chandrakasan Anantha , Reif Rafael 
Published: April 2011

ABSTRACTThree-dimensional integrated circuits (3-D ICs), in the form of a vertical stack of several interconnected device layers, have many performance, form factor, and integration advantages. The main objective of this work is to develop reliable process technology to enable the fabrication of a vertically interconnected silicon multi-layer stack.Low temperature wafer bonding processes, both copper thermo-compression bonding and silicon dioxide fusion bonding, are studied extensively as key enabling technology. Cu thermo-compression bonding is studied for its feasibility as a permanent bond between active layers in a multi-layer stack. Silicon dioxide wafer bonding, on the other hand, is used as a temporary bond to attach a donor wafer to a handle wafer during donor wafer thinning and subsequent layer transfer. Sufficiently high bond strength is obtained with careful surface preparation and activation prior to bonding.Silicon layer can be stacked either in a “face down” or “face up” orientation. Using a combination of wafer bonding and thinning, double-layer stacks in both orientations are fabricated. By repeating these steps on two “face down” double-layer stacks, a four-layer stack is successful demonstrated.
Current Status of LSI Micro-fabrication and Future Prospect for 3D System Integration
Authors: Okamoto Kazuya 
Published: April 2011

ABSTRACTMicro-fabrication technology for LSI devices has been progressing technically over time. However, the scenario of continuing to produce ever-finer feature geometries has a low probability. Resolution capabilities will reach a critical limit due to conventional CMOS performance threshold and chip economy. Therefore, to assure continued performance improvements for future devices, front-end fabricators should consider a new 3 dimensional structure (3D-LSI) using a “Through-Si-Via” process. At the same time, the definition of the semiconductor device should be updated to “System & Design Integration (S&DI).” S&DI will provide the needed feedback to launch a new field of clear applications, based on a total system solution with innovative design, fabrication, inspection and evaluation equipment. 3D-LSI and S&DI will have a tremendous impact on the future electronics industries.
The Effects of Sn Element on Hydrogen Storage Characteristics of Mg2-xSnxNi(x=0, 0.05, 0.1, 0.15, 0.2) Alloys
Authors: Guo Jin , Huang Cunke , Yang Kun , Li Guangxu , Jiang Weiqing 
Published: April 2011

ABSTRACTMg2-xSnxNi (x=0, 0.05, 0.1, 0.15, 0.2) hydrogen storage alloys were prepared and the effects of substitution of Sn for Mg on hydrogen storage performances of the alloys were investigated. In the alloys, Mg2Ni is main phase and the amorphous degree increases gradually with amount of Sn content increasing. Partial substitution of Sn for Mg can change the temperature of hydrogen absorption reaction effectively. The Mg1.85Sn0.15Ni alloy absorbs hydrogen at about 330K which is about 80K lower than that of Mg2Ni alloy. Discharge capacity increases quickly with amount of substitution Sn for Mg increasing. Suitable amount of substitution of Sn for Mg and amorphous can improve the thermodynamic and electrochemical characteristics of hydrogen absorption reaction for Mg2Ni-based alloy.