bluuebunny/crossref_metadata_2025_split huggingface dataset:
Design and Direct Assembly of 2.5D/3D Rigid Silicon Interposer on PCB
Authors: Yazdani Farhang 
Published: October 2015

Silicon interposer is emerging as a vehicle for integrating dies with sub 50um bump pitch in 2.5D/3D configuration. Benefits of 2.5D/3D integration are well explained in the literature, however, cost and reliability is a major concern especially with the increase in interposer size. Among the challenges, reliability issues such as warpage, cracks and thermal-stresses must be managed, in addition, multi-layer build-up flip chip substrate cost and its impact on the overall yield must be considered. Because of these challenges, 2.5D/3D silicon interposer has developed a reputation as a costly process.
To overcome the reliability challenges and cost associated with typical thin interposer manufacturing and assembly, a rigid silicon interposer type structure is disclosed. In this study, interposer with thickness of greater than 300um is referred to as rigid interposer. Rigid silicon interposer is directly assembled on PCB without the need for intermediary substrate. This eliminates the need for an intermediary substrate, thin wafer handling, wafer bonding/debonding procedures and Through Silicon Via (TSV) reveal processes, thus, substantially reducing the cost of 2.5D/3D integrated products while improving reliability.
A 10X10mm2 rigid silicon interposer test vehicle with 310um thickness was designed and fabricated. BGA side of the interposer with 1mm ball pitch was bumped with eutectic solder balls through a reflow process. Interposer was then assembled on a 50X50mm2 FR-4 PCB. We present design and direct assembly of the rigid silicon interposer on PCB followed by temperature cycle results using CSAM images at 250, 500, 750 and 1000 cycles. It is shown that all samples successfully passed the temperature cycle stress test.
p3D Micro Dispensing & Photonic Curing of Silver Nanoparticle Inks on Low Thermal Stability Molded Plastic Parts
Authors: Mastropietro Michael , Rawson Ian , Akhavan Vahid , Chen Xudong , Church Ken 
Published: October 2015

In this paper, we describe an additive processing technique that would enable fast and reliable processing of conductive circuits upon a wide range of thermally molded plastics. Precise patterns of silver nanoparticle based pastes are printed on to 3D injection molded plastic parts and other 3D surfaces using a nScrypt micro dispensing tool and then processed in seconds using a NovaCentrix PulseForge flash lamp photonic curing system. The additive digital printing technique enables rapid manufacturing of intricate designs with quick turnaround time from design to production. The non-equilibrium heating technology enables sintering the nanoparticle based inks into high performance conductor circuits directly on 3D and 2D low thermal sensitive polymer materials. It will be demonstrated that the nanoparticle based pastes have a superior performance to the conventional polymer thick film pastes and that they are also more cost effective.
Specific examples will be shown demonstrating how the combination of the two tools and processes could result in a versatile and cost effective additive manufacturing process. As of right now, there is no tool or combination of tools that could provide such a versatile design and production environment. The new process is faster, more cost effective, and more environmentally friendly compared to conventional processing techniques.
Multi-scale X-ray tomography for process and quality control in 3D TSV packaging
Authors: Zschech Ehrenfried , Niese Sven , Löffler Markus , Wolf M. Jürgen 
Published: October 2015

Advanced packaging processes and the resulting 3D products challenge process and quality control. X-ray imaging and X-ray computed tomography (XCT) provide non-destructive characterization capabilities on specimens across a range of length scales, observing features with sizes spanning from millimeters over micrometers down to several 10 nanometers. They are the techniques of choice for two- or three-dimensional inspection of medium and small sized objects with a resolution down to several 10 nm. In this paper, the potential and the limits of XCT for process development, process monitoring, and failure analysis in 3D TSV stacks are described. It is shown that a multi-scale approach, i.e. using imaging techniques with several resolution ranges, is necessary for these particular tasks. Since sub-micron XCT and nano XCT are very useful techniques with a promising prospect for the future, we focus on the capabilities of two lab-based XCT tools with sub-micron resolution (Zeiss Versa) and with &lt; 50 nm resolution (Zeiss Ultra).
We demonstrate the capabilities for nondestructive imaging of multi-die stacks with TSVs and AgSn microbumps. Major filling defects in TSVs are clearly visualized. An analysis of individual bumps reveals mismatches in relative positioning, micron-size pores, and the distribution of intermetallic phases. This information provides important information regarding the respective process steps (process control) and the product quality (quality control). In addition, TSV etch profiles and small voids in Cu TSVs are visualized. Since deviations from the targeted geometry and defects are difficult to locate precisely from a two-dimensional image, X-ray computed tomography has to be applied.
Heavy-Wire Bond Manipulation with Laser to Increase Reliability and as Enabler for Thermography based On-line Process Control
Authors: Middendorf Andreas , Lang Klaus Dieter 
Published: October 2015

Investigations regarding the failure behavior of heavy wire bonds show a significant decrease of cycles in strength with increasing wire diameter. The article explains the reasons theoretically. Based on the theory, possibilities to increase reliability are discussed. The innovation about this is the shaping of a chute on the bonding surface. This has to happen in a way that the current ampacity is not reduced. A laser will therefore cut across the bonding surface crosswise to the course of the wire. Previously the particular depth of cut is determined by simulation. The simulations prove the theoretically predicted enhancement of the reliability true. In addition, the method can be used as "non-destructive" in-situ measurement for quality assurance, since the crack growth can be derived from the thermography directly in the notches. The notches work as a magnifier for the thermography camera and eliminate the black coloring as a precondition in typical thermography.
The research work is carried out within the project RoBE partially which is funded by BmBF; the manufacturing method and the geometric shapes have been patented.
Precision Jetting of Solder Paste – A Versatile Tool for Small Volume Production
Authors: Becker K.-F. , Koch M. , Voges S. , Thomas T. , Fliess M. , Bauer J. , Braun T. , Aschenbrenner R. , Schneider-Ramelow M. , Lang K.-D. 
Published: October 2015

During the last years, jetting processes for higher viscosity materials have gained widespread interest in microelectronics manufacturing. Main reasons for this interest are high throughput/productivity of jetting, contactless material deposition, high volume precision and freely designable deposition patterns.
In previous studies [i,ii] we have demonstrated the jetability of different resin-based materials, being exemplary for unfilled adhesive, for low viscous Underfill resin and for higher viscosity Glob Top materials. The focus of our previous work was on the dosing of various encapsulants - Underfill material with low viscosity and near Newtonian behaviour and Glob Top resins, being non-Newtonian fluids due to higher matrix viscosity and higher filler content (up to 70 wt %) with resulting increased filer/filler and filler/matrix interaction. During the last years jetting has become widely used and has been applied to the dosing of much more complex materials, combining high viscosity matrix materials with odd shaped and compressive particles. Examples for these materials are conductive adhesives and also solder pastes, where the jetting system developed by Swedish company Mydata set's the current standard for solder paste jetting.
In a technological study solder paste jetting using different jetting systems has been investigated in comparison to solder paste dispensing and solder paste printing, especially material rheological behaviour and the correspondence to processability have been evaluated in detail. To illustrate the potential of solder paste jetting as a flexible and powerful tool for electronic system prototyping, a test vehicle has been designed, containing areas for SMD soldering and for process reproducibility. To determine process quality not only basic process data on droplet diameter, resulting material depot size and positioning accuracy have been evaluated, but also statistical means have been employed to determine process homogeneity and stability depending on the respective parameter set.
Summarized this paper gives an insight into solder jet process development and describes material rheology demands and limitations and thus allows the optimized use of advanced solder jetting technology for electronics assemblies.
Development of 3D System-in-Package with TSV Technology
Authors: Miki Shota , Yamano Takaharu , Ichikawa Sumihiro , Sanada Masaki , Tanaka Masato 
Published: October 2015

In recent years, products such as smart phones, tablets, and wearable devices, are becoming miniaturized and high performance. 3D-type semiconductor structures are advancing as the demand for high-density assembly increases. We studied a fabrication process using a SoC die and a memory die for 3D-SiP (System in Package) with TSV technology. Our fabrication is comprised of two processes. One is called MEOL (Middle End of Line) for exposing and completing the TSV's in the SoC die, and the other is assembling the SoC and memory dice in a 3D stack.
The TSV completion in MEOL was achieved by SoC wafer back-side processing. Because its final thickness will be a thin 50μm (typical), the SoC wafer (300 mm diameter) is temporarily attached face-down onto a carrier-wafer. Careful back-side grinding reveals the “blind vias” and fully opens them into TSV's. A passivation layer is then grown on the back of the wafer. With planarization techniques, the via metal is accessed and TSV pads are built by electro-less plating without photolithography. After the carrier-wafer is de-bonded, the thin wafer is sawed into dice.
For assembling the 3D die stack, flip-chip technology by thermo-compression bonding was the method chosen. First, the SoC die with copper pillar bumps is assembled to the conventional organic substrate. Next the micro-bumps on the memory die are bonded to the TSV pads of the SoC die. Finally, the finished assembly is encapsulated and solder balls (BGA) are attached.
The 3D-SiP has passed both package-level reliability and board-level reliability testing. These results show we achieved fabricating a 3D-SiP with high interconnect reliability.
Cost and Yield Comparison of Wafer-to-Wafer, Die-to-Wafer, and Die-to-Die Bonding
Authors: Palesko Amy , Palesko Chet 
Published: October 2015

There are multiple process options and technologies to consider when creating a product that requires 3D integration. Bonding two wafers (or two die) can be accomplished in various ways, such as with thermocompression, fusion, or adhesive bonding. However, the best assembly process cannot be determined by only studying the pros and cons of the bonding technology itself. There are also three main process flows to consider when pursuing 3D assembly: wafer-to-wafer, die-to-wafer, and die-to-die bonding. This paper will compare the cost and yield for each of these process flows, all of which have advantages and disadvantages depending on the application.
Activity based cost modeling will be used to construct three basic process flows, one for each bonding option. The process flows will each be divided into a series of activities, and the total cost of each activity will be accumulated. A variety of cost and yield trade-offs will be conducted using these process flows. The variables the trade-offs will focus on will include die size, throughput, incoming wafer cost, incoming wafer defect density, and residual die defect density. The goal of this analysis is to understand the variables that impact cost and yield when bonding wafers and/or die for a product that requires 3D assembly.
Optical Characterization and Defect inspection for 3D stacked IC technology
Authors: Fresquet Gilles , Piel Jean-Philippe 
Published: October 2015

Advanced packaging technologies are rapidly evolving and 3D architectures requires new inspection and metrology techniques. Existing techniques need to be improved but new techniques must be developed to address new challenges induced by the last fabrication processes.
To increase the development speed, it is a big advantage that metrology and defect inspection need to be present on the same platform and a flexible tool, with multi sensors, to be more versatile facing the different step of the process will be presented in this paper
As 3D IC devices utilize TSVs for direct interconnect, the depth, top and bottom CD (critical diameter) of such TSVs with a diameter as small as 5 μm with a high aspect ratio is characterized.
During wafer temporary bounding, which is an handling technique that allows wafer thinning with a thickness of less than 100 μm, by selecting the most sensitive sensor, determination of the thickness of each layer of the stack could be determined at the same time: silicon substrate, thin glue layer of few microns only and carrier which could be silicon or glass.
After back-side processing and wafer thinning, the determination of the remaining silicon thickness (RST) below the TSV could be determined. Moreover back side roughness after grinding is also determined.
After wafer thinning process, the TSVs are revealed at the back side of the wafer, leaving to appear copper pillars. The pillars height and co-planarity measurements are then addressed.
Post CMP process control will be addressed by full field interferometry especially prior Copper to Copper direct bonding.
Concerning the defect inspection, the NIR microscopy is used to control die to wafer stacking process, to reveal voids in the glue and cracks on the grinded silicon substrate.
In this paper, we will present fast and nondestructive optical sensors based on low coherence infrared and white light interferometry and spectrometry techniques. These different sensors mounted on the same tool allow characterizing specifically and with an excellent sensitivity the different process steps described above. Concerning the defect inspections, techniques based on infrared microscopy and images techniques processing will be detailed and results will be presented to illustrate the possibilities of this inspection by microscopy.
FAILURE ANALYSIS OF DISCOLORED ENIG PADS IN THE MANUFACTURING ENVIRONMENT
Authors: Marciniak Monika , Meagher Michael , Davis Jon , Josefowicz Jack 
Published: October 2015

Manufacturing of electronic assemblies using printed circuit boards (PCBs) with electroless nickel/immersion gold (ENIG) surface finishes requires front-end PCB evaluation that will guarantee that good quality product enters the assembly line. The most common is an IPC-4552 mandated plating thicknesses verification of 3-6μm and a minimum of 0.05μm for nickel and gold, respectively. Coupled with visual examination, this verification method suffices for general PCB acceptance but may not be robust enough in cases where ENIG plating in PCBs is compromised. That poses challenges in the manufacturing environment, where resulting latent defects are detected in downstream processes but not at upfront incoming inspection.
Manifestation of such latent anomaly was observed in the form of ENIG pad discoloration with variations from yellow, red or grey discolored surfaces to a more pronounced plating degradation, such as corrosive pitting. The launched failure analysis involved evaluation of manufacturing processes suspected to contribute to the cause of the condition. Effects of thermal processes, cleaning methods, soldering, parylene deposition and factory cleanliness were examined thoroughly. Concurrently, metallurgical analysis of ENIG pads was performed, where samples were subjected to scanning electron microscopic/energy dispersive x-ray spectroscopic (SEM/EDX) cross section analysis, Auger electron spectroscopy (AES) and gold (Au) and electroless nickel (Ni) surface examination. The resulting analysis revealed a highly porous electroless nickel coating with deep crevasses and fissures penetrating down to the base copper (Cu) layer. These open nickel boundaries were attributed to the corrosive environment within ENIG plating, which resulted in the pad surface discoloration. The root cause of ENIG pad discoloration and pitting was traced back to poor ENIG line process controls. Subsequent introduction of a nickel controller into the ENIG line were the implemented countermeasures. To mitigate the effects of discoloration at the electronic assembly level, a tinning process was implemented to prevent nickel plating oxidation and to ensure that good wettability for reliable solder joints was maintained.
Thermal analysis, design, and characterization of a reconfigurable switch matrix based on LTCC technology for satellite communications
Authors: Kaleem S. , Rentsch S. , Welker T. , Müller J. , Hein M.A. 
Published: October 2015

The thermal characteristics of a reconfigurable switch matrix (RSM) module based on low temperature co-fired ceramic (LTCC) technology are presented. Owing to the PIN-diodes based design, a static power of 1.6 W is dissipated on the ceramic package; the double-sided mounting and integrated bias circuitry demands determination of the temperature distribution within the module. A finite-element thermal simulation model was validated by an infrared (IR) thermograph; the steady-state temperature distribution on the surface of the package estimated by the simulation model differs to the IR measurements by &lt; 1%. This temperature distribution is the result of the thermal interaction among components on the multi-die package with different electrical power dissipation. The temperature on the multi-throw switch monolithic microwave integrated circuit (MMIC) is elevated by ~36.7 K relative to the ambient temperature. The peak temperature occurs on the current-limiting resistors in the bias circuitry; the peak temperature is estimated to be ~45 K above the ambient. In a later version of the RSM, the bias current was reduced by 50%, current-limiting resistor was replaced by two parallel resistors, and additional thermal vias and conductive pads were introduced on the ceramic package. The cumulative effect is a temperature distribution on the package with lowered values. Compared to its predecessor, the temperatures at the current-limiting resistor and the MMIC are reduced by ~20 K and ~14 K, respectively.
With one heat source active on the ceramic package at a time, the resulting steady-state temperatures on this source and the remaining heat sources provided an estimate of the self- and transfer-thermal resistances, respectively. The reciprocity of the heat flow on the package and the three-dimensional symmetric layout required only ‘4’ thermal simulations to determine the symmetric thermal resistance matrix. The significantly reduced values of the computed matrix for the later version of the RSM module demonstrated lower thermal resistance to the ambient, compared to its predecessor. Lastly, the results of thermal measurements conducted with a vacuum wafer prober are presented, in order to validate RSM functionality for vacuum pressures (≤ 1 mPa) and temperatures between 248 K and 338 K; the control current and the transmission coefficient demonstrated variations of ≤ 0.5% and −0.015 dB/K, respectively.
Fundamental Rights in EU Internal Market Legislation
Authors: Kosta Vasiliki 
Published: October 2015

This book attempts to systematise the present interrelationship between fundamental rights and the EU internal market in the field of positive integration. Its intention is simple: to examine the way in which, and the extent to which, fundamental rights protection is realised through EU internal market legislation. To that end, the analysis is conducted around four rights or sets of rights: data protection, freedom of expression, fundamental labour rights and the right to health. The book assesses not only what substantive level of protection is achieved for these fundamental rights, but it also estimates whether there is a ‘fundamental rights culture’ that informs current legislative practice. Finally, it asks the overarching question whether the current state of harmonisation amounts to a ‘fundamental rights policy’.
The book offers a much more varied picture of the EU’s fundamental rights policy in and through the EU internal market than perhaps initially expected. Moreover, it builds the case for a more conscious approach to dealing with and enhancing fundamental rights protection in and through internal market legislation, and advocates a leading role for the legislature in the establishment of an internal market that is firmly based on respect for fundamental rights.
The green shoots of a novel training programme: progress and identified key actions to providing services to MSM at Kenyan health facilities
Authors: van der Elst Elise M , Kombo Bernadette , Gichuru Evans , Omar Anisa , Musyoki Helgar , Graham Susan M , Smith Adrian D , Sanders Eduard J , Operario Don 
Published: October 2015

IntroductionAlthough men who have sex with men (MSM) in sub‐Saharan Africa are at high risk for HIV acquisition, access to and quality of health and HIV services within this population are negatively affected by stigma and capacity within the health sector. A recently developed online MSM training programme (www.marps‐africa.org) was shown to contribute to reductions in MSM prejudice among healthcare providers (HCPs) in coastal Kenya. In this study, we used qualitative methods to explore the provision of MSM healthcare services two years post‐training in coastal Kenya.MethodsFrom February to July 2014, we held 10 focus group discussions (FGD) with 63 participants, including HCP from 25 facilities, county AIDS coordinators and MSM from local support groups. Participants discussed availability, acceptability and accessibility of HIV healthcare for MSM. HCP also discussed changes in their health service practices after completing the training. FGD were recorded, transcribed verbatim and analyzed using Ritchie and Spencer's “framework approach” for qualitative data.ResultsHCPs described continued improvements in their ability to provide service in a non‐stigmatizing way to MSM patients since completing the training programme and expressed comfort engaging MSM patients in care. Four additional recommendations for improving MSM healthcare services were identified: 1) expanding the reach of MSM sensitivity training across the medical education continuum; 2) establishing guidelines to manage sexually transmitted anal infections; 3) promoting legal and policy reforms to support integration of MSM‐appropriate services into healthcare; and 4) including MSM information in national reporting tools for HIV services.ConclusionsPositive impacts of this sensitivity and skills training programme were reflected in HCP attitudes two years post‐intervention. Scaling‐up of efforts will rely on continued policies to include MSM in healthcare programmes to reduce stigma in health settings and guidelines for MSM STI service delivery.