bluuebunny/crossref_metadata_2025_split huggingface dataset:
A PCB Technology Electrical Conductivity Sensor for the Measurement of Saltwater Contamination
Authors: Dean Robert N. , Werner Frank , Adams Mark 
Published: October 2015

Saltwater intrusion is when sea water moves into freshwater aquifers and contaminates them. It can be a serious problem for coastal communities and inland ecosystems. A number of factors, both natural and manmade, contribute to this contamination. Natural factors include events such as storm surges from hurricanes that push seawater into inland freshwater bodies. However, manmade factors contribute far more to saltwater intrusion than natural factors. The biggest human factor is the overuse of freshwater aquifers in coastal areas. Saltwater has a higher density than freshwater, and hence a higher static pressure. So when a freshwater aquifer is partially drained by over usage, the higher pressure saltwater will percolate through the bedrock into the aquifer under the freshwater. Contamination of the freshwater body then occurs through dispersion and diffusion. Manmade canals and channels for shipping, drainage and irrigation can also provide a pathway for seawater to move into coastal bodies of freshwater. Oil and gas production and mining can also contribute to saltwater contamination of freshwater. Saltwater contamination can render freshwater aquifers non-potable, kill freshwater fish and other inhabitants, kill freshwater plants and deleteriously affect inland freshwater ecosystems in coastal areas.
Dissolved salt ions in water are excellent charge carries, resulting in a large difference in the electrical conductivity between freshwater and saltwater. Therefore the measurement of the electrical conductivity of a water sample can be used to gauge the level of possible saltwater contamination. Commercial printed circuit board (PCB) technology affords the realization of a low-cost sensor probe for measuring the electrical conductivity of aqueous samples. This sensor makes use of the materials and processes inherent in commercial PCB manufacturing, including the FR4 substrate, patterned Cu cladding and soldermask. The non-conductive E-glass FR4 substrate is used as the rigid backbone of the sensor probe. The patterned Cu cladding is used for electrodes and signal traces. The polymeric soldermask is used as a thin insulating and moisture barrier layer. With these materials, the sensor consists of two planar exposed metal pads on the surface that are used to measure electrical conductivity. Additionally, the PCB probe is directly compatible with the integration of any desired integrated electronic components and/or other sensors. Furthermore, the turnaround time for a new PCB sensor design can be as little as 24 hours at modest cost, making this technology economically superior to traditional sensor technologies, such as silicon based MEMS, where it can take months to realize a new design and be very expensive.
A prototype PCB electrical conductivity sensor probe has been designed, fabricated and evaluated with mixtures of freshwater and seawater, demonstrating its usefulness.
The discrete vacuum packaging of IR-microbolometers
Authors: Mauri Luca 
Published: October 2015

Packaging of Micro Electro Mechanical Systems (MEMS) requires technical challenges to be solved and overcome when stringent vacuum and hermetic sealing is required.
This is typical for a wide class of devices, such as inertial sensors, MEMS atomic clocks, IR micro-bolometers, where such conditions need to be achieved to provide the performance stability during the lifetime of the devices. The most challenging vacuum requirements are related to micro-bolometers, since good vacuum level is needed for thermal insulation. Typical target pressure is ≈ 10-3 – 10-4 mbar.
Vacuum hermetic packaging can be successfully achieved by dedicated getter film integration, key technology for vacuum requirements, in combination with a specific sealing process and choice of vacuum compatible materials.
The discrete packaging of the device requires the attachment of the sensing element into a ceramic package, like LCC. Typically, adhesives are used as die attach material. From the vacuum point of view, adhesives are not ideal candidates and therefore the compatibility with stringent vacuum requirements is not always guaranteed. Preliminary outgassing tests on these components are recommended to select appropriate materials.
Thermal treatment of components is another key point for vacuum sealing, since specific degassing treatments before and during sealing can effectively reduce the amount of gas inside the volume of the device.
The getter film integration is mandatory in such kind of devices because of the stringent vacuum requirements. SAES' proprietary technology is fully compliant with micro-bolometer manufacturing and the optimization of the getter activation step, during the bonding process, enables the functionality of the device along its lifetime.
Moreover, capabilities of performing residual gas analyses and leak rate measurements of sealed devices are fundamental for quality control of vacuum sealing as well as for analyses and prediction of device lifetime.
Material and Process Developments for Robust and High Reliability Glass Wafers for 2.5D Packaging
Authors: Keusseyan Roupen , Mobley Tim 
Published: October 2015

Borosilicate glass based wafer technologies are being developed for next generation high speed electronic, telecom and biotech systems; that integrate heterogeneous devices in a single package for improved electrical performance. The primary key to success is to have a well understood via through the glass that can be used as a core to build wafer level packages from. The present paper will discuss developments in through hole formation technology and via metallization materials and processes.
Through hole formation in borosilicate glass with corresponding wall morphology and chemistry play important roles in building robust vias through the glass. These hole characteristics and their dependence on performance, defects at the wafer level and key developments that have been achieved to overcome them will be discussed in detail.
Magnetic Current Imaging of a TSV short in a 3D IC
Authors: Gaudestad Jan , Orozco Antonio 
Published: October 2015

In this paper we show Magnetic Field Imaging (MFI) is the best method for Electric Fault Isolation (EFI) of short failures in 2.5/3D Through Silicon Via (TSV) devices in a true non-destructive way by imaging the current path. To confirm the failing locations and to do Physical Failure Analysis (PFA), a Dual Beam-Plasma FIB (DB-PFIB) system was used for cross sectioning and volume analysis of the TSV structures and high resolution imaging of the identified defects.
Magnetic Current Imaging (MCI) is a sub technique of MFI which has been used by the semiconductor industry for more than a decade to find electrical shorts and leakage paths and which has the capability to “look through” all materials typically used in the semiconductor industry, allowing global imaging without the need for physical de-processing [1, 2, 3]. MCI utilizes two types of sensors: a Superconducting Quantum Interference Device (SQUID) sensor for low current and large working distances and a Giant Magneto Resistance (GMR) sensor for sub micron resolution current imaging at wafer/die level [3].
The sample investigated in this work is a triple-layer stack, in which 2 layers of 50 μm thick test chip (Chip 1 and Chip 2 in Figure 1) were assembled on a 200 μm thick bottom chip (Chip 0 in Figure 1). The test chips were manufactured by imec's standard 65 nm CMOS Back End of Line (BEOL) process, 5×50 μm via-middle TSV technology [4], and fine pitch micro bumping process [6]. Further details of the test vehicle and assembly process can be found elsewhere [5].
The sample had a short between daisy chain a1 and a2, which were supposed to be electrically separated. The probe tests that was used for this experiment is shown in Table 1.
The signal was injected into the respective daisy chains by probing V+ to V− on the bottom chip. To send a signal between daisy chain a1 and a2 one could probe V− to V− and V+ to V+. The MCI scans were done using the GMR sensor only. The sample was attached to a vacuum chuck and raster scanned.
From Fig. 2 one can see that the current enters the top layer (Chip 2) at TSV 18 and goes back down again to Chip 1 at TSV 28.
Since the sample clearly has multiple shorts, the short located at TSV pair 23 was chosen for PFA using the PFIB. A short is found between the 2 BEOL layers of Chip 1, causing the current to leak into Chip 2 (Fig. 3).
Multi Beam Full Cut Dicing of Thin Si IC Wafers
Authors: van Borkulo Jeroen , van der Stam Richard , Knippels Guido 
Published: October 2015

The ongoing trend to thinner wafers which are needed for continuous miniaturization, 3D packaging and IC performance, inevitably means that sole blade dicing evolution is coming to an end. Over the last years several technologies to handle the separation process of thin Si wafer dicing have been evaluated (DBG, Stealth, Plasma, etc). Although they are capable for certain applications to meet the process specifications, they achieve this at expense of flexibility, productivity and process costs. ALSI, the inventor of multi beam dicing for semiconductor materials, has developed a technology using a multi beam laser concept which allows to dice through thin Si IC wafers while achieving a die strength equal or higher than achieved with blade dicing. In this single step process a multi beam laser configuration allows to remove the (ultra) low-K and metal top structures, dice through the Si substrate and recover the die strength (&gt;450MPa for a 70um Si wafer). This technology allows the semiconductor industry to continue with the development of advanced node wafer technology utilizing (ultra) low-K and thick metal structures while having a separation technology that can cope with all these process steps.
The presentation will address how the multi beam laser dicing process is an enabling technology and the first process in the world that can meet the die strength criteria without the need of additional process steps which increase the cost and reduce the flexibility and yield of the process. Multi beam laser dicing allows semiconductor manufacturers to execute their technology roadmap in a cost efficient manner.
This presentation will address in depth, the challenges and issue's that semiconductor manufacturers are facing with respect to the dicing of thin (ultra) low-K IC wafers. We will present the die strength and quality that has been achieved using the multi beam dicing technology and compare this to other separation technologies.
We will disclose how a multi beam process will play a dominant role in achieving an extremely small Heat Affected Zone combined with a significantly higher productivity. It will be demonstrated how a unique combination and optimization of multiple beams, pulse duration, and low pulse energy, can meet the challenging requirements set by the industry. In addition dicing results and achieved productivities will be presented.
Ceramic Interface and Multilayer Technology for Micro Fuel Cells
Authors: Ziesche Steffen , Michaelis Uwe Partsch A. 
Published: October 2015

Planar fuel cells typically consist of several functional layers stacked on top of each other. We have extended the concepts of multilayer ceramics and thick film technology to provide novel approaches for the design of extremely compact and cost efficient micro fuel cells, either for the high temperature operation (SOFC) or for near ambient operation (PEMFC).
Solid oxide fuel cells (SOFCs) operate at temperatures as high as 850°C. Several ceramic technologies were developed to facilitate mechanical integrity and good electrical contact to the cell at these high operating temperatures and upon rapid thermal cycling.
Ceramic interconnector plates can be manufactured by adapting the multilayer / thick film / via approach known from LTCC to HTCC multilayers such as zirconia. The result is a 3D shaped SOFC interconnector plate with an unparalleled thermomechancial stability and rigidity for special applications like military.
Extending that HTCC functionalisation approach further led us to the manufacturing of other multilayer ceramic based micro-reactors, namely micro-reformers for hydrogen production on a pocket size scale. We have combined several high throughput 3D shaping technologies with novel catalyst coating approaches to yield micro-reactors that are cost efficient to manufacture and that expose a high inner catalytically active surface at a low pressure drop. We have also applied thick film technologies to incorporate additional functions such as sensors or heaters right into the multilayer.
The contribution is concluded with a summary of the crucial shaping and coating technologies and an outlook on how these can be applied to future compact SOFC and PEMFC fuel cells.
Inkjet Printed MgO-Thickfilm-Layer with Embedded BST Pillars
Authors: Diel Waldemar , Wassmer Marcel , Krueger Klaus 
Published: October 2015

Barium strontium titanate (BST) and magnesium oxide (MgO) are common materials for electronic applications. Because of its low permittivity MgO can be used for passivation layers. In contrast to that the high-k BST allows for building up structures with high capacitances. Bandgap and antenna applications are feasible based on periodic BST/MgO structures, which are e.g. woodpile shaped. Furthermore BST can be used for filter or phase shifter applications due to the dielectric constant of BST that can be modified by the applied electrical field. To keep the applied voltage in a low range very fine structures are required. There are reports about the attempt to realize these very fine structures by screen printing or thin film deposition of BST and MgO. In this paper inkjet printing will be presented as an alternative method for the realization of such fine structured thick films.
BST particles with a diameter of 0.5 micron are deposited by inkjet printing with the additional advantage of creating two dimensional patterns in one layer. The resulting BST structures are embedded in MgO layers, which are inkjet printed as well.
The corresponding, own developed inks are based on an organic non-polar solvent. The particles are dispersed in the solvent by triple-roll-mill process and stabilized sterically. A solvent is found which is compatible to both kinds of particles as well as to the used substrates. Hence, the ink formulation differs only in the solid phase.
The printed structures are processed in two steps. First the MgO layer with the included holes is printed, the BST columns are deposited afterwards. The realization of fine MgO and BST structures is demonstrated. Printing of large areas with holes or channels as well as printing of columns with a high aspect ratio is investigated.
Numerous designs can be realized using inkjet printing. Any common passive devices as well as periodical structures with small dimensions and high aspect ratio are feasible.
Microelectronics Packaging Application using post-LTCC technology
Authors: IMANAKA Yoshihiko , AMADA Hideyuki , KUMASAKA Fumiaki 
Published: October 2015

The rapid evolution in electronic equipment has created a demand for advanced devices that are flexible, thin, and light in weight. This demand is driving the development of flexible and stretchable electronic devices as a core technology. To produce wearable computers, we need to fabricate functional membranes that contain passive devices such as capacitors and resistors on resin sheets at low temperatures. These sheets can then serve as mounting boards for various electronic devices.
By improving the technique for room-temperature aerosol deposition (ASD) of a ceramic material (post-LTCC technology), we have established a technology for forming a dielectric inorganic film with an excellent degree of crystallinity and favorable electric properties for use in the production of flexible and stretchable electronic devices on a polyimide sheet. In the barium titanate film produced by the deposition on a polyimide sheet, a closely packed film with a high degree of sealing was formed by means of structure control to establish large-particle anchors, measuring about 100 nm in diameter, at the interface between the ceramic film and the polyimide sheet. The maximum dielectric constant of a film of barium titanate formed on the polyimide sheet by using the improved aerosol-deposition was 350 .By using this method to form a three-dimensional capillary structure inside a film, we produced a capacitor film with an apparent dielectric constant of 40,000 at room temperature. We also demonstrate cathode films for quick-charging lithium ion batteries. To achieve rapid charging, it is necessary to improve the speed of the chemical reaction between the cathode material and the electrolyte. Our process, however, does not require any unnecessary additive, such as a binder, unlike conventional tape casting method, and forms a film consisting of nano-particles of a high crystallinity, and is therefore effective for rapid charging.
Design and fabrication of gas tight optical windows in LTCC
Authors: Welker T. , Geiling T. , Bartsch H. , Müller J. 
Published: October 2015

Beside the possibilities low temperature co-fired ceramics (LTCC) offer for electric devices they also enable the fabrication of micro fluidic elements like channels and embedded cavities. Hence, LTCC facilitate the realization of complex and integrated micro fluidic systems. Examples can be applied in many areas like micro fuel cells and reaction chambers for synthesis of chemical compounds.
However, for many applications it is necessary to have an optically transparent interface to the surroundings. The integration of optical windows in LTCC opens up a wide field of new and innovative applications such as the observation of chemiluminescent reactions. These chemical reactions emit electromagnetic radiation and thus offer a method for noninvasive detection.
The optical windows consist of thin glasses (≤ 500 μm) bonded by thermocompression onto a LTCC substrate. As the bonding agent, a low temperature sealing glass paste was used. Borosilicate glasses and fused silica as well as silicon were successfully bonded onto LTCC. In order to bond materials with a large CTE mismatch (i.e. fused silica) to LTCC, it is necessary to limit the heat input to the bond interface. Therefore, a heater structure was integrated into the LTCC substrate beneath the bond interface. This bonding process provides a vacuum proof and gas tight optical port (&lt; 5 × 10−10 mbar·l/sec) with a high bond strength.
Cofiring behavior of multilayer inductors based on substituted Y- and M-type hexagonal ferrites
Authors: Bierlich S. , T[ouml]pfer J. , Barth S. , Pawlowski B. , M[uuml]ller J. , Bartsch-Torres H. 
Published: October 2015

Sinter-active soft ferrites with adequate permeability profiles are required for the fabrication of multilayer ferrite inductors (MLFI). For MLFI fabrication, a Low Temperature Ceramic Co-firing (LTCC) process is used. Substituted hexagonal ferrites of Y-, and M-type represent an important family of soft ferrites which might operate at high-frequency conditions up to 2 GHz. However, for Ag-based multilayer inductor applications a sinter process at 900°C is required. Low-temperature sinter-ability is provided by the use of sub-micron powders and/or sintering additives.
Substituted Y-type hexagonal ferrites Ba2Co2-x-yZnxCuyFe12O22 were obtained after sintering at 1000°C. Substitution of Cu for Co improved the low-temperature sintering behavior. The addition of 5wt.% Bi2O3 guarantees almost complete densification at 900°C. The saturation magnetization and permeability are significantly affected by the Zn-concentration. A maximum permeability of μ′ = 10 and cut-off frequency fg~2GHz was observed for a ferrite with y = 0.4.
Co/Ti-substituted M-type BaFe12-2yCoyTiyO19 ferrites can also be used for multilayer inductors. The magneto-crystalline anisotropy changes from uniaxial to planar upon Co/Ti-substitution, and ferrites with y≥1.1 exhibit soft magnetic behavior. Ferrite powders were prepared at 1000°C. The addition of a sintering aid shifts the temperature of maximum shrinkage down to below 900°C and dense samples were obtained after firing at 900°C. A permeability of μ′ = 16 and a resonance frequency of 1 GHz was observed. Substituted M-type ferrites are stable during co-firing at 900°C and show no sign of decomposition, i.e. these materials are LTCC-compatible.
Ferrite tapes were prepared by tape casting and multilayer structures were fabricated by screen printing, stacking, lamination and final co-firing. Firing was performed at LTCC conditions i.e. 900°C. We report on the co-firing behavior, microstructure and permeability of monolithic laminates. It is shown, that hexagonal Co2/Zn2Y- and Co/Ti-M-type ferrites are excellent magnetic materials for multilayer inductors.
Low firing functional materials for application in power electronics
Authors: Barth St. , Kastner F. , Rößler M. , Wentorp R. , Töpfer J. , Bartnitzek Th. 
Published: October 2015

In the past significant effort has been obtained on the miniaturization of electronic devices, for example in the field of cellular phones or other portables devices. Mainspring of this process is the huge success that has been obtained with giant integration densities on chip level. In contrast passive components are actually the most important bottlenecks in the upcoming miniaturization process, first of all for applications in power electronics. Especially in the field of electric mobility and innovative lighting technologies an increasing demand arises for miniaturized transformers and converters. Miniaturization of power electronic devices concentrates however the dissipation heat in a smaller volume, leading in most cases to higher operation temperatures. LTCC (Low-Temperature-Cofiring-Ceramic) as a ceramic multilayer interconnection technology has been employed for the development of 3D-high integrated electronic modules, marked by an excellent thermal robustness. Actual integration of inductors or capacitors in LTCC-boards is restricted to SMD's, limiting further miniaturization in an important manner. Hence the monolithic integration of inductors and capacitors into ceramic multilayer circuit boards is a straightforward approach to gain higher integration levels in power electronics.
We report on the preparation and processing of low sintering materials for the implementation of ferrite cores into LTCC multilayer boards. Different semi-finished products based on ferrite powders have been elaborated. Sintering behavior of these materials has been studied and material compatibility with different standard LTCC materials was tested.