bluuebunny/crossref_metadata_2025_split huggingface dataset:
SIMULATION IN SEXUAL HEALTH: USING SIMULATION TO TEACH JUNIOR DOCTORS TECHNICAL AND NON- TECHNICAL SKILLS IN GENITO-URINARY MEDICINE
Authors: Omer Rasha , Campbell Lesley , Swaris Samanthi , Schatzberger Rebecca , Loftus Hannah , Briggs Aparna , Dilke-Wing Gillian 
Published: May 2015

BackgroundIn the UK, Clinical simulation is strongly recommended for training in Medicine. In Genito-urinary Medicine, simulation is used for summative assessment for major examination such as Dip GUM and Dip HIV. Unfortunately it's rarely used for training. New Trainees in GUM have very little experience in Sexual Health. A recent in-house survey showed around 85% would have found simulation useful if included in the induction program and would have addressed training needs specific to the speciality.MethodologyAll new trainees will be invited to participate. Faculty will consist of GUM Consultants and Registrars. The course will consist of 2 parts Skills Workshop Using part-task trainers, candidates will rotate through 5 Stations that will include: -Female Pelvis: for speculum insertion, cervical cytology, Microbiology sampling and bimanual examination -Male Pelvis: for examination and sampling techniques -Rectal examination: for proctoscopy and prostate examination -Anatomy of Male and female genital tract using illustrations -Illustrations of Common Dermatological conditions and skin infections and cryotherapy for warts. Scenario-based Simulation: Trainees will participate in simulated communication scenarios.Objectives: 1. To demonstrate good listening skills2. To use simple, clear language when communication with patients3. To develop understanding of ethics, law and consent.ResultsWe anticipate that trainees will have more confidence during clinical consultations and in managing challenging cases.ConclusionsBetter understanding of the team dynamics and nature of work in GUM will improve working relationships which will ultimately result in better patient care.
COGNITIVE OVERLOAD MANAGEMENT: EMPOWERING SIMULATION BASED MEDICAL EDUCATION THROUGH MINDFUL REALITY CHECKS
Authors: Khan Erum 
Published: May 2015

AimsTo guide the design of simulation based instructions consistent with the nature of human cognitive architecture.BackgroundCognitive load is the effort required for information handling in the working memory. There is a wealth of research on Human cognition and Instructional science that suggests that effective and efficient instructional strategies should avoid overloading the limited capacity of the working memory; a theory called “Cognitive Load Theory”. The foundational fact of this theory which is critical to any instructional strategy is that beyond a certain limit the cognitive overload starts impairing student learning.Description of Innovation TopicAt Center for Advanced Simulation in Healthcare, Gulf Medical University; simulation based instructions are designed keeping the human cognition in mind. Appropriately planning, integrating and aligning the clinical content and skills with the level of the learner takes care of the content load (Intrinsic load) while on the other hand constructively designing the simulation session with appropriate use of the simulation fidelity, pre-scenario briefing, simulator and learning environment orientation and debriefing facilitation skills matching the expectation, motivation level and interest of the learners ensures a mindful check on the extraneous and germane load that arises when learners interact with the instructional material.ConclusionsSimulation Educators should aim to understand the causes of cognitive overload and stress and have strategies to minimize their impact. Keeping a mindful watch out and frequent reality checks on the intrinsic and extrinsic load of the simulation exercises is highly recommended. We recommend the use of pre-session materials and advanced organizers, a comprehensive pre-briefing and debriefing, small peer group frequent simulation exercises with increasing level of challenges.
TUNNEL VISION: HOW GOOD ARE FINAL YEAR MEDICAL STUDENTS IN IDENTIFYING DIFFERENTIAL DIAGNOSIS ON A BUSY WARD ROUND: A SIMULATED WARD ROUND AT THE UNIVERSITY OF EDINBURGH
Authors: Medjoub Karima 
Published: May 2015

BackgroundAggressive patients can be either distracting to the participants, and often their behaviour can be attributed to personality traits. However, it is common knowledge amongst medical healthcare professionals that it is potentially a symptom of an organic cause. Therefore, in a complex and stressful environment, such as a ward round, how likely is a medical student to identify the potential of a serious illness in an aggressive patient?MethodologyWe ran a simulated ward round at the university of Edinburgh involving final year medical students (n=290). We used five patient scenarios with numerous distractors such as phone calls, being asked to perform other tasks, and requesting investigations, as well as being a part of the ward round. Two of the scenarios used were around one patient with acute pancreatitis and another with sepsis and airway compromise. Both these simulated patients were instructed to be aggressive. We measured the time between the patient expressing symptoms to the time of considering a possible cause of the patient's symptoms, and also the number of prompts from faculty and the patients required to do so.ResultsThere were a significant number of missed sessions where the diagnosis was missed die to distractions. The required number of prompts was higher in patients and nurse than those of consultants, reflecting the effect of hierarchy. During the debrief, the importance of understanding and acquisition of non-technical skills are an important factor is diluting distractors and avoid potentially disastrous outcomes were discussed. Work around the subject should be continued in the future as part of the undergraduate curriculum.ConclusionsDistractors on a busy ward round are to be taken seriously by medical staff. It is crucial to stop, delay or manage the distractors as appropriately to avoid serious mistakes.
CARDIAC ANAESTHESIA SIMULATION TRAINING (CAST)
Authors: Morais Rex 
Published: May 2015

Aims(1) Understand the impact of cardiopulmonary bypass (CPB), (2) Manage complications arising during CPB, Clarify roles of team members, (3) Practice team communication for coordinated patient care.BackgroundThe cardiac anaesthesia setting is a highly dynamic environment requiring continuous processing of feedback from multiple sources. CAST is a valuable enhancement to prepare and orientate residents to the high risk environment. We report our continuing efforts to develop CAST for our first year anaesthesia residents using a high-fidelity simulator, adapted to simulate the CPB state.MethodologyThe course is led by a multidisciplinary faculty, including surgeons and perfusionists. The simulation scenarios focused on management of complications during CPB, re-warming and weaning from bypass (e.g. arrhythmias, electrolyte abnormalities and protamine reactions). This is followed by facilitated debriefing. Pre-reading, pre-/post-tests and short didactics are also used to augment the learning experience.OutcomesTo date, 26 residents have undergone CAST, including 2 cardiac surgical residents, who found CAST useful in fostering inter-professional understanding and learning. 92% of the residents scored CAST ‘Excellent or Good’ for clarity of the course objectives, 84% for reinforcing knowledge, and 66.6% for‖improvement of communication. The challenges faced by faculty included getting buy-in from stake-holders from different disciplines, securing protected time for residents and faculty, and developing a comprehensive lesson plan to address different training needs of the multidisciplinary team. Recommendations and take home messages CAST scenarios with varying complexity targeted at training our advanced residents are currently in development. There is also potential to develop a separate course with an emphasis on non-technical skills (e.g. team‖communication) and inter-professional education.
Timescales of degassing and conduit dynamics inferred from
210
Pb–
226
Ra disequilibria in Volcán de Colima 1998–2010 andesitic magmas
Authors: Reubi Olivier , Sims Kenneth W. W. , Varley Nicholas , Reagan Mark , Eikenberg Jost 
Published: May 2015

Abstract

Determining the timescales of magma degassing is essential for understanding the mechanisms controlling the eruption style and the dynamics of magmatic systems. Towards this end, we measured
210
Pb–
226
Ra disequilibria in andesite lavas erupted from Volcán de Colima between 1998 and 2010. (
210
Pb/
226
Ra)
0
activity ratios range from 0.86 to 1.09, and are best explained in terms of
222
Rn degassing and accumulation. The range in
210
Pb deficits indicates that the timescales of
222
Rn degassing did not exceed 11 years.
210
Pb excesses are rare and small (<10%), which signifies that
222
Rn degassing is more effective than
210
Pb accumulation in this intermediate system despite the relatively low gas output at the surface. The absence of significant
210
Pb excesses strongly suggests that the volcanic activity results from episodic ascent of small magma batches through the vapour-saturated section of the magmatic system. Overall, the degassing models based on
210
Pb–
226
Ra disequilibrium suggest an open and complex subvolcanic magmatic system comprising several conduits in which multiple magma batches reside for up to 10 years. Shifts from effusive to explosive Vulcanian eruptive phases are not related to changes in degassing mode on timescales resolvable using
210
Pb–
226
Ra disequilibria.
aToucan
Authors: Yue Tao , Briand Lionel C. , Labiche Yvan 
Published: May 2015

The transition from an informal requirements specification in natural language to a structured, precise specification is an important challenge in practice. It is particularly so for object-oriented methods, defined in the context of the OMG's Model Driven Architecture (MDA), where a key step is to transition from a use case model to an analysis model. However, providing automated support for this transition is challenging, mostly because, in practice, requirements are expressed in natural language and are much less structured than other kinds of development artifacts. Such an automated transformation would enable at least the generation of an initial, likely incomplete, analysis model and enable automated traceability from requirements to code, through various intermediate models. In this article, we propose a method and a tool called aToucan, building on existing work, to automatically generate a UML analysis model comprising class, sequence and activity diagrams from a use case model and to automatically establish traceability links between model elements of the use case model and the generated analysis model. Note that our goal is to save effort through automated support, not to replace human abstraction and decision making.
Seven (six) case studies were performed to compare class (sequence) diagrams generated by aToucan to the ones created by experts, Masters students, and trained, fourth-year undergraduate students. Results show that aToucan performs well regarding consistency (e.g., 88% class diagram consistency) and completeness (e.g., 80% class completeness) when comparing generated class diagrams with reference class diagrams created by experts and Masters students. Similarly, sequence diagrams automatically generated by aToucan are highly consistent with the ones devised by experts and are also rather complete, for instance, 91% and 97% message consistency and completeness, respectively. Further, statistical tests show that aToucan significantly outperforms fourth-year engineering students in this respect, thus demonstrating the value of automation. We also conducted two industrial case studies demonstrating the applicability of aToucan in two different industrial domains. Results showed that the vast majority of model elements generated by aToucan are correct and that therefore, in practice, such models would be good initial models to refine and augment so as to converge towards to correct and complete analysis models. A performance analysis shows that the execution time of aToucan (when generating class and sequence diagrams) is dependent on the number of simple sentences contained in the use case model and remains within a range of a few minutes. Five different software system descriptions (18 use cases altogether) were performed to evaluate the generation of activity diagrams. Results show that aToucan can generate 100% complete and correct control flow information of activity diagrams and on average 85% data flAow information completeness. Moreover, we show that aToucan outperforms three commercial tools in terms of activity diagram generation.
Dynamic page sharing optimization for the R language
Authors: Kotthaus Helena , Korb Ingo , Engel Michael , Marwedel Peter 
Published: May 2015

Dynamic languages such as R are increasingly used to process .large data sets. Here, the R interpreter induces a large memory overhead due to wasteful memory allocation policies. If an application's working set exceeds the available physical memory, the OS starts to swap, resulting in slowdowns of a several orders of magnitude. Thus, memory optimizations for R will be beneficial to many applications.
Existing R optimizations are mostly based on dynamic compilation or native libraries. Both methods are futile when the OS starts to page out memory. So far, only a few, data-type or application specific memory optimizations for R exist. To remedy this situation, we present a low-overhead page sharing approach for R that significantly reduces the interpreter's memory overhead. Concentrating on the most rewarding optimizations avoids the high runtime overhead of existing generic approaches for memory deduplication or compression. In addition, by applying knowledge of interpreter data structures and memory allocation patterns, our approach is not constrained to specific R applications and is transparent to the R interpreter.
Our page sharing optimization enables us to reduce the memory consumption by up to 53.5% with an average of 18.0% for a set of real-world R benchmarks with a runtime overhead of only 5.3% on average. In cases where page I/O can be avoided, significant speedups are achieved.
Abstracting abstract control
Authors: Glaze Dionna , Van Horn David 
Published: May 2015

The strength of a dynamic language is also its weakness: run-time flexibility comes at the cost of compile-time predictability. Many of the hallmarks of dynamic languages such as closures, continuations, various forms of reflection, and a lack of static types make many programmers rejoice, while compiler writers, tool developers, and verification engineers lament. The dynamism of these features simply confounds statically reasoning about programs that use them. Consequently, static analyses for dynamic languages are few, far between, and seldom sound.
The "abstracting abstract machines" (AAM) approach to constructing static analyses has recently been proposed as a method to ameliorate the difficulty of designing analyses for such language features. The approach, so called because it derives a function for the sound and computable approximation of program behavior starting from the abstract machine semantics of a language, provides a viable approach to dynamic language analysis since all that is required is a machine description of the interpreter.
The AAM recipe as originally described produces finite state abstractions: the behavior of a program is approximated as a finite state machine. Such a model is inherently imprecise when it comes to reasoning about the control stack of the interpreter: a finite state machine cannot faithfully represent a stack. Recent advances have shown that higher-order programs can be approximated with pushdown systems. However, such models, founded in automata theory, either breakdown or require significant engineering in the face of dynamic language features that inspect or modify the control stack.
In this paper, we tackle the problem of bringing pushdown flow analysis to the domain of dynamic language features. We revise the abstracting abstract machines technique to target the stronger computational model of pushdown systems. In place of automata theory, we use only abstract machines and memoization. As case studies, we show the technique applies to a language with closures, garbage collection, stack-inspection, and first-class composable continuations.
Sirius
Authors: Hauswald Johann , Laurenzano Michael A. , Zhang Yunqi , Li Cheng , Rovinski Austin , Khurana Arjun , Dreslinski Ronald G. , Mudge Trevor , Petrucci Vinicius , Tang Lingjia , Mars Jason 
Published: May 2015

As user demand scales for intelligent personal assistants (IPAs) such as Apple's Siri, Google's Google Now, and Microsoft's Cortana, we are approaching the computational limits of current datacenter architectures. It is an open question how future server architectures should evolve to enable this emerging class of applications, and the lack of an open-source IPA workload is an obstacle in addressing this question. In this paper, we present the design of Sirius, an open end-to-end IPA web-service application that accepts queries in the form of voice and images, and responds with natural language. We then use this workload to investigate the implications of four points in the design space of future accelerator-based server architectures spanning traditional CPUs, GPUs, manycore throughput co-processors, and FPGAs.
To investigate future server designs for Sirius, we decompose Sirius into a suite of 7 benchmarks (Sirius Suite) comprising the computationally intensive bottlenecks of Sirius. We port Sirius Suite to a spectrum of accelerator platforms and use the performance and power trade-offs across these platforms to perform a total cost of ownership (TCO) analysis of various server design points. In our study, we find that accelerators are critical for the future scalability of IPA services. Our results show that GPU- and FPGA-accelerated servers improve the query latency on average by 10x and 16x. For a given throughput, GPU- and FPGA-accelerated servers can reduce the TCO of datacenters by 2.6x and 1.4x, respectively.
Freecursive ORAM
Authors: Fletcher Christopher W. , Ren Ling , Kwon Albert , van Dijk Marten , Devadas Srinivas 
Published: May 2015

Oblivious RAM (ORAM) is a cryptographic primitive that hides memory access patterns as seen by untrusted storage. Recently, ORAM has been architected into secure processors. A big challenge for hardware ORAM schemes is how to efficiently manage the Position Map (PosMap), a central component in modern ORAM algorithms. Implemented naively, the PosMap causes ORAM to be fundamentally unscalable in terms of on-chip area. On the other hand, a technique called Recursive ORAM fixes the area problem yet significantly increases ORAM's performance overhead.
To address this challenge, we propose three new mechanisms. We propose a new ORAM structure called the PosMap Lookaside Buffer (PLB) and PosMap compression techniques to reduce the performance overhead from Recursive ORAM empirically (the latter also improves the construction asymptotically). Through simulation, we show that these techniques reduce the memory bandwidth overhead needed to support recursion by 95%, reduce overall ORAM bandwidth by 37% and improve overall SPEC benchmark performance by 1.27x. We then show how our PosMap compression techniques further facilitate an extremely efficient integrity verification scheme for ORAM which we call PosMap MAC (PMMAC). For a practical parameterization, PMMAC reduces the amount of hashing needed for integrity checking by >= 68x relative to prior schemes and introduces only 7% performance overhead.
We prototype our mechanisms in hardware and report area and clock frequency for a complete ORAM design post-synthesis and post-layout using an ASIC flow in a 32~nm commercial process. With 2 DRAM channels, the design post-layout runs at 1~GHz and has a total area of .47~mm2. Depending on PLB-specific parameters, the PLB accounts for 10% to 26% area. PMMAC costs 12% of total design area. Our work is the first to prototype Recursive ORAM or ORAM with any integrity scheme in hardware.
Compiler Management of Communication and Parallelism for Quantum Computation
Authors: Heckey Jeff , Patil Shruti , JavadiAbhari Ali , Holmes Adam , Kudrow Daniel , Brown Kenneth R. , Franklin Diana , Chong Frederic T. , Martonosi Margaret 
Published: May 2015

Quantum computing (QC) offers huge promise to accelerate a range of computationally intensive benchmarks. Quantum computing is limited, however, by the challenges of decoherence: i.e., a quantum state can only be maintained for short windows of time before it decoheres. While quantum error correction codes can protect against decoherence, fast execution time is the best defense against decoherence, so efficient architectures and effective scheduling algorithms are necessary. This paper proposes the Multi-SIMD QC architecture and then proposes and evaluates effective schedulers to map benchmark descriptions onto Multi-SIMD architectures. The Multi-SIMD model consists of a small number of SIMD regions, each of which may support operations on up to thousands of qubits per cycle.
Efficient Multi-SIMD operation requires efficient scheduling. This work develops schedulers to reduce communication requirements of qubits between operating regions, while also improving parallelism.We find that communication to global memory is a dominant cost in QC. We also note that many quantum benchmarks have long serial operation paths (although each operation may be data parallel). To exploit this characteristic, we introduce Longest-Path-First Scheduling (LPFS) which pins operations to SIMD regions to keep data in-place and reduce communication to memory. The use of small, local scratchpad memories also further reduces communication. Our results show a 3% to 308% improvement for LPFS over conventional scheduling algorithms, and an additional 3% to 64% improvement using scratchpad memories. Our work is the most comprehensive software-to-quantum toolflow published to date, with efficient and practical scheduling techniques that reduce communication and increase parallelism for full-scale quantum code executing up to a trillion quantum gate operations.
PuDianNao
Authors: Liu Daofu , Chen Tianshi , Liu Shaoli , Zhou Jinhong , Zhou Shengyuan , Teman Olivier , Feng Xiaobing , Zhou Xuehai , Chen Yunji 
Published: May 2015

Machine Learning (ML) techniques are pervasive tools in various emerging commercial applications, but have to be accommodated by powerful computer systems to process very large data. Although general-purpose CPUs and GPUs have provided straightforward solutions, their energy-efficiencies are limited due to their excessive supports for flexibility. Hardware accelerators may achieve better energy-efficiencies, but each accelerator often accommodates only a single ML technique (family). According to the famous No-Free-Lunch theorem in the ML domain, however, an ML technique performs well on a dataset may perform poorly on another dataset, which implies that such accelerator may sometimes lead to poor learning accuracy. Even if regardless of the learning accuracy, such accelerator can still become inapplicable simply because the concrete ML task is altered, or the user chooses another ML technique.In this study, we present an ML accelerator called PuDianNao, which accommodates seven representative ML techniques, including k-means, k-nearest neighbors, naive bayes, support vector machine, linear regression, classification tree, and deep neural network. Benefited from our thorough analysis on computational primitives and locality properties of different ML techniques, PuDianNao can perform up to 1056 GOP/s (e.g., additions and multiplications) in an area of 3.51 mm^2, and consumes 596 mW only. Compared with the NVIDIA K20M GPU (28nm process), PuDianNao (65nm process) is 1.20x faster, and can reduce the energy by 128.41x.