bluuebunny/crossref_metadata_2025_split huggingface dataset:
‘Care left undone’ during nursing shifts: associations with workload and perceived quality of care
Authors: Ball Jane E , Murrells Trevor , Rafferty Anne Marie , Morrow Elizabeth , Griffiths Peter 
Published: July 2013

BackgroundThere is strong evidence to show that lower nurse staffing levels in hospitals are associated with worse patient outcomes. One hypothesised mechanism is the omission of necessary nursing care caused by time pressure—‘missed care’.AimTo examine the nature and prevalence of care left undone by nurses in English National Health Service hospitals and to assess whether the number of missed care episodes is associated with nurse staffing levels and nurse ratings of the quality of nursing care and patient safety environment.MethodsCross-sectional survey of 2917 registered nurses working in 401 general medical/surgical wards in 46 general acute National Health Service hospitals in England.ResultsMost nurses (86%) reported that one or more care activity had been left undone due to lack of time on their last shift. Most frequently left undone were: comforting or talking with patients (66%), educating patients (52%) and developing/updating nursing care plans (47%). The number of patients per registered nurse was significantly associated with the incidence of ‘missed care’ (p<0.001). A mean of 7.8 activities per shift were left undone on wards that are rated as ‘failing’ on patient safety, compared with 2.4 where patient safety was rated as ‘excellent’ (p <0. 001).ConclusionsNurses working in English hospitals report that care is frequently left undone. Care not being delivered may be the reason low nurse staffing levels adversely affects quality and safety. Hospitals could use a nurse-rated assessment of ‘missed care’ as an early warning measure to identify wards with inadequate nurse staffing.
ENABLERS OF KNOWLEDGE MANAGEMENT ACROSS BORDERS: A STRUCTURAL APPROACH
Authors: MAGNIER-WATANABE R. , BENTON C. 
Published: July 2013

Although knowledge has been cited as one of the most important strategic assets, the creation and sharing of knowledge at the organizational level is a difficult process that will not proceed without incentives and conscious efforts by management. The complexity of knowledge management (KM) is further compounded by the influence of a wide variety of factors such as leadership, ba, organizational culture, organizational control and individual work styles.Based on a large dataset gathered from a questionnaire survey of a multi-national Japanese pharmaceutical company and its subsidiary in the US, we compare how the aforementioned organizational factors influence KM, expressed through the SECI model of socialization, externalization, combination and internalization. The results of a structural equation modeling path analysis show that a single model of KM should not be applied unilaterally to both organizations, although part of the same company, and instead may need to be adapted to each stage of KM maturity.
An algebra of design patterns
Authors: Zhu Hong , Bayley Ian 
Published: July 2013

In a pattern-oriented software design process, design decisions are made by selecting and instantiating appropriate patterns, and composing them together. In our previous work, we enabled these decisions to be formalized by defining a set of operators on patterns with which instantiations and compositions can be represented. In this article, we investigate the algebraic properties of these operators. We provide and prove a complete set of algebraic laws so that equivalence between pattern expressions can be proven. Furthermore, we define an always-terminating normalization of pattern expression to a canonical form which is unique modulo equivalence in first-order logic.By a case study, the pattern-oriented design of an extensible request-handling framework, we demonstrate two practical applications of the algebraic framework. First, we can prove the correctness of a finished design with respect to the design decisions made and the formal specification of the patterns. Second, we can even derive the design from these components.
Convolution engine
Authors: Qadeer Wajahat , Hameed Rehan , Shacham Ofer , Venkatesan Preethi , Kozyrakis Christos , Horowitz Mark A. 
Published: July 2013

This paper focuses on the trade-off between flexibility and efficiency in specialized computing. We observe that specialized units achieve most of their efficiency gains by tuning data storage and compute structures and their connectivity to the data-flow and data-locality patterns in the kernels. Hence, by identifying key data-flow patterns used in a domain, we can create efficient engines that can be programmed and reused across a wide range of applications.
We present an example, the Convolution Engine (CE), specialized for the convolution-like data-flow that is common in computational photography, image processing, and video processing applications. CE achieves energy efficiency by capturing data reuse patterns, eliminating data transfer overheads, and enabling a large number of operations per memory access. We quantify the tradeoffs in efficiency and flexibility and demonstrate that CE is within a factor of 2-3x of the energy and area efficiency of custom units optimized for a single kernel. CE improves energy and area efficiency by 8-15x over a SIMD engine for most applications.
Agile, efficient virtualization power management with low-latency server power states
Authors: Isci Canturk , McIntosh Suzanne , Kephart Jeffrey , Das Rajarshi , Hanson James , Piper Scott , Wolford Robert , Brey Thomas , Kantner Robert , Ng Allen , Norris James , Traore Abdoulaye , Frissora Michael 
Published: July 2013

One of the main driving forces of the growing adoption of virtualization is its dramatic simplification of the provisioning and dynamic management of IT resources. By decoupling running entities from the underlying physical resources, and by providing easy-to-use controls to allocate, deallocate and migrate virtual machines (VMs) across physical boundaries, virtualization opens up new opportunities for improving overall system resource use and power efficiency. While a range of techniques for dynamic, distributed resource management of virtualized systems have been proposed and have seen their widespread adoption in enterprise systems, similar techniques for dynamic power management have seen limited acceptance. The main barrier to dynamic, power-aware virtualization management stems not from the limitations of virtualization, but rather from the underlying physical systems; and in particular, the high latency and energy cost of power state change actions suited for virtualization power management.
In this work, we first explore the feasibility of low-latency power states for enterprise server systems and demonstrate, with real prototypes, their quantitative energy-performance trade offs compared to traditional server power states. Then, we demonstrate an end-to-end power-aware virtualization management solution leveraging these states, and evaluate the dramatically-favorable power-performance characteristics achievable with such systems. We present, via both real system implementations and scale-out simulations, that virtualization power management with low-latency server power states can achieve comparable overheads as base distributed resource management in virtualized systems, and thus can benefit from the same level of adoption, while delivering close to energy-proportional power efficiency.
STREX
Authors: Atta Islam , Tözün Pinar , Tong Xin , Ailamaki Anastasia , Moshovos Andreas 
Published: July 2013

Online transaction processing (OLTP) workload performance suffers from instruction stalls; the instruction footprint of a typical transaction exceeds by far the capacity of an L1 cache, leading to ongoing cache thrashing. Several proposed techniques remove some instruction stalls in exchange for error-prone instrumentation to the code base, or a sharp increase in the L1-I cache unit area and power. Others reduce instruction miss latency by better utilizing a shared L2 cache. SLICC [2], a recently proposed thread migration technique that exploits transaction instruction locality, is promising for high core counts but performs sub-optimally or may hurt performance when running on few cores.
This paper corroborates that OLTP transactions exhibit significant intra- and inter-thread overlap in their instruction footprint, and analyzes the instruction stall reduction benefits. This paper presents STREX, a hardware, programmer-transparent technique that exploits typical transaction behavior to improve instruction reuse in first level caches. STREX time-multiplexes the execution of similar transactions dynamically on a single core so that instructions fetched by one transaction are reused by all other transactions executing in the system as much as possible. STREX dynamically slices the execution of each transaction into cache-sized segments simply by observing when blocks are brought in the cache and when they are evicted. Experiments show that, when compared to baseline execution on 2--16 cores, STREX consistently improves performance while reducing the number of L1 instruction and data misses by 37% and 14% on average, respectively. Finally, this paper proposes a practical hybrid technique that combines STREX and SLICC, thereby guaranteeing performance benefits regardless of the number of available cores and the workload's footprint.
Catnap
Authors: Das Reetuparna , Narayanasamy Satish , Satpathy Sudhir K. , Dreslinski Ronald G. 
Published: July 2013

Multiple networks have been used in several processor implementations to scale bandwidth and ensure protocol-level deadlock freedom for different message classes. In this paper, we observe that a multiple-network design is also attractive from a power perspective and can be leveraged to achieve energy proportionality by effective power gating.
Unlike a single-network design, a multiple-network design is more amenable to power gating, as its subnetworks (subnets) can be power gated without compromising the connectivity of the network. To exploit this opportunity, we propose the Catnap architecture which consists of synergistic subnet selection and power-gating policies. Catnap maximizes the number of consecutive idle cycles in a router, while avoiding performance loss due to overloading a subnet.
We evaluate a 256-core processor with a concentrated mesh topology using synthetic traffic and 35 applications. We show that the average network power of a power-gating optimized multiple-network design with four subnets could be 44% lower than a bandwidth equivalent single-network design for an average performance cost of about 5%.
SIMD divergence optimization through intra-warp compaction
Authors: Vaidya Aniruddha S. , Shayesteh Anahita , Woo Dong Hyuk , Saharoy Roy , Azimi Mani 
Published: July 2013

SIMD execution units in GPUs are increasingly used for high performance and energy efficient acceleration of general purpose applications. However, SIMD control flow divergence effects can result in reduced execution efficiency in a class of GPGPU applications, classified as divergent applications. Improving SIMD efficiency, therefore, has the potential to bring significant performance and energy benefits to a wide range of such data parallel applications.
Recently, the SIMD divergence problem has received increased attention, and several micro-architectural techniques have been proposed to address various aspects of this problem. However, these techniques are often quite complex and, therefore, unlikely candidates for practical implementation. In this paper, we propose two micro-architectural optimizations for GPGPU architectures, which utilize relatively simple execution cycle compression techniques when certain groups of turned-off lanes exist in the instruction stream. We refer to these optimizations as basic cycle compression (BCC) and swizzled-cycle compression (SCC), respectively. In this paper, we will outline the additional requirements for implementing these optimizations in the context of the studied GPGPU architecture. Our evaluations with divergent SIMD workloads from OpenCL (GPGPU) and OpenGL (graphics) applications show that BCC and SCC reduce execution cycles in divergent applications by as much as 42% (20% on average). For a subset of divergent workloads, the execution time is reduced by an average of 7% for today's GPUs or by 18% for future GPUs with a better provisioned memory subsystem. The key contribution of our work is in simplifying the micro-architecture for delivering divergence optimizations while providing the bulk of the benefits of more complex approaches.
Die-stacked DRAM caches for servers
Authors: Jevdjic Djordje , Volos Stavros , Falsafi Babak 
Published: July 2013

Recent research advocates using large die-stacked DRAM caches to break the memory bandwidth wall. Existing DRAM cache designs fall into one of two categories --- block-based and page-based. The former organize data in conventional blocks (e.g., 64B), ensuring low off-chip bandwidth utilization, but co-locate tags and data in the stacked DRAM, incurring high lookup latency. Furthermore, such designs suffer from low hit ratios due to poor temporal locality. In contrast, page-based caches, which manage data at larger granularity (e.g., 4KB pages), allow for reduced tag array overhead and fast lookup, and leverage high spatial locality at the cost of moving large amounts of data on and off the chip.
This paper introduces Footprint Cache, an efficient die-stacked DRAM cache design for server processors. Footprint Cache allocates data at the granularity of pages, but identifies and fetches only those blocks within a page that will be touched during the page's residency in the cache --- i.e., the page's footprint. In doing so, Footprint Cache eliminates the excessive off-chip traffic associated with page-based designs, while preserving their high hit ratio, small tag array overhead, and low lookup latency. Cycle-accurate simulation results of a 16-core server with up to 512MB Footprint Cache indicate a 57% performance improvement over a baseline chip without a die-stacked cache. Compared to a state-of-the-art block-based design, our design improves performance by 13% while reducing dynamic energy of stacked DRAM by 24%.
On the feasibility of online malware detection with performance counters
Authors: Demme John , Maycock Matthew , Schmitz Jared , Tang Adrian , Waksman Adam , Sethumadhavan Simha , Stolfo Salvatore 
Published: July 2013

The proliferation of computers in any domain is followed by the proliferation of malware in that domain. Systems, including the latest mobile platforms, are laden with viruses, rootkits, spyware, adware and other classes of malware. Despite the existence of anti-virus software, malware threats persist and are growing as there exist a myriad of ways to subvert anti-virus (AV) software. In fact, attackers today exploit bugs in the AV software to break into systems.
In this paper, we examine the feasibility of building a malware detector in hardware using existing performance counters. We find that data from performance counters can be used to identify malware and that our detection techniques are robust to minor variations in malware programs. As a result, after examining a small set of variations within a family of malware on Android ARM and Intel Linux platforms, we can detect many variations within that family. Further, our proposed hardware modifications allow the malware detector to run securely beneath the system software, thus setting the stage for AV implementations that are simpler and less buggy than software AV. Combined, the robustness and security of hardware AV techniques have the potential to advance state-of-the-art online malware detection.
Deconfigurable microprocessor architectures for silicon debug acceleration
Authors: Foutris Nikos , Gizopoulos Dimitris , Vera Xavier , Gonzalez Antonio 
Published: July 2013

The share of silicon debug in the overall microprocessor chips development cycle is rapidly expanding due to the ever growing design complexity and the limited efficiency of pre-silicon validation methods. Massive application of short random test programs on the prototype microprocessor chips is one of the most effective parts of silicon debug. However, a major bottleneck and source of "noise" in this phase is that large numbers of random test programs fail due to the same or similar design bugs. This redundant behavior adds long delays in the debug flow since each failing random program must be separately examined, although it does not usually bring new debug information. The development of effective techniques that detect dominant modes of failure among random programs and triage them into common categories eliminate redundant debug sessions and significantly boost silicon debug.
We propose the employment of deconfigurable microprocessor architectures along with self-checking random test programs to reduce the redundant debug sessions and make the triage step of silicon debug more efficient. Several hardware components of high performance microprocessor micro-architectures can be deconfigured while keeping the functional completeness of the design. This is the property we exploit in our silicon debug methodology for the triaging of random test programs. We support our methodology by a hardware mechanism dedicated to silicon debug that groups the failing test programs into categories depending on the microprocessor hardware components that need to be deconfigured for a random test program to be correctly executed. Identical deconfiguration sequences for multiple test programs indicate the existence of redundancy among them and group them together. This grouping significantly reduces the number of failing tests that must be debugged afterwards. Detailed evaluation of the method on an x86 microprocessor demonstrates its efficiency in reducing the debug sessions and thus in accelerating silicon debug.
Circulating Pro-Surfactant Protein B as a Risk Biomarker for Lung Cancer
Authors: Taguchi Ayumu , Hanash Samir , Rundle Andrew , McKeague Ian W. , Tang Deliang , Darakjy Salima , Gaziano J. Michael , Sesso Howard D. , Perera Frederica 
Published: July 2013

Abstract
Background: Our prior studies of lung cancer suggested that a novel biomarker (pro-surfactant protein B or pro-SFTPB) might serve as a predictive marker for this disease. We aimed to determine the potential use of pro-SFTPB for distinguishing lung cancer cases from matched controls as a risk marker.
Methods: Study subjects were drawn from the longitudinal Physicians' Health Study (PHS). Cases (n = 188) included individuals who were cancer-free at study enrollment but developed lung cancer during follow-up. Controls (n = 337) were subjects who did not develop lung cancer. Cases and controls were matched on date of study enrollment, age at enrollment, and smoking status and amount. Baseline plasma samples drawn at enrollment were analyzed for pro-SFTPB using ELISA to detect differences in protein expression levels for cases and controls.
Results: Pro-SFTPB nondetectable status was significantly associated with lung cancer risk [OR = 5.88; 95% confidence interval (CI) 1.24–27.48]. Among subjects with detectable levels of the protein, increasing plasma concentration of pro-SFTPB was associated with higher lung cancer risk (OR = 1.41 per unit increase in log pro-SFTPB; 95% CI 1.08–1.84).
Conclusion: These results suggest a nonlinear, J-shaped association between plasma pro-SFTPB levels and lung cancer risk, with both nondetectable and higher levels of the marker being associated with lung cancer.
Impact: These results show promise of a risk marker that could contribute to predicting risk for lung cancer development and to narrowing the high-risk population for low-dose computed tomography screening. Cancer Epidemiol Biomarkers Prev; 22(10); 1756–61. ©2013 AACR.
Serum Antioxidant Nutrients, Vitamin A, and Mortality in U.S. Adults
Authors: Goyal Abhishek , Terry Mary Beth , Siegel Abby B. 
Published: July 2013

AbstractBackground: Observational studies have suggested that antioxidant nutrients may reduce cancer and overall mortality risks. However, most randomized trials have failed to show survival benefits. Examining nonlinear associations between antioxidant levels and health outcomes may help to explain these discrepant findings.Methods: We evaluated all-cause, cancer, and cardiovascular mortality risks associated with quintiles (Q1–Q5) of serum antioxidant (vitamins C and E, β-carotene, and selenium) and vitamin A levels, in 16,008 adult participants of The Third National Health and Nutrition Examination Survey (NHANES III; 1988–1994).Results: Over a median follow-up period of 14.2 years, there were 4,225 deaths, including 891 from cancer and 1,891 from cardiovascular disease. We observed a dose–response decrease in cancer and overall mortality risks with higher vitamin C levels. In contrast, for vitamin A, risk of cancer death decreased from Q1–Q2, with no further decline in risk at higher levels. For vitamin E, having levels in Q4 was associated with the lowest cancer mortality risk. Both vitamin A and E had U-shaped associations with all-cause mortality. Cancer mortality risks decreased from Q1–Q2 for β-carotene and from Q1–Q4 for selenium. However, for β-carotene and selenium, overall mortality risks decreased from Q1–Q2 but then did not change significantly with higher levels.Conclusions: Antioxidant supplement use should be studied in the context of overall mortality and other competing mortality risks.Impact: These data suggest the need for novel intervention studies where doses of these agents are individualized based on their serum levels, and possibly, markers of oxidative stress and systemic inflammatory response. Cancer Epidemiol Biomarkers Prev; 22(12); 2202–11. ©2013 AACR.
Prediagnostic Levels of Serum One-Carbon Metabolites and Risk of Hepatocellular Carcinoma
Authors: Butler Lesley M. , Arning Erland , Wang Renwei , Bottiglieri Teodoro , Govindarajan Sugantha , Gao Yu-Tang , Yuan Jian-Min 
Published: July 2013

Abstract
Background: Rats fed diets deficient in choline develop hepatocellular carcinoma. Tumor DNA from these animals is characteristically hypomethylated, suggesting that disruption of the one-carbon metabolism pathway is an underlying mechanism for hepatocarcinogenesis. Prospective studies in humans on circulating choline and other one-carbon metabolites and hepatocellular carcinoma risk have been lacking.
Methods: We prospectively examined the association between prediagnostic serum concentrations of one-carbon metabolites including betaine, choline, cystathionine, homocysteine, methionine, 5-methyltetrahydrofolate (5-MTHF), pyridoxal-5-phosphate (PLP, the bioactive form of vitamin B6) and S-adenosylmethionine (SAM), and risk of developing hepatocellular carcinoma based on a nested case–control study of 297 incident cases and 631 matched controls from a cohort of 18,244 men in Shanghai, China. Logistic regression methods were used to calculate ORs and 95% confidence intervals (CI) adjusted for established risk factors for hepatocellular carcinoma.
Results: Serum choline and PLP were associated with statistically significant reduced risk of hepatocellular carcinoma, whereas serum cystathionine, methionine, and SAM were associated with increased hepatocellular carcinoma risk (all Ptrend &lt; 0.05). The inverse associations for hepatocellular carcinoma risk with choline and PLP remained statistically significant after adjusting for all potential confounders. The multivariate-adjusted ORs (95% CIs) for the highest versus lowest quintiles of serum choline and PLP were 0.35 (0.16–0.78; P = 0.010) and 0.44 (0.25–0.78; P = 0.005), respectively. There were no associations for hepatocellular carcinoma risk with 5-MTHF, betaine, or homocysteine.
Conclusion: The inverse associations between choline and vitamin B6 and the risk of hepatocellular carcinoma development are novel and warrant further investigation.
Impact: Identifying new modifiable factors for hepatocellular carcinoma prevention is warranted. Cancer Epidemiol Biomarkers Prev; 22(10); 1884–93. ©2013 AACR.