bluuebunny/crossref_metadata_2025_split huggingface dataset:
GaInP Selective Area Epitaxy for Heterojunction Bipolar Transistor Applications
Authors: PARK S. H. , FU S.-L. , YU P. K. L. , ASBECK P. M. 
Published: September 2012

AbstractA study of selective area epitaxy (SAE) of GalnP lattice matched to GaAs is presented. The selectively regrown GaInP is used as the emitter of a novel heterojunction bipolar transistor (HBT) device structure. Successful SAE of GalnP on both dark field (mostly covered) and light field (mostly open) SiO2 masks is compared. To characterize the critical regrown heterojunction, diodes and HBTs were fabricated and measured. It is found that a pre-growth pause of either TEGa or PH3 results in forward bias characteristics with low leakage and an ideality factor of ~1.25, indicating low interfacial defect density. Non-self aligned regrown emitter HBTs grown with a dark field mask scheme have been fabricated. Devices with an emitter area of 3x12 μm exhibit small signal current gain up to 80 with an fT and fMAX of 22 GHz and 18 GHz, respectively. To further improve the performance of these devices, a structure with a self-aligned refractory metal base contact and light field regrowth is proposed.
Selective growth of MOVPE on AlGaAs/GaAs patterned substrates for quantum nano-structures
Authors: Sakuma Makoto , Fukui Takashi , Kumakura Kazuhide , Motohisa Junichi 
Published: September 2012

AbstractWe propose and demonstrate a new mask material of AlGaAs native oxide for selective area metalorganic vapor phase epitaxy (MOVPE) which has several advantages over conventional SiNx or SiO2 masks. GaAs selective area growth occurs on masked substrate of AlGaAs native oxide whose Al composition is 0.4, and the wire structures with trapezoidal cross section are formed along ]100] direction on (001) GaAs substrates with line & space mask pattern. Furthermore, after annealing the selectively grown GaAs wire samples, GaAs layers can be regrown with atomically smooth surface, in which GaAs wires are perfectly buried. The results show that this novel selective area MOVPE technique using AlGaAs native oxide masks are promising for quantum nano-structure device fabrication.
Selective Epitaxial Growth of Strained Silicon-Germanium Films in Tubular Hot-Wall Low Pressure Chemical Vapor Deposition Systems
Authors: Leet I -M. , Wang W. -C. , Koh M. T. K. , Denton J.P. , Kvam E. P. , Neudeck G. W. , Takoudis C. G. 
Published: September 2012

AbstractSelective epitaxial growth (SEG) of silicon-germanium (SiGe) films on patterned-oxide silicon substrates, using a tubular hot-wall low pressure chemical vapor deposition (LPCVD) system, is demonstrated in this study. This conventional system is proposed as a low cost alternative for SiGe epitaxial growth. Three process improvements needed to achieve quality growth are discussed. First, the hydrogen bake process is modified to eliminate Ge-outgassing. Secondly, a Si SEG buffer layer is deposited prior to SiGe SEG. Finally, a small flow of dichlorosilane is introduced during the temperature ramp-down period prior to SiGe SEG. The growth results are discussed in terms of growth selectivity, thickness uniformity, growth rate, defect density, SiGe film composition, and electrical properties.
Processing of InP and GaAs Surfaces by Hydrogen and Oxygen Plasmas: In Situ Real Time Ellipsometric Monitoring
Authors: Losurdo M. , Capezzuto P. , Bruno G. 
Published: September 2012

AbstractRemote radiofrequency H2 and O2 plasma processing of InP and GaAs surfaces was investigated by in situ real time spectroscopic ellipsometry. Hydrogen plasmas were used for the native oxide removal and the defect passivation of III-V surfaces. The effect of hydrogen exposure time and of crystallographic orientation (GaAs (100), (110), (111)) on the chemistry and kinetics of oxygen removal and of phosphorus/arsenic depletion was investigated. Oxygen plasma anodization was used to grow oxide films on GaAs (100), (110) and (111) substrates. The effect of bias voltage and UV-light irradiation on the chemistry and kinetics of oxidation process and on the oxide properties was studied. The composition and morphology of the InP and GaAs surfaces resulting from these plasma treatments was described.
Solid Phase Crystallization of LPCVD Amorphous Si Films by Nucleation Interface Control
Authors: Hwang Eui-Hoon , Ro Jae-Sang 
Published: September 2012

AbstractA novel method for the fabrication of poly-Si films with a large grain size is reported using solid phase crystallization (SPC) of LPCVD amorphous Si films by nucleation interface control. The reference films used in this study were 1000 Ǻ -thick a-Si films deposited at 500°C at a total pressure of 0.35 Torr using Si2H6/He. Since the deposition condition changes the incubation time, i.e. nucleation rate, and since nucleation occurs dominantly at a-Si/SiO2 interface, we devised the following deposition techniques for the first time in order to obtain the larger gain size. A very thin a-Si layer (~ 50 Ǻ) with the deposition conditions having long incubation time is grown first and then the reference films (~ 950 Ǻ) are grown successively. Various composite films with different combinations were tested. The crystallization kinetics of composite films was observed to be determined by the deposition conditions of a thin a-Si layer at the a-Si/SiO2 interface. Nucleation interface was also observed to be modified by interrupted gas supply resulting in the enhancement of the grain size.
Microstructure and Interfacial Properties of Laterally Oxidized AlxGa1-xAs
Authors: Twesten R.D. , Follstaedt D. M. , Choquette K. D. 
Published: September 2012

AbstractThe oxidation of high Al content AlxGa1-xAs has received much attention due to its use in oxide-aperture, vertical-cavity surface emitting lasers (VCSELs) and for passivating AlAs against environmental degradation. We have recently identified the spinel, gamma phase of Al2O3 in layers laterally oxidized in steam at 450°C for =0.98 & 0.92 and have seen evidence for an amorphous precursor to the gamma phase. At the interface with the unoxidized AlxGa1-xAs , an ~17nm amorphous phase remains which could account for the excellent electrical properties of oxide-confined VCSELs and help reduce stress concentrations at the oxide terminus.
The effect of processing conditions on the structure of buried interfaces between silicon and silicon dioxide
Authors: Chen Xidong , Murray Gibson J. 
Published: September 2012

AbstractA transmission electron microscope technique is used to image atomic steps at buried interfaces between silicon and silicon dioxide. We have studied the effect of processing conditions on the interfacial structure of Si/SiO2 with this technique. We observed a dramatic effect of post-oxidation annealing on silicon (100). Roughening of Si(111) interfaces due to chemical preparation is also reported.
Improvement of Ultrathin Oxides by Post-Oxidation Annealing
Authors: Sakoda Tomoyuki , Matsumura Mieko , Nishioka Yasushiro 
Published: September 2012

AbstractThe low temperature oxidation is effective for the atomically-controlled gate oxide growth. We focused the effects of post-oxidation annealing (POA) and attempted to improve the properties of the low-temperature-grown ultrathin oxides with a thickness of 3nm by POA. POA abruptly reduced the leakage current at a low gate voltage below 1.5V and the interface trap density. The correlation between the interface trap and the leakage current at a low applied voltage region were confirmed. We found that the stressing immunity of the ultrathin oxides grown at a low temperature, 650°C, is drastically improved by POA at 850°C.
Charge Trapping and Degradation of High Permittivity TiO2 Dielectric Metal-Oxide-Semiconductor Field Effect Transistors
Authors: Kim Hyeon-Saeg , Campbell S.A. , Gilmer D.C. , Polla D.L. 
Published: September 2012

AbstractSuitable replacement materials for ultrathin SiO2 in deeply scaled MOSFETs such as lattice polarizable films, which have much higher permittivities than SiO2, have bandgaps of only 3.0 to 4.0 eV. Due to these small bandgaps, the reliability of these films as a gate insulator is a serious concern. Ramped voltage, time dependent dielectric breakdown, and capacitance-voltage measurements were done on 190Å layers of TiO2 which were deposited through the metal-organic chemical vapor deposition of titanium tetrakis-isopropoxide. Measurements of the high and low frequency capacitance indicate that virtually no interface states are created during constant current injection stress. The increase in leakage upon electrical stress suggests that uncharged, near-interface states may be created in the TiO2 film near the SiO2 interfacial layer that allow a tunneling current component at low bias.
Field emission through diamond/Mo interfaces
Authors: Choi W.B. , Myers A.F. , Cuomo J.J. , Hren J.J. 
Published: September 2012

AbstractThe influence of interfacial nanostructure on electron emission from diamond coated Mo emitters is presented. Diamond coating is known to increase electron emissivity, but interfacial oxides and an amorphous layer change the magnitude. After annealing, emissivity was enhanced further and Mo2C was formed at the interface, as well as a decrease in the oxides and amorphous layers. The shape of the FEM image changed but no individual emitting sites were observed. Possible mechanisms causing these changes are discussed.
Segregation of Copper to (100) and (111) Silicon Surfaces in Equilibrium with Internal Cu3Si Precipitates
Authors: Wampler W. R. 
Published: September 2012

AbstractThe energetics of copper segregation to silicon surfaces were examined by measuring the Cu coverage after equilibration between Cu on the surface and internal Cu3Si, for which the Cu chemical potential is known. For oxide-free surfaces the Cu coverage was close to one monolayer on (111) surfaces but was much smaller on (100) surfaces. The Cu coverage was greatly reduced by oxide passivation of the surface. LEED showed the 7×7 structure of the clean (111) silicon surface converted to a quasiperiodic 5×5 structure after equilibrating with Cu3Si. The 2×1 LEED patterns for (100) surfaces indicated no change in surface structure due to the Cu3Si. These results show that the free energy of copper in Cu3Si is higher than that of copper on (111) surfaces but lower than that of copper on (100) surfaces.
Surface and Interface Analysis of Thin-Film/Si(Substrate) Contacts by Sxes
Authors: Heck C. , Kusaka M. , Hirai M. , Nakamura H. , Iwami M. , Watabe H. 
Published: September 2012

AbstractA soft X-ray emission spectroscopy(SXES) study under an energetic electron irradiation has been applied to a nondestructive buried interface analysis of a thin-film(e.g., Cr)/Si(substrate) contact system, where the energy of primary electrons, Ep , is less than 20keV. An interesting point of this method is that we can have a specific signal for an element to be used as a finger print, otherwise it is difficult. By using this e-beam excited SXES, we can study an interface buried deep in a rather thick overlayer, e.g., more than a hundred of nm, which is due to the fact that a mean free path of a soft X-ray or an X-ray production depth is much larger than the mean free path of an energetic electron in solids. Electronic structural study of silicides by SXES is also shown.
Alloying Behavior and Reliabilty of Pt Embedded Metal/n+-GaAs Thin Ohmic Contact System
Authors: Kim C.Y. , Lee W.S. , Kwon H.J. , Jeong Y.W. , Lee J.S. , Whang C.N. 
Published: September 2012

AbstractPt embedded ohmic contacts to n+-GaAs (AuGe-800 Å/ Ni-150 Å/Pt-200 Å/Au-500 Å and AuGe-800 Å/Pt-200 Å/Ni-150 Å/Au-500 Å/n+-GaAs) have been developed for the advanced discrete devices and MMIC (monolithic microwave integrated circuit) applications. The specific contact resistance investigated by Transmission Line Method is 1x10-6 Ω cm2. Ohmic contact reliability investigated by thermal storage test at 300 °C under N2 ambient demonstrated nearly the same contact characteristics after 3000 hours. In both systems, X-ray diffraction results and Auger depth profiles show that the good ohmic contact is related to the formation of Au7Ga2, PtAs2, and Ni19Gen12 phases. AuGa compound enhances the creation of Ga vacancies, allowing incorporation of Ge into Ga sites, and PtAs compound is piled up in the middle of AuGa layer to suppress As outdifrusion from GaAs substrate. TEM cross-sectional view indicates that metal/n+-GaAs reaction layer is ∼ 1200 Å beneath GaAs. Surface and interface are very smooth and abrupt in comparison to conventional AuGe/Ni/Au contact.
Cl2 Plasma Etching of Si(100): Surface Chemistry and Damage
Authors: Layadi N. , Donnelly V. M. , Lee J. T. C. 
Published: September 2012

AbstractThe interaction of a Cl2 plasma with a Si(100) surface has been investigated by angle resolved x-ray photoelectron spectroscopy (XPS) and spectroscopic ellipsometry. From XPS, it was found that the amount of chlorine incorporated at the Si surface increases with ion energy. Chlorine is present as SiClx (x = 1-3) with average relative coverages (integrated over depth) of [SiCl]:[SiCl2]:[SiCl3] ≅ 1:0.33:0.1. These relative coverages don’t depend strongly on ion energy between 40 and 280 eV. Real-time spectroscopic ellipsometry measurements showed that the layer present during etching is stable when the plasma is extinguished and the gas pumped away. In addition, the equivalent thickness of damaged silicon and silicon-chloride within the surface layer increases with ion energy.
Improvement of the Refractory Metal/n-GaAs Interface by Low Temperature Anneal
Authors: Singh A. , Velásquez L. 
Published: September 2012

AbstractThe W/n-GaAs Schottky junctions A and B of area 1.75×l0-2 cm2 were fabricated by deposition of W on the chemically etched polished surfaces of n-GaAs samples by rf sputtering using a rf powers of 300 Watt for 30 min. The W contact B was subjected to a 90 min. thermal anneal at 390 °C. The room temperature I-V and C-V/f (with 200 Hz < f < 1 MHz) measurements were carried out for both the as-deposited and thermally annealed W/n-GaAs Schottky junctions A and B, respectively. From the direct I-V data, the values of 1.09 and 8.1×10-8 A for the ideality factor (n) and the reverse saturation current (Io), respectively, were estimated for the diode B, compared to the values of n=1.70 and Io=6.3×10-6 A for the diode A. The observed frequency dispersion in the zero bias capacitance in the diode B was attributed to fast interface states with a time constant, τ2=6 μs and density, Nss2=5.8×1010 eV-1cm-2, whereas, both the slow interface states (with τ1=4 ms and density, Nss1=7.8×1012 eV-1cm-2) and fast states (with τ2=1 μs and density Nss2=8.6×1010 eV-1cm-2) were responsible for the observed frequency variation of the zero bias capacitance in the diode A. For the forward bias values in the range 20-100 mV, the frequency dispersion in the measured capacitance suggested the presence of both the fast and slow interface states (with time constants differing by three orders of magnitude) in the as-deposited and the heat treated W/n-GaAs interfaces. Thermal anneal at 390 °C for 90 min. lowered the density of states at the W/n-GaAs interface by two orders of magnitude and resulted in the formation of a high quality rectifying W contact to n-GaAs with a rectification ratio of 1.4×104, a low Io and an ideality factor close to unity.
Relationship between Structural and Electrical Properties of Zn-Based Contacts to p-GaAs : Towards the Mechanism of the Ohmic Contact Formation
Authors: Kamińska E. , Piotrowska A. , Kasjaniuk S. , Gierlotka S. 
Published: September 2012

AbstractThe relationship between electrical properties and microstructure of pure Zn and Au(Zn) contacts to p-GaAs has been studied. Thermally activated changes in ФB correlate with structural processes at MS interfaces. For Zn/GaAs contacts, lowering of ФB from 0.63 eV to 0.35 eV corresponds to the penetration of Zn into the native oxide layer. In AuZn/p-GaAs contacts, β-AuZn phase is responsible for the formation of ФB=0.4 eV in as-deposited contacts. The onset of the ohmic behaviour of Au(Zn)/p-GaAs contacts (ФB=0.3 eV) coincides with the appearance of α3-AuZn phase for Zn content less than 20 at.% or α1-AuZn, for higher Zn concentrations.The obtained results prove that the mechanism responsible for the formation of low-resistance Zn -based contacts to p-type GaAs is associated with the lowering of the Schottky barrier at the metal/semiconductor interface. We suggest that the ultimate properties of these contacts are determined by the presence of a single, specific phase in a direct contact with the semiconductor.
Novel Metal-Semiconductor-Metal Photodetectors on Semi-Insulating Indium Phosphide
Authors: Palmer J.W. , Anderson W.A. 
Published: September 2012

AbstractDepositing Pd or Au on InP at substrate temperatures near 77K has previously been found to significantly reduce the interaction between the metal and semiconductor upon formation of the interface. In this work, this technique was used to fabricate metal-semiconductor-metal photodetectors (MSMPD’s) on semi-insulating (SI) InP substrates with superior characteristics compared to detectors formed using standard room temperature (RT) metal deposition. The low-temperature (LT) metallizations were patterned using a polyimide/SiO2 lift-off mask, and a SiO antireflection coating was used to attain near-zero reflection at λ=840nm. The detectors had an active area of 200μm × 200μm, and line widths and line spacings of 3μm. Detectors having a LT-Pd/SI-InP structure had a dark current of 80nA at 5V, which was a factor of 4 lower than the dark current of conventional MSMPD’s. Additionally, LT-Pd/SI-InP MSMPD’s exhibited excellent saturation characteristics and a responsivity of 0.75 A/W. Detectors with an indium-tin-oxide (ITO)/LT-Au(200Å)/SI-InP structure had a higher responsivity of 1.0 A/W, due to the relative transparency of this metallization. In contrast, MSMPD’s with RT metallizations had poor saturation characteristics, consistent with the results of others. The difference in the illuminated characteristics of MSMPD’s with RT and LT metallizations was due to a change in the internal photoconductive gain mechanism. In RT detectors, hole trapping at interface states near the cathode dominated the gain mechanism. In LT detectors, the difference in carrier transit-times dominated.
Enhanced Photoyield with Decreasing Film Thickness on Metal-Semiconductor Structures
Authors: Hoffmann V. , Brauer M. , Schmidt M. 
Published: September 2012

AbstractExperimental results of the internal quantum yield Yi associated with the internal photoemission on Au/n-Si structures are presented. The samples were prepared on Si(100) and Si(111) substrates with photoemitter layer thicknesses ranging from 5 nm to 50 nm. The Yi was measured at temperatures between 165 K and 300 K with the photoexciting energy varying from 0.72 eV to 1.07 eV. It was found that the Yi increases with decreasing Au layer thickness with a strong enhancement (40 times) in regard to the conventional Fowler theory. This experimental result is in good agreement with model calculations taking account of hot carrier scattering in the photoemitter layer. Barrier energies are larger than deduced from the Fowler plot.
Strain-Related Excitonic In-Plane Optical Anisotropy in (100) InGaAs/InAlAs/InP MQW
Authors: Dimoulas A. , Tober R. , Leavitt R. , Feng T. , Christou A. 
Published: September 2012

AbstractStrained (x=0.48) and lattice-matched (x=0.53) InxGal-xAs/InAlAs/InP (100) MQWs have been investigated by photoreflectance. In the strained sample the relative intensities of the light-hole and heavy-hole excitonic transitions is different for the two different polarizations of the incident light parallel and perpendicular to the ]0-1-1 ] direction. This polarization anisotropy is explained in terms of the spontaneous formation of “quantum wires” and the presence of anisotropic strain due to spinodal-like phase decomposition of the InGaAs alloy in In-rich and Ga-rich regions.
Band Lineup of Van Der Waals-Epitaxy Interfaces
Authors: Schlaf R. , Löher T. , Lang O. , Klein A. , Pettenkofer C. , Jaegermann W. 
Published: September 2012

AbstractEpitaxial lattice mismatched heterointerfaces between layered semiconductors and themselves and II-VI semiconductors (CdS, CdTe), respectively, have been prepared and their band lineup determined by photoemission. Different physical mechanisms, which govern the heterointerface formation, can be discriminated due to the specific properties of the van der Waals (vdW) surface. The interfaces between layered semiconductors mostly follow the electron affinity rule with a small but systematic deviation, which is assigned to the influence of interfacial quantum dipoles. However, the band lineup to the II-VI semiconductors shows a large interface dipole, which is related to a structural dipole from the polar, Cd terminated, face of the (111)- in case of Zinkblende CdTe- and the (0001)- in case of Wurtzite CdS- oriented overlayer film.
Contactless Electroreflectance Study of InxGa1-xAs/InP Multiple Quantum Well Structures Including the Observation of Surface/Interface Electric Fields
Authors: Malikova L.V. , Wan J.Z. , Pollak Fred H. , Simmons J.G. , Thompson D.A. 
Published: September 2012

AbstractContactless electroreflectance measurements at 300 K were performed on two InxGal-xAs/InP ]x = 0.53 (lattice-matched) and 0.75] samples containing three quantum wells (QWs) grown by gas-source molecular beam epitaxy. The spectra consisted of two excitonic transitions (le-l hh and le-l lh), corresponding to the fundamental conduction to heavy (h)- and light(l)- hole transitions, respectively, in the QW portion and a complicated Franz-Keldysh oscillation (FKO) pattern originating in the InP regions. Comparison between the experimental energies of le-l hh/le-llh and a theoretical envelope function calculation (including the effect of strain) made it possible to evaluate the conduction band offset parameters Qc =0.34+0.03 and 0.57+0.03 for x = 0.53 and 0.75, respectively. The InP related FKO beat patterns were analyzed by a Fourier transform method. It was found that the FKO spectra were due to the simultaneous contribution of at least three different fields (106 kV/cm, 36 kV/cm, and 23 kV/cm), which originate in the various interfaces, i.e., substrate/buffer, cap layer/surface, and buffer/QW structure. Identification of the different fields has been accomplished by comparison of the Fourier-transformed spectra before and after sulfur passivation of the structure surface.
In Situ Infrared Observation of Hydrogenation, Oxidation, And Adsorption On Silicon Surfaces in Solutions
Authors: Sugita Yoshihiro , Watanabe Satoru 
Published: September 2012

AbstractFourier transform infrared attenuated total reflection method was employed to observe Si surfaces during wet chemical treatments. We observed the time evolution of the surface chemical structure during the oxidizing of hydrogenated Si surfaces in such oxidants as ozonized water and hydrogen peroxide using (100) and (111) surfaces. We also examined the adsorption of surfactants which were introduced in an HF solution. The interaction of adsorbates at the interface and with molecules in a liquid phase was discussed based on our in situ observations.