bluuebunny/crossref_metadata_2025_split huggingface dataset:
Vascular function in health, hypertension, and diabetes: effect of physical activity on skeletal muscle microcirculation
Authors: Nyberg M. , Gliemann L. , Hellsten Y. 
Published: November 2015

Regulation of skeletal muscle blood flow is a complex process, which involves an integration of multiple mechanisms and a number of vasoactive compounds. Overall, muscle blood flow is regulated through a balance between vasoconstrictor and vasodilator signals. In a healthy cardiovascular system, the increase in muscle blood flow required for oxygen supply during exercise is achieved through a substantial increase in vasodilators locally formed in the active muscle tissue that overcome the vasoconstrictor signals. Most of the vasodilator signals are mediated via endothelial cells, which lead to the formation of vasodilators such as nitric oxide (NO) and prostacyclin. In essential hypertension and type II diabetes, the endothelial function and regulation of vascular tone is impaired with consequent increases in peripheral vascular resistance and inadequate regulation of oxygen supply to the skeletal muscle, which can affect muscle function. Central aspects in the vascular impairments are alterations in the formation of prostacyclin, the bioavailability of NO and an increased formation of vasoconstrictors and reactive oxygen species (ROS). Regular physical activity effectively improves vascular function by enhancing vasodilator formation and reducing the levels of vasoconstrictors and ROS.
MEMS Die Warpage During Curing of Die Attach Material
Authors: Lee Hohyung , Liu Ruiyang , Park Seungbae , Xue Xiaojie 
Published: November 2015

Microelectromechanical system (MEMS) packages are vulnerable to stresses due to its functional structure. During the assembly process of the package, stresses stemming out of CTE mismatches of the structural elements and curing of the die attach material can cause warpage of the MEMS die [1]. Even though die attach material takes relatively small volumetric portion of the package, it plays a critical role in warpage of the die due to its location and sensitivity of a MEMS sensor.
Most of virgin die attach adhesives are in a state of viscous liquid and, as it is cured the material properties such as modulus and CTE change. Accordingly, residual strain is cumulated on MEMS die after curing process and signal trim process is required. Therefore, the material properties changes depending on the curing profile is valuable information for assembly process of the MEMS package.
To monitor the material properties changes and shrinkage during curing process, strain and modulus of a die attach material are measured in each curing step. Also, to investigate the material property change depending on the curing profile, two different curing profiles are used.
Experimental data show that die attach materials are gradually cured after each thermal cycling, which cause the increment of the modulus and glass transition temperature (Tg) with shrinkage at elevated temperature. Using the measurement data, FEA model is built to predict the warpage of the MEMS die. In the FEA model, residual strain on MEMS die is calculated by inputting material properties of die attach in each curing step. Also, die warpage of the package during the curing process is monitored using an optical profiler for the validation of the simulation results.
Hot Spot Elimination by Thin and Smart Heat Spreader
Authors: Ahamed Mohammad Shahed , Saito Yuji , Mochizuki Masataka , Mashiko Koichi 
Published: November 2015

Heat pipes are recognized as an excellent heat transport devices and extensively investigated for applications in electronic cooling. Different types of heat pipes have been developed such as micro/miniature heat pipes, loop heat pipes and so on, and these heat pipes have been widely applied in the field of electronics cooling such as notebook, desktop, data center; as well as aerospace, industrial cooling field. However, in recent years the application of heat pipe is widening to the filed of hand held mobile electronic devices such as smart phone, tablet pc, digital camera etc. With the development in technology these devices have different user friendly functions and capabilities, which requires the highest processor clock speed. In general, high clock speed of processor generates lot of heat which need to be spread or removed to eliminate the hot spot. It becomes a challenging task to cool such electronic devices as mentioned above with a very confined space and concentrated heat sources. Regarding to this challenge, ultra thin flat heat pipe is developed; this newly developed heat pipe consists of a special fiber wick structure which can ensure vapor spaces on the two sides of the wick structure.
In this paper a novel thin spreader is proposed to eliminate the hot spot; generally the proposed heat spreader consists of 0.20mm thick metal plate and ultra thin heat pipe of 0.40mm thickness soldered in its body. Maximum thickness of this spreader is 0.63mm. Metal plate is 60mm × 110mm in size; and the ultra thin heat pipe can be fabricated from different original diameter ranges from 2.0mm to 3.0mm Cu tube. Theoretical and experimental analysis have been done to evaluate this thin spreader. In addition, some real application of this spreader will be introduced in this paper.
Rack Server Solution in Data Center
Authors: Kang Sheng , Chen Guofeng , Wang Chun , Ding Ruiquan , Zhang Jiajun , Zhu Pinyan , Liu Chao , Ahuja Nishi 
Published: November 2015

With the advent of big data and cloud computing solutions, enterprise demand for servers is increasing. There is especially high growth for Intel based x86 server platforms. Today’s datacenters are in constant pursuit of high performance/high availability computing solutions coupled with low power consumption and low heat generation and the ability to manage all of this through advanced telemetry data gathering. This paper showcases one such solution of an updated rack and server architecture that promises such improvements.
The ability to manage server and data center power consumption and cooling more completely is critical in effectively managing datacenter costs and reducing the PUE in the data center. Traditional Intel based 1U and 2U form factor servers have existed in the data center for decades. These general purpose x86 server designs by the major OEM’s are, for all practical purposes, very similar in their power consumption and thermal output. Power supplies and thermal designs for server in the past have not been optimized for high efficiency. In addition, IT managers need to know more information about servers in order to optimize data center cooling and power use, an improved server/rack design needs to be built to take advantage of more efficient power supplies or PDU’s and more efficient means of cooling server compute resources than from traditional internal server fans. This is the constant pursuit of corporations looking at new ways to improving efficiency and gaining a competitive advantage.
A new way to optimize power consumption and improve cooling is a complete redesign of the traditional server rack. Extracting internal server power supplies and server fans and centralizing these within the rack aims to achieve this goal. This type of design achieves an entirely new low power target by utilizing centralized, high efficiency PDU’s that power all servers within the rack. Cooling is improved by also utilizing large efficient rack based fans for airflow to all servers. Also, opening up the server design is to allow greater airflow across server components for improved cooling. This centralized power supply breaks through the traditional server power limits. Rack based PDU’s can adjust the power efficiency to a more optimum point. Combine this with the use of online + offline modes within one single power supply. Cold backup makes data center power to achieve optimal power efficiency. In addition, unifying the mechanical structure and thermal definitions within the rack solution for server cooling and PSU information allows IT to collect all server power and thermal information centrally for improved ease in analyzing and processing.
Inverse Design of Cooling of Electronic Chips Subject to Specified Hot Spot Temperature and Coolant Inlet Temperature
Authors: Reddy Sohail R. , Dulikravich George S. 
Published: November 2015

Most methods for designing electronics cooling schemes do not offer the information on what levels of heat fluxes are maximally possible to achieve with the given material, boundary and operating conditions. Here, we offer an answer to this inverse problem posed by the question below. Given a micro pin-fin array cooling with these constraints:
- given maximum allowable temperature of the material,
- given inlet cooling fluid temperature,
- given total pressure loss (pumping power affordable), and
- given overall thickness of the entire electronic component,
find out the maximum possible average heat flux on the hot surface and find the maximum possible heat flux at the hot spot under the condition that the entire amount of the inputted heat is completely removed by the cooling fluid. This problem was solved using multi-objective constrained optimization and metamodeling for an array of micro pin-fins with circular, airfoil and symmetric convex cross sections that is removing all the heat inputted via uniform background heat flux and by a hot spot. The goal of this effort was to identify a cooling pin-fin shape and scheme that is able to push the maximum allowable heat flux as high as possible without the maximum temperature exceeding the specified limit for the given material. Conjugate heat transfer analysis was performed on each of the randomly created candidate configurations. Response surfaces based on Radial Basis Functions were coupled with a genetic algorithm to arrive at a Pareto frontier of best trade-off solutions. The Pareto optimized configuration indicates the maximum physically possible heat fluxes for specified material and constraints.
Reduced Order Modeling for Chip-Embedded Micro-Channel Flow Boiling
Authors: Parida Pritish R. 
Published: November 2015

The information technology (IT) industry is exploring three-dimensional (3D) stacking of chips to maintain future computing scalability. However, 3D chip stacks require a solution to significant new thermal challenges. Interlayer two-phase evaporative cooling with a chip-to-chip interconnect-compatible dielectric fluid is an enabling technology but faces significant development issues. One such issue is the inability to thermally model a microprocessor with spatially varying heat sources together with a two phase microfluidic convection network. While progress has been made on two-phase conjugate simulations at the chip and channel levels, none of those provide a computationally manageable approach.
In the present study, a reduced physics conjugate heat transfer model has been developed for simulating two-phase flow boiling through chip embedded micron scale cavities. This model has been validated with good accuracy against data available from literature. The validated model was then extended to predict the thermal performance of a state-of-the-art microprocessor chip with embedded two-phase cooling, where significant improvements in device junction temperatures were observed compared to the baseline cooling solution.
Modeling Thermal Spreading Resistance in Via Arrays
Authors: Fish Michael , McCluskey Patrick , Bar-Cohen Avram 
Published: November 2015

As thermal management techniques for 3D chip stacks and other high power density electronic packages continue to evolve, interest in the thermal pathways across substrates containing a multitude of conductive vias has increased. To facilitate the use of numerical models that can reduce computational costs and time in the thermal analysis of through-layer via (TXV) structures, much research to date has focused on defining effective anisotropic thermal properties for a pseudo-homogeneous TXV medium using isothermal boundary conditions. While such an approach eliminates the need to model heat flow through individual vias, the resulting properties can be shown to depend on the specific boundary conditions applied to a unit TXV cell. More specifically, effective properties based on isothermal boundary conditions fail to capture the local “micro-spreading” resistance associated with more realistic heat flux distributions and local hot spots on the surface of these substrates.
This work assesses how the thermal spreading resistance present in arrays of vias in interposers, substrates, and other package components can be properly incorporated into the modeling of these arrays. We present the conditions under which spreading resistance plays a major role in determining the thermal characteristics of a via array and propose methods by which designers can both account for the effects of spreading resistance and mitigate its contribution to the overall thermal behavior of such substrate-via systems. Finite element modeling of TXV unit cells is performed using commercial simulation software (ANSYS).
Compactly stated, micro-spreading contributes to the total resistance RT = R1d + (fu + fl)Rsp,max, where 0≤ f ≤ 1 are adjustment factors that depend on the conditions at the upper and lower surfaces of the via array layer and Rsp,max occurs under worst-case conditions.
Development of Heat Transfer Tools for Sizing Flexible Graphite Spreaders in Mobile Applications
Authors: Beyerle Rick , Shives Gary 
Published: November 2015

Even as the use of flexible graphite heat spreaders becomes ubiquitous in mobile electronics, numerically quantifying the heat dissipation remains a challenge. The rapid pace of development of mobile devices has deterred the industry from establishing standards, and rules of thumb are few, as are closed-form solutions. Users have requested numerical methods and tools to simplify the selection of flexible graphite heat spreaders from among the standard thicknesses and grades, as well as to quantify the effect of changing heat transfer area and configuration.
In the presence of adjacent layers — adhesives, dielectrics, or still air gaps — the thin nature of the materials and the high, orthogonal thermal conductivity ratios of the graphite combine to create a complex conjugate heat transfer problem. Although the thinnest of these sheets constitute but a tiny fraction of the thickness of a cell phone or tablet, their dominant role in the heat transfer requires that they not be neglected in the calculations. Some CFD software guidelines advise using multiple meshing layers to capture fully the heat transfer in these spreaders, while others (primarily FEA based) provide a plate element that negates the need for discretization. In the former, a fully meshed spreader confounds the goal of a quick calculation, but the flexibility of 3D solution also demands meticulous attention to the details, provides “an answer” that is easy to misinterpret, and in the hands of an unskilled user, invites error.
The goal of this project is to establish the guidelines for computing heat spreading in graphite, including cell dimension ratio, mesh density, spreading radius, and transport capacity and to marry the orthogonal properties of the material with the row-column format of a spreadsheet or matrix software. It also reviews methods for addressing the non-orthotropic situations such as angled plates, and the curved surfaces seen in the case of graphite wraps and flexible hinges. There are cases in which a simple contact resistance value adequately represent a graphite thermal interface material, but others that require an accounting for the lateral conductivity that increases the efficacy of the TIM. Finally, the error of the calculation is assessed for a simple representative geometry.
Optimum Design and Operation of Thermoelectric Heat Pump With Two Temperatures
Authors: Yazawa Kazuaki , Shakouri Ali 
Published: November 2015

We present a comprehensive analysis and optimization of the thermoelectric (TE) heat pump and refrigeration in contact with two constant-temperature reservoirs, followed by a discussion of their cost effectiveness. In many applications in electronics cooling, the heat source temperature is constrained as well as the gas or liquid cooling heat sink. We optimize the thermoelectric design by changing both the element (leg) thickness and drive current simultaneously in order to achieve maximum energy efficiency, i.e., to obtain the highest coefficient of performance (COP) for the heat pump. Each variable and performance is considered per unit area.
COP vs cooling capacity, which is the heat amount pumped, by changing the driving current, shows a unique characteristic and it looks like the Greek character ‘beta’ in a plot. This ‘beta plot’ gives a global view of the performance of various TE heat pump systems. We discuss the similarity with the graph obtained in power generation in contact with the constant temperature reservoirs when the trade-off between the efficiency and power output is considered. In this plot, the maximum COP is found at a much smaller current compared to the maximum heat cooling capacity Qmax. This Qmax is found when the internal resistance is sqrt (1 + ZT) times the sum of the external resistances, but only when these contacts are symmetric and the net temperature difference is zero. The ratio increases slightly as the net temperature difference increases (heat pumping to a higher temperature). This shows some differences compared to the power generation mode where an impedance match happens when the ratio of internal to external resistances is constant at sqrt (1 + ZT). If the contact thermal resistances with the hot and cold sides are asymmetric, Qmax and the optimum resistance ratio are both reduced when the heat sink resistance increases and they both increase as the heat sink resistance decreases.
TE materials are expensive relative to the other components; hence, it is important to minimize the material use. The COP per cost and cooling capacity per cost are investigated. Similar to power generators, the TE element can be thinner as the fractional area coverage of the TE elements is reduced, while maintaining a constant internal thermal resistance. The most cost effective design is found to be thinner than that of the maximum performance. Also, the ZT value impact for the cost performances is smaller, especially in COP.
Enhancement and Optimization of Planar Impingement Heat Transfer for Thermoelectric Power Generation
Authors: Yazawa Kazuaki , Heister Stephen D. , Fisher Timothy S. 
Published: November 2015

We present an analytic model and optimization of impingement heat transfer in fluid-to-fluid heat exchangers with integrating a thermoelectric (TE) generator between the hot and cold fluid flows. In power generation systems, designing for maximum power output generally involves balancing the external thermal resistances while the generator contacts the hot and cold temperature reservoirs. In fluid-to-fluid heat exchangers, fluid temperatures are not constant or uniform. They gradually change along the flow direction. In general, counter-flow heat exchangers outperform parallel flow configurations in maximizing TE power generation using internal fluid flows. We show here the performance of our impingement model compared with a counter-flow configuration as the base line.
To obtain the maximum power output from practical thermoelectric materials (ZT values are 1.2–1.8), the enhancement of liquid-to-wall heat transfer is significant. An array of traditional impinging jet orifices provides a uniformly planar and focused heat transfer process that spatially targets the TE elements. This approach provides more uniform hot and cold side temperatures among the TE elements. We investigate the impact of introducing impingement orifices directly at the locations of the TE elements. The major focus of this work is the trade-off between the advantage of increasing power generation by impingement and the disadvantage of introducing additional pressure drop.
Decreasing the external thermal resistances yields not only a larger maximum power output but also requires thinner TE elements. This enables lower cost per power generation capacity approaching the 0.2–0.3 $/W range as well as a more lightweight design. We report here the associated cost impacts for the impinging jet arrangement.
Design optimization depends on the specific constraints and parameters, such as TE material and substrate thickness, flow design to avoid the stagnation, and required exit temperatures. In some cases, active pumping by an additional actuator can augment the enhancement, while a fraction of generated power is consumed for the actuation. In the paper, we show examples of gas and liquid flow cases.
New Super-Low CTE (0.7 ppm/K) Core Material for Next Generation Thin CSP
Authors: Nakamura Yukio , Oohashi Kenichi , Morita Koji , Nomoto Shuji , Suzuki Takayuki , Takanezawa Shin , Tsuchikawa Shinji , Takekoshi Masaaki 
Published: November 2015

The thinner and higher density PKG (package) is being required strongly for the growth of smaller mobile devices. Especially, package on package technology (PoP) has become a mainstream for application processors which are installed in smartphones and tablets.
However, the warpage of thinner PKG often causes a problem at the chip mounting process. The main factor of warpage is the mismatch of CTE (coefficient of thermal expansion) between substrate and chip. Therefore, the lower CTE core materials are needed for the thinner PKG.
Recently, Hitachi Chemical has developed the super-low CTE material, core and prepreg, applying our new resin system and filler treatment technology, and placed it on the market. Furthermore, a super-low CTE material of 0.7 ppm/K is currently under development. The super-low CTE material shows the best warpage performance in our low CTE core material lineups, maintaining its higher Tg, high modulus and low Dk/Df values.