bluuebunny/crossref_metadata_2025_split huggingface dataset:
Estimates for the Onset of Type IV Cracking in Grade 91 Power Plant Components
Authors: Brett S. J. 
Published: October 2024

Abstract
Grade 91 steel, while increasingly popular in high-temperature power plants for both retrofit and new construction applications, faces significant challenges with Type IV cracking at the outer parent side edge of the weld heat affected zone. This structural integrity issue has led to extensive weld inspection requirements and, in severe cases, the premature replacement of grade 91 retrofit headers before their intended design life. This paper presents a method for estimating Type IV cracking timelines in operating grade 91 components by analyzing crossweld Type IV data to determine when Type IV life deviates from parent life. By combining test results from various temperatures, the method generates a generalized prediction of Type IV life that can be extrapolated to any temperature of interest, providing a practical lower bound estimate for service life of the weakest grade 91 material. This approach, which can be applied to service operating conditions to establish realistic inspection timelines for plant components, has already successfully identified early-stage Type IV cracking in two retrofit headers and is being expanded to additional grade 91 components.
Weldability of EPRI P87
Authors: Siefert J. A. , Tanzosh J. M. , Shingledecker J.P. 
Published: October 2024

Abstract
Dissimilar metal welds (DMWs) between ferritic and austenitic materials at elevated temperatures have long posed challenges for boiler manufacturers and operators due to their potential for premature failure. As the industry moves towards higher pressures and temperatures to enhance boiler efficiencies, there is a need for superior weld metals and joint designs that optimize the economy of modern boilers and reduce reliance on austenitic materials for steam headers and piping. EPRI has developed a new filler metal, EPRI P87, to enhance the performance of DMWs. Previous work has detailed the development of EPRI P87 for shielded metal arc welding electrodes, gas-tungsten arc welding fine-wire, and its application in an ultra-supercritical steam boiler by B&W. This study examines the weldability of EPRI P87 consumables through various test methods, including Varestraint testing (both trans and spot), long-term creep testing (approximately 10,000-hour running tests), procedure qualification records for tube-to-tube weldments between traditional/advanced austenitic steels and creep-strength enhanced ferritic steels, and elevated temperature tensile testing. Macroscopic examinations from procedure qualification records using light microscopy confirmed the weldability and absence of cracking across all material combinations. The findings demonstrate that EPRI P87 is a weldable alloy with several advantages for DMW applications and highlight that specific weld joint configurations may necessitate the use of high-temperature tensile data for procedure qualifications.
Toughness Evaluation of Welds in 9Cr-1Mo-V and 9Cr-0.5Mo-V Steels Made Using the Flux-Cored Arc Welding (FCAW) Process
Authors: Jaske C.E. , Berg Z. , Andress T. 
Published: October 2024

Abstract
The toughness of girth welds in 9Cr-1Mo-V and 9Cr-0.5Mo-V steel seamless pipe (ASME SA-335 Grades P91 and P92, respectively) made using the flux-cored arc welding (FCAW) process was evaluated. Electrodes from two different suppliers were used for production quality welding of each steel. The welds received post-weld heat-treatment (PWHT) in accordance with the requirements of the ASME Code. The objective of the work was to determine if the fracture toughness of the FCAW welds was acceptable for high-temperature steam piping. Toughness was measured using standard sized Charpy V-notch impact specimens. The specimens were oriented transverse to the weld seam with notch located approximately in the center of the weld metal and parallel to the direction of weld seam. Full-range (lower to upper shelf) Charpy impact energy and shear area curves were developed for each weld joint. These were used to estimate the temperatures corresponding to 30 ft-lb average impact energy. The estimated temperatures were well below the service temperature but were above the typical hydrostatic test temperature.
Flux Cored Wires for High Integrity Applications
Authors: Newell William F. 
Published: October 2024

Abstract
The use of flux-cored arc welding (FCAW) is rapidly gaining acceptance in a variety of industries. Much of the gains are due to advances in manufacturing technology that result in superior wires that satisfy both technical and operability concerns. Additionally, productivity gains and the ability to use unsophisticated welding equipment have made these wires very popular. This paper concentrates on FCAW wires that have been formulated to address chromium-molybdenum, nickel base, and stainless steels for high-temperature and environmental applications. Mechanical properties, including creep rupture strength and ductility data, as well as corrosion in environmental components, are discussed.
Few-Shot AI Segmentation of Semiconductor Device FIB-SEM Tomography Data
Authors: Stegmann Heiko , Cognigni Flavio 
Published: October 2024

Abstract
Image segmentation is a valuable tool for visual image data inspection of semiconductor device structures. For the large amounts of data provided by recent advancements in automated scanning electron microscope (SEM) and focused ion beam-scanning electron microscope (FIB-SEM) data acquisition, automatic segmentation becomes indispensable to fully exploit the information contained in the data in automated characterization workflows. Using two exemplary FIB-SEM tomography datasets, we explored artificial intelligence based image segmentation using only a minimum amount of training images annotated by a human user.
Enhanced Dynamic Laser Stimulation Method for Fault Isolation
Authors: Kim Keonil , Shin Kyunghoon , Oh Ghil-Geun 
Published: October 2024

Abstract
Optical Fault Isolation (OFI) techniques have been still very effective method for semiconductor failure analysis such as silicon (Si) debugging and defect localization. Dynamic Laser Stimulation (DLS) is one of the most powerful application not only for marginal failure but also to isolate the potential design weak point at the early phase of product development. However, as circuit density of recent advanced system on chip (SoC) extremely increases with process scaling down, vector depth of products are also dramatically increased. This presents a challenging aspect for failure analysis because it is time consuming and reduces the accuracy of DLS analysis, which relies on test vector looping. As a consequence, it can lead to critical issues, such as missing the opportunity for design revision and slowing down the process improvement for yield enhancement This paper proposes a simple method of how to enhance the speed and accuracy of DLS evaluation for SCAN failure in high-density integrated circuits fabricated using the 3nm gate all around (GAA) process. Experimental results demonstrate that the proposed technique can reduce the time required for DLS analysis of SCAN failure while also increasing its accuracy.
Automating Routing of Product Returns for Failure Analysis with Neuro-Symbolic AI
Authors: Mitterer Felix , Burmer Christian , Schekotihin Konstantin 
Published: October 2024

Abstract
Before failure analysis (FA) can start, a product must get from the customer to the correct location, which is not always trivial, especially in larger companies with many FA labs. Automating and optimizing this routing, therefore reducing manual labor, misrouting, and turnaround time, requires the development of problem-solving methods utilizing both explicit and implicit knowledge. The first type refers to known routing rules, e.g., based on lab equipment or certifications, whereas the second type must be induced from available data, e.g., by analyzing customer descriptions using machine learning (ML) methods. Therefore, to solve the routing problem, we suggest a neurosymbolic integration of natural language processing methods into the symbolic context of a logic-based solver. The conducted evaluation shows that the suggested method can reduce the reships by appr. 33% while ensuring the fulfillment of all shipment constraints.
Fast Laser Probing Using Gigahertz Digitizer
Authors: Winson Lua , Venkat-Krishan Ravikumar , Angeline Phoa 
Published: October 2024

Abstract
Laser probing (LP) has traditionally been used with high-bandwidth oscilloscopes to gather transistor toggling data, providing picosecond-level temporal accuracy. However, this method requires longer acquisition time, making it less favored compared to other fault isolation (FI) techniques. This paper presents an innovative approach to LP using a high-speed digitizer, which significantly reduces the overall LP cycle time. Practical use cases and recommendations for implementing this method are also discussed, highlighting the benefits of using high-speed digitizers in LP for fault isolation.
Optimizations and Case Studies—Decapsulation of Hardened Epoxy SiC MOSFETs and Diodes via JIACO Microwave Induced Plasma Etching
Authors: Sorrells Connor J. , Nielsen Kyle E. , Walters Bret A. , Tang Jiaqi , McKinnon Mark W. 
Published: October 2024

Abstract
One of the foremost challenges in the field of SiC MOSFET failure analysis is the effect of thermally modified mold compound on the decapsulation process. The extended total etch time that thermal modification imposes on the process of wet chemical decapsulation has created a niche for new techniques to fill. This paper focuses on use cases for the JIACO microwave-induced plasma (MIP) etching system and how to best optimize the tool’s settings to facilitate time-efficient decapsulations. The words and data that follow aim to present what has been determined to be a successful alternative for the decapsulation of thermally modified Si and SiC power devices when wet etches prove to be ineffective.
EBIC at Cross-Section
Authors: Wang Yuyan , Wheeler Drew , Huerta Rafeal , Bhimavarapu Usha 
Published: October 2024

Abstract
Electron-beam-induced current (EBIC) analysis at device cross-sections has emerged as a powerful technique for semiconductor device characterization. Unlike traditional top-down approaches, cross-sectional EBIC directly visualizes junction profiles and depletion region behavior under various bias conditions. This paper synthesizes several years of research through five case studies demonstrating cross-sectional EBIC applications. Our methodology combines precise sample preparation techniques—including laser cutting with polishing or direct cleaving, followed by focused ion beam (FIB) fine-polishing—with variable electron beam landing energies to examine junctions at different depths. For advanced technology nodes, we emphasize the importance of EBIC resolution and noise floor optimization for reliable results. We demonstrate how the observed space charge region width correlates with doping concentration and can be modulated through reverse bias application, providing valuable insights into device characteristics.
An Innovative Analytics Platform for High-Resolution 3D Ion Imaging and SIMS Nanoanalytics with Precise Sample Navigation
Authors: Gnauck Peter , Ost Alexander , Richter Torsten 
Published: October 2024

Abstract
Advanced nanoscale material characterization requires high lateral resolution and sensitivity. This paper presents a novel analytical system that integrates a liquid metal alloy ion source (LMAIS), magnetic sector secondary ion mass spectrometry (SIMS), and laser interferometer stage with focused ion beam (FIB) technology. This integration enables high-resolution 2D/3D structural visualization and precise surface analysis at the nanoscale. We demonstrate the system's enhanced capabilities in microelectronics applications, where it achieves unprecedented spatial resolution and analytical sensitivity. Our results show how this advanced nano-analysis platform expands the boundaries of materials science and semiconductor technology characterization.
Nitrogen Vacancy Quantum Sensing for Current Density Imaging with Sub 30 nm Resolution
Authors: Puebla Hellmann G. , Josteinsson B. , Josephy S. , Morales A. 
Published: October 2024

Abstract
Non-destructive failure analysis is often limited by the sensitivity or the resolution of the method utilized, making state-of-the-art integrated circuits difficult to analyze. Here, we present a powerful method for surface failure analysis, based on scanning a single Nitrogen Vacancy center over the sample. This results in quantitative current density maps with high sensitivity and sub-30 nm resolution, detecting for example, open and short circuits and visualizing the current flow. We demonstrate the technology by mapping current flow through device structures separated by gaps as low as 30 nm. We further show how resolution is reduced as a capping layer is added, by measuring at a fixed offset of 30 nm from the surface.
Innovations in Beam-Based Defect Localization Methods for Advanced 3D Interconnects
Authors: Jacobs K.J.P. , Beyne E. , Matsumoto T. , Tominaga S. , Terada H. 
Published: October 2024

Abstract
Advancements in light-induced capacitance alteration (LICA) and optical and ultrasonic beam-induced resistance change ((S)OBIRCH) methods for the localization of open, resistive, and leakage failures in 3D integration technologies are reported. Additionally, a novel sample preparation approach is introduced to improve imaging resolution for optical fault isolation methods. This approach involves re-routing probe pads using a low-profile redistribution layer, realized by conductive inkjet printing, enabling the use of short-working-distance and liquid immersion objectives while probing from the same side of the chip.
Innovative Sample Preparation for Nano-Probing at Pixel Level in 3D BSI Imaging Products
Authors: Martin Sophie , Jacquier Alexandre , Petit Emmanuel , Larre Philippe 
Published: October 2024

Abstract
In the field of semiconductor failure analysis, new sample preparation challenges arise due to the emergence of new chip architectures, such as 3D Back Side Imager (BSI) products. Indeed, these products are constituted of a specific stack: an imager chip at the top associated back-to-back with a digital chip at the bottom on a silicon substrate carrier. All the work presented hereafter is triggered by a nano-probing analysis case on a failing pixel of the imager chip. The analysis consists in characterizing the transistors of the pixel at contact level to isolate the electrical failure. It imposes to keep the integrity of the top chip (imager chip) front-end layers to have the possibility to measure the transistors. It can only be achieved by de-processing from the silicon substrate carrier side. Thus, the particularity of the 3D BSI chip conception implies a more complex delayering protocol than the ones commonly used. In this paper, the sample preparation protocol is presented in detail and its successful implementation is demonstrated through a concrete analysis case in 3D BSI 40 nm technology. This paper also discusses the advantages of the technical solutions implemented to overcome the complexity of the presented architecture.
Novel Backside IC Preparation Stopping on STI with Full Circuit Functionality Using Chemical Mechanical Polishing (CMP) with Highly Selective Slurry
Authors: Herfurth Norbert , Adesunkanmi Awwal A. , Bouchtouq Abdelkhalek , Zwicker Gerfried , Boit Christian 
Published: October 2024

Abstract
Mechanical sample preparation is a crucial and indispensable step in modern failure analysis (FA). Traditional methods excel in reducing bulk silicon to thicknesses of several tens of micrometers. However, contemporary demands necessitate sample preparation below 10 µm or even below 5 µm, which is challenging, time-consuming, and requires an expensive toolset and advanced operator expertise. Existing methods, which rely on mechanical components for bulk removal, induce mechanical stress and microcracks that can alter the electrical characteristics of the sample. Maintaining the sample's electrical behavior is essential for accurate FA. This paper introduces a novel approach to sample preparation that employs concepts from wafer-level chemical mechanical polishing (CMP). This method ensures reliable sample preparation without introducing microcracks, accurately halts material removal at the shallow trench isolation (STI) – or deep STI - level, and maintains the sample's electrical functionality. The proposed approach is discussed in detail, including successful thinning of various sample types to the STI level, which were subsequently tested for electrical functionality.
Advanced Package Sample Preparation Leveraging Precision CNC-Based Milling and Selective Microwave Induced Plasma Etching
Authors: Sanchez Joseph , Zhang Chuan , Aguada John , Li Jane , Tang Jiaqi , Richardson Chris 
Published: October 2024

Abstract
The rapid development of advanced packaging technologies for high-performance computing (HPC) applications poses significant challenges for sample preparation methodologies. Conventional techniques are often insufficient to cope with the complex architectures and heterogeneous materials of modern packages, such as COWOS (Chip-on-Wafer-on-Substrate) and 3D structures. In this paper, we present a novel approach for sample preparation that leverages precision CNC (Computer Numerical Control) milling and selective MIP plasma etch. These methods enable precise and selective removal of unwanted material, while preserving the integrity of the target region of interest. We demonstrate the effectiveness of our approach on various advanced packages and show how it facilitates the failure analysis tasks for HPC chips.
Heterogeneous Integrated Failure Analysis Using Radio Frequency Signal Detection/Injection with Power Spectrum Analysis
Authors: Christiansen Joel T. , Walraven Jeremy A. , Coleman Flora A. , Smith Edmund H. , Cole Edward I. 
Published: October 2024

Abstract
The rise of 2.5D and 3D heterogeneous integrated devices presents unique challenges for failure analysis, as traditional 2D analysis techniques prove inadequate due to chip stacking, layer interconnects, die obscuration, and limited access to test points. While various non-destructive techniques—including 3D X-ray imaging, lock-in thermography, magnetic field imaging, and optical beam methods—offer partial solutions, each has specific limitations. We present a novel defect localization approach using radio frequency electromagnetic (EM) emanations, implemented in two ways: detecting EM signals emitted by the device under controlled input conditions, or measuring induced voltage responses to signals injected via a scanning antenna. The technique employs scanning magnetic or electric field antennas to generate 2D or 3D electromagnetic maps revealing current and electric continuity patterns, enabling detection of shorts (additional current paths) or opens (blocked current paths). By incorporating power spectrum analysis (PSA) at each scan point, our method—designated as EM antenna PSA (EMAPSA) or EM injection PSA (EMIPSA)—provides comprehensive defect detection capabilities for 3D heterogeneous integration failure analysis.
Inexpensive and Efficient Backside Decapsulation Technique for Challenging Down Bond Devices
Authors: Cheng Chaoliang , Zhou Jing 
Published: October 2024

Abstract
Backside decapsulation is necessary to be able to perform failure analysis on devices with dense metallization. However, for down bond devices with the down bonds located too close to the die edge, using the traditional chemical method tends to overetch the bonding wires, and using the precision milling tool is too time-consuming. In this paper, a new inexpensive and efficient method is developed for challenging down bond devices with the die attach pad (DAP) buried in the molding compound. This method uses laser to reduce the thickness of the whole die area molding compound first and then partially expose the DAP, which length and width are smaller than that of die area. Lastly, it uses a chemical method to remove the die DAP, and keep a measured thickness of the molding compound to protect the bonding wires from being over-etched.
E-beam Probing and E-beam-Assisted Device Alteration (EADA) for Fault Isolation in PowerVia and Advanced Technology Nodes
Authors: Huening Jennifer J. , Tong Xianghong Tom , Zhao Shuai , Thirugnanasambandam Ravi , Wang Yunfei , Ryu Hyuk Ju , Joshi Prasoon , Senger Mitchell J. , Oh May Ling , Yuan Renliang , Waelder Jacob , Matte Anil , Niu Baohua , Ma Zhiyong , Leslie Neel , Vickers James 
Published: October 2024

Abstract
This paper demonstrates that e-beam assisted device alteration (EADA) is a powerful, high-resolution technique for fault isolation debug for advanced technology nodes. A case study using this technique is reviewed and shows successful isolation of a defective single inverter. In addition, fundamental studies of ring oscillator behavior and device perturbations with e-beam exposure found clear correlations for electron beam exposure with NMOS/PMOS device parameters. Electron-hole pair generation in the device with beam exposure is likely the main component for the perturbation, but there may be other contributing factors including charging effects and/or heating.
Transmission Electron Imaging AND Diffraction in an SEM (aka, STEM-in-SEM): What, Why, and How To Do This in Your Microscope
Authors: Holm Jason 
Published: October 2024

Abstract
Presentation slides for the ISTFA 2024 Tutorial session “Transmission Electron Imaging AND Diffraction in an SEM (aka, STEM-in-SEM): What, Why, and How To Do This in Your Microscope.”
PERCEPTIONS OF URBAN LANDSCAPE: A STUDY OF COGNITIVE MAPPING IN AIN BEIDA, ALGERIA
Authors: Bekri Narimane  , Mazouz Said  
Published: October 2024

The urban landscape of Algerian cities features a mix of traditional and contemporary architectural forms, offering a diverse range of experiences and perspectives. The heterogeneous nature of this terrain motivated us to investigate the cognitive representation of this scenery in the minds of the inhabitants of Ain Beida.The study emphasizes the cognitive map, which manifests as visual representations, such as drawings or images, as well as sensory experiences and memories that are gathered and stored over a period of time. The perception of this mental image varies among individuals and locations. We conducted a comprehensive analysis of the existing literature to precisely identify the category under investigation and select a suitable approach for evaluating, comprehending, and interpreting the urban landscape of the above-mentioned city.An iconographic was employed as a research instrument selected to carry out a comprehensive survey with a sample of the population encompassing various socio-professional groups, with a primary focus on urban stakeholders such as architects, urban planners, and elected officials. The findings revealed a diverse range of mental maps, indicating the unique perspectives of each interviewee on their city.