Effect of Inductively Coupled Electromagnetic Field on Bottom Oxide Etch in a High Aspect Ratio Trench
Authors: Sardo Stefano , Palombizio Antonio , Mannarino Manuel , Redolfi Augusto , Haspeslagh Luc 
Published: July 2021

CMOS optical sensors devices are becoming increasingly important and popular for many different applications. Some of these devices are fabricated starting from SOI wafers and using semiconductor manufacturing techniques.
A common feature of the CMOS sensors is the isolating trench that protects the device from electrical noise. In our particular application, the trench is much deeper than usual, in order to isolate the sensor also from stray light interference.
In the present paper we describe the multistep etch process used to create the trench rounding all around the sensor chip.
First a silicon oxide HM (Hard Mask) is etched in a CCP (Capacitively Coupled Plasma) chamber with a recess in silicon as shallow as possible to preserve the photo-resist; then an ICP (Inductively Coupled Plasma) reactor is used to etch 23um silicon etch, landing onto a 1um BOX (Buried OXide) layer.
Finally the BOX is etched with a dedicated step followed by a second silicon etch to get a deeper isolating trench, both steps performed in the same ICP chamber.
The trench layout is lined internally by a closed-loop metal line that is buried in the HM stack.
While working on the process development, an unexpected asymmetrical slope of the BOX sidewalls was observed.
This has prompted us to focus the attention to the BOX etch and the effect that an applied electromagnetic field and its interaction with the metal line, exert on the etch behaviour.
The plasma chamber employed for the BOX and silicon etch is a reactor with a top ICP source and a platen electrode, powered by two independent RF generators, both at 13.56MHz. The peculiarity of this etcher is to have an additional coil – where a high value continuous electrical current flows - used to modulate the plasma shape in the chamber.
The initial BOX etch recipe applied had been used successfully in the past for similar scopes. However when it was employed for this specific application, the subsequent XSEM inspection highlighted an asymmetrical shape of the sidewalls, in different locations on the wafer. In particular the sidewall opposite to the metal line always shows an accentuated slope, compared to the other that is straight and vertical.
Starting from this observation, we assumed there was an influence of the presence of the metal line during the BOX etch. The hypothesis is that the electromagnetic field generated by the additional coil of the etcher, couples with the metal lines, acting as spires on the wafer, resulting in a local electromagnetic field that has an effect on electron and ion trajectories during the etch. The result of this is the local asymmetry of the sidewalls.
To prove this hypothesis, three additional tests have been executed, so to have four distinct conditions: 1) BOX etch with Coil Current ON and metal spires buried in the HM stack; 2) BOX etch with Coil Current OFF and metal spires buried in the HM stack;
3) BOX etch with Coil Current ON and NO metal spires buried in the HM stack; 4) BOX etch with Coil Current OFF and NO metal spires buried in the HM stack.
The results of these tests confirm the influence of the electromagnetic field generated by the additional coil, since it gives asymmetric features in both conditions 1) and 3), and not in conditions 2) and 4). At the same time the coupling with the metal spires has an influence too, since it gives a local asymmetry in condition 1) and a wafer level asymmetry in condition 3).

Figure 1