(Invited) Impact of the Substrate Specifications on the Extended Defects Induced by the Deep Trench Isolation
Authors: Mica Isabella , Monge Roffarello Pierpaolo , Dutartre Didier , Basso Michele , Abbadie Alexandra , Frascaroli Jacopo , Tonini Marta , Livellara Luisito , Mari Guido Maria , Bertaiola Simone , Illuzzi Francesca 
Published: July 2021

STMicroelectronics invented and is a leader in BCD technology, which integrates analog, digital and power technologies to address a broad range of power management, data acquisition and actuator applications for automotive and other uses. The silicon wafers of the BCD technology are epitaxial, (100)-oriented, p-/p+ silicon wafers. The epitaxial layer has a boron doping in the order of 1015cm-3, whereas the substrate has a boron doping in the order of 1018cm-3. Starting with the technology node of 0.16μm the Deep Trench Isolation (DTI) is integrated to improve the isolation between internal blocks and to reduce interferences among them. The DTIs are trenches of several tenth of microns, filled by silicon dioxide and polycrystalline silicon. However, the DTI induces a certain crystal defectivity because of the mechanical stress generated during the thermal processes. Architectural and process changes can mitigate the mechanical stress, but it cannot be enough in case the DTI reaches the bulk silicon that is highly boron-doped and where the Bulk Micro Defects (BMDs) are present. Indeed, under stress, these defects facilitate the generation of dislocations and reduce the mechanical resistance of the silicon. This work find out that the depletion of BMDs in the silicon area around the bottom of DTI to be crucial in reducing the dislocation nucleation, expansion and propagation. In other words, the creation of a Denuded Zone in the top part of the p+ bulk beneath the p- epitaxy gets crucial.
According to the literature, the thermal history of the first part of the process flow is key in shaping a Denuded Zone. So, the first high temperature treatments denude the superficial silicon layer from the oxygen, whereas some of the following thermal treatments, ones at lower temperatures, lead to the nucleation of BMDs and the last operations at high temperature in the process flow increases the BMDs size. By acting on the substrate resistivity and on the content of interstitial oxygen (Oi), it is possible to modulate the BMD generation, for a fixed process flow. Indeed, as the boron doping and the Oi decrease, the BMDs formation is hindered and the oxygen denuding is promoted. Therefore, the substrate specifications of Oi and resistivity impact the crystal defectivity generated by the interaction of the DTIs with the BMDs.
All through this work the measurement of the Denuded Zone is carried out by means of the preferential chemical etching, i.e Secco d’Aragona, but also Micro-photoluminescence technique at room temperature, as implemented in the tool EnVision by Semilab. The effectiveness of the decreasing of boron and Oi content in reducing the dislocation generation is tested with a dedicated test structure. This structure is a collection of Power MOS on buried layer with a DTI layout prone to dislocation generation. The design has been developed in order to maximize the silicon area dedicated to the Power devices, characterize the performances of Power devices of different architectures (Drift MOS with Buried Layer, Drain extension), create DTI with spacing, shape and number compatible with our device requirements but critical in mechanical stress generation. The breakdown voltage and the leakage current that are sensitive to the crystal defect are measured on this power MOS structures.
It will be shown that a moderate boron decrease and a small decrease of Oi increases the Denuded Zone by a huge amount and reduces the BV failure rate by decades (from 8% to the baseline of 0.2%), thus a huge gain resulting from narrower wafer specifications.