Consideration on SiO2/4H-SiC Band Alignment Modulation by NO Annealing
Authors: Kil Tae-Hyeon , Kita Koji 
Published: December 2020

Post oxidation annealing (POA) process in NO ambient is one of the standard techniques to control 4H-SiC MOS characteristics, which introduces nitrogen atoms to the surface of SiC by substituting the topmost carbon atoms [1]. Together with the reduction of interface state density, however, a significant negative shift of threshold voltage is often caused by this process [2]. In this study, we clarified that such negative shift is not only caused by fixed charge introduction but originates from an anomalous modulation of band alignment of SiO2/4H-SiC interface.
First we systematically studied the flat-band voltage (VFB) of SiO2/4H-SiC (0001) n-type MOS capacitors with various oxide thickness, fabricated by conventional dry oxidation followed by the POA in NO/N2 = 1/2 ambient at 1150°C. From the oxide thickness dependence of the VFB we can deduce the expected value of VFB when the effects of fixed charges are removed. As a result we found an anomalous negative shift of VFB irrespective of oxide thickness, which was enlarged by extending NO annealing duration [3]. This phenomenon would be explainable by assuming a dipole layer formation at the interface by SiC surface nitridation.
Next this phenomenon was investigated from the viewpoint of SiO2/4H-SiC band alignment change by two kinds of analyzing methods: the valence-band spectra analysis using x-ray photoelectron spectroscopy (XPS) and the energy barrier height characterization of Fowler-Nordheim (F-N) currents. By systematic comparisons of the valence-band XPS of SiO2/SiC stack with a few-nm-thick SiO2 and that of SiC substrate without SiO2, we could see a clear trend that the valence-band offset between SiC and SiO2 changes monotonically by the NO-POA durations. Since no change of bandgap of SiO2 was suggested from O1s loss spectrum, this phenomenon was regarded as the band alignment change by the nitridation of SiC surface. To our surprise, this trend appeared in opposite direction for 4H-SiC (0001) and (000-1) stacks: the NO-POA increases the conduction-band offset for a few hundreds of meV in case of 4H-SiC (0001) stack, but it decreases in the case of 4H-SiC (000-1) stack for a similar amount [3]. For the F-N current analysis, the I-V characteristics at -150°C were evaluated where we confirmed the leakage currents were perfectly dominated by F-N tunneling mechanism. We could clearly see the trend of decreasing of F-N tunneling current for 4H-SiC (0001) MOS capacitors by extending NO annealing duration which was attributable to the increase of conduction-band offset, while the opposite trend was observed for 4H-SiC (000-1) MOS capacitors. These trends are quite consistent with the results of XPS analysis. Thus we could conclude that the observed change of VFB shift by NO-POA as described above was determined by the band alignment change at SiO2/4H-SiC interface. A significant difference of the band alignment on (0001) and (000-1) was also clarified which would be the reason for the disagreement of VFB of the capacitors on those crystal faces.
Since the nitrogen atoms replacing the topmost carbon atoms on SiC surface are considered to be coordinated by three Si atoms, this replacement may induce an additional polarization at the interface. Considering the fact that high density of nitrogen (~1014 atoms/cm2) are introduced [1] mostly in the top of SiC, a significant magnitude of polarization in the order of hundreds of meV would be achievable. We speculate this array of polarized structure at the SiC surface would be observed as a formation of interface dipole layer. With this model we can clearly explain the reason why 4H-SiC (0001) and (000-1) interfaces showed the dipole layer formation toward different direction by nitrogen introduction, taking account of the opposite Si-N bond arrangements on those interfaces. We consider that this phenomenon is one of the essential reasons to cause unexpected threshold voltage shifts often reported for SiC MOSFETs with NO-POA.
[1] J. Rozen et al., J. Appl. Phys. 105, 124506 (2009).
[2] G. Chung et al., Appl. Surf. Sci. 184, 399 (2001).
[3] T. H. Kil and K. Kita, Appl. Phys. Lett. 116, 122103 (2020).