Selective Epitaxial Si:P Film for nMOSFET Application: High Phosphorous Concentration and High Tensile Strain
Authors: Li Xuebin , Dube Abhishek , Ye Zhiyuan , Sharma Shashank , Kim Yihwan , Chu Schubert 
Published: February 2020

Semiconductor industry is in the era of transition from 2D transistors to 3D transistors (for example, FinFETs). The scaling–down of transistor source/ drain (S/D) contact area causes more challenges in reducing the S/D parasitic resistance which becomes comparable to (or even higher than) the channel resistance itself. A highly phosphorous doped Si epitaxial film on S/D is crucial to reduce the parasitic resistance in nMOSFET transistors. Besides that, 2D/3D nMOSFET transistors favor the tensile strain induced in the channel to enhance the electron channel mobility. Here we present a selective Si:P epitaxial film growth which provides both high phosphorous concentrations (>1E+21 at/cc) and high tensile strain (comparable to ~1 at.% of Csub in Si:CP).
This selective Si:P epitaxial process was performed using dichlorosilane (DCS), phosphine (PH3), and hydrochloride (HCl) gases in Applied Materials Centura RP Epi system. Grown highly concentrated, highly tensile-strained Si:P (called HS Si:P) films were analyzed by techniques of high-resolution XRD (HR-XRD), four-point Rs probe, SEM, TEM, and SIMS, etc.
Table 1 compares two types of Si:P epitaxial films: conventional Si:P Epi versus HS Si:P Epi. In Fig. 1(a), the total [P] by SIMS in HS Si:P epitaxial film is 1.75E+21 at/cc (~ 3 at.% in silicon), about one magnitude order higher than in conventional Si:P film, much higher than the solid solubility (~3E+20 at/cc) of phosphorous in silicon at 700°C [1]. The 0.6 mΩ-cm resistivity in HS Si:P epitaxial film indicates that only ~1.3E+20 at/cc phosphorous atoms are electrically active. In Fig. 1(b), the HR-XRD profile from HS Si:P film shows a strong tensile strain equivalent to ~0.8 at.% Csub from a Si:CP film. We assume that majority of phosphorous atoms are covalently bonded with adjacent Si atoms in a stable Si-P compound phase –pseudocubic Si3P4 which is energetically favored relative to other Si3P4 phases [2]. With the Vegard’s law (of linear relationship between lattice parameter and alloy concentration) applied between Si and pseudocubic Si3P4 (which has a smaller lattice constant than Si), the tensile strain induced in HS Si:P film matches well the HR-XRD data, as previously reported by Z. Ye et. al.[3].
Fig. 2 plots out selective HS Si:P epitaxial process sensitivity to growth temperature (675-775°C) regarding resistivity, strain, and total [P]. HS Si:P epitaxial films are stable without obvious phosphorous out-diffusion in this temperature range, which is confirmed by SIMS measurements. Both total [P] level and tensile strain decrease with the increasing temperature. Meanwhile, resistivity drops from 0.7 mΩ-cm @675°C to 0.5 mΩ-cm @725°C as more phosphorous atoms are electrically activated at higher temperature.
Fig. 3 characterizes the HS Si:P film epitaxial growth on the (110) orientated substrate. The HR-XRD profile in Fig. 3(a) indicates a well-ordered HS Si:P epitaxial film grown on the (110) substrate. The TEM image in Fig. 3(b) shows a HS Si:P epitaxial film grown on (110) substrate without defects at interface, which is very significant for epitaxial growth around non-planar structures. Furthermore, Fig. 4(a) and (b) present two high-quality HS Si:P films with few defects, epitaxially grown on a planar structure and a Si fin structure, respectively.
HS Si:P epitaxial films have been studied after the millisecond annealing treatment @900-1300°C in Fig. 5. After annealing, resistivity drops from 0.65 mΩ-cm @1050°Cto ~ 0.3 mΩ-cm @1150°C and above. Tensile strain in film is stable up to 1200°C. At 1250°C and above, HS Si:P epitaxial film obviously starts to partially lose the strain likely because some phosphorous atoms are released from the structure of pseudocubic Si3P4 at such high temperatures.
Overall, this selective HS Si:P epitaxial process demonstrates its great potential in 2D/3D nMOSFET application.