bluuebunny/crossref_metadata_2025_split huggingface dataset:
Morphology-Tuned NiCo2O4-Coated 3D Graphene Rrchitectures As Binder-Free Electrode for Lithium Ion Battery
Authors: Zhang Chunfei , Yu Jong-Sung 
Published: February 2020

In recent decades, lithium ion batteries (LIBs) have been considered as the most effective and practical technology products for portable electronic devices because of their flexibility, high energy density and long lifespan. Nanostructured transition metal oxides have been intensively studied as one of the most promising candidates for LIBs because of their high theoretical capacities (500-1000 mAh g-1), good reversible conversion, and low cost. However, in general, poor cycling performance and low electrical conductivity have hindered their practical application. Recently, 3D graphene synthesized by chemical vapor deposition (CVD) method has been studied extensively and used as a binder-free electrode in energy storage devices because of its excellent electron conductivity as current collector and high stability in electrolyte, but the application of 3D graphene as free-standing electrode is still limited due to its weak mechanical strength.
In this work, nanostructured NiCo2O4 is directly grown on the surface of three-dimensional graphene-coated nickel foam (3D-GNF) by a facile electrodeposition technique and subsequent annealing. The resulting NiCo2O4 possesses a distinct flower or sheet morphology tuned by potential or current variation electrodeposition, which is used as a binder-free lithium ion battery anode for the first time. Both samples exhibit high lithium storage capacity profiting from unique binder-free electrode structures. The flower-type NiCo2O4 demonstrates high reversible discharge capacity (1459 mAh g–1 at 200 mA g–1) and excellent cyclability with around 71% retention of the reversible capacity after 60 cycles, which are superior to sheet-type NiCo2O4. Such superb performance can be attributed to high volume utilization efficiency with unique morphological character, a well-preserved connection of active materials to the current collector, a short lithium ion diffusion path, and fast electrolyte transfer in binder-free NiCo2O4-coated 3D graphene structure. The simple preparation process and easily controllable morphology make binder-free NiCo2O4/3D-GNF hybrid a potential material for commercial application.
Gradient Surface Modification of Li-Excess Layered Oxide Cathodes Using Polyanions
Authors: Wei Weifeng , Liu Jiatu , Zhao Ying , Ivey Douglas G 
Published: February 2020

Li-excess layered oxides (LLOs) of the general formula xLi2MnO3·(1-x)LiTMO2 (TM = Mn, Ni, Co, etc.) exhibit reversible capacities of up to 250 mAh g-1 and are more cost-effective. The Li2MnO3 component plays crucial roles in the electrochemistry of the LLOs, which not only improves the structural stability of LiTMO2 at high potentials, but also serves as an electrochemically active phase for Li extraction when charged above 4.5 V vs. Li/Li+. However, LLO cathode materials still suffer from limited cycle life and sluggish kinetics (e.g., poor rate capability), which origins from complex transition metal arrangements associated with the activation of Li2MnO3 (release of Li2O) upon charging at high potential and the inevitable layered-to-spinel structural transformation during electrochemical cycling.
Herein, a gradient polyanion-doping strategy, on the basis of borate, phosphate and silicate polyanions, is developed to integrate the advantages of both bulk doping and surface modification as the oxygen close-packed structure of LLOs is stabilized by polyanion doping, and the LLO cathodes are protected from steady corrosion induced by electrolytes. We comprehensively investigate the electrochemical performance of polyanion-doped LLOs with various local structures, which were prepared by manipulating doping content and annealing temperature. With the assistance of aberration-corrected scanning transmission electron microscopy (STEM), we present direct evident that the incorporation of polyanions induces a complex crystallization process of layered structure, and propose some new insights into the electrochemical improvement resulted from polyanion doping.
Improved Electrochemical Performance of Li1.2Ni0.2Mn0.6O2 By AlF3 Coating
Authors: Abdel-Ghany Ashraf , El-Tawil Rasha S , Hashem Ahmed M , Mauger Alain , Zaghib Karim , Julien Christian M 
Published: February 2020

Li-rich layered Li1.2Ni0.2Mn0.6O2 (LLNM) was synthesized by sol–gel method using citric acid as chelating agent and further coated with AlF3 by chemical deposition method. The synthesized Li-rich oxides and AlF3 coated oxides were confirmed to be layered-layered integrated blends form by the hexagonal (R-3m S.G.) and the monoclinic (C2/m S.G.) phase. AlF3 layer with a thickness of about 2–5 nm is formed on the surface of Li-rich particles. Improvement in discharge capacity (253 mAh g-1) after lithium enrichment and coating process for Li-rich oxides was observed from galvanostatic measurements and compared with features of LiNi0.5Mn0.5O2. From analysis of electrochemical impedance spectra (EIS), the enhancement of the electrochemical performance is mainly attributed to the pre-activation of the Li-rich layered oxide induced by the AlF3 coating.
Ca-doped Li4Ti5O12 Nanosphere as a Superior Anode Material for Lithium-ion Batteries
Authors: Zhang Qianyu 
Published: February 2020

Li4Ti5O12(LTO) has been regarded as a promising anode material for lithium-ion batteries(LIBs). Unfortunately, the implementation of LTO is hampered by its low electric conductivity and relatively poor lithium diffusion rate. Herein, we report a controllable route to synthesize Ca-doped LTO nanosphere to overcome such problems. Density functional theory calculations reveal that Ca2+ substituting on the Li site enables an electron to easily move to an energy level higher than the Fermi level, indicating that Ca-doped LTO is an electrical conductor. Furthermore, detailed characterizations demonstrate that the spherical nanostructuring reduces the diffusion distance for both the Li ions and electrons within the LTO bulk. When tested as the anode in LIBs, it shows superior electrochemical performances with an ultrafast charging time and ultrahigh specific capacity at high charge/discharge rates. Therefore, this strategy provides a new insight on how to significantly enhance LTO’s rate performance for targeted applications via doping and nanostructuring.
Power-Dependent Transient Gain Study on Direct Gap GeSn Crystallized on Amorphous Layers
Authors: Wang Xiaoxin , Li Haofeng , Liu Jifeng 
Published: February 2020

Group IV semiconductors attract intensive interests for potential monolithically integrated photonics on the Si platform. The realization of Group IV-based light emitters is challenging yet highly desirable. Ge-on-Si lasing from the direct gap transition has been demonstrated at room temperature by employing n-type doping and tensile strain to reduce the energy difference between direct bandgap and indirect bandgap[1-2]. An alternative method is incorporating Sn into Ge, which shrinks the direct bandgap much faster than the indirect bandgap, thereby leading to direct bandgap GeSn alloys. We found that the incorporation of Sn into Ge can also enhance the crystallization of GeSn on amorphous substrate, which is beneficial for 3D photonic integration on Si by moving all the photonic components to the metal/dielectric interconnect level well above the CMOS layer using back-end-of-line (BEOL) processing. In our previous work, high crystallinity GeSn substitutional alloy thin films with up to 9 at.% Sn are directly grown on amorphous SiO2 layers at low crystallization temperatures of 370~470 °C, eliminating the thick buffer layer commonly used in epitaxial GeSn on Si.[3]
Recently, epitaxial GeSn-based lasing is reported in the near mid-infrared wavelength range, but only observed at low temperatures [4]. A detailed understanding of the ultrafast carrier dynamics is necessary to design and optimize high-performance GeSn lasers operating at room temperature. In this study, we investigate the power-dependent femtosecond transient gain of direct-gap GeSn with 9% Sn thin films crystallized on amorphous SiO2 layers in the wavelength range of 1950~2350 nm. It is found at carrier injection density Δn<1×1017 cm-3 , the transmission of GeSn is same as that measured by Fourier Transfer Infrared spectroscopy (FTIR), i.e. no optical bleaching. When the injection density is increased to Δn~8×1018 cm-3 , the GeSn film becomes transparent at λ~2000 nm. At higher injection of Δn~2×1019 cm-3 , net transient gain is observed at λ=1900-2150 nm, with a peak gain of 6300 cm-1 at λ=2000 nm . Further increasing the carrier injection to Δn~1×1020 cm-3, the peak of transient gain red-shifted to 2100 nm due to the bandgap renormalization, and the peak gain further increases to ~8000 cm-1. The transient gain of GeSn with 9% Sn is similar to III-V direct bandgap semiconductors at similar injection levels. These results confirm that the GeSn thin film crystalized on amorphous SiO2 is a good optical gain medium. Further studies will reveal more detailed carrier dynamics between direct and indirect conduction valleys.
[1] R. E. Camacho-Aguilera, Y. Cai, N. Patel, J. T. Bessette, M. Romagnoli, L. C. Kimerling, and J. Michel, Opt. Express. 20, 11316 (2012).
[2] R. Koerner, M. Oehme, M. Gollhofer, et al, Opt. express, 23, 14815 (2015).
[3] H. Li, J. Brouillet, A. Salas, X. Wang and J. Liu, Opt. Mater. Express 3, 1385 (2013).
[4] S.Wirths, R. Geiger, N.von den Diresch, et al, Nature Photonics, 9, 88 (2015).
Impurity and Defect Monitoring in Hexagonal Si and SiGe Nanocrystals
Authors: Koelling Sebastian , Plantenga Rianne C. , Hauge Hakon I.T. , Ren Yizhen , Li Ang , Verheijen Marcel A. , Conesa Boj Sonia , Assali Simone , Koenraad Paul M. , Bakkers Erik P.A.M. 
Published: February 2020

Silicon and Germanium naturally occur in a cubic crystal structure and have an indirect bandgap1 making them unsuitable materials for light emission. When synthesized in a hexagonal crystal structure Germanium and Silicon-Germanium are however predicted to have a direct bandgap2 which makes these crystal phases candidate materials for integrating optical functionality into silicon based CMOS. We have recently demonstrated the synthesis of hexagonal silicon3 using Gallium-phosphide nanowires with a hexagonal crystal lattice4as a virtual substrate. Based on this approach we have succeeded in growing hexagonal Germanium and Silicon-Germanium both as shells around and branches on Gallium-phosphide nanowires.
We are now aiming to grow optically active hexagonal Germanium and Silicon-Germanium with a direct bandgap. However, in order to create efficient light sources, we will have to suppress non-radiative recombination channels in the material and hence grow defect and impurity free hexagonal Germanium and Silicon-Germanium. This makes it necessary to measure the defect and impurity level inside the hexagonal shells and branches. Unfortunately, the size and the geometry of the structures make these measurements challenging as typical bulk characterization methods like Secondary Ion Mass Spectroscopy or X-Ray Diffraction are not applicable.
Here we will show how we use Transmission Electron Microscopy (TEM) and Atom Probe Tomography (APT) to monitor the crystal structure, crystal defect density, impurity level, interface roughness and matrix concentration in this complex material system. TEM allows us to investigate the defect density and defect formation during the growth of the hexagonal lattices making it possible to work towards the growth of defect free structures. APT allows us to create three-dimensional images of the elemental distribution inside the structures and hence makes it possible to supervise the impurity level, interface roughness and matrix concentration in the structures. Combining the two methods thus enables us to optimize the growth parameters, minimizing both the defect and the impurity density.
[1] M. Cardona et al. Phys Rev., 142:530, 1966.
[2] C.Raffy et al. Phys. Rev. B, 66:075201, 2002.
[3] H. I. T. Hauge et al. Nano Lett., 15(9):5855, 2015.
[4] S. Assali et al. Nano Lett., 13(4):1559, 2013.
Figure 1: Defects and impurities in a hexagonal Si shell (a-d) and hexagonal Ge branches (e,f) grown on GaP nanowires. Side-view imaging with TEM (a,c,f) enables us to identify defects. In combination with cross-section TEM images (b) we can confirm the epitaxial growth of Si on the hexagonal GaP lattice. APT analyses of the Si shells (d) and the Ge branches (e) allow us to map impurity atoms in the hexagonal crystals and reveal the diffusion of Ga and P into the Si and the Ge respectively.

Figure 1
(Invited) Low Resistance Contacts to Nanoscale Semiconductor Devices
Authors: Saraswat Krishna C. , Shine Gautam 
Published: February 2020

The scaling of silicon CMOS faces several obstacles necessitating the need to introduce materials such as germanium, III-Vs and 2D materials together with novel structures such as FinFET. As device scaling continues, parasitic source resistance largely dominated by contact resistance, is beginning to limit the device performance. Specific contact resistivity, ρc, of a metal-semiconductor (M/S) contact is dependent on the Schottky barrier height, ΦB, and the electrically active dopant density N at that interface. In M/S contacts the metal Fermi level is pinned at the charge neutrality level, ECNL, resulting in fixed electron and hole Schottky barrier heights ΦBN and ΦBP. High ΦB and low N results in high ρc, eclipsing the promise of intrinsic performance of scaled devices. To obtain low ρc it is essential to reduce ΦB and increase N.
Fermi level pinning occurs because wave functions of electrons in the metal tail can decay into the semiconductor in the band gap, creating metal-induced gap states (MIGS). Charging of these states by the metal wavefunction creates a dipole charge causing the Fermi level to align to minimize the dipole charge towards zero, effectively pulling the EF at the interface towards ECNL.
Historically the method to reduce ρc is by increasing N to > 1E20/cm3 thereby thinning the barrier, thus allowing more tunneling current. This method works well for n-Si and p-Ge which can be doped heavily. However, it is not very practical for n-Ge, p-Si, many III-Vs and 2D materials because of inability to dope them heavily. Second method is to create an additional dipole at the M-S interface to modulate ΦB by incorporating a dopant or a chalcogen close to the interface to modulate the dipole. Fluorine, sulfur and selenium have been shown to reduce ΦB in many semiconductors. Third method is by inserting a thin interlayer between the metal and semiconductor to depin the Fermi level and reduce ΦB. The metal electron wavefunction now decays in the interlayer resulting in fewer MIGS thus depinning the Fermi level, which now pins on the interlayer. Hence metal workfunction ΦM can now be used to tune the effective barrier height. For n-type ohmic contacts, metals with a low ΦM and interlayer with ~0 conduction band offset (ZnO, TiO2, SnO2) with semiconductor should result in a near zero ΦBN. For p-type ohmic contacts, metals with a high ΦM and insulator with ~0 valence band offset (NiO, CuAlO2) with semiconductor would be desirable. This method has been used to obtain low ΦB and thus low ρc in Si, Ge and III-V semiconductors and should prove to be very useful for 2D materials. Alternatively the interlayer can be chosen such that the metal pins near the band edge to get ~0 ΦB and it can be doped heavily to get thin barrier facilitating increased tunneling. SiGe source/drain in Si PMOS is a good example of this technique.
Results of theoretical modeling and experimental work will be presented in this talk.
Integration of Selective Epitaxial Growth of SiGe/Ge Layers in 14nm Node FinFETs
Authors: Wang Guilei , Luo Jun , Qin Changliang , Cui Hushan , Liu Jinbiao , Jia Kunpeng , Li Junjie , Yang Tao , Li Junfeng , Yin Huaxiang , Zhao Chao , Ye Tianchun , Yang Ping , Jayakumar Ganesh , Radamson Henry H 
Published: February 2020

As CMOS technology is downscaled into 22nm a transition from 2D to 3D transistors occurred and a revolutionary FinFET design was introduced. During this R&D, different strain engineering methods including selectively grown SiGe on source/drain as stressor material was used to boost the channel mobility. Another way to deal with channel mobility issue is to integrate Ge material which has high mobility for both p and n channel instead having Si fin in the transistor structure.
In this study, the Si Fin is processed and subsequently removed to create the trench between the STI SiO2 and a SiGe/Ge bilayer is selectively grown to fill the trench that is used as the MOS channel. In principle, there are two methods to remove the Si Fins as shown Fig.1 Primarily using WET etch while the second method is using the HCl etch during the epitaxy process. Since SiGe/Ge epitaxy process is sensitive to surface quality of the Si Fin, a meticulous in-situ cleaning is essential to remove all undesired residuals from the Si surface.
At first, selective Ge growth was applied to fill out the Si removed areas. The Ge layer is difficult to fill the small trenches (Fig.2a), therefore a SiGe layer is deposited as the strain relaxed buffer (SRB) layer in the trench prior to the Ge layer (Fig.2b). A Chemical Mechanical Polish (CMP) is necessary to planarize the surface (Fig.2c).
The Ge content and the strain amount in the SiGe layers was directly measured using high-resolution x-ray diffraction (HRXRD) rocking curves (RC). RCs were done at (113) reflection where the incident beam is as low as 2.6° and a large area of sample containing an enormous of number of transistors could be covered by x-ray beam. These RCs were simulated by the Takagi-Taupin equations and compared to the experimental curves in order to obtain high precision data for analysis. Cross-section images where provided by high-resolution scanning electron microscopy (HRSEM) and transmission electron microscopy (HRTEM) to measure the layer thickness, epi-quality, and integrity of the whole transistor structures. In the latter analysis, energy dispersive spectroscopy (EDS) technique was also employed to reconfirm the Ge profile in the channel regions of the FinFETs.

Reference
s

[1] Wang G, Abedin A, Moeen M, et al. Integration of highly-strained SiGe materials in 14nm and beyond nodes FinFET technology[J]. Solid-State Electronics, 2015, 103: 222-228.

Figure 1
(Invited) Silicon Nano-Tip Pattern Approach for Surface and Interface Engineering of Fully Coherent, High Ge Content Nanostructure Arrays for High Performance Photodetection
Authors: Niu Gang , Capellini Giovanni , Lupina Grzegorz , Niermann Tore , Salvalaglio Marco , Marzegalli Anna , Schubert Markus Andreas , Zaumseil Peter , Krause Hans-Michael , Skibitzki Oliver , Lehmann Michael , Montalenti Francesco , Xie Ya-Hong , Schroeder Thomas 
Published: February 2020

Defects in form of dislocations at the interface and threading arms in the film as well as SiGe intermixing are the main mechanisms to release the crystallographic misfit strain in Germanium (Ge) heterostructures grown on the mature Silicon (Si) wafer platform, severely deteriorating thereby the superior optoelectronic properties of Ge for device applications. We demonstrate here a novel technique, enabling fully coherent, high Ge content islands on nano-tip patterned Si (001) substrates by the suppression of plastic relaxation as well as SiGe intermixing. The Si-tip patterned substrate, fabricated by complementary metal-oxide-semiconductor (CMOS) compatible nanotechnology, features ~50 nm wide Si tips emerging from a SiO2 matrix and arranged in an ordered lattice. Molecular beam epitaxy (MBE) growths result in Ge nano-islands with high selectivity and having homogeneous shape and size. The ~850°C growth temperature required for ensuring selective growth has been shown to lead to the formation of Ge islands of high crystalline quality without extensive Si intermixing (with 91 at.% Ge). Nano-tip patterned wafers result in geometric, kinetic diffusion barrier intermixing hindrance (in particular surface diffusion suppression) confining the major intermixing to the pedestal region of Ge islands where kinetic diffusion barriers are however high. Theoretical calculations suggest that the self-assembled thin SiGe layer at the interface plays nevertheless a significant role in realizing fully coherent Ge nano-islands free from extended defects especially dislocations. Finally, single layer graphene (SLG)/Ge/Si-tip Schottky junctions were fabricated and thanks to the absence of extended defects and SiGe intermixing in the Ge islands, high performance photodetection characteristics with responsivity and Ion/Ioff ratio of ~45 mA/W and ~103, respectively, are demonstrated.
Rectification Properties of Boron Nitride/Silicon Heterostructure Diodes
Authors: Teii Kungen , Ito Hiroyuki , Katayama Naoki , Matsumoto Seiichiro 
Published: February 2020

Boron nitride is formed in three main crystalline forms: cubic, wurtzite, and hexagonal. Cubic boron nitride (cBN) is potentially expected as the semiconductor for high temperature condition due to the large band gap, high breakdown field, and high resistance to oxidation. Vapor deposition of cBN films on a foreign substrate is generally followed by an sp2-bonded BN (sp2BN) interlayer. The resistivity of sp2BN phase is usually higher than cBN phase by more than two orders of magnitude. However, the role of the sp2BN interlayer in rectification of cBN-based heterostructure diodes has not been clarified yet. In this study, rectification properties of p-type cBN/sp2BN/n-type Si heterostructure diodes fabricated under low-energy ion impact by plasma-enhanced chemical vapor deposition are studied in terms of the sp2BN interlayer [1].
A two-step biasing technique is developed to control the fraction of cBN phase and, hence, the thickness of the sp2BN interlayer in the films. We show that the rectification ratio at room temperature is increased up to the order of 104 at ±10 V of biasing with increasing the sp2BN thickness up to around 130 nm due to suppression of the reverse leakage current. The variation of the ideality factor in the low bias region is related to the interface disorders and defects, not to the sp2BN thickness. The forward current follows the Frenkel-Poole emission model in the sp2BN interlayer at relatively high fields when the anomalous effect is assumed. The thermionic emission model is not well applied to both the forward and reverse currents. We conclude that the transport of the minority carriers for reverse current is strongly limited by the high bulk resistance of the thick sp2BN interlayer, while that of the major carriers for forward current is much less affected. [1] K. Teii, H. Ito, N. Katayama, S. Matsumoto, J. Appl. Phys. 117 (2015) 055710.