bluuebunny/crossref_metadata_2025_split huggingface dataset:
Experiments and Modeling of Gas Heating in a Radio-Frequency Plasma Jet
Authors: Boswell Rod , Charles Christine , Greig Amelia , Dixon Sam 
Published: February 2020

Small plasma sources have been developed for a variety of applications and are often known as plasma jets (e.g. biomedical applications using atmospheric pressure helium or argon plasmas), as micro-plasma sources or arrays [1] (e.g. surface processing using lower operating pressure plasmas), or as micro-thrusters (e.g. electric propulsion using hollow cathode thrusters or neutralizers). At the ANU we have designed a capacitively coupled radiofrequency (13.56 MHz) cylindrical plasma source which currently operates at pressures around a few Torr and at powers ranging from 1-100 Watts with or without a pressure gradient imposed along the 2 cm long cavity [2]. The plasma diameter ranges from 1 to 6 mm before expanding in a larger chamber. Neutral gas heating is measured for a variety of gases (argon, nitrogen, xenon) and cavity diameters using optical emission spectroscopy. The results are combined with electric probe measurements to develop a plasma heating model where the heating is assumed to come from ion-neutral collisions in the maximum of the discharge under the powered electrode. A peaked density on axis is well described by the plasma model [2]. Typically, gas temperatures around 1000K are measured for N2 and Ar in agreement with theoretical predictions from Fruchtman [3]. The results show that this type of source can be tailored to suit a variety of plasma applications: its effectiveness in dissociating species means that it can be used for remote plasma etching [1] or for surface passivation from atomic nitrogen using N2. It can also be developed as an electrothermal plasma micro-thruster for space propulsion[2]. All of these applications benefit from the neutral gas heating and from the ability of the source to be developed as an array of sources.

REFERENCES:

[1]S. Dixon, C. Charles, R. Boswell, W. Cox, J. Holland and R. Gottscho, “Interactions between arrayed hollow cathodes”, J. Phys. D: Appl. Phys. 46, 145204, 2013
[2]C. Charles and R.W. Boswell, “Measurement and modeling of a radiofrequency micro-thruster”, Plasma Sources Sci. Technol. 21, 022002, 2012
[3]A. Fruchtman, “Energizing and depletion of neutrals by a collisional plasma”, Plasma Sources Sci. Technol. 21, 022002, 2012
A Stable Cu Nanoparticles Used for Seed Layer Deposition of through Silicon Via
Authors: Tsai Yao-Lin , Dow Wei-Ping 
Published: February 2020

In recent years, the evolution of two-dimensional (2D) chip packaging will soon reach its limitation. As a result, signiﬁcant attention is being paid to three-dimensional (3D) chip stacking. 3D chip stacking offers many beneﬁts to improve system performance, the most signiﬁcant of which is the ability to directly connect heterogeneous devices in the vertical direction. Thus, 3D chip stacking can reduce the size of packaging and increase system efficiency as well as saving capacitance, reducing power and increasing speed.
Through silicon via (TSV) is a key technology for 3D chip stacking, which serves as a bridge to connect multiple devices in z-direction. Comparing with the traditional through silicon via (TSV) metallization, it has to thin the wafer thickness by using chemical mechanical polishing (CMP) after the copper electroplating and go on the chip stacking process. Alternatively, wafer thinning can be processed first before making through holes. Following the wafer thinning and through hole drilling, the through silicon hole (TSH) can be fully filled with copper by direct electroplating without using a conducting template. The metallization of TSHs is a critical step in the manufacture process. Up to known, the traditional semiconductor industry uses sputtering process to deposit a barrier layer and a seed layer on a isolation layer (SiO2) inside the TSH. However, the sputter machine is very expensive. We introduce a wet process to replace the dry seed layer deposition process.
We made use of a flexible substrate to synthesize copper nanoparticles (CuNPs). The mean particle size of the CuNPs is below 10 nm and its size distribution is from 4 to 6 nm(Fig 1).Therefore, they perform a high activity in Cu electroless deposition. However, the CuNPs were unstable when they exposure to air, such that their activity decreased day by day. For this issue, we use a novel stabilizer to make the CuNPs survive for a long time(Fig 2) and still have good activity to catalyze copper eletroless deposition. Because silicon oxide is a non-conducting material, it has to be metalized by Cu electroless deposition and then by Cu electroplating. For the Cu electroless deposition process, we employed the CuNP as a catalyst for copper electroless deposition onto the sidewall of TSH in order to develop a wet TSH process. These processes ensure the complete electroless copper coverage inside the THS, which is coherent and conductive enough to allow TSH to be fully filling with Cu electroplating.
Behavior of Cuprous Intermediate by RRDE
Authors: NIshimura Kouhei , Yokoi Masayuki , Kondo Kazuo , Hayashi Taro , Okamoto Naoki , Saito Takeyasu 
Published: February 2020

1.
Introduction

The cuprous ion is crucial intermediate and the cuprous ion always produced during the process of the electrodeposition.
It is extremely difficult to detect the cuprous ion and accordingly few works exist which are related to the acceleration effect of cuprous ion.
Acceleration effect of trench via bottom electrode was presented in the San Francisco Meeting. Rotating ring disk electrode(RRDE) result will be presented. The cuprous ion detected at the ring of RRDE is 1000 times larger for the copper dissolution, if it is compared with cuprous ion for the electrodeposition[1]. Hence we formed cuprous ion at the disk of rotating disk electrodes and experimentally verify the relation between cuprous ion and acceleration.

2.Results

The ring electrode current of RRDE has been monitored in order to detect the free cuprous intermediate acceleration effect.
Figure 1 shows the ring current density by changing the ring potential. (a) is with no additive without dissolving the copper disk electrode. The ring current shows the lowest(a). With dissolving the copper disk electrode(forming cuprous), the ring current increases slightly(b). By adding 1ppm of SPS and 50ppm of Cl-, with dissolving copper, the ring current further increases(d). Further adding 40ppm of SPS and 50ppm of Cl-, with dissolving copper, the ring current shows the larger value[6]. These results indicate that Cl-and SPS are the accelerating additive and these additives forms accelerating intermediate with the cuprous.
We proposed a new cuprous intermediate model and this model is shown in Fig.2[9]. Cl- has been known to adsorb on the cathode(7). The Cl- forms electron bridge and reduces SPS to MPS(8). Cupric and MPS forms Cu+-MPS. The Cu+-MPS decomposes into SPS and cuprous and hence reduces to copper. The cuprous supplied by dissolving the copper disk electrode is accelerating the copper electrodeposition. The details will be presented at the meeting.
References
1.J.R.White, J.Electrochem.Soc.17,977(1987)
2.K.Kondo, T.Matsumoto and K.watanabe, J. Electrochem. Soc. 151,C250 (2004).
3.K.Kondo, T.Yonezawa,J.Electochem.Soc. 152(12), H173-H177 (2005).
4.Kazuo Kondo, Taichi Nakamura J.Appl.Electrochem.,39,1789(2009).
5.Kazuo Kondo, Hamazaki Kouta, ECS ELectrochem.Let., 3 (4) D3-D5(2014).
6.Yi-Hsin Chen and Dale Barkey, University of New Hampshire.
7.C.B . Elders and J.L. Stickney, J. Eleetroanaf. Chem., 284 403-412(1990).
8.Z.Nagy and J.P.Blaudeau, J.Electrochem.Soc. 142,L87(1995).
9.Nguyen T. M. Hai, J.Phys.Chem.C,116,6913(2012).
Glyoxylic Acid as Reducing Agent for Electroless Copper Deposition on Cobalt Liner
Authors: Inoue Fumihiro , Philipsen Harold , van der Veen Marleen , Van Huylenbroeck Stefaan , Armini Silvia , Struyf Herbert , Shingubara Shoso , Tanaka Tetsu 
Published: February 2020

Cobalt has recently attracted interest as interconnect liner, because it can serve as nucleation layer for Cu deposition [1,2]. Nevertheless, in order to apply it in combination with a wet Cu deposition process, the dissolution of Co has to be taken into account since less-compatible with acidic and more negative redox potential than Cu.
Using an electroless deposition (ELD) of Cu chemistry with alkaline pH has the advantage of less-dissolution of Co and, therefore, a thinner Co liner can be used. This would be beneficial for small feature filling. Nevertheless, formaldehyde, which is conventional reducing agent of Cu, did not show catalytic effect on Co surface [3]. In this case, the nucleation mechanism on Co is a replacement reaction, during which some cobalt is consumed during ELD-Cu reaction that is in competition with ELD-Cu deposition reaction in the initial stage of the Cu film growth.
In this paper, we investigate minimization of Co consumption by analyzing each component of glyoxylic acid based ELD Cu.
Figure 1 shows polarization analysis of glyoxylic acid and formaldehyde on Co surface. In case of formaldehyde, there is no anodic oxidation. On the other hand, glyoxylic acid showed anodic oxidation on Co. It indicates that glyoxylic acid shows catalysis on Co.
Figure 2 shows linear sweep voltammetry of Cu complex solutions. When higher concentration of complexing than Cu ion was added, oxidation occured without reduction of Cu. In general, enough amount of complexing agent is added in the ELD solution to avoid generation of Cu hydroxide ions. However, the complexing agent also makes Co-complex. On the other hand, when the same amount of complexing agent was added (i.e. no ‘free’ complexing agent in the bath), there was no Co dissolution, which was deduced from electrochemical measurements.
Figure 3 shows the cross-sectional TEM images and TEM-EDX images of a 3 × 50 µm TSV after ELD-Cu on CVD-Co (45 nm)/ALD-TiN (12 nm). The Co thickness was 45 nm on top and 10 nm at the bottom. The ELD solution contained the identical concentrations of complexing agent and Cu ion. Glyoxylic acid was used as reducing agent. A continuous Cu seed was obtained in the TSV along the sidewall. Neither delamination nor voids were seen after ELD. Furthermore, the Co thickness in entire TSV did not changed. It is due to the optimization of complexing agent and reducing agent inside Cu bath.
The filling of the TSVs was performed by electrodeposition on the ELD-Cu seed. The continuous ELD-Cu seed layer promoted a bottom-up filling of the TSV afterwards.
References
[1] S. Armini et al., J. Electrochem. Soc., 158 (2) (2011) H160
[2] T. Nogami, et al., Proc. of IEEE IITC (2013) 11-1
[3] I. Ohno, et al., J. Electrochem. Soc.,132 (10) 2323 (1985)
Effect of Flow and Wafer Rotation on the Metallization of Copper Interconnects
Authors: Boehme Lindsay , Landau Uziel 
Published: February 2020

The miniaturization of semiconductor devices poses challenges to interconnect metallization. Transport limitations within the features, which affect primarily the distribution of the additives, have been studied extensively in the past, experimentally and analytically1
-
3. However, the effect of transport external to the small features (vias or trenches), has not previously been addressed. Such transport limitations, that are directly related to the external flow and the wafer rotation, will affect the concentration of the species diffusing into the feature and thus may have profound effect on the feature fill process. We analyze here the effects of the external flow field and the boundary layer on the additives surface coverage and the via fill process.
Applying a computer based model, we analyze first the additives (suppressor, e.g., PEG, and anti-suppressor, e.g., SPS) distribution on a flat wafer. We determine the transient additives coverage on the surface and find, as expected, that the transport limited suppressor concentration increases with the rotation rate4. More significant is the analysis of the additives distribution on the sidewalls and the bottom of a via. We find that the transport and adsorption parameters applied in the model strongly affect the results. Applying commonly used parameters1
-
3 and considering the external transport limitations leads to a significantly lower suppressor concentration at the via rim and upper sidewalls (as shown in Fig. 1) than had been previously predicted2. This will consequently lead to inadequate fill. However, when applying transport and adsorption parameters that have been recently determined by co-injection studies4we note that the external flow has a significantly lower impact on the additives concentration within the via. Accordingly, the simulated process, accounting for the flow effects follows more closely predictions which neglected to consider the external boundary layer (Fig. 2). Experimental data reported in the literature indicates similar trends to those predicted by the current analysis.
References:

R. Akolkar and U. Landau, J. Electrochem. Soc., 151, C702 (2004).

R. Akolkar and U. Landau, J. Electrochem. Soc., 156, D351 (2009).

J. Adolf and U. Landau, J. Electrochem. Soc.,
158, D469 (2011).

L. Boehme and U. Landau, “Applying the Co-injection Test to Extract Difficult to Measure Process Parameters”, 226th ECS Meeting, October 5-10, 2014, Cancun, Mexico.
Electroless Deposition of Cu-Mn Alloy
Authors: Yu Lu , Akolkar Rohan 
Published: February 2020

Interconnect scaling in semiconductor devices presents numerous challenges to the current dual-damascene process flow. One issue is the deteriorated Cu electromigration resistance, which shortens the device life. To address this problem, one approach is to dope the Cu interconnects with small amounts of manganese (Mn). The Mn segregates at the interface between Cu and the dielectric substrate and forms a barrier layer, thereby suppressing Cu diffusion. It was found that incorporation of ~2 at.% Mn increases the lifetime of Cu interconnects four-fold [1].
Currently, the state-of-the-art method for depositing Cu-Mn alloys is sputter deposition with Mn content generally above a few atomic percent [2,3]. Compared to sputter deposition, electroless deposition has numerous advantages such as simplicity, low cost and faster deposition rate. Therefore, it is of great interest to develop an electroless process for depositing Cu-Mn alloy.
In this study, we report electroless deposition of Cu-Mn. The Mn incorporated was found to be ‘mobile’, a prerequisite for its application in interconnect metallization. It was also observed that Mn was incorporated during electroless Cu-Mn deposition at potentials that are much more anodic to its standard reduction potential (-1.18 V vs. SHE). To further our understanding of the electroless Cu-Mn deposition, a combination of voltammetry and quartz crystal microbalance were used to unravel the Mn deposition mechanism.

References

[1] J. P. Gambino, “Improved Reliability of Copper Interconnects Using Alloying”, Proc.17th IEEE IPFA, 1-7 (2010).
[2] J. Koike and M. Wada, Applied Physics Letters, 87, 041911 (2005).
[3] J. Koike, M. Haneda, J. Iijima, Y. Otsuka, H. Sako and K. Neishi, Journal of Applied Physics, 102, 043527 (2007).
New Temporary Bonding Solution Based on a Vacuum Wafer Carrier
Authors: Rogers Tony , Santilli Rob 
Published: February 2020

There are many applications that require wafers to be thinned to high thickness uniformity. In addition there are requirements for the thinned wafer to go through high temperature and vacuum based process steps. The present solution to these requirements involves the temporary bonding of the device wafer to a carrier wafer. This temporary bonding solution has been very difficult to solve, and until now it has been down to the crude technique of gluing the wafers together using an adhesive. This technology process has many flaws: complex procedures, low yields, and very expensive equipment to name but three. These drawbacks have been the main reason for holding back the implementation of volume production in the important application area of 3D IC’s.
This paper presents a novel solution and uses the vacuum chuck concept, instead of adhesives, for holding the device wafer in place. This transportable vacuum chuck is known as a vacuum wafer carrier.
The vacuum wafer carrier is used in conjunction with a wafer bonding / debonding tool and the principle of operation is as follows:
a) Load device wafer and carrier into vacuum chamber of the bonding / debonding tool
b) Pump chamber to bonding pressure (typically 10-3 mBar)
c) Bring device wafer into contact with carrier (this traps the vacuum in the cavities of the carrier)
d) Vent the vacuum chamber
The device wafer can then be put through the various required process steps (eg grinding , DRIE PECVD, electroplating). This makes it compatible with all 3D IC processing variants (via first, via middle, and via last). Once these processes are completed, the carrier is replaced in the vacuum chamber for the debonding step.
The carrier design ensures that the wafers are in rigid contact with the surface of the carrier during the grinding step, and the dimensions of the cavities are designed to ensure the deflection of the device wafer during grinding is minimised to produce thickness tolerances of <1µm. In addition the recessed cavities of the carrier can be designed to accommodate any surface topography, such as solder balls, on the contact surface of the device wafer.
The vacuum seal between the carrier and the device wafer has been optimised to include sufficient stiction to ensure that the device wafer remains adhered to the carrier even when the carrier is being transported in a vacuum environment. The debonding step has been designed to overcome this stiction and release the wafer. During the release step a receiving platen is positioned just below (typically ~0.5mm) the device wafer in the vacuum chamber and the thinned wafer can then be picked up from this platen by the robotic handler.
This new temporary bonding solution will enable fab lines to substitute the current adhesives based solutions and gain from cost reductions, simplified procedures, fewer processing steps, increased yields and lower manufacturing cost.
Large Area Plan-View Transmission Electron Microscopy Sample Preparation for Direct-Bonded Interfaces
Authors: Beekley Brett , Roberts C.R. , Salazar M. S. , Goorsky M. S. 
Published: February 2020

Metal-metal bonding, and in particular Au-Au bonding, is frequently used for both MEMs structures and for integration of combining different device structures, including III-V and silicon integration.1 High bond strength, accompanied with good electrical conductivity and hermeticity are often achieved when grain growth occurs across the metal-metal bond interface. Usually, this type of grain growth requires elevated temperatures and longer annealing times and has been studied for Cu-Cu bonding, but not for Au-Au bonding. However, the conditions which most effectively initiate the grain growth across either of this bonded interface have not been clearly elucidated.
We established that the preferential growth of a particular grain across Au-Au bond interfaces is enabled through an epitaxial transformation. Au (111) grains on one side of the interface grew into the other side – albeit with nanovoids remaining at the original interface. The microstructure of the transformed side consisted initially of nanotwinned, columnar Au while the grains that extended across the interface were initially randomly oriented under thermocompression bonding conditions. High resolution transmission electron microscopy measurements addressed the orientation dependence of the growing grains. This indicates that microstructure control in metal-metal bond pairs can impact the resultant grain structure and hence other properties.
Low Activation Temperature Au/Ti Getter Films for Wafer-Level Vacuum Packaging
Authors: Wu Ming , Moulin Johan , Agnus Guillaume , Bosseboeuf Alain 
Published: February 2020

Vacuum packaging is required for mechanical microresonators and microbolometers to obtain a high quality factor and a low heat loss respectively. Because the internal volume of wafer-level packages is small, integration of getter films in the cavity is needed to maintain a low internal pressure (<10-2 mbar) for a long period of time (several years or more) even if a highly hermetic wafer bonding process is used [1,2]. Many Non-Evaporable Getter (NEG) films based on sputtered highly reactive transition metal have been investigated for this purpose. In this work we investigate thermal diffusion of titanium through an ultrathin capping Au layer as an alternative way to produce a getter film activated at low temperature. Both films were evaporated to avoid rare gas contamination found in sputtered films which can outgas afterwards. [3]The films have been annealed in N2 and Ti out-diffusion from Au/Ti thin films was studied as a function of the annealing temperature using four probe resistivity measurements, spectroscopic ellipsometry, XPS analysis, residual stress variations, SEM cross section observations and Energy Dispersive X-Ray Spectrometry (EDX) measurements. These measurements were completed by AFM and SEM surface analyses. All results are consistent and support the occurrence of significant Ti out-diffusion followed by oxidation, even at low temperature (<300°C). The electrical resistivity already increases by 10% after 1 hour annealing at 200°C. XPS measurements confirm the presence of a TiOx layer after annealing which contribution increases with the temperature and with a composition close to x » 1.8. SEM and AFM images of the as-deposited films surface show a smooth surface of gold, with RMS roughness below 1.5 nm. After annealing at 300°C, the titanium oxide is visible at the surface, in a shape of flakes and after annealing at 350°C, this layer covers completely the gold. Analysis of the sample cross-section shows that after annealing the gold layer is buried under the TiOx layer, that this layer is continuous and that its depth, corresponding to the TiOx thickness, increases with the annealing temperature (see fig., left-SE and right-BSE). Finally, TiOx films of several nm can be obtained by diffusion of the Ti through the Au at low temperature, showing that Au/Ti film can be used as a low temperature getter film for wafer-level vacuum packaging.[1]. M. Deniel, A. Naumann, D. Sorger, S. Tenholte, J. Voigt, O. Mehner, The influence of vacuum on the design and characterization of MEMS, Vacuum, 2012, 86 pp. 536-546.[2]. S. García-Blanco, P. Topart, Y. Desroches, J. Caron, F. Williamson, C. Alain and H. Jerominek, Low temperature hermetic wafer-level package for uncooled microbolometer FPAs, Proceedings of SPIE, 2008, 68840P-1.[3]. L. Tenchine, X. Baillin, C. Faure, P. Nicolas, E. Martinez, NEG thin films for under controlled atmosphere MEMS packaging, Sensors and Actuators A, 2011, 172 pp. 233-239.