(Invited) Synaptic Plasticity in a Memristive Device below 500mV
Authors: Nandakumar S R , Rajendran Bipin 
Published: February 2020

Neuromorphic engineering aims to develop intelligent systems by mimicking the key computational architecture of biological neural networks [1]. Neurons or nerve cells are the functional units of information processing in the brain. They are interconnected with each other via junctions called synapses to form parallel networks; it is estimated that there can be as many as ten thousand synapses per neuron in certain regions of the human brain. The plasticity of the junction conductance based on neuronal activity leads to memory, learning, and adaptation. Thus, the neuron processor together with local synaptic storage makes brain a highly parallel computing system. Human brain consumes only about 20 W, whereas the today's best supercomputers consume millions of Watts.
The processing power of the brain is attributed to its parallel architecture and local learning. Implementing a scalable high connectivity network with local adaptive storage is an important step in realizing neuromorphic computing systems. Memristive devices integrated in cross-bar arrays, with neuronal circuitry in periphery, can mimic the architecture of the brain efficiently. Memristive devices show non-volatile conductance modulation which is a function of the current that has passed through it [2]. Such devices exhibit an analog hysteresis in their IV responses and has been suggested for neuromorphic engineering applications. Even though the current state of research suggests that the challenges related to reliability and repeatability have to be overcome, these devices offer significant advantages in terms of scalability and power consumption.
We recently demonstrated half-integer quantized conductance in Cu/SiO2/W devices which have switching threshold less than 250mV [3]. The conductance quantization suggests the presence of nano-filaments whose effective radius was estimated to be in the range of 2-6 nm. This corresponds to the total average area involved in resistive switching; it is indeed possible that multiple filaments are active in parallel in the device.
A multi-state memory device is essential for compact local storage and learning in neuromorphic engineering. However, the quantized conductance states, which are multiples of 2e2/h (G0), allow currents in the micro-ampere range for read voltages as low as 50 mV, which is large for a high-density memory array. It might be possible to engineer a selector device in series with the RRAM structure which can avoid both the sneak path problem in a cross-bar array structure and at the same time act as a series resistance to lower the read current.
Hence, we explored the possibility of utilizing the off-state device conductance of our device to mimic synaptic plasticity, by programming it with waveforms that do not exceed the switching threshold for a sufficiently long time. We chose the waveforms to be approximations of neuronal actions potentials and their amplitudes are chosen to be below device switching threshold. Pre and post-synaptic waveforms were used and their different time shifted versions were applied across the device. In the actual experiment, the W electrode was grounded and the difference of two waveforms was applied to the Cu electrode. When we plotted the normalized device conductance change as a function of the time shifts, the response approximated the biologically observed STDP behavior. The observed behavior might be the result of partial filament formation and metal ion doping of SiO2. Similar gradual conductance change behavior has been observed earlier in oxide based RRAMs [4], which operates at higher voltages than our device. The programming waveform we used has a peak amplitude of 0.5V during the maximum conductance change.
The bio-mimetic behavior we demonstrated here from a two terminal, low voltage, CMOS-technology compatible device structure takes us closer to the goal of builind an intelligent system at the energy budget of the human brain. The reduction in programming voltage amplitude can result in significant energy savings in large array implementations which is vital to bio-inspired computing platforms.
References
[1] C. Mead, Silicon models of neural computation." http://authors. library.caltech.edu/60547/1/403736.pdf, 1989.
[2] L. Chua, Memristor-The missing circuit element," IEEE Transactions in Circuit Theory, vol. 18, no. 5, pp. 507-519, 1971.
[3] S. R. Nandakumar et al, A 250 mV Cu/SiO2/W Memristor with Half-Integer Quantum Conductance States," NanoLetters, 2016.
[4] S. Ambrogio, et al, Neuromorphic Learning and Recognition With One-Transistor-One-Resistor Synapses and Bistable Metal Oxide RRAM," IEEE Transactions on Electron Devices, vol. 63, Apr 2016.

Figure 1