The Role of Misorientation in Direct Wafer Bonded III-V Materials
Authors: Liao Michael , Tran Victor , Yee Matthew , Seal Mark , Goorsky Mark S. 
Published: February 2020

Direct wafer-bonding is a promising approach to materials integration for heterojunction structures not realizable through epitaxial means. Without lattice-parameter mismatch restrictions, wafer-bonding opens up a myriad of possibilities of materials combinations for many novel electronic device structures. In fact, wafer-bonding of III-V semiconductor materials was used to fabricate high-efficiency multijunction solar cells [1,2]. In this work, the effect of misorientation (both relative tilt and rotation) on the electronic properties across the bonded interface was studied by fabricating GaAs and InP homojunction and heterojunctions.
To study the role of relative tilt, (001) n-type GaAs and (001) n-type InP wafers with offcut angles of 4° towards <111>A and nominal on-axis substrates were bonded to form relative tilts of 0°, 4°, and 8°. Current-voltage (I-V) curves were measured at various temperatures ranging from 90 K to 340 K to determine the interfacial barrier heights using the Seager and Pike electron model [3]. Then, to study the effect of rotation, (001) n-type InP wafers with twist angles ranging from 0° to 90° in 15° increments were bonded. Prior to bonding, the wafers were first cleaved into quarters and submerged in an NH4OH solution to remove the native surface oxide and then submerged in a 20% aqueous (NH4)2S solution for 5 minutes. After drying the wafers with N2, the wafers were brought face-to-face and very low pressure (kPa) was applied manually at room temperature and in ambient air pressure. The relative rotational misalignment was induced by rotating the top wafer prior to applying pressure. The wafers were then annealed at 400 °C for 2 hours to strengthen the bonded interface. Metal Ohmic contacts were deposited on each semiconductor surface and samples were diced into ~2 x 2 mm squares.
We find that higher relative tilt across the interface leads to larger barrier heights. For example, in the GaAs/GaAs system the barrier height increased from 0.56 eV to 1.00 eV when increasing the tilt from 0° to 8°, respectively. Additionally, systems with at least one side InP (whether in an InP homojunction or InP/GaAs heterojunction) corresponded to lower barrier heights than the GaAs homojunction system. Regarding rotation, there is a discrepancy in literature on the effect of rotational misalignment. Kish et al. [4] claimed rotationally misaligning (001) III-V wafers by 20° and 90° result in the same decrease in electrical conductivity across the bonded interface compared to their 0° bonded wafers. However, Okuno et al. [5, 6] found that 0° and 90° bonded samples result in nearly equal electrical performance. Our findings show that the lowest interfacial resistance corresponded to misorientations of 0° and 90° while the greatest resistance corresponded to 45°, which was 30% higher than the lowest interfacial resistance. We conclude that the effect of rotational misalignment on the electrical conduction across bonded interfaces follows a sinusoidal pattern and its periodic effect on interfacial conductivity depends on the lattice symmetry of the wafer’s surface orientation, which has implications for bonding wafers with different surface symmetry.
Electrical characterization of the interface enables us to understand the key factors that influence the properties of a bonded interface. We concluded that surface passivation, materials choice, and relative misorientation of the bonded materials are the determining factors that control the electrical performance of the bonded structure.
References
[1] F. Dimorth, et al., Progress in Photovoltaics: Research and Applications 22, 277-282, 2014.
[2] P.T. Chiu, et al., IEEE Journal of Photovoltaics 4, 493-497, 2014.
[3] C.H. Seager, et al., Applied Physics Letters 40, 471-474, 1982.
[4] F. Kish, et al., Applied Physics Letters 67, 2060-2062, 1995.
[5] Y. Okuno, et al., Applied Physics Letters 66, 451-453, 1995.
[6] Y. Okuno, et al., IEEE Journal of Quantum Electronics 33, 959-969, 1997.

Figure 1