bluuebunny/crossref_metadata_2025_split huggingface dataset:
Applications of AFP Nanoprobing for Localization of Implant Related Issues
Authors: Dayanand N. , Yip K.H. , Quah A.C.T. , Neo S.P. , Ng H.P. , Ang G.B. , Lam J.C. , Mai Z.H. 
Published: December 2020

Abstract
The case study in this paper describes how collaboration between customer design and test teams and a thorough FAB investigation triggered by a detailed electrical analysis using the Atomic Force Nanoprober (AFP) resulted in the effective resolution of a challenging implant related issue on LDMOS structure that caused yield loss. The quick success in this case has led to a shorter yield ramp cycle on this new product for mass production.
Optimization of TEM Sample Preparation to Reduce the Overlapping of TEM Images
Authors: Duan Shuqing , Chen Summer , Yu Paul , Li Ming , Zhang Mark , Chien Kary 
Published: December 2020

Abstract
This paper reports optimized Transmission Electron Microscopy (TEM) sample preparation methods with Focus Ion Beam (FIB), which are used to reduce or avoid the overlapping of TEM images. Several examples of optimized cross-section sample preparation on 38nm and 45nm pitch are provided with general and novel FIB methods. And its application to plan view TEM sample preparation is also shown. The results establish that the proposed method is useful to reduce or remove pattern overlapping effects in dense structures and can produce higher quality TEM images than can be obtained using conventional top-down FIB-based TEM preparation methods.
Failure Analysis of Embedded Non-Volatile Memory with Nano- and Micro-Probing Techniques
Authors: Wang Xiang-Dong , Yazzie Arnold , Buchert John , Will Laurel , Wang Ping , Guisinger Scott 
Published: December 2020

Abstract
Embedded non-volatile memory (NVM) technologies are used in almost all areas of semiconductor chip applications, as it becomes increasingly vital to retain information when the electronics power is off. Nano-probing techniques, such as atomic force probe (AFP), allow us to access individual devices at contact or via levels and characterize the details as much as possible before a decision can be made for physical analysis. This paper reports the application of AFP to characterize each individual bit at contact level or individual column at via1 level. It presents two cases to identify the failures encountered in fabricated embedded NVM: column-column leakage and single bit erase failure. The first case shows that silicide residual could cause column to column leakage by creating electrical path between active areas of adjacent columns, while the second case shows that single bit failures due to low erase current can be recovered with repeated program/erase cycle.
Observation of Polarization and Two-Dimensional Electron Gas in AlGaN/GaN Heterostructure Using Scanning Nonlinear Dielectric Microscopy
Authors: Hirose K. , Chinone N. , Cho Y. 
Published: December 2020

Abstract
We measured AlGaN/GaN heterostructure using scanning nonlinear dielectric microscopy (SNDM) [1], which can measure both carrier and polarization profile in AlGaN/GaN heterostructure. As a result, GaN spontaneous polarization and AlGaN polarization which is sum of spontaneous polarization and piezoelectric polarization were clearly distinguished. Two dimensional electron gas (2DEG) was observed at the AlGaN/GaN interface. This results show that SNDM is useful method for evaluation of 2DEG profile and polarization profile in AlGaN/GaN heterostructure.
Corrosion Mechanisms of Cu Bond Wires on AlSi Pads
Authors: Qin Wentao , Anderson Harold , Anderson Tom , Chang George , Barrientos Denise 
Published: December 2020

Abstract
Cu wires were bonded to AlSi (1%) pads, subsequently encapsulated and subjected to uHAST (un-biased Highly Accelerated Stress Test, 130 °C and 85% relative humidity). After the test, a pair of bonding interfaces associated with a failing contact resistance and a passing contact resistance were analyzed and compared, with transmission electron microscopy (TEM), electron diffraction, and energy-dispersive spectroscopy (EDS). The data suggested the corrosion rates were higher for the more Cu-rich Cu-Al intermetallics (IMC) in the failing sample. The corrosion was investigated with factors including electromotive force (EMF), self-passivation of Al, thickness and homogeneity of the Al-oxide on the IMC, ratio of the Cu-to-Al surface areas exposed to the electrolyte for an IMC taken into account. The preferential corrosion observed for the Cu-rich IMC is attributed to the high ratios of the surface areas of the cathode and anode that were exposed to the electrolyte, and the passivation oxide of Al with the lower homogeneity. The corrosion of the Cu-Al IMC is just a manifestation of the well-known phenomenon of dealloying. With the understanding of the corrosion mechanisms, prohibiting the formation of Cu-rich IMCs is expected be an approach to improve the corrosion resistance of the wire bonding.
Repeatable Method for Automated Decapsulation of Silver Alloy Wire Packages
Authors: Lefevre Matthew , Noraz Emmanuel , Veychard Damien 
Published: December 2020

Abstract
Over the past several years there has been a large industry wide effort to change over from gold bonding wires to copper in order to minimize production costs. In certain cases this is not possible due to the relatively high hardness values of Cu [1], which leads to reliability issues in the manufacturing process. Silver (Ag) wire has been proposed and successfully implemented in many instances where Cu wire was not practicable. Unfortunately, currently integrated decapsulation methods severely damaged or destroyed the silver wires and bonds, making it impossible to perform production controls and failure analysis. In this article we present a reliable and repeatable automated method to expose these die and wire bonds. By adding a dilute iodine solution to the nitric acid in an acid decapsulator, these packages can be fully opened without degrading the silver wires, allowing both mechanical and electrical testing on these devices.
Further Localization of the Minor Junction Leakage Fault by Nanoprobing
Authors: Wang H.S. , Lin C.C. , Sung T.Y. , Chang K.C. , Yang S.C. , Hung W.S. , Liou H.C. 
Published: December 2020

Abstract
Localizing a tiny fault causing abnormal leakage current in a large area P/N junction for a large MOS, diode or BJT structure by nano-probing was demonstrated. The localization was realized through probing the contacts on the junctions and comparing the reversed bias junction current for each contact which maintain the same polarity on the P/N junction. The tiny fault location which is causing the leakage in the large area P/N junction is indicated by the contact with the largest current due to the lowest sheet row resistance path to the fault as measured by nano-probing. Therefore, the success rate to identify the real physical fault by TEM and the ability to take the precise process action to correct the problem is greatly increased by this method. An artificial fault experiment induced by use of FIB as well as real case studies also verifies this method is valid and useful.
Failure Analysis Methodology on Systematic Polar Failing Pattern Due to Higher Solder Bump Resistance Issue in RF SOI Device
Authors: Ang Ghim Boon , Changqing Chen , Ng Hui Peng , Quah Alfred , Dayanand Nagalingam , Teo Angela , Teo Hanwei , Mai Zhihong , Lam Jeffrey 
Published: December 2020

Abstract
This paper placed a strong emphasis on the importance of applying Systematic Problem Solving approach, deep dive and use of right/appropriate FA approach/tools that are essentially critical to FA analysts to understand the “real” root cause. A case of low yield with polar failing pattern was seen and matched well with the Al Pad etch E chuck configuration. Customer also reported of passivation crack issue at the solder bumps. All these evidences suggested the root cause was related to wafer fabrication issue. However, it was through a strong “inquisitive” mindset coupled with the essence of such strong problem solving approach that led to uncover the actual root cause. Although customer test condition was not able to be duplicated due to limited information available in foundry industry, a four point probing alternative method was engaged to overcome this limitation. Unlike typical case, the AlOx thickness was comparable for bad and good dies. Further in depth analysis subsequently revealed the higher O content in the AlOx for the bad dies that was the real culprit for the higher bump resistance. This paper highlights the job of FA analyst is not simply finding defect but also plays a catalyst role in root cause/failure mechanism understanding by providing supporting FA evidence (electrically / physically) to Fab. It would serve as a good reference to wafer Fab that encountered such issue.
Characterizing Organic Nanocontamination in Semiconductors by Resonance Enhanced AFM-IR
Authors: Roy Anirban , Dillon Eoghan , Hu Qichi , Anderson Jay , Kjoller Kevin , Shetty Roshan , Prater Craig 
Published: December 2020

Abstract
Continuous development in the semiconductor process technology has led to the fabrication of devices with nanometer scale feature resolution. Resonance enhanced atomic force microscopy infrared (AFM-IR) is a novel technique with potential to overcome some limitations of existing tools. This manuscript illustrates chemical characterization of the nanoscale skin and polyester contaminant on silicon wafer using resonance enhanced AFM-IR spectroscopy. Resonance enhanced AFM-IR offers superior sensitivity for nanoscale organic contaminants. To demonstrate this capability, AFM-IR spectra were obtained from contaminants on silicon wafers, and the spectra correlated with a high confidence to a standard transmission FTIR spectral database. In addition, a newly developed high speed spectral acquisition scheme, which augments the reliability of nanoscale defect characterization by reducing the overall data acquisition time and enabling users to perform repeated measurements for statistical analysis, is established.
Automated 3D STEM-EDS for Spatially Resolved Elemental Characterization of Semiconductors
Authors: McIlwrath Kevin , Furukawa Hiromitsu , Horii Noritaka , Nakano Kazutoshi 
Published: December 2020

Abstract
With semiconductor geometries approaching sub 10 nanometer gate levels in the not too distant future and with higher levels of integration, new ways of characterizing defects and examining the 3D distribution visually and elementally on the nanometer level are required to keep up with the demands of the modern FA lab. The purpose of this study is to demonstrate the workflow and show the results of an automated 3D STEM-EDX data acquisition & visualization system that can be utilized for the failure analysis of semiconductor devices.
The Removal of Thin Oxygen and Carbon Surface Films by H2/Ar Plasmas as Characterized by Low kV EDS
Authors: Tracy B. , Sharma U. , Casenave J. , Nylese T. , Rafaelsen J. , Carlino V. , Fahey M. 
Published: December 2020

Abstract
Improved Scanning Electron Microscope (SEM) vacuum conditions have been of considerable interest during the past decade, especially as low landing energies are employed to perform surface sensitive imaging [1][2][3]. To further improve instrument performance plasma cleaning can be applied. In general, the cleaning chemistry is a plasma formed from laboratory air (nitrogen+oxygen). TEM and SEM samples can be cleaned ex-situ with this plasma. Alternatively, other gas mixtures have been reported such as 75% Argon + 25% Oxygen [4]. In this study, we report on the use of 95% Argon + 5% Hydrogen mixture for the removal of carbon and oxygen containing films on Indium using low Energy Dispersive Spectroscopy (EDS). This gas mixture is not pyrophoric and is well suited for the laboratory environment.
Optimization of EeLADA for Circuit Logic Defect Localization Using Defect Simulation
Authors: Lee M. , Yeoh B.L. , Goh S.H. , You G.F. , Tan Alan , Hao Hu , Chan Y.H. , Zhao Lin , Gupta Varun , Ma H.H.W.T. , Neo S.P. , Ang G.B. , Ngow Y.T. , Lam Jeffrey , Tay C.C. 
Published: December 2020

Abstract
EeLADA has been introduced previously as a prospective alternative approach to DFT scan diagnosis for scan logic defect localization. It has the capability to reveal induced signals from laser stimulation that are relevant to the failure signature by comparing failing pins and cycles of the bad device. Multiple schemes involving different combinations for comparison are possible. Defect simulations based on cell fault injections on a multi-level logic of a real digital device circuit characterizes the different comparison schemes. The findings are used to devise an optimized methodology to determine suspected fail locations to guide physical failure analysis to reveal the defect. A successful case study substantiates the method.
Case Study of Physical Failure Analysis Method for Microcrack Detection in Laser Via of Printed Circuit Boards
Authors: Kim Hyunsoo , Woo Jaehyeong , Lim Dongju , Kim Youngje , Jeong Munmo 
Published: December 2020

Abstract
This paper describes the failure analysis methods used to characterize micro cracks that resulted in laser vias of printed circuit boards (PCBs) through case studies of destructive failure analysis. Defects such as cracks in laser vias of PCBs can cause open or low leakage failure mode of module due to improper cleaning during the PCB process, natural oxide films such as brown oxide, or physical forces by use. Therefore, it’s difficult to identify the causes of these phenomena unless proper analytical techniques are used. In this study, multiple analytical techniques are employed to characterize micro cracks in laser vias. The destructive analysis with cross section and ion milling process is used to detect and inspect an accurate micro crack phenomenon of laser via. The characterization analysis using TEM, EDX and SIMS equipment after separating laser vias from a PCB is used to analyze failure cause of micro crack in laser via. This paper will be concluded with a discussion about what physical analysis methods should be used to analyze the causes of micro cracks for laser vias of PCBs.
A Quantitative Method for Measuring Remaining Silicon Thickness during XeF2 FIB Trenching for Backside Circuit Operations
Authors: Salazar G.P. , Shul R.J. , Ball S.N. , Rye M.J. , Phillips B.S. , DiBattista M. , Silverman S. 
Published: December 2020

Abstract
Backside circuit edit (CE) remains a crucial failure analysis (FA) capability, enabling design modifications on advanced integrated circuits. [1-9] A key requirement of this activity is to approach the active transistor layer of the silicon through the removal of the silicon substrate without exposing or damaging critical transistor features. Several methods have been previously developed to enable or assist with the process with either global or locally targeted techniques for thinning the silicon substrate. These methods employ mechanical methods, laser based techniques (continuous or pulsed), or chemical assisted focused ion beam (FIB) etching to accomplish the thinning. Each of these methods presents different strengths and weaknesses, from their reliability to complexity, but very few techniques provide a precise and accurate quantitative measure of the remaining silicon thickness (RST). Here, we will discuss the use of a FIB with XeF2 for backside Si removal, and the development of an in-situ, accurate measurement of RST.
Practicality of Single Microscope Failure Analysis for Fault Isolation, Analysis, and Advanced TEM Sample Preparation by the Integration EBAC and EDS on FIBSEM
Authors: Lindsay John , Sagar James , Holland James , Goulden Jenny 
Published: December 2020

Abstract
Device failure analysis typically requires multiple systems for fault identification, preparation and analysis. In this paper we discuss the practicalities and limits of using a single FIBSEM system for a complete failure analysis workflow. The theoretical requirements of using a nanomanipulator for both lamella lift out and electrical testing are discussed and the current capabilities of windowless X-rays detectors for chemical analysis demonstrated. When the required resolution for failure analysis exceed the limits of a FIBSEM and TEM is required, the combination of the nanomanipulator and X-ray detector for advanced lift out and thickness controlled thinning techniques are demonstrated to prepare exceptional quality lamellae.
Failure Analysis and Defect Inspection of Electronic Devices by High-Resolution Cathodoluminescence
Authors: Monachon C. , Zielinski M.S. , Gachet D. , Sonderegger S. , Muckenhirn S. , Berney J. , Poppitz D. , Graff A. , Breuer S. , Kirste L. 
Published: December 2020

Abstract
Quantitative cathodoluminescence (CL) microscopy is a new optical spectroscopy technique that measures electron beam-induced optical emission over large field of view with a spatial resolution close to that of a scanning electron microscope (SEM). Correlation of surface morphology (SE contrast) with spectrally resolved and highly material composition sensitive CL emission opens a new pathway in non-destructive failure and defect analysis at the nanometer scale. Here we present application of a modern CL microscope in defect and homogeneity metrology, as well as failure analysis in semiconducting electronic materials.
Investigation of Switching Mechanism in HfO2-Based Oxide Resistive Memories by In-Situ Transmission Electron Microscopy and Electron Energy Loss Spectroscopy
Authors: Dewolf T. , Cooper D. , Bernier N. , Delaye V. , Grenier A. , Grampeix H. , Charpin C. , Nardelli F. , Pauliac S. , Bernasconi S. , Jalaguier E. , Audoit G. , Schamm-Chardon S. 
Published: December 2020

Abstract
Forming and breaking a nanometer-sized conductive area are commonly accepted as the physical phenomenon involved in the switching mechanism of oxide resistive random access memories (OxRRAM). This study investigates a state-of-the-art OxRRAM device by in-situ transmission electron microscopy (TEM). Combining high spatial resolution obtained with a very small probe scanned over the area of interest of the sample and chemical analyses with electron energy loss spectroscopy, the local chemical state of the device can be compared before and after applying an electrical bias. This in-situ approach allows simultaneous TEM observation and memory cell operation. After the in-situ forming, a filamentary migration of titanium within the dielectric hafnium dioxide layer has been evidenced. This migration may be at the origin of the conductive path responsible for the low and high resistive states of the memory.
Automated End-Point Detection and Targeted Ar+ Milling of Advanced Integrated Circuit FIB TEM Specimens
Authors: Bonifacio C.S. , Nowakowski P. , Campin M.J. , Harbaugh J.T. , Boccabella M. , Fischione P.E. 
Published: December 2020

Abstract
The sub-nanometer resolution that transmission electron microscopy (TEM) provides is critical to the development and fabrication of advanced integrated circuits. TEM specimens are usually prepared using the focused ion beam, which can cause gallium-induced artifacts and amorphization. This work presents the use of a concentrated argon ion beam for reproducible TEM specimen preparation using automatic milling termination and targeted ion milling of device features; the result is high-quality and electron-transparent specimens of less than 30 nm. Such work is relevant for semiconductor product development and failure analysis.
High Resolution Localization Using Lock-in Based Electron Beam Methods
Authors: Rolf Felix , Hollerith Christian , Feuerbaum Christian 
Published: December 2020

Abstract
With decreasing transistor sizes accurate failure localization becomes more and more important in order to find the root cause of failures with high efficiency. Field returns are a special challenge, since there is usually only one sample for preparation. Hence, reliable high resolution localization is mandatory for a successful preparation. Optical beam induced resistance change (OBIRCH) is a powerful tool for localization but has resolution limitations due to the diameter of the optical beam. The tool can be further improved by the lock-in technique. In this paper we demonstrate that the lock-in technique can also be applied for electron beam localization methods like electron beam induced current (EBIC) / electron beam absorbed current (EBAC) and resistance change imaging (RCI) / electron beam induced resistance change (EBIRCH).
Use of 3D X-Ray Microscopy for BEOL and Advanced Packaging Failure Analysis
Authors: Schmidt Christian , Kelly Stephen T. , De Wolf Ingrid 
Published: December 2020

Abstract
With the growing complexity and interconnect density of modern semiconductor packages, package level FA is also facing new challenges and requirements. 3D X-Ray Microscopy (XRM) is considered a key method to fulfill these requirements and enable high success FA yield. After a short introduction into the basic principles of lab-based X-Ray tomography, 2 different approaches of X-Ray investigations are discussed and an integration into the daily FA flow is proposed. In the first example, fault isolation on a fully packaged device is demonstrated using a stacked die device. In the second example, a newly developed sample preparation flow in combination with Nanoscale 3D X-Ray Microscopy for Chip-Package-Interaction and Back-end-of-line feature imaging is introduced.
Uncover Buried Hidden Defects through Fast Selective Chemical Etching and Mechanical Polish
Authors: Ng Hui Peng , Teo Angela , Ang Ghim Boon , Chen Chang Qing , Tam Yong Seng , Xu Naiyun , Nagalingam Dayanand , Mai Zhi Hong , Lam Jeffrey 
Published: December 2020

Abstract
This paper places a strong emphasis on the importance of applying the correct FA approach in physical sample preparation to identify hidden defects that can be easily removed during analysis. A combination of mechanical parallel polishing and chemical etching was used during the sample preparation after electrical fault isolation. Such a combination is both effective and efficient in identifying the single Via punch-through from a sea of Via in MIM structure as well as finding the thin layer of barrier bridging under the Al metal. It serves as a quick way to verify any suspect without time consuming FIB progressive cuts at the hotspot location which sometimes turns out to be an induced spot with a defect located at other site due to the circuitry connection. It would serve as a good reference to wafer fab that encountered such issues.
Case Study—Failure Analysis of a Printed Circuit Board Latent Failure and Resulting Implication of Weaknesses in Panel Coupons and Lot DPA
Authors: Tuite Tom 
Published: December 2020

Abstract
Multiple, independent, system level test failures that occurred around the same time were traced back to a short circuit on the same type of printed circuit board (PCB). The PCBs were removed from the application and sent to the authors' lab for analysis. This paper reviews the analysis techniques and results that led to the failure mechanism being identified. The discussion focuses on steps taken to exonerate the authors' lab and processes as possible sources of contamination. Additional investigation that leads to the conclusion that the issue is systemic is also covered. The paper then focuses on the containment effort as well as root cause identification at the manufacturers. It was concluded that the failure mechanism causing the short circuit in the failed PCB is due to ionic contamination trapped inside the PCB. The normal chemistry required to process the plated through holes contaminated the voids/fractures created by drilling process.