Control of 4H-SiC (0001) Thermal Oxidation Process for Reduction of Interface State Density
Authors: Kita Koji , Kikuchi Richard Heihachiro , Hirai Hirohisa , Fujino Yuki 
Published: February 2020

1. Introduction

Thermally-grown oxides on SiC have been considered to induce significant amount of interface defects and near-interface traps, which limit the electron mobility of SiC-MOSFETs. Since the carbon residues are the most possible origin of those defects [1], it is crucial to employ preferred oxidation conditions for the smooth CO desorption. In this study we demonstrate the formation of SiC MOS interface with reduced interface state density (Dit
) <1011 cm-2eV-1, simply by the control of thermal oxidation conditions.

2.
Reactions of
SiC
-O2 System

If we assume a reaction with non-equilibrium state where the products are immediately removed away, the reaction with the most negative free energy change would be thermodynamically preferred among the possible reactions. The ideal reaction, SiC+3/2O2→SiO2+CO where the SiO2 formation is accompanied with the direct ejection of CO molecule from SiC, is predicted to be dominant only in the limited range of temperature for a given O2 pressure. This is because carbon precipitation (SiC+O2→SiO2+C) will dominate for low temperature region, whereas oxygen vacancy formation (SiC+O2→SiO+CO) will be significant for high temperature region [2]. The temperature window for the ideal reaction in 1-atm-O2 is estimated to be around 1100oC – 1300oC, if we take account of the solubility of O2 in SiO2, ~ 2.5×1016 cm-3[3]. Actually, we have observed a high activation energy of the growth rate on 4H-SiC (0001) for these conditions [4], which is in good agreement with the calculated energy barrier for the direct CO ejection from the interface [5].

3.
Nearly-ideal
MOS
C
haracteristics
on SiC

4H-SiC (0001) wafers, with ~1×1016 cm-3 n-doped epitaxial layers, were oxidized at 1100 and 1300oC in 1-atm O2 ambient to grow ~14 nm SiO2. A ramp furnace with a short rise/fall time was employed, to demonstrate the oxidation only within the preferred temperature range, by minimizing the unwanted additional oxidation at low temperature. The C-V characteristics of the MOS capacitor are shown in Fig. 1, together with an ideal C-V curve given by Poisson’s equation. The good agreement indicates a successful formation of the interface with very low interface defect density. Especially, the nearly-ideal behavior in accumulation region indicates a suppression of border-trap formation in near-interface oxide [1].
The Dit
values estimated by the conductance method at 150 – 300 K were around 1011 cm-2eV-1 or less, for the energy range 0.1 – 0.4 eV below the conduction band, as shown in Fig. 2. Both 1100oC and 1300oC oxidations result in similar Dit
, however, it should be noted that the best results were demonstrated by applying the low-temperature post-oxidation annealing at 800oC in 1-atm O2 where Dit
was reduced to less than 1011 cm-2eV-1 even 0.1 eV below the conduction band edge. This temperature is sufficiently low to neglect the additional oxidation of SiC, but expected to annihilate the oxygen vacancies [6] induced by high-temperature oxidation. These Dit
values are even less than the best reported ones with P-passivated interface [7].

4. Conclusions

We demonstrated nearly-ideal MOS characteristics on 4H-SiC (0001) with low interface state density <1011cm-2eV-1simply by the control of thermal oxidation conditions, without applying any additional passivation techniques.

References

[1] V. V. Afanas’ev et al., Phys. Status Solidi A162, 321 (1997).
[2] Y. Song et al., J. Am. Ceram. Soc., 88, 1864 (2005).
[3] K. Kajihara et al., J. Appl. Phys. 98, 013529 (2005).
[4] R. H. Kikuchi and K. Kita, Appl. Phys. Lett.104, 052106 (2014).
[5] A. Gavrikov et al., J.Appl.Phys.104, 093508 (2008).
[6] L. Lipkin and J. W. Palmour, J. Electronic Mater., 25, 909 (1996).
[7] D. Okamoto et al., Appl. Phys. Lett. 96, 203508 (2010).