(Invited) Improvement of Surface Morphology of Vicinal Off Angled 4H-SiC Epitaxial Wafer for GaN/SiC Hybrid Devices
Authors: Kojima Kazutoshi , Nakajima Akira , Yamada Hisashi , Harada Shinsuke 
Published: December 2024

Wide gap semiconductor materials like SiC, GaN, and Ga2O3 are well-known as one of key technologies for realizing carbon neutrality. Indeed, SiC devices are used in many applications including electric vehicles, train systems, and consumer products. AlGaN/GaN HEMT devices also used in low voltage power source like AC adopters and 5G telecommunication systems. However, both devices have still improved issues. For SiC devices, the performance of MOS interface at the gate structure is still a big issue. On the other hand, GaN has superior performance of MOS interface and HEMT structure on the gate area. However, device processing reliability of GaN is worse compared with SiC, especially ion implantation process. So that, GaN is difficult to control avalanche characteristics compared with SiC. To solve this problem, GaN/SiC hybrid devices have been proposed [1]. In this device, a drift layer is constructed by 4H-SiC epilayer and a gate is constructed by GaN HEMT structure. By applying this structure, both superior performance of AlGaN/GaN HEMT at the gate area and controllability of avalanche characteristics of 4H-SiC drift layer can be realized. To realize this hybrid devices, AlGaN/GaN HEMT structure should be hetero epitaxially grown on 4H-SiC epilayer. This hetero epitaxial growth is a big issue on this study. As well known, the off angle of 4H-SiC substrate for GaN hetero epitaxy and 4H-SiC homo epitaxy is a quite different. The off angle for GaN is less than 0.5 degree and that for 4H-SiC is 4 degree. In our past study, we demonstrated that 4H-SiC layer could be grown on 0.75 degree off 4H-SiC Si-face substrate [2]. But this past result is not enough to grow GaN epilayers on such off angled 4H-SiC epitaxial wafers. By reducing wafer off angle less than 0.75 degree, large macro step bunching and other polytype was generated on 4H-SiC epitaxial wafer surface, and it is difficult to grow GaN layers on such 4H-SiC epitaxial wafers.
In this study, we try to improve the surface morphology of 4H-SiC Si-face epitaxial wafer with off angle less than 0.5. To do this purpose, we have focused on an in-situ H2 etching process to suppress the generation of large step bunching on the grown 4H-SiC epitaxial layer surface. This in-situ H2 etching process is well known to make a risk to generate the step bunching on the 4H-SiC surface [3]. In addition, we confirmed the quality of the grown 4H-SiC epilayer by hetero epitaxially growing AlGaN/GaN HEMT layer on that grown 4H-SiC epilayer.
As the result, we could obtain 4H-SiC epitaxial layer with supeclor surface morphology on 0.5 degree off 4H-SiC Si-face substrate by suppressing the in-situ H2 etching process before the growth process. From an AFM measurement, RMS values of grown 6 μm thick epitaxial layer surface are improved from about 2 nm to 0.2 nm by suppressing the in-situ H2 etching process before the growth process (Fig. 1). This value is the same as the 4H-SiC epitaxial layer grown on 4 degree off angled substrate. We also confiermed that othe polytypes were not included in grown epilayer by photoluminescenss imaging mesurement. The quality of the grown epilayer was also investigated by I-V charcterisics of Ni/4H-SiC SBD fablicated on grown epilayer surface. The blocking voltage about 600V and low n value of 1.02 were obtained as the yield of 80 % (N=10).
We also hetero epitaxially grew AlGaN/GaN HEMT structures on grown 6 μm thick 4H-SiC epitaxial layer with 0.5 degree off angle. As the result, RMS values of 0.8 nm was obtained as the surface roughness of AlGaN layer which was the top layer of grown AlGaN/GaN HEMT structure. This value is the same as that layer grown on on-axis 4H-SiC substrate. We also investigated Vth dispersion from C-V measurement of capacitors fabricated on AlGaN layer of AlGaN/GaN HEMT structure. By reducing wafer off angle of 4H-SiC substrate from 4 to 0.5 degree, this dispersion was improved from ±0.98V to ±0.32V
These results indicated that GaN layers with good surface morphology and high quality 4H-SiC homoepitaxial layer can be taken balance by using 0.5 off axis 4H-SiC substrate and the realization of GaN/SiC hybrid devices can be expected.
[1] J. W. H. Jiang, Q. Jiang, and K. J. Chen, IEEE Trans. Electron Devices 63, 2469 (2016).
[2] K. Kojima, K. Masumoto, S. Ito, A. Nagata, and H. Okumura, ECS transaction 58, 111 (2013).
[3] K. Kojima, S. Kuroda, H. Okumura, and K. Arai, Mater. Sci. Forum 556-557, 85 (2007).

Figure 1