(Invited) Physics-Based Compact Model for Organic Thin-Film Transistors with a Universal Charge Expression for Quasi-Static Operation
Authors: Kloes Alexander , Pruefer Jakob , Leise Jakob , Darbandy Ghader , Klauk Hagen 
Published: February 2020

In this paper, a closed-form model for the drain current and intrinsic capacitances in organic thin-film transistors (TFTs) is presented which is a further improvement and development of the work reported in [1]. The model covers both below-threshold and above-threshold operation with a single charge-based current expression (1) that assumes transport of quasi-free carriers. Parameters Q’ms/d
are the densities of the accumulated quasi-free charges at the source and drain end of the channel, respectively. The effect of hopping transport is included in equation (2) by a power-law field-effect mobility model [2]. Rc
is the contact resistance, which can be nonlinear in the case of work function mismatch between contacts and organic semiconductor [3]. Drain-current saturation is controlled by parameter λ and expression (3).
The current equation provides two views. One view is based on physics and allows for an estimation of the influence of trap densities and interface states on the TFT performance. In this case the accumulated charges are given by equation (4). Here, Nst
is the density of traps contributing to the drain current by hopping transport in a channel of thickness dm
. N’t,max
is the density of filled deep traps and interface states at threshold, having only an influence on the electrostatics. Parameter α is the degradation of the subthreshold slope S given by (5) with respect to an ideal thermal slope of 60 mV/dec at T = 300 K. This expression allows for an extension of the model to include effects such as substrate bending by adapting the trap densities and insulator capacitance according to a geometrical deformation. In this case the mobility model has to take into account a change of the intermolecular spacing.
The second view of the model is based on the threshold voltage from a circuit designer’s perspective. Expression (6) for the threshold voltage bridges the two views by allowing for the calculation of the accumulated charges using equation (7).
Using the same accumulated charge densities Q’ms/d
as employed in the DC current equation, we have derived expressions for the intrinsic capacitances in staggered and coplanar TFTs. Using the Ward-Dutton partitioning scheme [4], the charge density in the channel can be assigned to source, drain and gate. For the integrals in equations (8), (9) and (10), closed-form equations have been derived [5]. Charges in the gate-to-contact overlap regions have been included for both the coplanar and the staggered architecture. This allows the intrinsic capacitances Cij = dQi/dVj
in quasi-static operation to be calculated.
The model has been implemented in Verilog-A and validated vs. Sentaurus TCAD simulations and TFT measurements (Figs. 1, 2). The results show good agreement. The model uses a unified expression for the accumulated charges in the channel for DC and AC quasi-static operation, which owing to its link to physical parameters such as trap densities can serve as a basis for various extension, e.g., to account for mechanical deformation of flexible organic TFTs.

Acknowledgements: This project was funded by the German Federal Ministry of Education and Research ("SOMOFLEX", No. 13FH015IX6) and EU H2020 RISE ("DOMINO", No. 645760). We acknowledge AdMOS GmbH, Germany for support and Keysight Technologies for license donation of IC-CAP.

References:

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Figure 1