Strain Modification of PECVD Nitride By Plasma Immersion Ion Implantation Processes
Authors: Lachal Laurent , Plantier Christophe , Torregrosa Franck , Aubert Cedric , Pedini Jean-Michel , Borvon Gael , Coig Marianne , Milesi Frederic , Niebojewski Heimanu , Mazen Frédéric 
Published: May 2020

Strain engineering was introduced in the microelectronics industry almost two decades ago to improve the carrier mobility due to the modification of the band structures in the Metal Oxide Field Effect Transistor (MOSFET) channel [1, 2]. One method to induce local strain in the transistor channel consists in using Contact Etch Stop Layer (CESL) as stress liner. In order to improve both n-MOS and p-MOS performance, the use of a dual stressed liner (DSL) integration is a solution that combines tensile and compressive films on the same wafer [3]. However, the poor mechanical stability of the compressive PECVD nitride layer when exposed to a high thermal budget, combined with the increased integration complexity, limits the interest of the DSL approach. An alternative solution to tackle these limitations consists in locally transforming the tensile CESL nitride into compressive by Plasma Immersion Ion Implantation (PIII).
For this study, PIII processes were performed on 300mm silicon bare wafers capped with a 35nm tensile PECVD nitride. Various species (Hydrogen (H), Helium (He) and Nitrogen (N)) implanted at various acceleration voltages (increasing from 1 to 6 in arbitrary units) and doses (A<B<C) were studied using a Pulsion® tool manufactured by IBS. After these processes, the samples were characterized by various techniques such as ellipsometry, bow measurement, Scanning Electron Microscopy observations, Secondary Ion Mass Spectrometry or FTIR analysis.
The stress of the various nitride layers was determined by the Stoney formula, using the curvature measurements and the layer thickness determined by ellipsometry, assuming the shift of the bow results only from the change in nitride stress. Results show that, for all the species studied, the PIII process provides the capability to change the nitride stress from initially tensile to neutral or even compressive when increasing the dose and the acceleration voltage (Fig.1). The largest stress modifications were achieved with nitrogen and hydrogen. For the latter however, the blistering of the nitride layer is observed for the highest doses due to an excessive hydrogen concentration, which is prohibitive for further process integration. By using helium PIII process, the stress change is less for identical process parameters (Fig.1), leading to a neutrally stressed nitride layer. Increasing the helium dose to modify the nitride stress further leads to a consumption of the layer, which limits the use of helium only to the reversal of the mechanical stress.
To verify that the stress change will remain during the subsequent process steps, curvature measurements were performed after a consequent thermal budget, equivalent to PMD deposition, applied after the PIII processes. The results show no significant change of the stress level.
We demonstrated the capability of PIII processes to turn a tensile CESL nitride layer into a compressive one in a reasonable processing time thanks to the high beam current achievable with PIII process, without any consumption of the layer and without the need of a post implantation thermal treatment. Complementary analysis are on-going to fully characterize the impact of each species on the CESL physicochemical properties and thereby understand its stress evolution. Thanks to these encouraging results, the most promising conditions of all the species mentioned above will be experimented on electrical structures to quantify the related static performance gain.
This project (OCEAN12) has received funding from the ECSEL Joint Undertaking (JU) under grant agreement No 783127. The JU receives support from the European Union’s Horizon 2020 research and innovation programme and France, Germany, Austria, Portugal, Greece, Spain, Poland.
[1] S. Ito, et al, “Mechanical Stress Effect of Etch-Stop Nitride and its Impact on Deep Submicron Transistor Design”, 2000 IEDM Tech. Dig., p. 247
[2] T.K. Kang, IEEE ELECTRON DEVICE LETTERS, VOL. 33, NO. 6, JUNE 2012.
[3] H. S. Yang, “Dual Stress Liner for High Performance sub-45nm Gate Length SO1 CMOS Manufacturing”, IEDM 2004

Figure 1