Built-in Nonlinear Characteristics of Low Power Operating One-Resistor Selector-Less RRAM By Stacking Engineering
Authors: Chen Ying-Chen , Chang Yao-Feng , Lin Chih-Yang , Wu Xiaohan , Xu Gaobo , Fowler Burt , Chang Ting-Chang , Lee Jack C. 
Published: February 2020

Resistive random access memory (RRAM) using various metal oxides (i.e., SiO2[1], HfO2, NiO[2], Al2O3, NbO) have attracted much attentions since the current nonvolatile memory (NVM) has been approaching the scaling limit. Meanwhile, selector devices are essential to address the sneak path issue which causes reading errors and hinders the implementation of RRAM in high-density cross-bar array architecture [3-4]. However, additional selector devices, e.g. a commonly proposed one selector-one resistor (1S-1R) design, increases the process complexity and cost. In this work, selectorless 1R RRAM devices have been demonstrated by utilizing the nonlinear (NL) resistive switching (RS) characteristics. Pulse operation voltage variation tolerance on SiOx-based stacking structures has also been characterized.
The starting substrates are heavily-doped N+ Si wafers, and titanium nitride of 200 nm thickness was deposited on N+ Si substrate as bottom electrode. Then, 9 nm of SiOx and 4 nm of HfOx were deposited as RS dielectric layers for bilayer (HfOx/SiOx) structures by RF sputtering method. Pt (165nm) was deposited as top electrodes for RRAM devices (Fig. 1). Fig. 2 shows bipolar RS I-V characteristics during DC voltage sweeps for single-layer HfOx and bilayer devices. Both SET and RESET voltages are lower in single-layer HfOx devices than in bilayer devices possibly due to higher oxygen concentration. The SET voltage of single-layer HfOx devices is about 0.2 V lower than of single-layer SiOx devices, and RESET voltage is reduced to half (~ 0.5 V) with inserting a HfOx stack layer, which is potentially beneficial for low voltage operating applications. Also, the RESET current is critical for overall switching power in RRAM applications, is ~1 mA and has been found to be independent of the thickness ratio of stacks. Comparing the bilayer structure to the single-layer HfOxstructure, the current at -0.2 V is reduced from ~10-4 to ~10-6 A. It depicts that there was significantly increased resistance at low voltage region, which is proposed as a solution for sneak path issue in crossbar array applications.
Nonlinearity (NL) is defined as the ratio of the current at full read voltage (i.e. -0.6 V) to the current at 1/3 read voltage (-0.2 V). The higher nonlinearity, the better ability is to avoid the sneak current interference. The NL characteristics in ILRS of all the devices are showed in Fig. 3. With a thin SiOx layer (2 nm) on the bottom of HfOx (11 nm) layer, the NL is ~3x in comparison to the single-layer HfOx layer devices. Based on our results, the bilayer RRAM device has been found to show the highest NL among the SiOx-based stacking structures. This makes SiOx-based bilayer devices a potential candidate for 1R selectorless RRAMs. To evaluate the voltage variation tolerance in pulse operation, the reset stop voltage effect has been studied. The RS I-V was characterized with increasing RESET stop voltage from -1.4 to -2.6 V for the bilayer and trilayer devices (Fig. 4). For bilayer devices, the high resistance state (HRS) resistance and memory window increase with increasing RESET stop voltage (Fig. 5). The bilayer devices with higher SET/RESET voltage variation tolerance (less variation below stop voltage of 2.2 V) and have been found to exhibit better NL characteristics (~10) than the trilayer devices, which shows larger switching voltage variation with changing reset stop voltage (Fig.6).
In this study, build-in nonlinear characteristics have been realized for the SiOx-based one-resistor (1R) device without an additional diode or a selector. The highly nonlinear characteristics observed in SiOx-based bilayer devices are desirable in avoiding the read error and preventing sneak-path currents in crossbar arrays. Our results show that SiOx-based bilayer devices are promising for high-density, low-power, selectorless RRAM applications.

Figure 1