(Invited) Mobility Enhancement Technology of Extremely-Thin Body Ge-on-Insulator Channel Mosfets
Authors: Takagi Shinichi , Han Xueyang , Chen Chia-Tsong , Sumita Kei , Toprasertpong Kasidit , Takenaka Mitsuru 
Published: December 2024

The progress in the technology nodes demands the reduction of channel film thickness in nanosheet FETs. Here, one of the biggest challenges is the significant reduction in channel mobility. Thus, an extremely-thin body (ETB) Ge-On-Insulator (GOI) channel is promising for the nanosheet channels from the viewpoint of mobility enhancement. Here, we discuss possible options of the mobility enhancement technology in GOI channels experimentally and theoretically. Mobility in ETB channel MOSFETs is limited by surface roughness and resulting thickness fluctuation scattering. Under the dominance of this scattering mechanism carriers with lighter effective mass parallel to the MOS interface and heavier effective mass perpendicular to it are desirable. From this viewpoint, the Δ2 valley on (100) Ge and the L1 valley on (111) Ge are promising for n-MOSFET channels [1-4]. Particularly, it is shown here under our modified thickness fluctuation scattering model [5] that (111) GOI channels are the most promising channels for n-MOSFETs among the conventional semiconductor materials. In addition, tensile strain is effective in improving the electron mobility of (100) GOI n-MOSFETs, because tensile strain increases the occupancy of the Δ2 valley with the appropriate anisotropy in the effective mass.
We have experimentally found that tensile strain can be introduced into (100) GOI channels by oxidizing GOI substrates [6, 7]. We have demonstrated the enhancement of electron mobility of fabricated tensile-strain ETB GOI n-MOSFETs in the GOI thickness range of 12.5 nm to 2.5 nm [6]. To realize (111) GOI MOSFETs, on the other hand, high-quality (111) GOI substrates need to be prepared. We realized (111) GOI wafers on Si substrates by using the smart-cut technology [8-10]. High quality (111) GOI substrates can be achieved by choosing appropriate annealing temperatures. (111) GOI nMOSFETs fabricated on this substrate have been found to have higher electron mobility than (100) GOI ones [9], as previously found on bulk Ge substrates. The high electron mobility is expected even in ultra-thin films less than 10 nm, as theoretically predicted [3, 4], by improving interfacial properties at the bonded interface. In order to improve this back interface quality, we have performed a GOI wafer flipping process [11], where GOI layers formed by the smart-cut process is transferred to another Si substrate. We have demonstrated the electron mobility improvement in GOI n-MOSFETs fabricated on this flipped substrate [12].
For GOI p-MOSFETs, the introduction of compressive strain can lead to a significant increase in mobility even in the extremely-thin film region [13-15]. Also, the mobility in pMOSFETs is known to be further improved by using uniaxial compressive strain rather than biaxial compressive strain [16]. Therefore, we introduced quasi-uniaxial strain by patterning the biaxial-strain GOI structure into narrow wire shapes and relaxing the strain along the channel width direction, which can introduce highly uniaxial compressive strain along the <110> direction [17, 18]. It has been experimentally shown that this asymmetric strain can further improve the hole mobility in GOI pMOSFETs, attributable to the reduction of effective mass. Also, another strategy to boost hole mobility in GOI p-MOSFETs is to use (110) surface orientation. (110)-oriented SiGe-On-Insulator (SGOI) substrates with asymmetric compressive strain were realized [19] by applying the Ge condensation technique [20] to (110) SiGe/SOI structures and the body thickness was thinned down to 3.2 nm. A (110) SGOI pMOSFET with a Ge content of 60 % provided 1.9x higher hole mobility than the one fabricated on a (100) GOI substrate.
This work was supported by JSPS KAKENHI (17H06148, 22H00208).

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