(Invited) Highly Stable Self-Aligned Top-Gate Indium Gallium Zinc Oxide Thin-Film Transistors for High-Resolution OLED TV and Mobile Displays
Authors: Kim Jung Bae , Tsai Yun-chu (Pipi) , Lim Rodney , Wang Zhiyuan , Hao Mei , Wang Sheng-Wen (Gordon) , Park Jung Woo , Zhao Lai , Bender Marcus , Yim Dong Kil , Choi Soo Young 
Published: December 2020

Indium gallium zinc oxide (IGZO) thin-film transistors (TFTs) have attracted much attention because of their high electron mobility values (> 10 cm2/Vs) and because they can be processed at low temperature to produce large-area displays with the potential of low production costs. The IGZO TFTs require smaller RC signal delay with shorter channel length for high-resolution display applications. Therefore, it’s necessary to use self-aligned top-gate (TG) oxide TFT structure with smaller channel length for high-resolution, high-speed, low-power, and narrow-bezel displays. The IGZO TFTs also need good electrical stability under positive/negative bias temperature stress (P/NBTS) with decent TFT properties for peripheral gate driver integrated large size organic light emitting diode (OLED) TVs. TG IGZO TFTs for display applications such as OLED TVs typically use longer channel length (> 4 µm) due to negative threshold voltage (Vth) shift and Vth non-uniformity issues with smaller channel length, which is mainly caused by hydrogen diffusion near source/drain regimes during device integration.
We fabricated TG IGZO TFTs by using Applied Material’s CVD/PVD tools to achieve excellent electrical stability and Vth uniformity by balancing oxygen and hydrogen diffusion into oxide channel layer such as IGZO. Suppressing carrier densities at the interface between gate insulator (GI) and IGZO by increasing oxygen diffusion with IGZO pre-annealing in air and TFT post anneal in air, and by minimizing vacuum annealing impact during GI deposition makes the IGZO TFTs more resistive with more positive Vth shift. On the other hands, more hydrogen diffusion into IGZO from GI, ILD, and passivation layers during device integration or TFT post annealing makes the IGZO TFTs more conductive with more negative Vth shift and worse Vth uniformity, but it helps to improve electrical stability with smaller Vth shift under PBTS by passivating defects inside IGZO. Therefore, there is trade-off between Vth uniformity and electrical stability due to the dominance of the diffusion between oxygen and hydrogen. By balancing the diffusion of oxygen and hydrogen, the IGZO TFTs can minimize negative Vth shift even with shorter channel for high-resolution display applications and achieve good electrical stability for pixel and peripheral gate driver circuits integrated in display panel.
We successfully demonstrated excellent electrical properties such as high mobility (µFE), low sub-threshold slope (SS), good threshold voltage (Vth) position, and low off-leakage current from TG IGZO TFTs. The positions of Vth can be optimized by controlling carrier densities at the interface between GI and IGZO during device integration even with different GI temperature and power (Fig. 1). Here, GI type A is deposited at a low temperature of 225 ºC with a high RF power of 2400 W. GI type B is deposited at a high temperature of 270 ºC with a high RF power of 2400 W. GI type C is deposited at a high temperature of 270 ºC with a low RF power of 1600 W. In order to investigate the channel length dependency of Vth, Vth values were extracted from transfer characteristics at VDS = +1 V with various TFTs by fixing channel width of 12 µm and varying the channel length from 10 µm down to 3 µm. The differences between maximum Vth and minimum Vth, Vth (Max–Min), from GI type A, B, and C are 0.35 V, 0.48 V, and 1.20 V, respectively. Total resistance in TFTs was extracted from the measured IDS values by varying VGS from 12 V to 20 V with channel length from 10 µm down to 5 µm by transmission line method. Extracted 2∆L, the difference between mask channel length and effective channel length, from GI type A, B, and C are 0.78 µm, 0.87 µm, and 1.05 µm, respectively. The IGZO TFTs with higher GI power show better TFT uniformity than lower power GI without notable negative Vth shift and non-uniformity even with shorter channel length from 10 µm down to 3 µm by minimizing hydrogen diffusion into IGZO (Fig. 2). The IGZO TFTs with lower GI power show better stability under PBTS due to more hydrogen diffusion into IGZO. On the other hands, the IGZO TFTs show better stability under both PBTS and NBTS with higher GI temperature than lower temperature GI due to more hydrogen diffusion into IGZO (Fig. 3). Therefore, high power/high temperature GI is preferred for high-resolution mobile/VR displays considering short channel length effect and low power/high temperature GI is preferred for gate driver integrated OLED TVs considering stability, especially PBTS.

Figure 1