bluuebunny/crossref_metadata_2025_split huggingface dataset:
Stability Evaluation of Non-Agglomerated Pd Nanoparticle Catalysts for Electroless Deposition
Authors: Nakamura Noriaki , Taniuchi Junichi , Sone Takayuki , Sasaki Kotoe , Inoue Fumihiro , Shimizu Tomohiro , Shingubara Shoso 
Published: February 2020

Conventional physical vapor depositions (PVD) of diffusion barrier and seed layers have been facing its limits of application for high aspect ratio of through Si via (TSV). Electroless plating (ELP) is an alternative candidate for TSV metallization because of their promising potential, e.g. conformal deposition property, cost reduction possible and low temperature.
In order to deposit ELP film on dielectric layer, catalyst process is the most important. In general, Sn-Pd process has been used for catalyst process of ELP. In addition, palladium nanoparticles (Pd-NPs) showed high density of adsorption, which assisted achievement of thin and conformal ELP formation in high aspect ratio TSV [1, 2].
To deposit electroless plating, high density of adsorption of Pd-NPs is required. Furthermore, in actual manufacturing process, long term stability that assumed repeated use is strongly desired.
In this study, we have developed the Pd-NPs to shorten the processing time in TSV and disperse in water for a long period. We found that the addition of compound A(COM-A ) or B enable to significantly improve the stability without losing the adsorption property of Pd-NPs.
Fig.1 shows the time transient of the diffusion coefficient of Pd-NPs with and without COM-A in solution which were stored at 25 °C. Diffusion coefficient of the particles were measured by dynamic light scattering (DLS).
In the Pd-NPs solution without COM-A, the diffusion coefficient of the particles gradually decreased. However, the diffusion coefficient of particles maintained a constant value in the Pd-NPs solution with COM-A.
According to the Stokes-Einstein equation, if the temperature and viscosity of a solution is constant, the decreasing of the diffusion coefficient indicates that the particles aggregate each other. Thus, the substantial catalyst particle number can be decreased for the case without COM-A.
Fig.2 shows SEM images of Pd-NPs adsorbed on blanket SiO2. The Pd-NPs solutions were stored 40 days at 25 °C before use. In the case of Pd-NPs solution with COM-A, there is no agglomeration of the particles on the sample. On the other hand, particles agglomeration were occurred in case without COM-A.
In addition, we also found that the addition of COM-A is possible to dispersed again agglomerated Pd-NPs. These results suggest that the Pd-NPs solution with COM-A is applicable to actual manufacturing process.
[1] F. Inoue, S. Shingubara, et al., ECS Transactions, 25 (38) 31-36 (2010)
[2] F. Inoue, S. Shingubara, et al., Electrochimica Acta
82 (2012) 372-277
Electrodeposition and Characterisation of Novel Ni-NbOx Composite Coatings as a Diffusion Barrier for Liquid Solder Interconnects - Part II: Diffusion Barrier Performance
Authors: Wang Jing , Wilcox Geoffrey D , Mortimer Roger J , Liu Changqing , Ashworth Mark A 
Published: February 2020

Electronics products are increasingly required to operate at high temperatures in harsh environments, for instance in oil well, geophysical drilling and aerospace applications. Conventional solder interconnects, that have been extensively utilised in consumer electronics, are no longer adequate. This is primarily due to excessive intermetallic compounds (IMCs) that can form and continuously grow during high temperature operation. With the intention of reducing such excessive IMC growth, electrically conducting niobium sub-oxide containing Ni coating has been produced which acts as a barrier layer between the solder and substrate. This then promises the possibility of developing a new solder barrier material with electrical conductivity and chemical resistance as required.
The present study considers a novel electrochemical route to produce Ni-NbOx composite coatings of good uniformity, smoothness, compactness and purity. The electrolyte is derived from a Type IV eutectic solvent consisting of NbCl5 and propylene glycol (PG). The addition of a small amount of Ni ions (molar ratio: Ni : Nb=1 : 30) was found to enable the co-deposition of Nb species. The introduction of NaBH4 into the electrolyte has elevated the maximum deposit thickness (above 15 µm), although this led to a reduction in the co-deposited Nb content. The effects of cathodic current density, metal precursor and NaBH4 concentrations on the surface morphology, composition and thickness of the coatings were examined. Scanning transmission electron microscopy (STEM) revealed a nanocrystalline structure resembling that of a simple FCC structure of Ni, with a slightly fluctuating composition across the coating thickness and with Nb uniformly distributed (See Fig. 1). From X-ray photoelectron spectroscopy (XPS), a 0.7 eV shift to lower binding energy for the Nb (V) species signifies the partial chemical reduction of Nb2O5 due to possible Ni-Nb bonding. It is thus proposed that a Ni-NbOx deposit was formed by a two-step mechanism: the simultaneous electrochemical reduction of adherent Ni metal and inadherent niobium oxides on Cu, followed by nickelation of the NbOx. The composite coating’s electrical conductivity, solderability and diffusion barrier characteristics (the latter preventing excessive IMC growth between molten Sn-In solder and Cu substrate) were assessed and showed promising results. From diffusion studies, a Nb-enriched layer was observed at the solder/substrate interface after ageing at 200°C suggesting evident effectiveness of the diffusion barrier characteristics.
Figure 1 - STEM cross sectional image a) of a 95Ni-5Nb coating with corresponding Energy-dispersive X-ray spectroscopy (EDX) maps of b) Ni Kα & c) Nb Lα.
Effects of Miscut Substrates on Electrical Conductivity Across InP and GaAs Wafer-Bonded Structures
Authors: McKay Jeffrey , Seal Mark , Yeung K. , Jackson M. , Goorsky M. S. 
Published: February 2020

Direct wafer bonding of III-V materials is of great interest for the fabrication of next generation high efficiency solar cells. Traditional wafer bonding methods of III-V materials lead to highly unstable oxide interfaces and poor electrical properties. To resolve these issues, elevated annealing temperatures (>600 °C), long times, and large compressive forces are employed to break up this interfacial oxide layer, so that there is better contact between the III-V bonding interfaces. These harsh processing conditions ultimately limit the achievable efficiencies, due to dopant diffusion and residual thermal strains in processed devices. Sulfur surface treatment prior to bonding was found to reduce the inclusion unfavorable oxides at the interface, reducing the post-bonding thermal and compressive force requirements, and promoting the ability to bond large (100 mm diameter) wafers..
Various combinations of sulfur treated n-GaAs and n-InP directed bonded structures were measured to investigate the effects of offcut angles on the electrical conductivity. The impact of the relative offcut angle on the electrical properties is an new unexplored area which is of important issuece, as misorientated substrates are typically used for the growth of III-V epitaxial layers in the solar industry to avoid anti-phase boundaries. It is observed in both the GaAs and InP bonded structures, that out-of-plane relative surface orientations between the (001) planes that are greater than 4° exhibit non-ohmic behavior. A theoretical model that describes the electron tunneling across a grain boundary between semiconductor bicrystals is used to represent the bonded interface and estimate the barrier conduction height. Fitting the zero-bias conductance over a range of temperatures reveals an increase in barrier heights for samples with greater than 4° misoriented bonded pairs, correspondingly the interface resistance at room temperature increases. These results demonstrate that the out-of-plane relative surface misorientation is the critical parameter to be monitored in order to achieve superior electrical conductivity in direct-bonded multijunction solar applications. In addition, differences between GaAs-GaAs bonded structures and InP-InP bonded structures indicate that the barrier for GaAs-GaAs is significantly greater than for InP-InP. The impact of the miscut itself, however, is similar in both cases, showing that both the chemical nature and the structural interface properties play roles in trans-interface electrical conduction.
Novel Surface Preparation Methods for Covalent and Conductive Bonded Interfaces Fabrication
Authors: Flötgen Christoph , Razek Nasser , Dragoi Viorel , Wimplinger Markus 
Published: February 2020

Compound semiconductor integration techniques draw ever more attention with increasing demands for high efficiency power electronics, photovoltaic or photonic devices. Aside from methods including epitaxial growth, one of these techniques is direct wafer bonding.
An interesting wafer bonding approach for the above-mentioned types of applications would be a process resulting in formation of covalent bonds at room temperature (“covalent bonding”) or at significantly low temperatures (e.g. <100°C). Hence, the common issues arising from bonding of materials with different thermal expansion coefficients could be avoided, in the first place.
The challenges in covalent bonding are mostly determined by the rigorous requirements for cleanliness with regards to particle and mobile ion contamination, as well as surface roughness and process uniformity.
If the bonding process must produce a conductive interface an intermediate process step needs to be added that reduces/removes the stable native oxides from the substrates surfaces, as they would form an insulating layer in the final bond interface and hence lead to decreased electric device performance. This implies that in addition to the requirements for covalent wafer bonding, an effective and complete oxide removal needs to be guaranteed, to achieve a successful conductive wafer bond. However, as lattice point defects (e.g. interstitials and dislocations) form traps for charge carriers which would affect device performance as well, a suitable oxide removal step would leave the underlying bulk material mostly unchanged.
The current work presents preliminary results of a novel technology designed to produce covalent / conductive wafer bonds. Results shown here were obtained in experiments using 200 mm wafers (prime Si and with 300 nm thermally grown oxide) supported by numerical modelling of sub-surface defects using SRIM [1]. The results obtained for Si are used as baseline for the new technology development (equipment and process) before applying it to compound semiconductor-based applications.
[1] J. F. Ziegler, M. D. Ziegler, and J. P. Biersack, Nucl. Instrum. Methods Phys. Res. B 268, 1818 (2010).
(Invited) Electro-Thermal Characterization of SiGe HBT PA-Cells
Authors: Zimmer Thomas , Weiß Mario , De Matos M. , Maneux Cristell , Fregonese Sebastien 
Published: February 2020

The European FP7 DOTSEVEN project is motivated by the increasing interest in utilizing the mm-wave frequency spectrum within the so-called THz gap (which ranges from 0.3 to 30 THz) for a wide variety of applications. In order to design and demonstrate working integrated mm- and sub-mm-wave circuits, the DOTSEVEN consortium aims the realization of SiGeC Heterojunction Bipolar Transistors (HBTs) operating at a maximum frequency up to 0.7 THz (i.e. 700 GHz) at room temperature. One associated main objective of the DOTSEVEN project is the evaluation, understanding, and modeling of the relevant physical effects occurring in such high-speed devices and circuits.
The higher the speed of advanced HBTs is the higher are their current densities and internal electric fields. This leads to increased self-heating and potential thermal instabilities. Their detailed impact on device characteristics and parameter extraction are investigated from a theoretical point of view with 3D thermal simulations, and from an experimental point of view with pulsed DC and AC measurements. Furthermore the impact of deep trenches on heat dissipation is analyzed as well as the thermal coupling with adjacent emitter fingers and pcells.
Effect of Graphene Passivation on Ge Pin Photodiode
Authors: Zagarzusem Khurelbaatar , Kim Joung-Hee , Kil Yeon-Ho , Kim Taek Sung , Choi Chel-Jong , Shim Kyu-Hwan 
Published: February 2020

We characterized the electrical and optical properties of graphene layer deposited photodiode with n-Ge/i-Ge/p-Si hetero-junction structure which were grown on boron doped p-type Si (100) wafers with 5~15 Ω-cm resistivity using the rapid thermal chemical vapor deposition (RTCVD) method. Furthermore, a reference p-i-n hetero-junction photodiode also fabricated and its comparison results explained by corresponding band diagrams and Ge surface passivation.
Fig. 1(a) shows the cross-sectional SEM image of the n-Ge/i-Ge layer. The p-i-n structure consists of a ~ 0.3 µm thick heavily phosphorus doped n-Ge layer and ~ 2.5 µm thick intrinsic Ge layer grown on p-Si substrate. Crystalline homogeneity and the microscopic strain state of the n-Ge/i-Ge epilayer analyze was performed high resolution X-ray diffraction (HR-XRD). The (400) peak of the n-Ge/i-Ge layer was observed at 5522 arcsec separated with respect to Si peak, as shown in the Fig 1(b). The HR-XRD rocking curve shape demonstrates the superior quality n-Ge/i-Ge layer and absence of tensile strain components because of two peaks are clearly observed.
In order to investigate the number of layers and quality of the CVD grown graphene after deposit on hetero-structure, the room-temperature Raman spectra were obtained using a 487.55 nm Ar-ion laser in the range of 1.000 to 3.000 cm-1 as shown in the Fig 2. The laser power applied to the sample was about 1.011mW. Raman spectrum of the graphene film is found to consist of two sharp peaks: i.e., 2D-band peak at ~ 2698 cm-1 and G-band peak at ~ 1581 cm-1, suggest that the transferred graphene was a monolayer graphene.
The p-i-n photodiode with round mesa structure as shown in schematic form in Fig.3. Diameter of mesa were 250 µm and mesa were defined by standard photolithography and CF4 reactive ion etching of the n-Ge/i-Ge layer to p-Si substrate by using inductively coupled plasma (ICP) etching.
Fig. 4 shows the typical forward and reverse biased J–V curves under dark and photo illuminated graphene/n-Ge/i-Ge/p-Si and n-Ge/i-Ge/p-Si hetero-junction photodiodes. We obtained reduced dark J from proposed graphene/n-Ge/i-Ge/p-Si photo diode. Dark current density and photocurrent density values were 0.49 A/cm2 and 3.01 A/cm2, respectively at reverse 1 V. Also, these values obtained to be 1.43 A/cm2 and 3.819 A/cm2 from n-Ge/i-Ge/p-Si photodiode at same bias. Ideality factor n was found to be 1.3 in the low voltage range. This implies that the dark current is dominated by diffusion rather than recombination, which indicates the high quality of the material.
The spectral photo-responsivity of the two p-i-n photodiodes measured at reverse 2 V for wavelength in the range from 1520-1630 nm. Detailed comparison results and discussions will be present in the full manuscript.
(Invited) Thin Epitaxial Film of Ge and III-V Directly Bonded onto Si Substrate
Authors: Maeda Tatsuro , Mieda Eiko , Ishii Hiroyuki , Itatani Taro , Hattori H , Yasuda Tetsuji , Maeda Atsuhiko , Kurashima Yuichi , Takagi Hideki , Aoki T , Yamamoto T , Ichikawa Osamu , Osada T , Takada T , Hata Masahiko , Yugami J , Ogawa A , Kikuchi T , Kunii Y 
Published: February 2020

Ge and III-V compound semiconductors are expected to be used for non-Si channel MOSFETs as one of the effective technical booster to reduce the power consumption of next generation VLSI because of its higher carrier mobility than that of Si. Various approaches to introduce those non-Si channel materials into Si platform have been proposed, among which the ELO(epitaxial lift off) technique may have a good potential for manufacturing such a composite wafer consist of non-lattice-matched crystalline materials.
High quality Ge and GaAs/InGaAs epitaxial thin film can be grown on lattice-matched/quasi-lattice-matched GaAs or InP single crystal substrate using CVD/MOCVD technology. The thin epitaxial film can be chemically lifted-off by selectively removing sacrificial epitaxial layer grown between the epitaxial film and the substrate, transferred and directly bonded onto Si substrate using thin oxide film made of Al2O3 and/or SiO2 as an adhesive layer, thus successively providing GOI and/or III-VOI(Ge and/or III-V compound semiconductors on insulator) composite wafer including the oxide film as an effective BOX(buried oxide) layer. The area size of transferred Ge/III-V film can be modified according to its application die size. The epitaxial layer quality after transferred onto Si substrate and initial device performance of Ge/III-V channel MOSFET formed on the Ge/III-V OI substrate will be introduced.
(Invited) Waveguide Germanium PIN Photodiodes for Optical Communication Applications
Authors: Vivien Laurent , Virot Léopold , Hartmann Jean-Michel , Fédéli jean-Marc , Marris-Morini Delphine , Cassan Eric , Baudot Charles , Boeuf Frédéric 
Published: February 2020

Silicon photonics has generated in recent years a strong interest for a large range of applications from optical telecommunications to microelectronics. The main advantages of this technology are the reduction of photonic system costs and the increase of the number of functionalities on the same chip, notably by combining photonics and electronics. Numerous advances in silicon photonics have occurred, with the demonstration of high speed Si modulators, Ge photodetectors and hybrid laser on silicon [1].
The photodetector is one of the main building blocks for the implementation of fast silicon photonics integrated circuits. The required considerations for the design of such a device are the bandwidth, the power consumption and the responsivity. Germanium is now considered as the ideal candidate for fully integrated receivers on SOI substrates and based on CMOS-like processes. High speed and high responsivity Ge photodetectors have already reported on literature [2-4]. However, they suffer from relatively high dark currents as compared to their III-V homologues. The increase of bias voltage directly leads to higher bandwidth but also to a higher dark current mainly through tunneling, as a consequence of Ge low band-gap. Furthermore, Ge on Si suffers from crystal defects due to the lattice mismatch between Si and Ge.
In this paper, we report on lateral pin photodiodes with thick Ge layers as the active media. Germanium is then integrated at the end of the Si waveguide, using the butt-coupling configuration to totally absorb light after few microns propagation at wavelength ranging from 1.3µm to 1.55µm (fig.1). Reliable detection characteristics have been obtained, including a bandwidth over 50GHz under zero-bias (fig.1), an internal responsivity higher than 0.5A/W at a wavelength of 1.55 µm and a dark current of about 10nA under -1V. 40Gb/s open eye diagrams were also obtained under zero-bias, showing the possibility of fabricating Ge-based low power and ultra-fast receivers. Some recent demonstrations of multiple-wavelength circuits and 40Gbit/s optical link, fabricated on a 300-mm microelectronics pilot line will also be presented {4].

Fig. 1: Schematic view of lateral Ge photodetector integrated in Si waveguide. SEM view of Ge photodetector cross-section.Normalized optical response as a function of frequency for lateral pin Ge photodiode under zero-bias.

References:

[1] L. Vivien and L. Pavesi, Handbook of silicon photonics, CRC & Taylor Press (2013)
[2] L. Vivien et al., Opt. Express 20, 1096-1101 (2012).
[3] C.T. DeRose et al., Opt. Express 19(25), 24897-24904 (2011).
[4] S. Liao et al., Opt. Express 19(11), 10967-10972 (2011).
[5] D. Marris-Morini et al., Opt. Express 22, 6674-6679 (2014)
Flexible and Pixelated Textile Pressure Sensor Fabricated with Weaving Techniques
Authors: Lee Jaehong , Kwon Hyukho , Seo Jungmok , Shin Sera , Kim Dayeong , Lee Taeyoon 
Published: February 2020

Recently, electronic textiles (E-textiles) that integrate sensors, actuators and computers into fabrics have attracted considerable attention and several types of textile-based devices have been widely studied. E-textiles have been applied to effectively provide a wide range of information to the people like elderly and patients since they can be worn or embedded in clothing. Among several applications of E-textiles, pressure sensors have significant role to detect a person’s information such as locations, vital signals. In previous studies, textile-based pressure sensors have generally developed by weaving metal wires due to their simple structure and fabrication process, however, it is challenging to apply these pressure sensors on sophisticated devices due to their poor sensing ability.
This research proposes a novel method of fabricating highly sensitive textile-based pressure sensor that can be pixelated through weaving method. We first obtained highly flexible and conductive Kevlar fiber by coating a composite material of Ag nanoparticles and elastomeric polymer. Consequently poly(dimethylsiloxane) (PDMS) was coated on the surface of conductive fiber as a dielectric layer. Through weaving method, the PDMS-coated conductive fibers were woven into fabric to form highly sensitive capacitive pressure sensors located at crossed points of the fibers. The highly sensitive pressure sensor was pixelated in the form of arrays via weaving method. Finally, pressure sensors were applied to monitor detection of small vibration forces from music and impact of a bouncing water droplet on a superhydrophobic surface.
The Influence of Trifluoroacetic Acid on the Poly(3,4-ethylenedioxythiophene):Poly(styrenesulfonate)
Authors: Du Yi-Chang , Tsai Li-Duan , Fang Jason 
Published: February 2020

Poly(3,4-ethylenedioxythiophene) :Poly(styrenesulfonate) (PEDOT:PSS) can disperse in the aqueous solution and shows good processability and exhibits very stable, high conductive and transparent characteristics. Therefore, PEDOT:PSS has replaced ITO glass in some electronic devices, such as anode buffer layer of organic solar cells.
In this study, we explored how the trifluoroacetic acid (TFA) improves the electrical conductivity of the PEDOT:PSS free standing film which was cast and dried from TFA aqueous solution.
To investigate the influence of TFA on the conductivity of the PEDOT:PSS, Raman spectroscope, X-ray photoelectron spectroscope (XPS), and conductive atomic force microscope (C-AFM) were carried out. Besides, the conformation and the phase behaviors of PEDOT:PSS were investigated in this study as well.
According to the results, it was proposed that the improvement of the electrical conductivity of PEDOT:PSS film cast from TFA solution was not caused by the higher doping level with TFA., but caused by changing the conformation of PEDOT chain. As TFA is added into the aqueous dispersions of PEDOT:PSS, it can interact with PEDOT and makes PEDOT with more positive charges and more hydrophilic. The conformation of the PEDOT chains is therefore expanded. As a result, the conductive PEDOT domains construct a continuous conductive network and the electrical conductivity of the PEDOT:PSS film is improved.