Integration of Advanced MOSFET Device with Dual Effective Band Edge Work Function Metals Using Both HK and MG Last Scheme
Authors: Tang Zhaoyun , Tang Bo , Xu Jing , Xu Yefeng , Wang Hongli , Li Junfeng , Yan Jiang , Zhao Chao 
Published: February 2020

The aggressive downscaling of CMOS requires both lateral and vertical shrinkage of dimensions. SiO2 served as gate dielectrics for more than four decades now is with severe leakage problem with quantum mechanical tunneling effect due to SiO2has been scaled down to only a few atomic layers to boost device performance. Thus high dielectric constant materials such as Hafnium oxide and Hafnium silicate are of great interests in recent years [1]-[3]. Meanwhile HK layers are not perfectly compatible with silicon channel surface as traditional silicon dioxide due to interface trap, dipole and defect are formed during processing which would be difficult for threshold voltage tuning. Gate stacks engineering like interfacial layer, post dielectric anneal and metal gate are needed to be carefully handled to alleviate these side effects. Due to excellent EOT scaling and short channel effect controllability, HKMG has been implemented into modern bulk silicon device to replace traditional Poly/SiON process. Different from Poly/SiON process which poly gate can be doped with N type and P type dopants respectively for NFET and PFET threshold voltage adjustment, Metal gate last process integration needs two kinds of metal to tune MOSFET work function in order to achieve suitable device performance [4, 5]. In this work, we have successfully fabricated devices with dual effective work function metals with 4.15eV and 5.04eV for NFET and PFET respectively. With EWF close to band edge, threshold voltage can be effectively achieved with 0.35V and -0.31V for NFET and PFET respectively. Process conditions and electrical results are also discussed.
TiN served as PMOS work function metal and TiAl chosen as NMOS work function metal are integrated into CMOS. The detail integration flow of HKMG and TEM of cross section of gate structure are shown in Figure.1.
In Fig. 2, threshold voltages with different Al% concentration are plotted. It can be shown that threshold voltage is strongly dependent on Al atomic concentration. With more percentage of concentration of Al, Vt would be lower due to work function Fermi level close to conduction band edge. Table.1 shows the effective work function values for NFET and PFET respectively. The EWFs are both close to band edges which are suitable for Vt tuning for devices. Fig.3 shows the NFET and PFET Id-Vg curves with low DIBL and sub-threshold swing performance. DIBL can be as low as 78mV/V and 82mV/V for NFET and PFET respectively. Swing can be as low as 62mV/dec and 64mV/dec for NFET and PFET respectively. It effectively demonstrates that controllability for metal gate to channel is much better comparing with Poly/SiON gate stack
In conclusion, we have successfully fabricated NFET and PFET devices with both HK and MG last integration scheme. By optimizing process conditions, Both NFET and PFET effective work functions can be tuned to be close to band edges with TiAl as NFET work function metal and TiN as PFET work function metal. Al concentration impaction on Vt is analyzed. Vt are well controlled with different channel length. DIBL and Swing are as low as to 78mV/V and 82mV/V and 62mV/dec and 64mV/dec for NFET and PFET respectively.

References

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