Improved Charge-Trapping Performance of Hf-Doped SrTiO3 for Nonvolatile Memory Applications
Authors: Huang X.D. , Lai P.T. 
Published: February 2020

Metal-oxide-nitride-oxide-silicon (MONOS) nonvolatile memories with traps in their dielectrics for charge storage have been considered as a better candidate than their conventional floating-gate counterpart due to their localized charge-storage and coupling-free properties. SrTiO3 was demonstrated to be a promising charge-trapping layer (CTL) for low-voltage MONOS memory applications due to its high-k value as well as large band offset with respect to the SiO2 tunneling oxide. However, this SrTiO3-based memory displayed severe charge loss mainly due to its poor thermodynamic stability with SiO2, which resulted in a thick non-stoichiometric interlayer at the SrTiO3/SiO2 interface1. On the contrary, hafnium oxide has a good thermodynamic stability with SiO2
1 and is also a well-known material for CTL2. Therefore, this work aims to investigate the charge-trapping characteristics of Hf-doped SrTiO3.
MONOS capacitor with an Al/Al2O3/Hf-doped SrTiO3/SiO2/Si structure was fabricated. SiO2 was grown on the p-type Si by thermal oxidation. Then, Hf-doped SrTiO3 film as CTL was prepared by co-sputtering of Hf and SrTiO3 targets using a power of 30 W. Following that, Al2O3 as blocking layer was deposited by atomic layer deposition. Finally Al was evaporated and patterned as gate electrode, followed by forming-gas annealing at 300 oC for 20 min. No obvious interlayer is observed at the SrTiO3/SiO2
interface from the TEM image in Fig. 1(a). This observation can be further confirmed by the XPS analysis shown in Fig. 1(b), where the small area of the silicate component suggests negligible formation of the interlayer resulted from the SrTiO3/SiO2
interfacial reaction. Consequently, Hf incorporation in SrTiO3can effectively improve the thermodynamic stability.
Fig. 2 shows the program/erase (P/E) transient characteristics of the MONOS device with Hf-doped SrTiO3 as CTL. The proposed device presents higher operating speed (a VFB shift ΔVFB ~ 3.5 V at +8 V, 100 μs) than the one with pure SrTiO3 as CTL (ΔVFB ~ 0.7 V)1, suggesting improved charge-trapping efficiency by Hf incorporation in SrTiO3. Moreover, the proposed device still shows a ΔVFB of 1.9 V even at a small gate voltage of +6 V for 100 μs, demonstrating its low-voltage operating ability. Fig. 3 shows the retention characteristic of the proposed device. Compared with the device with SrTiO3 as CTL which presents severe charge loss1, the proposed one displays much better data retention ability and the charge loss rate after 104 s is only 12.7%. The formation of the interlayer at the SrTiO3/SiO2
interface consumes part of the SiO2tunneling oxide (thus shortening the leakage path from the CTL to the substrate), and also the traps in the non-stoichiometric interlayer usually facilitate charge loss. Therefore, the better data retention should be mainly ascribed to the suppressed interlayer induced by Hf incorporation.
The charge-trapping characteristics of Hf-doped SrTiO3 have been studied. The thermodynamic stability of the SrTiO3 film can be improved by Hf incorporation. The memory device with Hf-doped SrTiO3 as CTL displays high P/E speeds at low operating voltage and good data retention. Therefore, the Hf-doped SrTiO3 film is a promising material as CTL for MONOS-type memory applications.

Reference

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Figure 1