First Principles Study on the Strain Dependence of Thermal Oxidation and Hydrogen Annealing Effect at Si/SiO2 Interface in V-MOSFET
Authors: Shingo Kawachi , Shirakawa Hiroki , Araidai Masaaki , Kageshima Hiroyuki , Endoh Tetsuo , Shiraishi Kenji 
Published: February 2020

Si technology such as downscaling of MOS transistors has been proceeded for the past 20-30 years. However, recently, short channel effect such as leakage current has been one of the critical problems on planer-MOSFET. Further, the downscaling technology is approaching the limit. In order to overcome these problem, Vertical MOSFET (V-MOSFET) is one of the most promising candidates for achievieng low leakage current [1-3]. The leakage current decreases due to the gate-all-around structure. Moreover, the devices have advantage that more elements can mount on the integrated circuit because the V-MOSFET is smaller due to the vertical structure. However, Si pillar cannot keep the structure during oxidation in the formation process because the Si atoms disappear (Missing-Si). In the case of V-MOSFET, compressive strain arises during thermal oxidation due to the characteristic structure of Si bulk as pillar. So, we can deduce that the origin of Missing-Si is the strain at the interface, however, this is not clarified at the atomic level. In this study, we discuss the dependence of the strain in the thermal oxidation based on the Si-emission model [4]. The model explains that Si atoms are emitted from the Si/SiO2 interface during thermal oxidation. We propose that the Si-emission leads to the Missing-Si. Also, we discuss the effect of the hydrogen annealing. The hydrogen annealing has a role which reduces defects at the interface. So we investegate the thermal oxidation and the hydrogen annealing at the atomic level by first principle calculation.
We used VASP code ,which is based on the density functional theory [5-7]. The cutoff energy of plane-wave basis set was 500eV and
k
points were sampled with a 6×5×1 Monkhorst-Pack grid. VESTA was used to draw atomic configurations and electronic states [8]. We employed the planer-type thermally oxidized Si/SiO2 sinterface and applied pressure isotropically to investigate the microscopic picture of dependence of strain in thermal oxidation and effect of hydrogen annealing.
First, we investigated the strain dependence of Si emission during thermal oxidation of V-MOSFET. As the result, the energy decreases as the strain increases. In other words, Si atoms emit easily during oxidation process of V-MOSFET than that of planer-MOSFET. The result implies that Si-missing occurs more frequently in V-MOSFET than in planer-MOSFET. Next, we considered the effect of hydrogen annealing after thermal oxidation. After Si emission during thermal oxidation, we confirmed the existense of the defect levels due to the dangling-bond formation at the interface. Then, we terminated the dangling-bonds by hydrogen molecule. Afterwards, the interface defects levels completely disappears. Moreover, we considered whether the hydrogen molecules can terminate the dangling-bonds of Si atom under the typical condition (0.2atm, 500oC and 0.1atm, 400oC) with strain. In order to confirm these well-known fact, we applied the statistical-mechanical approach by Kangawa et al. [9], in which the formation energy at finite temperature Ead
(p,T) was defined by Gibbs free energy. We found that the dangling-bond states can’t be terminated under the typical condition (0.2atm, 500oC) with 2% strain more.
In conclusion, hydrogen annealing effect is weakend as the strain of the interface is large. In otherwise, hydrogen annealing under the lower temperture is more effective in the case of V-MOSFET.

Acknowledgement

This work has been supported by a grant from “Three-Dimensional Integrated Circuits Technology Based on Vertical BC-MOSFET and Its Advanced Application Exploration” (Research Director: Prof: Tetsuo Endoh, Program Manager: Dr. Toru Masaoka) of ACCEL under JST. The computation of this work was performed in part at the Supercomputer Center, Institute for Solid State Physics, University of Tokyo.

References

[1] T. Endoh, K. Sakui, and Y. Yasuda, “Sub-10nm multi-nano-pillar type vertical MOSFET,” IEICE Trans. Electron. Vol.E93-C, no.5, pp.557-562 (2010).
[2] T. Imamoto and T. Endoh, “Source/Drain Engineering for High Performance Vertical MOSFET,” IEICE. Electron. Vol.E95-C, no.5 (2012).
[3] T. Endoh and Y. Norifusa, “Scalability of Vertical MOSFETs in Sub-10nm Generation and Its Mechanism,” IEICE Trans. Electron. Vol.E92-C, no.5 (2009).
[4] H. Kageshima, K. Shiraishi, and M. Uematsu, Jpn. J. Appl. Phys. 38, L971(1999).
[5] G. Kresse and J. Hafner, Phys. Rev. B 47, 558, (1993).
[6] J. P. Perdew, et al, Phys. Rev. Lett. 77, 3865, (1996).
[7] P. E. Blöchl, Phys. Rev. B 50, 17953, (1994).
[8] K. Momma and F. Izumi, J. Appl. Crystallogr. 44, 1272 (2011).
[9] Y. Kangawa, et al., Surf. Sci. 507–510, 285 (2002).