bluuebunny/crossref_metadata_2025_split huggingface dataset:
Functional Failure Analysis by Induced Stimulus
Authors: Colvin Jim 
Published: December 2020

Abstract
In the field of failure analysis of integrated circuits, diagnosing functional failures is a requirement. Traditional beam-based analysis techniques use a scanning laser or e-beam to induce a parametric shift which is monitored through changes in current or voltage driven to the device. Deep submicron technologies frustrate these analytical methods due to the nearly immeasurable parametric shifts externally caused by a small signal leakage path internally. These internal failures can be identified functionally by timing, temperature or voltage dependencies but the exact location of the fault is difficult to isolate. RIL (Resistive Interconnect Localization) is a newer technique which can identify via anomalies functionally using induced thermal gradients to the metal but does not address how to uniformly inject the thermal energy required in the silicon to analyze timing design deficiencies and other defects.[1] With SIFT (Stimulus Induced Fault Testing), numerous stimuli will be used to identify speed, fault, and parametric differences in silicon. The heart of this technique revolves around intentionally disturbing devices with external stimuli and comparing the test criteria to reference parts or timing/voltage sensitivities. Synchronous interfacing is possible to any tester without any wiring or program changes.
Timing Characterization of Multiple Timing Domains
Authors: Weger Al an J. , McManus Moyra , Song Peilin , Muszynski Andy 
Published: December 2020

Abstract
Commonly used timing measurement tools are often limited to probing a circuit running at one single frequency [1,2]. In reality, multiple frequencies may be present on chip, and that can lead to timing problems which render the chip inoperable within certain frequency ranges. We will describe a simple modification to a Picosecond Imaging Circuit Analysis (PICA [3]) instrumentation whih permits the simultaneous measurement of timing in multiple frequency domains.
Methodology for TEM Analysis of Barrier Profiles
Authors: Lee Tan-Chen , Huang Jui-Yen , Chen Li-Chien , Hwang Ruey-Lian , Su David 
Published: December 2020

Abstract
Device shrinkage has resulted in thinner barriers and smaller vias. Transmission Electron Microscopy (TEM) has become a common technique for barrier profile analysis because of its high image resolution. TEM sample preparation and image interpretation becomes difficult when the size of the small cylindrical via is close to the TEM sample thickness. Effects of different sample thickness and specimen preparation methods, therefore, have been investigated. An automatic FIB program has been shown to be useful in via sample preparation. Techniques for imaging a TEM specimen will be discussed in the paper. Conventional TEM bright field (BF) image is adequate to examine the barrieronly via; however, other techniques are more suitable for a Cu filled via.
Studies on Chemical Methods to Expose Gate/Tunnel Oxide and Identification of Gate/Tunnel Oxide Defects in Wafer Fabrication
Authors: Hua Y. N. , Ang G. B. , Redkar S. , Yogaspari  , Richter Wilma 
Published: December 2020

Abstract
In failure analysis of wafer fabrication, currently, three different types of chemical methods including 6:6:1 (Acetic Acid/HNO3/HF), NaOH and Choline are used in removing polysilicon (poly) layer and exposing the gate/tunnel oxide underneath. However, usage is limited due to their disadvantages. For example, 6:6:1 is a relatively fast etchant, but it is difficult to control the etch time and keep the oxide layer intact. Also, while using NaOH to remove poly and expose the silicon oxide, the solution needs to be heated. It is also difficult to etch a poly layer with a WSix or a CoSix silicide using NaOH. In this paper, we will discuss these 3 etchants in terms of their advantages and disadvantages. We will then introduce a new poly etchant, called HB91. HB91 is useful for removing poly to expose the gate/tunnel oxide for identification of related defects. HB91 is actually a mixture of two chemicals namely nitric acid (HNO3) and buffer oxide etchant (BOE) in a 9:1 ratio. The experimental results show that it is highly selective in poly removal with respect to the gate/tunnel oxide and is a suitable poly etchant especially for removing polysilicon with/without WSix and CoSix in the large capacitor structure. Application results of this poly etchant (HB91) will be presented.
Diagnosis Using Quiescent Signal Analysis on a Commercial Power Grid
Authors: Patel Chintan , Staroswiecki Ernesto , Pawar Smita , Acharyya Dhruva , Plusquellic Jim 
Published: December 2020

Abstract
Quiescent Signal Analysis (QSA) is a novel electrical-test-based diagnostic technique that uses IDDQ measurements made at multiple chip supply pads as a means of locating shorting defects in the layout. The use of multiple supply pads reduces the adverse effects of leakage current by scaling the total leakage current over multiple measurements. In previous work, a resistance model for QSA was developed and demonstrated on a small circuit. In this paper, the weaknesses of the original QSA model are identified, in the context of a production power grid (PPG) and probe card model, and a new model is described. The new QSA algorithm is developed from the analysis of IDDQ contour plots. A “family” of hyperbola curves is shown to be a good fit to the contour curves. The parameters to the hyperbola equations are derived with the help of inserted calibration transistors. Simulation experiments are used to demonstrate the prediction accuracy of the method on a PPG.
A New Technique for Scan Chain Failure Diagnosis
Authors: Guo Ruifeng , Venkataraman Srikanth 
Published: December 2020

Abstract
In this paper, we present a scan chain fault diagnosis procedure. The diagnosis for a single scan chain failure is performed in three steps. The first step uses special chain test patterns to determine both the faulty chain and the fault type in the faulty chain. The second step uses a novel procedure to generate special test patterns to identify the suspect scan cell within a range of scan cells. Unlike previously proposed methods that restrict the location of the faulty scan cell only from the scan chain output side, our method restricts the location of the faulty scan cell from both the scan chain output side and the scan chain input side. Hence the number of suspect scan cells is reduced significantly in this step. The final step further improves the diagnostic resolution by ranking the suspect scan cells inside this range. The proposed technique handles both stuck-at and timing failures (transition faults and hold time faults). The experimental results based on simulation and silicon units for several products show the effectiveness of the proposed method.
SEM in-situ Study of Electromigaration Induced Degradation Processes in Embedded Copper Interconnects
Authors: Langer Eckhard , Meyer Moritz Andreas , Zschech Ehrenfried , Herrmann Marko 
Published: December 2020

Abstract
In this paper an experimental set-up is presented that allows the Scanning Electron Microscope (SEM) in-situ investigation of electromigration phenomena in fully embedded copper interconnect structures, both from a top-down and from a cross-sectional perspective. The condition that the interconnects under test are fully embedded during the in-situ experiment is achieved using a Focussed Ion Beam (FIB) preparation technique. A SEM is equipped with a custom-made heating stage. During the experiment the void formation, growth and agglomeration process can be observed. Post-mortem cross-section analysis after the interconnect failure reveals e.g. a relationship between the microstructure of the copper contact and the non-constant growth rate of the voids.
Single Element Time Resolved Emission Probing for Practical Microprocessor Diagnostic Applications
Authors: Varner Elizabeth B. , Young Chi-Lin (Kenny) , Ng Hung M.(Paul) , Maher Steven P. , Eiles Travis M. , Lee Birk 
Published: December 2020

Abstract
This paper presents the first single element time resolved emission (TRE) data collected from microprocessors fabricated with 0.13 µm process silicon using tester loop lengths, and in many cases acquisition times, comparable to laser voltage probing. The data presented here demonstrate that TRE tools with highly sensitive single element detectors can be used for practical microprocessor circuit diagnostics with reasonable acquisition times.
Next-Generation Optical Probing Tools for Design Debug of High Speed Integrated Circuits
Authors: Lo William , Wilsher Kenneth , Malinsky Richard , Boiadjieva Nina , Tsao Chun-Cheng , Leibowitz Martin , Deslandes Hervé 
Published: December 2020

Abstract
Time-resolved photon emission (TRPE) results, obtained using a new superconducting, single-photon detector (SSPD) are reported. Detection efficiency (DE) for large area detectors has recently been improved by &gt;100x without affecting SSPDs inherently low jitter (≈30 ps) and low dark-count rate (&lt;30 s-1). TRPE measurements taken from a 0.13 μm geometry CMOS IC are presented. A single laser, time-differential probing scheme that is being investigated for next-generation laser voltage probing (LVP) is also discussed. This new scheme is designed to have shot-noise-limited performance, allowing signals as small as 100 parts-per-million (ppm) to be reliably measured.
TEM Direct Observation of Gate Oxide Defects
Authors: Wang Nathan , Daniel Sabbas 
Published: December 2020

Abstract
This paper describes the FA technique to identify very tiny defects that cause gate oxide damage. These defects as examples include crystal originated pits, gate oxide pinhole and residual. The defects may have the same electrical signature; the same kind of holes in gate oxide will be seen when the sample is simply deprocessed with wet chemical and observed with SEM; but they are distinctly different mechanisms. Electrical test, emission microscope, FIB and SEM were used to localize the defect and TEM for the final analysis. The application of planeview, cross-sectional and three-dimensional TEM is discussed.
Debug and Fault Isolation of an RF/IF Circuit for 3G Cellular Applications With High Leakage: A Case Study
Authors: Wilson Syd , Nair Manoj , Vicker Michael , Meador Richard B. , Smoot George , Sanders Paul , Kiefer Scott , Steele John , Sutton Mauri 
Published: December 2020

Abstract
First silicon of a cost effective, BICMOS mixed signal RF/IF integrated circuit (IC) for third generation (3G) cellular phones showed high leakage current on the analog receive supply pins in “battery save” mode. Our tasks were to identify and isolate the source of leakage and to fix the design. Alternate debug techniques were used to isolate the cause of the leakage and provide a solution after inconclusive results were obtained using photon emission microscopy,(1) and infrared microthermography techniques.
Scanning Magnetoresistive Microscopy for Die-Level Sub-Micron Current Density Mapping
Authors: Schrag B. D. , Liu X. Y. , Carter M. J. , Xiao Gang 
Published: December 2020

Abstract
In this paper, we will present a new technique for fault isolation and failure analysis in integrated circuits based on a scanning magnetoresistive imaging system. By detecting the stray magnetic fields at the surface of a chip using magnetic sensors with sub-micron spatial resolution, we are able to obtain a full map of in-plane current densities, resolving features smaller than 100 nanometers. We will briefly discuss the capabilities and limitations of the technique and will present results on a variety of frontside and backside samples.
High-Angle Electron Microscopy Technique for Analysis of Thin Film Contamination on IC Package Exteriors
Authors: Barbieri Thomas , Schaper Jake , Dimuzio Pete 
Published: December 2020

Abstract
Yield loss during final evaluation was occasionally associated with low level leakage current between neighboring pins on a Motorola IC product. A series of simple experiments on reject samples indicated that the source of the leakage was on or near the package surface and likely to be due to a conductive film on the backside of the package between the leads. A technique was developed to detect and analyze the film using high tiltangle and low accelerating voltage on the SEM and EDS. The shallow penetration depth of the electron beam permitted observation of a thin and continuous film on the backside of the failed package. Likewise, the EDS sampling volume was constrained to the outermost layers of the specimen surface, such that a significant signal was generated from the identified film, even at low accelerating voltage. An EDS line scan across a surface region containing the film resulted in an excellent correlation between increased levels of metallic elements gold and copper and the presence of the film.
X-ray Laminography Benchmarking and Failure Analysis of Solder Joint Interfaces
Authors: Thomson Barbara A. , Armendariz Norman J. 
Published: December 2020

Abstract
A new generation X-ray laminography (XRL) automated Xray inspection (AXI) tool was evaluated for surface mount technology (SMT) assembly defect detection and was qualified using formal “benchmark” comparative analysis processes. In addition, defect characterization was performed using the XRL AXI system in manual X-ray inspection mode to correlate various failure modes and mechanisms at SMT solder joint interfaces for selected non-destructive failure analyses and technology development. Since ball grid array (BGA) solder joint quality is a great concern in board assembly, test technology development and failure analysis teams explored the use of XRL AXI as a method to detect and monitor BGA ball abnormalities using XRL AXI-generated solder ball images and measurements. It was found that XRL AXI was able to successfully discern differences in the shape, location and diameter of the suspect BGA solder balls from XRL AXI horizontal image planes (slices) for physical failure analysis and reliability issues not previously detected using conventional X-ray transmission or electrical methods. Subsequent metallographic x-sectioning correlated the XRL AXI mages to the physical condition of the suspected second level interconnect (SLI) solder joint location.
Analysis of IC Manufacturing Process Deformations: An Automated Approach Using SRAM Bit Fail Maps
Authors: Zanon T. , Ferdman M. , Maly W. , Komeyli K. 
Published: December 2020

Abstract
SRAM bit fail maps (BFM) are routinely collected during earlier phases of yield ramping, providing a rich source of information for IC failure and deformation learning. In this paper, we present an automated approach to analyzing BFM data efficiently. We also demonstrate the usability of our analysis framework using real BFM test data from a large, modern SRAM test vehicle.
A Study on Fluorine-Induced Corrosion on Microchip Aluminum Bondpads
Authors: Hua Y. N. , Redkar S. , Dickinson Ron , Peh S. L. , Shirley  
Published: December 2020

Abstract
In the authors' previous paper, we studied the defects from Fluorine-Induced Corrosion on microchip Al bondpads using SEM, EDX, TEM, AES, IC, XPS and TOF-SIMS techniques. An unknown F-Al compound was found and identified as [AlF6]3-. In this paper, we will further study the chemical mechanisms of Fluorine-Induced Corrosion on microchip Al bondpads and propose a theoretical electrochemical model to reveal the secrets of Fluorine-Induced Corrosion on Al bondpads. To support this new theoretical model, we will provide substantiating data from TOFSIMS analysis and other failure analysis techniques. According to the theoretical model of Fluorine-induced Corrosion proposed, fluorine contamination on Al bondpads will cause two types of corrosions. First, fluorine reacts with Al and forms a complex compound [AlF6]3- on the affected area, which we will refer to as Fluorine Corrosion. Once the compound of [AlF6]3- forms on Al bondpads, it will form an Anode and cause further electrochemical reactions from O2, N2 and H2O (moisture) at the Cathode. The new products of further electrochemical reactions will be [OH]- and [NH4]+ ions. The new product of [OH]- ions will react with Al and cause further Al corrosion on bondpads and form corrosive product consisting of Al(OH)3, which we will refer to as [OH]- Corrosion. The new product of [NH4]+ ions will combine with [AlF6]3- and form a corrosive complex compound (NH4)3(AlF6). This proposed corrosion mechanism results in non-stick bondpad problem.
Advanced Process Defect Detection by Using Dynamic Bias Condition and MCT Camera
Authors: Wu Ching-Wei , Lee Jeng-Han 
Published: December 2020

Abstract
In this paper, a failure analysis case, which uses a dynamic operation technique and MgCdTe (MCT) camera to isolate single scan-chain failed cell is demonstrated. Improved results obtained using the MgCdTe (MCT) camera is compared with traditional Si CCD camera. Scan-chain cell schematic and failure mechanism is also presented to explain why static bias conditions are insufficient to detect this failure.
ESD Failure Signature Differences in the Devices Core Logic and Protection Structures - A Case Study
Authors: Henry Leo G. 
Published: December 2020

Abstract
For certain programmable logic type devices, the electrical, morphological and failure location differences in the ESD signatures between ICC failures and I/O leakage failures have been identified. Based on these electrical, morphological and physical failure signature locations, this case study confirms that distinctions can be made between the signatures associated with the likely stress modes for pin combinations like I/O-to-Vss, I/O-to-Vcc, I/O-to-I/O, Vss-to-Vcc and Vcc-to-Vss. This separation also facilitated the correct identification of core failures which are mostly due to the supply-to-supply pin combination stress, but in some cases are due to the pin-to-supply tests.
Photoemission and OBIRCH Analysis with Solid Immersion Lens (SIL)
Authors: Arata Ikuo , Sakamoto Shigeru , Yokoyama Yoshiyuki , Terada Hirotoshi 
Published: December 2020

Abstract
SIL(Solid Immersion Lens) is well investigated for optical pickup application because of its capability of high resolution. We applied this technique to microscopy, especially for precise observation of semiconductors. And also we applied it to fault isolation techniques like emission microscopy , OBIRCH(Optical Beam Induced Resistance Change) and TIVA,SEI. We found significant enhancement of resolution and sensitvity by using SIL. Applying this technique to emission microscopy, we should be aware of optical absorption charactristics of SIL lens materials. We investigated proper SIL lens materials for emission microscopy and laser scanning applications, and checked performance of Si(Silicon)-SIL and GaP(Gallium phosphide)-SIL. We also compared combinations of some kinds of SILs and detectors like C-CCD(cooled CCD) camera, MCT(HgCdTe) camera and position sensitive detector with InGaAs photo cathode II(image intensifier).
Laser Stimulation Applied to Dynamic IC Diagnostics
Authors: Beaudoin Félix , Desplats Romain , Perdu Philippe , Firiti Abdellatif , Haller Gerald , Dufayard Lionel , Vedagarbha Praveen , Lang Trung , Lewis Dean 
Published: December 2020

Abstract
Near-infrared laser stimulation techniques such as OBIRCH, TIVA, OBIC and LIVA are now commonly used to localize resistive defects from the front and backside of ICs. However, these laser stimulation techniques cannot be applied to dynamically failed ICs. Recently, two laser stimulation techniques dedicated to dynamic IC diagnostics have been proposed. These two techniques, called Resistive Interconnection Localization (RIL) and Soft Defect Localization (SDL), combine a continuous laser beam with a dynamically emulated IC. The laser stimulation effect on the circuit is monitored through the applied test pattern pass/fail status. This paper presents the methodology to move from static to dynamic laser stimulation. The application of such Dynamic Laser Stimulation (DLS) techniques is illustrated on dynamically failed microcontrollers.
Speed Path Analysis: A Connection Between Speed Degradation, Silicon Dislocations, and Light Induced Voltage Alteration
Authors: Davis D. 
Published: December 2020

Abstract
The failure analyst is often times challenged with the analysis of devices that fail due to speed degradation. These are units that pass the entire standard test program as long as the speed at which the device is tested is kept below a certain level. Many times, these units are binned and sold to customers at reduced prices. The unresolved rate for these types of failures is often sporadic and at times there isn’t any defect that is physically observable or detectable with global EFA (electrical failure analysis) techniques. These devices are usually from an advanced process where a shift in performance such as current, voltage, and speed (frequency) is common.
Quantitative Interpretation of Scanning Capacitance Microscope Images as Two-Dimensional Dopant Profiles
Authors: Kopanski J. J. , Marchiando J. F. 
Published: December 2020

Abstract
Scanning capacitance microscopy (SCM) is used as a qualitative analysis tool with multiple applications for failure analysis. SCM can measure the shape of dopant profiles, can ascertain if certain implants have been completed, can verify the conduction type of implanted regions, and can look for unexpected shorts or opens in doped regions of a device. To obtain quantitative two-dimensional dopant profiles from SCM images of silicon devices requires careful attention to the data acquisition conditions and processing of the measured SCM image using quantification software. This paper discusses the operational subtleties of the scanning capacitance microscope required to produce images amenable to quantitative interpretation as dopant profiles. Two approaches to quantitative dopant profile extraction are discussed: the calibration curve method and the regression method. The structure and use of the FASTC2D software for dopant profile extraction from SCM images developed at the National Institute of Standards and Technology is described. Finally, two-dimensional dopant profiles from some simple structures and a discussion of the quality of the extracted profiles are presented.
Newly Developed Scanning Laser-SQUID Microscope
Authors: Nikawa K. , Sakai S. 
Published: December 2020

Abstract
The scanning laser-SQUID microscope can detect electrical defects in a chip without requiring electrical contacts to the chip. Using our new system, we can get magnetic flux images of a 300mmɸ wafer in air. Experiments with 256Mbit-DRAM chips showed that IDDS testing results are correlated well with laser-SQUID images, and that the spatial resolution is 0.59 µm in an intensity image, and 0.54 µm in a phase image. We have also succeeded in localizing the open site in a whole chip area of a 90nm-node logic IC chip.
Silver-on-Silver versus Tin-on-Silver Electrical Connectors for High Current and High Vibration Applications
Authors: Singh Prabjit , Palmer Larry , Demarest James , Fischer Larry , Hutt George , Thompson Gary , Brodsky William , Lloyd James R. 
Published: December 2020

Abstract
Contrary to known art, we have discovered that lubricated tin-silver connectors have better electrical performance and are more reliable than lubricated silver-silver connectors under high-current and high-vibration conditions. The antifretting lubricant, that enhances the performance and reliability of the tin-silver connectors, is a grease consisting of a hydrocarbon oil in a nano-sized silica-particle base. Focused ion beam and scanning electron microscopy were used to understand the contact degradation mechanism. The superior electrical performance and reliability of the lubricated tin-silver connectors is due to a mechanism that replaces the tin plating from the contact surface with a coating of silver. The removal of the tin plating may be due to wear and the replacement by the silver coating may be due to an electrochemical displacement reaction.