Spalling of a Single Crystalline Silicon Layer By Electroless/Electrodeposit-Assisted Stripping(EAS) Process for Flexible Silicon Devices
Authors: Yang Changyol , Yu Sungkuk , Yoo Bongyoung 
Published: February 2020

The purpose of this study was to investigate
a novel kerf-free method
to reduce thecost of the silicon materialfor flexible silicon devices such as a solar cell, a TFT(thin film transistor) and etc. In the last few decades, there were a number of attempts to reduce the production cost of the silicon by reducing the thickness of the silicon wafer such as a sawing technique, a high-temperature induced spalling process and etc. Among these techniques, a novel method called
Electroless/Electrodeposit Assisted Stripping(EAS)
process is one of the most effective and inexpensive kerf-free methods for acquiring a high quality thin-single crystalline silicon film. The EAS process is schematically described in Figure 1. This technique requires a stressor layer at a predetermined depth by manipulating the stress value and thickness of Ni deposit. A stress is induced by a nickel layer electrodeposited from citrate bath at room temperature. As the induced tensile stress was introduced at the critical value, a thin Si layer without crack was successfully lifted off from a silicon substrate. The advantage of the EAS process is that the thin silicon film can be repetitively lifted off from a Si substrate, so that it dramatically reduces the manufacture cost of the solar cell and can also be reproduced continuously owing to its all-wet process.
The EAS process is consisted of three steps: 1) forming a Ni seed layer with nano-rod using anelectroless deposition to enhance the adhesion of seed layer on Si substrate, and 2) forming a low stress layer as a buffer layer to prevent cracks on a seed layer and then finally 3) forming a high stress layer using electrodeposit at room temperature. A high quality Si film could be obtained by the precise control of two parameters: 1) adhesion between a metal seed layer and Si, 2) critical stress applied to Si substrate.
Concerning control of the adhesion of the Ni seed layer-Si interface, a Ni seed layer has to be satisfied with both high adhesion on Si and high resistance of crack by a high stress-inducing layer. We investigated a high adhesive electroless seed layer on Si in place of a conventional high cost PVD(physical vapor deposition) process. Firstly, nano-holes were formed with control of a critical spacing on Si surface by MACE(metal assisted chemical etching) and then both holes and Si surface were covered with Ni using autocatalytic electroless deposition. The effect of the nano-hole in silicon, such as a pretreatment for enhance adhesion, is also investigated using different MACE parameters – control of metal distribution, depth in Si, the size of the nano-hole, various etched structure.
Concerning control of a critical stress applied to Si substrate, a stress layer has to be satisfied with a certain stress value high enough to propagate a crack within Si during electrodeposition. We investigated both internal stress value of the Ni deposit and the spalling behavior under different conditions of composition, current density, pH, temperature etc.

Figure 1