Abrupt SiGe and Si Profile Fabrication by Introducing C Delta Layer
Authors: Yamamoto Yuji , Hesse Anne , Zaumseil Peter , Murota Junichi , Tillack Bernd 
Published: February 2020

Epitaxial SiGe is widely used for many applications e.g. stressor for C-MOS channel (1), NPN HBT base (2) and SiGe superlattice bolometer (3). However, in order to fabricate shallow and abrupt SiGe profiles, diffusion control at Si and SiGe interface is important, especially at high Ge content. To prevent the interdiffusion, a possible solution could be to lower the temperature during and after the SiGe epitaxy, however it is not preferred because flexibility of process integration is restricted. To reduce the interdiffusion, introduction of C delta layer at the interface is reported (4). Here we investigated the influence of the C delta layer on the interdiffusion and crystal quality.
Epitaxial Si/SiGe growths are carried out using a single wafer reduced pressure CVD system. After native oxide removal of a Si(001) wafer by 1000oC prebake in H2, ~10 nm thick Si0.5Ge0.5 is deposited using H2-SiH4-GeH4 at 500oC. Then a Si cap layer is deposited at 500oC to 575oC using H2-Si2H6. To discuss the influence of a C delta layer on the interdiffusion and crystallinity, CH3SiH3 exposure with H2 carrier gas is performed at 500oC before/after the SiGe growth. Profiles of Ge content and crystal perfection are simulated by fitting of XRD rocking curves of Si(004) diffraction. Crystal perfection ranges from 1 (ideal crystal) to 0 (amorphous/polycrystalline).
Crystal perfection of SiGe with C delta layers at different positions without/with postannealing at 575oC is shown in Fig. 1. In the case of samples without postannealing, the influence of C delta layers on the crystal perfection is minor. On the other hand, in the case of samples after the postannealing at 575oC, suppression of crystallinity degradation is observed only for the samples with C delta layer at the SiGe surface. C delta layer at the interface between Si and SiGe is less impacting on the suppression of crystallinity degradation. The degradation of SiGe crystallinity is also detected by spectroscopic ellipsometry analysis. The C delta layer at the surface seems to be suppressing defect formation of SiGe at 575oC. Further investigation is required for clarifying the mechanism behind.
Figure 2 shows crystal perfection of a Si cap layer deposited on SiGe without/with C delta layers at different temperatures. Note that no defects are observed for all Si growth temperatures used if the Si layer is deposited on Si surface. That means the Si2H6 based Si epitaxy for its own is working perfectly. In the case of the sample without C spike at the interfaces, crystal perfection is ~0.8 from 500oC to 550oC, indicating high crystal quality. But at 575oC, crystal perfection becomes zero because Si is grown on defective SiGe. On the other hand, in the case of the sample with C delta layers at the interface, low crystal perfection of Si cap layer is observed at 500oC. With increasing Si cap growth temperature the crystal perfection of the Si cap becomes higher. At above 550oC, crystal perfection reached ~0.9. The high crystallinity of Si cap at 575oC is caused by maintained crystallinity of the SiGe by the C delta layer. A possible interpretation of low crystallinity Si growth at 500oC and improved Si crystal quality at higher temperature is;

Adsorbed CH3 species on SiGe surface at 500oC causes probability of disordered Si2H6 adsorption.

At higher temperature, hydrogen desorption from the SiGe surface and reallocation are pronounced. The CH3species may react with dangling bond at substitutional site. (C desorption is not evidenced by SIMS measurement).

SiGe/Si cap profiles simulated by XRD without and with C delta layers at interface are shown in Fig. 3 (a). By depositing Si cap at 550oC, smearing of SiGe profile is observed for sample without C delta layers. On the other hand, in the case of sample with C delta layer at interface, steep SiGe profile is observed. This diffusion suppression by C delta layer is also detected by SIMS (Fig. 3 (b)). The SiGe interdiffusion process is reported as vacancy mechanism (5). Possible assumption of the diffusion suppression effect is vacancy trap near the interface by C.
These results shown here offer the opportunity of interdiffusion control of SiGe/Si interface using C delta doping while maintaining high crystal perfection.

References

(1) J. Kasim et al. Solid-State Electron. 110 (2015) 19
(2) A. Fox et al. IEEE Electron Device Lett. 36 (2015) 642
(3) L. Zhang et al. DOI: 10.1109/RSETE.2012.6260364
(4) T. Hirano et al. Thin Solid Films 518 6 1 (2011) S222
(5) N. Ozguven et al. J. Appl. Phys 90 (2007) 082109

Figure 1