bluuebunny/crossref_metadata_2025_split huggingface dataset:
Medium Voltage Hybrid Si IGBT/SiC JBS Diode Module Development
Authors: Hobart Karl D , Imhoff Eugene A , Ray Biswajit 
Published: February 2020

Wide bandgap semiconductors are an obvious choice for high voltage applications due to their large critical electric field. While both SiC and GaN will support large electric fields, approximately 10x that of the dominant power semiconductor Si, the wide availability of SiC substrates up to 150 mm diameter provides a cost effective platform over GaN for which even 50 mm substrates are in high demand. Besides substrate technology, high growth rate epitaxy, ion implantation and anneal technologies are well established for SiC. The typical insertion path begins with majority carrier devices such as Schottky diodes which are robust and relatively simple to manufacture. Junction barrier Schottky diodes have been shown to be stable at 10kV [1] and are commercially available up to 1.7 kV. The obvious application for JBS diodes is as a substitute for Si PiN diode freewheeling diodes. The key advantage is the transition from the minority carrier Si bipolar device to the majority carrier unipolar SiC device. This transition to the SiC Schottky virtually eliminates the reverse recovery effects typical of Si PiN diodes. Further, the adoption of the junction barrier Schottky structure results in low reverse leakage current and stable blocking voltages.
In this work medium voltage, 4.5 kV SiC JBS diodes matched to commercially available 4.5 kV IGBTs are joined to form efficient hybrid modules. Dynamic and static characteristics as well as reliability phenomena are evaluated. Compared to the all-Si module, the hybrid module shows up to a factor of six reduced turn-on loss as is demonstrated in Fig. 1 where 4.5 kV Si PiN diode compared to a SiC JBS diode. The recovery current is shown on the left and the impact on the IGBT turn-on characteristics is shown on the right. Through simulations and hardware testing the modules have been optimized for the IGBT/JBS die are ratio in terms of total power dissipation. Other considerations include surge capability which is limited by the JBS diode and the reverse blocking voltage of the IGBT. An external circuit that clamps the voltage across the diode is developed and demonstrated greatly increasing the surge rating. Reliability considerations such as high temperature dV/dt and HTRB are assessed and will be presented.
Overall, the hybrid modules are extremely efficient and robust. Total power losses are reduced by one-half by replacing only the freewheeling Si PiN diode with a SiC JBS diode. The optimized solution reduces the needed SiC die area and thus module costs. Reliability assessments show that the modules are robust.
References:[1] Brett A. Hull, Joseph J. Sumakeris, Michael J. O’Loughlin, Qingchun Zhang, Jim Richmond, Adrian R. Powell, Eugene A. Imhoff, Karl D. Hobart, Angel Rivera-López, and Allen R. Heffner, “Performance and Stability of Large-Area 4H- SiC 10-kV Junction Barrier Schottky Rectifiers”, IEEE Transactions on Electron Devices, vol. 55, no. 8, pp.1864-1870 (2008). Figure 1
Large-Area, Cost-Effective Nanoplasmonic Structures and Their Applications
Authors: Choi Dukhyun 
Published: February 2020

Nanoscale functional material design and fabrication are essentially fundamental requirement for basic scientific researches and industrial applications of nano-science and engineering. Innovative, effective, reproducible, large-area uniform, tunable and robust nanostructure/material synthesis are still challenging. On the other hand, nanoscale controls of optical effects are a key element in advanced innovative nanophotonics and biophotonics, especially for biological and environmental molecular detection/imaging. Such optical modulation is also the critical technology in many optical devices such as a solar cell and a light-emitting diode (LED). However, optically tunable nanostructures/nanodevices have shown the big problem in the structural stability, thus resulting in a limited life-time under external loads, and moreover, if robust and tunable optical devices can be completed, the effort involved to precisely control the optical effects with structural strength and the reproducibility is so great that commercial-scale manufacture would never be cost-effective. Here, I would like to introduce the novel nanofabrications which rely on template-based nanolithography and present the surface plasmon (SP) which can effectively control the optical effects in nanostructures by simply modulating geometrical properties such as shape, size, and periodicity. Furthermore, in order to provide label-free and non-destructive molecular detection method, Raman scattering will be combined.
Plasmonic nanostructures with a localized surface plasmon resonance (LSPR), which is generated by the coupling of light to the collective oscillation of electrons on the nano-sized metallic surface, have generated considerable interest with the development of nanotechnology due to its ability to enhance the weak physical process such as the absorption of light. By adopting such a plasmonic nanostructure inside/onto/beneath a photoactive layer, a power conversion efficiency of solar cells could be improved because an electromagnetic (EM) field is greatly enhanced by plasmonic “hot spots”. Furthermore, optical biosensors such as surface-enhanced Raman scattering (SERS) could be designed with an ultrahigh sensitivity through a local field enhancement from the “hot spots”. A variety of optoelectronic devices and optical biosensors integrated with plasmonic nanostructures thus have been explosively studied and developed. In this study, we report large-area 3D plasmonic nanostructures though a high-throughput and cost-effective process. The surface morphology and optical properties are characterized by SEM and UV-vis. spectroscopy. Furthermore, their enhancement factor is evaluated by using SERS signals.
Atomic Scale and Interface Interactions in Redox-Based Resistive Switching Memories
Authors: Valov Ilia , Tappertzhofen Stefan , Linn Eike , Menzel Stephan , van den Hurk Jan , Waser Rainer 
Published: February 2020

Controlling electrochemical processes at interfaces or within thin films at the atomic scale is a key factor for further development of future nanoelectronics and information technology. This aspect becomes even more important considering concepts beyond conventional data storage like neuromorphic and memristive systems, demonstrating learning abilities and allowing logic operations.
Redox-based resistive switching memories (ReRAM) are major candidates to fulfil all requirements for low power consumption, ultrafast operation, high information density and non-volatility. Their metal/solid-electrolyte/metal structure makes the preparation process simple and compatible with current CMOS technology. In ReRAMs, the solid electrolyte thickness varies in the range between few nanometers up to some ten nanometers. Due to the small dimensions, the high electric fields in the order of E ~ 108 Vm–
1, and current densities of j ~ 109 Acm–
2, the interface regions are dynamically changing as a function of the thermodynamic and operation conditions. Deposited as nanoscale films, even macroscopic insulating materials like SiO2 and Ta2O5 are able to conduct ions, and electrochemical measurements well known from the liquid electrochemistry can be performed.
The talk gives an overview on the current state-of-the-art knowledge on redox-based resistive switching ReRAMs, focusing on the electrochemical dynamics at the metal/solid-electrolyte interfaces of nanoscaled thin films and quantum effects. The electrochemical kinetics during formation of nanofilaments will be discussed along with influence of the local environment and the generic relevance of the counter charges. The relation of these studies to the more fundamental issue of describing the microscopic electrochemical processes at the atomic scale will be emphasized.
Effect of Selenium Doping on GeSb for Phase Change Memory Applications
Authors: Ko Dae Hong , Kim Jeong Hoon , Byeon Dae-Seoup , Park Jeong hee 
Published: February 2020

Phase change memory(PCM) has been focused as the alternative for next generation memory since it shows several advantages such as low fabrication cost, a scalability below 20nm design rule, large endurance cycles, and compatibility with semiconductor process. However, there still exist essential problems that are mainly determined by the properties of a phase change material. For example, the PCM cells composed of GeSbTe alloy relatively show low crystallization temperature, slow operation speed, and narrow resistance margin between reset and set state in respect of commercialization of PCM.
In our study, the GeSb film was selected as phase change material due to its fast crystallization speed and selenium was employed doping element for increasing thermal stability and the margin between high and low resistance. When the selenium was incorporated into GeSb film up to 8 at %, the crystallization temperature increased from 150oC to 225oC and the amorphous sheet resistance was elevated more than 13 times compared with undoped GeSb film. In addition, the resistance margin of the film significantly increased more 2 order of magnitude than that of GeSbTe film. The phase separation was found in the GeSb film doped with selenium over 8 at % and this was proved by XRD and XPS analyses. As a consequence, Selenium doped GeSb film was strongly demonstrated as phase change material of PCM cell due to its thermal stability and large resistance margin including high crystallization speed.
Charge Trapping Properties of Silicon Carbonitride Storage Layers for Nonvolatile Memories
Authors: Kobayashi Kiyoteru , Naito Shinji , Tanaka Shin , Ito Yoshina 
Published: February 2020

Charge-trapping nonvolatile memories have received considerable attention as a promising candidate for the future data storages in communication and multimedia applications. In this architecture, electron and hole trapping phenomena by point defects distributed in charge trapping dielectric layers, such as silicon nitrides, are commonly used to memorize data. Recently, we have proposed the application of SiCN films with a low-dielectric constant (low-k) and a narrow band gap to the charge trapping layers [1]. The relative dielectric constant of SiCN films is 4.8-4.9, which is lower than that of silicon nitride films. Charges trapped in the low-k SiCN charge trapping layer induce the larger threshold voltage shift in MISFETs as compared with those trapped in the silicon nitride layer. In addition, the band gap of SiCN films is 3 to 4 eV, which is narrower than that of silicon nitride films (~5 eV). The narrower band gap of the charge trapping layer reduces the energy barrier for carrier injection into the layer. Thus, the low-k and narrow-band gap SiCN films would yield higher programming and erasing speeds and reduced power consumption. In the present study, we conducted a comparative study on charge trapping characteristics of the SiCN and silicon nitride films.
Two types of film structures were fabricated on p-type (100) silicon substrates: (A) a SiOX-SiCN-SiO2 film and (B) a SiOX-SiNX-SiO2 film. In the both types of films, a tunnel oxide film of 2.4 nm in thickness was first formed using rapid thermal oxidation. A 31.5-nm-thick SiCN film with the relative dielectric constant of 4.8-4.9 was grown at 400 °C using a PECVD technique. A 30.4-nm-thick SiNX film was grown at 600 °C using a LPCVD technique. A blocking oxide film of 17.3 nm was grown using a PECVD technique. Finally, an aluminum film was deposited to form the gate electrode. After electrons or holes were injected into the charge trapping layers, the flat-band voltage shifts ΔVFBwere measured.
Figure 1 shows the programming and erasing characteristics under the gate biases of +14.3 V and -15.1 V. The programming and erasing speeds in the SiOX-SiCN-SiO2 structure were obviously higher than those in the SiOX-SiNX-SiO2 structure. In the programming operation, the higher programming speed in the SiCN sample was mainly attributed to the low-dielectric constant of the SiCN film. In the erasing operation, the hole trapping speed in the SiCN sample was higher than that in the SiNX sample. The higher erasing speed in the SiCN sample arose from the higher hole trapping speed and the low-dielectric constant of the SiCN film. Figure 2 shows the retention characteristics of the SiOX-SiCN-SiO2 and SiOX-SiNX-SiO2 structures. The extrapolated 10-year memory window of the SiCN sample was wider than that of the SiNXsample. The SiCN films can be employed as the charge trapping layer of advanced nonvolatile memories.
References: [1] K. Kobayashi, S. Naito, S. Nakiri and Y. Ito, ECS Trans. 58(5) (2013) 81.
Electron Device Potential of 2D Crystal Semiconductors
Authors: Jena Debdeep 
Published: February 2020

2D crystal semiconductors such as graphene and transition metal dichalcogenide are emerging as potentially attractive candidates for extending existing electronic device paradigms. More importantly, in the attempt to replicate existing electronic devices, the structural and electronic properties of these materials point towards potentially novel devices [1]. In this contribution, FOUR aspects of this emerging story will be presented, combining theory and experimental demonstrations.
FIRST, the physical properties of 2D crystal materials such as graphene, MoS2, etc will be compared with conventional semiconductors such as Si, Ge, GaAs, GaN, etc. Structural properties, energy bandgaps, electron/hole transport properties, etc pertinent to electronic devices will be compared, and contrasted specifically as the dimensions are scaled down to nanoscale thicknesses.
SECOND, the novel transport properties of 2D crystal semiconductors will be discussed. In particular, the mobilities of these materials within a band are affected by the coupling to surrounding dielectrics and by the presence of d-orbital band-edge states. The effect of out-of plane phonon vibrations and charged impurity scattering currently limits the mobilities severely in the MoS2 family of 2D semiconductors. Methods to boost the transport properties as predicted by the theoretical analysis will be presented. In addition, interband tunneling transport in both graphene and gapped MoS2-type chalcogenide semiconductors will be presented, with an eye towards novel electron device applications.
THIRD, conventional FET-type devices using these materials will be discussed and contrasted with existing state-of-the-art performance with Si and III-V semiconductor devices. Challenges and opportunities in this arena for 2D crystal semiconductors such as advantages of electrostatic scaling advantages, and ohmic contact challenges will be discussed. Experimental results on 2D crystal semiconductor FETs with high on/off ratios, respectable mobilities, and robust current saturation will be presented.
FOURTH, novel nanoelectronic devices that depend on tunneling transport will be presented. Specifically device proposals that exploit the intrinsic properties of 2D crystal semiconductors, such as graphene nanoribbon tunnel-FETs (TFET), Symmetric FET (SymFET), and TFETs with transition metal dichalcogenides will be presented. Finally, the very recent experimental demonstrations of some of these proposed devices will be discussed, and the challenges in realizing these devices, and their promise will be discussed.
[1] D. Jena, Proceedings of the IEEE, 101, 1705 (2013).
Unipolar CMOS Logic for Thin-Film Transistor Technology
Authors: Ma T.P. 
Published: February 2020

For most thin-film transistors, it is very difficult, if not impossible, to fabricate CMOS circuits because of the difficulty in realizing both p-type and n-type channels in the same thin-film semiconductor, despite the well-known advantage of CMOS circuits’ lower stand-by power.
The operating principle of the proposed unipolar logic circuits will be described in the context of both the double-gate transistor architecture and the single-gate transistor architecture.
Figure 1 shows a circuit diagram for a two-input unipolar NOR and OR logic gates based on all n-channel MOSFETs, and Fig. 2 shows a circuit diagram for a two-input unipolar NAND and AND logic gates, also based on all n-channel MOSFETs.
Figure 3 shows a schematic diagram of the possible implementation of a unipolar NAND and AND circuits based on the IGZO thin-film transistor double-gate architecture, and Fig.4 shows its counterpart based on single-gate architecture.
The unipolar logic circuits typically suffers from the “threshold voltage loss” problem at the “HIGH” output, and we have developed a novel bootstrapping block to restore the voltage for the “HIGH” output. Examples will be presented to show the effectiveness of the bootstrapping circuits.
The power savings resulting from the unipolar approach as compared to its conventional counterparts will be shown by the use of simulation.
This work has been partially supported by the
Sandia National Laboratory PO#1383897.
Structural and Electrochemical Performance of Ternary Type-I Clathrate As Anode Materials for Lithium-Ion Batteries
Authors: Li Ying , Raghavan Rahul , Wagner Nicholas , Chan Candace 
Published: February 2020

Due to its high theoretical specific capacity, silicon has been the subject of intense interest and research as a high energy density anode for lithium-ion batteries. In the last several years, nanostructured silicon has been shown to be very effective for relieving lithiation induced strain and avoiding pulverization, which can lead to capacities > 3000 mAh/g, a 10X improvement over the commercially used graphite anode. However, despite this impressive proof-of-principle, nanostructured silicon can still suffer from degradation over long cycling times due to several reasons such as collapse of the nanostructure, increased porosity, structural instability, and insufficient surface passivation. The work to be presented here will introduce our investigations into the lithiation of silicon clathrates, (fullerene-like materials where silicon atoms are arranged in cage-like structures) that have been shown, through first principles calculations, to be able to allow lithium insertion without a large volume change or pulverization [1].
In our group, we have investigated silicon clathrate materials, which have cage-like structures, as an anode material of Li-ion battery. Our studies on type II clathrate based on Na24Si136 show that lithium insertion is energetically feasible inside silicon cages that are fully occupied by other guest atoms. However, large amounts of lithium insertion cause a transformation between from the clathrate structure to an amorphous silicide and eventually Li15Si4 [2].
This presentation discusses the structure and electrochemical performance of ternary Ba-X-Si type-I clathrate (where X = Cu, Al). Polycrystalline silicon clathrate materials are synthesized using thermal annealing and arc-melting methods. Electrochemical and structural analysis show these cage-like silicon structures have the ability to allow lithium insertion and removal without a large volume change or pulverization. Lithiation/delithiation of silicon clathrate anodes will be presented comparing to that of diamond cubic and amorphous silicon. Ex-situ X-ray diffraction, X-ray photoelectron spectroscopy, and nuclear magnetic resonance are also employed to understand the structural changes upon lithiation and delithiation.
References:
[1] K.S. Chan, C.K. Chan, W. Liang, Silicon clathrate anodes for lithium ion batteries. U.S. Patent Application no. 12/842,224 (2010)
[2] N.A. Wagner, R. Raghavan, R. Zhao, Q. Wei, X. Peng, C.K. Chan. Electrochemical cycling of sodium-filled silicon clathrate. ChemElectroChem. 1, 347-353 (2014).
Simplifying Electrothermal Dynamics of 15-Ah Prismatic Li-Ion Batteries
Authors: Secondo Lynn , Kim Sun Ung , Siegel Jason , Stefanopoulou Anna , Monroe Charles W 
Published: February 2020

A simply coupled electrochemical and thermal model is validated and presented for a 15 Ah large format prismatic lithium iron phosphate cell. Understanding the thermal response of lithium-ion cells is essential because it would allow the batteries to be operated more efficiently. Two important issues regarding the thermal response are "cold start" and "thermal runaway."[1] Use of a validated simulation can aid in enhancing the performance and safety of these batteries.
To minimize the number of essential parameters, the simplest models are carefully chosen to depict the battery responses. At least two physical models are necessary for describing an electrochemical system: an electrochemical model and a local energy balance. For the electrochemical model, we select the Newman and Tobias model, which provides an analytic solution with an assumption that the ion concentration gradient is negligible.[2] For the energy balance [3,4], three different heat sources are necessary to match our experimental data: (1) Joule heating of the cell materials (simple IR heating), (2) an additional Joule heating generated by the interfacial resistance between electrode and electrolyte, and (3) the reaction heating from reversible entropy change. Joule heating is always exothermic; however, the reversible heat depends on the electrochemical reaction and can be endothermic or exothermic.
Even though the minimal physics are chosen for simplicity, the number of physicochemical parameters in the completed model was more than ten; however, the number could be decreased to five after rigorous dimensional analysis. Therefore, not only do these parameters suggest important factors for the battery response, but they also help to control the battery in efficient ways, since this test shows that many parameters have the same effect in the electrical/thermal response. Comparison to target experimental data characteristics of the battery (Fig. 1) allows iterations of the dimensionless parameters to increase accuracy through multidimensional Newton-Raphson method. Finalized parameters will guide simulations to help control the battery in efficient ways.
[1] T. M. Bandhauer, S. Garimella, and T. F. Fuller, Journal of The Electrochemical Society 158, R1 (2011).
[2] J. S. Newman and C. W. Tobias, 109(12), 1183 (1962).
[3] D. Bernardi, E. Pawlikowski, and J. Newman, J. Electrochem. Soc. 132, 5 (1985).
[4] J. Newman and K. E. Thomas-Alyea, Electrochemical Systems, 3rd ed. Wiley, 2004.