(Invited) Bicmos Technology Optimization for Millimeter Wave Applications
Authors: Donkers Johan J.T.M. , Dinh Thanh Viet , Vanhoucke Tony , Weijs Pieter , Brunets Ihor , van Dijk Pieter , Sebel Patrick , Huiskamp Paul , Werkman Ronald , Pijper Ralf , Magnée Peter H.C. 
Published: February 2020

With the progress of RF CMOS and BiCMOS technologies, millimeter-wave applications have come well within reach of silicon-based technologies [1-3]. NXP’s SiGe BiCMOS process offers a 0.25μm CMOS base-line, with shallow- and deep-trench isolation, a full suite of high-quality passive components and three SiGe:C Heterojunction Bipolar Transistors. From the first publication on the 8th generation [4], the process architecture has only been changed cautiously, keeping manufacturability and cost very competitive. A good example of that is the addition of the third HBT with a high-energy implanted subcollector [5], bringing the typical BVCBO breakdown voltage range from 4.5V to 11.5 to 15V for the Low Voltage, High Voltage and Extended High Voltage device respectively. Generation 9 was first published in 2015 [6], with main features illustrated in Figs. 1 and 2. Since then, the process has been used to further explore millimeter-wave application needs. In this paper, we focus on improving noise performance at frequencies above 28GHz by scaling the npn in the vertical direction, i.e. the doping profiles, but also scaling in the lateral direction to reduce all parasitic elements.
In the early nineties device fabrication using epitaxial growth of strained SiGe/Si heterostructures enabled a breakthrough in bipolar process technology. Nanometer-scale bandgap engineering of SiGe:C Heterojunction Bipolar Transistors have pushed fT/fMAX performances above 500GHz. In our technology today, non-uniformity of the thicknesses of the individual layers has been brought below 5Å, matched across a number of epi reactors in two different fabs. After growing the desired npn doping profile with such great care and precision, the total thermal budget of the BiCMOS process and all its options, determines to a great extent what performance is left of the intrinsic doping profile capability. The noise performance of a Low Noise Amplifier (LNA) depends on the minimum noise figure NFMIN=10log(FMIN) of the SiGe Heterojunction Bipolar Transistor (HBT), which in turn depends on a number of technology related device parameters, see Equation (1), [7].
F = 1 + 1/hFE + { 1/hFE + (2gmRB) (1/hFE + (f/fT)2 ) }1/2
(
1
)

Building on the excellent base resistance properties of the non-selectively grown SiGe:C base architecture of Gen9, we have investigated in this work the effect of reducing the total temperature budget to enable shorter delay times. In a first experiment the final activation anneal was reduced in 5 steps to provide input on re-tuning of the thicknesses in the base-epi stack. From known correlations between inline ellipsometry and process control measurements like, for example reverse emitter-base breakdown voltage shown in Fig. 3, the temperature decrease on the activation anneal could be calculated to correspond with a delta of around 65Å on the emitter cap. This effect, due largely to decreased in-diffusion of arsenic from the mono-emitter, is confirmed by TCAD simulations, as shown in Fig. 4. Similarly, the reduced lateral diffusion of arsenic underneath the L-shaped inside spacers enables re-scaling of the inside spacer width at the bottom of the emitter window to decrease its contribution to the total base resistance.
Figure 5 shows the measured minimum noise figure at 30GHz as a function of collector current density for devices with 0.3µm emitter width. It shows the improvement from Gen8 to Gen9 technology, due in this work, to both increased RF performance due to vertical scaling in combination with reductions of the extrinsic base resistance contributions.
In conclusion, NXP’s present 0.25µm SiGe BiCMOS processes are suitable for a wide variety of applications and frequency ranges. Process optimization targeted at low noise above 28GHz demonstrates noise performance levels that can easily match processes which feature HBT’s with much higher specified fT/fMAX.

References – [1] J.J. Pekarik et al., “A 90nm SiGe BiCMOS technology for mm-wave and high-performance analog applications”, Proc. BCTM, pp. 92-95, 2014. [2] M. Schröter et al., “SiGe HBT technology: future trends and TCAD-based roadmap”, Proc. IEEE, Vol. 105, No. 6, June 2017. [3] B. Heinemann et al., “SiGe HBT with fT/fmax of 505 GHz/720 GHz”, IEDM 2016, pp. 3.1.1-3.1.4. [4] W.D. van Noort et al., “BiCMOS technology improvements for microwave application”, Proc. BCTM, pp. 93-96, 2008. [5] H. Mertens et al., “Extended High Voltage HBTs in a high-performance BiCMOS process”, Proc. BCTM, pp. 158-161, 2011. [6] J. Melai et al., “QUBiC generation 9, a new BiCMOS process optimized for mmWave applications”, Proc. BCTM, pp. 113-116, 2015. [7] See e.g. chapter 7 in J.D. Cressler and G. Niu, “Silicon-Germanium Heterojunction Bipolar Transistors”, Artech House, ISBN 1-58053-361-2, 2003.

Figure 1