bluuebunny/crossref_metadata_2025_split huggingface dataset:
Non-Visible Defect Analysis of OTP Device
Authors: Chen C.Q. , Ang G.B. , Xing Z.X. , Hua Y.N. , Mo Z.Q. , Ramesh Rao , Li Y. 
Published: December 2020

Abstract
Several product lots were found to suffer from data retention failures in OTP (one time program) devices. PFA (physical failure analysis) was performed on these devices, but nothing abnormal was observed. Cross-sectional TEM (transmission electron microscopy) revealed no physical defects or abnormal CDs (critical dimensions). In order to isolate the failed layer or location, electrical analysis was conducted. Several electrical simulation experiments, designed to test the data retention properties of OTP devices, were preformed. Meilke's method [1] was also used to differentiate between mobile ion contamination and charge trap centers. Besides Meilke's method, a new electrical analysis method was used to verify the analysis results. The results of our analysis suggests that SiN charge trap centers are the root cause for the data retention failures, and the ratio of Si/N is the key to charge trap center formation. Auger analysis was used to physically check the Si/N ratio of OTP devices. The results support our hypothesis. Subsequent DOE (Design Of Experiment) experiments also confirm our analysis results. Key Words: OTP, data retention, Non-visible defect, AFP, charge trap center, mobile ion.
A Study of a Characteristics Variability Evaluation in an Actual LSI Circuit with Nanoprobing Technique
Authors: Fukui Munetoshi , Nara Yasuhiko , Tsunomura Takaaki , Nishida Akio , Fuse Junichi 
Published: December 2020

Abstract
In this paper, we propose an evaluation method of characteristics variability of MOS transistors in an actual circuit with the nanoprobing technique. Based on the result of correlation with data of a parametric tester, we verified that the nanoprobing had ability for variability evaluations and its precision of is 7 mV in threshold voltage and 0.5 mA in saturation current respectively. As the result of the trial evaluation of variability of SRAM cells in an actual LSI die, we confirmed that variations of threshold voltage and saturation current are normal distributions.
Impacts of Sample Preparation Methodology on TEM Failure Analysis of Advanced Semiconductor Devices
Authors: Zhou Yongkai , Zhu Jie , Teo Han Wei , Quah ACT , Zhu Lei , Du Anyan , Hua Younan 
Published: December 2020

Abstract
In this paper, two failure analysis case studies are presented to demonstrate the importance of sample preparation procedures to successful failure analyses. Case study 1 establishes that Palladium (Pd) cannot be used as pre-FIB coating for SiO2 thickness measurement due to the spontaneously Pd silicide formation at the SiO2/Si interface. Platinum (Pt) is thus recommended, in spite of the Pt/SiO2 interface roughness, as the pre-FIB coating in this application. In the second case study, the dual-directional TEM inspection method is applied to characterize the profile of the “invisible” tungsten residue defect. The tungsten residue appears invisible in the planeview specimen due to the low mass-thickness contrast. It is then revealed in the cross-sectional TEM inspection.
High-Frequency TSV Failure Detection Method with Z Parameter
Authors: Kim Joohee , Jung Daniel H. , Cho Jonghyun , Pak Jun So , Kim Joungho , Yook Jong Min , Kim Jun Chul 
Published: December 2020

Abstract
As the TSV count increases, chip yield can be severely degraded due to failures during the TSV or die-stacking processes. This paper will present and discuss on the usage of failure masks designed to detect and differentiate failure types such as connection failure and insulator failure based on frequency-domain one point probing measurement. The failure masks are proposed on the basis of the frequency domain analysis of TSV failures with Z11 magnitudes.
Enhanced Failure Analysis on Open TSV Interconnects
Authors: Altmann F. , Schmidt C. , Beyersdorfer J. , Simon-Najasek M. , Große C. , Schrank F. , Kraft J. 
Published: December 2020

Abstract
In this paper different methods and novel tools for failure localisation and high resolution material analysis for open TSV interconnects will be discussed. The paper shows the application of enhanced methods for the localisation of sidewall shorts in open TSV structures by adapted Photoemission Microscopy (PEM), Lock-in Thermography (LIT) and Electron Beam Absorbed Imaging (EBAC). In addition, a new highly efficient target preparation technique is presented, which allows the combination of Laser and FIB milling, in order to access TSV sidewall defects. Finally the use of this technique is demonstrated in a failure analysis case study.
Case Study: Combined Dynamic Laser Stimulation and Static Emission Microscopy Techniques Applied to Scan Test Failure on Mixed Mode Device
Authors: Sienkiewicz Magdalena , Rousseille Philippe 
Published: December 2020

Abstract
This paper presents a case study on scan test reject in a mixed mode IC. It focuses on the smart use of combined mature FA techniques, such as Soft Defect Localization (SDL) and emission microscopy (EMMI), to localize a random scan test anomaly at the silicon bulk level.
STEM EDX Mappings and Tomography for Process Characterization and Physical Failure Analysis of Advanced Devices
Authors: Lepinay Kevin , Lorut Frederic , Pantel Roland , Epicier Thierry 
Published: December 2020

Abstract
In the context of the increasing complexity of materials used in semiconductor device processes, the STEM EDX technique is now used routinely. It can be used to discriminate stacked layers in advanced devices where STEM HAADF Z-contrast is not sufficient. Moreover, it allows a new use of planar preparation for layer investigation. The complexity of analyzed structures drives a need for 3D information which can also be obtained with the chemical information of the EDX analysis.
SEM-Based Nanoprobing on 40, 32 and 28 nm CMOS Devices Challenges for Semiconductor Failure Analysis
Authors: Paul Erik , Herzog Holger , Jansen Sören , Hobert Christian , Langer Eckhard 
Published: December 2020

Abstract
This paper presents an effective device-level failure analysis (FA) method which uses a high-resolution low-kV Scanning Electron Microscope (SEM) in combination with an integrated state-of-the-art nanomanipulator to locate and characterize single defects in failing CMOS devices. The presented case studies utilize several FA-techniques in combination with SEM-based nanoprobing for nanometer node technologies and demonstrate how these methods are used to investigate the root cause of IC device failures. The methodology represents a highly-efficient physical failure analysis flow for 28nm and larger technology nodes.
Failure Analysis on Lifted Ball Bond and Micro Lateral Crack Using Fractography Approach
Authors: Khong Yong Foo , Marks Michael Raj 
Published: December 2020

Abstract
This paper demonstrates the application of fractography on ductile fracture in gold wire bonding and brittle fracture in micro lateral crack of silicon chip. Different separation mode of a lifted wire ball was mapped through the study of various sizes of dimples, ductile zone and non-welded area. Multiple Focus Ion Beam (FIB) cuts were required at lateral crack area in order to expose the horizontal fracture features to determine the crack propagation direction.
A Comprehensive Approach to Lifted Bond Balls Package Failure
Authors: Nguyen Dat , Karki Sagar 
Published: December 2020

Abstract
Lifted bond balls in Integrated Circuit (IC) have numerous failure mechanisms. A simple external curve can confirm the open, and with package decapsulation, lifted balls can be readily observed. However, the exact cause can be difficult to identify. Most often, a cross section through the balls was performed, but it is far from being able to reveal the reason for lifted bond balls. A comprehensive FA approach is needed. Performing failure analysis through the back side of the die using Scanning Acoustic Microscopy (C-SAM) and Infra Red (IR) inspection helps to observe the conditions of the bond pads. Pulling the die from the mold compound can provide a pristine view of the bond ball-bond pad interface. This allows the detection of contaminants, both organic and inorganic, which cross sections cannot provide.
Advanced FIB Application—Automated, Precision Deprocessing for Failure Analysis
Authors: Wang Dandan , Feng Hua , Tan Pik Kee , Low Guorong , Chong Khiam Oh , Lam Jeffrey , Mai Zhihong 
Published: December 2020

Abstract
Focused Ion Beam is widely used in semiconductor industry for critical applications such as TEM sample preparation and circuit edit. In this paper, we introduce an automated failure analysis technique for high precision polishing at the wafer level. Using FIB, it is possible to precisely mill at a region of interest, capture images at the region of interest simultaneously and cut into the die directly to expose the exact failure without damaging other sections of the specimen.
Failure Analysis Work Flow for Electrical Shorts in Triple Stacked 3D TSV Daisy Chains
Authors: Gaudestad J. , Orozco A. , De Wolf I. , Wang T. , Webers T. , Kelley R. , Morrison T. , Madala S. 
Published: December 2020

Abstract
In this paper we show an efficient workflow that combines Magnetic Field Imaging (MFI) and Dual Beam Plasma Focused Ion Beam (DB-PFIB) for fast and efficient Fault Isolation and root cause analysis in 2.5/3D devices. The work proves MFI is the best method for Electric Fault Isolation (EFI) of short failures in 2.5/3D Through Silicon Via (TSV) triple stacked devices in a true non-destructive way by imaging the current path. To confirm the failing locations and to do Physical Failure Analysis (PFA), a DB-PFIB system was used for cross sectioning and volume analysis of the TSV structures and high resolution imaging of the identified defects. With a DB-PFIB, the fault is exposed and analyzed without any sample prep artifacts seen in mechanical polishing or laser preparation techniques and done in a considerably shorter amount of time than that required when using a traditional Gallium Focused Ion Beam (FIB).
Root Cause Analysis Techniques Using Picosecond Time Resolved LADA
Authors: Bodoh Dan , Erington Kent , Dickson Kris , Lange George , Wu Carey , Crawford Tom 
Published: December 2020

Abstract
Laser-assisted device alteration (LADA) is an established technique used to identify critical speed paths in integrated circuits. LADA can reveal the physical location of a speed path, but not the timing of the speed path. This paper describes the root cause analysis benefits of 1064nm time resolved LADA (TR-LADA) with a picosecond laser. It shows several examples of how picosecond TR-LADA has complemented the existing fault isolation toolset and has allowed for quicker resolution of design and manufacturing issues. The paper explains how TR-LADA increases the LADA localization resolution by eliminating the well interaction, provides the timing of the event detected by LADA, indicates the propagation direction of the critical signals detected by LADA, allows the analyst to infer the logic values of the critical signals, and separates multiple interactions occurring at the same site for better understanding of the critical signals.
Analysis of Two Electrical Failures Caused by Die Attach of Exposed Pad Package
Authors: Li Jinglong , Masuda Motohiko , Che Yi , Wu Miao 
Published: December 2020

Abstract
Die attach is well known in die bonding process. Its electrical character is simple. But some failures caused by die attach are not so simple. And it is not proper to analyze by a generic analysis flow. The analysis of two failures caused by die attach are presented in this paper.
New Ion Source for High Precision FIB Nanomachining and Circuit Edit
Authors: Steele Adam V. , Knuffman Brenton , McClelland Jabez J. 
Published: December 2020

Abstract
We present a review of the Low Temperature Ion Source (LoTIS): its aims, design, performance data collected to date, and focused spot size projections when integrated with a FIB. LoTIS provides a Cs+ beam that has been measured to have high brightness (&gt; 107Am-2sr-1eV-1), and low-energy spread (&lt; 0.5 eV). These source characteristics enable a prediction of subnm focused spot sizes. A FIB with the capabilities enabled by LoTIS would be well-suited to addressing FIB failure analysis tasks such as nanomachining, circuit edit, and site-specific SIMS.
Imaging Performance of aSIL Microscopy on Subsurface Imaging of SOI Chips
Authors: Uyar Aydan , Yurt Abdulkadir , Cilingiroglu T. Berkin , Goldberg Bennett B. , Ünlü M. Selim 
Published: December 2020

Abstract
The demand for high resolution has raised interest for the use of aplanatic solid immersion lenses (aSIL) for backside optical inspection and failure analysis of integrated circuits due to its high numerical aperture capability. This work investigates the performance of aSIL microscopy in imaging of fully depleted silicon on insulator (SOI) chips and explores the effect of the buried oxide (BOx) thickness on the spatial resolution and photon collection efficiency. Three different cases, namely, bulk silicon, SOI with an ultrathin BOx of 10 nm, and SOI with a standard BOx thickness of 145 nm, are studied. It is observed that there is a 15% drop in the collection efficiency for ultra-thin BOx compared to bulk silicon and up to 80% decrease in the collection efficiency and 30% increase in the spot-size for standard Box.
To Eliminate Curtain Effect of FIB TEM Samples by a Combination of Sample Dicing and Backside Milling
Authors: Luo Jian-Shing , Lee Hsiu Ting 
Published: December 2020

Abstract
Several methods are used to invert samples 180 deg in a dual beam focused ion beam (FIB) system for backside milling by a specific in-situ lift out system or stages. However, most of those methods occupied too much time on FIB systems or requires a specific in-situ lift out system. This paper provides a novel transmission electron microscopy (TEM) sample preparation method to eliminate the curtain effect completely by a combination of backside milling and sample dicing with low cost and less FIB time. The procedures of the TEM pre-thinned sample preparation method using a combination of sample dicing and backside milling are described step by step. From the analysis results, the method has applied successfully to eliminate the curtain effect of dual beam FIB TEM samples for both random and site specific addresses.
Will Tomorrow’s Failure Analysis Lab Operate More Like Today’s Fab?
Authors: Templeton Todd , Brogden Valerie 
Published: December 2020

Abstract
Efficiencies in operation are achieved largely in advanced failure analysis (FA) labs because routine steps or processes have been automated and the need for operator interaction minimized. Very few operators are required to run a fully automated, "lights out" type Fab. This paper discusses the various automation components which are available to labs as they look to streamline the FA process to support the Fab's ever increasing demand for more process data. These include iFast Automation software and automated recipes to create the thick lamella. The development of automation software and integrated accessories for FA equipment is now bringing more Fab-like activities and processes into the FA lab. As more and more automation moves into the FA lab, one should not be surprised in a few years to see very few operators sitting in front of tools with blinking green lights scattered throughout the lab.
Vacuum Assisted Ex Situ Lift Out for Manipulation of FIB Prepared Specimens
Authors: Giannuzzi Lucille A. , Hess Dustin , Clark Trevor 
Published: December 2020

Abstract
Ex situ lift out (EXLO) is performed outside of the FIB instrument on a system basically consisting of a light optical microscope, stage, and manipulator. EXLO may be used to lift out very large specimens prepared using plasma FIB instruments. This paper combines a vacuum micropipetting module with an EXLO station, making use of both suction vacuum forces and adhesion forces for the pick and place of a FIB milled free specimen onto a slotted EXpressLO grid. The geometry for manipulation to EXpressLO grids is detailed in this paper. It is observed that the vacuum assisted lift out optimizes specimen positioning for easy placement on the novel EXpressLO grid. Once on the new grid, an electron transparent specimen may be analyzed directly by S/TEM or other analytical techniques. The specimen on this grid can also be further FIB milled or processed prior to analysis.
Turning Sample Into (Re)Solution—Focused Ion Beam Shaped Solid Immersion Lenses
Authors: Scholz Philipp , Sadowski Michael , Boit Christian , Kupijai Sebastian , Henniges Marvin , Theiss Christoph , Meister Stefan , Stolarek David , Richter Harald H. , Boostandoost Mahyar 
Published: December 2020

Abstract
This work is a unique solution for enhancing optical failure analysis and optical signal transmission. Optical failure analysis remains to be a vital part of the analysis process, despite shrinking feature sizes and challenging package technologies. The presented optical signal transmission supports the development of photonic integrated circuits. The key component is a Focused Ion Beam (FIB) process which shapes optical lenses out of the sample material leading to an improvement in lateral resolution and signal transmission. Two cases are shown that demonstrate these improvements. The first case is an optical backside analysis in a spatially confined opening of a package where other Solid Immersion Lens (SIL) systems could not be applied. It offers an improvement in spatial resolution by a factor of 2, down to a FWHM of 387 nm. The second case is a novel application for FIB shaped lenses aiming at photonic integrated circuits. This lens is created out of the isolating frontside and improves the grating coupler efficiency by a factor of 4.1.
Failure Analysis of Yellow Banding on Optically Bonded Touch Screen
Authors: Gu Qing , Lewis J. , Xu Danhua 
Published: December 2020

Abstract
Yellow banding is a phenomenon occurring at an edge(s) in an electronic optical touch screen when the display module emits certain background light. Although it is commonly recognized that the discoloration turns yellowish due to display liquid crystal (LC) cell gap change, the mechanism to create the color change can be different depending on the display designs. This paper discusses an approach to investigate a particular mechanism of forming yellow banding caused by uncured edge fill UV adhesive.
Detection and Measurement of Intermetallic Thin Films Using EDX Line Scanning
Authors: Nail Carl 
Published: December 2020

Abstract
Elementally characterizing intermetallic compounds (IMCs) to identify phases has routinely required relatively expensive transmission electron microscopy (TEM) analysis. A study was done characterizing IMCs using less expensive energydispersive x-ray (EDX) spectroscopy tools to investigate it as a practical alternative to TEM. The study found that EDX line scanning can differentiate phases by tracking changes in count rate as the electron beam of a scanning electron microscope (SEM) passes from one phase to another.
3D Integrated Power—A Discrete Perspective
Authors: Kearney Ian , Brink Stephen 
Published: December 2020

Abstract
The shift in power conversion and power management applications to thick copper clip technologies and thinner silicon dies enable high-current connections (overcoming limitations of common wire bond) and enhance the heat dissipation properties of System-in-Package solutions. Powerstage innovation integrates enhanced gate drivers with two MOSFETs combining vertical current flow with a lateral power MOSFET. It provides a low on-resistance and requires an extremely low gate charge with industry-standard package outlines - a combination not previously possible with existing silicon platforms. These advancements in both silicon and 3D Multi-Chip- Module packaging complexity present multifaceted challenges to the failure analyst. The various height levels and assembly interfaces can be difficult to deprocess while maintaining all the critical evidence. Further complicating failure isolation within the system is the integration of multiple chips, which can lead to false positives. Most importantly, the discrete MOSFET all too often gets overlooked as just a simple threeterminal device leading to incorrect deductions in determining true root cause. This paper presents the discrete power MOSFET perspective amidst the competing forces of the system-to-board-level failure analysis. It underlines the requirement for diligent analysis at every step and the importance as an analyst to contest the conflicting assumptions of challenging customers. Automatic Test Equipment (ATE) data-logs reported elevated power MOSFET leakage. Initial assumptions believed a MOSFET silicon process issue existed. Through methodical anamnesis and systematic analysis, the true failure was correctly isolated and the power MOSFET vindicated. The authors emphasize the importance of investigating all available evidence, from a macro to micro 3D package perspective, to achieve the bona fide path forward and true root cause.
Magnetic Current Imaging Power Short Localization
Authors: Gaudestad J. , Rusli F. , Orozco A. , Pun M.C. 
Published: December 2020

Abstract
A Flip Chip sample failed short between power and ground. The reference unit had 418Ω and the failed unit with the short had 16.4Ω. Multiple fault isolation techniques were used in an attempt to find the failure with thermal imaging and Magnetic Current Imaging being the only techniques capable of localizing the defect. To physically verify the defect location, the die was detached from the substrate and a die cracked was seen using a visible optical microscope.
Logic LIVA Fault Isolation in Synthesized Logic
Authors: Pifer T. , Eiles T.M. 
Published: December 2020

Abstract
Infrared emission microscopy (IREM) is often the simplest and fastest fault isolation technique. In contrast to emission microscopy, laser-based techniques, such as thermally induced voltage alteration and light induced voltage alteration (LIVA), are not as dependent on leakage or the specific voltage of the defect to provide localization but are able to observe variations in the defective current drawn by the defect. This paper describes a method of applying LIVA to synthesized logic connected to large-scale power plane by controlling the amount of decoupling capacitance on the power supply. This has proven to provide very useful fault isolation beyond what is possible with emission microscopy. The logic LIVA result allowed the determination of locations of the two emissions seen in the IREM image as well as the word-line driver. This result provides a complete picture of the failure exact word-line driver-simplified physical failure analysis.
Strategies to Address Low DPPM Failure Mechanisms on Automotive Grade Wi-Fi Radio Frequency Devices
Authors: Wang Kai , Lone Sadia , Thomas Colin , Weaver Rhys 
Published: December 2020

Abstract
System suppliers in the automotive market have an expectation that their IC suppliers provide products with low defective parts per million (DPPM) and have methodologies in place to drive towards 0ppm (Zero Parts Per Million). IC suppliers to the automotive market have supply chains and test methodologies in place to achieve such low DPPMs, but the systems suppliers will still require root cause analysis on every failure. The IC supplier is expected to demonstrate a containment, corrective action and continuous improvement in a very tight time frame. This additional demand of automotive customers poses a challenge to the quality of IC devices and the concept of cross departmental failure analysis. In this paper, we look at a complex Wi-Fi design with multiple IEEE specific radios, and how to address the few parts that escape the rigorous testing by IC supplier to improve the quality for the automotive IC.