Electrical Characteristics of Atomic Layer Deposited Y-Silicate Dielectrics
Authors: Ohta Atsuhiro , Song Jinhan , Hoshii Takuya , Wakabayashi Hitoshi , Tsutsui Kazuo , Kakushima Kuniyuki 
Published: December 2020

Introduction

High k dielectric materials are widely used for scaling the equivalent oxide thickness (EOT) of various very large integrated devices. Rare-earth silicates maintain their amorphous structure within the temperature range of typical semiconductor processes
[1]
, making them suitable for high-k dielectrics. Rare-earth silicates are easily formed by thermal processes, but their formation consumes Si at the interface. The consumption of Si at the interface is disadvantageous for micro-structured devices such as three-dimensional structures. One of the methods to suppress Si consumption at the interface is to supply Si atoms in the deposited film to form silicates without reacting with the channel material. In this work, we focused on the formation of yttrium silicate (Y-silicate) dielectrics, a typical rare-earth silicate
[2]
, so that the formation process can be easily extended to other rare-earth silicates, including La-silicate
[3]
.Y-silicate films were formed by cyclic deposition of Y2O3 and SiO2 based on atomic-layer deposition (ALD).

Experiments

Firstly, Y2O3/SiO2 multi-stacked layer（call it stacked-layer from now on）with a thickness of 16 nm without annealing process was analyzed by x-ray photoelectron spectroscopy (XPS) to confirm forming of Y-silicates. Next, MOS capacitor was fabricated by stacked-layer with a thickness 5 nm were deposited on the n-Si substrates by ALD at 200oC. Fig. 1 shows the schematic structure of the fabricated MOS capacitors. The cycles are determined to have the Y/Si atomic ratio of the stacked-layer to be 1:1. Then, W gate electrodes and TiN layer are deposited by RF sputtering. Al contact layers were deposited on the backside of the samples by thermal evaporation. The capacitors were then annealed at 800oC in forming gas (N2: H2=97%:3%) ambient for 30 min.
[4]
Finally, the metal-insulator-metal (MIM) capacitor, 10-nm-thick stacked-layer were also fabricated aim to no interfacial layer.

Result

Fig.2 shows the results of XPS analysis. The shift in the binding energy indicates that most of the Y atoms are in the form of silicate. Suggesting that the stacked layer is readily transformed in the form of Y-silicate during ALD process. The bandgap of the stacked-layer was estimated to be 6.4 eV. Fig. 3 shows the XPS depth profile of the stacked-layer obtained by Ar etching. The atomic ratio of Y, Si and O remained constant throughout the film at almost 2:2:7 until the Si substrate appeared. From the results, it is confirmed that a uniform Y2Si2O7 layer can be obtained by the multi-stacking of Y2O3/SiO2 ALD process. Fig. 4 shows the C-V characteristics of the n-Si capacitors with a 5-nm-thick Y-silicate layer. After annealing, the capacity of Y-silicate layer capacitor doesn’t increase. This result indicating little reaction at Y-silicate/Si interface. Finally, from the C-V and J-V measurements of MIM capacitor, A k-value of the stacked-layer is calculated to be 8.5, break down field of MIM capacitor is 6.6MV/cm. The k-value of the Y-silicate layer is also reasonable considering the k-values of SiO2 of 3.9 and Y2O3 of 13.
[5]

Conclusion

Low temperature formation of Y-silicate layer has been confirmed by cyclic deposition of stacked-layer of Y2O3 and SiO2 ALD layers. The target composition of Y2Si2O7 and the formation of Y-O-Si bonds have been confirmed by XPS. Bandgap, breakdown field and k-value of Y-silicate dielectrics were determined to be 6.4eV, 6.6MV/cm, 8.5 respectively.

References

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[4]. T. Kawanago, Y. Lee, K. Kakushima, P. Ahmet, K. Tsutsui, A. Nishiyama, N. Sugii, K. Natori, T. Hattori, H. Iwai, IEEE Trans. on Electron Dev. 59, 269 (2012).
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Figure 1