bluuebunny/crossref_metadata_2025_split huggingface dataset:
PERSPEKTIF ANTIPERUNDUNGAN DALAM LAGU “SIKAP DUNIAWI” ISYANA SARASVATI Antibullying Perspective in The Song "Sikap Duniawi" by Isyana Sarasvati
Authors: Suciartini Ni Nyoman Ayu 
Published: December 2020

AbstrakDalam penciptaannya, sebuah lirik lagu berasal atau terbentuk dari bahasa yang dihasilkan sebagai akibat komunikasi antara pencipta lagu dengan masyarakat penikmat lagu. Rumusan masalah dalam penelitian ini adalah bagaimana perspektif antiperundungan atau anti-bullying dalam lirik lagu “Sikap Duniawi” Isyana Sarasvati. Tujuan penelitian ini adalah untuk mendeskripsikan makna perspektif antiperundungan atau anti-bullying dalam lirik lagu “Sikap Duniawi” Isyana Sarasvati. Metode yang digunakan dalam penelitian ini adalah metode penelitian deksriptif kualitatif dengan perspektif semiotika model Roland Barthes. Hasil penelitian ini mengungkapkan bahwa di setiap lirik, baik pilihan kata maupun pilihan kalimat yang digunakan pengarang dalam lagu “Sikap Duniawi” ini kaya akan motivasi dan inspirasi untuk bangkit dari cemooh, dari hinaan, dan rasa rendah diri akibat perilaku perundungan atau bullying. Kata kunci: antiperundungan, lagu sastra, Sikap Duniawi AbstractIn its creation, a song’s lyrics originate or are formed from the language produced as a result of communication between the songwriter and the song-loving community. The formulation of the problem in this research is how the perspective of anti-harassment or antibullying in the lyrics of the song “Sikap Duniawi” Isyana Sarasvati. The purpose of this study is to describe the meaning of the perspective of anti-harassment or antibullying in the lyrics of the song “Sikap Duniawi” Isyana Sarasvati. The method used in this research is descriptive qualitative research method with the semiotic perspective of the Roland Barthes model. The results of this study reveal that in every lyric, the choice of words and choice of sentences used by the author in the song “Sikap Duniawi” is rich in motivation and inspiration to rise from ridicule, humiliation, and low self-esteem due to harassment or bullying behavior.Keywords: bullying, literary songs, Sikap Duniawi
PEMAHAMAN FONETIK SISWA SEKOLAH DASAR TERHADAP TEKNIK MEMBACA BERSUARA
Authors: Ulfah Tsaqifa Taqiyya , Nugraheni Aninditya Sri 
Published: December 2020

Penelitian ini betujuan untuk mendeskripsikan pemahaman fonetik yang merujuk pada pelafalan bunyi bahasa, intonasi, dan pengaruh dialek bahasa daerah terhadap pelafalan siswa kelas 1-6 SD melalui teknik membaca bersuara. Masalah penelitian adalah terdapat ketidaktepatan pelafalan bunyi bahasa dan intonasi saat membaca pada siswa sekolah dasar khususnya pada siswa kelas awal. Untuk memecahkan masalah dan tujuan penelitian digunakan metode kualitatif melalui observasi dan wawancara. Hasil penelitian membuktikan bahwa (1) pelafalan bunyi vokoid, kontoid dan semi vokoid pada siswa kelas 1-6 SD belum sempurna. (2) Terdapat ketidaktepatan intonasi saat membaca. Ketidaktepatan dalam berintonasi dialami oleh siswa kelas 1-2 SD. Siswa kelas 1-2 SD belum memahami intonasi sehingga siswa cenderung membaca dengan nada datar. (3) Pemahaman intonasi pada kelas 3-6 SD sudah mulai berkembang, walaupun intonasi yang dihasilkan belum sepenuhnya sempurna.(4)Tedapat pengaruh dialek bahasa daerah terhadap pelafalan bunyi bahasa dan intonasi pada siswa kelas 1 SD. Berdasarkan hasil penelitian, dapat disimpulkan bahwa pemahaman fonetik siswa sekolah dasar belum sempurna layaknya orang dewasa.
MODEL KESANTUNAN BERBAHASA SISWA TIONGHOA DI SEKOLAH PAH TSUNG JAKARTA: KAJIAN ETNOGRAFI KOMUNIKASI
Authors: Saputro Muhammad Yusuf , Tarmini Wini , Hikmat Ade 
Published: December 2020

This research is aimed to know and describe further detail about how the politeness in the language of Chinese students at Pah Tsung School Jakarta, by looking at the forms of politeness used by Chinese students in speaking. The research approach used was a qualitative approach with an ethnographic study of communication methods. The researcher collected research data using literature/documentation methods, records, interviews, direct observation, and FGD with language and language politeness experts. Then, the data were analyzed using the content analysis method equipped with analysis tables. The data of this research are in the form of students’ and teachers’ speeches both written and oral. According to that, it was discovered that ten forms of politenesses of Leech (2014) were implemented, namely generosity maxim of 5.3%, tact maxim of 12.4%, approbation maxim of 6.2%, modesty maxim of 0.9%, obligation S to O maxim of 18.6%, obligation O to S maxim of 8,8%, agreement maxim of 19,5%, opinion reticence maxim of 20,4%, sympathy maxim of 5,3%, and feeling reticence maxim of 2,7%. Based on these results, the forms of Chinese students’ politeness language at Pah Tsung School are dominated by the opinion reticence maxim, the agreement maxim, and the obligation S to O maxim. The lingual forms in speaking also have unique characteristics in each maxim.Penelitian ini bertujuan untuk mengetahui dan mendeskripsikan secara mendalam model kesantunan berbahasa siswa Tionghoa di Sekolah Pah Tsung Jakarta dengan melihat wujud-wujud kesantunan berbahasa yang dipergunakan siswa Tionghoa dalam bertutur. Pendekatan penelitian yang digunakan yakni pendekatan kualitatif dengan metode etnografi komunikasi. Peneliti mengumpulkan data penelitian dengan metode pustaka/dokumentasi, rekam, wawancara, observasi langsung, dan FGD dengan pakar bahasa dan kesantunan berbahasa. Pengolahan data menggunakan metode analisis isi yang dilengkapi dengan tabel analisis. Data penelitian ini berupa tuturan siswa dan guru, baik secara lisan maupun tulis. Pada tuturan tersebut, diperoleh hasil sebagai berikut: penerapan wujud dari sepuluh kesantunan Leech (2014), yaitu generosity maxim 5,3%, tact maxim 12,4%, approbation maxim 6,2%, modesty maxim 0,9%, obligation S to O maxim 18,6%, obligation O to S maxim 8,8%, agreement maxim 19,5%, opinion reticence maxim 20,4%, sympathy maxim 5,3%, dan feeling reticence maxim 2,7%. Berdasarkan hasil tersebut model kesantunan berbahasa siswa Tionghoa di Sekolah Pah Tsung didominasi oleh opinion reticence maxim, agreement maxim, dan obligation S to O maxim. Penanda lingual yang digunakan dalam petuturan pun memiliki karakteristik yang khas pada setiap maksimnya.
Una escuela para el odio: los demonios familiares de la Historia de España
Authors: Bermejo Barrera José Carlos  
Published: December 2020

Resumen
Las historias nacionales son relatos en torno a un protagonista, el pueblo, que permanece vivo a lo largo de los siglos. La historia no se puede escribir sin documentos ni hechos, pero los relatos históricos se estructuran mediante unos meta-relatos, que dan sentido y significado al proceso histórico global. A partir del siglo XV y hasta el siglo XX, las Historias de España se construyeron como relatos acerca de una identidad escindida. Ello se debió al omnipresente miedo a las personas con identidades ocultas: marranos, espías protestantes, traidores y quinta columnistas y luego masones o liberales, nacionalistas y comunistas. Todo ello creó un discurso interminable y generador de odio sobre la traición y los traidores ocultos.
Palabras clave
Historia de España, relato, odio, traición

Abstract
National histories are stories about a protagonist, the people, who remain alive throughout the centuries. History cannot be written without documents or facts, but historical accounts are structured through meta-stories, which make sense of and give meaning to the global historical process. From the fifteenth century and until the twentieth century, the History of Spain books were constructed as narratives about a split identity. This was due to the omnipresent fear of people with hidden identities: “marranos”, protestant spies, traitors and fifth columnists and then freemasons or liberals, nationalists and communists. All this created an endless discourse generator of hatred about treason and hidden traitors.
Key words
Historia de España, narrative, hatred, treason.
Reactualización, empatía e historia
Authors: Bermejo José Carlos 
Published: December 2020

La idea de reactualización es un concepto básico de la filosofía de la historia a partir de R. G. Collingwood. Esta idea es inseparable de los conceptos de empatía, mente y valores y sentimientos morales. Este es un estudio de esos conceptos desde los puntos de vista filosófico, psicológico e histórico. Mediante cuatro casos: el dar muerte, la visión médica del holocausto y, la experiencia de los manicomios y los sentimientos de los enfermos mentales se muestra el valor y los límites de la Idea de Reactualización.
Palabras clave
Reactualización, empatía, mente, sentimientos y valores morales, dar muerte, holocausto, manicomios.
A STUDY ON RELATION BETWEEN STUDY HABITS AND PERSONALITY TRAITS OF HIGHER SECONDARY STUDENTS
Authors: Sheebha Nuvetha 
Published: December 2020

Acquiring five years of general education, at the higher secondary level, the students are focused to a diversification of subjects. Hence, they automatically develop into students following certain new study habits, which suit their change in the academic field. Many students undergo private tuition to improve their performance, but this improvement cannot be achieved overnight. What they need is improvement in studies by various ways and means. This can be achieved only by means of having proper and regular study habits.
Table of Contents and Foreword
Authors: Pavanello Marcelo Antonio , Kastensmidt Fernanda 
Published: December 2020

This year is specially challenging to JICS in its path to increase visibility and attraction of high quality papers. As decided last year, instead of publishing two issues, as is being done since the beginning, we will move to a publication of three issues in the year. Also the papers included in each issue will not be separated by their main fields, associated with the two main conferences in the field held in Brazil, the Symposium on Microelectronics Technology and Devices – SBMicro – and the Symposium on Integrated Circuits and Systems Design – SBCCI. In this issue one can find some of the papers that have been selected from those presented at SBMicro2014 (29th Symposium on Microelectronics Technology and Devices), which has been held in Aracaju, Brazil, in 2014. Among the contributions presented at the Symposium, only a few best rated were selected by the JICS Editorial Board and have been invited to submit an extended version to the Journal. These extended papers have passed through the usual reviewing process before acceptance. In addition to the best papers presented at the conference, spontaneous submissions passed through the usual reviewing process and have been accepted as regular papers. We would like to thank the authors for their effort in preparing these high quality papers, as well as the reviewers for their valuable contribution on paper evaluation and selection, which guarantees the scientific level of this issue. We sincerely hope that JICS readers will enjoy these contributions.Marcelo Antonio Pavanello - JICS Editor-in-chief Fernanda Kastensmidt - JICS Co-Editor
Oxygen Plasma Surface Treatment onto ITO Surface for OLEDs Based on Europium Complex
Authors: Santos Gerson , Cavallari Marco R. , Fonseca Fernando J. , Pereira Luiz 
Published: December 2020

In this work, Organic Light-Emitting Diodes (OLEDs) based on Europium (III) complex were studied, especially those with an oxygen plasma surface treatment onto indium tin oxide (ITO) transparent electrode. An OLED with the same thin-film structure but with untreated ITO was fabricated for comparison purposes. Current density-voltage characteristics for treated devices demonstrated an increase from 0.4 to 3.3 mA/cm² and a decrease of the turn-on voltage from 28 to 22 V. Additionally, improved hole injection through the transparent electrode impacted on optical response, as luminous efficiency increased from 26 to 44 mcd/A with the advantage of no significant disturb on the europium typical electroluminescence emission spectrum. Emission peak was observed at a wavelength of approximately 614 nm, which is defined by the transition associated with spectroscopic terms (5D0→7D2) and CIE chromaticity coordinates of (0.50;0.36).
Table of Contents and Foreword
Authors: Pavanello Marcelo A. , Kastensmidt Fernanda 
Published: December 2020

In this issue of JICS some of the papers on this issue have been selected from the presented at SBCCI2014 (27th Symposium on Integrated Circuits and Systems Design), which has been held in Aracaju, Brazil, in 2014. Among the contributions presented at these conferences, only a few best rated were selected by the JICS Editorial Board and have been invited to submit an extended version to the Journal. These extended papers have passed through the usual reviewing process before acceptance. In addition to the best papers presented at the mentioned conference, spontaneous submissions passed through the usual reviewing process and have been accepted as regular papers. Also accepted spontaneous submissions are included in this issue as well. We would like to thank the authors for their effort in preparing these high quality papers, as well as the reviewers for their valuable contribution on paper evaluation and selection, which guarantees the scientific level of this issue. We sincerely hope that JICS readers will enjoy these contributions.Marcelo Antonio Pavanello - JICS Editor-in-chiefFernanda Kastensmidt - JICS Co-Editor
Gate-Oxide Voltage Overstress Treatment in Charge Pump Circuits for Standard CMOS Technologies
Authors: Cruz Carlos Augusto de Moraes , Dos Reis Filho Carlos Alberto , Monteiro Davies William de Lima , Bezerra Thiago Brito , Da Silva Luciano Lourenço Furtado 
Published: December 2020

Charge pump circuits operating at voltage levels above that of the power supply usually suffer from gate-oxide voltage overstress. Such reliability problem has become a concern especially as the gate-oxide thickness is scaled down. Devising charge pump circuits that avoid such a problem is far simpler for CMOS triple-well technologies than for standard technologies, nevertheless fabrication costs are higher. Two approaches are usually applied to eliminate gate-oxide overstress in charge pumps designed for standard CMOS technologies, the first is multiple phase control, and the second is dual phase control with doubled voltage swing. The latter has been shown to produce more power efficient circuits, however solutions using such approach still present gate-oxide overstress in some transistors. In this work, it is shown that a slight change in some of the circuit connections is able to ultimately overcome the problem. Moreover, experimental results have shown that such circuit topology can reach a voltage multiplication efficiency of about 98 %.
A 2-Transistor Sub-1V Low Power Temperature Compensated CMOS Voltage Reference: Design and Application
Authors: Olmos Alfredo , Ferreira Fabricio , Cortes Fernando Paixão , Chavez Fernando , Lubaszewski Marcelo Soares 
Published: December 2020

This paper presents the design and application of a CMOS sub-1V voltage reference using a 2-transistor Self-Cascode MOSFET (SCM) structure able to get low power consumption, temperature compensation, and small area. An efficient design procedure applied to this simple topology relying on NMOS transistors with different threshold voltages allows attaining large immunity against bias current and supply voltage variations. The two transistors can operate in weak, moderate, or strong inversion making the design flexible in terms of area and power consumption. Implemented in a > 0.18mm standard CMOS technology, the circuit provides a 400mV voltage reference with a variation of ±0.18% from -20°C to 75°C (or less than 15ppm/°C), operates from 3.6V down to 800mV while biased with a 5nA resistor-less PTAT current source that varies ±30% over PVT, and consumes less than 20nA with an area of 0.01mm2. The same concept was used to create a temperature compensated voltage drop with regard to a monitored power supply voltage but using a 2-PMOS SCM structure with transistors of different threshold voltages. These two circuits were adopted as part of a Power Management (PM) system for RFID tag applications. The PM includes a LDO voltage regulator and a low voltage detector that require both the voltage reference and the low voltage monitor. The LDO regulated output voltage and the trip-point of the voltage detector vary +/-5.5% and +/-3.3%, respectively, over temperature, without trimming.
Exploring Optimized Hadamard Methods to Design Energy-Efficient SATD Architectures
Authors: Cancellier Luiz Henrique , Brascher André Beims , Seidel Ismael , Brascher André Beims , Güntzel José Luis , Agostini Luciano 
Published: December 2020

State-of-the-art video coding tools are submitted to severe performance and energy consumption requirements resulting from high complexity of video standards and from limited energy budgets of portable mobile devices. While providing most of the compression gains, inter frame and intra frame prediction techniques are the most demanding steps, since they compare a huge number of blocks. In such a process, the similarity metric employed affects both the quality of compression and the calculation effort. In this paper we propose the use of Hadamardbased Sum of Absolute Transformed Differences (SATD), in replacement of the traditionally used Sum of Absolute Differences (SAD), as a means of improving the efficiency of video coding. To allow that we explore two Hadamard Transform methods to design efficient SATD architectures, one using the Fast Hadamard Transform (FHT) butterfly and another one using the so-called Transform-Exempted (TE) SATD algorithm. Those methods were combined with architectural decisions (full parallelism, full parallelism with pipelining or multi-cycling) to build a total of six Hadamard-based SATD architectures that were synthesized for a commercial 45nm standard cell library for two operating frequencies. The architectures were simulated with pixel block data to obtain realistic dynamic power and energy estimates. The TE-SATD architectures achieved the lowest energy results: down to 13.13 pJ/SATD in the case of parallel architecture with pipeline. However, considering also the area results when evaluating energy, the best results are given by both methods using multi-cycling (transpose buffer): nearly 20.75 pJ/SATD with up to 63.54% smaller area compared with fully parallel architectures.
Metadata based padring and pad multiplexing generation for microcontroller design
Authors: Morita Augusto Ken , Takiguti Rubens , Van Noije Wilhelmus A. M. 
Published: December 2020

Defining padring and its pad interconnections is one of the most time consuming steps of a microcontroller SoC design. Also, multiple device features plus testability in limited pinout packages entails more functions shared per pin. As such, the number of padring connections and complexity exponentially grows at each new design. This paper describes a methodology to configure pad connections and select correct pad cells. The methodology works out technology and function definitions for each pin using new and previous designs data stored in a metadata database in order to generate the padring RTL code for the SoC. This methodology was proven with Freescale microcontrollers, among them to check the padring connection of the commercial microcontroller MC9S08MP16 [1], and was used to implement both MC9S08QB8 [2] and MC9S08SC4 [3] microcontrollers, which resulted in reduced design time in order of 10 folds, along with high quality generated RTLs.
Efficient IR Drop Analysis and Alleviation Methodologies Using Dual Threshold Voltages with Gate Resizing Techniques
Authors: Cheng Ching-Hwa 
Published: December 2020

IR drop impacts circuit delay time and reliability. The IR drop comes from unexpected peak current (Ipeak) consumption. This paper proposes an efficient methodology with an in-house EDA tool named IPR to analyze and reduce the Ipeak. IPR adopts dual threshold voltages (Vth) and gate resizing technique; it also lowers the short, dynamic, and static leakage current consumption without degrading the system performance. IPR consists of two parts: Ipeak analysis and Ipeak alleviation processes. Nonlinear static/dynamic timing analysis techniques, in cooperation with dual Vth cell library, provides two kinds of accurate Ipeak calculation methods used in IPR. Using the incremental timing analysis, the Ipeak processing time can be accelerated. Demonstration of the ISCAS89 benchmark circuits shows that IPR can reduce Ipeak by 39%, power consumption by 14%, and delay time by 19%. In addition, it provides 334 times faster computation with 2% and 10% estimation errors of the Ipeak and power in gate-level, respectively, as compared to circuit level simulation results.
Direct Observation of Crystal Facet Transformation During Gold-Tin Alloy Electroplating
Authors: Chiang Zhiwei 
Published: December 2020

Gold-Tin alloys are commonly used as solder materials in semiconductor industries. In this work, Au-Sn alloys have been electroplated with different bath conditions. For the first time, Au-Sn alloy single crystals have been observed. There are two kinds of single crystals were grown with the compositions of Au4Sn and Au2Sn, different from literature-stated Au5Sn and AuSn. The effects of bath composition and plating factors on crsytal facet development of Au-Sn deposits have been investigated. SEM/EDX analysis showed that only Au4Sn and Au2Sn phases are single crystals among all plated deposits. The growth of either Au4Sn or Au2Sn phases showed preferred orientation with plating conditions. We report on quantitative SEM/EDX characterizations used to study the facet transformation behavior of Au-Sn alloy at the nanometer scale. We have obtained direct evidence that the single crystals and crystal facet transformation of Au4Sn and Au2Sn does exist in Au-Sn alloy, and high Sn content enhanced the crystal growth through a spiral-like growth mechanism.
Table of Contents and Foreword
Authors: Pavanello Marcelo Antonio , Kastensmidt Fernanda 
Published: December 2020

We are pleased to publish the 2016 issues of JICS, which represents the second year in the path to increase visibility and attraction of high quality papers, by publishing three issues instead of two. In this issue one can find some of the papers that have been selected from those presented at SBMicro2015 (30th Symposium on Microelectronics Technology and Devices) and SBCCI2015 SBCCI2014 (28th Symposium on Integrated Circuits and Systems Design), which have been held in Salvador, Brazil, in 2015. Among the contributions presented at both Symposia, only a few best rated were selected by the JICS Editorial Board and have been invited to submit an extended version to the Journal. These extended papers have passed through the usual reviewing process before acceptance. In addition to the best papers presented at these conference, spontaneous submissions passed through the usual reviewing process and have been accepted as regular papers. We would like to thank the authors for their effort in preparing these high quality papers, as well as the reviewers for their valuable contribution on paper evaluation and selection, which guarantees the scientific level of this issue. We sincerely hope that JICS readers will enjoy these contributions.Marcelo Antonio Pavanello - JICS Editor-in-chief Fernanda Kastensmidt - JICS Co-Editor