bluuebunny/crossref_metadata_2025 huggingface dataset:
OBIC Measurements on Avalanche Diodes in 4H-SiC for the Determination of Impact Ionization Coefficients
Authors: Nguyen D.M. , Raynaud Christophe , Lazar Mihai , Pâques Gontran , Scharnholz Sigo , Dheilly Nicolas , Tournier Dominique , Planson Dominique
Published: May 2012

Optical Beam Induced Current (OBIC) measurements have been performed on 4H-SiC avalanche diodes with very thin and highly doped avalanche region. The light source used in this study is an Ar-laser with a wavelength of 351 nm which results in a mixed carrier injection. From these measurements, impact ionization coefficients for 4H-SiC have been extracted in the electric field range from 3 to 4.8 MV/cm. In combination with ionization coefficients in our previous paper extracted from diodes with lowly doped avalanche region, we propose a set of parameters of impact ionization coefficients for 4H-SiC, applicable to a wide electric field range.
Terahertz Electroluminescence of 6H-SiC Natural SiC Superlattice in Bloch Oscillations Regime
Authors: Sankin Vladimir Ilich , Andrianov Alexander V. , Petrov Alexey G. , Shkrebiy P.P. , Zachar'in A.O.
Published: May 2012

We report on efficient terahertz emission in the region of 1.5-2 THz from high electric field biased 6H-SiC structures with a natural superlattice at liquid helium temperatures. The shape of the emission spectrum, the linear dependence of its maximum on the bias and the characteristic field strength required to achieve the emission allow the emission to be attributed to steady-state Bloch oscillations of electrons in the SiC natural superlattice.
Theoretical Study of Thermoelectric Properties of SiC Nanowires
Authors: Choi J.H. , Pala M. , Latu-Romain L. , Bano Edwige
Published: May 2012

We present, for the first time, simulations of thermoelectric properties of silicon carbide (SiC) nanowires as a function of the wire cross section at high temperature (500K), based on non-equilibrium classical molecular dynamics simulations for the lattice thermal transport and non-equilibrium green's function for the electrical transport. Our calculations show that figure of merit (ZT) was increasing with decreasing cross section area: ZT of SiC nanowire at 2x2 nm2 has maximum value in the range of 0.65 - 0.89 at 500K, which is 7 - 8 times larger than maximum ZT of SiC thin film value (0.125 at 973 K). These results show that SiC may be a promising material for thermoelectric applications operating at high temperature.
GaAs Nanowires: A New Place to Explore Polytype Physics
Authors: Cheiwchanchamnangij Tawainan , Birkel Thomas , Lambrecht Walter R.L. , Efros Al.L.
Published: May 2012

Recently, polytypism has been observed in nanowires in materials, for which normally only one crystal structure is stable. For example, GaAs, nanowires can have wurtzite or mixed zincblende/wurtzite. Here we provide band structure parameters for wurzite and 4H GaAs and use them for modeling the nanowire electronic states. The band gap, crystal field splitting, and its strain dependence, as well as the effective mass parameters are calculated using the quasiparticle self-consistent GW method. The nanowire electronic states are obtained in the envelope function approximation within a simplified cylindrical model. The crystal field splitting of the wurtzite GaAs valence band is found to be 180 meV while in 4H-GaAs it is less than half 69 meV, suggesting a downward bowing as function of hexagonality. The conduction band minimum at Γ changes symmetry character under strain. We discuss the consequences for nanowires and determine the conditions under which a polarization reversal of photoluminescence can occur from mostly perpendicular to parallel to the wire.
Surface Phase Diagram of 4H-SiC {0001} Step-Terrace Structures during Si-Vapor Etching in a TaC Crucible
Authors: Ushio Shoji , Karaki Tatsuya , Hagiwara Kenta , Ohtani Noboru , Kaneko Tadaaki
Published: May 2012

Step-terrace structures were observed at on-axis/4o off 4H-SiC {0001} surfaces after Si-vapor etching which we have been supposed as an original technique to planarize and etch the SiC surfaces by utilizing a TaC crucible in temperature ranged from 1600 to 2200 oC. The structures obtained after the Si-vapor etching obviously indicated temperature dependence. There were two types of step-terrace structures in terms of the step height and the shape of the step edges at on-axis surfaces. Step bunched surfaces consisting of full unit cell height (= 1.0 nm) steps with {1-10n} facets at the step edges were observed at 4H-SiC (0001) in lower temperatures below 2000 oC, while smooth isotropic surfaces with half unit cell height (= 0.5 nm) steps and without any stable facets at the step edges were observed at 4H-SiC (0001) in higher temperatures above 2000 oC and in all temperature conditions (1600 - 2200 oC) at 4H-SiC (000-1). Similar tendency was also confirmed at 4o off 4H-SiC {0001} surfaces. From the comparison with 6H-SiC, macro step bunching (~10 nm height) was revealed to be a unique phenomenon at 4H-SiC (0001) surface in the etching.
Room Temperature Physical Characterization of Implanted 4H- and 6H-SiC
Authors: Zekentes Konstantinos , Tsagaraki Katerina , Androulidaki Maria , Kayambaki Maria , Stavrinidis Antonis , Peyre Hervé , Camassel Jean
Published: May 2012

The purpose of the present study is to determine the appropriate physical characterization methods for evaluating material quality changes during the fabrication steps of a typical 4H-SiC Static Induction Transistors (SITs). The most important fabrication step in terms of material quality is the gate implantation and post-implantation annealing. For the purposes of the initial investigation, separate “witness” samples from the processed sample have been used for evaluating implantation and post-implantation annealing. Secondary Ion Mass Spectroscopy (SIMS), optical transmission, room-temperature photoluminescence (RTPL), High Resolution X-Ray diffraction (HRXRD) and C-V measurements with Hg-probe and electrochemical (ECV) cells have been investigated in the frame of the present study. HRXRD and ECV have been proved particularly suitable for characterizing the implanted layers.
Electronic and Structural Properties of Turbostratic Epitaxial Graphene on the 6H-SiC (000-1) Surface
Authors: Jayasekera Thushari , Kim K.W. , Nardelli M. Buongiorno
Published: May 2012

We propose an atomistic model to study the interface properties of mis-oriented (turbostratic) epitaxial graphene on SiC (000-1) surface. Using calculations from first principles, we compare the energetics, and structural/electronic properties of AB and turbostratic stacking sequences within a model based on the Si adatom surface reconstruction. Our calculations show that the systems with AB and turbostratic sequences are very close in energy, demonstrating the possibility of the observation of Moire patterns in epitaxial graphene on the C-face of SiC. The two-dimensional electron gas behavior is preserved in the epitaxial turbostratic graphene systems. However, there are deviations from the ideal turbostratic epitaxial graphene.
Control of Epitaxial Graphene Thickness on 4H-SiC(0001) and Buffer Layer Removal through Hydrogen Intercalation
Authors: Hassan Jawad , Virojanadara Chariya , Meyer Axel , Ivanov Ivan G. , Flege Jan I. , Watcharinyanon Somsakul , Falta Jens , Johansson Leif I. , Janzén Erik
Published: May 2012

We report graphene thickness, uniformity and surface morphology dependence on the growth temperature and local variations in the off-cut of Si-face 4H-SiC on-axis substrates. The transformation of the buffer layer through hydrogen intercalation and the subsequent influence on the charge carrier mobility are also studied. A hot-wall CVD reactor was used for in-situ etching, graphene growth in vacuum and the hydrogen intercalation process. The number of graphene layers is found to be dependent on the growth temperature while the surface morphology also depends on the local off-cut in the substrate and results in a non-homogeneous surface. Additionally, the influence of dislocations on surface morphology and graphene thickness uniformity is also presented.
Large Area Quasi-Free Standing Monolayer Graphene on 3C-SiC(111)
Authors: Starke Ulrich , Coletti Camilla , Emtsev Konstantin , Zakharov Alexei A. , Ouisse Thierry , Chaussende Didier
Published: May 2012

Large scale, homogeneous quasi-free standing monolayer graphene is obtained on a (111) oriented cubic SiC bulk crystal. The free standing monolayer was prepared on the 3C-SiC(111) surface by hydrogen intercalation of a -reconstructed carbon monolayer, so-called zerolayer graphene, which had been grown in Ar atmosphere. The regular morphology of the surface, the complete chemical and structural decoupling of the graphene layer from the SiC substrate as well as the development of sharp monolayer p-bands are demonstrated. On the resulting sample, homogeneous graphene monolayer domains extend over areas of hundreds of square-micrometers.
CVD Growth of Graphene on 2’’ 3C-SiC/Si Templates: Influence of Substrate Orientation and Wafer Homogeneity
Authors: Portail Marc , Michon Adrien , Vézian Stephane , Lefebvre Denis , Chenot Sébastien , Ouerghi Abdelkarim , Zielinski Marcin , Chassagne Thierry , Cordier Yvon
Published: May 2012

Structural and electrical properties of graphene elaborated on 3C-SiC(111)/Si and 3C-SiC(100)/Si templates, using propane-argon gas mixtures under CVD environment, are presented. On 3C-SiC(111), the graphitic phase is clearly attributable to graphene and presents good electrical conductivity at the macroscopic scale. The opposite case is observed on 3C-SiC(100), for which the graphitic phase develops more rapidly but with a high degree of disorientation. The graphitization, which can be coupled with 3C-SiC growth stage, is efficient over the whole surface of 2’’ wafer and allows to elaborate, in a single process, Graphene on Silicon wafers.
Electrical Characterization of the Graphene-SiC Heterojunction
Authors: Anderson Travis J. , Hobart Karl D. , Nyakiti Luke O. , Wheeler Virginia D. , Myers-Ward Rachael L. , Caldwell Joshua D. , Bezares Francisco J. , Gaskill D. Kurt , Eddy Charles R. , Kub Francis J. , Jernigan Glenn G. , Tadjer M.J. , Imhoff Eugene A.
Published: May 2012

Graphene, a 2D material, has motivated significant research in the study of its in-plane charge carrier transport in order to understand and exploit its unique physical and electrical properties. The vertical graphene-semiconductor system, however, also presents opportunities for unique devices, yet there have been few attempts to understand the properties of carrier transport through the graphene sheet into an underlying substrate. In this work, we investigate the epitaxial graphene/4H-SiC system, studying both p and n-type SiC substrates with varying doping levels in order to better understand this vertical heterojunction.
High Performance RF FETs Using High-k Dielectrics on Wafer-Scale Quasi-Free-Standing Epitaxial Graphene
Authors: Robinson Joshua A. , Hollander Matthew J. , LaBella Michael , Trumbull Kathleen , Zhu Mike , Cavalero Randall , Snyder David
Published: May 2012

We explore the effect of processing on graphene/metal ohmic contact resistance, the integration of high-κ dielectric seeds and overlayers on carrier transport in epitaxial graphene, and directly demonstrate the importance of buffer elimination at the graphene/SiC(0001) interface for high frequency applications. We present a robust method for forming high quality ohmic contacts to graphene, which improves the contact resistance by nearly 6000x compared to untreated metal/graphene interfaces. Optimal specific contact resistance for treated Ti/Au contacts is found to average -7 Ohm-cm2. Additionally, we introduce a novel seeding technique for depositing dielectrics by ALD that utilizes direct deposition of high-κ seed layers and can lead to an increase in Hall mobility up to 70% from as-grown. Finally, we demonstrate that buffer elimination at the graphene/SiC(0001) results in excellent high frequency performance of graphene transistors with fT > 130 GHz at 75 nm gate lengths.
Synchrotron Radiation Photoelectron Spectroscopy Study of Thermally Grown Oxides on 4H-SiC(0001) Si-Face and (000-1) C-Face Substrates
Authors: Watanabe Heiji , Hosoi Takuji , Kirino Takashi , Uenishi Yusuke , Chanthaphan Atthawut , Yoshigoe Akitaka , Teraoka Yuden , Mitani Suhei , Nakano Yuki , Nakamura Takashi , Shimura Takayoshi
Published: May 2012

The fundamental aspects of thermal oxidation and oxide interface grown on 4H-SiC(0001) Si-face and (000-1) C-face substrates were investigated by means of high-resolution x-ray photoelectron spectroscopy (XPS) using synchrotron radiation together with electrical measurements of SiC-MOS capacitors. We found that, for both cases, there existed no distinct C-rich transition layer despite the literature. In contrast, atomic scale roughness causing degradation of SiC-MOS devices, such as negative fixed charge and electrical defects just at the oxide interface, was found to be introduced as thermal oxidation progressed, especially for the (000-1) C-face substrate.
Challenges of High-Performance and High-Reliablity in SiC MOS Structures
Authors: Senzaki Junji , Shimozato Atsushi , Kojima Kazutoshi , Kato Tomohisa , Tanaka Yasunori , Fukuda Kenji , Okumura Hajime
Published: May 2012

Influences of wafer-related defect and gate oxide fabrication process on MOS characteristics with gate oxides thermally grown on 4H-SiC (0001) wafer have been investigated for a realization of SiC MOS power devices. The SiC MOS characteristics depend on the gate oxide fabrication process, and are improved by the increase of DRY oxidation temperature and the applying of N2O and H2 POAs. In addition, it was clearly shown that predominant origins of SiC MOS reliability degradation are wafer-related defects such as dislocation and surface defects of epitaxial layer. Moreover, the planarization of SiC epitaxial layer surface using a CMP treatment is effective technique for the improvement of SiC MOS reliability.
Effects of N Incorporation on Electron Traps at SiO2/SiC Interfaces
Authors: Basile Alberto F. , Dhar Sarit , Williams John R. , Feldman Leonard C. , Mooney Patricia M.
Published: May 2012

Temperature dependent capacitance-voltage (C-V) and constant capacitance transient spectroscopy (CCDLTS) measurements have been performed to investigate the role of N in improving the transport properties of 4H-SiC MOS transistors. The higher channel mobility in the N pre-implanted transistors is due at least in part to activation of a small fraction of the implanted N near the SiO2/SiC interface as donors in SiC during oxidation, thus reducing the effects of interface trapping. In addition, the absence of oxidation-induced near-interface defects, which were observed in NO-annealed capacitors, may contribute to the improved mobility in N pre-implanted transistors.
Improved Deposited Oxide Interfaces from N2 Conditioning of Bare SiC Surfaces
Authors: Rozen John , Nagano Masahiro , Tsuchida Hidekazu
Published: May 2012

The benefits of a new method used to incorporate nitrogen at the dielectric/semiconductor interface of 4H-SiC oxide-based devices are presented. High temperature exposure of the SiC surface to hydrogen and nitrogen, prior to oxide deposition, greatly reduces the amount of electrically active defects to a density at least as low as the one of thermally formed interfaces. These results demonstrate the potential of increasing minority carrier mobility with a low gate dielectric forming thermal budget, with deposited dielectrics, and with limited health hazards.
Development of 4H-SiC MOSFETs with Phosphorus-Doped Gate Oxide
Authors: Okamoto Dai , Yano Hiroshi , Hatayama Tomoaki , Fuyuki Takashi
Published: May 2012

In this article, we show some new results regarding the electrical properties of 4H-SiC MOSFETs fabricated by thermal annealing using POCl3. The temperature dependence of MOSFET properties is described and the effect of POCl3 annealing followed by forming gas annealing is shown. POCl3-annealed MOSFETs indicates negative temperature dependence of channel mobility and smaller change in threshold voltage. Forming gas anneal after the POCl3 treatment further improves channel mobility up to about 101 cm2/Vs. Features and problems of P-doped oxide are summarized and the future challenges are described.
SiC Epitaxial Layer Growth in a 6x150 mm Warm-Wall Planetary Reactor
Authors: Burk Albert A. , Tsvetkov Denis , Barnhardt Dan , O'Loughlin Michael  J. , Garrett Lara , Towner Paul , Seaman Jeff , Deyneka Eugene , Khlebnikov Yuri , Palmour John W.
Published: May 2012

Initial results are presented for SiC-epitaxial growths employing a novel 6x150-mm/10x100-mm Warm-Wall Planetary Vapor-Phase Epitaxial (VPE) Reactor. The increased areal throughput offered by this reactor and 150-mm diameter wafers, is intended to reduce the cost per unit area for SiC epitaxial layers, increasing the market penetration of already successful commercial SiC Schottky and MOSFET devices [1]. Growth rates of 20 micron/hr and short <2 hr fixed-cycle times (including rapid heat-up and cool-down ramps), while maintaining desirable epitaxial layer quality were achieved. No significant change in 150 mm diameter wafer shape is observed upon epitaxial growth consistent with good-quality, low-stress substrates and low (<5°C) cross-wafer epitaxial reactor temperature variation. Specular epitaxial layer morphology was obtained, with morphological defect densities consistent with projected 5x5 mm die yields as high as 80% and surface roughness, Ra, of 0.3 nm. Intrawafer thickness uniformity is good, averaging only 1.6% and within a run wafer-to-wafer thickness variation is 2.7%. N-type background doping densities less that 1E14 cm-3 have been measured by CV. Doping uniformity and wafer-to-wafer variation currently average ~12% requiring further improvement. The first 100 m thick 150-mm diameter epitaxial growths are reported.
Passivation and Depassivation of Interface Traps at the SiO2/4H-SiC Interface by Potassium Ions
Authors: Hermannsson Pétur Gordon , Sveinbjörnsson E.Ö.
Published: May 2012

We investigate the passivation of interface traps by method of oxidizing Si-face 4H-SiC in the presence of potassium as well as examining the thermal stability of this passivation process. It is observed that this type of dry oxidation leads to a strong passivation of interface traps at the SiO2/4H-SiC interface with energy levels near the SiC conduction band edge. Furthermore, it is observed that if potassium ions residing at the SiO2/SiC interface are moved towards the sample surface by exposing them to ultraviolet light (UV) under an applied depletion bias stress at high temperatures the interface traps become electrically active again and are evidently depassivated. These findings are in line with recently a published model of the effect of sodium on such interface states
Controlling Characteristics of 4H-SiC(0001) p-Channel MOSFETs Fabricated on Ion-Implanted n-Well
Authors: Okamoto Mitsuo , Iijima Miwako , Nagano Takahiro , Fukuda Kenji , Okumura Hajime
Published: May 2012

Fabricated were 4H-SiC p-channel MOSFETs in two types of ion-implanted n-well regions and in the n-type substrate as a control. Effects of the n-well structure on the electrical properties were investigated. P-channel MOSFETs fabricated in the uniform doped n-well by using multiple ion-implantations showed inferior on-state characteristics to that of the control MOSFET, while those fabricated in the retrograde n-wells by using single-shot ion-implantation without additional implantation to form the surface p-type region indicated improved channel properties. The Vth values were controlled by the impurity concentration and depth of the surface p-type region, and the values of channel mobility were nearly equal to that of the control MOSFET. Good sub-threshold characteristics for the type II devices were demonstrated.
Frequency-Dependent Charge Pumping on 4H-SiC MOSFETs
Authors: Yu Liang Chun , Fronheiser Jody , Tilak Vinayak , Cheung Kin P.
Published: May 2012

The quality of the SiC/SiO2 interface is critical to the stability and performance of MOS-based SiC power devices. Charge pumping is a flexible interface characterization technique. In this work, a significant portion of the total traps are found to be located in the near-interface oxide using frequency-dependent charge pumping. Oxide trap tunneling mechanisms are discussed, and trap profile as a function of depth is calculated. The trap density is shown to increase exponentially as it gets closer to the interface.
Implementation of Sub-Resolvable Features for Precise Electrical Characterization of SiC Gate Oxide Parameters
Authors: McMahon J. Jay , Yu Liang Chun , Fronheiser Jody , Elson J.T. , Kovalec Roger , Kretchmer Jim , Tilak Vinayak
Published: May 2012

We describe fabrication of Van der Pauw (VDP) structures for characterization of gate oxides grown on 4H SiC epi surfaces. Implementation of sub-resolvable features (SRF) as a corner compensation mechanism is analyzed with challenges and advantages presented. Results of on-wafer screening tests suggest that implementation of SRFs widens tolerance for misalignment, producing similar yield between uncompensated VDPs with 0.2 micron overlap and compensated VDPs with 0.1 micron overlap for structures with best alignment. Optimization of SRFs for SiC could be an attractive option for extending lithographic capability in advanced devices.
Effect of Nuclear Scattering Damage at SiO2/SiC and Al2O3/SiC Interfaces – a Radiation Hardness Study of Dielectrics
Authors: Usman Muhammad , Hallén Anders , Gulbinas K. , Grivickas Vytautas
Published: May 2012

The radiation hardness of Al2O3 as a dielectric for SiC surface passivation is studied and compared to SiO2 for potential application in radiation hard SiC devices. SiO2 is deposited on 4H-SiC by PECVD and post annealed in N2O, whereas Al2O3 is deposited by atomic layer deposition (ALD). The oxides are bombarded with Ar ions in an energy range to produce maximum damage near the oxide/SiC interface. Metal-insulator-semiconductor structures are prepared and their dielectric characteristics are analyzed using capacitance-voltage measurements. Additionally, the effect of the interface damage on surface recombination is studied using the optical free carrier absorption method for the same samples. The results indicate that the SiO2/SiC interface is significantly affected at 1×1011 cm-2 fluence of Ar ions, however, the dielectric properties of Al2O3/SiC interface remain unaffected even for ten times higher fluences. Similar observations are made for the surface recombination measurements.
Growth of 4H-SiC Epilayers and Z1/2 Center Elimination
Authors: Miyazawa Tetsuya , Tsuchida Hidekazu
Published: May 2012

Thick and low-doped epilayers with a low Z1/2 center concentration were grown on 8o off-cut 4H-SiC(0001)Si-face substrate. Two post-growth processes, namely, the C+-implantation/annealing process or the thermal oxidation/Ar annealing process, were applied to the thick epilayers. The dependence of the Z1/2 center concentration and the carrier lifetime on process conditions was investigated. Under proper conditions, both processes could eliminate the Z1/2 center to a depth of 100 μm or more, and considerably improved the carrier lifetime while maintaining the surface roughness comparable to that of the as-grown sample. The effect of the post-growth processes applied on C-face is also presented.
Shallow Incorporation of Nitrogen in HPSI 4H-SiC through the Laser Enhanced Diffusion Process
Authors: Sullivan III William W. , Hettler Cameron , Dickens James
Published: May 2012

This paper investigates n-type doping of point-defect compensated high purity semi-insulating (HPSI) 4H-SiC using a pulsed laser (10 ns FWHM @ 260 nm) for the introduction of nitrogen to shallow depths. A thermal model is presented using COMSOL Multiphysics featuring nonlinear temperature dependent material properties and a volumetric heat source term that takes into account the laser absorption depth for common ultraviolet irradiating wavelengths. The temperature distribution in the material and the amount of time that the surface and near-surface regions are at high temperature determines how many laser pulses are required to dope to the desired depth, and simulation results are presented and fit to measured data. The simulations and measured data show that for shallow doping a short wavelength ultraviolet laser should be used to localize the heat at the surface so the dopant can’t diffuse deep into the material. The laser enhanced diffusion process has been used to incorporate nitrogen into HPSI 4H-SiC with a measured surface concentration greater than 1020 cm-3 and a nonlinear thermal model was built.
High Dose Al+ Implanted and Microwave Annealed 4H-SiC
Authors: Nipoti Roberta , Nath A. , Rao Mulpuri V. , Hallén Anders , Mancarella Fulvio , Zampolli S. , Tian Y.L.
Published: May 2012

A post implantation microwave annealing technique has been applied for the electrical activation of Al+ implanted ions in semi-insulating 4H-SiC. The annealing temperatures have been 2000-2100°C. The implanted Al concentration has varied from 5 x 1019 to 8 x 1020 cm-3. A minimum resistivity of 2 x 10-2 Ω∙cm and about 70% electrical activation of the implanted Al has been measured at room temperature for an implanted Al concentration of 8 x 1020 cm-3 and a microwave annealing at 2100°C for 30 s.
Effects of Different Post-Implantation Annealing Conditions on the Electrical Properties of Interfaces to p-Type Implanted 4H-SiC
Authors: Frazzetto Alessia , Roccaforte Fabrizio , Giannazzo Filippo , Lo Nigro R. , Saggio M. , Zanetti Edoardo , Raineri Vito
Published: May 2012

This paper reports on the effects of different post-implantation annealings on the electrical properties of interfaces to p-type implanted 4H-SiC. The morphology of p-type implanted 4H-SiC was controlled using a capping layer during post-implantation activation annealing of the dopant. Indeed, the surface roughness of Al-implanted regions strongly depends on the use of the protective capping layer during the annealing. However, while the different morphological conditions do not affect the macroscopical electrical properties of the implanted SiC (such as the sheet resistance), they led to an improvement of the morphology and of the specific contact resistance of Ti/Al Ohmic contacts formed on the implanted regions. These electrical and morphologic improvements were associated with a lowering of Schottky barrier height. Preliminary results showed that the different activation annealing conditions of p-type implanted SiC can affect also the electrical parameters (like threshold voltage and mobility) of lateral MOSFETs.
Electroless Nickel for N-Type Contact on 4H-SiC
Authors: Mendis Suwan P. , Tin Chin Che , Tin Michelle T. , Isaacs-Smith Tamara , Crandall Erika R.
Published: May 2012

An electroless nickel film contains 5-14% by weight of phosphorus. Because of the presence of such a high concentration of phosphorus, electroless nickel can be a useful and convenient source of phosphorus dopant in the fabrication of n-type ohmic contacts for SiC. This paper describes the successful deposition of a Ni:P layer on 4H-SiC through electroless nickel plating followed by a discussion of the results of surface science and electrical measurements. Specific contact resistivity on lightly-doped samples with carrier concentration of 2.5 ´ 1016 cm-3 has been found to be about 4.8 ´ 10-6 Ωcm2 without any need for ion implantation. This metallization technique is especially useful in broad area ohmic contact formation on the back of n-type SiC substrate.
Development of an Extreme High Temperature n-Type Ohmic Contact to Silicon Carbide
Authors: Evans Laura J. , Okojie Robert S. , Lukco Dorothy
Published: May 2012

We report on the initial demonstration of a tungsten-nickel (75:25 at. %) ohmic contact to silicon carbide (SiC) that performed for up to fifteen hours of heat treatment in argon at 1000 °C. The transfer length method (TLM) test structure was used to evaluate the contacts. Samples showed consistent ohmic behavior with specific contact resistance values averaging 5 x 10-4 Ω-cm2. The development of this contact metallization should allow silicon carbide devices to operate more reliably at the present maximum operating temperature of 600 °C while potentially extending operations to 1000 °C.
Clearance of 4H-SiC Sub-Trench in Hot Chlorine Treatment
Authors: Koketsu Hidenori , Hatayama Tomoaki , Yano Hiroshi , Fuyuki Takashi
Published: May 2012

The sub-trenches in 4H-SiC Si- and C-faces could be disappeared by the thermal treatment in chlorine ambience at 900-1000oC. The surface morphologies of the thermally treated trench-sidewalls were unchanged. It is considered that the sub-trench is selectively removed because thermally Cl2 etching rate of the (0001) Si- and (000-1) C-face are different to the (11-20) and (1-100).
Focused Ion-Beam (FIB) Nanomachining of Silicon Carbide (SiC) Stencil Masks for Nanoscale Patterning
Authors: Zamani Hamidreza , Lee Seung Wan , Avishai Amir , Zorman Christian A. , Sankaran R. Mohan , Feng Philip X.L.
Published: May 2012

We report on experimental explorations of using focused ion beam (FIB) nanomachining of different types of silicon carbide (SiC) thin membranes, for making robust, high-quality stencil masks for new emerging options of nanoscale patterning. Using thin films and membranes in polycrystalline SiC (poly-SiC), 3C-SiC, and amorphous SiC (a-SiC) with thicknesses in the range of t~250nm−1.6μm, we have prototyped a series of stencil masks, with nanoscale features routinely down to ~100nm.
TSD Reduction by RAF (Repeated a-Face) Growth Method
Authors: Urakami Yasushi , Gunjishima Itaru , Yamaguchi Satoshi , Kondo Hiroyuki , Hirose Fusao , Adachi Ayumu , Onda Shoichi
Published: May 2012

A reduction in threading screw dislocation (TSD) density in 4H-SiC (silicon carbide) crystal is required for SiC power devices. In this study, TSD’s transformation by the RAF (repeated a-face) growth method [1] is observed by transmission X-ray topography (g=0004) of the cross-section of the crystal. Increasing the number of repetitions of a-face growth and offsetting c-face growth to an angle of several degrees reduce TSDs. TSD density is reduced to 1.3 TSD/cm2. The RAF growth method is very effective towards growing high quality SiC crystals.
ECR-Ectching of Submicron and Nanometer Sized 3C-SiC(100) Mesa Structures
Authors: Hiller Lars , Stauden Thomas , Kemper Ricarda M. , Lindner Jörg K.N. , As Donat J. , Pezoldt Joerg
Published: May 2012

Anisotropic etching processes for mesa structure formation using fluorinated plasma atmospheres in an electron cyclotron resonance (ECR) plasma etcher were studied on Novasic substrates with 10 µm thick 3C-SiC(100) grown on Si(100). To achieve reasonable etching rates, a special gas inlet system suitable for injecting SF6 into the high density downstream Ar ECR plasma was designed. The influence of the etching mask material on the sidewall morphology was investigated. Masking materials with small grain sizes are preferable to achieve a desired shape. The evolution of the mesa form was investigated in dependence on the gas composition, the applied bias, the pressure and the composition of the gas atmosphere. The achieved sidewall slope was 84.5 deg. The aspect ratios of the fabricated structures in the developed residue free ECR plasma etching process were between 5 and 10. Mesa structures aligned to [100] and [110] directions were fabricated.
Local Anodic Oxidation of Phosporous-Implanted 4H-SiC by Atomic Force Microscopy
Authors: Lee Jung Ho , Ahn Jung Jun , Hallén Anders , Zetterling Carl Mikael , Koo Sang Mo
Published: May 2012

In this work, local oxidation behavior in phosphorous ion-implanted 4H-SiC has been investigated by using atomic force microscopy (AFM). The AFM-local oxidation (LO) has been performed on the implanted samples, with and without activation anneal, using varying applied bias (15/20/25 V). It has been clearly shown that the post-implantation annealing process at 1650 oC has a great impact on the local oxidation rate by electrically activating the dopants and by modulating the surface roughness. In addition, the composition of resulting oxides changes depending on the doping level of SiC surfaces.
Performance of a 650V SiC Diode with Reduced Chip Thickness
Authors: Rupp Roland , Gerlach Rolf , Kirchner Uwe , Schlögl Andreas , Kern Ronny
Published: May 2012

A significant performance gain of 650V SiC diodes is possible by reducing the wafer thickness from the standard thickness of 350 µm to < 150 µm. Not only the differential resistance of the diodes but also the Rth benefit from this chip thickness reduction. As consequence a further chip size reduction with accompanying capacitive charge reduction leads to a device with improved efficiency in PFC applications under both high load and low load conditions.
High Uniformity with Reduced Surface Roughness of Chloride Based CVD Process on 100mm 4° Off-Axis 4H-SiC
Authors: Das Hrishikesh , Sunkari Swapna G. , Oldham Timothy , Casady Janna R. B. , Casady Jeff B.
Published: May 2012

In this work we present the epitaxial growth of 4H-SiC on 100mm 4° off-axis substrates grown in a multi-wafer CVD planetary reactor. Highly uniform epitaxial layers having thickness and doping uniformities of 1.7% and 1.4% respectively were grown in the production reactor with optimized process conditions at 8µm/hr and 30µm/hr growth rates. Process optimizations resulted in epitaxial layers with surface roughness (RMS) of 0.32nm. Epitaxial layers with a thickness of 53µm grown with a 30µm/hr growth process had minimal degradation in surface roughness (RMS of 0.39nm).
Performance of Hybrid 4.5 kV SiC JBS Freewheeling Diode and Si IGBT
Authors: Hobart Karl D. , Imhoff Eugene A. , Kub Fritz J. , Hefner A.R. , Duong T.H. , Ortiz-Rodriguez J.M. , Ryu Sei Hyung , Grider David , Leslie Scott , Sherbondy J. , Ray B.
Published: May 2012

The performance of Junction Barrier Schottky (JBS) diodes developed for medium voltage hard-switched Naval power conversion is reported. Nominally 60 A, 4.5kV rated JBS freewheeling diodes were paired with similarly rated Si IGBTs and evaluated for temperature dependent static and dynamic characteristics as well as HTRB and surge capability. The SiC JBS/Si IGBT pair was also directly compared to Si PiN diode/Si IGBT with similar ratings. Compared to Si, the SiC freewheeling diode produced over twenty times lower reverse recovery charge leading to approximately a factor-of-four-reduction in turn-on loss. Alternatively, for equivalent total switching loss, the SiC JBS/Si IGBT hybrid configuration allows for at least a 50% increase in specific switched power density. Reliability testing showed the devices to be robust with zero failures.
12.9 kV SiC PiN Diodes with Low On-State Drops and High Carrier Lifetimes
Authors: Sundaresan Siddarth G. , Sturdevant Charles , Marripelly Madhuri , Lieser Eric , Singh Ranbir
Published: May 2012

Sharp avalanche breakdown voltages of 12.9 kV are measured on PiN rectifiers fabricated on 100 µm thick, 3 x 1014 cm-3 doped n- epilayers grown on n+ 4H-SiC substrates. This equates to a record high 129 V/µm for a > 10 kV device. Optimized epilayer, device design and processing of the SiC PiN rectifiers result in a > 60% blocking yield at 10 kV, ultra-low on-state voltage drop and differential on-resistance of 3.75 V and 3.3 mΩ-cm2 at 100 A/cm2 respectively. Open circuit voltage decay (OCVD) measured carrier lifetimes in the range of 2-4 µs are obtained at room temperature, which increase to a record high 14 µs at 225 °C. Excellent stability of the forward bias characteristics within 10 mV is observed for a long-term forward biasing of the PiN rectifiers at 100 A/cm2. A PiN rectifier module consisting of five parallel large area 6.4 mm x 6.4 mm 10 kV PiN rectifiers is connected as a free-wheeling diode with a Si IGBT and 1100 V/100 A switching transients are recorded. Data on the current sharing capability of the PiN rectifiers is also presented.
Design, Yield and Process Capability Study of 8 kV 4H-SiC PIN Diodes
Authors: Bolotnikov Alexander , Losee Peter A. , Matocha Kevin , Nasadoski Jeff , Glaser John , Arthur Steve , Stum Z. , Garrett J. , Elasser Ahmed , Stevanovic Ljubisa , Naik Harsh , Chow T. Paul
Published: May 2012

This paper presents a study of performance and scalability of 8kV SiC PIN diodes focusing on area-dependent yield and sensitivity to material properties variation. Successfully fabricated 18 and 36 mm2 SiC-PiN diodes exhibited avalanche breakdown above 8 kV and < 5V forward voltage drop at 100 A/cm2 current density. The fast switching operation of these diodes up to ~5 kHz frequency is evidenced by reverse recovery measurements with by double-pulse inductive switching tests. The devices exhibit 0.142 and 0.169 uC/cm2 stored charge at room temperature and 125oC, respectively, when turned-off from Jf = 100A/cm2 to Vr = 2.1 kV. The measured diode breakdown voltage exhibited location and size dependent yield, indicating the necessity of material quality improvements for production.
Characterization of Packaged 6.5 kV SiC PiN-Diodes up to 300 °C
Authors: Dohnke Karl Otto , Peters Dethard , Schörner Reinhold
Published: May 2012

Silicon Carbide bipolar diodes offer unique ultrafast switching behavior for high voltage and high power applications [1]. But due to the small chip size it is required to parallel a lot of dice and therefore it is necessary to get detailed information about the electrical and thermal behavior of single diodes. For the characterization in the full current and voltage regime we have developed a molded leadframe package. The package was designed with a lateral contact geometry and a high creepage distance of 20 mm, which enable us to characterize these diodes for high voltage applications. Forward and reverse I-V characteristics and turn-off behavior under hard switching conditions up to 300 °C are reported. Additionally the forward voltage stability and power cycling tests are discussed.
11.72 cm2 SiC Wafer-Scale Interconnected 1.8 kV / 64 kA PiN Diode
Authors: Snook Megan , Hearne Harold , McNutt Ty , Veliadis Victor , Nechay Bettina , Woodruff Sharon , Howell R.S. , Giorgi David , White Joseph , Davis Stuart
Published: May 2012

To meet the large current handling requirements of modern power conditioning systems, paralleling of a large number of devices is required. This increases cost and complexity through dicing, soldering, and forming multiple wire bonds. Furthermore, paralleling discrete devices increases package volume/weight and reduces power density. To overcome these complexities, PiN diodes were designed, fabricated at high yields, tested, and interconnected on a three-inch 4H-SiC wafer to form an 11.72 cm2 wafer-scale diode. The wafer-scale diode exhibited a breakdown voltage of 1790 V at an extremely low leakage current density of less than 0.002 mA/cm2. Under pulsed conditions, the peak current through the wafer-scale diode is 64.3 kA with a forward voltage drop of 10.3 V. The dissipated energy was 382 J and the action exceeded 1.7 MA2-sec.
600 V PIN Diodes Fabricated Using On-Axis 4H Silicon Carbide
Authors: Civrac Gabriel , Laariedh Farah , Thierry-Jebali Nicolas , Lazar Mihai , Planson Dominique , Brosselard Pierre , Hassan Jawad , Henry Anne , Janzén Erik , Vergne Bertrand , Scharnholz Sigo
Published: May 2012

This paper reports the fabrication and electrical characterization of PiN diodes on an on-axis grown epitaxial layer. TCAD simulations have been performed in order to design their architecture. Some of these diodes have a breakdown voltage around 600 V. A comparison is made with similar diodes fabricated on off-cut grown layers. Computer simulations are used to explain lower breakdown voltage than those expected.
Epitaxial Growth of 4H-SiС Using Si2(CH3)6+Si2Cl6+C3H8+H2 System by Atmospheric Pressure Hot CVD Method
Authors: Lee Hyun Seung , Kim Min Jae , Kim Min Hee , Lee Sang Il , Lee Won Jae , Shin Byoung Chul , Nishino Shigehiro
Published: May 2012

The chlorinated precursor is recently focused for high growth rate and high quality epitaxial layer. In the previous studies, the addition of chlorinated species from Si2Cl6 in the gas phase eliminated simultaneous Si nucleation which interferes with epitaxy. In this work, the characterization of epitaxial layers grown with chlorinated species is focused. High growth rate of 30 μm/h was achieved by using Si2(CH3)6 and Si2Cl6 as chlorinated precursors. We concluded that high growth rate was achieved by using HMDS and HCDS as the precursor of SiC at growth temperature of 1600 °C.
Experimental Study on Various Junction Termination Structures Applied to 15 kV 4H-SiC PiN Diodes
Authors: Niwa Hiroki , Feng Gan , Suda Jun , Kimoto Tsunenobu
Published: May 2012

Breakdown characteristics of 4H-SiC PiN diodes with various JTE structures have been investigated. By combining two-zone JTE and Space-Modulated JTE (SM-JTE), a breakdown voltage over 15 kV, corresponding to about 93 % of the parallel-plane breakdown voltage, was realized. The window of optimum JTE dose to obtain high breakdown voltage was widened, which indicates the robustness to the deviation of JTE dose. By comparing the breakdown voltage obtained by simulation and experimental results, impacts of the charge near the SiO2/SiC interface are discussed.
3-Mercaptopropionic Acid Capped Ga2Se3nanocrystal-CYP3A4 Biosensor for the Determination of 17-Alpha-Ethinyl Estradiol in Water
Authors: Nxusani E. , Ndangili P.M. , Olowu R.A. , Jijana A. N. , Waryo T. , Jahed N. , Ajayi R.F. , Baker Priscilla Gloria Lorraine , Iwuoha Emmanuel Iheanyechukwu
Published: May 2012

Water soluble and biocompatible 3-mercaptopropionic acid capped gallium selenide nanocrystals, were synthesized from hydrated gallium (III) perchlorate and selenide ions. The 3-mercaptopropionic acid capped gallium selenide nanocrystals, was non-fluorescent but showed a sharp UV-vis absorption maximum at 250 nm.The synthesized nanoparticle was used to develop an electrochemical biosensor for the detection of 17-alpha-ethinyl estradiol, an estrogenic endocrine disrupting compound (e-EDC). The biosensor was fabricated by potentiostatic deposition of novel gallium selenide nanocrystals on a L-cystine modified gold electrode, followed by covalent coupling of genetically engineered cytochrome P450-3A4 (CYP3A4), a Heme containing enzyme. The biosensor gave an electrochemical response at about-220 mV. The results revealed that 3-Mecarptopropanoic acid capped Gallium Selenide nanocrystals can be used in conjunction with CYP3A4 as an electrode modifier for the detection of 17-alpha ethinyl estradiol. The 3-Mecarptopropanoic acid capped Gallium Selenide nanoparticles exhibited a semiconductor like behaviour.
Metallurgical Characterization of some Magnesium Alloys for Medical Applications
Authors: Antoniac Iulian , Miculescu Marian , Dinu Mihaela
Published: May 2012

The magnesium alloys has been intensively studied for their suitable mechanical properties, excellent biocompatibility and their ability to biodegrade in biological environments. Although magnesium biodegradable implants possess many desirable properties, it is important that the alloy is able to be tolerated by the body- the constitutional elements of magnesium-based alloys should be toxic free. In this study two binary magnesium alloys Mg-Ca0,8 and Mg-Ca1,8 were experimentally obtained by casting and was characterized in order to investigate the microstructure, mechanical properties and how alloying elements influenced the characteristics of this new alloys potentially used for orthopedic implants.
Establishing the Glass Forming Ability of Ferromagnetic Bulk Amorphous Alloys Using a Mathematical Model Based on the Chemical Composition
Authors: Buzdugan Dragoş , Codrean Cosmin , Vodǎ Mircea , Şerban Viorel Aurel
Published: May 2012

This paper presents a mathematical model that describes the influence of the chemical composition on the glass forming ability of ferromagnetic alloys. Glass forming ability is given by the difference between the glass transition temperature and the primary crystallization temperature of the alloy. The glass forming ability is better as long this difference has a higher value. These temperatures were determined using differential thermal analysis.
Computerized Image Processing for Evaluation of Microstructure in Metallic Matrix Composites
Authors: Nicoară Mircea , Răduţă Aurel , Locovei Cosmin
Published: May 2012

Fabrication of aluminum matrix composites reinforced with ceramic particles via powder metallurgy techniques present considerable advantages, especially large flexibility of reinforcement volume content. However since metal particles are considerably larger than ceramic reinforcement, ceramic clustering become more and more frequent as the reinforcement proportion increases, and high ratio plastic deformations are mandatory. An experimental program has been developed to determine particle redistribution of ceramic reinforcement by mean of large-ratio extrusion of aluminum composites, containing up to 20% vol. of reinforcement. Evaluation of particle redistribution by extrusion has been determined using a computer-based technique of image analysis for resulting optical micrographies.The image processing has included particle detection, particle measurement and classification.
Theoretical and Practical Aspects Regarding Al-SiC Particles Composites Obtaining by Casting
Authors: Neagu Gigel , Ştefănescu Florin , Mihai Alexandrina , Stan Iuliana , Odagiu Iuliana
Published: May 2012

The paper presents the principal aspects regarding the obtaining of the mixture aluminium - silicon carbide particles. It is discussed about the wetting conditions and the critical acceleration necessary for the incorporation of particles into the melt. The high values obtained for this parameter involve applying some methods to improve the wettability: the covering of the complementary material with a thin layer of Ni, the alloying of the aluminium melt, the overheating of the metallic bath and the heat treatment of the silicon carbide particles. Also, the mechanical stirring conditions necessary to realize the mixture are presented. The settling process of the silicon carbide particles in the melt as a function of particles size, shape and volumetric concentration is also analysed. The presence of complementary material leads to the growth of the mixture viscosity. Therefore, the liquid alloy was investigated like a continuous medium in connection with the apparent viscosity. The main aspects regarding the solidification of metallic composites processed by casting method based upon theoretical concepts, general knowledge about casting of composites and experimental data are discussed. Finally, the specific defects caused by an insufficiently controlled solidification process and prevention measures are shown.
Quality Control of Composite Material Pipes by Infrared Thermography
Authors: Mihai Alexandrina , Ştefănescu Florin , Neagu Gigel , Mihai C.P.
Published: May 2012

The paper presents some aspects concerning the use of infrared thermography (IRT) in the evaluation of composite pipes integrity. Composite pipelines made up of glass fibres reinforced epoxy resins are increasingly used, especially in oil and gas industry, for their good mechanical properties, combined with reduced weight and excellent behaviour under hostile environment conditions. Taking into account that high reliability is required for such pipe networks, it is mandatory to choose reliable non-destructive inspection (NDI) methods to achieve efficient structural health monitoring. The main advantages of the IRT inspection are: non-contact and non-dangerous examination. In order to characterize the integrity of composites pipes, first of all the researches were interested in obtaining a set of reference images and then to examine the samples before and after the impact stress test. The conclusions point out the schemes and the optimal parameters of evaluation as well as the application limits of thermographic inspection