(Invited) GaN/Si Buffer Development for RF and Power Applications
Authors: Lo Chien-Fong , Laboutin O. , Kao C.-K. , Marchand Hugues , Dargis Rytis , Clark Andrew , Pelzel Rodney , Johnson W. 
Published: February 2020

Gallium nitride transistors grown on Si(111) are becoming commercially available for applications such as microwave communication at 2-6 GHz and power conversion in the 600V range. Three-terminal off-state breakdown voltage of 1.35 kV and a low specific on-resistance of 1.3 mohm-cm2 have been achieved on 200 mm diameter GaN/Si wafers with 4.5-µm-thick device epilayer thickness.[1] However additional improvements to materials and processes are desirable in order to drive further market penetration. 

For power applications, breakdown voltage can be increased by tuning the resistivity of the buffer layers.Transistor structures incorporating GaN or Al(0.08)Ga(0.92)N buffer layers were grown and fabricated into isolation test structures for leakage characterization. For GaN buffer layers, the leakage current was significantly decreased and the isolation blocking voltage was increased by increasing the carbon doping concentration. AlGaN buffer layers exhibited smaller increase in leakage current at elevated temperature relative to GaN buffer layers. Room-temperature two-terminal breakdown voltage (defined at 1 µA/mm off-state leakage for 5 µm isolation spacing) was 100 V higher for the AlGaN-based buffer relative to the GaN buffer (1000V and 900V, respectively). At 150°C, the two-terminal breakdown voltage was 150V higher for the AlGaN buffer compared to the GaN, indicating a lower temperature coefficient for the AlGaN-based buffer. The effect of buffer composition on leakage current at high temperature was magnified at higher voltage, where the AlGaN-based buffer sustained over 1200 V at 100 µA/mm compared to 1000V for GaN-based buffer.

RF devices can suffer from parasitic capacitance resulting from mobile charge at the substrate interface. Crystalline rare-earth oxides (cREO) can be deposited on Si(111) to form a single-crystal nucleation layer for AlN or GaN [2] and avoid charge accumulation at the substrate interface. GaN transistor structures were grown on cREO/Si(111) and characterized by transmission electron microscopy, X-ray diffraction, and spreading resistance profile measurements.The film morphology and growth modes were comparable to a baseline GaN/Si process, with an offset in the density of extended defects which indicated the need for additional optimization. In contrast to a baseline process which resulted in p-type doping at the substrate interface, spreading resistance measurements indicate that the cREO / substrate interface was depleted, consistent with the cREO layer acting as a barrier for the group-III elements at the onset of growth. The benefits of this reduced charge density for device performance improvements and material optimization are discussed.

References:

[1] High-Power AlGaN/GaN Heterostructure Field-Effect Transistors on 200mm Si Substrates, C.-F. Lo,O. Laboutin, C.-K. Kao, K. O'Connor, D. Hill, and W. Johnson, ECS Transactions, 66 (1) 191-199 (2015).

[2] Scalable GaN-on-Silicon Using Rare Earth Oxide Buffer Layers, F. E. Arkun, M. Lebby, R. Dargis, R. Roucka, R. S. Smith, A. Clark, ECS Transactions, 50 (9) 1065-1071 (2012).