Ultrathin Gallium Oxide As a Gate Dielectric and Passivation Layer for Two-Dimensional Devices with Conductive Filament Contacts
Authors: Moon Sanghyun , Kim Jihyun 
Published: December 2024

Two-dimensional (2D) transition metal dichalcogenides (TMDs) are generally regarded as the channel material for post-silicon nanoelectronics owing to their distinctive crystal structure consisting of atomically thin dangling-bond-free layers, tunable bandgap and high carrier mobility. However, 2D devices based on TMDs typically suffer from performance degradation due to unwanted atmospheric reactions or adsorbates and require surface passivation to ensure that device performance is maintained. Recently, ultrathin metal oxides obtained through liquid metal printing or squeezing technique have emerged as a new class of 2D material with nanometer-scale thickness and large-area uniformity. Among them, ultrathin amorphous gallium oxide (GaOX) has garnered significant attention for its ease of fabrication owing to the low melting point of gallium (29.76 °C), large bandgap, and unique insulating and passivating properties. The ultrathin GaOX has been utilized for large-area passivation of 2D materials and as a dielectric for wide bandgap semiconductor devices. However, the integration of the ultrathin GaOX with 2D devices based on TMDs has rarely been investigated. In this study, we fabricated 2D devices based on multilayer n-type tungsten disulfide (WS2), wholly enveloped by the ultrathin GaOX. The ultrathin GaOX served as a dielectric passivation layer in the gate and channel region, whereas conductive filaments (CFs) were created in the ultrathin GaOX in the contact region through electroforming to form electrical contacts to the passivated WS2.

The WS2 multilayers for the channel were mechanically exfoliated from its bulk crystal and were aligned to and dry-transferred onto pre-patterned Ti/Pt bottom electrodes on Si/SiO2 substrates. Liquid gallium droplets were placed on prepared polydimethylsiloxane (PDMS)/polypropylene carbonate (PPC) films and were firmly compressed using a PDMS film supported on a glass slide to produce ultrathin GaOX monolayers. The fabricated ultrathin GaOX monolayers were dry-transferred onto the prepared WS2 channels by utilizing the PPC film as a sacrificial layer. The ultrathin GaOX monolayers were slowly lowered to fully contact the prepared substrates, after which the substrates were heated to 90 °C to soften and release the PPC films from the PDMS films. The PPC films held down the ultrathin GaOX monolayers on the substrates during the detachment of the PDMS films and were removed later by immersion in acetone. This process was repeated twice to form the ultrathin GaOX bilayers on the WS2 channels. Ti/Au drain and source top electrodes were formed above the Ti/Pt bottom electrodes before Ni/Au top-gate electrodes were formed to finalize the WS2/GaOX field-effect transistors (FETs). CF contacts to the drain and source region of the passivated WS2 channels were created via electroforming, where positive and negative bias voltages were applied to the top electrodes with the corresponding bottom electrodes grounded.

The ultrathin GaOX monolayer (~4.7 nm) and bilayer (~10.1 nm) fabricated in this work were determined to be highly uniform with root-mean-square roughness of 0.45–0.57 nm using atomic force microscopy. The ultrathin GaOX bilayer was evaluated via X-ray photoelectron spectroscopy to have an oxygen-deficient chemical composition with a sub-stoichiometric Ga:O ratio of 42:58 (Ga2O2.8). From the capacitance–voltage and current–voltage analyses of Pt/GaOX/graphene metal–insulator–metal devices, dielectric constant of 3.1 and dielectric breakdown voltage of +8 V were extracted for the ultrathin GaOX bilayer, respectively. The electroforming process of the ultrathin GaOX bilayer in the contact region of the WS2/GaOX FETs was irreversible, only showing decrease in the resistance during consecutive sweeps regardless of the polarity of the applied bias voltages. After the CF formation in ultrathin GaOX bilayers in the contact region, the electrical properties of WS2/GaOX FETs were investigated. The devices exhibited excellent top-gated performance with low subthreshold swing of 68.0–84.6 mV/dec and minimal hysteresis of 0.10–0.12 V. Furthermore, the CF contacts and the devices exhibited great electrical stability even after 50 days. Also, dual-gate logic operations of AND gate and OR gate were demonstrated using both the top and back gates of the WS2/GaOX FETs. This study demonstrates the implementation of the ultrathin GaOX as a gate dielectric, a passivation layer, and a CF contact layer in a single 2D device structure. The WS2/GaOX FETs exhibited outstanding electrical characteristics and stability, indicating the successful implementation and the versatility of the ultrathin GaOX. These results indicate the potential of the ultrathin GaOX as a key component in future 2D electronics.