bluuebunny/crossref_metadata_2025 huggingface dataset:
Hydrophobic sealing materials for harsh environmental electrical connector package applications
Authors: Xia Hua , Settles Nelson , DeWire David
Published: December 2019

A highly hydrophobic sealing material system has been developed using high-temperature melt-quenching and sintering technologies for harsh environmental electrical connector package sealing applications. The sealing material properties can be varied by its phase structures, such as amorphous glass, crystalline monoclinic and tetragonal mixed phase, and covalent bond tetragonal phase, which are determined by a two-stage synthesizing process. The dilatometer measurements have found that the ambient coefficient of thermal expansion varies from ~5.8 to 7.1 ppm/°C while the coefficient of thermal expansion at its glass transition temperatures varies from ~7.0 to 9.0 ppm/°C. These coefficients of thermal expansion could provide not only wide options for integrating metal materials, such as Ti-alloy, Kovar, Inconel alloys, and Stainless Steels for making reliable electrical connector packages, but also enable the design of electrical connector packages with a safety factor of 3 performance, operable at 30KSI (30,000 PSI) pressure, and −100 −300°C harsh conditions while maintaining at least 5,000MΩ insulation resistances, for reliable signal, data, and electrical power transmissions.
Controlling Extrinsic Chloride Ions Effect on Copper Wirebond Reliability
Authors: Chopin Sheila F , Mathew Varughese
Published: December 2019

Copper (Cu) wirebond (WB) reliability in encapsulated microelectronic devices is influenced by intrinsic and extrinsic chloride ions. Previous work showed that intrinsic extractable chloride (Cl) ions that are part of the epoxy mold compound (EMC) can cause Cu-Al intermetallic (IMC) or Al pad corrosion under moisture-temperature reliability conditions. Another mode of Cl corrosion occurs due to the entrapment of Cl foreign material (FM) particles that can release Cl ions after molding the device.

Intrinsic EMC and extrinsic Cl ions in encapsulated EMC must be defined, analyzed, and controlled to limit the potential for corrosion. Extrinsic Cl ions from FM (Foreign Material) particles can originate from human sources, the environment, assembly processes, and assembly tools. This paper focuses on extrinsic Cl ions from Cl-FM.

Cl-FM embedded in EMC can be determined by dissolving the EMC in a solvent followed by filtration. The isolated FM was characterized by various techniques including: Scanning Electron Microscopy - energy-dispersive X-ray (SEM – EDX) and Fourier-transform infrared spectroscopy (FTIR) to determine the structure of the Cl-FM compounds. The FTIR Analysis determines the presence of C-Cl bond by identifying stretching bond frequency in the region of 800 – 600 cm−1 that determines if the Cl-FM particle is organic. The combination of analytical techniques was used to identify the source of the Cl-FM. The types of Cl FM particles discovered were both organic and inorganic in nature, and of different shapes and sizes. The smaller size particles < 30μm posed a challenge for some particle type identification accuracies. Airborne particles are one of the main sources of Cl FM particles that can be entrapped in the EMC. Airborne particles are created by environmental dust, human wear, abrasion and handing, and machine maintenance.

The primary Cl FM particles were found to be carbon-chlorine polymers such as polyvinyl chloride (PVC), Polyvinylidene chloride (PVDC), and inorganic chlorides including metal chlorides. Many of the EMC materials found to have entrapped natural and synthetic fibrous materials with embedded Cl compounds. The 175°C mold process and 260°C reflow thermal effect degrading the Cl FM particle in the EMC matrix could generate Cl depending on the additives and modifiers. Investigations were performed to develop hypotheses of how Cl FM particles are generated in the EMC and how the FM particles could be controlled.
Flip Chip Joining with Quaternary Low Melting Temperature Solder Bump Fabricated with Injection Molded Solder
Authors: Hisada Takashi , Aoki Toyohiro , Nakamura Eiji , Kohara Sayuri , Mori Hiroyuki
Published: December 2019

IBM has developed and has been enhancing the injection molded solder (IMS) technology as an advanced solder bumping technology with flexible solder alloy composition applicable even to fine pitch and small diameter systems. IMS is a simple bumping technology that can form solder bumps by injection of molten solder into via holes patterned in a photoresist layer. IMS is applicable to formation of solder caps for Cu pillar bumping which is a technology widely used for fine pitch applications. One of the advantages of IMS is the capability of using ternary, quaternary, or more compositions solder alloys for bumping, which is not achievable by current plating technology. In this study, the feasibility of IMS bumping and flip chip joining with quaternary solder alloys is demonstrated through assembling of 2.5D package test vehicles using low melting temperature (135°C) SnBi based quaternary alloy solder and associated reliability test. The test vehicles passed the 2250 cycles criteria of thermal cycling test and the observation of microstructures showed that there is no significant crack at the solder joints after flip chip joining or after the 2250 cycles of thermal cycling test. In addition, the tensile test on SnBi based quaternary alloy solder, Sn-58wt%Bi-2.0wt%In with small amount of Pd (less than 1wt%) was conducted using fine diameter specimens. From the SS curve obtained from the test, Young's modulus of the solder was determined as 7.3 GPa and 0.2% proof stress was obtained as 73 MPa both at 25°C. The creep property of the solder was evaluated and the constants for Norton's creep law for the solder were determined at 25, 80 and 110°C. The microstructure observation and Energy Dispersive X-ray (EDX) analysis of the flip chip joints revealed the formation of a thick bismuth (Bi) layer between CuSn intermetallic compound (IMC) layers within a joint. The mechanical simulation of the 2.5D test vehicles showed that the thermomechanical stress of a flip chip joint with Bi/CuSn IMCs at thermal cycling condition is comparable to those of CuSn IMC or Sn-3.0Ag-0.5Cu (SAC305) solder joints consistent with the thermal cycling test result. The advantage of using low temperature quaternary solder materials in flip chip packages is confirmed by mechanical simulation of 2D packages at reflow condition which showed lower stress on low-k dielectric layers for the packages with quaternary solder joints than for the packages with SAC305 solder joints.
Optimal Lid Design Parameters for Reducing Warpage of Flip-chip Package
Authors: Shah Priyal , Bhagavat Milind
Published: December 2019

Flip-chip packages are usually integrated with a stiffener ring (SR) or lid to reduce the warpage which usually consumes considerable substrate space and hence, reduce the effective area available for placement of dies and passive components. With chip module size growing in modern semiconductor devices (e.g., to enable heterogeneous integration of different functional dies), there is a need to reduce the substrate area occupied by the lid while also reducing the package warpage to an allowable value. This requires an accurate understanding of how different parameters of the lid affect the warpage of the package. Here, for a large package, effects of the lid design variables, including (i) SR versus lid, (ii) lid foot width, (iii) lid plate thickness to foot width ratio, (iv) lid material, and (v) thickness of thermal interface material (TIM) connecting the die and the lid, on the warpage have been analyzed using the 3-D elasticity theory and the finite element method. It is found that for a given value of the lid plate thickness to foot width ratio, the warpage of the package is a non-monotonic function of the foot width and is not necessarily minimum for the maximum value of the foot width. The effects of lid material and TIM thickness are found to depend upon the foot width. Various results presented here should provide packaging engineers with guidelines to obtain optimal lid designs that minimize the package warpage while offering noticeable saving in the effective substrate area.
FLUXES WITH DECREASED VISCOSITY AFTER REFLOW FOR FLIP-CHIP AND SIP ASSEMBLY
Authors: Mao Runsheng , Chen Fen , Lee Ning-Cheng
Published: December 2019

A series of flux systems have been developed which would result in a reduced viscosity after reflow. This enables a high viscosity, high tack flux to be used to secure components at the component placement and reflow stage, but ends up with a low viscosity flux residue after reflow, thus facilitating the flux residue to be cleaned. A technique for forming such special fluxes is to establish a temporary association force within the materials themselves, such as an acid-base association. This kind of association force can increase the apparent molecular weight and cause material viscosity to increase. After a heating process, one of the critical ingredients was evaporated, thus eliminating the association force, causing a decrease in the apparent molecular weight, and consequently a decrease in viscosity or an increase in mobility. The evaporation of one ingredient can be the result of one ingredient having a lower boiling point, or the decomposition of one ingredient during heating. A strong association force is desired to allow this acid-base combination approach to work. In this work, the volatile ingredient approach was less effective than a decomposable ingredient approach, presumably due to the formation of a bigger association cluster from the decomposable ingredient. Accordingly, the decomposable ingredient was the best approach to lower flux viscosity after reflow.
Package Qualification Envelope for 22FDX® Technology
Authors: Klewer Christian , Kuechenmeister Frank , Paul Jens , Breuer Dirk , Boehme Bjoern , Cho Jae Kyu , Capecchi Simone , Thiele Michael
Published: December 2019

This article describes the methodology used to derive the 22FDX® Fully-Depleted Silicon-On-Insulator (FDSOI) Chip Package Interaction (CPI) qualification envelope. In the first part it is discussed how the individual market segments influence the technology features and offerings, including BEOL stacks and package types. In the following, the criteria used for the selection of BEOL stacks, die and package sizes and the interconnect type for the qualification envelope are summarized and explained. The three CPI qualification stages and related characterization methods are presented. CPI test structures used in the envelope are reported and their placement on the technology qualification vehicles (TQV) is outlined on the basis of flip chip TQV.

Finally, the paper presents the passing 22FDX® package and board level reliability results obtained for wire bond, flip chip, as well as wafer level fan-in and fan-out package technologies. Key aspects of the individual qualifications are reported.
Thermal Decoupling in Power Electronics Modules Using Thermal Pyrolytic Graphite
Authors: Paul Riya , Deshpande Amol , Luo Fang
Published: December 2019

The device within a power electronics module package will fail if the maximum junction temperature is not within the device's permissible maximum temperature rating specified by the manufacturer. Modern electronic miniaturization demands multi-chip module (MCM) packaging providing different semiconductor technology integration, reduced number of component interconnects, and lower power supply. But the huge amount of heat generated by each chip produces thermal coupling among devices, leading to an increase in the junction temperature. The power device specifications in the datasheet assume the devices being mounted on a suitable heatsink. Wide bandgap (WBG) devices like silicon carbide (SiC) devices can generally sustain a maximum junction temperature of about 175 °C – 200 °C. The junction temperature of the WBG devices becomes severe in a high-density high-power module. This highlights the need for a thermal management system to limit the maximum junction temperature within the device's permissible range. As a result, the power module needs to be connected to a heatsink to effectively increase the surface area of the heat dissipation junctions. A high conductivity material based heatsink extracts heat effectively from the module as the thermal resistance value remains low. In this paper, preliminary thermal analysis is done for a high density high-power module where the high in-plane thermal conductivity of thermal pyrolytic graphite (TPG) is exploited in substrate as well as heatsink designs. TPG brings down the junction temperature to a considerably lower level, leading to a safer power module functioning. This paper focuses on the design and proper alignment of the substrate and heatsink with respect to the module layout so that maximum junction temperature is reduced by proper heat extraction far below the operating temperature of the devices and also extent of reduction of the thermal coupling among the power devices placed next to each other on the same plane within the power module.
Innovative Panel Plating for Heterogeneous Integration
Authors: Boulanger Richard , Hander Jon , Moon Robert
Published: December 2019

Panel plating requirements are much more demanding as more applications migrate from silicon to panel assembly such as Panel Level Fan Out (PLFO) to leverage the large sizes of the panels. More recently, Heterogeneous Integration (HI) like Intel's Embedded Bridge (EMIB) or various other embedded die concepts are also pushing the boundary for typical panel structures. Line widths and spaces less than 10 Microns, thickness uniformity better than 10%, via topology free of voids and the same height as the redistribution lines are critical.

Traditional Panel plating tools are mostly for bulk processing and are not designed to handle these additional requirements. A new tool was required to overcome these challenges. An electroplating process with a single panel per reservoir approach is used. An overhead transporter brings the individual panels that have been pre-loaded in a rigid panel holder designed to handle large currents as well as reduce the warpage to a series of plating reservoirs as well as pre and post processing steps with the tool.

The first process is to reduce voiding by removing all air in a vacuum chamber and then inserting degassed water in the same chamber to “prewet” the panel. Panels are then typically immersed in an acid bath known as an activation step before processing in the plating cells. The plating cells are customized for each metal layer but often include a fine alignment feature, a current uniformity optimizing shield, multiple anode channels for dynamic uniformity along with an agitation mechanism to produce a uniform thin boundary layer at the panel surface. This whole mechanism needs to be very close to the panel, yet still allow some warpage typically associated with panel manufacturing.

This paper will demonstrate that it is possible to achieve better line density, bump thickness uniformity and void free vias to allow semiconductor like assembly for Heterogeneous Integration on a standard Printed Circuit Board (PCB) instead of more expensive semi additive processes or silicon interposers
Evaluation of die to organic laminate to PCB interconnects up to 50GHz
Authors: Bulumulla Selaka , Ramachandran Koushik
Published: December 2019

Ceramic substrates have traditionally been used in RF and microwave packaging applications because of the electrical properties at high frequencies. However, there is significant interest in using organic laminates due to its tighter wiring ground rules for high density packaging and lower cost of fabrication. The high frequency performance of interconnection from die to PCB using an organic packaging substrate has not yet been studied in detail. In this work, the interconnect performance of die to organic laminate to PCB up to 50 GHz was modeled and characterized using a test vehicle assembly. The test vehicle was specifically designed with test pads to characterize the interconnect performance at multiple levels of interconnection. A comparison study using a ceramic package substrate was also carried out. The modeling and hardware testing results from this study showed −3dB bandwidth of more than 50GHz for printed circuit board (PCB) to organic laminate and a bandwidth of 40GHz for the die to organic laminate to PCB interconnection. The results from this study showed that the organic laminate demonstrated a high frequency performance comparable to that of the ceramic substrate, which makes it suitable as a packaging substrate material for high frequency applications.
A Flexible Down-Converter for Satellite Communication in the Ka-Band
Authors: Uhlig Peter , Kulke Reinhard , Günner Carsten , Kassner Jürgen , Möllenbeck Gregor
Published: December 2019

Conventional communications satellites operate with fixed frequency, polarisation and coverage plans that are drawn up years before their launch during the payload definition phase. The satellite will typically be designed for a lifetime of more than fifteen years. During this operating period, changes in bandwidth requirements and the distribution of the service across its geographic coverage are more than likely. A new generation of communication satellites is expected to respond flexibly to these regional and temporal fluctuations in demand. The concept of cellular division of the coverage area and the coverage of these cells with spot beams in connection with the reuse of frequency bands enables this flexibility. The satellite's frequency plan has to be redefined throughout the mission lifetime via commands from the ground. The Flexible Down-Converter DOCON is one of the new components that allow satellite signals to be redistributed between service areas to flexibly reallocate the most critical spectrum resources as needed. DOCON is a flexible Ka-band down-converter from RF = 27.5 ... 30.0 GHz to IF = 17.7 ... 20.2 GHz designed for GEO communication satellites. The device includes the housing, DC-, RF-, and telemetry / tele-command interfaces. An Engineering Model (EM) in form, fit and function was successfully built and tested. The next stage, the Engineering Qualification Model (EQM), is currently in fabrication and will be qualified until end of 2019. The modular concept comprises hermetically sealed LTCC microwave modules as key building blocks. There are three of these LTCC-modules: the Local Oscillator Module (LOM), the Mixer Module (MXM), and the Variable Gain Module (VGM). Their function and realization shall be discussed in this paper.
Development of Backside Buried Metal Layer Technology for 3D-ICs
Authors: Watanabe Naoya , Araga Yuuki , Shimamoto Haruo , Kikuchi Katsuya , Nagata Makoto
Published: December 2019

In this study, we developed backside buried metal (BBM) layer technology for three-dimensional integrated circuits (3D-ICs). In this technology, a BBM layer for global power routing is introduced in the large vacant area on the backside of each chip and is parallelly connected with the frontside routing of the chip. The resistances of the power supply (VDD) and ground (VSS) lines consequently decrease. In addition, the BBM structure acts as a decoupling capacitor because it is buried in the Si substrate and has metal–insulator–silicon structure. Therefore, the impedance of power delivery network can be reduced by introducing the BBM layer.

The fabrication process of the BBM layer for 3D-ICs was simple and compatible with the via-last through-silicon via (TSV) process. With this process, it was possible to fabricate the BBM layer consisting of electroplated Cu (thickness: approximately 10 μm) buried in the backside of the CMOS chip (thickness: 43 μm), which was connected with the frontside routing of the chip using 9 μm-diameter TSVs.
Control of Void Formation in Adhesively Bonded Joints
Authors: Dytiuk Nina S. , Marinis Thomas F. , Soucy Joseph W.
Published: December 2019

Adhesively bonded joints are ubiquitous in electronic assemblies that are used in a wide range of applications, which include automotive, medical, military, space and communications. The steady drive to reduce the size of assemblies in all of these applications, while providing increased functionality, generates a need for adhesive joints of higher strength, improved thermal and electrical conductivity and better dielectric isolation. All of these attributes of adhesive joints are degraded by the presence of voids in them. The quest to minimize voids in bonded structures motivated this study of their formation in a solvent cast, die bond epoxy film, which undergoes a liquid phase transition during cure. Void formation is influenced by a number factors, which include wettability of the bonded surfaces, adsorbed water, amount of solvent retained in the film, volume of entrapped air, thermal profile of the cure schedule, and clamping pressure during cure. We have been exploring the interaction of these parameters and their impact on void retention in bonded joints with the aid of a moving boundary, finite difference model that tracks the movement of volatile species into and out of the void under diffusion control. The position of the void interface is updated at each discrete time step by integrating the product of the time step and flux of diffusing species over the area of the interface. The internal pressure of the void is determined by application of the Young-Laplace equation, while Henry's law is used to estimate the concentration of diffusing species adjacent to the void interface. The calculation proceeds for a time equivalent to the integral of the time temperature product required to achieve a 70% cure state of the adhesive, at which point the void interface is immobile. The adhesive we have chosen for this study is transparent in both the pre and post-cured states, so by sandwiching the material between glass slides we are able to observe void formation and evolution during cure. This allows us to directly observe the effects of various parameters for comparison with our predicted behavior.
Advanced Die Saw Technology for WLCSP Reliability Enhancement
Authors: Chen Ching Chia , Wang Yu-Po , Tsai Jensen , Chen Hsin Long
Published: December 2019

As consumer and portable devices get thinner and more functionality. Chips which are made by less than 28 nm node wafer with extreme Low-k (ELK) inter metal dielectric material is a trend in order to contain more transistors and to lower power consumption. However, side wall crack (SWC) for WLCSP is one of the major challenges since ELK layer getting brittle.

Laser grooving is applied to remove metal before blade saw, but the high temperature during laser grooving usually easily generates HAZ (heat-affected zone) which can induce stress concentration and lower chip strength. The laser ablation also leaves metal-silicon residue (or recast) from the re-deposition of silicon to the groove and surrounding areas. Therefore, SWC (sidewall crack) is a huge potential risk waiting to happen after pick and place, during shipment and during SMT process. In the industry, HAZ size and SWC rate could be reduced by adjusting process parameters, or by exploring new alternatives to eliminate HAZ and silicon recast is one of driving factors of this paper.

In this study, plasma etching was applied as surface treatment on the scribe line after laser grooving process with ELK wafer. Plasma could etch HAZ and recast area and expected to increase chip strength and reduce SWC rate. Plasma applied with various process time and power, and different types of mask coating materials were studied. Different plasma gases and effectiveness will be discussed.

Conventional blade dicing process will be compared to different plasma etching conditions for mechanical properties of die using 3-point bending test to check die strength, and SEM and OM to verify quality of sidewall of the die. Finally drop test was performed to confirm the reliability enhancement.
The Case of Failure Analysis of the PCBA Wire Corrosion under High Reliability Requirements
Authors: Zheng Jie , Zou Yabing , Yang Ying , Shen Jianghua , Zhang Yingjie
Published: December 2019

The wire breakage of a no-cleaning process PCBA occurs at the beginning of the application. Through visual inspection, cross-section, SEM & EDS, and ion chromatography analysis, it was found that the high content of ions (bromide ion) on the surface of the solder source side caused corrosion and fracture of the conductors of wave soldering surface, this article also analyzes the source of bromide ion and conclude the main factors involved in this type of failure.
Dust and Water Resistance Testing Methodology for Environmental Sensors
Authors: Kummerl S. , Mantle D. , Patel N. , Munje R. , Chen P.
Published: December 2019

This paper explores the “IEC standard 60529 International Protection Marking” also sometimes referenced as Ingress Protection Marking and how it applies to mobile and wearable electronics on a component level. The testing methodology used for an OCQFN (Open Cavity Quad Flatpack No-lead) humidity sensor will be evaluated including pass/fail criteria. The applicability of this standard has been developed to verify the robustness of finished mechanical assemblies intended to be put in static mounted applications but in this case has been adopted to verify the robustness of a semiconductor based sensor at a packaging level with accelerated pre-conditioning to predict the end of life performance.
A Study of Defects in High Reliability Die Sort Applications
Authors: Parrish Sarah
Published: December 2019

For high-reliability microelectronics with uses in aerospace, defense, automotive, and medical applications, in-line visual inspection during the die sort process allows for a higher quality and more robust process for generating known-good-die. The visual inspection serves three primary functions: verifying unique device characteristics (such as bumps, MEMS structures, waveguides, etc.), verifying the device is free from singulation defects, and verifying the die sort process induces no device damage. Performing a visual inspection of the die top surface and one edge during the pick and place process allowed qualification of a non-surface contact edge grip approach for sensitive surface MEMS and optoelectronic parts. Die 100 microns thick or less were also inspected to ensure no cracking during the die pick process. For continual process reliability improvement and optimization, the inspection results must be captured and logged along with incoming product details including the wafer ID, electrical test results, and chip ID. This logged information is then traceable to the die position in the output medium. As new device manufacturing technology is implemented, this screening for process-induced defects is required for a robust manufacturing process.
Impact of multi-dimensional vibration trajectories on quality and failure modes in ultrasonic bonding
Authors: Schemmel Reinhard , Eacock Florian , Dymel Collin , Hemsel Tobias , Hunstig Matthias , Brökelmann Michael , Sextro Walter
Published: December 2019

Ultrasonic joining is a common industrial process. To build electrical connections in the electronics industry, uni-axial and torsional ultrasonic vibration have been used to join different types of workpieces for decades. Many influencing factors like ultrasonic power, bond normal force, bond duration and frequency are known to have a high impact on bond quality and reliability. Multi-dimensional bonding has been investigated in the past to increase ultrasonic power and consequently bond strength. This contribution is focused on the comparison of circular, multi-frequency planar and uniaxial vibration trajectories used for ultrasonic bonding of copper pins on copper substrate. Bond quality was analyzed by shear tests, scanning acoustic microscopy and interface cross-sections.
High bond reliability of newly developed silver alloy bonding wire
Authors: Araki Noritoshi , Eto Motoki , Ohkabe Takumi , Haibara Teruo , Yamada Takashi , Oyamada Tetsuya , Uno Tomohiro
Published: December 2019

In this paper, a new type of silver (Ag) alloy bonding wire is introduced, and its bonding property and long term reliability are demonstrated. The new Ag wire, called GX2s, is developed as a cost-effective alternative to gold (Au) wire targeting at automotive electronics. The wire material is doped with added element, and its electrical resistivity is much lower than the conventional palladium (Pd) doped Ag wire. Highly accelerated stress test (HAST) and high temperature storage life (HTSL) test were carried out along with other bonding evaluations. The results show that GX2s has good bonding property and excellent long term bond reliability. Microstructural analyses of bond interface after the reliability tests were also conducted to investigate its improving mechanism. GX2s is a suitable alternative to Au wire for many applications including high temperature automotive devices.
“Drop-in” Conventional Reflow Oven Sinter-Able Pressure-Less Silver Paste for Die-Attach Assembly Mass Production
Authors: Chen Sihai , Wernicki Evan , Wright Sara , LaBarbera Christine , Lee Ning-Cheng
Published: December 2019

During the experiment, pressure-less silver sintering pastes that can sinter using a conventional reflow oven for die-attach applications were developed. This development makes it possible to produce die-attach assemblies in a continuous and high throughput fashion for mass production. Different reflow profiles such as “ramp-up and peak” and “ramp-up and plateau” types were tested and high shear strength joints with no voids were obtained. For each sample, the sintering time was around twelve minutes or less, which is about one order of the magnitude that is presently used for box oven sintering time. Two sintering pastes, A and B, were developed. Paste A has been used to study the relationship between processing conditions (reflow oven sintering temperature and atmosphere such as air vs nitrogen) and the die-attach structures (with varied substrate materials such as copper or active metal brazing (AMB) and surface metallization such as copper, silver, or gold). Under the same combined conditions of sintering temperature, atmosphere, and substrate type, the Ag metalized substrate gave the strongest joint shear strength. In comparison, Au metalized substrate displayed the weakest strength because of the formation of a “depletion layer” as a result of the diffusion of silver on gold surface, leaving behind a weak connection between sintered silver and Ag-Au layer. For the above noble metal metallized surfaces, sintering in air normally results in stronger joint shear strength than that in a nitrogen atmosphere. On the bare Cu metallized surface with nitrogen sintering, increasing the sintering temperature and changing to paste B are two ways to increase joint shear strength. Sintering on an AMB substrate displays around 10Mpa higher shear strength than that on a Cu substrate, indicating the importance of surface morphology. When sintering at 250°C in air, oxygen can help accelerate the inter-diffusion between Cu substrate and sintered Ag and enhance interfacial adhesion, increasing the shear strength. A higher sintering temperature reduces the adhesion due to the formation of large amounts of copper oxide; therefore, control of the optimum temperature range is key to obtaining a strong joint in air.
Advances in Hermetic Projection Weld Sealing
Authors: Salzer Tom
Published: December 2019

In this article, we describe a novel process for hermetic projection weld sealing of semiconductor devices, considered by many to be an important legacy technology from decades gone bye, but not particularly relevant in today's arsenal of sealing technologies. We will demonstrate that with appropriate modifications to be described, this technology can used to seal various high power devices as well as high reliability semiconductors, crystals, hybrid packages, medical electronics, photonic devices, automotive electronics, etc. Its features primarily stem from the fact that it can be used to quickly and efficiently produce true hermetic seals in components. The welding is so rapid, that it is essentially a room temperature technology and the equipment is small enough that it can be housed in an atmosphere controlled chamber filled with any gas that is not explosive. Air, Nitrogen, Argon, Helium and their mixtures are the most commonly utilized gasses. The process is so adiabatic that it can be used to seal many liquids also. In some applications the technology competes against pulsed laser welding, but unlike laser welding the entire seal takes place in a few milliseconds because it is a single discharge, component-shaped spot/projection weld, which means that the entire seam is made in a single high speed discharge. So, in the same time that it takes a laser welding machine to make one of the many small overlapping spot welds required to make a seal, the projection welder has completed the entire operation. This process results in minimal stress and distortion, and maximum hermetic properties, strength and reliability, without requiring electroplating or preforms. Because the weld involves the localized high speed melting of metals, it among the highest energy density processes. A concern with the earlier resistance welding technologies has been the expulsion of particulates, both out of, and into the seal. This expulsion has been systemic and becomes progressively worse as the package size increases. In the course of this presentation we will demonstrate how this concern has been dealt with and corrected. Internal dew points can be held to −40 degrees, or lower if required. Other common applications for this technology include sealing and welding of nuts and studs for hermetic applications and sealing of devices for medical applications that must endure autoclave sterilization. In the course of this presentation, we will take you back to the roots of the original resistance welding process as taught by the early process developers so that you will understand how things have changed, and the reasons for the changes.
An EMI Suppression Method in SiC Half-bridge Power Module Design
Authors: Wang Zhiwei , Zhang Chi , Yan Yiyang , Chen Cai , Kang Yong
Published: December 2019

This paper presents a 1200V/24A SiC half-bridge power module with ultra-low parasitic capacitance and inductance for low CM EMI. This module is improved from a stacked substrate hybrid packaging structure by optimizing the copper pattern. The parasitic capacitance reduction methods and the trade-off optimization for geometrical parameters are given. The parasitic capacitance of the output node is reduced by 70% compared to the original module. The parasitic capacitance and inductance of the proposed module are 6.8pF and 5.5nH respectively. The EMI simulation shows the proposed module can reduce CM EMI by about 9 dB, while the EMI test result shows a maximum of 6 dB reduction.
A Study on Reduced/Absent Adhesion/Cap Layers for Optimized BEOL RC Performance
Authors: Xu Dewei , Sun Zhiguo , Zhang Haojun , Pozder Scott , Justison Patrick , Kook Seung-Yeop , Augur Rod , Fox Robert
Published: December 2019

Lower RC delay is vital to achieve optimal and competitive circuit performance and hence drives the endlessly pursued BEOL integration scheme advancement. To date low-k dielectric materials, i.e., fluorine-doped oxides, carbon-doped oxide (SiCOH), to porous carbon-doped oxides (p-SiCOH) have been implemented. However, due to the process integration challenges with inherently weak low-k materials, the trend to pursue lower k dielectrics has come to a plateau as technology nodes scale down past 20/14nm. On the other hand, the trend of geometry layer thickness shrinking down, such as trench CD and height, via CD and height, etc., still continues for each advanced technology node. In the BEOL stack adhesion layers (oxide + gradient layers) (ALs) with higher k value were introduced to enhance interface adhesion strength between SiCOH/p-SiCOH and dielectric cap film (SiCN), which offset the intrinsic RC benefit from low-k dielectric material. At more advanced nodes and beyond, the combined ALs and cap film could be up to via or trench height, which poses a huge challenge to meet desired RC performance and technology node scaling. Therefore, the thickness reduction of ALs and cap film becomes necessary for further technology node scaling.

In this study, samples with interfacial full ALs, reduced ALs and bulk only (no ALs) for p-SiCOH (k=2.75) on various cap films were prepared, such as SiCN, SiCN/ODC, SiCN/AlONx, etc. TOF-SIMS analyses was used to confirm the composition of the dielectric stacks and later check the debonded surface morphology. Four-point bend adhesion tests were conducted to evaluate interfacial adhesion strength. Results show the interfacial adhesion strength on samples with reduced Als and bulk only (no ALs) is dropped by ~20% and ~30%, respectively. Additional ODC layer on top of SiCN would increase the interfacial adhesion strength by ~10%. It is suggested that reduced ALs may be adequate to satisfy overall CPI requirement for the BEOL integration scheme of p-SiCOH on advanced dielectric cap films (AlN + ODC). The coupling capacitance reduction for a combined reduced ALs and advanced dielectric cap can be up to 16% at M0 level and 10% at Mx level for a 40nm metal pitch.
The hyperkähler metric on the almost-Fuchsian moduli space
Authors: Trautwein Samuel
Published: December 2019

Donaldson [11] constructed a hyperkähler moduli space

\mathcal{M}

associated to a closed oriented surface

\Sigma

with genus

(\Sigma) \geq 2

. This embeds naturally into the cotangent bundle

T^*\mathcal T(\Sigma)

of Teichmüller space or can be identified with the almost-Fuchsian moduli space associated to

\Sigma

. The latter is the moduli space of quasi-Fuchsian threefolds which contain a unique incompressible minimal surface with principal curvatures in

(-1,1)

.

Donaldson outlined various remarkable properties of this moduli space for which we provide complete proofs in this paper: On the cotangent-bundle of Teichmüller space, the hyperkähler structure on

\mathcal M

can be viewed as the Feix–Kaledin hyperkähler extension of the Weil–Petersson metric. The almost-Fuchsian moduli space embeds into the SL

(2,\mathbb C)

-representation variety of

\Sigma

and the hyperkähler structure on

\mathcal M

extends the Goldman holomorphic symplectic structure. Here, the natural complex structure corresponds to the second complex structure in the first picture. Moreover, the area of the minimal surface in an almost-Fuchsian manifold provides a kähler potential for the hyperkähler metric.

The various identifications are obtained using the work of Uhlenbeck [33] on germs of hyperbolic 3-manifolds, an explicit map from

\mathcal M

to

\mathcal T(\Sigma)\times \overline{\mathcal T(\Sigma)}

found by Hodge [20], the simultaneous uniformization theorem of Bers [2], and the theory of Higgs bundles introduced by Hitchin [18].
Mini-Workshop: Positional Games
Authors: Hefetz Dan , Krivelevich Michael , Stojakovic Milos , Szabo Tibor
Published: December 2019

This mini-workshop focused on Positional Games and related fields. Positional Games Theory is a branch of Combinatorics whose main aim is to systematically develop an extensive mathematical basis for a variety of two-player games of perfect information and without chance moves, usually played on discrete objects. These include popular recreational games such as Tic-Tac-Toe and Hex as well as purely abstract games played on graphs and hypergraphs. Though a close relative of the classical Game Theory of von Neumann and of Nim-like games, popularized by Conway and others, Positional Games are quite different and are more of a combinatorial nature. The subject is strongly related to several other branches of Combinatorics like Ramsey Theory, Extremal Graph and Set Theory, and the Probabilistic Method. It has also proven to be instrumental in deriving central results in Theoretical Computer Science, in particular in derandomization and algorithmization of important probabilistic tools. Despite being a relatively young topic, there are already three textbooks dedicated to Positional Games as well as one invited talk at the International Congress of Mathematicians. During this mini-workshop, several new exciting developments in the field were presented and discussed. We have also made some progress towards solving various open problems in Positional Games Theory and related areas.
Arbeitsgemeinschaft: Rigidity of Stationary Measure
Authors: Benoist Yves , Quint Jean-François
Published: December 2019

The aim of this Arbeitsgemeinschaft was to understand the classification of stationary measures for semisimple random walks on a finite volume homogeneous space and its applications as described in the two papers [1] and [2].
Stability of Inactivated Influenza Vaccine in Polypropylene Syringes under Various Storage Conditions
Authors: Tabbara Najla , Brown Martha , McGeer Allison , Wyllie Andrew
Published: December 2019

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Revitalización del antiguo claustro del Palau-Castell de Betxí (Castellón), España
Authors: Solaz Fuster Eduardo J. , Herrero Vicent Pasqual , Sebastiá Esteve María Amparo , Morro Peña Anna , Muñoz Macián Víctor , Navarro Carmona Fernando , Juan Osa Yasmina , Pitarch Roig María , Piñó Alcaide Francisco , Juanes Herrera Sara
Published: December 2019

Después de permanecer más de 40 años cerrado, el Palau-Castell de Betxí requería de una actuación inmediata para su recuperación y puesta en valor que ha sido posible gracias a contar un Plan Director, una herramienta de gestión ágil del patrimonio que marca unos criterios generales de intervención y establece una serie de fases independientes y coordinadas para una rehabilitación paulatina y flexible. El artículo expone la evolución histórica del edificio para comprender el valor de todas sus diferentes etapas, los criterios utilizados, la definición de sus fases y las actuaciones llevadas a cabo hasta la fecha.
On Comparison, Equivalence and Addition of Magnitudes
Authors: Veloso Paulo A. , Lassalle-Casanave Abel , Giovannini Eduardo N.
Published: December 2019

A theory of magnitudes involves criteria for their comparison, equivalence and addition. We examine these aspects from an abstract viewpoint, stressing independence and definability. These considerations are triggered by the so-called De Zolt’s principle in the theory of equivalence of plane polygons.
Toward a variational assimilation of polarimetric radar observation
in a convective scale NWP model
Authors: Thomas Guillaume , Mahfouf Jean-François , Montmerle Thibaut
Published: December 2019

Abstract. This paper presents the potential of non-linear and linear versions of an observation operator for simulating polarimetric variables observed by weather radars. These variables, deduced from the horizontally and vertically polarised backscattered radiations, give information about the shape, the phase and the distributions of hydrometeors. Different studies in observation space are presented, as a first step toward their inclusion in a variational data assimilation context, which is not treated here. Input variables are prognostic variables forecasted by the AROME-France Numerical Weather Prediction (NWP) model at convective scale, including liquid and solid hydrometeor contents. A non-linear observation operator, based on the T-matrix method, allows to simulate the horizontal and the vertical reflectivities (ZHH and ZVV), the differential reflectivity ZDR, the specific differential phase KDP and the copolar correlation coefficient ρHV. To assess the uncertainty of such simulations, perturbations have been applied on input parameters of the operator, such as dielectric constant, shape and orientation of the scatterers. Statistics of innovations, defined by the difference between simulated and observed values, are then performed. After some specific filtering procedures, shapes close to Gaussian have been found for both reflectivities and for ZDR, contrarily to KDP and ρHV. A linearised version of this observation operator has been obtained by its Jacobian matrix estimated with the finite difference method. This step allows to study the sensitivity of polarimetric variables to hydrometeor content perturbations, in the model geometry as well as in the radar one. The polarimetric variables ZHH and ZDR appear to be good candidates for hydrometeor initialisation, while KDP seems to be useful only for rain contents. Due to the weak sensitivity of ρHV, its use in data assimilation is expected to be very challenging.
Long-term trends in pH in Japanese coastal seawater
Authors: Ishizu Miho , Miyazawa Yasumasa , Tsunoda Tomohiko , Ono Tsuneo
Published: December 2019

Abstract. In recent decades, acidification of the open ocean has shown a consistent
increase. However, analysis of long-term data in coastal seawater shows
that the pH is highly variable because of coastal processes and
anthropogenic carbon inputs. It is therefore important to understand how
anthropogenic carbon inputs and other natural or anthropogenic factors
influence the temporal trends in pH in coastal seawater. Using water quality
data collected at 289 monitoring sites as part of the Water Pollution
Control Program, we evaluated the long-term trends of the pHinsitu in
Japanese coastal seawater at ambient temperature from 1978 to 2009. We found
that the annual maximum pHinsitu, which generally represents the pH of
surface waters in winter, had decreased at 75 % of the sites but had
increased at the remaining sites. The temporal trend in the annual minimum
pHinsitu, which generally represents the pH of subsurface water in
summer, also showed a similar distribution, although it was relatively
difficult to interpret the trends of annual minimum pHinsitu because
the sampling depths differed between the stations. The annual maximum
pHinsitu decreased at an average rate of −0.0024 yr−1, with
relatively large deviations (0.0042 yr−1) from the average value.
Detailed analysis suggested that the decrease in pH was caused partly by
warming of winter surface waters in Japanese coastal seawater. The pH, when
normalized to 25 ∘C, however, showed decreasing trends, suggesting
that dissolved inorganic carbon from anthropogenic sources is increasing in
Japanese coastal seawater.
Major role of ammonia-oxidizing bacteria in N2O production in the Pearl River estuary
Authors: Ma Li , Lin Hua , Xie Xiabing , Dai Minhan , Zhang Yao
Published: December 2019

Abstract. Nitrous oxide (N2O) has significant global warming
potential as a greenhouse gas. Estuarine and coastal regimes are the major
zones of N2O production in the marine system. However, knowledge on
biological sources of N2O in estuarine ecosystems remains controversial but is of great importance for understanding global N2O emission
patterns. Here, we measured concentrations and isotopic compositions of
N2O as well as distributions of ammonia-oxidizing bacterial and
archaeal amoA and denitrifier nirS genes by quantitative polymerase chain reaction
along a salinity gradient in the Pearl River estuary, and we performed in situ
incubation experiments to estimate N2O yields. Our results indicated
that nitrification predominantly occurred, with significant N2O
production during ammonia oxidation. In the hypoxic waters of the upper
estuary, strong nitrification resulted in the observed maximum N2O and
ΔN2Oexcess concentrations, although minor denitrification
might be concurrent at the site with the lowest dissolved oxygen.
Ammonia-oxidizing β-proteobacteria (AOB) were significantly
positively correlated with all N2O-related parameters, although their amoA
gene abundances were distinctly lower than ammonia-oxidizing archaea (AOA)
throughout the estuary. Furthermore, the N2O production rate and the
N2O yield normalized to amoA gene copies or transcripts estimated a higher
relative contribution of AOB to the N2O production in the upper
estuary. Taken together, the in situ incubation experiments, N2O
isotopic composition and concentrations, and gene datasets suggested that
the high concentration of N2O (oversaturated) is mainly produced from
strong nitrification by the relatively high abundance of AOB in the upper
reaches and is the major source of N2O emitted to the atmosphere in the Pearl River estuary.