bluuebunny/crossref_metadata_2025 huggingface dataset:
An approach towards information systems with very large numbers of subscribers
Authors: Creutz G. , Kiel F.
Published: January 2007

The Federal Ministry of Research and Technology (BMFT) took the initiative in starting a project concerning two-way cable television in 1976 at the Heinrich-Hertz-Institute. The two-way cable television provided a model for investigating the possibilities of new screen-orientated, interactive systems for large numbers of subscribers using alpha-numerics, graphics, motion-pictures, and sound.

One of the most important research aspects proved to be the construction of a computer control centre which would cater for this type of hybrid information system.

At present a laboratory model of such a control centre is being developed by the Heinrich-Hertz-Institute in collaboration with the Computer Industry. This model is based on a mini-computer multi-processor system.
Hierarchical microprogram generating system
Authors: Tamura Eiji , Tokoro Mario
Published: January 2007

A general purpose microprogram generating system has been developed to compose, together with a hardware/microprogram debugger, a general purpose development support system for LSI Processor Modules such as Am2900, MMI6700, and/or MACROLOGIC. The microprogram generator, designed to be applicable to a wide variety of microinstruction sets from vertical to horizontal including sophisticated control schemes like pipelining, has a three-level hierarchical structure. The lowest level generator is a microassembler, which has already been applied to many computers and shown its easiness of defining instructon sets and high-speed generation of object microcodes. The second level generator is an optimizing assembler, which translates a sequence of microoperations to an optimum sequence of microinstructions considering data dependency and concurrent executability of microoperations on a defined object machine. The highest level generator is the high-level microprogramming language compiler which generates an optimum sequence of microoperations utilizing techniques of optimization for high-level language compilers. Example definitions of a microinstruction set and an object machine, source programs, and object listings show the effectiveness of the hierarchical microprogram generating system.
High level language programs run ten times faster in microstore
Authors: Baker Henry G. , Parker Clinton
Published: January 2007

A true microcode compiler for a minicomputer is described which translates an algebraic language directly into executable microcode. The compiler performs extensive optimization and produces code which is a good compromise between speed and size.

This compiler was produced in order to make user microprogramming more accessible to the applications programmer. Several representative programs were compiled, and their run time improved by a factor of ten, on the average.
Using an oracle to measure potential parallelism in single instruction stream programs
Authors: Nicolau Alexandru , Fisher Joseph A.
Published: January 2007

Horizontally microprogrammable CPUs belong to a class of machines having statically schedulable parallel instruction execution (SPIE machines). Several experiments have shown that within basic blocks, real code only gives a potential speed-up factor of 2 or 3 when compacted for SPIE machines, even in the presence of unlimited hardware. In this paper, similar experiments are described. However, these measure the potential parallelism available using any global compaction method, that is, one which compacts code beyond block boundaries. Global compaction is a subject of current investigation; no measurements yet exist on implemented systems.

The approach taken is to first assume that an oracle is available during compaction. This oracle can resolve all dynamic considerations in advance, giving us the ability to find the maximum parallelism available without reformulation of the algorithm. The parallelism found is constrained only by legitimate data dependencies, since questions of conditional jump directions and unresolved indirect memory references are answered by the oracle. Using such an oracle, we find that typical scientific programs may be sped up by anywhere from 3 to 1000 times. These dramatic results provide an upper bound for global compaction techniques. We describe experiments in progress which attempt to limit the oracle progressively, with the aim of eventually producing one which provides only information that may be obtained by a very good compiler. This will give us a more practical measure of the parallelism potentially obtainable via global compaction methods.
Some scheduling techniques and an easily schedulable horizontal architecture for high performance scientific computing
Authors: Rau B. R. , Glaeser C. D.
Published: January 2007

Horizontal architectures are attractive for cost-effective, high performance scientific computing. They are, however, very difficult to schedule. Consequently, it is difficult to develop compilers that can generate efficient code for such architectures. The polycyclic architecture has been developed specifically to make the task of scheduling easy. As a result, it has been possible to develop a powerful scheduling algorithm that yields optimal and near-optimal schedules for iterative computations. This novel architecture and this scheduling algorithm are the topic of this paper.
UDSYS a microcode development system
Authors: Beauchamp Robert W. , Firth Neal R.
Published: January 2007

This paper describes a microcode development system called UDSYS that is currently in use at Data General Corporation across several radically different micro-architectures. The system was developed to overcome some of the deficiencies of meta-assemblers, namely, one-to-one meaning of symbols vs. action, lack of rigorous syntax verification, and lack of application specific error messages. The system is explained by way of a specific example about the sequencer portion of a hypothetical microword.

Microcoding is slowly loosing its status as an artform. Many of the tools available for increasing the productivity of software engineers are now starting to become available for the generation of microcode. There is work being done on machine independent microcoding languages, microcode generators, and microcode optimizers to name but a few such tools. However, many of these tools are still in the developmental stages. At Data General, our current microcode production system took the approach of leaving the optimization in the hands of the coder, but giving him the capability of building a very friendly interface to the hardware.

The system is called UDSYS and this paper presents an overview of some of its major concepts and features.
Defensive microprogramming
Authors: Wang David T.
Published: January 2007

Defensive microprogramming is advocated for individual microprogrammers. Defensive measures, through proper documentation and adequate communication, will produce quality work and in effect provide protection. The use of this technique promises to make testing and maintenance of microprogram simple and easy.
A VLSI view of microprogrammed system design
Authors: Li Tientien
Published: January 2007

In this paper, the possible effects of VLSI technology on the design and development process of microprogrammed systems are explored. The function architectures of future microprogrammed VLSI systems are expected to be very complex, and most of them will be implemented as heterogeneous multiprocessors with each processor being microprogrammed to perform specific tasks. Current microprogrammed system design methodologies are examined and are shown to be inadequate. A new design methodology employing a synthetic approach for developing microprogrammed systems is proposed.
Phase coupling and constant generation in an optimizing microcode compiler
Authors: Vegdahl Steven R.
Published: January 2007

The designer of an optimizing compiler must concern himself with the order in which optimization phases are performed; a pair of phases may be interdependent in the sense that each phase could benefit from information produced by the other. In a compiler for a horizontal target architecture, one such phase-ordering problem occurs between
code-generation
and
compaction
. Presented here is an overview of a research effort at Carnegie-Mellon University which has examined solutions to this problem. One aspect of the code generation problem-that of generating constants “intelligently”-is discussed in detail. A technique, called
constant-unfolding
, is described that can be used to produce code sequences that generate constants in “unusual” ways during execution; such code sequences can lead to more compact code when the literal field of the microinstruction is a “bottleneck”.
A microprogrammed implementation of an architecture simulation language
Authors: Hopkins William C. , Davidian Gary
Published: January 2007

A “Machine Representation Language” (MRL), a tool for the evaluation and simulation of the instruction sets of computers, was designed for research in computer architecture. A novel hypothetical machine to perform the simulation uses an acyclic directed graph as its machine language. MRL requires an expandable associative memory and a recursive execution environment; the research requires extensive instrumentation of the simulation. A microprogrammed implementation satisfying these requirements was completed on the Burroughs B1700 within an academic semester. Comparisons of implementation techniques and performance between the microprogrammed system and a developmental system using Snobol-4 show the utility and efficiency of the approach.
Algorithms for a self-tuning microprogrammed computer
Authors: El-Ayat K. A. , Howard J. A.
Published: January 2007

Manual tuning techniques are widely applied but are generally slow, costly and require a great deal of expertise. This paper addresses the problem of automatically tuning the virtual architecture of a microprogrammed computer by microprogramming techniques. Two algorithms are presented to automate the tuning process. The algorithms are implemented on the same dynamic microprogrammed computer that executes the given application. After execution of the program the algorithms are invoked and a tuning iteration performed on the architecture and the program. Several tuning iterations are performed with different data sets over a period of time to select the optimized architecture. It is demonstrated that individual code segments experience a 2-8 speed improvement over their corresponding non-tuned versions, while the overall execution time of the program is reduced by 30-45%. The computational requirements of the algorithms are shown to be very modest.
Operating system enhancement through firmware
Authors: Brown George E. , Eckhouse Richard , Estabrook Jay
Published: January 2007

Microprogramming support for the enhancement of operating system design is described in detail, organization structure of realtime operating systems are examined, and criteria proposed for determining which functions are best for firmware implementation. Also, a closed queueing network model with state dependent routing probabilities is developed for studying the impact of microprogramming on a tactical computer system performance. Based on measurement obtained from two applications, the mathematical model is a good approximation in predicting system performance. Avenues for additional research is recommended.
On the packing of micro-operations into micro-instruction words
Authors: Wood Graham
Published: January 2007

This paper discusses the problem of packing a serially expressed straight line segment of micro-program into micro-instruction words of a particular format. It outlines and compares the methods that have been proposed to solve particular instances of the problem and describes a program written to solve the general case.
Levels of representation of programs and the architecture of universal host machines
Authors: Rau B. Ramakrishna
Published: January 2007

The issue of high level language support is treated in a systematic top-down manner. Program representations are categorized into three classes with respect to a host processor: high level representations, directly interpretable representations and directly executable representations. The space of intermediate languages for high level language support is explored and it is shown that whereas the ideal intermediate language from the point of view of execution time is a directly executable one, the best candidate from the viewpoint of memory requirements is a heavily encoded directly interpretable representation. The concept of dynamic translation is advanced as a means for achieving both goals simultaneously; the program is present in the memory in a compact static representation, but its working set is maintained in a dynamic representation which minimizes execution time. The architecture and organization of a universal host machine, incorporating this strategy, is outlined and the potential performance gains due to dynamic translation are studied.
Experience with a microprogrammed Interlisp system
Authors: Deutsch L. Peter
Published: January 2007

This paper presents the design of an Interlisp system running on a microprogrammed minicomputer. We discuss the constraints imposed by compatibility requirements and by the hardware, the important design decisions, and the most prominent successes and failures of our design, and offer some suggestions for future designers of small Lisp systems.

This extended abstract contains only qualitative results. Supporting measurement data will be presented at MICRO-11.
Design objectives for high level microprogramming languages
Authors: Malik Kamran , Lewis Ted
Published: January 2007

The primitive operations of a high level language for producing emulators is shown to include special purpose features specific to virtual machine implementation. A Hierarchy of data types, short reliable language constructs, and control structures that minimize emulator complexity are suggested by a goal-directed, structured design methodology. In addition, structural “clues” generated by the language compiler assist in producing portable, yet efficient horizontal micro code for partially-encoded host architectures.
An experimental investigation of scheduling strategies for UNIX
Authors: Peachey Darwyn R. , Bunt Richard B. , Williamson Carey L. , Brecht Tim B.
Published: January 2007

The scheduler used in an operating system is an important factor in the performance of the system under heavy load. This paper describes the scheduling philosophy employed in the UNIX operating system and outlines the standard scheduling strategies. Modified strategies which address deficiencies in the standard strategies are described. The effectiveness of these modified strategies is assessed by means of performance experiments.
Program page reference patterns
Authors: Hagmann Robert B. , Fabry Robert S.
Published: January 2007

This paper describes a set of measurements of the memory reference patterns of some programs. The technique used to obtain these measurements is unusually efficient. The data is presented in graphical form to allow the reader to "see" how the program uses memory. Constant use of a page and sequential access of memory are easily observed. An attempt is made to classify the programs based on their referencing behavior. From this analysis it is hoped that the reader will gain some insights as to the effectiveness of various memory management policies.
Workload characterization and performance evaluation in a research environment
Authors: Hodges Larry F. , Stewart William J.
Published: January 2007

This paper describes the process of bench-marking the diverse research environment that constitutes the workload of VAX/VMS at the University Analysis and Control Center at North Carolina State University. The benchmarking process began with a study of the system load and performance characteristics over the six-month period from January to June of 1981. Statistics were compiled on the number of active users, CPU usage by individual accounts, and peak load periods. Individual users were interviewed to determine the nature and major computing characteristics of the research they were conducting on VAX. Information from all sources was compiled to produce a benchmark that closely paralleled actual system activity.

An analytic model was introduced and used in conjunction with the benchmark data and hardware characteristics to derive performance measures for the system. Comparisons with measured system performance were conducted to demonstrate the accuracy of the model. The model was then employed to predict performance as the system workload was increased, to suggest improvements for the system, and to examine the effects of those improvements.
The Mesa Spy
Authors: McDaniel Gene
Published: January 2007

The Spy is a performance evaluation tool for the Mesa environment that uses a new extention to the PC sampling technique. The data collection process can use information in the run time call stack to determine what code is responsible for the resources being consumed. The Spy avoids perturbing the user environment when it executes, provides symbolic output at the source-language level, and can be used without recompiling the program to be examined. Depending upon how much complication the user asks for during data collection, the Spy steals between .3% and 1.8% of the cycles of a fast machine, and between 1.08% and 35.9% of the cycles on a slow machine.
A data base replication analysis using an M/M/m queue with service interruptions
Authors: Baccelli F. , Coffman E. G.
Published: January 2007

A study of file replication policies for distributed data bases will be approached through the analysis of an M/M/m queue subjected to state-independent, preemptive interruptions of service. The durations of periods of interruption constitute a sequence of independent, identically distributed random variables. Independently, the times measured from the termination of one period of interruption to the beginning of the next form a sequence of independent, exponentially distributed random variables. Preempted customers resume service at the terminations of interrupt periods.
Modelling of the parallel resolution of a numerical problem on a locally distributed computing system
Authors: Plateau Brigitte , Staphylopatis Andreas
Published: January 2007

Modern VLSI technology has enabled the development of high-speed computing systems, based upon various multiprocessor architecture [1]. We can distinguish several types of such systems, depending on the control policies adopted, the interprocessor communication modes and the degree of ressource-sharing. The efficiency of parallel processing may be significant in various areas of computer applications; especially, large numerical applications, such as the solution of linear systems and differential equations, are marked by the need of high computation speeds. So, the advance of parallel processing systems goes together with research effort in developping efficient parallel algorithms [2]. The implementation of parallel algorithms concerne the execution of concurrent processes, assigned to the processors of the system, which communicate with each other. The syncronization needed at process interaction points implies the existence of waiting delays, which constitute the main limiting factor of parallel computation. Several modelling techniques have been developped, that allow the prediction and verification of parallel systems performance. The two general approaches followed concern deterministic models [3] and probabilistic models. The latter, based on the theory of stochastic processes [5]... are well adapted to the analysis of complex variable phenomena and provide important measures concerning several aspects of parallel processing.
Modeling I/O systems with dynamic path selection, and general transmission networks
Authors: Bard Yonathan
Published: January 2007

This paper examines general transmission networks, of which I/O subsystems are a special case. By using the maximum entropy principle, we answer questions such as what is the probability that a path to a given node is free when that node is ready to transmit. Systems with both dynamic and fixed path selection mechanisms are treated. Approximate methods for large networks are proposed, and numerical examples are given.
Performance analysis of software for an MIMD computer
Authors: Smith Connie U. , Loendorf David D.
Published: January 2007

This paper presents a technique for modeling and analyzing the performance of software for an MIMD (Multiple Instruction Multiple Data) computer. The models can be used as an alternative to experimentation for the evaluation of various algorithms and different degrees of parallelism. They can also be used to study the tradeoffs involved in increasing the amount of parallel computation at the expense of increased overhead for synchronization and communication. The detection and alleviation of performance bottlenecks is facilitated.
Performance bound hierarchies for queueing networks
Authors: Eager D. L. , Sevcik K. C.
Published: January 2007

In applications of queueing network models to computer system performance prediction, the computational effort required to obtain an exact equilibrium solution of a model may not be justified by the accuracy actually required. In these cases, there is a need for approximation or bounding techniques that can provide the necessary information at reduced cost. This paper presents Performance Bound Hierarchies (PBHs) for single class separable queueing networks consisting of fixed rate and delay service centers. A PBH consists of a hierarchy of upper (pessimistic) or lower (optimistic) bounds on mean system residence time. (The bounds can also be expressed as bounds on system throughput or center utilizations.) Each successive member requires more computational effort, and in the limit, the bounds converge to the exact solution.
A model of transport level flow control
Authors: Harbitter Alan , Tripathi Satish K.
Published: January 2007

A Markov Decision Process model is developed to analyze buffer assignment at the transport level of the ARPAnet protocol. The result of the analysis is a method for obtaining an assignment policy which is optimal with respect to a delay/throughput/overhead reward function. The nature of the optimal policy is investigated by varying parameters of the reward.
Web accessibility highlights and trends
Authors: Brewer Judy
Published: January 2007

This article describes work of the Web Accessibility Initiative (WAI) at the World Wide Web Consortium (W3C). It highlights recent developments, issues, and trends which can affect the progress of Web accessibility.
Not seeing the roots for the branches
Authors: Jeffrey D. J. , Norman A. C.
Published: January 2007

We discuss the multiple definitions of multivalued functions and their suitability for computer algebra systems. We focus the discussion by taking one specific problem and considering how it is solved using different definitions. Our example problem is the classical one of calculating the roots of a cubic polynomial from the Cardano formulae, which contain fractional powers. We show that some definitions of these functions result in formulae that are correct only in the sense that they give candidates for solutions; these candidates must then be tested. Formulae that are based on single-valued functions, in contrast, are efficient and direct.
On the size of minimal blocking sets of Q(4;q), forq= 5,7
Authors: De Beule J. , Hoogewijs A. , Storme L.
Published: January 2007

Let Q(2n + 2;q) denote the non-singular parabolic quadric in the projective geometry PG(2n+ 2;q). We describe the implementation in GAP of an algorithm to study the problem of the minimal number of points of a minimal blocking set, different from an ovoid, of Q(4;q), forq= 5; 7.
SIGIR 2004 workshop
Authors: Harman Donna , Buckley Chris
Published: January 2007

Current statistical approaches to IR have shown themselves to be effective and reliable in both research and commercial settings. However, experimental environments such as TREC show that retrieval results vary widely according to both topic (question asked) and system. This is true for both the basic IR systems and for any of the more advanced implementations using, for example, query expansion. Some retrieval approaches work well on one topic but poorly on a second, while other approaches may work poorly on the first topic, but succeed on the second. If it could be determined in advance which approach would work well, then a guided approach could strongly improve performance. Unfortunately, despite many efforts no one knows how to choose good approaches on a per topic basis.
Software unit profiles & Kiviat figures
Authors: Kolence Kenneth W. , Kiviat Philip J.
Published: January 2007

In the June, 1973 issue of the
Performance Evaluation Review
, the concept of using circular graphs (called Kiviat graphs by Kolence) to present system performance data was introduced in the column
The Software Empiricist
. In this article we wish to report on some recent work in using such graphs to present system and program profiles in a strikingly visual way of potential use to all practitioners of computer measurement. In discussing this data, we find it necessary to comment on the meaning of the variables used for such profiles in a way which also should be of interest to practitioners.
Software reliability modeling
Authors: Musa J. D. , Iannino A.
Published: January 2007

Estimation of software reliability quantities has traditionally been based on stable programs; i.e., programs that are completely integrated and are not undergoing design changes. Also, it is ordinarily assumed that all code is being executed at one time or another and that test or operational results are being completely inspected for failures. This paper describes a method for relaxing the foregoing conditions by adjusting the lengths of the intervals between failures experienced as compensation. The resulting set of failure intervals represents the set that would have occurred for a completely inspected program that was at all times in its final configuration. The failure intervals are then processed as they would be for a stable program. The approach is developed for the execution time theory of software reliability, but the concepts could be applied to many other models as well. Many definitions are given to describe program size variation and associated phenomena. Attention is focused on the special case of sequential integration and pure growth. The adjustment method is described and its benefits in improving the estimation of quantities of interest to the software manager are illustrated.
Characteristics of the COX-distribution
Authors: Augustin Reinhard , Büscher Klaus-Jürgen
Published: January 2007

This study presents a new approach to analyse the COX-distribution, which is often used in computer systems performance evaluation to describe random variables, e.g. service times. Taking aside special cases, however, there are only few published results on the characteristics of this distribution, like moments and central moments. Further-on procedures are given to calculate the parameters of a COX-distribution from its characteristics, which might be known as a result of measurements of a real system.
The cognitive model
Authors: Saja Allan D.
Published: January 2007

People are continually creating and accessing internal representations of their current situation. I refer to this as their cognitive model. During an interaction with a computer system the person will form a cognitive model of the interaction that contains what he believes are the functions, capabilities and limitations of the system. An invalid or missing cognitive model will lead to user dis-satisfaction, a lack of confidence in the system and, hence, inefficient use of the system and human resources. The user interface, which includes off-line and on-line methods, is the link between the designer's conceptual model of the system's functions, capabilities and limitations and the user's cognitive model. The interface must present the system to the user in such a manner as to guide the user's cognitive model development to where it coincides with the designer's conceptual model. Awareness of the user's developing cognitive model will enable the production of a more effective human-computer interface.
Classifying the user
Authors: Mac an Airchinnigh Mícheál
Published: January 2007

One of the most active areas of current research in computer science is directly related to the actual and supposed behaviour of the so-called user. A measure of the importance of the user in the computer system may be estimated by the growth of the disciplines of 'Software Psychology' and 'Human Factors' (or 'Ergonomics'). It is customary to speak about the user, often with qualifications such as casual, naive, expert, etc. Such a generic term covers users from the systems programmer on the one hand to the casual SPSS user on the other. Hansen's famous principle "Know the User" [HANS71] seems, at first glance, to be an obvious piece of advice to the interactive systems designer. But when we realize that the user is human and we want to build a formal model of the user, then the aforementioned advice is very difficult to follow.In the Department of Computer Science we are engaged in research related to the user-computer interface with specific applications in the areas of OSCRLs (Operating System Command and Response Languages) and interactive computer graphics. One of the key ideas, around which a formal model of the user is being constructed, is that of the so-called user's conceptual model. The development of the formal model of the user is intended to provide knowledge base support for research in the domain of user-computer interaction. Because of its richness and inherently interactive nature, the INTERLISP programming enviroment was chosen to provide the necessary computer support for the research.The structure of the knowledge base is built on Minsky's concept of a frame [MINS75], which encapsulates the notion of a 'chunk' of knowledge. The frame also provides a convenient (and readable) semi-formalism in which to communicate the formal model of the user. Since any discussion of the user is bound to use a lot of 'vague' ideas and concepts, it seemed appropriate to rely on Fuzzy Set theory for some of the necessary mathematical support.
A personal view of natural language understanding
Authors: Woods W. A.
Published: January 2007

For many years, I have been pursuing a long-range research objective in the area of natural language understanding for man-machine communication, an objective that I share with many of my colleagues. The objective is to develop the capability for people to interact directly in fluent natural language with a computer system for support of some decision making task they are involved in. Specifically, I am concerned with the use of natural language to manipulate data retrieval and display capabilities to enable a decision-maker to obtain a grasp of an overall situation in the face of an overwhelming availability of low level data. Such a system must give concise answers to specific high-level questions posed by the decision-maker within a small number of seconds in most cases.
TESSA - the ESsex syntactic analyser
Authors: Soul Michael
Published: January 2007

The program TESSA is a two-pass syntactic analyser based on the parser of Winograd's SHRDLU. We wanted to see how dependent the success of the parsing in SHRDLU was on the restriction of the subject matter. The implementation was based on the description in the book (Winograd 1972), with considerable reference to textbooks of grammar and other linguistic material. The program was then further modified and extended to analyse sentences in a corpus obtained from children's books.
A knowledge base organization for rules about programming
Authors: Barstow David
Published: January 2007

PECOS is a knowledge-based system for automatic program synthesis. Programs are specified as abstract algorithms in a high-level language for symbolic computation. Through the successive application of programming rules, the specification is gradually refined into a concrete implementation in the target language. The existence of several rules for the same task permits the construction of a variety of distinct programs from a single initial specification. Internally, program descriptions are represented as collections of nodes, each labeled with a programming concept and with other properties related to that concept. The refinement process is guided by the selection and application of rules about programming. These rules are stated as condition-action pairs, but the identification of certain rule types permits the use of various techniques for efficient rule retrieval and testing, including the determination of retrieval patterns and the automatic separation of the condition into an applicability pattern and a binding pattern.
Mixtures of strategies in structurally adaptive production systems
Authors: Young Richard M.
Published: January 2007

Production systems (PSs) can be written which are
structurally adaptive
in the sense of exhibiting different strategies, or mixtures of strategies, depending on the circumstances of the task. They consist essentially of the
union
of the individual PSs for each strategy. Such PSs begin to approximate the flexibility and adaptiveness of skilled human performance. An earlier analysis of children's seriation behavior is discussed in this light, and a PS for doing subtraction in a flexible manner is developed. It raises a number of issues concerning the user of PSs as models of cognitive processes: the role of explicit rule-ordering; the representation and retrieval of facts; and the possibility of eliminating the need for explicit "housekeeping" rules. The question of ordering is particularly interesting, since it appears that, on the one hand, explicit ordering is needed in order to specify fully a particular method, while on the other hand a more faithful model results it ordering is ignored so that certain aspects of the behavior are left unspecified.According to Newell and Simon [5], "production systems are the most homogeneous form of programming organization known". One consequence of this homogeneity is that a production system (PS) for solving a problem can be written in such a way that each individual rule represents an independent fragment of potential activity on the part of the problem solver and generates a meaningful component of the total problem solving process. Properly exploited, this independence enables one to write PSs which, instead of being committed to one particular strategy for tackling the problem, consist essentially of a mixture of different strategies and display an appropriateness and flexibility of behavior that begins to approximate the characteristics of skilled human performance. Such PSs are
adaptive
in the sense that the method they follow on a particular occasion is determined by the requirements of the individual task. I will refer to them as
structurally adaptive
PSs, in order to distinguish them from Waterman's "Adaptive Production Systems" [8]. Waterman's PSs adapt to a given problem by modifying themselves during the course of solving the problem, acquiring new rules that extend the original PS. The PSs described here do not do this. They remain fixed for the duration of any one task, and adapt to the problem by virtue of their inherent structure.In this paper, after illustrating these notions by a summary of an earlier study of children's seriation behavior (Section 1), I will present a structurally adaptive PS for subtraction (Section 2) and then discuss the issues it raises for the use of PS as psychological models (Section 3).
Pattern-directed processing of knowledge from texts
Authors: Thorndyke Perry W.
Published: January 2007

A framework for viewing human text comprehension, memory, and recall is presented that assumes patterns of abstract conceptual relations are used to guide processing. These patterns consist of clusters of knowledge that encode prototypical co-occurrences of situations and events in narrative texts. The patterns are assumed to be a part of a person's world knowledge and can be activated during comprehension to build associations among multiple linguistic propositions in memory according to their higher-order conceptual relations. During text reproduction from memory, these patterns provide retrieval plans for recall and a mechanism for sophisticated "guessing" when retrieval fails. Some data from human text learning tasks are presented as evidence for these higher-order conceptual patterns. Several structural and processing properties of the model are evaluated in light of these data. It is argued that the proposed pattern-directed processing model could be successfully implemented in artificial intelligence systems to provide adaptive error-handling mechanisms such as those observed in human behavior.
Information content of chess positions
Authors: Nievergelt Jurg
Published: January 2007

Chess has served as a convenient vehicle for studying cognition and perception (see de Groot [1965], Chase and Simon [1973]) as well as machine intelligence. Perhaps
the
central question for both of these research uses of chess is: How much chess-specific knowledge does it take to play at a given level of competence, for example, at the master level? It is difficult to say what chess-specific knowledge is, and it certainly consists of different types of knowledge, that must be considered independently of each other (for example, "book knowledge" obtained by studying chess books is quite different from experience obtained in over-the-board play). Even if one succeeds in defining what "chess-specific knowledge" is, there remains the difficulty of measuring it. Because of these difficulties, any approach to measuring the amount of knowledge possessed by a practitioner of a craft must be based on questionable assumptions, and any result obtained is subject to uncertainty and criticism. Only the inherent interest of the question posed justifies reporting on a rough and inconclusive experiment designed to answer one aspect of the tantalizing question: How much chess-specific knowledge does it take to play at a given level of competence?
Subspace clustering for high dimensional categorical data
Authors: Gan Guojun , Wu Jianhong
Published: January 2007

Data clustering has been discussed extensively, but almost all known conventional clustering algorithms tend to break down in high dimensional spaces because of the inherent sparsity of the data points. Existing subspace clustering algorithms for handling high-dimensional data focus on numerical dimensions. In this paper, we designed an iterative algorithm called SUBCAD for clustering high dimensional categorical data sets, based on the minimization of an objective function for clustering. We deduced some cluster memberships changing rules using the objective function. We also designed an objective function to determine the subspace associated with each cluster. We proved various properties of this objective function that are essential for us to design a fast algorithm to find the subspace associated with each cluster. Finally, we carried out some experiments to show the effectiveness of the proposed method and the algorithm.
A block-based support vector machine approach to the protein homology prediction task in KDD Cup 2004
Authors: Fu Yan , Sun Ruixiang , Yang Qiang , He Simin , Wang Chunli , Wang Haipeng , Shan Shiguang , Liu Junfa , Gao Wen
Published: January 2007

This paper describes our solution for the protein homology prediction task in KDD Cup 2004 competition. This task is modeled as a supervised learning problem with multiple performance metrics. Several key characteristics make the problem both novel and challenging, including the concept of data blocks and the presence of large-scale and imbalanced training data. These features make a naive application of the traditional classification algorithms infeasible. Our approach focuses on making full use of the abundant information within the blocks, and developing a new technique for reducing and balancing training data to make the support vector machine applicable to this kind of large-scale and imbalanced learning tasks.
A characterization of broadband user behavior and their e-business activities
Authors: Marques Neto Humberto T. , Almeida Jussara M. , Rocha Leonardo C. D. , Meira Wagner , Guerra Pedro H. C. , Almeida Virgilio A. F.
Published: January 2007

This paper presents a characterization of broadband user behavior from an Internet Service Provider standpoint. Users are broken into two major categories: residential and Small-Office/Home-Office (SOHO). For each user category, the characterization is performed along four criteria: (i) session arrival process, (ii) session duration, (iii) number of bytes transferred within a session and (iv) user request patterns.Our results show that both residential and SOHO session inter-arrival times are exponentially distributed. Whereas residential session arrival rates remain relatively high during the day, SOHO session arrival rates vary much more significantly during the day. On the other hand, a typical SOHO user session is longer and transfers a larger volume of data. Furthermore, our analysis uncovers two main groups of session request patterns within each user category. The first group consists of user sessions that use traditional Internet services, such as e-mail, instant messenger and, mostly, www services. On the other hand, sessions from the second group, a smaller group, use typically peer-to-peer file sharing applications, remain active for longer periods and transfer a large amount of data. Looking further into the e-business services most commonly accessed, we found that subscription-based and advertising services account for the vast majority of user HTTP requests in both residential and SOHO workloads. Understanding these user behavior patterns is important to the development of more efficient applications for broadband users.
Assessing the scalability of component-based frameworks
Authors: D'Antonio S. , Esposito M. , Romano S. P. , Ventre G.
Published: January 2007

This paper proposes an approach to scalability analysis of component-based systems. A theoretical model of the orchestrated behavior of a system's components is developed and potential bottlenecks are identified. The model is derived by performing an analysis of the average number of messages that each involved entity has to deal with, i.e. receive, elaborate and possibly forward. By appropriately setting the various model parameters, it is possible to evaluate a system's behavior in a number of different scenarios. The model itself is based upon a queuing network paradigm, whereby each component is associated with a "service centre" characterized by specific values of both the message arrival rate and the service time: based on such values, the utilization coefficient of the service centers is computed and the potential bottlenecks are identified. The queuing network model is also exploited to evaluate the performance of the overall system under various configurations. The proposed approach is introduced and developed by taking the CADENUS system as a running example. CADENUS is a component-based framework designed and developed within a recent IST project, whose main goal resides in the provisioning of Premium IP services by means of an effective application of the so-called
mediation paradigm.
Dynamic channel assignment with cumulative co-channel interference
Authors: Daniels Karen , Chandra Kavitha , Liu Sa , Widhani Sumit
Published: January 2007

This paper studies the problem of centralized dynamic channel assignment (DCA) in wireless cellular systems under space and time-varying channel demand. The objective is to minimize the number of channels required to satisfy demand while also satisfying co-channel interference constraints. Cumulative co-channel interference constraints govern channel reuse, via a threshold decision criterion based on the carrier-to-interference ratio. The paper makes two contributions. First, it provides an empirical bound on the difference between the minimal number of channels required based only on geographic reuse distance versus the cumulative interference case in the context of linearly increasing demand. The bound is characterized using only the reuse distance. It is obtained with an Integer Programming (IP) based strategy that uses channel assignments for one demand state to assign channels for the next state. Geographic locality constraints are applied to limit reassignments. The impact of cumulative interference constraints is observed to be small for small geographic localities. Second, the paper presents a new, fast DCA heuristic that is based on the characteristic channel reuse patterns used by the IP-based strategy. The heuristic and IP-based method yield similar results for the zero blocking condition. The DCA heuristic is applied to the problem of estimating the blocking probabilities of call arrivals modeled by a two state discrete-time Markov chain and uniformly distributed holding times. The blocking performance for an ensemble of spatial load imbalance distributions is uniquely characterized using the heuristic and IP solutions.
MINE and MILE
Authors: Hellbrück Horst , Fischer Stefan
Published: January 2007

Ad-Hoc networks are useful where infrastructure networks cannot be deployed or are not cost effective, like temporary deployment in a conference or in case of emergency. However, the nature of ad-hoc networks and especially the mobility of nodes make it difficult to achieve a certain minimum connectivity, which is an indispensable property for many applications. The question we are interested in is: How can connectivity in ad-hoc networks be improved? In this paper, we suggest to introduce dedicated mobile nodes whose only purpose is to maintain the network. These "
M
obile
I
nfrastructure
N
od
E
s" (MINEs) move to positions where they are useful to (re-)create links between normal nodes. We introduce into the MINE concept and then present and analyze several information exploitation and movement strategies these infrastructure nodes could follow in order to efficiently complete their job. These strategies are based on a location exchange protocol which we call
M
obile
I
nfrastructure
L
ocation
E
xchange (MILE). Simulations compare the different strategies and show the usefulness of the approach, and they argue for the efficiency of the MILE protocol.
Mambo
Authors: Bohrer Patrick , Peterson James , Elnozahy Mootaz , Rajamony Ram , Gheith Ahmed , Rockhold Ron , Lefurgy Charles , Shafi Hazim , Nakra Tarun , Simpson Rick , Speight Evan , Sudeep Kartik , Van Hensbergen Eric , Zhang Lixin
Published: January 2007

Mambo is a full-system simulator for modeling PowerPC-based systems. It provides building blocks for creating simulators that range from purely functional to timing-accurate. Functional versions support fast emulation of individual PowerPC instructions and the devices necessary for executing operating systems. Timing-accurate versions add the ability to account for device timing delays, and support the modeling of the PowerPC processor microarchitecture. We describe our experience in implementing the simulator and its uses within IBM to model future systems, support early software development, and design new system software.