bluuebunny/crossref_metadata_2025 huggingface dataset:
Growth and Properties of (Al, Ga)As / NiAl / (Al, Ga)As: An Epitaxical Semiconductor / Metal / Semiconductor System
Authors: Sands T. , Harbison J.P. , Tabatabaie N. , Chan W.K. , Gilchrist H.L. , Schwarz S.A. , Schwartz C.L. , Florez L.T. , Keramidas V.G.
Published: March 2011

The epitaxical and thermally stable NiAI/(AI, Ga)As system is shown to meet all of the basic materials criteria for buried metal/compound semiconductor heterostructures. We describe the growth of these heterostructures by molecular beam epitaxy. Even the thinnest buried NiAI films grown thus far (1.5 nm) are electrically continuous and metallic. Electron tunneling and lateral transport measurements provide strong evidence for size quantization in NiAl films thinner than 3.5 nm. The merging of compound semiconductor tunneling barriers with epitaxical metallic quantum wells and the ability to selectively contact buried metallic quantum wells is expected to yield novel three-terminal devices.
Growth and Characterization of Single Crystal Epitaxial CoGa on MBE Grown III-V Semiconductors
Authors: Garrison K. C. , Palmstrøm C. J. , Bartynski R. A.
Published: March 2011

We have demonstrated growth of high quality single crystal CoGa films on Ga1−xAlxAs. These films were fabricated in-situ by codeposition of Co and Ga on MBE grown Ga1−xAlxAs(100) surfaces. The elemental composition of the films was determined using Rutherford Backscattering (RBS) and in-situ Auger analysis. The structural quality of the films' surfaces was studied using RHEED (during deposition) and LEED (post deposition). RBS channeling was used to determine the bulk crystalline quality of these films.

For ∼500 Å CoGa films grown at ∼450°C substrate temperature, channeling data showed good quality epitaxial single crystals [χmin ∼7%] with minimal dechanneling at the interface.
Doped Channel MBE GaAs Field Effect Transistor (MEDFET) with Laser Processed Ohmic Contacts
Authors: Halkias G. , Hatzopoulos Z. , Christou A.
Published: March 2011

A doped channel heterojunction Field Effect Transistor (Metal-Doped Channel Field Effect Transistor, MEDFET) was fabricated using a molecular beam epitaxially (MBE) grown structure and excimer laser processed TiW-silicide ohmic contacts and TIW-Si gate metallization. The device was characterized at X-band frequencies in order to investigate the potential benefits of the semiconductor MBE structure and the potential stability of the laser processed TiW/Si electrode metallizations.
A Recessed-Gate In0.52Al0.48As/n+-In0.53Ga0.47As Misfet
Authors: Alamo Jesús A. del , Mizutani Takashi
Published: March 2011

Scaling of the In0.52Al0.48As insulator thickness of In0.52Al0.48As/n+-In0.53Ga0.47As MIStype FET's is experimentally found to result in a drastic drop of performance below 200 Å. This is demonstrated to arise from an increase in the sheet resistance of the extrinsic portions of the device that accompanies insulator scaling. In order to solve this problem, a recessed-gate dopedchannel MISFET with a very thin (300 Å) n+-In0.53Ga0.47As cap layer has been fabricated. A 1.5 μm long gate device showed a transconductance of 285 mS/mm and a current-gain cut-off frequency of 19.4 GHz. This result proves the ability of a thin n+-In0.53Ga0.47As cap to reduce source resistance and improve device performance. The fabricated recessed-gate structure is a promising candidate for high-performance scaled MIS-type FET's based on thin, heavily-doped In0.53Gav0.47 As channels.
Materials Technology for InSb Misfet Applications
Authors: Barth W. , Chen C. W. , Comas J. , Junga F. , Lile D. L.
Published: March 2011

The narrow and direct bandgap of indium antimonide is frequently used to good advantage in detection of light in the infra-red region; however, to date little use has been made of the high mobilities associated with this material. Although its high intrinsic carrier concentration generally necessitates operation at cooled temperatures, higher speeds and the advantage of integrating other devices on-chip with the infrared detectors encourages the development of an active device technology on this semiconductor. Considering its small bandgap, the problems associated with good p-n junctions may favor the MISFET in this application. Surprisingly, little has been done toward this goal, though structures such as chargecoupled- devices [1], focal array detectors [2], and a few insulated gate FETs [3,4] have been fabricated. In this paper we present the results of our recent work toward the development of a fabrication technology for InSb MISFETs. Specifically, we have conducted a study of etchants, metal contacts, and dielectrics for application to mesa-structure, insulated gate field transistors.
Heavily-Doped n+-GaAs with Low Compensation Grown by Atmospheric OMVPE
Authors: Venkatasubramanian R. , Ghandhi S. K.
Published: March 2011

Atmospheric OMVPE has been used, with SiH4 as the dopant, to grow n+-GaAs with free-carrier levels upto about 9e18 cm−3. Following a steady rise in carrier concentration with dopant pressure, the carrier concentration is seen to fall rapidly with further doping. Hall-effect and quantitative SIMS data have been used to obtain the distribution of silicon onto donor and acceptor sites. It is seen that there is negligible compensation upto free-carrier levels of about 5e18 cm−3. The mechanism of compensation throughout the doping range is discussed.
Fabrication of III-V Semiconductor Quantum Dots in Porous Glass.
Authors: Luong John C. , Borrelli Nicholas F.
Published: March 2011

Spatially quantized systems of III–V compounds have, in recent years, attracted considerable theoretical interest. However, the fabrication of quantum dots, a three-dimensionally quantum-confined microstructure, is particularly cumbersome and requires sophisticated lateral patterning techniques. A method, reported recently, which utilizes the microporosity of Vycor brand porous glass to produce quantum-confined microcrystals of II–VI and IV–VI semiconductors, is now extended to the fabrication of III–V quantum dots, by incorporating a microwave plasma assisted MOCVD technique. In this process, organometallic precursors impregnated in porous glass can be effectively cracked to deposit III–V microcrystals in glass. The results are discussed in light of the quantum size effect manifested by the optical absorption and photoluminescence data.
Incorporation and Diffusion of P-Type Dopants for Metal Organic Vapor Phase Epitaxy
Authors: Tischler M. A. , Kuech T. F.
Published: March 2011

The control of p-type dopants is very important in producing high performance minority carrier devices such as heterojunction bipolar transistors (HBT) and lasers. In this study, an electrical characterization technique is described which is very sensitive to the p-type dopant profile in a heterojunction. Both the placement of the dopant, i.e. the as-grown profile, and thermal diffusion effects have been investigated. The factors which control the initial placement and subsequent diffusion of the dopant species have been determined and used to produce device-quality GaAs/Al0.30Ga0.70As p+/n heterojunctions.
Electron Irradiation Doping with Carbon in Chemical Beam Epitaxy
Authors: Iimura Y. , Nagata K. , Den S. , Aoyagi Y. , Namba S.
Published: March 2011

Dissociation species produced by low-energy electron Irradiation of triethylgallium (TEGa) have been used as a carbon doping source during growth of GaAs by chemical beam epitaxy. Mass spectral analysis shows that TEGa dissociates at electron energies greater than 20 eV, and that the fragmentation pattern of TEGa consists of methyl radicals, ethyl radicals, and gallium compounds. In order to study the doping properties of carbon, carbon-doped GaAs films were grown under several conditions and were characterized by Hall measurements, photoluminecence spectrum, secondary Ion mass spectrometry, and double crystal X-ray diffraction. The hole carrier concentration could be varied up to ∼1020 cm−3, and the doping profile of carbon was well-controlled.
Electrical and Optical Properties of Vanadium in Omvpe-Grown GaAs
Authors: Hobson W. S. , Pearton S. J. , Swaminathan V. , Jordan A. S. , Kao Y. J. , Haegel N. Mk , Kanber H.
Published: March 2011

The electrical and photoluminescent properties of vanadium incorporated into GaAs epitaxial layers from a VO(OC2 H5)3 source during organometallic vapor phase epitaxy were examined. The vanadium concentration in the GaAs was controllably varied from 1016 to 1018 atoms cm−3. Deep level transient spectroscopy showed the presence of an electron trap at Ec – 0.15 eV which increased in concentration with vanadium content of the epitaxial layers. A maximum value of 8 × 1015 cm−3 for this trap was obtained. There were no midgap electron traps associated with vanadium. In intentionally Si-doped epitaxial layers, co-doping with vanadium was observed to have no effect in reducing the carrier density when the Si concentration was > 4 × 1016 cm−3. The net carrier concentration profiles resulting from 29 si implantation into GaAs containing 1018 cm−3of total V had sharper tails than for similar implantation into undoped material, indicating the presence of less than 1016 cm−3V-related acceptors. Photoluminescent spectra exhibited the characteristic V+3intracenter emission at 0.65∼0.75 eV. No other deep level photoluminescence was detected. For a V concentration of 1016 cm−3only 2.5 × 1013 cm−3was electrically active. Over the entire V concentration investigated this impurity was predominantly (≥99%) inactive.
Atomic Layer Epitaxy: modeling Of Growth Parameters for Device Quality GaAs.
Authors: Colas E. , Bhat R. , Nihous G. C.
Published: March 2011

Device quality GaAs was grown in a conventional Organometallic Chemical Vapor Deposition (OMCVD) reactor, using sequential group III and V reactant gas exposures typical of Atomic Layer Epitaxy (ALE). The importance of gas phase concentration transients during the ALE cycles was revealed by systematic investigations of the effect of the sequences used, for the cycles, on impurity incorporation as well as on the growth rates. In this study, we attempt to quantify the effects of such transients by solving the diffusion equation for the reactant gases, with initial conditions specific to ALE. We used this model to calculate the time dependence of the reactant gas concentration at the growing surface. This quantitative study gives us new insights into the ALE technique and confirms that the V/II ratio at the substrate surface can be controlled by the choice of the gas sequence.
Reduction of Toxic Gas Emissions During Gas Cabinet Manifold Vent Purge Cycles Using a Novel Scrubbing Material.
Authors: Luxon Bruce A. , Vaughan V. R , Mcmanus J. V. , Tom G. M.
Published: March 2011

The rapid growth of the microelectronics industry has spawned environmental problems associated with the process gases used to prepare semiconductors. Historically, many of these problems have been ignored because relatively low volumes of gases are associated with semiconductor fabrication; however, the exceptionally high toxicity of these materials (e.g. arsine, phosphine, silane, etc.) can cause major problems, especially for small quantity hazardous waste generators. Large commercial users have built expensive facilities for handling these materials, but small quantity generators typically have vented to the atmosphere through their exhaust ductwork. This is particularly true during cylinder changes where the gas manifold is repeatedly purged into the ductwork of the facility with no other treatment.

A new family of novel vent gas scrubbers that will cost-effectively reduce toxic air emissions below the Threshold Limit Value (TLV) during cylinder changes is described. Called a vent gas scrubber (VGS), this device combines high capacity, high selectivity and very high capture-effectiveness. These properties permit the VGS to be extremely compact (ca. 125 ml), last a long time in use (several years or more) and to reduce emissions to well below the TLV for improved gas handling safety.
Automation Features Used with the Halide-Cvd Technique at the AT&T-Microelectronics Production Plant in Reading, Pennsylvania
Authors: Rhoades Bruce J. , Travis Steven J. , Sands David G.
Published: March 2011

The the Halide-CVD technique is used in both research and development as well as production at AT&T. The unique requirements of the production environment dictate that reactor designs include features to improve reproducibility and maintenance, as well as reduce operator intervention. Features incorporated in the Halide-CVD reactor at AT&T include microprocessor control of valves, mass flow controllers, and furnace temperature setpoints. The unique needs of a production facility, such as process reproducibility, and commonality with standard plant equipment and information systems, will be highlighted.
Heteroep1Taxial Nucleation and Structural Properties of MBE GaAs on Recessed Si: Etching Implications.
Authors: Boeck Jo De , Liang Jiben , Vanhellemont Jan , Deneffe Kristin , Hoof Chris Van , Arent Douglas J. , Borghs Gustaaf , Christen Jürgen
Published: March 2011

GaAs is grown embedded in pre-etched wells in the Si substrate. HNO3:HF, KOH:H2O and a dry etch technique are used as alternatives to form the wells. Cross-sectional SEM views of AlGaAs/GaAs heterostructures reveal the growth front and facet formation for the different sidewall geometries. Transmission electron microscopy is used to study epilayer degradation in relation to the substrate damage and the presence of edge induced defects in the GaAs. Cathodoluminescence reveals the uniformity of strain present in the GaAs layer embedded in the wet etched well. The impact of the different etching techniques on device integration is briefly discussed.
Electron Transport in InAs/AlSb Quantum Wells: Interface Sequencing Effects
Authors: Tuttle Gary , Kroemer Herbert , English John H.
Published: March 2011

We present data on electron transport in AlSb/InAs/AlSb quantum wells grown by molecular beam epitaxy. Because both anion and cation change across an InAs/Alsb interface, it is possible to grow such wells with two different types of interfaces, one with an InSb-like bond configuration, the other AlAs-like. Electron mobility and concentration were found to depend very strongly on the manner in which the quantum well's interfaces were grown, with high mobilities seen only if the bottom interface is InSb-like. An As-on-Al sites antisite defect model is postulated for bottom AlAs-like interfaces.
Photoluminescence and Plane-View Tem Studies of Epitaxial ZnSe Layers on GaAs After H2 Gas Heat-Treatment
Authors: Sekoguchi-pl Maki , Murase Takashi , Taguchi Tsunemasa
Published: March 2011

Low-temperature photoluminescence and plane-view TEN observations have been carried out to investigate the strain and microstructural defects in MOCVD-grown ZnSe/(100)GaAs after post- growth annealing in H2gas at temperature between 350 and 500V. A 0.35 µm thick ZnSe epitaxial layer is originally under compres- sive strain, but after annealing this receives considerably tensile strain, and the neutral deep-acceptor bound exciton () line and the edge-emission band at about 2.72 eV newly appear. The observed changes are interpreted in terms of the energy down- shift of the excitonic lines and deviation from stoichiometry. The annealed film, which deteriorated as a result of generations of dislocation tangles and small loops, results in the strong deep-level emissions around 2.25 eV.
Structure of Highly Perfect Semiconductor Strained-Layer Superlattices: High-Resolution X-Ray Diffraction and Computer Simulation Studies
Authors: Vandenberg J. M.
Published: March 2011

High-resolution x-ray diffraction (HRXRD) measurements of strained-layer superlattices (SLS's) have been carried out using a four-crystal monochromator. A wide asymmetric range of sharp higher-order x-ray satellite peaks is observed indicating well-defined periodic structures. Using a kinematical diffraction step model very good agreement between measured and simulated x-ray satellite patterns could be achieved. These results show that this x-ray method is a powerful tool to evaluate the crystal quality of SLS's.
X-Ray Interference Measurements of Ultrathin Semiconductor Layers
Authors: Wie C.R.
Published: March 2011

We present various x-ray diffraction phenomena from semiconductor hetero-epitaxial layers. Each of these phenomena gives useful information on the layers. Knowing what to look for in the x-ray rocking curve (XRC) can make this nondestructive technique a very powerful tool for characterization of a few A-several g.tm thick layers We discuss the use of individual Bragg peak, diffraction fringe, and interference structure to obtain layer information. We particularly emphasize the use of x-ray interference in studying buried strained quantum well or quantum barrier layers. We present experimental rocking curves of an AlGaAs/GaAs double heterojunction laser structure and GaInAs/GaAs strained layer superlattices in both <001> and <111> orientations.
Evaluation of Large Diameter InP Substrate Material
Authors: Trapp K. D. C. , Asom M. T. , Carver G. E. , Monberg E. M. , Thiel F. A. , Barns R. L.
Published: March 2011

Expanding interest in large-scale fabrication of electronic and photonic devices and in the scale-up of epitoxial growth reactors is creating the need for high quality large diameter InP substrate material. This paper will discuss the evaluating of three-inch diameter semi-insulating Fe-doped InP substrate material purchased from two commercial suppliers. The results of Photon Back Scatter, Infrared Transmission Microscopy, Hall Effect, and Spatially Resolved Photoluminescence measurements will be presented and evaluated.
Trichloride-Hydride Vpe: A Hybrid Regrowth Process for III-V Epitaxial Heterostructures
Authors: Digiuseppe M. A. , Mattera V. D. , Brown J. , Marchut L. , Ekholm D. T. , Filipe J. , Buckley D. N. , Peticolas L. J.
Published: March 2011

InP based alloy epitaxial heterostructures currently are being developed as light sources and detectors for optoelectronic applications. High performance requirements at very high frequency operation have resulted in the need for complex device structures which can require one or more epitaxial steps. As a result, hybrid growth techniques combining LPE with either hydride VPE, trichloride VPE or metal organic CVD previously have been used to grow emitter and photodetector heterostructures. In this paper, a hybrid trichloride-hydride VPE growth technique for complex heterostructures is described. Trichloride VPE which is particularly suited for certain regrowth applications because of its inherent in-situ etching capability has been successfully utilized to regrow low-doped, high purity InP on InP/InGaAs/InGaAsP heterostructures grown by hydride VPE. Transmission electron microscopy has shown that the regrowth interface is free of major defects and dislocations. P-diffused APD mesa devices obtained from these structures were operated with fields at the regrowth interface as high as 3.8 × 105V/cm. Primary dark currents were observed as low as 1.4nA.
Multistep, In-Situ Single Wafer Processing - Materials, Device and Equipment Issues
Authors: Hauser J. R. , Masnari N. A. , Littlejohn M. A.
Published: March 2011

Multistep, in-situ single wafer processing is being explored as an alternative processing approach to standard batch silicon wafer processing. Advantages and disadvantages of this approach are explored and an evaluation given of the potential for future advanced, low temperature wafer processing. Multistep, single wafer processing offers many advantages for advanced device and IC development but much technology research and equipment development is needed to achieve its potential.
Device Degrading Interactions between Silicide Films and Bulk Defects during Rapid Thermal Annealing
Authors: Sparks D.R. , Alvi N.S.
Published: March 2011

The interaction between titanium and nickel silicide films with dislocations generated at the wafer edge by thermal stress is examined in this work. The local dislocation density of the silicon wafers varied from zero to 4.8×106cm across a slice. Both titanium and nickel were deposited as thin films in the contact regions of the p-n junction diodes. Wafers were rapid thermal annealed, sequentially, for 30 s at temperatures between 300°C and 700°C. Reverse bias leakage current measurements of the as-deposited and annealed wafers were used to evaluate the impact of silicides and bulk defects on devices. A significant increase in leakage current due to the silicide/defect interaction was observed above 600 °C for both titanium and nickel. Leakage currents of devices fabricated in regions of high bulk defect density increased with the anneal temperature and dislocation density.
Reaction Kinetics of Sputter-Deposited Ti On SiO2 Substrates during Rapid Thermal Annealing
Authors: Yun E.J. , Chun H.G. , Jung K. , Kwong D.L. , Lee S.
Published: March 2011

In this paper, the interactions of sputter-deposited Ti on SiO2 substrates during rapid thermal annealing in nitrogen at 550°C - 900°C for 10 - 60 s have been systematically studied using X-ray diffraction, Auger electron spectroscopy, transmission electron diffraction, TEM & cross-sectional TEM, and sheet resistance measurements.
The Outdiffusion of Boron and Arsenic from Pre-Formed Ion-Beam-Mixed Cobalt Disilicide Layers using Rapid Thermal Processing
Authors: Moynagh P. B. , Brown A. A. , Rosser P. J.
Published: March 2011

Arsenic out-diffusing from Cobalt Disilicide into underlying silicon displays an enhanced activation level of up to 80%, and an enhanced diffusivity of greater than one order of magnitude. Boron, in contrast, displays a diffusivity as small as 0.25 times that expected. These observations are consistent with a considerable Si-vacancy injection by the silicide layer into the underlying substrate.
A Study of the Morphology of Titanium Silicide Films and the Titanium Silicide-Silicon Interface
Authors: De Lanerolle N. , Moser L. , Hoffman D. , Ma D. , Sterner D.
Published: March 2011

This paper is based on a detailed study of the effect of high temperature heat treatment in a nitrogen ambient on the titanium silicide film and the silicide-silicon interface. Our investigations showed that the two cannot be studied in isolation. This study involved observing the morphology of the silicide film after thermal treatment in a furnace at 925° C for 5, 30, 60 and 120 minutes. Part of each wafer was then stripped of silicide, thereby exposing the morphology of the interface of TiSi2 with Si. In this way, it was possible to correlate the changes on the surface with that of the interface. The samples were analyzed by scanning electron microscopy and energy dispersive spectroscopy. Evidence for the growth and evolution of Si islands were found as a result of this study. These islands appear to form preferentially at specific locations of the interface, namely at the meeting points of the grain boundaries of the silicide film with the interface. Even though the morphology of the silicide surface becomes more lumpy with increased annealing times, Si islands were not observed at the surface, contrary to what has been reported during vacuum annealing. It appears that the nitrogen ambient has a stabilizing influence in keeping the surface apparently stable. Associated with the increasing size of the islands was the simultaneous sinking of the TiSi2 into the Si substrate.
Single Wafer Rapid Thermal Multiprocessing
Authors: Saraswat Krishna C. , Moslehi Mehrdad M. , Grossman David D. , Wood Sam , Wright Peter , Booth Len
Published: March 2011

Future success in microelectronics will demand rapid innovation, rapid product introduction and ability to react to a change in technological and business climate quickly. These technological advances in integrated electronics will require development of flexible manufacturing technology for VLSI systems. However, the current approach of establishing factories for mass manufacturing of chips at a cost of more than 200 million dollars is detrimental to flexible manufacturing. We propose concepts of a micro factory which may be characterized by more economical small scale production, higher flexibility to accommodate many products on several processes, and faster turnaround and learning. In-situ multiprocessing equipment where several process steps can be done in sequence may be a key ingredient in this approach. For this environment to be flexible, the equipment must have ability to change processing environment, requiring extensive in-situ measurements and real time control. In this paper we describe the development of a novel single wafer Rapid Thermal Multiprocessing (RTM) reactor for next generation flexible VLSI manufacturing. This reactor will combine lamp heating, remote microwave plasma and photo processing in a single cold-wall chamber, with applications for multilayer in-situ growth and deposition of dielectrics, semiconductors and metals.
Bistable Defects Induced in GaAs by H2 Plasma Process
Authors: Boddaert X. , Vuillaume D. , Stievenard D. , Bourgoin J.C. , Boher P.
Published: March 2011

We have studied the effect of an H2 plasma (150 W; 150°C; 10, 20, 50, 100 s) on unannealed and annealed (850°C, AsH3 atmosphere) LEC GaAs material. Using Deep Level Transient Spectroscopy, we have shown that the plasma induces a main bistable defect DO, which has two possible stable states Dl and D2. A complete determination of the corresponding Configuration Coordinate Diagram has been done. Finally, no correlation has been obtained between DO and the native defects EL6, EL3 and EL2. No passivation of the EL2 defect has been observed and the evolution of the D0 concentration results from the association of hydrogen with AsGa. These observations are in disagreement with the identification of EL2 with an isolated AsGa.
Mo—In—Mn Based Ohmic Contact to P—GaAs
Authors: Kalkur T.S. , Lu Y.C. , Caracciolo Robert
Published: March 2011

Mo—In—Mn metallization is used to form ohmic contact on Be—implanted Rapid Thermally annealed GaAs. The rapid thermal alloying of Mo—In—Mn contact metallization is performed at various temperatures and times in A.G. Associates Heat Pulse 410 system in forming gas atmosphere. The electrical properties of the contacts were analyzed by current-voltage and contact resistivity measurements. The microstructures of the contacts were analyzed using scanning electron microscope, energy dispersive x-ray analysis, x-ray diffraction and secondary ion mass spectroscopy.
Defect Analysis of Rapid Thermal Processing Round Robin Results
Authors: Yarling C. B. , Keenan W.A.
Published: March 2011

The Greater Silicon Valley Implant Users' Group (GSVIUG) has conducted a round robin to determine the uniformity and repeatability available in wafers processed with modern RTP equipment. High-dose ion implantation (As, 5E15, 80keV) of 150mm wafers was used to monitor temperature distribution through sheet resistance. Sheet resistance maps were then used to compare the uniformity and repeatability of each vendor. As previously reported, the actual uniformity results varied significantly with RTP vendor and implant conditions, ranging from 0.77% (one sigma/mean) to 3.55%. In addition, some contour patterns were quite representative of specific vendors.

Subsequently, wafers from each participating vendor were evaluated by three techniques in order to determine what damage or defects might have resulted from the RTP process: laser flatness measurement, optical-imaging inspection, and thermal wave measurement. The flatness measurement system was used to measure the warpage of each sample. The reflective-optical inspection technique is a full-field, non-destructive technique that provides a real-time visual display, evidenced by light and dark field contrast over the entire wafer. The thermal wave measurement system uses two laser probes to measure a difference in modulated reflectance which results from damage or defects within the wafer.

This paper describes each of the three techniques and summarizes the measured results of wafer defects and damage due to the processing by various RTP vendors. Comparisons between the three measurement techniques are made.
Pyrometric Emissivity Measurements and Compensation in an RTP Chamber
Authors: Nulman J. , Cohen B. , Blonigan W. , Antonio S. , Meinecke R. , Gat A.
Published: March 2011

The emissivity effects and compensation schemes encountered in pyrometric temperature measurements in RTP systems are described in this paper. The emissivity effects include substrate roughness, layered films, substrate temperature, and chamber reflectivity. Compensation techniques are derived based on the emissivity effects, and include reference thermocouples and reflectance-based measurements. Compensated emissivity results in wafer-to-wafer temperature variations of less than ± 6 C, compared to as much as ± 100 C for uncompensated emissivity. A new model for emissivity analysis at temperatures larger than 700 C is also described.
Properties of Thin SiO2 Films with In-Situ Deposition of Poly Si Electrodes
Authors: Pan Paihung , Kermani Ahmad , Berry Wayne , Liao Jimmy
Published: March 2011

Electrical properties of thin (12 nm) SiO2 films with and without in-situ deposited poly Si electrodes have been studied. Thin SiO2 films were grown by the rapid thermal oxidation (RTO) process and the poly Si films were deposited by the rapid thermal chemical vapor deposition (RTCVD) technique at 675°C and 800°C. Good electrical properties were observed for SiO2 films with thin in-situ poly Si deposition; the flatband voltage was ∼ -0.86 V, the interface state density was < 2 × 1010/cm2/eV, and breakdown strength was > 10 MV/cm. The properties of RTCVD poly Si were also studied. The grain size was 10-60 rim before anneal and was 50-120 rim after anneal. Voids were found in thin (< 70 nm) RTCVD poly Si films. No difference in either SiO2 properties or poly Si properties was observed for poly Si films deposited at different temperatures.
Crystal Stability and Microstructural Evolution in Polycrystalline Si Films During Ion Irradiation
Authors: Atwater Harry A. , Brown Walter L.
Published: March 2011

Amorphous Si is nucleated heterogeneously at grain boundaries during irradiation of polycrystalline Si by 1.5 MeV Xe+ ions for temperatures of 150–225°C. Following formation at grain boundaries, the amorphous Si layer grows at a rate comparable to the growth rate of a pre-existing amorphous-crystal interface, resulting in a decrease in average grain size and a marked change in the grain size distribution. The heterogeneous nucleation kinetics of amorphous Si are strongly dependent on grain boundary structure. A simple atomistic model for amorphous phase formation, which suggests that the nucleation kinetics are dependent on the point defect mobilities and grain boundary structure, is related to the experimental results.
In-Situ Reflectance Measurements of Measurements of During Ion Implantation
Authors: Swart Pieter L. , Lacquet Bea M. , Grobler Michael F.
Published: March 2011

Damage introduced during ion implantation of semiconductor materials coalesce at a certain critical dose, for a particular energy and ion species. After this threshold dose rapid changes occur in the reflectance. This may be used for studying the amorphization process, or it may be applied as a non--destructive dosimeter and uniformity tool.

An automated reflectometer was developed for studying reflectance during ion implantation of semiconductors with various ion species. Results on argon and phosphorous implants into silicon at energies ranging from 50 to 240 keV are presented.
Is the End-of-Range Loops Kinetics Affected by Surface Proximity or Ion Beam Recoils Distribution?
Authors: Ganin E. , Marwick A.
Published: March 2011

We studied formation and annihilation of dislocation loops formed beyond the amorphous/crystalline interface after indium and boron dual implantation and subsequent annealing in the 800–1 100°C temperature range. The residual damage for low (40 keV) and high (200 keV) energy In implants were compared. The depth of the amorphous region in the sample implanted with the higher energy ions was reduced by using anodic oxidation and etching, to equate it with that of the sample implanted by lower energy ions. This enabled the study of the effect of surface proximity on residual disorder upon annealing. The damage was strongly dependent on the energy of In ions. No end-of-range damage was observed for the low energy implant. High energy implantation resulted in end-of-range dislocation loops, stable below 1050°C. The loops kinetics was neither affected by their proximity to the surface, nor by In precipitation. Monte-Carlo full cascade simulation has been used to estimate the depth distribution of interstitials and vacancies produced by In implant.
Lattice Defects Generated by Ion Implantation into Submicron Si Areas
Authors: Tamura M. , Shukuri S. , Kawamoto Y.
Published: March 2011

Cross-sectional transmission electron microscopy observations have been carried out to clarify two-dimensional depth distributions of lattice defects generated in high-dose (5 x 1015 ions/cm2 ), P, As, BF2 and B implanted, annealed submicron Si areas as a function of implantation areas. Monte Carlo simulation is also adapted for ion-implantation into submicron Si through fine mask patterns to predict the effect of mask size on spatial damage and impurity profiles. Simulation results predict that the above profiles have a strong mask size dependence for regions below the critical size, where the dopant concentration decreases and damage depth moves toward the surface-side with a reduced implantation area. Some experimental results support simulation results, although most defects, mainly in the P and As implantation, are confined within the original amorphized layers, independent of mask size. However, in BF2 and B implantation, unexpected defect behavior such as variations in defect distribution from one implanted layer to another is found to occur in submicron regions doped by implantation.
MeV Implantation of Gallium Arsenide
Authors: Kanber H. , Chen J. C. , Barger M. J.
Published: March 2011

We investigated n-type MeV implants into semi-insulating GaAs to fabricate fully implanted varactor diodes for monolithic millimeter-wave applications. Single and multiple implants of Si from 6 to 2.5 MeV and 6 MeV S implants in GaAs were studied before and after capless furnace annealing and rapid thermal annealing by chemical profiling using secondary ion mass spectrometry (SIMS) and electrochemical and traditional differential capacitance-voltage profiling. A buried active layer at a depth of 2.8 μ.m with a peak carrier concentration of 2.5 × 1018 cm-3 was achieved by using 6 MeV Si + 4 MeV Si + 6 MeV S implants and rapid thermal annealing them at a temperature 1050°C for 10 seconds. The chemical profiles are correlated to the electrical profiles to determine activation and annealing behavior of MeV Si and Simplants in semi-insulating GaAs.
Influence of the Temperature of Implantation on the Morphology of Defects in MeV Implanted GaAs.
Authors: Braunstein G. , Chen Samuel , Lee S.-Tong , Rajeswaran. G.
Published: March 2011

We have studied the influence of the temperature of implantation on the morphology of the defects created during 1-MeV implantation of Si into GaAs, using RBS-channeling and TEM. The annealing behavior of the disorder has also been investigated.

Implantation at liquid-nitrogen temperature results in the amorphization of the implanted sample for doses of 2×1014 cm−2 and larger. Subsequent rapid thermal annealing at 900°C for 10 seconds leads to partial epitaxial regrowth of the amorphous layer. Depending on the implantation dose, the regrowth can proceed from both the front and back ends of the amorphous region or only from the deep end of the implanted zone. Nucleation and growth of a polycrystalline phase occurs concurrently, limiting the extent of the epitaxial regrowth. After implantation at room temperature and above, two distinct types of residual defects are observed or inferred: point defect complexes and dislocation loops. Most of the point defects disappear after rapid thermal annealing at temperatures ≥ 700°C. The effect of annealing on the dislocation loops depends on the distance from the surface of the sample. Those in the near surface region disappear upon rapid thermal annealing at 700°C, whereas the loops located deeper in the sample grow in size and begin to anneal out only at temperatures in excess of 900°C. Implantation at temperatures of 200 - 300°C results in a large reduction in the number of residual point defects. Subsequent annealing at 900°C leads to a nearly defect-free surface region and, underneath that, a buried band of partial dislocation loops similar to those observed in the samples implanted at room temperature and subsequently annealed.
Oxygen Doped Silicon Surface Layers by Ion Implantation
Authors: Srikanth K. , Ashok S.
Published: March 2011

Oxygen doping of silicon with ion implantation has been attempted with the aim of modifying the surface electrical properties of the substrate. The change in currentvoltage (I–V) characteristics after 1200 °C anneal has been ascribed to the formation of Oxygen Doped Silicon. The independence of the I–V characteristics on the choice of top metal contact and the reversal in direction of rectification strongly suggest the formation of an alloy layer in Si by the implantation. SIMS measurements indicate a sharp oxygen profile after the anneal and FTIR data show that oxygen is in the form of SiO2 embedded in a silicon matrix.
Ion Implantation Processing of Gaas and Related Compounds
Authors: Pearton S. J. , Hobson W. S. , Abernathy C. R.
Published: March 2011

The formation of doped or semi-insulating layers by ion implantation in both Ga- and In- based semiconductors is reviewed. The Ga-based materials (GaAs, AIGaAs, GaP, GaSb) tend to show similar characteristics in terms of producing relatively low (n ≤ 3 × 1018 cm-3) maximum carrier densities for donor implanted layers, and much higher values for acceptor implants (p ≤ 5 × 1019 cm-3 ). Ion-induced damage is widely used for device isolation in these materials, with midgap levels associated with the damage trapping free carriers and leading to semi-insulating behaviour. By contrast, the In-based materials (InP, InAs, InSb and InGaAs) show higher maximum carrier densities for acceptor implants than for donor implants, and the use of ion damage for isolation purposes is much less effective than in GaAs. All of these materials display singularly poor regrowth characteristics, requiring in some cases the use of elevated temperature implantation to prevent amorphization
Shallow Doping of Gallium Arsenide by Recoil Implantation
Authors: Sadana D. K. , de Souza J. P. , Rutz R. F. , Cardone F. , Norcott M. H.
Published: March 2011

Si atoms were recoil-implanted into GaAs by bombarding neutral (As+) or dopant (Si+) ions through a thin Si cap. The bombarded samples were subsequently rapid thermally or furnace annealed at 815–1000°C in Ar or arsine ambient. The presence of the recoiled Si in GaAs and resulting ni-doping was confirmed by secondary ion mass spectrometry and Hall measurements. It was found that sheet resistances of < 150 Ω/‪ can be achieved by this method. Capless furnace annealing in arsine ambient generally yielded better electrical results (especially for shallow implants, i.e., < 100 nm deep) compared to those obtained by RTA in an inert ambient with a Si cap. In the latter case, electrical activation deteriorated above 900°C due to high As loss and the deterioration was pronounced for shallow implants. Significant Si redistribution occurred during arsine annealing whenever the Si concentration (from recoil or direct implant) in GaAs exceeded 1×1019cm3 and the annealing temperature was > 850°C. Our present electrical data show that the recoil implant method is a viable alternative to direct shallow implant for n+ doping of GaAs.
Molecular Ion S2+ and SiFn+ implantations into GaAs
Authors: Fan W. D. , Wang W. Y.
Published: March 2011

Molecular ion S2+ and SiFn+ implantations into GaAs have been investigated to form very thin active layers. After implantation, the transient annealing (TA) and furnace annealing (FA) were used. The measurements of activation efficiency, mobility, carrier concentration profiles and PL spectra were carried out. The experiments show that after TA, the activation efficiency, mobility and carrier distribution are almost the same between samples implanted with S+ at an energy of 50KeV to a dose of 3×1013cm−2 and S+2 at 100KeV to 1.5×1013cm−2. It shows that the damage of S2-implanted samples can be removed by TA, and a very thin active layer can be formed by the implantation of S2+ at 50KeV. For SiFn-implanted samples, the activation efficiency and mobility. decrease with increase of the implanted ion mass. As+ co-implantation into SiF-implanted samples has been used to improve both activation efficiency and mobility. After comparison with the properties of the SiFt implantation, S2+implantation is more acceptable to form thin active layers.
Dual Ion Implantations of Si+As and S+As into GaAs
Authors: Fan W. D. , Wang W. Y. , Zhou B. L.
Published: March 2011

As+ implantation has been used to compensate the As loss during annealing for Si- or S-implanted GaAs. The As+ implantation was at an energy range of 25–100KeV to a dose range of 1012-1015cm−2. The Si+ or S+ implantation was at 150 or 50KeV respectively to the same dose, 27times;1013cm−2. By using the measurements of the Hall effect and sheet resistivity, the activation efficiency and mobility of the dually implanted sample with Si+ and As+ (25KeV, 1×1013cm− 2 ) after TA at 1050°C for 6s increase by 21 and 18% respectively over those of the singly Si-implanted sample after TA at 1100°C for 6s. Those of the dually implanted sample with Si+ and As+ (100KeV, 1×1013cm− 2 ) increase by 63 and 30% respectively over those of the singly Si-implanted sample after FA at 800°C for 30min. Also, the density of SiAs and VGa determined by 20K PL spectra decreases of dually Si- and As-implanted samples. The activation efficiency and mobility of the d8ally implanted sample with S+ and As+ (40KeV, 1×1013cm−2 ) after TA at 1100°C for 12s increase by 17 and 16% respectively over those of the singly Simplanted sample. The annealing behaviour after As+ implantation is discussed.
Ultra-Pure Processing: a Key Challenge for Ion Implantation Processing for Fabrication of ULSI Devices
Authors: Current M. I. , Larson L. A.
Published: March 2011

A key issue in modern ion implantation processing is the requirement for dramatic improvements in the purity of the incident ion beam and reductions in the deposition of foreign materials onto the wafer surface. These deposited materials include particles as well as sputtered and vapor deposited metals and dopants. Physical mechanisms which effect the elemental purity of atoms arriving at the surface of ion implanted wafers and progress towards achieving implantation purity levels of below 100 ppm of the implanted dose for sputtered metal and dopant films are discussed.
Electronic Properties of Ion Implanted Polymer Films
Authors: Giedd R. E. , Shipman J. , Murphy M.
Published: March 2011

We have implanted a number of insulating polymer (PET) thick films with fluences in the range 1 × 1013 to 5 × 1017 ions/cm2 in order to induce electronic activity. Finite electrical conductivities were obtained for fluences as low as 3 × 10 15ions/cm2. The resistivity for these implanted materials increases with decreasing temperature demonstrating highly disordered or semiconducting behavior. Hall effect measurements confirm this result and indicate negatively charged carriers with a carrier density of 1.44 × 10 17cm -3 for an implant dose of 1 × 1017 ions/cm2. The conductivities also seem to be dependent on the implanted ion species. We believe this material will be useful as an accurate temperature sensor near room temperature.
Ion Beam Modification of the Y-Ba-Cu-O System with the Mevva High Current Metal Ion Source
Authors: Brown I. G. , Rubin M. D. , Yu K. M. , Mutikainen R. , Cheung N. W.
Published: March 2011

We have used high-dose metal ion implantation to ‘fine tune’ the composition of Y-Ba- Cu-O thin films. The films were prepared by either of two rf sputtering systems. One system uses three modified Varian S-guns capable of sputtering various metal powder targets; the other uses reactive rf magnetron sputtering from a single mixed-oxide stoichiometric solid target. Film thickness was typically in the range 2000–5000 A. Substrates of magnesium oxide, zirconia-buffered silicon, and strontium titanate have been used. Ion implantation was carried out using a metal vapor vacuum arc (MEVVA) high current metal ion source. Beam energy was 100–200 keV, average beam current about 1 mA, and dose up to about 1017 ions/cm2. Samples were annealed at 800 – 900°C in wet oxygen. Film composition was determined using Rutherford Backscattering Spectrometry (RBS), and the resistivity versus temperature curves were obtained using a four-point probe method. We find that the zero-resistance temperature can be greatly increased after implantation and reannealing, and that the ion beam modification technique described here provides a powerful means for optimizing the thin film superconducting properties.
Lattice Strain from Holes in Heavily Doped Si:Ga
Authors: Kavanagh K. L. , Cargill G. S. , Boehme R. F. , Chang J. C. P.
Published: March 2011

Heavily doped Si:Ga has been prepared by liquid phase epitaxy (LPE) and by ionimplantation with rapid thermal annealing (RTA) or laser annealing (LA). Peak substitutional Ga concentrations obtained by each technique were 1.5, 2.5 and 2.9 ×1020cm-3, respectively. Substitutional fractions (>90%) were similar in the three types of samples, and the conductivity scaled with the total Ga concentration. A lattice expansion per substitutional Ga atom in Si of +0.9 ± 0. l×10-24cm3 /atom was measured by double crystal x-ray diffraction. The average nearest neighbor Si-Ga bond length measured with extended x-ray absorption fine structure (EXAFS) was 0.237 ± 0.004 nm, indistinguishable, to within experimental error, from the intrinsic Si-Si bond lngth, 0.235 nm. Combining these two results the lattice strain per hole in the Si valence band was calculated, +0.4 ± 0.8x10G-cm3. This result complements the lattice contraction per electron in the Si conduction band (-1.8 ± 0.4x10-24cm 3) already reported for Si:As [G. S. Cargill III, J. Angilelloand K. L. Kavanagh, Phys. Rev. Letters 61, 1748 (1988)].
Reduction of Excess Self-Interstitials in Silicon by Germanium and Silicon Implantation-Induced Damage
Authors: Fahey Paul
Published: March 2011

We have investigated a phenomena first reported by Pfiester and Griffin, that the presence of implanted Ge in Si can substantially reduce excess self-interstitial concentrations [ J. R. Pfiester and P. B. Griffin, Appl. Phys. Lett., 52, 471 (1988) ]. By studying the effects of Ge implantation on P diffusion, we are able to deduce that residual implantation damage can act as an efficient sink for self-interstitials. This effect can also be produced by Si self-implantation, demonstrating that there is nothing unique about the chemical indentity of Ge in reducing self-interstitial concentrations. Our experiments provide solid evidence that there is no unexpectedly strong interaction of Ge with self-interstitials, a situation that would undermine the validity of previous Ge diffusion experiments aimed at studying Si self-diffusion. Our experimental results show that the effect of Ge implantation on P diffusion is a complicated function of implantation conditions. Diffusion is affected by the order of thl P and Ge implants as well as by changes in implant energies and doses.