bluuebunny/crossref_metadata_2025 huggingface dataset:
Soil-transmitted Helminths Infection among Primary School Students: which Policy bhould be Emphasized?
Authors: Herman Bumi Zulheri , Ramlan Ranisa Handayani , Wahab Ferawati Rahmat
Published: April 2019

Soil Transmitted Helminths is a neglected disease and remain untouched in Balikpapan despite of its deteriorating effects on child health. A cross-sectional study to reveal the actual infection among school-age children in Balikpapan was conducted from January-March 2016 involved 101 students from 10 schools. All subjects and parents were interviewed using validated questionnaire followed by stool examination. All data underwent univariate and bivariate test using fisher exact’s test, ANOVA and logistic regression test (95% CI).  Rate of positive infection was 62.4%. Associated risk factors were, routine hand wash (p=0.004 OR=0.050), taking oral prophylaxis (p=0.001 OR=0.182), use of footwear (p=0.009 OR=2.529), involved in “Young Doctor Program” or other health promotion program (p=0.014 OR 0.324) and the type of toilet at home (p=0.048). Knowledge about worm infection (p=0.659), history of previous worm infection (p=0.768) and access to clean water at home (p=0.361) were insignificantly associated with infection rate. Community service (such as “The Clean, Green And Healthy” program) (p=0.037 OR 0.395) and Community Health Care (p=0.000 OR 0.155) were associated with lower risk of infection. Regression test shows that community health care and oral prophylaxis were the most influencing factor and these factors should be considered as the main focus of intervention.
Knowledge, Attitude and Preventive Practices about Ebola Viral Disease among Journalists in Osogbo, Southwest Nigeria
Authors: Akinleye Callistus A , Olowookere Samuel A. , Olagunoye Olatunji A , Oginni Monisola Omoyeni , Bolorunduro Ayoyinka Olufunmilayo , Adepoju Ebenezer G
Published: April 2019

The West African subregion presently faces the Ebola viral disease (EVD) epidemic. In order to control this epidemic, journalists need to inform the public. This study assessed their knowledge, attitude and preventive practices. A descriptive cross-sectional study was conducted among 93 journalists working in Osun State who completed a self administered questionnaire. Data collected was analysed. Mean (SD) age was 26.4±8.2 years ranging 18 to 49 years. Mean (SD) duration in practising journalism was 7.6±6.7 years (range, 1-20 years). Most had tertiary education (87.1%), were singles (74.2%), Christians (51%) and Yoruba (92.5%).  Despite good knowledge (58.1%) of EVD, most had low risk perception (46.2%). The only statistical significant predictor of good knowledge was religion. In conclusion, most journalists have good knowledge but low risk perception. Efforts to improve the risk.
The Quality of Newborn Data: Assessment of Data Management and Reporting System
Authors: Achampong Emmanuel Kusi , Adzakpah Godwin , Okyere Boadu Richard , Lasim Obed Owumbornyi
Published: April 2019

Data quality assurance through the district, regional and national health information systems is a sure way of having a meaningful interpretation, but this is a challenge in many developing countries. The purpose of this study was to determine the availability and data completeness of key newborn data indicators collected at the health facilities and to determine the use of newborn data for planning and decision-making at the Cape Coast metropolis. The study was a descriptive qualitative assessment. An in-depth interview was conducted in four hospitals within the Cape Coast Metropolis. There were unique best practices identified with some hospitals such as staff distribution and utilization in data collection and reporting, using data for decision making, and to define newborn indicators, data collections tools and the processes involved in data management and utilising supportive supervision from both the region and district levels. In order to sustain health information management, fundamental monitoring and evaluation issues, standardisation of monitoring and evaluation practices in data and information management must be addressed. In addition, investment should be made into the adoption of electronic medical records systems and tertiary training programs to support monitoring and evaluation activities in the hospital.
Knowledge-Attitudes-Practices about Malaria among Communities in Southern Benin
Authors: Padonou Germain Gil , Gbenoudon Judith G. , Osse Razaki , Salako Albert , Kpanou Casimir , Sagbohan Herman , Gnanguenon Virgile , Agbo Frederick Oke , Oussou Olivier , Akogbeto Martin Codjo
Published: April 2019

Malaria still remains the main public health problem in Benin. We explored the determinants that influenced malaria treatment as well as protective behaviors, to generate a framework of useful ideas as alternative strategies against malaria. A cross-sectional survey of the knowledge, attitudes and practices (KAP) was conducted at Hozin, Vakon and Agblangandan districts in southern region of Benin. Descriptive statistics were computed and mixed logistic regression helped evaluating the relationship between frequency of each category of severity of malaria and sex group, educational level, treatment, means of self-protection against mosquitoes and identification of the cause of malaria. A significant proportion 750 (81.3%) (p<0.001) of participants stated that malaria was caused by mosquitoes. The respondents who mentioned sun as the cause of malaria, have trivialized more malaria in a proportion of about 59.30% (OR=2.67 [95% CI 1.61-4.44]) followed by those who have reported the cause of body weakness (43.68%) (OR=2.97 [95% CI 1.68-5.28]). Poor knowledge justifies the trivialization of the disease and poor management of malaria control means. National Malaria Control Programs should improve access to education, especially for women and could help improving prevention and control behaviours against malaria in communities.
Risk Factors for Non-communicable Diseases among Adults of 25-65 Years at Kakamega County General Hospital, Kenya
Authors: Kibe Monicah Njambi , Nguka Gordon , Konyole Silvenus
Published: April 2019

In Kenya the growing number of premature deaths with half of all hospital admissions and 33% of all deaths are associated with Non-communicable diseases. The study determined the physical measurements and lipid parameters of adults 25-65 years at Kakamega County General Hospital. Data was collected using the WHO STEPs Instrument: Physical measurements assessed were Mid Upper Arm Circumference, Waist Hip measurements, Body mass Index and blood pressure. The study significance level was 0.05.  Data was analyzed using SPSS version 20. Descriptive statistics was used. χ2 test of independence was used to find out the relationship between anthropometric measurements and lipid parameters. Data was presented in form of tables, figures and texts. There was a significant relationship between BMI and Triglycerideχ2 (12, N=60)= 25.752 P=0.012, BMI and LDLχ2(8,N=60)=19.312 p=0.013, BMI and Total Cholesterol χ2(8, N=60)=18.694 p=0.017, MUAC and HDL χ2(4, N=60) =14.446 p=0.006, WHR and Total Cholesterol χ2(2, N=60)=17.985 p=0.000, WHR and LDL χ2(2, N=60)=15.246p=0.000. The study advocated for policies to reduce the incidences of risk factors for NCDs which will assist in achievement of Sustainable Development Goals. Kenyan population are in need of screening for risks associated with NCDs.
Suicide Ideation, School Absenteeism and Physical Violence among Secondary School Students in Kampala, Uganda
Authors: Sendagala Samuel , Senkusu John , Lubwama George William , Bagenda Danstan , Muyonga Micheal , Hladik Wolfgang
Published: April 2019

School youth in many African countries face a range of non-infectious health risks, in addition to the infectious disease burden typical in resource-limited settings. We examined self-reported health behaviors associated with suicide ideation, school absenteeism and physical violence among secondary school students in Kampala, Uganda. We conducted a cross-sectional three-stage cluster-based survey among students aged >=15 years, and/or enrolled in forms 3–6 (grades 9-12) in 54 secondary schools in Kampala. Interview data were collected with a standardised electronic questionnaire through computer-assisted self-interviewing and results were weighted for sample design and non-response. Pearson’s chi-square and logistic regression methods were used for bivariate and multivariate analysis respectively. Bullying among female respondents was positively associated with suicide ideation (aOR=1.73). In multivariate analysis, suicidal ideation was positively associated with a lifetime exposure to illicit drug use (aOR=1.76), serious injury (aOR=1.67) or school absenteeism (aOR=1.46). School absenteeism was positively associated with serious injury (aOR=1.59), history of alcohol consumption (aOR=1.55), bullying (aOR=1.52) and suicide ideation (aOR=1.45). Serious injury (aOR=2.89), a life-time history of illicit drug use (aOR=2.65), recent history of having been bullied (aOR=2.38), physical activity (aOR=2.12), suicide ideation (aOR=1.58), school absenteeism (aOR=1.57) were associated with having been engaged in physical violence. Bullying, serious injury and illicit drug use were associated with suicidal ideation, school absenteeism and physical violence. Concerted efforts should be considered by education authorities, parents and the community to tackle these risky behaviors.  
Nurse’s Spiritual Care Competencies to Patient with End Stage Breast Cancer
Authors: Anisa Nurul Rezki , Erika Kadek Ayu , Rachmawaty Rini
Published: April 2019

Cancer has many side effects on patient’s physic and mostly on mental which may affect on their quality of life. Physically most patients feel fatigue, insomnia, anorexia, nausea, and vomit while mentally they feel emotional disturbances such as anxiety, stress, or depression. One of the methods to that appropriate to overcome both of the conditions is spiritual care. Many research found that because spiritual care associated with better wellbeing, less emotional disturbance, less substance abuse, greater social support, better health behaviours, so it has impact to longer survival periods. This research aimed to investigate nurse’s spiritual care competencies to patients with end stage cancer. This was descriptive study design employed Spiritual Care Competencies Scale (SCCS) instrument. A total sampling of 24 nurses working in Oncology department in Dr. Wahidin Sudirohusodo Hospital were recruited. This research found that there are 12 nurses (50 %) that work in oncology department have low competencies of spiritual care. Involving spiritual care is associated with better wellbeing and longer survival periods. Therefore, it is necessary to increase the competence of nurses on spiritual care in meeting the spiritual needs of patients with end stage breast cancer. A training of spiritual care can be an alternative for nurses to improve spiritual care in hospitals.
Antenatal Care Visits and Early Detection of Pre-eclampsia among Pregnant Women
Authors: Fadilah Dini Rima , Devy Shrimarti Rukmini
Published: April 2019

The death of pregnant women is still the world's attention in the field of health. The SDG's indicator provides one of the goals in the health field. The target to be achieved is a global maternal mortality ratio of less than 70/100,000 live births by 2030. According to WHO, preeclampsia is one of the leading causes of maternal death in the world, including Indonesia. East Java Province with the highest ranking in Indonesia. One of the cities in East Java which is the leading contributor to preeclampsia is Surabaya with 16 cases in 2016. The government carries out the treatment to reduce maternal mortality due to preeclampsia through antenatal care. This study aimed to analyze antenatal care visits for early detection of preeclampsia. The method in this research is qualitative research method with data retrieval technique using in-depth interview. Based on the results of research antenatal care visits have an effect on early detection of preeclampsia. Pregnant women who regularly make antenatal visits can prevent possible dangers of pregnancy as early as possible. So the maternal mortality rate (MMR) due to pre-eclampsia can be decreased.
Stress, Nutritional Status and Blood Glucose Levels among Patients with Diabetes Mellitus Type 2
Authors: Wardani Dyah Ayu Kusuma , Sugiarto Sugiarto , Cilmiaty Risya
Published: April 2019

Prevalence of diabetes mellitus (DM) was increased significantly. Stress increased cortisol could increase blood glucose levels while obesity could increase insulin resistance. Objective of this study was to examine correlation of stress and nutritional status with blood glucose levels in patients with DM type 2. Design study was cross sectional using 120 samples from patients with DM type 2 at Polyclinic of Internal Disease Dr. Moewardi Hospital Surakarta during April-May 2018. Variables in this study were stress with perceived stress scale 10 items (PSS-10), nutritional status with body mass index (BMI) and blood glucose levels with fasting blood glucose (FBG) and post-prandial blood glucose (PPBG) examination. The results showed that mean of FBG was 152.9±63.66 mg/dL and PPBG was 213.96±70.17 mg/dL. There was no significant correlation between stress and blood glucose levels, by FBG (p=0.389) and PPBG (p=0.202). However, there was significant correlation between nutritional status and PPBG (p=0.016), but FBG was not significant (p=0.209). In conclusion, there was significant correlation between nutritional status and PPBG in patients with DM type 2, but FBG was not significant. However, there was no significant correlation between stress and blood glucose levels in patients with DM type 2.
Prevention of Cervical Cancer among Mother in Yogyakarta, Indonesia
Authors: Setiyawati Nanik , Meilani Niken
Published: April 2019

Cervical cancer was one of the global commitments in Sustainable Development Goals (SDGs). Cervical cancer represents 7.5% of all deaths caused by cancer in women. The method to screening cervical cancer is pap smear test and Visual Inspection of Acetic Acid (VIA) test.  Indonesia is the second country in the world has the most cervical cancer cases. This study aims to determine the behavior of cervical cancer prevention on housewives. This is kuantitatif research with cross sectional design. The subjects of this study were housewives in the Kota Yogyakarta and Sleman regency amounting to 350 people. The analysis used is univariate, bivariate and multivariate analysis. The results showed that there were 45.1% of mothers' have did the implementation of VIA. There is a relationship of education (p = 0.024), level of knowledge (p = 0.036), and maternal attitudes with cervical cancer prevention behavior. There were no correlation between age (p = 0), parity (p = 0.816), and family income (p = 0.174) with the mother's behavior in the implementation of theVIA’s test. Multivariate analysis showed maternal attitude (CI = 0.335-0.788) that affect the behavior of the VIA.
Robotic Arm Movement Optimization Using Soft Computing
Authors: Kumar Surender , Rani Kavita , K. Banga V.
Published: April 2019

Robots are commonly used in industries due to their versatility and efficiency. Most of them operating in that stage of the manufacturing process where the maximum of robot arm movement is utilized. Therefore, the robots arm movement optimization by using several techniques is a main focus for many researchers as well as manufacturer. The robot arm optimization is This paper proposes an approach to optimal control for movement and trajectory planning of a various degree of freedom in robot using soft computing techniques. Also evaluated and show comparative analysis of various degree of freedom in robotic arm to compensate the uncertainties like movement, friction and settling time in robotic arm movement. Before optimization, requires to understand the robot's arm movement i.e. its kinematics behavior. With the help of genetic algorithms and the model joints, the robotic arm movement is optimized. The results of robotic arm movement is optimal at all possible input values, reaches the target position within the simulation time.
Crowbar Resistance Setting and its Influence on DFIG Low Voltage Based on Characteristics
Authors: Shengqing Li , Ming Yao , Zhang Yuwen
Published: April 2019

In the case of low voltage fault cases,doubly fed induction generator (DFIG) with Crowbar protection circuit to realize low voltage ride through (LVRT),and the choice of crowbar resistance of unit LVRT effects is very large.In this paper, from the DFIG wind power system steady state and transient mathematical model of voltage drop down, using space vector analysis method and Laplace transform, deduced the time domain transient current expressions of voltage drop Put forward the method for calculating the maximum fault current and the rotor side crowbar resistance setting method, solve the crowbar protection circuit for tilting rotor current and DC bus over-voltage problems. Numerical example and simulation shows that, The proposed method, effectively suppress the transient component of fault current, significantly improved the automation level of the wind power system.
Model Predictive Control of Wind-Photovoltaic Hybrid System Connected to Grid
Authors: Abidi Houda , Mami Abdelkader
Published: April 2019

This work focuses on Model based Predictive Control (MPC) for photovoltaic-wind hybrid energy system connected to electrical grid. Several benefits  are offered by this method  such as robustness against a  parameter variations, minimum output current distortion and excellent reference tracking. In order to minimize the cost function or the error between the  predicted values and their references, MPC-based algorithm permit to select and apply the  optimal voltage vector. Simulation results under Psim environment show a fast dynamic behavior of hybrid system with minimal errors, accuracy and usefulness of the considered control approach.
Identifying the Optimal Controller Strategy for DC Motors
Authors: Qader M. R.
Published: April 2019

The aim of this study is to design a control strategy for the angular rate (speed) of a DC motor by varying the terminal voltage. This paper describes various designs for the control of direct current (DC) motors. We derive a transfer function for the system and connect it to a controller as feedback, taking the applied voltage as the system input and the angular velocity as the output. Different strategies combining proportional, integral, and derivative controllers along with phase lag compensators and lead integral compensators are investigated alongside the linear quadratic regulator. For each controller transfer function, the step response, root locus, and bode plot are analysed to ascertain the behaviour of the system, and the results are compared to identify the optimal strategy. It is found that the linear quadratic controller provides the best overall performance in terms of steady-state error, response time, and system stability. The purpose of the study that took place was to design the most appropriate controller for the steadiness of DC motors. Throughout this study, analytical means like tuning methods, loop control, and stability criteria were adopted. The reason for this was to suffice the preconditions and obligations. Furthermore, for the sake of verifying the legitimacy of the controller results, modelling by MATLAB and Simulink was practiced on every controller.
Design and Implementation of Swam Robotics using Flood Fill Algorithm
Authors: Latha gade Mary swarna , GAjitha GAjitha , S Deepthi.
Published: April 2019

Swam Intelligence provides a basis with which it is possible to explore collective (or distributed) problem solving without centralized control or the provision of a global model. This paper presents design and implementation of swam robotics in a multi-agent environment. At the beginning, robot agents are ignorant of the maze. The robots are programmed with Flood fill algorithm to solve maze. The robot scans maze and stores the values in EEPROM. The robot agent shares the information to other robot agents through wireless communication. The proposed flood fill algorithm is found to be effective tool for solving maze of moderate size.
Fuzzy Takagi-Sugeno Method in Microcontroller Based Water Tank System
Authors: Maisarah Mohd Sobran Nur , Mohd Salmi Munirah , Bazli Bahar Mohd , Nazri Othman Md , Halma Johari Siti
Published: April 2019

This paper present the performance of Fuzzy logic controller in maintain level of water in water tank system. The mathematical modelling was developed to get the initial idea of the system performance. Later, the prototype of water tank system were constructed and tested to get the real time results. The Takagi-Sugeno “on” and “off” interference technique method was implemented due to the control limitation of the pump motor that being used in the experimental setup. The fuzzy logic controller was realized by embedded the algorithm in microcontroller of the water tank system. The experimental results show acceptable level of water within the range of 18cm to 20.5cm and settling time 59 seconds with 20 cm set point.
Investigation of Formation Control Approaches Considering the Ability of a Mobile Robot
Authors: Wind Hannes , Sawodny Oliver , Br•aunl Thomas
Published: April 2019

This work investigates and compares various formation control approaches for mobile robots. A comprehensive literature review was conducted, with particular focus on the approaches' applicability to be implemented on real mobile robots with limited hard and software capabilities. A realistic model of mobile robots is introduced and its parameters are identi ed with measurements from actual mo-bile robots. Later on, the model is extended and used within simulation studies of the various investigated approaches. A collision avoidance controller based on a formation controller is proposed and simulations are carried out. Experiments on real mobile robots are conducted for two formation controllers and for the pro-posed collision avoidance controller. It is shown that if the requirements resulting from the simulation studies are satis ed, an implementation on the real robots is possible.
An Actor-critic Algorithm Using Cross Evaluation of Value Functions
Authors: Wang Hui , Zhang Peng , Liu Quan
Published: April 2019

In order to overcome the difficulty of learning a global optimal policy caused by maximization bias in a continuous space, an actor-critic algorithm for cross evaluation of double value function is proposed. Two independent value functions make the critique closer to the real value function. And the actor is guided by a crossover function to choose its optimal actions. Cross evaluation of value functions avoids the policy jitter phenomenon behaved by greedy optimization methods in continuous spaces. The algorithm is more robust than CACLA learning algorithm, and the experimental results show that our algorithm is smoother and the stability of policy is improved obviously under the condition that the computation remains almost unchanged.
Hierarchical Inspection System Using Visual and MFL Probe Robots
Authors: Qidwai Uvais , Akbar Muhammad , Maqbool Muhammad , Jahanshahi Mohammed
Published: April 2019

Structural Health Monitoring (SHM) represents a critical appurtenance to modern engineering that amalgamates the skills and techniques from various disciplines of engineering and computational science. Modern civil architectures, involving high-rise buildings, complex structural designs, and innovative shapes, on one hand represent the urban development, but at the same time is a challenge from sustainability perspective. In order to ensure the tenability of such structures, advanced SHM procedures need to be developed. The presented work in this paper is an effort on these lines. The wear and tear in the buildings related to weather, as well as other natural disasters, needs to be monitored regularly and systematically in order to prevent any serious structural damage. In current SHM practices, human experts are deployed at various structurally critical places on these buildings to perform specific measurements and analyze them to decide on the structural health condition. This simple approach is becoming more and more complicated as well as perilous for the human personnel involved, due to the modern architecture that involves greater heights, and complex structures. The proposed system utilizes flying and crawling/roving robots for this purpose. The flying robots, first, scan the surface of the building to any height needed, and then the custom-designed algorithms analyze the images from these scans in order to discern the possible defects/anomalies in the structure. Using these defect pointers, the custom-designed rover robot on top of the structure lowers a robotic probe that scans only those areas for substantiating the anomalies and the degree of defects present.
A Novel High Speed FPGA Architecture for FIR Filter Design
Authors: B. Jadhav Sachin , Mane Nikhil Niwas
Published: April 2019

 This paper presents the details of hardware implementation of linear phase FIR filter using merged MAC architecture. Speed of convolution operation of FIR filter is improved using merged MAC architecture. By exploiting the reduced complexity made possible by the use of sparse powers of two partial products terms coefficients, an FIR filter tap can be implemented with 2B full adders, and 2B latches, where B is intermediate wordlegnth. Word and bit level parallelism allows high sampling rates, limited only by the full adder delay. The proposed architecture is based on binary tree constructed using modified 4:2 and 5:2 compressor circuits. Increasing the speed of operation is achieved by using higher modified compressors in critical path. Our objective of work is, to increase the speed of multiplication and accumulation operation by minimizing the number of combinational gates using higher n: 2 compressors, which is required more for Array multiplier at the time of implementation of array architecture. This novel architecture allows the implementation of high sampling rate filters of significant length on FPGA Spartan-3 device (XC3S400 PQ-208). The simulation result shows convolution output of digital FIR filter which is done using Questa Sim 6.4c Mentor Graphics tool. The experimental test of the proposed digital FIR filter is done using Spartan-3 device (XC3S400 PQ-208)
Simplified VHDL Coding of Modified Non-Restoring Square Root Calculator
Authors: Sutikno Tole , Zakwan Jidin Aiman , Jidin Auzani , Nik Idris Nik Rumzi
Published: April 2019

Square root calculation is one of the most useful and vital operation in digital signal processing which in recent generations of processors, the operation is performed by the hardware. The hardware implementation of the square root operation can be achieved by different means, but it is very dependent on programmer's sense and ability to write efficient hardware designs. This paper offers universal and shortest VHDL coding of modified non-restoring square root calculator. The main principle of the method is similar with conventional non-restoring algorithm, but it only uses subtract operation and append 01, while add operation and append 11 is not used. The strategy has conducted to implement successfully in FPGA hardware, and offer an efficient in hardware resource, and it is superior.
Attendance Logging In Webserver Using Multi Node Embedded System Connected Through Wi-Fi
Authors: Bilal Mohammed
Published: April 2019

In the present age, we are in need of fully automated attendance logging system. The design of Remote Attendance Logging System and its control is a challenging part.  RFID reader reads the RFID tag, and the details of the tag is logged in the embedded system. The Web based distributed measurement and control is slowly replacing parallel architectures due to its non-crate architecture which reduces complexities. A new kind  of expandable, distributed large attendance logging system based on ARM Cortex M3  boards has been investigated and developed in this paper, whose hardware boards use 32-bit RISC processor with wifi dongle attached to its USB port, and software platform use Keil MDK-ARM for firmware and   HTML for man machine interface.  This system can display date and time of log in and log out of a person. The data can be displayed on web pages at different geographical locations, and at the same time can be transmitted to a Remote Data Acquisition System by using HTTP protocol.  The embedded board can act as a central CPU to communicate between web servers automatically.
Digital Control of Static Var Compensator with Field Programmable Gate Array
Authors: Dhekekar Ram Shankarrao , Srikanth N. V.
Published: April 2019

This paper is about real time simulation and implementation of FPGA Digital Control of Static VAR compensator for 750km lab model of artificial transmission line. In this paper, a new method of controlling SVC using Field Programmable Gate Array (FPGA) is suggested. FPGA controller is used to generate the firing pulses required to for Static Var Compensator. Pulses are synchronized with AC input; the delay of pulses determines the firing angle to driver circuit. The proposed control scheme has been realized using XILINX FPGA SPARTAN 2 XC2S200 and tested actual testing proves that these devices when installed, they keep the bus voltage same as reference voltage (sending-end voltage). The results are prominent and give a way for real-time implementation of the proposed control schemes. These control schemes are simulated for the real-time control along with real-time modeling and simulations.The results are prominent and give a way for real-time implementation
Design and Development of Stream Processor Architecture for GPU Application Using Reconfigurable Computing
Authors: Dessai Sanket , Vutukuru Krishna Bhushan
Published: April 2019

Graphical Processing Units (GPUs) have become an integral part of today’s mainstream computing systems. They are also being used as reprogrammable General Purpose GPUs (GP-GPUs) to perform complex scientific computations. Reconfigurability is an attractive approach to embedded systems allowing hardware level modification. Hence, there is a high demand for GPU designs based on reconfigurable hardware. Stream processor consists of clusters of functional units which provide a bandwidth hierarchy, supporting hundreds of arithmetic units. The arithmetic cluster units are designed to exploit instruction level parallelism and subword parallelism within a cluster and data parallelism across the clusters.For decreasing the area and power, a single controller is used to control data flow between clusters and between host processor and GPU. The designed of stream processor unit has been carried out in Verilog on Altera Quartus II and simulated using ModelSim tools. The functionality of the modelled blocks is verified using test inputs in the simulator.The simulated execution time of 8-bit pipelined multiplier is 60 ps and 100 ns for 8-bit pipelined adder while operating at 90 MHz.
Design and Implementation of Modified Partial Product Reduction Tree for High Speed Multiplication
Authors: B. Jadhav Sachin , K. Patil Jayamala , T. Patil Ramesh
Published: April 2019

This paper presents the details of hardware implementation of modified partial product reduction tree using 4:2 and 5:2 compressors. Speed of multiplication operation is improved by using higher compressors .In order to improve the speed of the multiplication process within the computational unit; there is a major bottleneck that is needed to be considered that is the partial products reduction network which is used in the multiplication block. For implementation of this stage require addition of large operands that involve long paths for carry propagation. The proposed architecture is based on binary tree constructed using modified 4:2 and 5:2 compressor circuits. Increasing the speed of operation is achieved by using higher modified compressors in critical path. Our objective of work is, to increase the speed of multiplication operation by minimizing the number of combinational gates using higher n:2 compressors. The experimental test of the proposed modified compressor is done using Spartan-3FPGA device (XC3S400 PQ-208). Using tree architectures for the partial products reduction network represent an attractive solution that is frequently applied to speed up the multiplication process. The simulation result shows 4:2 and 5:2 compressor output which is done using Questa Sim 6.4c Mentor Graphics tool.
New Schmitt Trigger with Controllable Hysteresis using Dual Control Gate-Floating Gate Transistor (DCG-FGT)
Authors: Marzaki Abderrezak , Bidal V. , Laffont R. , Rahajandraibe W. , Portal J-M. , Bouchakour R.
Published: April 2019

This paper presents different low voltage adjustable CMOS Schmitt trigger using DCG-FGT transistor. Simple circuits are introduced to provide flexibility to program the hysteresic threshold in this paper. The hysteresis can be controlled accurately at a large voltage range. The proposed Schmitt trigger have been designed using 90nm 1.2V CMOS technology and simulated using Eldo with PSP device models. The simulation results show rail-to-rail operation and adjustable switching voltages VTH- (low switching voltage) and VTH+ (high switching voltage).
Design of Mesh and Torus Topologies for Network-On-Chip Application
Authors: S. Bhople Sonal , Gaikwad M. A.
Published: April 2019

Network-on-Chip (NoC) is a general purpose on-chip communication concept that offers high throughput, which is the basic requirement to deal with complexity of modern systems. In Network on chip topology design is one of the significant factors that affect the net delay of the system. In this paper mesh topology and torus topology are compared in terms of network delay for a given NOC application using Xillinc 9.1c.
Design and Implementation of Adaptive FIR filter using Systolic Architecture
Authors: H Bailmare Ravi , Honale S.J. , V Kinge Pravin
Published: April 2019

The tremendous growth of computer and Internet technology wants a data to be process with a high speed and in a powerful manner. In such complex environment, the conventional methods of performing multiplications are not suitable to obtain the perfect solution. To obtain perfect solution parallel computing is use in contradiction. The DLMS adaptive algorithm minimizes approximately the mean square error by recursively altering the weight vector at each sampling instance. In order to obtain minimum mean square error and updated value of weight vector effectively, systolic architecture is used. Systolic architecture is an arrangement of processor where data flows synchronously across array element. This project demonstrates an effective design for adaptive filter using Systolic architecture for DLMS algorithm, synthesized and simulated on Xilinx ISE Project navigator tool in very high speed integrated circuit hardware description language (VHDL) and Field Programmable Gate Arrays (FPGAs). Here, by combining the concept of pipelining and parallel processing in to the systolic architecture the computing speed increases.
Design and Development of ARM9 Evaluation Kit for Embedded Applications
Authors: Alex Thomas Nikhil , Dessai Sanket , ShivaPrasad Yadav S.G. , Chaudhari Shilpa
Published: April 2019

In contrast with low end microprocessor, ARM9 core is quite a sophisticated processor. The Evaluation kit plays an important role in the prototype development and verification of the system design before taking to its actual system development hence it’s provide better confidence to the designer. In this paper a project for the Evaluation kit has been designed for embedded system engineer to implement and confirm the functionality of their operating systems which could lead to a comfortable deployment. The independent modules for the interfaces of the ARM9 processor have been designed and the schematics have been developed using OrCAD. From the tested schematics designed in OrCAD, the related PCB is designed using CADSTAR. An eight-layer board is designed for its signal integrity and complexity of the schematic designed. The designed PCB layer is then calibrated and Gerber files are then made and passed on the PCB board manufacturer for PCB fabrication. The PCB board made is then tested for interconnection continuity using multi-meter as the components are loaded on to the board.
Design of AES Pipelined Architecture for Image Encryption/Decryption Module
Authors: V. Kinge Pravin , Honale S.J. , Bobade C.M.
Published: April 2019

The relentless growth of Internet and communication technologies has made the extensive use of images unavoidable. The specific characteristics of image like high transmission rate with limited bandwidth, redundancy, bulk capacity and correlation among pixels makes standard algorithms not suitable for image encryption. In order to overcome these limitations for real time applications, design of new algorithms that require less computational power while preserving a sufficient level of security has always been a subject of interest. Here Advanced Encryption Standard (AES),as the most widely used encryption algorithm in many security applications. AES standard has different key size variants, where longer bit keys provide more secure ciphered text output. The available AES algorithm is used for  data and it is also suitable for image encryption and decryption to protect the confidential image from an unauthorized access. This project proposes a method in which the image data is an input to Pipelined AES algorithm through Textio, to obtain the encrypted image. and the encrypted image is the input to Pipelined AES Decryption to get the original image. This project proposed to implement the 128,192 & 256 bit Pipelined AES algorithm for image encryption and decryption, also to compare the latency , efficiency, security, frequency & throughput . The proposed work will be synthesized and simulated on FPGA family of Xilink ISE 13.2 and Modelsim tool respectively in Very high speed integrated circuit Hardware Description Language.
FPGA Based Controller Area Network
Authors: Ghareaghaji Ali
Published: April 2019

In this paper the Controller Area Network (CAN) Controller is presented. CAN is an advance serial bus communication protocol that efficiently supports distributed, broadcast real-time control and fault tolerance features for automobile industries to provide congestion free networking. The CAN Controller is designed for scheduling of messages, consist of the Transmitter Controller, FIFO buffer, CRC generator and bit stuffer. Scheduling messages on CAN corresponds to assigning identifiers (IDs) to message according to their priorities. Non Return to Zero (NRZ) coding and Non Destructive Bitwise Arbitration (NDBA) is used. The data is taken from the buffer FIFO, bit stuffed and then transmitted after CRC is performed. The whole design is captured entirely in VHDL language using bottom up design and verification methodology. The proposed controller was designed for applications needing high level data integrity and data rates upto 1Mbps. The applications of CAN are factory automation, machine control, automobile, avionics and aerospace, building automation.
Design of Low Power Dual Dynamic Node Flip-Flop Using Sleep Transistor with NMOS
Authors: Kumar Ajeesh , Saraswathi N.
Published: April 2019

This paper introduces a Low Power Dual DynamicNode FlipFlop(DDFF) using Sleep Transistor with NMOS. Theproposed design retains the logic level till the end of evaluation and pre-charge mode. The low power DDFF architecturethat combines the advantages of dynamic and static CMOSstructures. The Sleep Transistors approach are used for leakagepower reduction. It reduces leakage current in ideal mode.The performance of the proposed flip flop was compared withthe conventional dual dynamic node flip flop (DDFF) in 90nmCMOS technology with 1.2v supply voltage at room temperatures.Also, conventional DDFF and DDFF using Sleep Transistor withNMOS are compared with other complicated designs and realizesby a 4-bit Johnson up and down counter. The performanceimprovements indicates that the proposed designs are suited formodern high-performance CMOS circuits where leakage powerand power delay product overhead are of major concern
Implementation of Low Power Pipelined 64-bit RISC Processor with Unbiased FPU on CPLD
Authors: Kumar J. Vijay , Raju B. Naga , Babu M. Vasu , Ramanjappa T.
Published: April 2019

This article represents the implementation of low power pipelined 64-bit RISC processor on Altera MAXV CPLD device.  The design is verified for arithmetic operations of both fixed and floating point numbers, branch and logical function of RISC processor. For all the jump instruction, the processor architecture will automatically flush the data in the pipeline, so as to avoid any misbehavior. This processor contains FPU unit, which supports double precision IEEE-754 format operations very accurately. The simulation results have been verified by using ModelSim software. The ALU operations and double precision floating point arithmetic operation results are displayed on 7-Segments. The necessary code is written in Verilog HDL.
LOW COST MICROCONTOLLER BASED AUTOMATIC BILLING SYSTEM WITH PROTECTIVE SHIELDING FROM RF WAVES
Authors: Evangeline Suganthi
Published: April 2019

Shopping Mall is a complex of shops representing various merchandisers that enables the customers to buy all their needed things. As it is easier for people to come and buy all their things in a common place, shopping malls are crowded. As people are coming in large numbers to buy the groceries and house hold products for the full month, the billing counters are flooded with people. In order to avoid such large queues at the billing counter, we are coming up with Smart Cart using newly evolved RFID Technology. In our proposed method, the bill is automatically generated in the trolley as the customer purchases the product.
Web Based Home Security and Automation System
Authors: Mohd Yusof Norfadzlia , Jidin Aiman Zakwan , Sze Lim Mei
Published: April 2019

Home security and automation is crucial issue concerned by people. A home security system is needed for convenience and safety. A home automation system is a key to having effective energy efficiency in the house. In this paper, we present the design and implementation of a web-based home security and automation system. This system make use of PIR motion sensor to detect intruder in the house. This sensor is further fed to microcontroller which would help the GSM module to send notification to house owner regarding the intrusion. On the other hand, the LDR light sensor is used to provide auto-light functionality which will turn on the light at night and dim it at day time. A web-based system function as a remote control system for user to monitor control the sensors and lights at home in order to save energy consumption. This system is accessible by user anytime and anywhere as long there is an Internet connection.
FPGA-based Architecture of Direct Torque Control
Authors: Maher Azaza , Kamel Echaieb , Abdelkader Mami
Published: April 2019

This paper presents an optimized FPGA architecture of a DTC “direct torque control” drive of an induction motor. The proposed architecture is based on variable fixed point world size and the use ipcores in order to achieve higher sampling frequency which leads to reduce the electromagnetic torque and flux ripples. The hardware implementation was experimentally validated, the results shows the effectiveness of the hardware DTC drive implementation by the minimization of the torque and flux ripple
Optimization of Resource Utilization of Fast Fourier Transform
Authors: Chandra Yadav Subhash , Juneja Pradeep , Varshney R. G.
Published: April 2019

This paper considers the optimization of resource utilization for three FFT algorithms, as it pertains not to the input samples or output modes, but to the twiddle factors that arise in Cooley-Tukey FFT algorithms. Twiddle factors are a set of complex roots of unity, fixed by the transform order for the particular algorithm. This paper shows the comparison between three known FFT algorithms, DIT-FFT, DIF-FFT and GT algorithm. All these algorithms are implemented on FPGA (Spartan-3 XC3S4000l-4fg900) with XILINX 10.1 ISE.
BIST Architecture using Area Efficient Low Current LFSR for Embedded Memory Testing Applications Applications
Authors: Parvathi M. , Vasantha N. , Prasad K. Satya
Published: April 2019

One of the important block of BIST controller is LFSR and the speed with which BIST operates depends on LFSR systems design. There are methods in implementing LFSR using field programmable gate arrays (FPGAs) or digital signal processors (DSPs). BIST controller system speed is then limited to FPGAs and DSPs, which may influence other parameters such as overall area, maximum current, limit and power dissipation. This paper proposes a technique to achieve an efficient BIST controller by redesigning LFSR using GDI based D flip-flops that resulted with low area and low current capabilities. This paper presents three different techniques for implementing flip-flops for an efficient LFSR so that the layout area will be minimized as well as the maximum current drawn will be lower.
Berger Code Based Concurrent Online Self-Testing of Embedded Processors
Authors: Prasad Acharya G. , Asha Rani M.
Published: April 2019

In this paper, we propose an approach to detect the temporary faults induced by an environmental phenomenon called single event upset (SEU). Berger code based self-checking checkers provides an online detection of faults in digital circuits as well as in memory arrays. In this work, a concurrent Berger code based online self- testable methodology is proposed and integrated in 32-bit DLX Reduced Instruction Set Computer (RISC) processor on a single silicon chip. The proposed methodology is implemented and verified for various arithmetic and logical operations of the DLX processor. The FPGA implementation of the proposed design shows that a meager increase in hardware utilization facilitates online self- testing to detect temporary faults.
Design of a 60 GHz power amplifier in a 45nm CMOS
Authors: B. Rashmi S. , Yellampalli Siva S.
Published: April 2019

This Paper presents a design and implementation of class-AB power amplifier which works at 60GHz unlicensed frequency band. This power amplifier uses a MOSFET from gpdk45 technology library. The design simulation is done by cadence Analog Design Environment. This proposed power amplifier yields a power added efficiency of 23.45% and a power gain S21 of 10dB at 60GHz. The output impedance of proposed power amplifier is needs to be matched with 73Ω antenna impedance. The S22 output matching of the simulated power amplifier is -18dB at 60GHz. The input side is matched to arbitrary impedance of 50Ω the resulting S11 of simulated result is noted to be -15dB at 60GHz. The proposed circuit has a noise figure of 3.85dB. The proposed circuit has a Pout-1dB of 8.5dBm. the designed class AB power amplifier is an important component in 60GHz transceiver. The layout of the associated circuit is drawn with the total size of 0.107um2.
Erratum: Yang, Y.C., Yin, Z.W. & Yu, W.D. (2012) A new species of Tyrinasius Kurbatov (Coleoptera, Staphylinidae, Pselaphinae) from Ningxia, Northwest China. Zootaxa, 3401, 60–62.
Authors: YANG Y. C. , YIN Z. W. , YU W. D.
Published: April 2019

(Erratum)