Avoiding inelastic strains in solder joint interconnections of space electronics
Authors: Suhir E. 
Published: November 2022

A simple and physically meaningful analytical (“mathematical”) predictive model is developed for the evaluation of the sizes of the zones of inelastic deformations, if any, at the ends of a soldered electronics assembly in a packaged IC device. The emphasis is on the IC devices intended for space applications and on the incentive for using column‐grid‐array (CGA) rather than a ball‐grid‐array (BGA) technology for lower thermal interfacial stresses. Such devices, when employed outside spacecraft, experience extraordinarily low temperatures, and their solder joint interconnections, when used interchangeably inside and outside the craft, are subjected to significant and variable inelastic strains, possibly leading to low cycle fatigue conditions. Because of that, the useful lifetime of the device might be shorter than required for particular applications. There is an obvious incentive to avoid, if possible, the inelastic deformations in the solder material or, at least, to predict the sizes of the inelastic zones at the peripheral portions of the assembly. The developed model shows how this could be done. Both shearing and peeling interfacial stresses are addressed. The numerical examples are carried out for an IC‐package mounted on a ceramic (Al203) substrate using 3%–4%Ag0.51%Cu lead‐free solder alloy. In addition, an extreme response of an assembly of the type in question to the random temperature cycling is briefly addressed. It is concluded that several possible and independent ways to avoid or, at least, to minimize the inelastic deformations in the solder material could be employed: the use of high yield stress solder and/or a solder with a low melting temperature and/or a low expansion substrate and/or compliant interfaces, such as, for example, low‐modulus‐and‐compliant CGA design instead of high‐modulus‐and‐stiff BGA, and/or inhomogeneous attachment designs, such as, for example, those, when high‐modulus and/or high‐soldering‐temperature solder is used in the assembly's major mid‐portion, where heat‐transfer considerations play the major role, and low‐modulus and/or low‐melting‐temperature solder – at its peripheral portions, where mechanical strength is critical. It is concluded also that because, based on the calculated data, the peeling stresses are typically considerably lower than the shearing ones and are proportional to the shearing stresses, only the latter could be considered and possibly minimized. As to the random loading, whose effect was assessed by considering the extreme elastic shearing stress in an assembly with an extraordinarily high yield stress (so that inelastic deformations in it are impossible), it has been concluded that a probabilistic‐design‐for‐reliability of the solder joint interconnections in IC packages intended for space application should be considered in addition to the deterministic approach taken in this paper, but this analysis is beyond the scope of the present study and will be done as future work. Finally, it is concluded that the analytical ("mathematical") modeling should always be considered, in addition to computer simulations, in every important physical design related undertaking, such as the one addressed in this analysis: these two major modeling tools are based on different assumptions and employ different calculation techniques, and if the calculated data obtained using these tools are in agreement, then there is a good reason to believe that these data are accurate and trustworthy.