bluuebunny/crossref_metadata_2025 huggingface dataset:
IP-SOFC Performance Measurement and Prediction
Authors: Haberman Ben , Martinez Baca Carlos , Ohrn Ted
Published: April 2011

Rolls-Royce Fuel Cell Systems (RRFCS) is currently developing a stationary 1MW SOFC power generation system based on Integrated-Planar SOFC technology. RRFCS is also developing state of the art numerical prediction tools that will be used to support fuel cell product design. One such tool, the Multi-Physics Code (MPC), is based in the STAR-CCM+ (CD-adapco) computational fluid dynamics software package. This paper is concerned with the validation of MPC predictions against fuel cell current-voltage (IV curve) measurements made from singe-cell tests. Validation results are presented for 31 sets of IV curves which illustrate the effect of changing gas conditions and material properties on cell performance. The calculated mean computational errors are 0.3% for open circuit potential predictions and 1.7% and 4.4% respectively for predictions of cell potential at maximum current density and cell area specific resistance.
Status Review of Nanocrystals Embedded High-K Nonvolatile Memories
Authors: Kuo Yue
Published: April 2011

Nonvolatile memories including high-k dielectric materials are important for future ULSICs. Among several possible structures, the nanocrystals embedded high-k gate dielectric is popular because of the simple fabrication process, versatility in selecting composing materials, good device characteristics and reliability. In this paper, critical issues on the nanocrystals embedded ZrHfO high-k MOS memory capacitors are reviewed and discussed.
Si Nanowire FET Technology
Authors: Iwai Hiroshi , Natori Kenji , Shiraishi Kenji , Iwata Jun-ichi , Oshiyama Atsushi , Yamada Keisaku , Ohmori Kenji , Kakushima Kuniyuki , Ahmet Parhat
Published: April 2011

Although limits of down-scaling of Si-CMOS FETs have been argued for many years, the down-scaling is the most realistic and effective way for the moment to decrease power consumption, increase performance, and also decrease the cost for massproduced integrated circuits, and thus, the CMOS down-scaling competition has heated-up among major semiconductor companies and their alliances. Because of its nature of effectively suppressing the off leakage current with gate around configuration, the Si nanowire FET has been thought be the ultimate structure for ultrasmall CMOS devices towards their downsizing limit. Recently, several experimental data of Si nanowire FETs with very high oncurrent much larger than that of planar MOSFETs have been published. Thus, Si nanowire FETs are now drawing attention as the most promising candidate for the mainstream CMOS devices in 2020s. In this paper, recent research status of Si nanowire FETs in experimental and theoretical works are described.
Organic Sensor Platforms for Environmental and Security Applications
Authors: Seena V. , Dudhe Ravishankar S. , Raval Harshil N. , Patil Sheetal , Kumar Anil , Mukherji Soumyo , Rao V. Ramgopal
Published: April 2011

Organic sensors based on polymer microcantilevers and organic field effect transistors (OFETs) bring orthogonality to the sensing mechanism for different environmental and security applications. Orthogonolity is an important requirement from the point of reducing the false positives, which is of utmost importance for many applications. Development of polymer nanocomposite microcantilever based sensors for explosive vapour detection was reported. These polymer microcantilevers offer a deflection sensitivity of 1.1ppm for 1nm of deflection, which is the highest sensitivity reported till date. The sensor response to trinitrotoluene (TNT) vapours at a few parts per billion concentration levels was demonstrated. OFETs using poly 3-hexylthiophene (P3HT) and CuII tetraphenylporphyrin (CuTPP) composite as their active material were studied as sensors for detection of various nitro-based explosives. Significant changes were observed in the ON current (Ion) and transconductance (gm) of the OFET sensor after exposure to vapours of various explosive compounds. Sensor selectivity to explosive vapours over strong oxidizing agents was also demonstrated. Also, the change in conductivity for organic semiconducting material as a function of ionizing radiation was studied with an organic semiconducting material in resistor and OFET configurations. 30MΩ/Gy sensitivity for the organic resistor sensor and 28fA/Gy/1µm-width sensitivity for OFF current for the OFET sensor were observed. Moreover, changes in various other electrical parameters for an OFET sensor were also found proportional to the ionizing radiation dose.
Metal-Molecule-Silicon Junctions Produced by Flip Chip Lamination of Dithiols: Effect of Molecular Length and Backbone
Authors: Walsh Michael , Coll Mariona , Richter Curt , Hacker Christina
Published: April 2011

The integration of organic molecules with silicon is increasingly being studied for potential as hybrid electronic devices. Creating dense and highly ordered organic monolayers on silicon with reliable metal contacts still remains a challenge. A novel technique, flip chip lamination (FCL), has been developed to create uniform metal-molecule-semiconductor junctions. FCL uses nanotransfer printing to covalently attach self-assembled monolayers to a hydrogen-passivated Si(111) surface. Several dithiol molecules were studied to explore the role of molecular length and chemical structure on the physical and electronic properties of the molecules. The effects of the FCL process on the chemical and physical properties of the imbedded molecular layer were interrogated with polarized-backside reflectance absorption infrared spectroscopy. Electrical measurements were also performed to characterize device structure and to offer better insight into the mechanisms at play in the electronic transport.
Flexible Memristors Fabricated through Sol-Gel Hydrolysis
Authors: Tedesco Joseph L. , Gergel-Hackett Nadine , Stephey Laurie , Herzing Andrew , Hernández-Mora Madelaine , Kopanski Joseph , Hacker Christina , Richter Curt
Published: April 2011

Memristors were fabricated on flexible polyethylene terephthalate substrates consisting of an oxide film generated through hydrolysis of a spun-on sol-gel. X-ray photoelectron spectroscopy, spectroscopic ellipsometry, transmission electron microscopy, and electron energy loss spectroscopy measurements indicated that the oxide films were amorphous TiO2 with a significant fraction of organic material, causing a heterogeneous surface morphology. Despite the morphology and the organic material, these memristors exhibit switching similar to "traditional" memristors. Also, current-voltage (I-V) measurements suggest that this switching was not due to the electric field in the memristors. Additionally, thermal imaging measurements and I-V measurements performed after sectioning the memristors suggest that conduction occurred via localized conduction pathways. Capacitance-frequency and conductance-frequency measurements indicate an additional dielectric loss mechanism was present prior to switching to the higher current state. This loss mechanism is attributed to dipoles present in the organic components of the oxide films from the original sol-gel.
Bipolar Resistive Switching Characteristics of Gd2O3 Thin Film Structure
Authors: Chang Kow-Ming , Tzeng Wen-Hsien , Liu Kou-Chen , Chan Yi-Chun , Kuo Chun-Chih
Published: April 2011

The resistive switching (RS) behavior of the Ti/Gd2O3/Pt capacitor structure is fabricated and discussed in this paper. The switching characteristics operated under positive bias exhibits stable switching properties with a condensed voltage and resistance values dispersion, while the switching characteristics becomes unstable and large fluctuation on switching parameters under the negative bias operation. We suggest that the anode electrode plays an important role to the switching characteristics, and might be the causes of the asymmetry of the I-V curves between positive and negative operation. Constant voltage stress measurement is also tested to reveal the switching mechanism of the Gd2O3 film, and the switching mechanism is mainly based on the applied voltage and thermal Joule heat.
Observation of the Graphene Surface Structure at the Early Stages of Graphene Growth on Copper
Authors: Celebi Kemal , Altun Ali O. , Teo Ken B. , Park Hyung Gyu
Published: April 2011

Scalable growth is essential for graphene-based applications. Recent development has enabled the achievement of the scalability by use of chemical vapor deposition (CVD) at 1000°C with copper as a catalyst and methane as a precursor gas. Here we report our observation of early stage of graphene growth based on an ethylene-based CVD method, capable of reducing the growth temperature to 800°C for monolayer graphene growth on copper films and foils. We track the early stages of slow growth under low ethylene flow rate and observe the graphene domain evolution by varying the temperature and growth time. As the physical properties of the surface also changes along with the graphene domain structure, we also investigate the surface energy of the partially grown graphene. Thus, we demonstrate that the hydrophobicity can be fine tuned by controlling the initial growth of the graphene domains.
"Graphene-Like" Exfoliation and Characterization of the Atomically-Thin Films of Titanium Ditelluride
Authors: Khan Javed M. , Teweldebrhan Desalegne , Nolen Craig , Balandin Alexander
Published: April 2011

We used a "graphene-like" mechanical exfoliation to obtain atomically thin films of TiTe2. The building blocks of titanium ditelluride are atomic tri-layers separated by the van der Waals gaps. The exfoliation procedure allows one to obtain the few-atom-thick films with strong confinement of charge carriers and phonons. We have verified the crystallinity of the exfoliated films and fabricated the back-gated field-effect devices. The current - voltage characteristics of the TiTe2 devices revealed strong non-linearity, which can indicate the charge-density wave effects. The obtained results are important for the proposed application of TiTe2 for the charge-density wave devices and thermoelectric energy conversion.
Transport Properties of Graphene Transistors
Authors: Vogel Eric , Venugopal Archana , Colombo Luigi
Published: April 2011

A detailed analysis of the impact of contact resistance, channel dimensions, oxide thickness, and extraction methodology on extracted mobility is presented. The inclusion of contact resistance strongly impacts the extracted mobility. The extracted mobility is observed to decrease with decreasing channel lengths below ~200 nm due to the transition from diffuse to ballistic transport. The mobility as a function of channel width first increases and then decreases. The increase in mobility for very small channel widths is consistent with a reduction in edge scattering. The decrease in mobility is observed to be strongly dependent on the oxide thickness suggesting that electrostatics associated with fringing fields is an important effect. The results provide a better understanding of mobility variation observed in the literature.
Approaching Terahertz Graphene Transistors
Authors: Duan Xiangfeng
Published: April 2011

Graphene is emerging as an attractive electronic material for future electronics due to its exceptionally high carrier mobility and single-atomic thickness. However, the conventional dielectric integration and device fabrication processes cannot be readily applied to graphene transistors because they can often introduce substantial defects into the monolayer of carbon lattices and severely degrade the device performance. Here we describe a new strategy to fabricate high performance graphene transistors through the hetero-integration of graphene with inorganic nanostructures. First, I will describe the fabrication of high mobility top-gated graphene transistors by first synthesizing free-standing high-k oxide nanostructures and then transferring them onto graphene as top-gate dielectrics. We show that single crystalline Al2O3 nanoribbons can be synthesized with excellent dielectric properties, and can be used as the top-gate dielectrics to enable graphene transistors with the highest carrier mobility exceeding 20,000 cm2/V•s. Furthermore, we describe a self-aligned approach using a metal-dielectric core-shell nanowire as the top-gate, with the source and drain electrodes defined through a self-alignment process and the channel length defined by the nanowire diameter. This fabrication approach preserves the high carrier mobility in graphene, and ensures nearly perfect alignment between source, drain, and gate electrodes. It therefore affords unprecedented transistor performance with the projected intrinsic cut-off frequency approaching terahertz regime.
Simulation of Carbon Heterostructures as Barrier Free Tunneling Transistors
Authors: Yoon Youngki , Salahuddin Sayeef
Published: April 2011

Tunneling Transistors could be one of the candidates for Green Electronics since it may reduce fundamental voltage requirement and hence energy dissipation. However, its tunneling barrier significantly limits current drive and therefore the speed of the device so that it is virtually unusable for high performance applications. Recently we showed that the on current of tunneling transistors can be greatly improved without a large penalty in off state characteristics by using a unique heterostructure including a semi-metal. In this study, we compare two possible heterostructures that can be used for barrier-free tunneling in terms of tunneling probability and junction conductance. Our simulation work shows that a heterostructure obtained by unzipping a metallic CNT can provide better junction conductance as compared to that obtained by patterning a graphene sheet, thereby promising effective barrier-free tunneling for high performance electronics.
Prospective and Critical Issues of III-V/Ge CMOS on Si Platform
Authors: Takagi Shinichi , Takenaka Mitsuru
Published: April 2011

III-V/Ge CMOS on Si platform, realized by heterogeneous integration, is expected to provide a variety of applications from high speed logic CMOS to versatile SoC chips, where various functional devices can be co-integrated. Among them, high speed/low power logic CMOS using III-V/Ge channels are promising device solution for further progress in scaled CMOS. While many critical issues have been well recognized for them, we present possible solutions to break through these difficulties in this paper.
Heterogeneous Integration and Fabrication of III-V MOS Devices in a 200mm Processing Environment
Authors: Waldron Niamh , Nguyen Ngoc Duy , Lin Dennis , Brammertz Guy , Vincent Benjamin , Firrincieli Andrea , Winderick Gillis , Sioncke Sonja , De Jaeger Brice , Wang Gang , Mitard Jerome , Wang Wei-E , Heyns Marc , Caymax Matty , Meuris Marc , Absil Philippe , Hoffmann Thomas
Published: April 2011

We report on the fabrication of MOS capacitors on 200 mm virtual GaAs substrates using a Si CMOS processing environment. The fabricated capacitors were comparable to those processed on bulk GaAs material. Topside contact was made to the GaAs using a novel CMOS compatible self-aligned NiGe contact scheme resulting in a measured contact resistance of 0.26 Ω.cm. Cross-contamination from various III-V substrates was investigated and it was found that by limiting the thermal budget to ≤ 300C cross-contamination from the outgassing of In, Ga and As could be eliminated. For wet processing the judicious choice of recipe and processing conditions resulted in no significant cross-contamination being detected as determined by TXRF monitoring. This achievement enables III-V device production using state-of-the-art Si processing equipment.
Characterization Scheme for III-V Junction Development
Authors: Hung Pui Yee , McDonough Colin , Geer Robert , Hill Richard J. , Deeb Chris , Rader K. , Jammy Raj
Published: April 2011

This work introduces a characterization scheme for junction development of conventional inversion mode bulk MOSFETs with novel III-V substrates, that effectively reduces the cost and development cycle. The scheme is composed of high resolution X-ray diffraction (HRXRD), Raman spectroscopy, secondary ion mass spectrometry (SIMS), and Hall measurements to monitor substrate thickness, composition, crystal quality, mobility, sheet resistance, and dopant activation. We applied this scheme to optimize the post-Si implant activation temperature, study the thermal stability of III-V substrates, and evaluate the impact of a fluorine (F) co-implant. Results show that the optimal post-implant rapid thermal anneal is about 750oC; a flash anneal for III-V should be kept below 900oC. F co-implantation reduces the junction depth but degrades the efficacy of dopant activation.
CMOS Scaling with III-V Channels for Improved Performance and Low Power
Authors: Hill Richard J. , Oh Jungwoo , Park Chanro , Barnett J. , Price Jimmy , Huang Jeff , Goel Niti , Loh W. Y. , Kirsch Paul , Majhi Prashant , Jammy Raj
Published: April 2011

The superior transport properties of III-V materials makes them attractive choices to enable improved performance at low power. This paper examines the module targets and challenges for III-V materials to be successfully integrated for high performance/low power logic at or beyond the 11 nm technology node. A VLSI compatible, self-aligned, III-V on 200mm Si MOSFET process flow is presented using an industry standard toolset. Statistically significant data shows that III-V devices can be processed on a Si line with controlled contamination, good uniformity and yield. The Lg = 500 nm device has a drive current of 471 µA/µm (Vgs = Vds = 1V) and intrinsic transconductance of 1005 µS/um.
III-V MOSFETs: Surface Passivation, Source/Drain and Channel Strain Engineering, Self-Aligned Contact Metallization
Authors: Yeo Yee-Chia , Chin Hock-Chun , Gong Xiao , Guo Huaxin , Zhang Xingui
Published: April 2011

In this paper, we discuss the research and development of gate-stack, source/drain, and contact process modules for high-mobility III-V n-MOSFETs. Work performed in our research group will be reviewed. Surface passivation technologies were developed for forming gate stacks on III-V materials such as GaAs and InGaAs. In situ doped lattice-mismatched source/drain (S/D) stressors were integrated in InGaAs MOSFETs with for reduction of S/D series resistance as well as for channel strain engineering. High-stress liner stressor was also used for inducing strain in the channel of InGaAs FETs. Several salicide-like process technologies were developed for self-aligned contact metallization in III-V MOSFETs. A III-V multiple-gate transistor with lightly doped fin with retrograde doping for suppression of short channel effects was demonstrated.
Band to Band Tunneling Current of Surface Channel Strained InxGa1-xAs (x=0.47,0.65, 0.75) Double Gate Planner TFET
Authors: Siddiqui Saima A. , Shoron Omor Faruk , Zubair Ahmad , Khosru Quazi D.
Published: April 2011

Band to band tunneling current of strained InxGa1-xAs (x=0.47,0.65, 0.75) surface channel double gate TFET has been calculated using a simple numerical model. This proposed model provides reasonably accurate result for planner TFETs in low voltage (below 0.5V) region. However, it has been found that the increase of strain reduces the tunneling current as well as transconductance of the device. But it exhibits almost no roll-off for gate threshold voltage. Moreover, it has been found that increasing temperature increases both on and off current, so the Ion/Ioff is affected weakly by temperature change. Besides, gate threshold voltage exhibits almost no roll-off with change in strain in the channel.
ZrO2-Based InP MOSFETs (EOT ≈ 1.2nm) Using Various Interfacial Dielectric Layers
Authors: Chen Yen-Ting , Zhao Han , Wang Yanzhen , Xue Fei , Zhou Fei , Lee Jack C.
Published: April 2011

This paper presents the device performance of InP MOSFETs with a single ZrO2 gate dielectric and with stacked gate dielectrics using various interfacial layers between ZrO2 and InP substrate, including Al2O3, HfAlOx, and ZrAlOx. Of the gate stacks studied, Al2O3/ZrO2, HfAlOx/ZrO2, and ZrAlOx/ZrO2 bilayer gate dielectrics exhibit lower subthreshold swing, higher drive current and channel mobility compared to a single ZrO2 under similar equivalent oxide thickness of 1.2nm. In the reliability, InP MOSFETs with the bilayer gate stacks are more robust compared to that with a single ZrO2 under similar electrical field stress for 500s. These improvements are attributed to a better interface quality between the bilayer gate stacks and InP substrate, which has been confirmed by frequency dispersion and interface state density measurements.
Electron Scattering in Buried InGaAs/High-k MOS Channels
Authors: Oktyabrsky Serge , Veksler Dmitry , Nagaiah Padmaja , Chidambaram Thenappan , Tokranov Vadim , Yakimov Michael , Kambhampati Rama , Chen Y.-T. , Bersuker Gennadi , Goel Niti , Hobbs Chris
Published: April 2011

In the present work, we studied Hall effect and resistivity at various temperatures in un-gated and gated MOSFET structures with different high-k gate oxides and buried modulation-doped InAlAs/InGaAs/InP quantum well (QW) channels. Data is obtained on mobility behavior as a function of top semiconductor barrier thickness, carrier concentration, nature of oxide, and annealing. Improvement of Hall mobility has been demonstrated with the increase of top barrier thickness. In the structures with 3nm-thick top barrier the Hall mobility of ~5500 cm2/Vs at room temperature was demonstrated with ALD oxides at sheet densities (1-2)x1012 cm-2. Degradation of mobility with reduction of screening at low carrier density and due to increased coulomb scattering after thermal annealing is demonstrated. Gated Hall measurements allowed to directly obtain mobility vs. carrier density characteristics, and also determine the interface trap density using CV's and Hall concentration data.
High-k Oxide Growth on III-V Surfaces: Chemical Bonding and MOSFET Performance
Authors: Hinkle Christopher , Brennan Barry , McDonnell Stephen , Milojevic Marko , Sonnet Arif , Zhernokletov Dmitry , Galatage Rohit , Vogel Eric , Wallace Robert
Published: April 2011

The growth of high-k oxides on III-V surfaces is of vital importance if high-mobility channels are to replace Si in upcoming CMOS technology nodes. Whether these dielectrics are deposited directly on the channel material itself for surface channel devices or on a III-V barrier layer for reduced leakage in buried channel devices, the chemical bonding at these interfaces must be understood to control its impact on transport properties. We have investigated the chemical bonding of ALD deposited high-k oxides on various III-V semiconductors with multiple surface chemical treatments via in-situ, x-ray photoelectron spectroscopy (XPS). A correlation of these interfacial chemical bonds to defect states and device performance of MOS devices fabricated with these same interfaces has been achieved.
Recent Progress of Ge Technology for a Post-Si CMOS
Authors: Toriumi Akira , Lee Choong-hyun , Nishimura Tomonori , Wang Shengkai , Kita Koji , Nagashio Kosuke
Published: April 2011

Ge FET performance has been dramatically improved. Particularly n-MOSFET mobility is sharply going up and approaching to 2,000 cm2/Vsec. Although there are still insufficient properties and issues poorly understood so far, considerably favorable results are increasing. These are basically based on the knowledge about what determines the quality of Ge/dielectrics interface, and why electron mobility has so far been severely degraded in the inversion layer. In Si CMOS technology, the Si/SiO2 interface has been long investigated. In that sense, Ge/GeO2 interface should be intensively studied to establish Ge gate stack technology. So, this paper mainly discusses Ge n-MOSFETs with GeO2 gate dielectrics.
Junctionless Ge MOSFETs Fabricated on 10 nm-Thick GeOI Substrate
Authors: Zhao Dan Dan , Nishimura Tomonori , Lee Choong-hyun , Ifuku Ryota , Nagashio Kosuke , Kita Koji , Toriumi Akira
Published: April 2011

Junctionless field-effect transistor (FET) has recently been proposed for Si nanowire FETs. It avoids junction formation process and shows less sensitive to the channel interface. Here, we demonstrate junctionless FET fabricated on 11 nm-thick heavily doped p-type Ge-on-insulator (GeOI) substrate which combines the higher hole mobility in Ge than in Si with all junctionless FET advantages. The device shows similar I-V characteristics with conventional FETs, and the Ion/Ioff ratio is larger than 104. In addition, the field effect mobility seems to be rather flat with regard to the carrier density. What's more, the Ge junctionless p-FET has better doping flexibility thanks to the strong Fermi level pinning at metal/Ge interface.
Interface and Border Traps in Ge-Based Gate Stacks
Authors: Nyns Laura , Lin Dennis , Brammertz Guy , Bellenger Florence , Shi Xiaoping , Sioncke Sonja , Van Elshocht Sven , Caymax Matty
Published: April 2011

A critical issue for the successful integration of Ge devices into future high-performance technology nodes is the electrical passivation of the Ge surface. We have examined this electrical passivation in terms of interface and border traps for several Ge-based gate stacks, where we varied amongst others the GeO2 thickness, the high-k material and the Post Deposition Anneal (PDA). The GeO2 thickness seems to have the largest impact, and an inverse relation between the density of interface traps Dit and border traps Nbt exists for GeO2 layers up to ~2 nm. We found that the most optimal passivation is achieved by using an (almost) oxide-free surface as this would result in the lowest Nbt. Although such a surface is characterized by a high mid-gap Dit, this can be improved by performing the correct PDA. We conclude that the most promising oxide-free surface is obtained after an H2S treatment.
Detection of the Tetragonal and Monoclinic Phases and their Role on the Dielectric Constant of Atomic Layer Deposited La-Doped ZrO2 Thin Films on Ge (001)
Authors: Wiemer Claudia , Lamperti Alessio , Lamagna Luca , Salicio Olivier , Molle Alessandro , Fanciulli Marco
Published: April 2011

Polymorphysm in doped ZrO2 plays a major role in the tailoring of the dielectric constant (k) of the oxide. In particular, the tetragonal phase is associated with the highest k value. In the present study, we analyze La-doped ZrO2 (La 5% at.) films grown by atomic layer deposition on Ge (001). X-ray diffraction analysis has been systematically conducted using synchrotron radiation on 14-31 nm thick films both as deposited and annealed at 400 °C. Using a grazing incidence methodology the tetragonal an monoclinic phases can be unambiquously detected. Results are corroborated by chemical and electrical analysis. We show that the diffusion of Ge not only stabilizes the tetragonal phase, but also inhibits the formation of the undesired, low-k, monoclinic structure. The stabilizing role of low percentages of La is also discussed by the complementary study of ZrO2 grown on Ge (001) and of La-ZrO2 grown on Si (001)
Bulk and Interface Engineering of GeO2/Ge for High-κ/Germanium Gate Stack
Authors: Oniki Yusuke , Iwazaki Yoshitaka , Ueno Tomo
Published: April 2011

Effects of germanium-monoxide desorption on both the interface and the oxide bulk of thermally grown germanium-dioxide as well as its controlling methods have been investigated. The density of interface states was increased and water absorbency of the oxide film was enhanced by the desorption. The density of positive charge strongly depends on amount of water molecules in the oxide. Moreover, the flat-band voltage shift due to the positive charge, which can be generated at a given electric field from donor-like traps, increases linearly with the maximum field in the oxide. It was found that suppression of both the germanium-monoxide desorption and the water absorption are the keys for fabrication of high-quality germanium-dioxide film as an inter-layer of the high-κ/germanium gate stack.
Characterization of Nickel Germanide Schottky Contacts for the Fabrication of Germanium p-channel MOSFETs
Authors: Gajula Durga Rao , McNeill David , Baine Paul , Fleming Peter , Duffy Ray , Armstrong B. Mervyn
Published: April 2011

Nickel germanide Schottky contacts, formed by rapid thermal annealing of thin nickel films, have been characterized on n-type germanium wafers for a range of RTA temperatures. The highest Schottky barrier heights for electrons (= 0.6-0.7 eV) were obtained for RTA temperatures of approximately 300°C. For this RTA schedule, the corresponding barrier height for holes is close to zero, ideal for Schottky contacted p-channel germanium MOSFETs. When the RTA temperature was increased to 400oC, a dramatic reduction in electron barrier height (< 0.1 eV) was observed. This RTA schedule, therefore, appears ideal for ohmic source/drain contacts to n channel germanium MOSFETs. From sheet resistance measurements and XRD characterization, nickel germanide formation was found to occur at 300oC and above. The NiGe phase was dominant for RTA temperatures up to at least 435oC.
Status of Hexis' SOFC Stack Development and the Galileo 1000 N Micro-CHP System
Authors: Mai Andreas , Iwanschitz Boris , Weissen Ueli , Denzler Roland , Haberstock Dirk , Nerlich Volker , Schuler Alexander
Published: April 2011

Hexis is the developer and manufacturer of the SOFC-based Micro-CHP system Galileo 1000 N. More than 60 Galileo 1000 N systems have been installed up to now and are in operation at customer's sites and in the lab. In the lab, long-term system operation of more than 28000 hours has been achieved. With beginning of 2010 a cell with increased performance has been established as a new standard. An AC net electrical efficiency of the system (including all peripheral consumptions) of 30 to 35 % has been achieved and the overall (electrical + thermal) efficiency of the system is in the range of 90 to 105 % (LHV). On stack level, cells with even higher performance were tested, resulting in electrical efficiencies of up to 44 % (DC) with CPOx reforming and 57 % (DC) with steam reforming.
Development of Residential SOFC CHP System with Flatten Tubular Segmented-In-Series Cells Stack
Authors: Yoshida Hideki , Seyama Takehiro , Sobue Tsutomu , Yamashita Shoji
Published: April 2011

Since 2004, stationary SOFC CHP systems using flatten tubular segmented-in-series (FT-SIS) cells stacks have been developed by Tokyo Gas Co., Ltd., Gastar Co., Ltd., Rinnai Corporation and Kyocera Corporation to construct small-scale CHP systems which excel in performance and durability. In 2008, we have succeeded in producing a residential system which consists of a power generation unit using FT-SIS cells stacks and a heat recovery unit. Electric power and hot water are produced efficiently in the system, and by adopting electric load following operation, the produced energy is supplied to the residence with minimal loss. Since 2009, we have installed the systems into residences to collect operation data under practical use conditions. A part of the tests are conducted under NEDO SOFC Demonstration Program. From the operational data, environmentally-enhancing potentials and superior durability of the FT-SIS SOFC systems are verified.
Development of SOFC-GT Combined Cycle System with Tubular Type Cell Stack
Authors: Yoshida Shin , Kabata Tatsuo , Nishiura Masanori , Koga Shigenori , Tomida Kazuo , Miyamoto Koji , Teramoto Yuichi , Matake Norihisa , Tsukuda Hiroshi , Suemori Shigenori , Ando Yoshimasa , Kobayashi Yoshinori
Published: April 2011

Mitsubishi Heavy Industries (MHI) has developed SOFC with tubular type cell stack since 1984. In this study, we report the current status toward commercialization of SOFC-GTCC power generation system at MHI. To Redox robustness of a cell stack, the sintering characteristics of interconnect was improved. To improve durability of cell stack, long-term change of the electrochemical characteristics had been measured, and analyzed the interface of cathode and electrolyte by SIMS. For compact module, the packing density of the cell stack was increased from 400 to 700 stack/m2, and confirmed I-V characteristics and the temperature distribution of improved module. The generation performance of improved module is roughly comparable to that of conventional type module, and the temperature distribution is also roughly agreement of simulation result.
Performance of a 10 kW SOFC Demonstration Unit
Authors: Halinen Matias , Rautanen Markus , Saarinen Jaakko , Pennanen Jari , Pohjoranta Antti , Kiviaho Jari , Pastula Michael , Nuttall Ben , Rankin Cam , Borglum Brian
Published: April 2011

Experimental results of the performance of a solid oxide fuel cell (SOFC) unit are presented. The unit was designed, manufactured and tested at the VTT Technical Research Centre of Finland. The 10 kW power class SOFC stack and stack module were designed and manufactured by Versa Power Systems (VPS). A successful commissioning test of the unit was conducted in 2010. Long term testing of the unit was started in November 2010. The unit has been operated with natural gas for over 1500 hours supplying electricity to the local grid. The unit has shown robust and uninterrupted performance. Stack DC efficiency of 60% and system net AC efficiency of 43% has been measured during the operation.
Manufacturing and Market-Oriented Development of SOFC Generators at SOFCpower SpA
Authors: Bertoldi Massimo , Bucheli Olivier , Modena Stefano , Larrain Diego , Ravagni Alberto
Published: April 2011

SOFCpower-HTceramix' mission is to offer new energy solutions to the distributed electricity market based upon its efficient and competitive Solid Oxide Fuel Cell (SOFC) technology. The company develops and manufactures SOFC power modules in close collaboration with European heat appliance OEMs and utilities for domestic cogeneration and distributed power generation. Furthermore, the company is actively involved in strategic research initiatives to demonstrate the use of planar SOFC stack technology for high temperature electrolysis (SOEC) and leads for this purpose the European FCH project ADEL (ADvanced ELectrolysers) with 13 partners. Thanks to more than 2 years operational experience in running its pilot plant in Italy (Mezzolombardo, TN), SOFCpower has sufficiently consolidated its manufacturing knowhow and capabilities to confirm the competitiveness of its products, which are capable to match target market requirements and being produced at less than 1000 €/kWe. This result has been possible also thanks to specific investments made on testing and qualification facilities in order to ensure quality and reproducibility of stack production. The current focus of the company is to certify its products and to bring together the whole value chain for distributed power generation, including component suppliers, integrators, installers and utilities, in order to be able to start field tests campaign in late 2011.
Product Development for SOFC and SOE Applications
Authors: Glauche Andreas , Betz Thomas , Ise Martin
Published: April 2011

Recently Kerafol's alliance with H.C. Starck and the commercial availability of the jointly developed high - output cells with scandium doped zirconia electrolytes was announced. Together the companies are able to provide cells possessing extraordinary performance and long term stability. The combined production facilities meet the increased demand of SOFC stack and system manufacturers. Currently the installation of test benches for MEA characterization is being prepared for quality assurance as well as for development. In addition to cell performance enhancements the emerging topic of electrolysis with solid oxide electrolysis cells (SOEC) will be examined. Because of the fluctuating availability of renewable energy the electrolysis mode of SOFCs to save energy in form of hydrogen during an overproduction and the reverse power generation during periods without wind or sun is of high interest. The first step in a new project examines the feasibility of a SOEC. The next steps include the development of reliable cells with regard to robustness and long term stability. In this paper the status quo of electrolyte supported cells as well as the development project dealing with SOEC at Kerafol is summarized. Additionally the optimization of tape cast, custom-fit glass sealants obtainable from Kerafol for both SOFC and SOEC applications is described. The efforts are focused upon quality improvement, cost reduction and industrial scale manufacturing of sealants.
Current Status of NEDO Project on Durability/Reliability of Solid Oxide Fuel Cell Stacks/Systems
Authors: Yokokawa Harumi
Published: April 2011

Fundamental investigations on the durability and reliability of SOFC modules/stacks have started as one of the new NEDO SOFC project from 2008 to 2013.  The main target is to make sure the long term durability in the range of 40,000 h and reliability during 250 times of starting up and ending operation mode; for this purpose, it needs to adopt the accelerating methods for establishing durability and reliability. This project consists of industrial developers, public research institutes and universities. Investigations will be made using real stacks, real cells and single model cells to facilitate the cooperation among three parties. Industrial developers will focus on the test of durability and reliability using real stacks, whereas universities and research institutes will focus on the fundamental understanding on degradation using various kinds of cells from various different approaches based on thermodynamic, chemical, and mechanical aspects; since three phase boundaries are important in understanding of degradation in electrochemical performance, special emphasis will be paid on this research topics. Prediction of life is also important topics in this project on durability and reliability.
In situ Observation of the Deformation and Mechanical Damage of SOFC Cell/Stack
Authors: Sato Kazuhisa , Sakamoto Tadashi , Kaimai Atsushi , Yashiro Keiji , Amezawa Koji , Hashida Toshiyuki , Mizusaki Junichiro , Kawada Tatsuya
Published: April 2011

Deformation and mechanical damage measurement techniques were developed in order to investigate the degradation process of SOFC cell/stack and module under SOFC operation. In this study, the deformation and mechanical damage test was applied to simulated cell and stack. The deformation, micro crack and delamination in the cell and stack were detected by displacement gauge and acoustic emission (AE) method. The observation method determined location of signal and mechanism of the deformation and microcrack in the SOFC cell/stack. By using this method, it was possible to show the possibility that the detailed deterioration process can be evaluated, visually, and in real-time, even when applied to cell and stack at the actual equipment level.
Demonstration of a Highly Efficient SOFC System with Combined Partial Oxidation and Steam Reforming
Authors: Schimanke Danilo , Posdziech Oliver , Mai Björn Erik , Kluge Stefan , Strohbach Thomas , Wunderlich Christian
Published: April 2011

SOFC (solid oxide fuel cell) are known for a high electrical efficiency and especially the ESC (electrolyte supported cells) for a good robustness for system operation. Nevertheless common system concepts that use CPOX (catalytic partial oxidation) or SR (steam reforming) as fuel processing still show disadvantages. CPOX systems will not pass efficiencies beyond 35% and SR systems need additional water processing that increases complexity, as well as initial and operational costs. A technical solution for those disadvantages is a staged system design. staxera GmbH has developed a concept and EBZ GmbH has designed, built and operated a proof-of-concept installation including a serial connection of two SOFC stacks. This system design achieved an electrical efficiency of 55% due to a double use of fuel gas in stage two. In contrast to other highly efficient SOFC systems, mostly SR systems, no additional water supply and processing were needed.
System Relevant Redox Cycling in SOFC Stacks
Authors: Brabandt Joerg , Fang Qingping , Schimanke Danilo , Heinrich Mario , Mai Björn Erik , Wunderlich Christian
Published: April 2011

staxera GmbH is a manufacturer of commercial available solid oxide fuel cell (SOFC) stacks and Integrated Stack Modules (ISM). The aim of development and testing is to meet the requirements of existing customers and the needs of the market. Besides high power densities, low degradation rates in long term operation and thermal cycling capability, the possibility for oxidation and reduction (redox) cycles as a requirement of system operation or in case of a system failure is a big challenge in today's SOFC stack development. In this publication, data for different types of redox cycles at stack level is reported, including system relevant combined thermal and redox cycling.
Portable μ-SOFC System Based on Multilayer Technology
Authors: Reuber Sebastian , Schneider Mareike , Stelter Michael , Michaelis Alexander
Published: April 2011

An ultra-compact, portable solid oxide fuel cell (SOFC) system in the 100 Watt class is presented which is based on multilayer and ceramic technology and that runs on conventional fuels. The active SOFC system core within the insulation is smaller than 1 liter. The eneramic® system is designed for LPG mixtures and operates on ethanol as well. Due to its good thermal packaging the system achieves a gross efficiency of 33% and net efficiency up to 24% when commercial BoP components are applied.
Metal-Supported Cells with Comparable Performance to Anode-Supported Cells in Short-Term Stack Environment
Authors: Rüttinger Matthias , Mücke Robert , Franco Thomas , Büchler Oliver , Menzler N.H. , Venskutonis Andreas
Published: April 2011

Metal-supported fuel cells (MSC) are one of the most focused SOFC technologies world-wide for so-called APUs (auxiliary power units) in heavy duty vehicles. In the scope of the present work MSC cells were developed on the basis of a porous support made from a ferritic oxide dispersion strengthened Fe-Cr alloy (ITM). A sintered anode of nickel and 8 mol% yttria stabilized zirconia (8YSZ) and an adaptation layer (8YSZ) were applied to provide a smooth surface with a defined residual porosity which allowed the deposition a very thin, gas-tight electrolyte layer (approx. 1.5 µm) of gadolinium doped ceria (GDC) by reactive sputtering. First cell and stack-tests with a lanthanum strontium cobalt ferrite (LSCF) cathode are presented. In the stack a current density of 1.2 A/cm² was reached at 800 °C and 0.7 V. This was the same power output as conventional anode-supported cells (ASC) under the same testing conditions. Therefore, it is shown that metal-supported cells can deliver the same electrochemical performance as anode-supported cells in a stack.
High Efficiency CFY-Stack for High Power Applications
Authors: Megel Stefan , Kusnezoff Mihails , Trofimenko Nikolai , Sauchuk Viktar , Michaelis Alexander , Venskutonis Andreas , Rissbacher Klaus , Kraussler Wolfgang , Brandner Marco , Bienert Christian , Sigl Lorenz S.
Published: April 2011

SOFC modules with a power of 5 to 50 kW are a serious competitor to commercially available combined heat and power plants for decentralized electricity and heat supply with high electrical efficiency. Electrical efficiency and electrical power of a SOFC stack are essential for its profitable operation. The highest power density and electrical efficiency can only be achieved with planar SOFC stacks. Electrolyte supported cells with 10ScSZ electrolytes allow power densities of more than 500 mW/cm². On account of the thermomechanical properties of electrolyte this potential can only be used in stacks with chromium based interconnects (CFY from Plansee SE). High power, robustness and long-term stability are essential for stationary SOFC systems. In order to fulfill these requirements Fraunhofer IKTS in close collaboration with Plansee SE develops a new stack design with larger active area, simple cathode contacting, external cathode manifold and optimized interconnect layer. This paper will give an overview of the current SOFC stack development focused on power output, long-term stability, temperature cycling and reliability of SOFC stack assembling.
The Effects of Dynamic Dispatch on the Degradation and Lifetime of Solid Oxide Fuel Cell Systems
Authors: Nakajo Arata , Mueller Fabian , McLarty Dustin , Brouwer Jacob , Van Herle Jan , Favrat Daniel
Published: April 2011

Understanding mechanisms that affect degradation and durability of solid oxide fuel cell (SOFC) stacks and systems is becoming increasingly important as systems are being deployed around the world. While the underlying mechanisms for degradation have not been completely clarified, a novel simulation approach that accounts for the state-of-the-art understanding and concurrent solution of the governing physics of several degradation mechanisms in the context of an operating SOFC system has been developed. The approach simulates a stack repeating unit with a model that includes a selection of degradation processes: the loss of ionic conductivity of the electrolyte material, the corrosion of the metallic interconnect (MIC), the growth of nickel particles and the chromium contamination of a lanthanum-strontium manganite-based cathode are implemented.
Environmental Effects on a Thermally Self-Sustained SOFC Hot Zone
Authors: Cui Daan , Du Yanhai , Reifsnider Kenneth , Chen Fanglin
Published: April 2011

High operating temperatures (600-1000oC) of solid oxide fuel cell (SOFC) systems have been a concern to many users as well as fuel cell developers. In portable applications, the challenges of how to heat the stack from ambient temperatures to operating temperatures and then maintain those temperatures need to be addressed. Moreover, illustrating the stability of the hot zone under various environmental temperatures has also become important for various applications. This paper reports relevant studies regarding the performance of a portable SOFC-based hot zone under different environmental temperatures. The results showed that decreasing the environmental temperatures could apparently decrease stack temperatures and CPOX temperatures, and slightly drop the hot zone power due to stack temperature variations. A model showing a good feasibility for analyzing heat losses in hot zones has been built.
Development of Anode-Supported Flat-Tube Solid Oxide Fuel Cell (SOFC) Stack with High Power Density
Authors: Lee Seung-Bok , Lee Jong-Won , Lim Tak-Hyoung , Park Seok-Joo , Song Rak-Hyun , Shin Dong-Ryul
Published: April 2011

An anode-supported flat tubular SOFC stack for intermediate temperature (700~800oC) operation was fabricated and operated in this study. For this purpose, we fabricated anode-supported flat tubular cells by optimization of the current collecting method and the induction brazing process. After that, we designed a compact fuel and air manifold by adopting a simulation technique to uniformly supply fuel and air gas into the stack and a unique seal and insulation method to make a more compact stack. To assemble the stack, the prepared anode-supported flat tubular cells with an effective electrode area of 90 cm2 were connected in series to 30 bundles, in which one unit bundle consists of two flat tubular cells connected in parallel. The performance of the stack in 3 % humidified H2 and air at 750oC showed a maximum electrical power of 921 W.
Medium Temperature Solid Oxide Fuel Cells Based on Supporting Porous Anode and Bilayered Electrolyte
Authors: Lust Enn , Kivi Indrek , Tamm Kadi , Möller Priit , Anderson Erik , Kurig Heisi , Vestli Mihkel , Nurk Gunnar
Published: April 2011

Solid oxide fuel cell single cells based on Ni-Ce0.9Gd0.1O2-d or Ni Zr0.92Y0.08O2-d supporting anodes, bi-layered Zr0.92Y0.08O2-d | Ce0.9Gd0.1O2-d or Zr0.9Sc0.1O2-d | Ce0.9Gd0.1O2-d electrolytes and micro-meso-porous La0.6Sr0.4CoO3-d, Gd0.6Sr0.4CoO3-d or Pr0.6Sr0.4CoO3-d cathodes prepared from nano-micro-powders at different sintering temperatures and pore former additions in the raw cathode and anode pastes have been studied using XRD, FIB-SEM, AFM, BET, cyclic voltammetry, chronoamperometry and electrochemical impedance methods. Influence of the anode and cathode porosity, depending on the electrode preparation methods, and also of the bi-layered electrolyte properties (chemical composition, thickness, etc.) on the power density of the single cells has been shown and discussed.