bluuebunny/crossref_metadata_2025 huggingface dataset:
Modeling and optimizing run-time reconfiguration using evolutionary computation
Authors: Harkin J. , McGinnity T. M. , Maguire L. P.
Published: August 2005

The hardware--software (HW--SW) partitioning of applications to dynamically reconfigurable embedded systems allows for customization of their hardware resources during run-time to meet the demands of executing applications. The run-time reconfiguration (RTR) of such systems can have an impact on the HW--SW partitioning strategy and the system performance. It is therefore important to consider approaches to optimally reduce the RTR overhead during the HW--SW partitioning stage. In order to examine potential benefits in performance, it is necessary to develop a method to model and evaluate the RTR. In this paper, a novel method of modeling and evaluating such RTR-reduced HW--SW partitions is presented. The techniques of computation-reconfiguration overlap and the retention of circuitry between reconfigurations are used within this model to explore the possibilities of RTR reduction. The integration of this model into the authors' current genetic-algorithm-driven HW--SW partitioner is also presented, with two applications used to illustrate the benefits of RTR-reduced exploration during HW--SW partitioning.
Schedulability analysis of applications with stochastic task execution times
Authors: Manolache Sorin , Eles Petru , Peng Zebo
Published: August 2005

In the past decade, the limitations of models considering fixed (worst-case) task execution times have been acknowledged for large application classes within soft real-time systems. A more realistic model considers the tasks having varying execution times with given probability distributions. Considering such a model with specified task execution time probability distribution functions, an important performance indicator of the system is the expected deadline miss ratio of the tasks and of the task graphs. This article presents an approach for obtaining this indicator in an analytic way.

Our goal is to keep the analysis cost low, in terms of required analysis time and memory, while considering as general classes of target application models as possible. The following main assumptions have been made on the applications that are modeled as sets of task graphs: the tasks are periodic, the task execution times have given generalized probability distribution functions, the task execution deadlines are given and arbitrary, the scheduling policy can belong to practically any class of non-preemptive scheduling policies, and a designer supplied maximum number of concurrent instantiations of the same task graph is tolerated in the system.

Experiments show the efficiency of the proposed technique for monoprocessor systems.
Acknowledgements
Authors: Lee Newton
Published: August 2005

Flash homepage design volunteers—Alex Lieu, Johnny Rodriguez, Michael Borys—3-Pin Media

Flash animation volunteers— Jay Popeski, Jeffrey Blyseth— Axis Graphics

HTML design volunteer— Joe Raymond

Video and sound editing volunteer— Newton Lee, Eric Huff

Producer and editor-in-chief— Newton Lee

Also thanks to all authors, interviewees, reviewers, editorial board advisors, and the entire ACM staff including Mark Mandelbaum, John White, Roma Simon, Irma Strolia, Carol Wierzbicki, Edwin Rodriguez, Jono Hardjowirogo, and Virginia Gold for their support.
Women's game conference 2005 dates
Authors: Sherman Chris
Published: August 2005

Just a quick note so you can mark your calendar. The 2005 Women's Game Conference will take place Wednesday and Thursday, October 26-27, 2005 at the Austin Convention Center (same location in the convention center as the 2004 conference).

The Austin Game Conference will take place Thursday and Friday, October 27-28, 2005 at the Austin Convention Center.

Stay Well,

Chris
Digital delivery considerations for entertainment media
Authors: Raciborski Nathan
Published: August 2005

To the delight of content providers, 2003 was the year in which significant consumer demand began to build for paid online content. The momentum was seen most notably in music licensed and delivered via the Internet with hundreds of thousands of songs readily available from numerous legal download services. With widespread adoption of broadband connectivity, other forms of digital content such as movies, games and IP television are increasingly capturing large audiences as well. The challenge for providers of such paid content is to deliver their product flawlessly in an era of cost-consciousness and return on investment demands. This is increasingly being done via a new breed of service providers called Digital Delivery Networks (DDNs), who specialize in making high-capacity, fast response and ultra-reliable online media distribution a cost-effective option.

Industry analysts state that nearly 40 percent of homes in America today utilize a broadband service and are downloading digital files that are growing exponentially larger in size each year. Launching a service capable of routing such large files to these content-hungry visitors quickly and efficiently is crucial to the long-term viability and profitability of any online content provider.

While most end-users may not consider where their Internet content originates and how this content reaches their computer, DDNs are expanding and enhancing services in order to address the specific needs of greater bandwidth availability, faster delivery and increased reliability for companies with an online presence. Unlike legacy content delivery networks (CDNs) that were designed primarily to handle static pictures on websites for faster page loads, a Digital Delivery Network is designed to scale with the increasing file sizes of today's interactive media and unpredictable audiences. This means increased media server capacity, enhanced Internet backbone connectivity and strategically distributed infrastructure deployment to reach the largest possible audience.

But how does one choose a reliable DDN provider and what should companies look for in a DDN? Online content providers can meet the growing demands of consumers by ensuring three key elements are met by their DDN partner in the distribution of large media files. By addressing the very specific needs of end-users for speed, reliability, and the flexibility in creating unique solutions for content providers to address these needs, true DDNs can enable online business models to flourish.
Non-photorealistic rendering techniques for motion in computer games
Authors: Haller Michael , Hanl Christian , Diephuis Jeremiah
Published: August 2005

Still images can portray motion by using a stylized technique. Most of these techniques are commonly used for dynamic images as well (e.g., for cartoons). Typically, an artist abstracts the motion of a specific scene or animation to illustrate movement. Depicting motion in real-time environments is no less essential, and therefore a similar approach is desirable. Our approach is focused on three methods to stylize motion: squash-and-stretch, multiple images, and motion lines. A discussion of these methods for depicting motion in dynamic images and an implementation are presented in this paper. Finally, we discuss the results and conclude with the outlook for further development.
Jabber for multiplayer flash games
Authors: Lee Newton
Published: August 2005

Disney's Blast is a collection of over 100 games, activities, and stories that entertain and educate young children. As we began to introduce multiplayer turn-based games to a young audience, we decided to integrate Flash and Jabber to take advantage of superior streaming animation and reliable, scalable, real-time communication. Flash and Jabber together have not only enhanced user experience at Disney's Blast, but have also significantly reduced online gaming development time and deployment costs, in comparison to other multiplayer server solutions.
Dynamic coalescing for 16-bit instructions
Authors: Krishnaswamy Arvind , Gupta Rajiv
Published: August 2005

In the embedded domain, memory usage and energy consumption are critical constraints.Embedded processors such as the ARM and MIPS provide a 16-bit instruction set, (called Thumb in the case of the ARM family of processors), in addition to the 32-bit instruction set to address these concerns. Using 16-bit instructions one can achieve code size reduction and instruction cache energy savings at the cost of performance. This paper presents a novel approach that enhances the performance of 16-bit Thumb code. We have observed that throughout Thumb code there exist Thumb instruction pairs that are equivalent to a single ARM instruction. We have developed enhancements to the processor microarchitecture and the Thumb instruction set to exploit this property. We enhance the Thumb instruction set by incorporating
Augmenting eXtensions
(AX). A Thumb instruction pair that can be combined into a single ARM instruction is replaced by an AXThumb instruction pair by the compiler. The AX instruction is coalesced with the immediately following Thumb instruction to generate a single ARM instruction at decode time. The enhanced microarchitecture ensures that coalescing does not introduce pipeline delays or increase cycle time thereby resulting in reduction of both instruction counts and cycle counts. Using AX instructions and coalescing hardware we are also able to support efficient predicated execution in 16-bit mode.
Synthesis of application-specific highly efficient multi-mode cores for embedded systems
Authors: Chiou Lih-yih , Bhunia Swarup , Roy Kaushik
Published: August 2005

In this paper, we present a novel design methodology for synthesizing multiple configurations (or modes) into a single programmable core that can be used in embedded systems. Recent portable applications require reconfigurability of a system along with efficiency in terms of power, performance, and area. The field programmable gate arrays (FPGAs) provide a reconfigurable platform; however, they are slower in speed with significantly higher power and area than achievable by a customized application-specific integrated circuits (ASIC). Implementation of a system in either FPGA or ASIC represents a trade-off between programmability and design efficiency. In this work, we have developed techniques to realize efficient reconfigurable cores for a set of user-specified applications. The resultant system, named asmultimodesystem, can easily switch configurations throughout the set of configurations it is designed for. A data flow graph transformation method coupled with efficient scheduling and allocation is used to automatically synthesize aMulti-Modesystem from its behavior-level specifications. Experimental results on several applications demonstrate that our implementations can achieve about 60X power reduction on average and run 3.5X faster over corresponding FPGA implementations.
Coming soon
Authors: Lee Newton
Published: August 2005

Technology Induced Change in Film/Television Distribution

High Performance Data Recording Architecture and High Definition Video

Mobile Digital Rights Management for Multimedia

The Universal Preservation Format: A Recommended Practice for Archiving Media and Electronic Records

Design vs. Content: A Survey of Ten Popular Web Sites That Made Emotional Connections with the User

Agents Based Modelling for a Peer-to-Peer MMOG Architecture

A RIO-like Technique for Interactivity Loss Avoidance in Fast-Paced Multiplayer Online Games: A Preliminary Study

Portholes and Planes: Faster Dynamic Evaluation of Potentially Visible Sets

and more...
Acknowledgements
Authors: Lee Newton
Published: August 2005

Producer and editor-in-chief
— Newton Lee

Flash homepage design consultants
— Alex Lieu, Johnny Rodriguez, Michael Borys—3-Pin Media

Flash animation consultants
— Jay Popeski, Jeffrey Blyseth—Axis Graphics

HTML design consultant
— Joe Raymond

Audio-visual consultant
— Eric Huff

Also thanks to all authors, interviewees, reviewers, editorial board advisors, and the entire ACM staff including Mark Mandelbaum, John White, Roma Simon, Irma Strolia, Edwin Rodriguez, Jono Hardjowirogo, Maida Pacheco, Roxanne Carcaterra, Carol Wierzbicki, Craig Rodkin, Doug Meszler, Virginia Gold, and Lillian Israel for their support.
From linear to interactive animation
Authors: Tomlinson Bill
Published: August 2005

There are significant differences between the art of animating for linear media such as film and video and the art of animating for interactive media such as computer and video games. In particular, these differences arise from the shift from linear characters to autonomous interactive characters. This article describes differences between linear animation and interactive animation in several areas of character design -- character intelligence, emotional expressiveness, navigation, transitions among animations, and multi-character interaction. These differences provide insight into the processes of both forms of animation and the final products that they create, and may provide a starting point for linear animators interested in becoming familiar with interactive animation.
Review of "Synthetic Creatures with Learning and Reactive Behaviors by Alex J. Champandard", New Riders Publishing, 2004, 768 pp.
Authors: Yannakakis Georgios N.
Published: August 2005

This book is the first attempt to bridge the current gap between artificial intelligence (AI) research in academia and computer-game development in industry. The book bridges the gap successfully. The author uses FEAR (Flexible Embodied Animat 'Rchitecture), which is an open-source project integrated with a commercial first-person shooter (FPS) game, to analyze, implement, test, and evaluate various AI approaches to various behavioral tasks for nonplayer characters (NPCs). The tasks start with low-level obstacle-avoidance and progress to high-level character emotions; each task with its own part in the book.] Each part is structured into chapters and follows a standard schema: the problem is analyzed, potential mechanisms (including AI) are discussed informally, details of the selected approach are outlined formally, an implementation is provided, the approach is evaluated (primarily visually) through simulation, and finally the advantages and disadvantages of the proposed approach are discussed.
Review of "Techniques for 21st Century Fiction by A. S. Glassner", A. K. Peters, Ltd., Natick, MA 511 pages. ISBN 1-56881-221-3. $35.00.
Authors: Maldonado Edgar A. , Zupko Joseph A.
Published: August 2005

For centuries, people have enjoyed both stories and games. As a result, a form of entertainment that combines storytelling with game-playing seems a great idea. It has the potential to be a lot of fun. Unfortunately, the road to this entertainment form is long and complicated and many difficulties must be overcome. Andrew Glassner, in his new book
Interactive Storytelling: Techniques for 21st Century Fiction
, does an excellent job identifying these difficulties. He analyzes games and storytelling, and describes the principal problems that developers face in merging these two activities into an interactive form of entertainment.
Design vs. content
Authors: Vogler David
Published: August 2005

This article presents a humorous overview and commentary on recent web sites that captivated the Internet community. It asks the question, "Does a web site need to display design and interface excellence to be popular?" The article is divided into ten short parts. Each part presents a summary of the web site in question, along with a visual sample. Special emphasis is placed on pop culture's influence and involvement in audience perceptions.
Taking on the masses with mobile messaging TV
Authors: Miller Samuel
Published: August 2005

Just like the Internet and cellular revolutions preceding it, mobile messaging TV may alter the viewing habits of millions of cable subscribers in the years to come.
Instantaneous current modeling in a complex VLIW processor core
Authors: Muresan Radu , Gebotys Catherine
Published: August 2005

Measuring and modeling instantaneous current consumption or current dynamics of a processor is important in embedded system designs, wireless communications, low-energy mobile computing, security of communications, and reliability. In this paper, we introduce a new instruction-level based macromodeling approach for instantaneous current consumption in a complex processor core along with new instantaneous current measurement techniques at the instruction and program level. Current consumption and voltage supply waveforms of a processor core were acquired by a sampling oscilloscope through an external interrupt-based setup. Accurate measurements of current, power and energy consumption at the instruction, block, or program level were obtained from analyzing the stored current and voltage waveforms. The current simulation methodology uses elementary functions called atomic functions to approximate the instantaneous current consumption at the instruction level. Based on these atomic functions, a simulated instantaneous current waveform at the program level was built. First, a base waveform of the current simulation was generated by the use of four basic current superposition principles. Secondly, a final waveform of the simulated current was generated from the base waveform by applying a factorial adjustment as a function of the instruction parallelism and sequencing. Step-by-step modeling procedures with numerical examples are presented. The model captured 98% of the variation of the instantaneous current for six complex applications, with an average RMS error of less than 2.2% of the average measured mean. Energy estimates obtained by the use of the simulated current waveforms were within 1.4% of the measured values. This research is important, since for the first time highly accurate instruction-based models of instantaneous current and power for complex processor cores have been developed.
Reactive search, a history-sensitive heuristic for MAX-SAT
Authors: Battiti Roberto , Protasi Marco
Published: August 2005

The Reactive Search (RS) method proposes the integration of a simple
history-sensitive (machine learning)
scheme into local search for the on-line determination of free parameters. In this paper a new RS algorithm is proposed for the approximated solution of the Maximum Satisfiability problem: a component based on local search with temporary prohibitions (Tabu Search) is complemented with a reactive scheme that determines the appropriate value of the prohibition parameter by monitoring the Hamming distance along the search trajectory. The proposed algorithm (H-RTS) can therefore be characterized as a
dynamic
version of Tabu Search.

In addition, the
non-oblivious
functions recently introduced in the framework of approximation algorithms are used to discover a better local optimum in the initial part of the search

The algorithm is developed in two phases. First the bias-diversification properties of individual candidate components are analyzed by extensive empirical evaluation, then a reactive scheme is added to the winning component, based on Tabu Search.

The final tests on a benchmark of random MAX-3-SAT and MAX-4-SAT problems demonstrate the superiority of H-RTS with respect to alternative heuristics.
The exponential hash function
Authors: Smith Bradley J. , Heileman Gregory L. , Abdallah Chaouki
Published: August 2005

In this paper an efficient open address hash function called exponential hashing is developed. The motivation for this hash function resulted from our ongoing efforts to apply dynamical systems theory to the study of hashing; however, the analysis conducted in this paper is primarily based on traditional number theory. Proofs of optimal table parameter choices are provided for a number of hash functions. We also demonstrate experimentally that exponential hashing essentially matches the performance of a widely-used optimal double hash function for uniform data distributions, and performs significantly better for nonuniform data distributions. We show that exponential hashing exhibits a higher integer Lyapunov exponent and entropy than double hashing for initial data probes, which offers one explanation for its improved performance on nonuniform data distributions.
Implementing radixsort
Authors: Andersson Arne , Nilsson Stefan
Published: August 2005

We present and evaluate several optimization and implementation techniques for string sorting. In particular, we study a recently published radix sorting algorithm, Forward radixsort, that has a provably good worst-case behavior. Our experimental results indicate that radix sorting is considerably faster (often more than twice as fast) than comparison-based sorting methods. This is true even for small input sequences. We also show that it is possible to implement a radixsort with good worst-case running time without sacrificing average-case performance. Our implementations are competitive with the best previously published string sorting programs.
Augment or push
Authors: Cherkassky Boris V. , Goldberg Andrew V. , Martin Paul , Setubal Joao C. , Stolfi Jorge
Published: August 2005

We conduct a computational study of unit capacity flow and bipartite matching algorithms. Our goal is to determine which variant of the push-relabel method is most efficient in practice and to compare push-relabel algorithms with augmenting path algorithms. We have implemented and compared three push-relabel algorithms, three augmenting-path algorithms (one of which is new), and one augment-relabel algorithm. The depth-first search augmenting path algorithm was thought to be a good choice for the bipartite matching problem, but our study shows that it is not robust (meaning that it is not consistently fast on all or most inputs). For the problems we study, our implementations of the FIFO and lowest-level selection push-relabel algorithms have the most robust asymptotic rate of growth and work best overall. Augmenting path algorithms, although not as robust, on some problem classes are faster by a moderate constant factor. Our study includes several new problem families and input graphs with as many as 5 × 105 vertices.
A usage based analysis of CoRR
Authors: Carr Les , Hitchcock Steve , Hall Wendy , Harnad Stevan
Published: August 2005

Based on an empirical analysis of author usage of CoRR, and of its predecessor in the Los Alamos eprint archives, it is shown that CoRR has not yet been able to match the early growth of the Los Alamos physics archives. Some of the reasons are implicit in Halpern s paper,and we explore them further here. In particular,we refer to the need to promote CoRR more effectively for its intended community computer scientists in universities, industrial research labs and in government. We take up some points of detail on this new world of open archiving concerning central
versus distributed self-archiving,publication, the restructuring of the journal publishers review and copyright.
Readable computer documentation
Authors: Klare George R.
Published: August 2005

A retrospective look shows earlier advice still relevant to both predicting and producing readable writing. For prediction, refined readability formulas with stronger criterion passages and updated familiar -word lists have appeared, although the computerization of readability tests sometimes encourages misapplying or misinterpreting them when screening text. For production, attention to sentence construction, word characteristics, and information density remains relevant to both drafting and revising computer documentation for readability, especially since reading speed and reader preference often interact with comprehension in practical settings.
Genre ecologies
Authors: Spinuzzi Clay , Zachry Mark
Published: August 2005

Arguing that current approaches to understanding and constructing computer documentation are based on the flawed assumption that documentation works as a closed system, the authors present an alternative way of thinking about the texts that make computer technologies usable for people. Using two historical case studies, the authors describe how a genre ecologies framework provides new insights into the complex ways that people use texts to make sense of computer technologies. The framework is designed to help researchers and documentors account for contingency, decentralization, and stability in the multiple texts the people use while working with computers. The authors conclude by proposing three heuristic tools to support the work of technical communicators engaged in developing documentation today: exploratory questions, genre ecology diagrams, and organic engineering.
Computing the width of a three-dimensional point set
Authors: Schwerdt J. , Smid M. , Majhi J. , Janardan R.
Published: August 2005

We describe a robust, exact, and efficient implementation of an algorithm that computes the width of a three-dimensional point set. The algorithm is based on efficient solutions to problems that are at the heart of computational geometry: three-dimensional convex hulls, point location in planar graphs, and computing intersections between line segments. The latter two problems have to be solved for planar graphs and segments on the unit sphere, rather than in the two-dimensional plane. The implementation is based on LEDA, and the geometric objects are represented using exact rational arithmetic.
Finding the right cutting planes for the TSP
Authors: Levine Matthew S.
Published: August 2005

Given an instance of the Traveling Salesman Problem (TSP), a reasonable way to get a lower bound on the optimal answer is to solve a linear programming relaxation of an integer programming formulation of the problem. These linear programs typically have an exponential number of constraints, but in theory they can be solved efficiently with the ellipsoid method as long as we have an algorithm that can take a solution and either declare it feasible or find a violated constraint. In practice, it is often the case that many constraints are violated, which raises the question of how to choose among them so as to improve performance. For the simplest TSP formulation it is possible to efficiently find all the violated constraints, which gives us a good chance to try to answer this question empirically. Looking at random two dimensional Euclidean instances and the large instances from TSPLIB, we ran experiments to evaluate several strategies for picking among the violated constraints. We found some information about which constraints to prefer, which resulted in modest gains, but were unable to get large improvements in performance.
Experiments with list ranking for explicit multi-threaded (XMT) instruction parallelism
Authors: Vishkin Dascal , Vishkin Uzi
Published: August 2005

Algorithms for the problem of list ranking are empirically
studied with respect to the Explicit Multi-Threaded (XMT) platform
for instruction-level parallelism (ILP). The main goal of this
study is to understand the differences between XMT and more
traditional parallel computing implementation platforms/models as
they pertain to the well studied list ranking problem. The main two
findings are: (i) good speedups for much smaller inputs are
possible and (ii) in part, the first finding is based on a new
variant of a 1984 algorithm, called the No-Cut algorithm. The paper
incorporates analytic (non-asymptotic) performance analysis into
experimental performance analysis for relatively small inputs. This
provides an interesting example where experimental research and
theoretical analysis complement one another. Explicit
Multi-Threading (XMT) is a fine-grained computation framework
introduced in our SPAA'98 paper. Building on some key ideas of
parallel computing, XMT covers the spectrum from algorithms through
architecture to implementation; the main implementation related
innovation in XMT was through the incorporation of low-overhead
hardware and software mechanisms (for more effective fine-grained
parallelism). The reader is referred to that paper for detail on
these mechanisms. The XMT platform aims at faster single-task
completion time by way of ILP.
The design and implementation of panar maps in CGAL
Authors: Flato Eyal , Halperin Dan , Hanniel Iddo , Nechushtan Oren , Ezra Eti
Published: August 2005

Planar maps are fundamental structures in computational geometry. They are used to represent the subdivision of the plane into regions and have numerous applications. We describe the planar map package of CGAL--a Computational Geometry Algorithms Library. We discuss its modular design and implementation. In particular we introduce the two main classes of the design--planar maps and topological maps that enable the convenient separation between geometry and topology. The modular design is implemented using a generic programming approach. By switching a template parameter--the geometric traits class, one can use the same code for planar maps of different objects such as line segments or circular arcs. More flexibility is achieved by choosing a point location algorithm out of three implemented algorithms or plugging in an algorithm implemented by the user. The user of the planar maps package can benefit both from its flexibility and robustness. We present several examples of geometric traits classes and point location algorithms which demonstrate the possibility to adapt the general package to specific needs.
Information technology and the emergence of a worker-centered organization
Authors: Carlson Patricia A.
Published: August 2005

Barbara Mirel's narrative highlights the interplay of profit, power, and personalities in a software engineering project. My response's purpose is to widen the perspective on the story. More specifically, I contend that information technology (IT) enables positive change in today s workplace. Rather than being techno-centric, the re-visions currently being brought about by IT will place the knowledge worker of the 21st century at the center of design and engineering considerations. I support my claim by identifying four trends in organizational management that will afford human factors and usability engineering a better seat at the table in the not too distant future. They are (1) requirements for next-generation IT applications, (2) improved understanding of culture and context in the workplace, (3) recognition of knowledge management and human capital, and (4)fostering strategic leadership beyond resource management.
Exploring the blind spot
Authors: Spinuzzi Clay
Published: August 2005

Technical communicators have longed turned to audience, purpose, and context as they analyze situations. But Mirel's article demonstrates that audience-purpose-context is too weak a framework to handle the job of detailed sociopolitical analysis: not only is it inadequate for analyzing the needs of end users, it is also inadequate for analyzing situations within the writer's organization. In this response, this paper explores the weakness of audience-purpose-context and points to alternative sociopolitical frameworks.
Deep realities
Authors: Wiebe Eric N.
Published: August 2005

This commentary provides insight into the case study presented by Mirel by analyzing the social/organizational themes of (a) text book process versus deep reality, (b) group dynamics, (c) leadership, and (d) the role of values. It concludes that social information processing can provide explanatory power for both this case study and for other professional settings. It also notes the importance of ongoing and early educationof software industry professionals in the importance of usability.
Participating from the sidelines, online
Authors: Harris Judith B. , Figg Candace
Published: August 2005

Asynchronous,text-based communication is different from most other
forms of interchange in important ways.It lacks the full spectrum of visual
and audible information that people depend upon,often unconsciously, in face-to-face exchanges.It also requires different interaction strategies ifit is to be used to create maximal educational benefit by and for students and teachers.These techniques can be modeled and made explicit by
someone closely following online conversations in the role of facilitator,
helping participants to construct online teaching/learning experiences in
mutually beneficial ways.The Electronic Emissary s years of research have
shown that the people best prepared to assist in these ways have experience
in both online communication and pedagogy.The Emissary s facilitators
provide individualized,just in time assistance to teachers,students,and
subject matter experts during their telementoring exchanges.
Reflections on NoteCards
Authors: Halasz Frank G.
Published: August 2005

NoteCards, developed by a team at Xerox PARC, was designed to support the task of transforming a chaotic collection of unrelated thoughts into an integrated, orderly interpretation of ideas and their interconnections. This article presents NoteCards as a foil against which to explore some of the major limitations of the current generation of hypermedia systems, and characterizes the issues that must be addressed in designing the next generation systems.
A commentary on Frank Halasz's "Reflections on NoteCards
Authors: Mylonas Elli
Published: August 2005

Although hypertext research and development didn't continue exactly in the directions that Frank Halasz predicted in 1988 and 1991, much of his analysis and agenda is still valid. The most interesting development is the shift away from hypertext systems as applications software to either embedded functionality or information structuring. The focus on standards and protocols has led to progress on Halasz's issues and has made hypertext almost universal. On the other hand, the ubiquity of hypertext on the Web is a force that works against some of Halasz's agenda. It is difficult to tailor or extend a hypertext because the task requires knowledge of the tools, the information structures, and the content.
Commentary on
Authors: Haramundanis Kathy
Published: August 2005

Online materials, as Johnson-Eilola points out, too often provide speed but neither learning nor conceptual information. Minimum information is often provided in help systems because there are no resources to provide more. But the result is often a system that, without any conceptual information, provides little more than help that is so obvious that it ceases to be helpful. Even when resources are constrained, help systems should, at a minimum, refer to external sources that can help users with important concepts behind the tasks they are trying to perform.
First commentary on "XML and the new design regime"
Authors: Burch Glenda
Published: August 2005

While taking exception with some of Wilkes's points and with the omission of details in the article, the author fundamentally agrees that Wilkes succeeds in his primary purposes of setting XML within a theoretical framework for changes in written artifacts.
Second commentary on "XML and the new design regime"
Authors: Haynes Mir
Published: August 2005

Focusing on the necessity that a communicative channel must respect the information needs and limitations of a human audience, the author asserts that those limitations prevent any channel, including XML, from achieving ultimate communication goals.
Third commentary on "XML and the new design regime"
Authors: Payne John
Published: August 2005

This article focuses on the distinction between the methodology and technology behind XML and the content of the information that it must convey. The author argues that XML, rather than being in an incunabula state of development, is a highly structured, controlled (by standards organizations) communication channel. The author concludes that Wilkes's model is valid for representing how labor is divided in creating XML, but that it does not explain how the norms, standards, and conventions of the technology are determined.
System synthesis of synchronous multimedia applications
Authors: Qu Gang , Potkonjak Miodrag
Published: August 2005

Modern system design is being increasingly driven by applications such as multimedia and wireless sensing and communications, which have intrinsic quality of service (QoS) requirements, such as throughput, error-rate, and resolution. One of the most crucial QoS guarantees that the system has to provide is the timing constraint among the interacting media (synchronization) and within each media (latency). We have developed the first framework for system design with timing QoS guarantees. In particular, we address how to design system-on-chip with minimum silicon area to meet both latency and synchronization constraints. The proposed design methodology consists of two phases: hardware configuration selection and on-chip memory/storage minimization. In the first phase, we use silicon area and system performance as criteria to identify all the competitive hardware configurations (i.e., Pareto points) that facilitate the needs of synchronous applications. In the second phase, we determine the minimum on-chip memory requirement to meet the timing constraints for each Pareto point. An overall system evaluation is conducted to select the best system configuration. We have developed optimal algorithms that schedule
a priori
specified applications to meet their synchronization requirements with the minimum size of memory. We have also implemented on-line heuristics for real-time applications. The effectiveness of our algorithms has been demonstrated on a set of simulated MPEG streams from popular movies.
Array recovery and high-level transformations for DSP applications
Authors: Franke Björn , O'boyle Michael
Published: August 2005

Efficient implementation of DSP applications is critical for many embedded systems. Optimizing compilers for application programs, written in C, largely focus on code generation and scheduling, which, with their growing maturity, are providing diminishing returns. As DSP applications typically make extensive use of pointer arithmetic, the alternative use of high-level, source-to-source, transformations has been largely ignored. This article develops an array recovery technique that automatically converts pointers to arrays, enabling the empirical evaluation of high-level transformations. High-level techniques were applied to the DSPstone benchmarks on three platforms: TriMedia TM-1000, Texas Instruments TMS320C6201, and the Analog Devices SHARC ADSP-21160. On average, the best transformation gave a factor of 2.43 improvement across the platforms. In certain cases, a speedup of 5.48 was found for the SHARC, 7.38 for the TM-1, and 2.3 for the C6201. These preliminary results justify pointer to array conversion and further investigation into the use of high-level techniques for embedded compilers.
A case study of a system-level approach to power-aware computing
Authors: Martin Thomas L. , Siewiorek Daniel P. , Smailagic Asim , Bosworth Matthew , Ettus Matthew , Warren Jolin
Published: August 2005

This paper introduces a systematic approach to power awareness in mobile, handheld computers. It describes experimental evaluations of several techniques for improving the energy efficiency of a system, ranging from the network level down to the physical level of the battery. At the network level, a new routing method based upon the power consumed by the network subsystem is shown to improve power consumption by 15% on average and to reduce latency by 75% over methods that consider only the transmitted power. At the boundary between the network and the processor levels, the paper presents the problem of local versus remote processing and derives a figure of merit for determining whether a computation should be completed locally or remotely, one that involves the relative performance of the local and remote system, the transmission bandwidth and power consumption, and the network congestion. At the processor level, the main memory bandwidth is shown to have a significant effect on the relationship between performance and CPU frequency, which in turn determines the energy savings of dynamic CPU speed-setting. The results show that accounting for the main memory bandwidth using Amdahl's law permits the performance speed-up and peak power versus the CPU frequency to be estimated to within 5%. The paper concludes with a technique for mitigating the loss of battery energy capacity with large peak currents, showing an improvement of up to 10% in battery life, albeit at some cost to the size and weight of the system.
Mapping the expanding landscape of usability
Authors: Grice Roger , Hart-Davidson Bill
Published: August 2005

As the environments in which we use technology become more complex and more diverse, we need to extend and expand our notion of usability to include a broad spectrum of users and user activities. We take as an example the case of Rensselaer Polytechnic Institute's distributed education program for human-computer interaction (HCI). While HCI is the subject matter for the courses, the courses themselves present a challenging case study in HCI usability.
Planning and information foraging theories and their value to the novice technical communicator
Authors: Gattis Lyn
Published: August 2005

Two complementary cognitive theories help to explain how novice technical communicators learn effective search methods: information foraging theory, a model of information-seeking behavior that combines human-computer interaction with anthropological constructs; and strategic planning theory, a communication model of how humans plan and achieve social goals. The paper includes an extended example of how a new communicator might learn to use both models on the job.
Commentary on "planning and information foraging theories and their value to the novice technical communicator"
Authors: Eaton Angela
Published: August 2005

Gattis should be applauded for finding cognitive theories that might be of use to the field, for describing them well with current resources, and for applying them to technical communication with an example. The two theories, however, are too intuitive to provide much value for describing existing behavior or for novices to use as tools.
Heuristics on lattice basis reduction in practice
Authors: Backes Werner , Wetzel Susanne
Published: August 2005

In this paper we provide a survey on LLL lattice basis reduction in practice. We introduce several new heuristics as to speed up known lattice basis reduction methods and improve the quality of the computed reduced lattice basis in practice. We analyze substantial experimental data and to our knowledge, we are the first to present general heuristics for determining which variant of the reduction algorithm, for varied parameter choices, yields the most efficient reduction strategy for reducing a particular problem instance.
Finding the chromatic number by means of critical graphs
Authors: Herrmann Francine , Hertz Alain
Published: August 2005

We propose a new exact algorithm for finding the chromatic number of a graph
G
. The algorithm attempts to determine the smallest possible induced subgraph
G'
of
G
which has the same chromatic number as
G
. Such a subgraph is said critical since all proper induced sub-graph of
G'
have a chromatic number strictly smaller than
G'
.The proposed method is particularly helpful when a
k
-coloring of a non-critical graph is known, and it has to be proved that no (
k
-1)-coloring of
G
exists. Computational experiments on random graphs and on DIMACS benchmark problems demonstate that the new proposed algorithm can solve larger problem than previous known exact methods.
Automatic compilation to a coarse-grained reconfigurable system-opn-chip
Authors: Venkataramani Girish , Najjar Walid , Kurdahi Fadi , Bagherzadeh Nader , Bohm Wim , Hammes Jeff
Published: August 2005

The rapid growth of device densities on silicon has made it feasible to deploy reconfigurable hardware as a highly parallel computing platform. However, one of the obstacles to the wider acceptance of this technology is its programmability. The application needs to be programmed in hardware description languages or an assembly equivalent, whereas most application programmers are used to the algorithmic programming paradigm. SA-C has been proposed as an expression-oriented language designed to implicitly express data parallel operations. The Morphosys project proposes an SoC architecture consisting of reconfigurable hardware that supports a data-parallel, SIMD computational model. This paper describes a compiler framework to analyze SA-C programs, perform optimizations, and automatically map the application onto the Morphosys architecture. The mapping process is static and it involves operation scheduling, processor allocation and binding, and register allocation in the context of the Morphosys architecture. The compiler also handles issues concerning data streaming and caching in order to minimize data transfer overhead. We have compiled some important image-processing kernels, and the generated schedules reflect an average speedup in execution times of up to 6× compared to the execution on 800 MHz Pentium III machines.
Code size reduction technique and implementation for software-pipelined DSP applications
Authors: Zhuge Qingfeng , Xiao Bin , Sha Edwin H.-M.
Published: August 2005

Software pipelining technique is extensively used to exploit instruction-level parallelism of loops, but also significantly expands the code size. For embedded systems with very limited on-chip memory resources, code size becomes one of the most important optimization concerns. This paper presents the theoretical foundation of code size reduction for software-pipelined loops based on retiming concept. We propose a general Code-size REDuction technique (CRED) for various kinds of processors. Our CRED algorithms integrate the code size reduction with software pipelining. The experimental results show the effectiveness of the CRED technique on both code size reduction and code size/performance trade-off space exploration.
Welcome
Authors: Lee Newton
Published: August 2005

Welcome to the inaugural issue of the ACM Computers in
Entertainment magazine! With the increasing media's attention on
the influence of movies and video games on children, we examine the
positive effects of entertainment on kids. In particular, we
explore the educational value of entertainment and the technology
behind it.
Active learning systems
Authors: Crocker John
Published: August 2005

Advances in science and technology are creating new opportunities to rethink how we teach and learn. Emotionally-driven, interactive content can help tomorrow's leaders master important core subjects while developing critical thinking and learning skills required in a rapidly changing world. This paper explores new insights into how we think and learn, and hence envision new ways to educate our kids by employing advanced technologies.
Building a massively multiplayer game for the million
Authors: Mine Mark R. , Shochet Joe , Hughston Roger
Published: August 2005

This paper presents an overview of the lessons learned building Disney's Toontown Online, a 3D massively multiplayer online game (MMP) for children ages seven and older. The paper is divided into three main parts. The first presents design highlights of Toontown Online and focuses on the challenge of building an MMP for kids. In particular, we discuss ways of incorporating kid-friendly socialization into an MMP. The second part of the paper presents an overview of Panda-3D, the VR Studio's open source 3D graphics engine. We focus on the aspects of Panda-3D that helped to facilitate the development of Toontown. In particular, Panda's expressive, platform-agnostic scene graph architecture, and flexible scripting language tools for distributed storytelling. We finish with an overview of Toontown's server architecture and present our nothing-but-net strategy for downloading a full-featured 3D online game.
Building a business simulation for kids
Authors: Everett Jason
Published: August 2005

This paper presents an overview of Hot Shot Business, a simulation game designed to teach basic business concepts and encourage entrepreneurship. It begins with a high-level discussion of the experience, and goes on to describe how the educational content is presented to the player as the game progresses. Special emphasis is placed on the important of play testing in the development process.