(Invited) Influence of Wafering, CMP and Subsurface Damage on Epitaxial Defects and Surface Quality in SiC
Authors: Das Hrishikesh , Sunkari Swapna , Justice Joshua 
Published: February 2020

The Silicon Carbide power device industry continues to experience very robust increases and adoption in many long-term growth markets like renewables, cloud and electric vehicles. The continuous year over year increases in demand has led to widespread raw material shortages of substrates and epi wafers. This has resulted in incumbent manufacturers putting in more capacity and the emergence of many new SiC substrate manufacturers. With many supply sources, there is also a wide variety of quality in the material. In some of our previous works, we have looked at some of the issues arising from immature crystal quality. However, often overlooked as a source of defects and surface quality, is the damage left over from wafering, grinding and CMP. In this work, we observe the effects of sub-surface damage and how it affects epitaxial layer quality. We also look at ways to minimize this effect both at the CMP stage and at the epi growth stage.

Defect metrology tools for Silicon Carbide wafers have seen great improvements in capability and throughput. As wafers are measured both pre-epi and post-epi, a wide category of defects are identified and classified. Full wafer scans for substrates yield several defect categories like micropipes, bumps/particles as well as shallow and deep scratches. Recent tools with photoluminescence (PL) are also able to detect crystal defects like grain boundaries and bar stacking faults among others. All of these defects have an effect on the epitaxial layers either nucleating or transforming into other defects. However, none of the detection methods are able to detect residual damage left over from the wafering/grind process. This damage can be present just below the surface even if the surface is extremely smooth and scratch free. We detect the presence of these damage layers after epitaxial growth. Depending on the amount of damage present a very high density of stacking faults and triangular defects (and partials) are seen in the epitaxial layers.

To remove the damage layers, a higher amount of CMP removal was used. As the damaged layer is reduced, the nucleation of the stacking faults and triangular defects also reduce. In some wafers, we observe some residual damage layers present near the wafer edges and flats where the CMP process is not uniform. Moreover, even when the nucleation of the defects are suppressed, the resulting epi is much rougher than epi grown on a substrate without any sub-surface damage.

Wafers that displayed sub-surface damage were re-polished back to the substrate using a known good process. These wafers did not show the nucleation of defects. The suppression of the nucleation of defects was also attempted by enhanced in-situ etching before epi growth. Though this resulted in suppression of nucleated defects, by removal of the damage layer, it also resulted in much rougher epitaxial layers.

The characterization results and processes from these experiments will be presented. Additional methods to detect these damage layers will be discussed.