High-Temperature Reverse-Bias Stressing of Thin Gate Oxides in Power Transistors
Authors: Suliman Samia Ahmed , Awadelkarim Osama Osman , Hao Jifa , Rioux Mark 
Published: February 2020

A 160Å-thick gate oxide in n-channel U-shaped trench-gated MOSFETs (UMOSFETs) of ~0.5 microns trench width, ~1 microns channel length was high-temperature reverse-bias (HTRB) stressed, in either a dry or a 85%-relative-humidity ambient, for 96 hours at 130 °C in blocking mode with the source, body and gate grounded and a voltage of 20 V applied to the drain. After a humid stress, room-temperature (RT) measuements revealed that in some of the UMOSFETs the threshold voltage, Vth, decreased from ~0.6 V down to ~0.1 V, whereas the drain-to-source leakage current, IDSS, increased by three orders of magnitude. Changes in Vth and IDSS were found to be gate-controlled at RT. In UMOSFETs that were stressed in a dry ambient the degradation was insignificant and none of the above effects were observed. The observed behavior is a fingerprint of mobile ions which are able to move across the oxide driven by the electric field generated by the applied gate-voltage. The sign of the shift in Vth and its dependence on the applied gate-voltage polarity indicates that the mobile ions are positively charged. The observation that these ions are introduced during humid HTRB stress favors the identification of these ions as the hydrogen protons (H+). This identification is further supported by our observation that these ions are able to move at RT unlike several other metallic ions, such as Sodium, that require temperatures higher than RT for them to become mobile in the oxide. Indeed our experiments showed that H+ ions introduced in the UMOSFETs exhibit concentration gradient driven diffusion at RT even in the absence of an applied gate voltage. The HTRB does not only stress the pn junction at the drain, but also stresses the gate oxide at the bottom of the trench. Under the HTRB stress biasing conditions, the bottom of the trench behaves like a parasitic p-channel MOSFET with the N drift region as the channel and the p-well regions as the source and drain. Consequently, the HTRB stress of the n-channel UMOSFET manifests itself as a negative-bias temperature-instability “NBTI” [1] on the parasitic p-channel MOSFET. SEM inspection of UMOSFETs deprocessed to passivation showed the presence of passivation cracks on the edge termination only in devices that degraded with the HTRB stressing. Our results lead us to conclude that only humid HTRB/NBTI stress causes changes in Vth and IDDSalthough interface charge was observed to increase by both dry or humid stress. During the stress water or hydrogen species diffuse into the gate oxide through passivation cracks at the edge of the UMOSFET, and react with the gate oxide in the presence of holes and release protons [2,3]. The protons are not confined to the gate oxide at the trench-bottom and are able to migrate up the oxide on the trench sidewalls. Based on our results, the impact of the HTRB/NBTI stress on device design is discussed.

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