Mechanisms of Carrier Density Increase of Ternary Cation-Based Amorphous Oxide Semiconductors for Thin Film Transistor Applications
Authors: Liu Mingyuan , Rothschild Molly , Song Han Wook , Lee Sunghwan 
Published: July 2021

Amorphous oxide semiconductor (AOS) thin film transistors (TFTs) based on In2O3 have attracted much interest for use as pixel switching elements in next generation active-matrix liquid crystal (AM-LCD) and active-matrix organic light emitting diode (AM-OLED) displays. The high field effect mobility of In2O3-based AOS devices (10–25 cm2/Vsec) offers significant performance improvements over present-day a-Si TFTs (<1 cm2/Vsec) technology. Additional advantages of AOS materials include low temperature processing (RT–300 °C), isotropic wet etch characteristics, and high optical transparency (>85 % in the visible regime) all of which make this material suitable for large area, flexible, and transparent devices on inexpensive polymer substrates.

There have been considerable efforts to incorporate AOSs into devices, particularly in current-driven active matrix displays such as organic light emitting diode displays as pixel-driving switching elements. Strategies to enhance amorphous phase stability, reduce bias stress-induced threshold voltage shifts, and suppress channel carrier densities have been studied and successfully applied to the switching TFT application. Third cation elements are often added to binary cation oxide systems to limit the channel carrier generation for TFT channel application. We have recently reported that the addition of Al to InZnO, a typical binary cation material system leads to enhanced amorphous phase stability, carrier suppression capability and higher carrier mobility, up to ~45 cm2/Vs (Hall Effect mobility) and ~20 cm2/Vs (field effect mobility)1. All of these characteristics are expected to be a key enabler for realizing the next generation ultra-high-definition displays.

Post-process annealing is widely employed in AOS-based TFT fabrication since annealing has been shown to improve field effect mobility2-3 and channel/metallization contacts4-5 as well as reduce trap density6, which often leads to unstable device performance or unfavorable hysteresis in their transistor characterstics6-7. However, the post-annealing is often accompanied by an increase in channel carrier density that induces an unfavorable increase in the device off-state current and operation voltages2, 8. To date, the origin of the increase in channel carrier density has not been fully understood.

The current study aims to identify the origin of an increase in carrier density after low-temperature annealing conducted in air, particularly for a third-cation AOS system of InAlZnO (IAZO). Through work function investigations and bandgap analysis, the carrier density of IAZO is found to be increased by > 104 times compared to that of unannealed IAZO after low temperature annealing at 200 °C in air. Photoelectron spectroscopic studies reveal that the typical intrinsic (vacancy-based native defect) or extrinsic (cation substitution) doping mechanisms are not the primary cause of the channel carrier increase. From high pressure oxidation with much enhanced reactivity of reaction gases, it is identified that the equilibrium carrier density of IAZO is much higher than those used in typical TFT channel application. The low channel carrier density tends to increase and reach the higher equilibrium carrier density in the absence of kinetic constraints. The combinatorial investigations presented herein help understand the origin of unintentional increase in channel carrier density in amorphous oxides and its effect on the operation of TFTs.

The authors gratefully acknowledge the financial supports of the U.S. NSF Award No. ECCS-1931088; the Purdue Research Foundation (Grant No. 60000029); and the Improvement of Measurement Standards and Technology for Mechanical Metrology (Grant No. 20011028) by KRISS.

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