bluuebunny/crossref_metadata_2025 huggingface dataset:
Optimized Thermoelectric Refrigeration in the Presence of Thermal Boundary Resistance
Authors: Pettes Anthony M. , Hodes Marc S. , Goodson Kenneth E.
Published: January 2010

Thermoelectric refrigerators (TEMs) offer several advantages over vapor-compression refrigerators. They are free of moving parts, acoustically silent, reliable and light-weight. Their low efficiency and peak heat flux capabilities have precluded their use in more widespread applications. Optimization of thermoelectric pellet geometry can help, but past work in this area has neglected the impact of thermal and electrical contact resistances. The present work extends a previous one-dimensional TEM model to account for a thermal boundary resistance and is appropriate for the common situation where an air-cooled heat sink is attached to a TEM. The model also accounts for the impact of electrical contact resistance at the TEM interconnects. The pellet geometry is optimized with the target of either maximum performance or efficiency for an arbitrary value of thermal boundary resistance for varying values of the temperature difference across the unit, the pellet Seebeck coefficient, and the contact resistances. The model predicts that when the thermal contact conductance is decreased by a factor of ten, the peak heat removal capability is reduced by at least 10 percent. Furthermore, when the interconnect electrical resistance rises above a factor of ten larger than the pellet electrical resistance, the maximum heat removal capability for a given pellet height is reduced by at least 20 percent and the maximum coefficient of performance at low Ku–∞u/(NK), values is reduced by at least 50 percent.
High Accuracy Thermal Analysis Methodology for Semiconductor Junction Temperatures Considering Line Patterns of Multilayered Circuit Boards
Authors: Kumano Yutaka , Ogura Tetsuyoshi , Yamada Toru
Published: January 2010

As multilayered circuit boards in which semiconductors are embedded have been well reported, thermal management is becoming quite an important issue. In order to predict the junction temperature of an embedded semiconductor precisely, it is necessary that line patterns should be taken into consideration for thermal fluid analysis. However modeling all the patterns correctly is unacceptable because of far too long calculation time. Thus only the ratio of a pattern area to a gross board area was considered, which caused up to 30% calculation error compared to the experimental results. We have developed a novel method to predict semiconductor junction temperatures precisely without modeling patterns themselves. Firstly boards are divided into multiple regions in order to express how much dense or coarse the patterns are. Since the size of each region is much larger than L/S (line and space) specification of the boards, the number of meshes for calculation does not increase explosively and the simulation can be finished within appropriate time. Secondly equivalent anisotropic thermal conductivity of each region is assigned as follows. All the regions are once divided into smaller subregions whose sizes are approximately L/S specification. Then thermal conductivity of each subregion is defined by the property of the material at the centered subregion. After that a thermal network composed of all the subregions is generated and anisotropic thermal conductivities of each divided region are computed by solving this thermal network matrix. This procedure should be executed in an electrical CAD (E-CAD) where line pattern data are stored. A new interface format using which we can transfer board data from E-CAD to thermal fluid simulator was prepared. This format can have not only layouts and sizes but also anisotropic thermal conductivities of all divided regions. There is no need either to prepare model geometries or to input attributes of a great number of divided regions on thermal fluid simulator. By way of this format, analytical models are imported in thermal fluid simulator and semiconductor junction temperatures are computed. It was confirmed that semiconductor junction temperatures calculated by this method were precisely coincident with the experimental results. We can predict semiconductor temperatures without making preproduction samples. This analysis methodology will highly contribute to the reduction of designing time and cost.
A Multigrid Method for the Solution of Ion Transport Using the Poisson Nernst Planck Equations
Authors: Mathur Sanjay R. , Murthy Jayathi Y.
Published: January 2010

Recently there has been much interest in simulating ion transport in biological and synthetic ion channels using the Poisson-Nernst-Planck (PNP) equations. However, many published methods exhibit poor convergence rates, particularly at high driving voltages, and for long-aspect ratio channels. The paper addresses the development of a fast and efficient coupled multigrid method for the solution of the PNP equations. An unstructured cell-centered finite volume method is used to discretize the governing equations. An iterative procedure, based on a Newton-Raphson linearization accounting for the non-linear coupling between the Poisson and charge transport equations, is employed. The resulting linear system of equations is solved using an algebraic multigrid method, with coarse level systems being created by agglomerating finer-level equations based on the largest coefficients of the Poisson equation. A block Gauss-Seidel update is used as the relaxation method. The method is shown to perform well for ion transport in a synthetic channel for aspect ratios ranging from 16.67 to 1667 for a range of operating parameters.
Vapor Extraction From Flow Boiling in a Fractal-Like Branching Heat Sink
Authors: Apreotesi Mario , Pence Deborah , Liburdy James
Published: January 2010

Increases in pressure due to vapor generation during boiling in microchannels can be reduced by extraction of vapor at its point of inception. Ultimately, this local vapor extraction decreases the pressure drop required to drive the flow through the microchannel network within the heat sink. Indeed, by lowering the overall flow rate by vapor extraction, the pressure drop can, in principle, be lowered below that of single-phase flow. In this present study the relative driving forces necessary for vapor extraction and for flow through the microchannels are investigated. The concept also has the potential to separate flow independent of orientation or gravity. The fractal-like flow network used here is one that has been previously shown to reduce pressure drop and yield a more uniform surface temperature distribution for single-phase flows. The disk shaped heat sink was covered with a porous Nylon membrane with an average pore size of 0.45 microns. Water was used as the working fluid with inlet subcooling of approximately 2.5 K and flow rates ranging between 8 and 12 g/min. The vapor extraction pressure was varied and maintained between 0 and 56 kPa below the average pressure between the inlet and exit of the heat sink. Heating varied from 18 to 30 Watts. Actual vapor extraction data are correlated with the exit quality predicted with no vapor extraction, the value of which is dependent upon mass flow rate, heat input and degree of subcooling. Network pressure drop data are correlated with the membrane pressure difference data.
Numerical Modeling of Perforated Tile Flow Distribution in a Raised-Floor Data Center
Authors: Samadiani Emad , Rambo Jeffrey , Joshi Yogendra
Published: January 2010

This paper is centered on quantifying the effect of computer room and computer room air conditioning (CRAC) unit modeling on the perforated tile flow distribution in a representative raised-floor data center. Also, this study quantifies the effect of plenum pipes and perforated tile porosity on the operating points of the CRAC blowers, total CRAC air flow rate, and its distribution. It is concluded that modeling the computer room, CRAC units, and/or the plenum pipes could change the tile flow distribution by up to 60% for the facility with 25% open perforated tiles and up to 135% for the facility with 56% open perforated tiles.
Data Center Cooling Prediction Using Artificial Neural Network
Authors: Shrivastava Saurabh K. , VanGilder James W. , Sammakia Bahgat G.
Published: January 2010

An analytical approach using artificial intelligence has been developed for assessing the cooling performance of data centers. This paper discusses the use of a Neural Network (NN) model in the real-time prediction of the cooling performance of a cluster of equipment in a data center environment. The NN model is used to predict the Capture Index (CI) [1] as a function of rack power, cooler airflow and physical/geometric arrangement for a cluster located in a simple room environment. The Neural Network is “trained” on thousands of hypothetical but realistic cluster variations for which CI values have been computed using either PDA [2] or full Computational Fluid Dynamics (CFD). The great value of the NN approach lies in its ability to capture the non-linear relationships between input parameters and corresponding capture indices. The accuracy of the NN approach is 3.8% (Root Mean Square Error) for a set of example scenarios discussed here. Because of the real-time nature of the calculations, the NN approach readily facilitates optimization studies. Example cases are discussed which show the integration of the NN approach and a genetic algorithm used for optimization.
Partially Decoupled Aisle Method for Estimating Rack-Cooling Performance in Near-Real Time
Authors: VanGilder James W. , Zhang Xuanhang , Shrivastava Saurabh K.
Published: January 2010

The Partially Decoupled Aisle (PDA) method facilitates a near-real-time cooling-performance analysis of a single cluster of racks and, potentially, coolers, bounding a common hot or cold aisle in a data center. With the PDA method, the airflow patterns and related variables need be computed only within an isolated cold or hot aisle “on the fly” through CFD analysis or other means. The analysis is fast because the much larger surrounding room environment is not directly modeled; its effect enters the model through the boundary conditions applied to the top and ends of the isolated aisle. The proper boundary conditions in turn may be estimated from an empirical model determined in advance (“offline”) from the study of a large number of CFD simulations of varying equipment layouts and room environments. A software tool based on the PDA method, which uses a full CFD engine to solve the aisle airflow within the isolated aisle, can analyze a typical cluster of racks and coolers in 10–30 seconds and requires no special user skills. This paper formally introduces the general PDA method and shows several examples of its application with comparisons to corresponding whole-room CFD analyses.
Low Temperature OFET (Organic Field Effect Transistor) Fabrication by Metal Nanoparticle Imprinting
Authors: Ko Seung Hwan , Park Inkyu , Pan Heng , Pisano Albert P. , Grigoropoulos Costas P.
Published: January 2010

The low temperature fabrication of OFET (organic field effect transistor) is presented in this paper. PDMS imprinting mold was used to pattern gold nano-particles suspended in Alpha-Terpineol solvent. After imprinting, nanoparticles was dried and then sintered at plastic compatible low temperature. Finally, air stable semiconductor polymer (modified polythiophene) in dichlorobenzene (o-DCB) solution to fabricate OFETs on flexible polymer substrates. The performance of the transistors were characterized and discussed.
Packaging of an Iron-Gallium Nanowire Acoustic Sensor for Under-Water Applications
Authors: Jain Rupal , McCluskey F. Patrick , Flatau Alison B.
Published: January 2010

The nanoacoustic sensor incorporates cilia-like nanowires made of galfenol, a magnetostrictive material, which responds to incoming acoustic waves by changing the magnetic flux flowing through it which is measured by a GMR sensor. A package developed for this sensor should provide a protective environment for these nanowires, while still allowing the sound waves to reach the sensing element with least attenuation. A MEMS package has been designed analogous to the cochlea in a human-ear for the nanowire acoustic sensor. Package materials have been selected for their acoustic performance in water by conducting several experiments to compare their impedance and attenuation characteristics, moisture absorption, and salt permeation properties. The package filled with silicone oil and encapsulated with polydimethylsiloxane (PDMS) is observed to outperform other packages at all frequencies in minimizing attenuation of the acoustic waves at the interface of the package. The process sequence for fabrication of the nanoacoustic sensor is presented along with the preliminary results.
Technologies for the Energy-Efficient Data Center
Authors: Cader Tahir , Westra Levi , Marquez Andres
Published: January 2010

Although semiconductor manufacturers have provided temporary relief with lower-power multi-core microprocessors, OEMs and data center operators continue to push the limits for individual rack power densities. It is not uncommon today for data center operators to deploy multiple 20 kW racks in a facility. Such rack densities are exacerbating the major issues of power and cooling in data centers. Data center operators are now forced to take a hard look at the efficiencies of their data centers. Malone and Belady (2006) have proposed three metrics, i.e., Power Usage Effectiveness (PUE), Data Center Efficiency (DCE), and the Energy-to-Acquisition Cost ratio (EAC), to help data center operators quickly quantify the efficiency of their data centers. In their paper, Malone and Belady present nominal values of PUE across a broad cross-section of data centers. PUE values are presented for data centers at four levels of optimization. One of these optimizations involves the use of Computational Fluid Dynamics (CFD). In the current paper, CFD is used to conduct an in-depth investigation of a liquid-cooled data center that would potentially be housed at the Pacific Northwest National Labs (PNNL). The boundary conditions used in the CFD model are based upon actual measurements on a rack of liquid-cooled servers housed at PNNL. The analysis shows that the liquid-cooled facility could achieve a PUE of 1.57 as compared to a PUE of 3.0 for a typical data center (the lower the PUE, the better, with values below 1.6 approaching ideal). The increase in data center efficiency is also translated into an increase in the amount of IT equipment that can be deployed. At a PUE of 1.57, the analysis shows that 91% more IT equipment can be deployed as compared to the typical data center. The paper will discuss the analysis of the PUE, and will also explore the impact of the raising data center efficiency via the use of multiple cooling technologies and CFD analysis. Complete results of the analyses will be presented in the paper.
Template Based Assembly for Solid State Cooling
Authors: Wang Kerwin , Baskaran Rajashree , Bo¨hringer Karl F.
Published: January 2010

This paper presents a fully dry assembly method to obtain densely packed arrays of parts from 400–800μm in size. This approach shows promise for enabling formation of a module of n and p type materials optimized for micro scale thermoelectric cooling performance.
Effects of Thermal Lids Gold Plating Thickness on Thermal Interface Reliability for Flip Chip Packaging
Authors: Toh Chin Hock , Raman Arun , Fitzgerald Thomas , Narkhede Madhuri , La Mar Alfred A. , Chandran Dennis Prem Kumar
Published: January 2010

This paper summarizes the intermetallic compounds (IMC) formation at the interface between thermal interface material (TIM) and nickel/gold plated integrated heat spreader (IHS) at varying Au thickness, and its impact on thermal reliability. Indium solders due to their high thermal conductivity are commonly used as the TIM to dissipate heat from silicon die to the thermal lids for new generation microprocessors with higher operating die temperatures. Indium solders readily wet the Au plating on thermal lids to form IMC during soldering. Optimal Au thickness is essential; Au thickness should be thick enough for reliable soldering, but must also be thin enough to offset the high cost and to prevent formation of a brittle Au-rich IMC layer in the solder joint. AuIn2 is the preferred IMC for indium-gold soldering and does not embrittle the solder joint. Resulting IMC type depends on the Au:In ratio which can be predicted by a In-Au binary phase diagram. On this basis, critical Au plating thickness to form AuIn2 IMC can be estimated using the known density values for electroplated gold and indium. In this study, Au thicknesses ranging from 0.035 to 0.2μm with a fixed gold pad size were electrolytically plated on a nickel plated copper lid. Assembled units were then subjected to Temperature Cycling-B (TCB). An in-house developed metrology for measuring junction-to-case thermal impedance (Rjc) is described. In this study, varying the thermal lids Au-plating thickness between 0.035 to 0.2 μm only lead to slight increase in center and corner Rjc values through 115 cycles TCB. The maximum center Rjc degradation post thermal cycling observed was only ∼ 1.7% on the lids with Au pad thickness between 0.035 – 0.04 μm. There were also no clear indications of impact of Au pad thickness on center and corner Rjc performance at EOL or post 115 cycles TCB. Thermal lids/TIM interface integrity remains unchanged for the range of Au pad thickness considered. However, detailed scanning electron microscopy and energy dispersive spectroscopy showed thicker Au plating results in greater incidence of AuIn2 IMC nodules beneath In-Ni-Au ternary IMC layer at end of line (EOL) ie post packaging and test. AuIn2 IMC is formed right after assembly and is what that holds the solder to the lid. As such, it follows that the presence of a more continuous and possibly greater number of AuIn2 IMC nodules can be expected to provide a better lid-solder joint at EOL.
DOE Analysis of Effects of Geometry and Materials on Cu/Low-K Interconnect Stresses
Authors: Hsieh Ming-Che , Lee Wei
Published: January 2010

In 3D-IC packages, the low-k dielectrics are favored to improve many electrical characteristics in IC devices; hence the corresponding researches are being widely studied extensively. For the purpose of studying thermal-mechanical effects on Cu/low-k interconnects in the wafer, the three dimensional finite element analysis (FEA) was adopted in this paper. Several low-k dielectrics were considered in FEA, which are SiLK, BCB and SiCOH. By using FEA, the corresponding thermal-mechanical induced stresses distribution of Cu/low-k interconnects would be obtained. Furthermore, in order to study the sensitivity information of Cu/low-k interconnects, the method of design of experiments (DOE) as well as factorial design methodology and response surface methodology were also used. Five major parameters of geometric dimensions of copper interconnects/vias structure were selected as the design factors and the maximum average value of von Mises stress in copper interconnects/vias structure was selected as the response to be optimized. Through the DOE analysis, the optimum geometric parameters of copper interconnects/vias structure that resulted in smaller von Mises stresses in Cu/low-k interconnects could be obtained. The results also show that the geometric dimension of copper interconnects/vias had significant influence on von Mises stresses distribution. Moreover, the maximum value of von Mises stress for different copper interconnects/vias geometric dimensions could also be easily predicted by using the response surface curve and its corresponding regression model from DOE analysis.
Area-Averaged Void Fraction Analysis of Flow Boiling in a Microscale Branching Channel Network
Authors: Heymann Douglas , Kwak Younghoon , Edward Lee , Narayanan Vinod , Liburdy James , Pence Deborah
Published: January 2010

Area-averaged void fraction images of convective boiling in a branching channel heat sink were acquired with a high speed high resolution camera at a rate of 1,000 frames per second for one second. Data sets are limited by the buffer size of the camera. Test conditions include a flow rate of 30 g/min, 30 W of energy added, and a subcooling of approximately 11°C. Time-varying area-based void fraction data were estimated using an image processing algorithm designed to minimize noise. Conditions for upstream bubble growth are reported as are liquid momentum, evaporation momentum, and surface tension forces for two extreme mass fluxes through the channels. Mass fluxes vary for each branching level as well as with the amount of vapor present in the heat sink. The heat sink is 38.1 mm in diameter with a radial branching flow pattern. The ratio of daughter-to-mother branching lengths is equal to 1.4, which is in contrast to a previous investigation in which the length scale ratio was 0.70.
Laminar Cross-Flow Conjugated Forced Convection Heat Transfer From a Cylinder With Fins
Authors: Abu-Hijleh Bassam A. K.
Published: January 2010

The problem of laminar cross-flow conjugated forced convection heat transfer from a horizontal cylinder with multiple equally spaced fins on its outer surface was investigated numerically. The effect of several combinations of number of fins, fin height, fin thickness and fin material on the total heat transfer from the cylinder is studied over the range of Reynolds numbers. The results showed the effectiveness of these combinations on the enhancement of the heat transfer from the cylinder-fin combination. The results show fin thickness to be a very important factor. A short thick fin can perform as well as a much longer but thinner fin, depending on the operating conditions. The effect of fin material is also significant. Some of the combinations studied resulted in a reduction in the heat transfer from the cylinder.
Analysis of Airflow Distribution Across a Front-to-Rear Server Rack
Authors: Radmehr Amir , Karki Kailash C. , Patankar Suhas V.
Published: January 2010

The most common server racks in data centers are front-to-rear racks, which draw in the cooling air from the front side and discharge it from the backside. In a raised-floor data center the cooling air to these racks is provided by perforated tiles that are placed in front of them. In a high-density data center, these tiles discharge a considerable amount of airflow, which leads to a high-velocity vertical jet in front of the rack. Such a high-velocity jet may bypass the servers located at the bottom of the rack leading to their airflow starvation and potential failure. In this paper the effect of the high-velocity jet on the airflow taken by servers at various heights in the rack is studied. A computer model based on the Computational Fluid Dynamics (CFD) technique is used to predict the airflow distribution through servers stacked in the rack. Two cases are considered. In one case, the rack is placed in the middle of a row of racks in a prefect hot aisle-cold aisle arrangement. The boundary conditions around such a rack is symmetrical. In the other case, the rack is placed in a room with asymmetrical boundary conditions. The characteristics of the servers in the rack are taken from typical 1U and 2U servers manufactured by IBM. It is shown that in general the high-velocity jet has a mild effect on the airflow taken by the servers, and the airflow reduction is limited to servers at the bottom of the rack. Racks in a symmetrical configuration are more susceptible to the airflow starvation. In the most critical conditions, an airflow reduction of 15% is calculated for the server located at the bottom of the rack. Using the result obtained from the computational analysis, a simple model is developed to predict the reduction of the cooling air under the most critical situation for the server placed at the bottom of the rack.
Using Linear Superposition to Solve Multiple Heat Source Transient Thermal Problems
Authors: Billings David T. , Stout Roger P.
Published: January 2010

For many years engineers have been using linear superposition to solve steady state thermal problems with multiple-heat-source systems. Predicting transient response of single-heat-source systems has been performed using R-C Foster networks with reasonable success. In most real applications there are multiple heat sources that are interacting perhaps in very complex ways in the time domain. Being able to simulate these interactions using a spreadsheet tool or a circuit simulator may be very advantageous to a device or application engineer designing or evaluating an application design. Using an RC-network model of a system to represent the individual transient response curves, we’ll show how to do this bookkeeping (and all the other calculations) for a simple system using Microsoft Excel. We’ll also see how to set up this sort of problem in a circuit simulator.
Heat Conduction in Printed Circuit Boards: Part II — Small PCBs Connected to Large Thermal Mass at Their Edge
Authors: Nakayama Wataru , Nakajima Tatsuya , Koike Hiroko , Matsuki Ryuichi
Published: January 2010

The PCB in high density packaging environment often provides a critical heat conduction path from the package to the electrical connectors or the system enclosure that serves as a solid heat sink at the edge of the PCB. Where convective heat transfer on the PCB surface is negligible, heat flow is almost unidirectional from the area under the package footprint to the solid heat sink. However, the heat conduction analysis requires a large computational resource, if the full details of PCB’s internal organization are taken into account. To perform the board and system level thermal analysis with available computational resources, it is imperative to replace the actual PCB’s internal structure by a simplified model. In the most popular modeling the PCB is replaced by a medium having orthotropic thermal conductivities. The assumption of equivalent thermal conductivities, however, is not a straightforward practice, as illustrated by the present study. Two samples are subject to heat conduction analysis; they are rectangular bar specimens cut out from the PCB, one measuring 6mm (L) × 0.5mm (W) × 1.27mm (HPCB), and the other 12.35mm (L) × 1.27mm (W) × 1.27mm (HPCB). The specimen contains two layers of continuous copper, and one row of through-vias in the zone under the package footprint. Numerical solutions are obtained taking into account the full details of the via zone structures. Classical solutions are also obtained for a two-zone continuum model having different sets of orthotropic thermal conductivities for the via zone and the remaining zone. The thermal conductivities in the continuum model are varied to bring the key temperatures to those obtained by the numerical analysis. Presented in this paper is a methodology to estimate the equivalent thermal conductivities for a given set of dimensional data and thermal boundary condition.
Fabrication of a GaAs Microwave Probe Used for Atomic Force Microscope
Authors: Ju Yang , Kobayashi Tetsuya , Soyama Hitoshi
Published: January 2010

In order to develop a new structure microwave probe, the fabrication of AFM probe on the GaAs wafer was studied. A waveguide was introduced by evaporating Au film on the top and bottom surfaces of the GaAs AFM probe. A tip having 7 μm high, 2.0 aspect ratio was formed. The dimensions of the cantilever are 250×30×15 μm. The open structure of the waveguide at the tip of the probe was obtained by using FIB fabrication. AFM topographies of a grating sample were measured by using the fabricated GaAs microwave probe and commercial Si AFM probe. The fabricated probe was found having similar capability as the commercial one.
Passive Immersion Cooling of 3-D Stacked Dies
Authors: Geisler Karl J. L. , Bar-Cohen Avram
Published: January 2010

Three-dimensional die stacking increases integrated circuit (IC) density, providing increased capabilities and improved electrical performance on a smaller printed circuit board (PCB) footprint area. However, these advantages come at the expense of higher volumetric heat generation rates and decreased thermal and mechanical access to the die areas. Passive immersion cooling, allowing for buoyancy-driven fluid flow between stacked dies, can provide high heat transfer coefficients directly on the die surfaces, can easily accommodate a wide variety of interconnect schemes, and is scalable to any number of dies. A methodology for the optimization of immersion cooled 3-D stacked dies is presented, including the effects of confinement on natural convection and channel boiling. Optimum die spacings for both single and two phase cooling with saturated FC-72 are found to be on the order of 0.5mm for typical microelectronics geometries and to yield heat densities of 10–50 W/cm3 in natural convection and 100–500 W/cm3 in channel boiling.
Optimization of Pool Boiling Heat Sinks Including the Effects of Confinement in the Interfin Spaces
Authors: Geisler Karl J. L. , Bar-Cohen Avram
Published: January 2010

A finite element analysis (FEA) approach is developed and used to efficiently evaluate and optimize the boiling performance of longitudinal rectangular plate fin heat sinks, including the explicit dependence of fin spacing on boiling heat transfer coefficients and CHF. Polished silicon heat sinks are shown to dissipate nearly five times the CHF limit of the unfinned base area and outperform comparable aluminum heat sinks by a factor of two. For optimum heat sink geometries, over the parameter ranges explored, fin thickness is found to be approximately equal to the fin spacing, and the relationship between optimum thickness and spacing is demonstrated to be relatively insensitive to fin thermal conductivity. Results suggest that even greater performance enhancements may be gained with appropriately-selected advanced materials.
Evaluation of and Inspection Metrology for Lid Attach for Advanced Thermal Packaging Materials
Authors: Stern Margaret , Melanson Bob , Gektin Vadim , Hundt Paul , Arroyo Carlos , Gupta Vikas , Nakayoshi Kazumi , Larson Lyndon , Marin Jesus , McDougall David , Bhagwagar Dorab
Published: January 2010

We have evaluated a new Ag-filled silicone thermal interface material (TIM) for its sensitivity to lid finish and impact on imaging discontinuities in the die/lid (TIM1) layer, in conjunction with two high performance lid materials, as a part of our advanced packaging technology development effort. Thermal and mechanical (shear stress and lid pull) measurements have been carried out on a number of different lid finishes to optimize thermal performance and adhesion at the TIM1/lid interface. This silicone TIM1 is found to be sensitive to the type of Ni-plating and plating bath chemistry. Nondestructive and destructive metrology has been carried out on flip chip (FC) packages using Ag-filled silicone TIM1 and either Cu or AlSiC lids. A number of silicone formulations have been investigated to assess their impact on surface acoustic microscopy (SAM) and X-ray imaging. Nondestructive evaluation (NDE) by real time X-ray and SAM has identified artifacts that make it difficult to unambiguously detect voids and delamination in the TIM1 layer. A “dark ring” or “picture frame” artifact is observed at the die perimeter in acoustic microscope images of packages with the Ag-filled TIM1. Detailed SEM cross-section and thermal mapping analyses on a number of specially constructed FC packages have been correlated with TIM1/lid delamination and voiding observed in SAM and X-ray images. Results of these studies point to changes in the TIM1 modulus during cure and post cure thermal excursions as the cause of the “dark ring” observed in the transmission SAM images rather than delamination at the TIM1/lid or TIM1/die interfaces. However, in the event that delamination is present at the edges it cannot be unambiguously deconvoluted from the “dark ring” artifact in the SAM images.
Challenges in Package Cooling of High Performance Servers
Authors: Wei Jie
Published: January 2010

Cooling technologies for dealing with high-density and asymmetric power dissipation are discussed, arising from thermal management of high performance server CPU-packages. In this paper, investigation and development of associated technologies are introduced from a viewpoint of industrial application, and attention is focused on heat conduction and removal at the package and heatsink module level. Based on analyses of power dissipation and package cooling characteristics, properties of a new metallic thermal interface material are presented where the Indium-Silver composite was evaluated for integrating the chip and its heat-spreader, effects of heat spreading materials on package thermal performance are investigated including high thermal conductivity diamond composites, and evaluations of enhanced heatsink cooling capability are illustrated where high thermal conductivity devices of heat pipes or vapor chambers were applied for improving heat spreading in the heatsink base.
Thermal Performance Maps for Forced Air Cooling of Ruggedized Electronics Enclosures
Authors: VanEngelenhoven Jesse , Solbrekken Gary L. , Geisler Karl J. L.
Published: January 2010

Based on standard commercial form factors, this study explores chassis-level air cooling limits for ruggedized military electronics enclosures constrained by pressure drop requirements and fin manufacturing capabilities. Numeric and analytic models are developed and used to define a methodology for optimizing the geometry of longitudinal plate fins included in side wall ducts to maximize the amount of heat that can be dissipated from an air-cooled chassis. The results of these analyses are presented in the form of a performance map facilitate the identification of particular fin manufacturing process well-suited for a specified set of mass flow, pressure drop, and heat transfer requirements. Analysis results demonstrate that if isothermal boundaries can be achieved, the heat transfer capacity of the chassis will increase relative to isoflux boundary condition assumptions. As a means to this end, the incorporation of heat pipes into the chassis wall is explored to enhance heat spreading and approach the isothermal limits of heat dissipation in the airflow ducts.
Evaluation of Time-Independent and Time-Dependent Strains of Lead-Free Solder by Stepped Ramp Loading Test
Authors: Ohguchi Ken-Ichi , Sasaki Katsuhiko , Aso Setsuo
Published: January 2010

This paper proposes a method which can estimate essential material constants of an elasto-plastic-creep constitutive model for lead-free solders by conducting only a tensile test. The test employs a stepped ramp wave loading which repeats instantaneous straining and strain maintaining. The time-independent strains can be evaluated by using the stress-strain relations at the instantaneous straining parts, while the time-dependent strain can be evaluated by using the stress-time relations during the strain maintaining parts. Based on the results of the evaluations, the material constants of the elasto-plastic-creep models are estimated. Simulations of the viscoplastic deformations of Sn-3.0Ag-0.5Cu solder alloy were also conducted to verify the validity of the proposed method.
Free-Piston Stirling Cooler for Electronics Cooling in High Temperature Environments
Authors: Kwon Yong-Rak , Berchowitz David M.
Published: January 2010

This paper discusses active cooling devices used to maintain acceptable temperature levels for electronics packages in a high temperature environment. The temperature control is provided by a free-piston Stirling cooler (FPSC). The FPSC is a compact, quiet, low-vibration, environmentally benign cooling device based on the Stirling cycle. In principle, the cold side temperature of the FPSC, that thermally regulates the electronics package, is controllable from a low end, at cryogenic temperatures, upwards to the hot side temperature, which is limited only to the maximum temperature survivable by the materials used to construct the driving motor. General characteristics of the FPSC are discussed from the standpoint of electronics cooling and various options for heat transport are presented. Two prototype FPSCs have been developed for cooling electronics packages in applications where it has not been possible to accomplish even close to the requirements with existing technology. The first prototype is being used to cool an electronics package to below 100°C in a 200°C operating environment. The hot side temperature of the FPSC was designed to operate at 230°C in order to reject heat to the 200°C ambient, while limiting the motor temperature to less than 250°C. A cooling capacity of 120 W was achieved. The second prototype is used to provide conditioned air for a sealed, waterproof, electronics enclosure that is exposed to a 60°C environment. The FPSC operating temperatures for this application are 30°C on the cold side and 80°C on the hot side, with a cooling capacity of 500 W.
Application of Exploratory Data Analysis (EDA) Techniques to Temperature Data in a Conventional Data Center
Authors: Sharma Ratnesh , Shih Rocky , Patel Chandrakant , Sontag John
Published: January 2010

Data centers are the computational hub of the next generation. Rise in demand for computing has driven the emergence of high density datacenters. With the advent of high density, mission-critical datacenters, demand for electrical power for compute and cooling has grown. Deployment of a large number of high powered computer systems in very dense configurations in racks within data centers will result in very high power densities at room level. Hosting business and mission-critical applications also demand a high degree of reliability and flexibility. Managing such high power levels in the data center with cost effective reliable cooling solutions is essential to feasibility of pervasive compute infrastructure. Energy consumption of data centers can also be severely increased by over-designed air handling systems and rack layouts that allow the hot and cold air streams to mix. Absence of rack level temperature monitoring has contributed to lack of knowledge of air flow patterns and thermal management issues in conventional data centers. In this paper, we present results from exploratory data analysis (EDA) of rack-level temperature data collected over a period of several months from a conventional production datacenter. Typical datacenters experience surges in power consumption due to rise and fall in compute demand. These surges can be long term, short term or periodic, leading to associated thermal management challenges. Some variations may also be machine-dependent and vary across the datacenter. Yet other thermal perturbations may be localized and momentary. Random variations due to sensor response and calibration, if not identified, may lead to erroneous conclusions and expensive faults. Among other indicators, EDA techniques also reveal relationships among sensors and deployed hardware in space and time. Identification of such patterns can provide significant insight into data center dynamics for future forecasting purposes. Knowledge of such metrics enables energy-efficient thermal management by helping to create strategies for normal operation and disaster recovery for use with techniques like dynamic smart cooling.
Miniaturized Refrigeration System With Absorption: Application to Microelectronics Cooling
Authors: Chiriac Victor , Chiriac Florea
Published: January 2010

The study develops an analytical model of an optimized small scale refrigeration system using a thermo-chemical compressor, with application to the cooling of the electronic components populating a Printed Circuit Board (PCB) in a High-Power Microelectronics System. This work continues the authors’ previous study of a refrigeration system with mechanical compression and ejector compression [1–3]. However, the present study introduces the thermo-chemical compressor, comprised of an absorber-desorber unit, also known as refrigeration with absorption. This is a viable alternative to the mechanical compression systems, providing an improved feasibility and reliability at smaller scales. The proposed system includes miniaturized refrigeration components, designed to fit smaller scale power electronics, and uses a binary water-ammonia solution, compact heat exchangers with meso-channels and hydrogen as compensation gas in order to eliminate the circulation pump. The efficiency of the system is evaluated and further compared to mechanical compression designs at similar cooling powers. The study also discusses the thermodynamic cycle specifics and provides an extensive analytical evaluation and calculation of each miniaturized component design. The COP of the system is ∼ 0.4 – 0.5. The study is concluded by identifying the pros and cons of implementing such an absorption system to real-life microelectronics applications. The advantages of the optimized refrigeration design are highlighted, establishing a performance vs. size comparison to vapor-compression refrigerators, to serve as the basis for the enhanced cooling of future miniaturized refrigeration applications.
Board-Level Drop Reliability Performance Before and After Thermal Cycling Aging
Authors: Pang John H. L. , Xu Luhua
Published: January 2010

The combined sequential reliability test of thermal cycling aging followed by board level drop test for lead-free SnAgCu soldered assemblies were investigated. Interfacial IMCs, Kirkendall voids formation and interconnect failure mode are studied subject to TC aging. Kirkendall voids were observed with Ar+ sputtering etching. The failure sites and mechanism were examined and correlated with IMC and void formation. Significant decrease of drop life was observed for both SAC/ENIG and SAC/Cu-OSP assemblies after thermal cycling aging. Growth of Kirkendall voids and IMC significantly weakened the solder joint interface during TC aging. Drop impact crack path changed from the IMC to the IMC/Cu interface.
Analysis of an Annular-Geometry Thermoelectric Module (TEM)
Authors: Krishnan Shankar , Hodes Marc , Jones Christopher , Malis Oana
Published: January 2010

An annular-geometry thermoelectric module (TEM) operating in refrigeration mode is analyzed. As in conventional (Cartesian geometry) TEMs, the pellets are interconnected such that current flows through them in series whilst they act in parallel with respect to conduction heat transfer. Current direction is such that Peltier cooling is provided at the inner radius of an annular TEM and heat dissipation is at its outer radius, where a boundary condition of the first kind is imposed. The cross-sectional area of each pellet increases linearly with radius. Accounting for electrical contact resistances at the interconnects, the necessary (one-dimensional) heat-conduction problem is solved to determine general expressions for the cooling rate provided by and coefficient performance of an annular TEM. Maximum cooling flux into an annular TEM and coefficient of performance for cooling fluxes below the maximum value are calculated and compared to those for conventional TEMs. Finally, the benefits of using an annular-geometry TEM are discussed.
Electro Thermal Modeling of the Micro Flow Sensor With Feedback Control Circuit Using SPICE
Authors: Kamiunten Shoji , Nagayo Hidetomo , Motosuke Masahiro , Honami Shinji
Published: January 2010

This paper reports an efficient electro-thermal modeling technique for the Micro Flow Sensor (MFS) having an ensured thermal insulation structure with a thin silicon nitride membrane. Both the thermal fluid flow around two-heater MFS and the electric circuit were modeled together using a commercial general-purpose circuit simulator based on SPICE (Simulation Program with Integrated Circuit Emphasis). Two-dimensional laminar Poiseuille channel flow was assumed as the flow field in the model. Remarkable features of this technique are as follows: a partial three-dimensional lumped thermal network model involved in a two dimensional one, single segment for spanwise direction, and the forced convective heat transfer calculated by energy balance at each node in the fluid flow. The simulation and measurement results on the sensor characteristics were in good agreement.
Spatial Frequency Domain Analysis of Heat Transfer in Microelectronic Chips With Applications to Temperature Aware Computing
Authors: Etessam-Yazdani Keivan , Hamann Hendrik F. , Asheghi Mehdi
Published: January 2010

In this paper we present a novel analytical approach for obtaining the thermal transfer function of multi-layer chips in the spatial frequency domain. The behavior of the transfer function is used to address a number of key issues such as 1) the appropriate power granularity required for microarchitecture thermal-power analysis, and 2) the impact of packaging and cooling solutions on heat removal from chip hotspots. The merit of the presented method is in 1) simplicity, such that even for rather complicated multi-layer structures the analysis takes only a fraction of a second, and 2) accuracy, because the approach is based on the exact solution of three-dimensional heat diffusion equations.
Modelling the Reliability of Components on Flexible Substrates
Authors: Rizvi J. , Yin C. , Bailey C. , Lu H.
Published: January 2010

The use of flexible substrates is growing in many applications such as computer peripherals, hand held devices, telecommunications, automotive, aerospace, etc. The drive to adopt flexible circuits is due to their ability to reduce size, weight, assembly time and cost of the final product. They also accommodate flexibility by allowing relative movement between component parts and provide a route for three dimensional packaging. This paper will describe some of the current research results from the Flex-No-Lead project, a European Commission sponsored research program. The principle aim of this project is to investigate the processing, performance, and reliability of flexible substrates when subjected to new environmentally friendly, lead-free soldering technologies. This paper will discuss the impact of specific design variables on performance and reliability. In particular the paper will focus on copper track designs, substrate material, dielectric material and solder-mask defined joints.
Carbon Nanotube Array Thermal Interfaces on Chemical Vapor Deposited Diamond
Authors: Cola Baratunde A. , Xu Xianfan , Fisher Timothy S.
Published: January 2010

Carbon nanotube (CNT) arrays have been directly synthesized on plasma-enhanced chemical vapor deposited diamond films in the same growth chamber. The diamond films were grown using a bias-enhanced nucleation technique that produces relatively smooth and flat films. The thermal resistances of the CNT array/diamond film interface were measured using a photoacoustic technique to be approximately 12 mm2·K/W at moderate pressures.
Effect of Orientation and Draining on Linear Spray Array Thermal Management
Authors: Regner Benjamin M. , Shedd Timothy A.
Published: January 2010

Spray cooling is a candidate solution for high heat flux cooling applications, and previous work has investigated the impact of parameters of conical sprays such as volumetric flux and Sauter mean diameter on heat transfer performance. However, there has been little work on the impact of drainage and spray orientation on spray performances. In addition, conical sprays are not very practical for large area coverage in compact packages, so this study, presents a novel arrangment that uses linear sprays impinging at an angle such that fluid management and uniform droplet coverage of large areas are both improved. Results for the heat transfer coefficient and CHF of a constrained, practical implementation of a spray array (as opposed to a laboratory-only geometry) are presented for FC-72, FC-40 and HFE-7000.