bluuebunny/crossref_metadata_2025 huggingface dataset:
Un diario de viaje inédito de Basilio Villarino y el mapa de la travesía: más de un siglo de periplo por los archivos
Authors: Enrique Laura Aylén
Published: July 2015

En este trabajo presentamos un diario de viaje inédito del piloto de la Real Armada Basilio Villarino, quien se desempeñó como funcionario del Virreinato del Río de la Plata en el Fuerte del Carmen, uno de los enclaves españoles pioneros en la costa patagónica, ubicado en las cercanías de la desembocadura del río Negro. Acompañamos la transcripción de dicho documento con el mapa de la zona que el piloto elaboró como complemento gráfico del relato escrito. Consideramos que la conjunción de ambos registros posibilita un acercamiento más completo al legado del funcionario colonial y facilita una comprensión más acabada de los aportes del marino al conocimiento del paisaje norpatagónico. En este sentido, cabe destacar las dificultades que implica reunir este tipo de documentación en función de la dispersión de la misma en diversos archivos y repositorios, los cambios en la catalogación de la misma, la venta de los documentos de forma separada, las pérdidas u omisiones en la información correspondiente, entre otros factores. Por ello, resulta relevante presentar el diario de viaje y el mapa correspondiente como complementarios, dando cuenta del contexto en el que fueron producidos y, de esta manera, también señalando la importancia que revistieron en el marco del desconocimiento español sobre un territorio dominado por grupos indígenas.
Traductions en français de la poésie orale berbère et figures d’intellectuels algériens en période de décolonisation
Authors: Baquey Stéphane
Published: July 2015

La poésie, comme genre de discours, a été un élément privilégié de la formation des répertoires culturels des nations émergentes. Les acteurs culturels qui ont contribué à cette forme d’invention de la tradition devaient posséder tout à la fois l’autorité discursive d’intellectuels professionnels et la représentativité d’intellectuels organiques. Dans le contexte du monde arabo-musulman et de la décolonisation algérienne, Jean el-Mouhoub Amrouche, Mouloud Feraoun et Mouloud Mammeri ont composé, des années 1930 aux années 1980, des ouvrages de poésie orale berbère traduite en français. Les tensions linguistiques et culturelles de leurs situations discursives étaient telles que leur pratique ne peut être définie par aucun schéma fondé sur des processus de renaissance nationale ou de décolonisation.
Spacing and Displacing as Artistic Enquiry
Authors: Iohe Taey
Published: June 2015

This chapter presents a philosophical journey and practical piece of experimentation on spatiality, virtuality and displacement. A series of art practices using photography, installation and art writing form the trajectory for a sequence of conceptual maps. The discussion engages with spacing and displacing as an artistic enquiry on space. The chapter consists of an examination of the typology and meaning of displacement in its translation from Korean, and a discussion of the formation of a gendered and artistically constructed displacement by extending the scope of the theory to the displacement of women in a colonial situation. This chapter explores the way in which displaced women (in the very particular case of Korean “comfort women” during the colonial war with Japan, and through the case of the artist, Hyeseok Na) cannot belong in either their home or a foreign land. Virtual-ness, here, is approached with an artistic understanding, and is found to constitute an unreal living space rather than merely a virtual environment through technology.
The Role of Latin American Bodies to the International Standard Setting
Authors: Lopes Ana Isabel
Published: July 2015

This chapter presents an overview, on a twofold perspective, of the role of Latin American (LATAM) countries in the process of setting international standards. Firstly, at the international level, it checks who are the LATAM bodies and persons who have a seat in the structure of IFRS Foundation and the IASB's advisory bodies, highlighting their role and the required individual skills. Secondly, at the regional and local levels, it looks at the accountancy bodies in each LATAM country, to identify what they are doing regarding the process of convergence and adoption of international accounting standards. The topics discussed conclude that (1) overall Brazil seems to assume the leading position and the most prominent role, (2) Brazil, Mexico, Argentina, and Venezuela are the most engaged with IASB's work, and (3) Brazil and Mexico have the most diverse and available information on the activities developed by local accountancy's bodies and respective consequences for financial reporting.
Accounting Systems' Classification in Latin America
Authors: Sarquis Raquel Wille , Luccas Rudah Giasson
Published: July 2015

This chapter aims to propose a classification based on accounting systems of five Latin American countries that have adopted IFRS. More specifically, we seek to identify which is the position of each country within this group of countries as a whole, providing empirical evidences of whether the accounting practices in Latin America countries are harmonized in the IFRS era, or not. Despite of international efforts around the convergence to IFRS, where companies would use the same accounting standard, reducing the differences in terms of accounting practices, there is empirical evidence of significant differences in the way that IFRS has been applied worldwide, resulting in “national versions of IFRS”. The results of this chapter provide empirical evidence that accounting practices in Latin America countries are harmonized, considering that the five countries analyzed have similar characteristics in terms of accounting systems.
Challenges in Applying IFRS in a Civil Law Tradition
Authors: Fernandes Edison Carlos
Published: July 2015

As part of the Common Law, IFRS represents a significant cultural change in Brazil, a Civil Law country, for both accounting and law. In 2010 (the first adoption of IFRS), Brazilian accounting legislation fully adopted the International Financial Reporting Standards (IFRS) as its standard for accounting practices. Accordingly, its adoption by Brazil represents a challenge, since it is a significant cultural change, because of its insertion into a Civil Law system country. First of all, in accounting terms, this chapter comments how the specific rules were changed by principles with a big importance for the administration judgments, in this way, the managers' subjectivity. Additionally, considering that in a Civil Law system, especially in Brazil, this chapter presents that there are many shareholders' rights in the stricto sensu law, the legal impacts of the financial statements must be analyzed, including the manager's responsibility.
Influence of International Accounting Convergence on the Level of Earnings Management in both Brazilian and Chilean Companies
Authors: da Silva Alini , Pletsch Caroline Sulzbach , Klann Roberto Carlos , Fasolin Luiza Betânia , Scarpin Jorge Eduardo
Published: July 2015

This study aimed to analyze the influence of international accounting convergence in the level of earnings management in both Brazilian and Chilean companies. The sample was composed by the Brazilian and Chilean firms listed in Thomson ONE Banker database and presenting the data needed for the research. The study period was that between 2004 and 2012. Descriptive, document and quantitative research was conducted, with the application of the KS Model, t Test for independent samples and panel analysis. In Chilean companies, it was found that the greater the variation of revenue, the greater the tendency to use discretionary accruals. In Brazilian companies, it became clear that the larger the firm, the higher the earnings management. It was concluded that the adoption of IFRS by Brazilian and Chilean firms contributed to the reduction of discretionary accruals and, therefore, earnings management, although this effect was significant only in Chilean companies.
Using Market Research as the Basis for Successful Content Product Decisions
Authors: Pilla Judith Durgin , Pilla Louis
Published: July 2015

For publishers and content providers, basing content decisions on one's own perception of what users need can be fraught with peril. Adopting an “outside-in” approach to product development – in which customer needs, not internal desires of the organization, drive product development – leads to the greatest chances for success. When it comes to understanding the audience, content providers and product teams have a variety of methodological approaches from which they can choose. These methods fall into two overarching approaches: qualitative and quantitative research. This chapter provides descriptions of several qualitative and quantitative research approaches that are frequently used to inform publishing business decisions. The authors discuss the importance of researching a target audience and present methods to discover their needs. Through two case studies, they provide an example of how research methods are employed in real-world situations.
Modeling Size Reduction and Fractionation for Cellulosic Feedstock
Authors: Naimi Ladan J. , Sokhansanj Shahab , Bi Xiaotao T. , Lim C. Jim , Lau Anthony Ka-pong , Emami Mohammad , Melin Staffan
Published: July 2015

Biomass has attracted attention as a source of renewable energy. It is available in different forms such as lignocellulosic stalks of herbaceous and woody biomass. These forms of biomass should be prepared to go through bioconversion process or biofuel production. One of the major unit operations for preparation is size reduction, which increases the surface area available and breaks the structure of biomass. Size reduction is energy intensive and an expensive step of feedstock preparation. The characteristics of ground particles are the result of interactions between material properties and the modes of size reduction like shear, impact, and attrition. The fundamentals of size reduction of fibrous biomass are not well understood. This chapter summarizes the latest studies on modeling of size reduction of lignocellulosic and woody biomass.
The Two Dimensional Microstage Used in Geometric Measurement of Rockwell Diamond Indenter
Authors: Pan Sheau Shi , Ni I Chih , Yang Feng Yu
Published: July 2015

The Primary Rockwell Hardness Standard System was set up in the Center for Measurement Standards since July 1996 till June 1997. During the period, a compact laser interferometer, HP10737R 3-axis interferometer system was used to measure the effect of pitch and yaw of the Rockwell Hardness standard machine. Considering to increase the performance of hardness measurement, the geometry of the diamond tip has to be determined. In this paper, we will present the results of indenter geometry by μ-CMM (Coordinate Measuring Machine) in CMS.
Behavior and Chemical Reactions of Liquid Si and Ge on SiС Surface
Authors: Alassaad Kassem , Soulière Véronique , Cauwet François , Carole Davy , Ferro Gabriel
Published: July 2015

The interaction of liquid Ge and Si droplets, deposited by CVD, on the surface of 4H-SiC single-crystals is studied. It was found that at 1500 °C Ge forms micrometric droplets while Si forms nanometric dots. While the Si dots do not seem to interact significantly with SiC, the Ge droplets have the tendency to dissolve the Si from the seed. This mechanism not only happens during deposition but also during the cooling. If the cooling rate is too slow, Ge evaporates from the droplets while dissolving Si so that, at the end, the droplets look like to have been fully converted from Ge to Si.
Epitaxial Growth on 150 mm 2° off Wafers
Authors: La Via Francesco , Piluso Nicolo’ , Fiorenza Patrick , Mauceri Marco , Vecchio Carmelo , Pecora Antonino , Crippa Danilo
Published: July 2015

In this work a new epitaxial process on 6 inches has been performed on 2° off-cut substrate. This off-cut will reduce the material loss during substrate preparation from the crystal boule. The thickness and doping uniformity of the samples grown in the LPE reactor PE1O6 is extremely good and the PL map shows a low defects density. The roughness is slightly higher on 2° off-cut and the process window becomes narrower.
Defect Reduction in Epitaxial 3C-SiC on Si(001) and Si(111) by Deep Substrate Patterning
Authors: von Känel Hans , MIGLIO Leo , Crippa Danilo , Kreiliger Thomas , Mauceri Marco , Puglisi Marco , Mancarella Fulvio , Anzalone Ruggero , Piluso Nicolo’ , La Via Francesco
Published: July 2015

The heteroepitaxial growth of 3C-SiC on Si (001) and Si (111) substrates deeply patterned at a micron scale by low-pressure chemical vapor deposition is shown to lead to space-filling isolated structures resulting from a mechanism of self-limitation of lateral expansion. Stacking fault densities and wafer bowing may be drastically reduced for optimized pattern geometries.
PLD Grown 3C-SiC Thin Films on Si: Morphology and Structure
Authors: Ryndya S.M. , Kargin N.I. , Gusev A.S. , Pavlova E.P.
Published: July 2015

Silicon carbide thin films were obtained on Si (100) and (111) substrates by means of vacuum laser ablation of α-SiC ceramic target. The influence of substrate temperature on composition, structure and surface morphology of experimental samples was examined using Rutherford backscattering spectrometry (RBS), Fourier transform infrared spectroscopy (FTIR), scanning electron microscopy (SEM), conventional and high-resolution transmission electron microscopy (TEM/HRTEM), atomic force microscopy (AFM), selected area electron diffraction (SAED) and X-ray diffraction (XRD) methods.
Effect of Forced Convection by Crucible Design in Solution Growth of SiC Single Crystal
Authors: Kurashige Kazuhisa , Aoshima Masahiro , Takei Koichi , Fujii Kuniharu , Hiratani Masahiko , Senguttuvan Nachimuthu , Kato Tomohisa , Ujihara Toru , Matsumoto Yuji , Okumura Hajime
Published: July 2015

In this paper, we will discuss how to cope with the smoother growth front and higher growth rate by the forced convection. When the rotation rate of the upper part of the solution is different from that of the lower part in the crucible, the centrifugal force of the upper part is different from that of the lower part. As a result, a forced convection occurs in the solution. This kind of convection was achieved with accelerating/decelerating rotation of crucible and a plate fixed on the bottom of the crucible. By optimizing conditions of rotation program patterns and the crucible design for the forced convection, the growth rate could almost be doubled while maintaining smooth morphology.
Characterising Strain/Stress and Defects in SiC Wafers Using Raman Imaging
Authors: Batten Tim , Milikofu Olga
Published: July 2015

Raman spectroscopy is a well established non-destructive tool for determining crystal polytypes, strain/stress, electronic properties and material quality in SiC. Here we report on the application of ultrafast Raman imaging to a SiC wafer, allowing 870,908 spectra to be collected from a 2 inch 4H-SiC wafer, in 75 minutes. Analysis of the acquired data enabled us to locate and investigate defects and surface contamination and also allowed stress in the wafer to be characterised.
Probing of Carrier Recombination in n- and p-Type 6H-SiC Using Ultrafast Supercontinuum Pulses
Authors: Grivickas Paulius , Sampayan Stephen , Redeckas Kipras , Vengris Mikas , Grivickas Vytautas
Published: July 2015

Excess carrier dynamics in 6H-SiC substrates with n- and p-type moderate doping were detected using femtosecond pump-probe measurements with supercontinuum probing. Band-to-band recombination and carrier trapping were determined as the main recombination processes in both materials. Spectral fingerprints corresponding to each of these recombination components were obtained using the global and target analysis. It was shown that, in spite of background doping, the band-to-band recombination in 6H-SiC is dominated by the excess electron absorption component and the carrier trapping is dominated by the excess hole absorption.
Observation of Damaged Layers in 4H-SiC Substrates by Mirror Projection Electron Microscope
Authors: Sasaki Masayuki , Tamura Kentaro , Yamaguchi Hirotaka , Matsuhata Hirofumi , Kojima Kazutoshi , Kitabatake Makoto
Published: July 2015

Surface defects with scratch-like appearances are often observed locally on 4H-SiC wafers after epitaxial growth. We evaluated such damaged layer which is the cause of local step bunching using Mirror Projection Microscope (MPJ). As a result, MPJ can be detected l damaged layer which could not be detected using Synchrotron X-ray topography, even if these defects are extremely flat surface, no morphology, damaged layer is used to exist on the subsurface region. Thus, MPJ can be detected dislocation loops on the subsurface region of damage, it is effective to elucidate damaged layer of polishing process, MPJ is to be one of the candidates for inspection techniques of the damaged layer at substrate surface.
Features of the Band-Edge Injection Electroluminescence in 4H-SiC pn Structures
Authors: Strel'chuk Anatoly M. , Kuz’michev Yury S. , Shtel’makh Konstantin F.
Published: July 2015

Band-edge (hνmax=3.17-3.18 eV at T=293 K) injection electroluminescence (IEL) characteristics of 4H-SiC pn structures as a function of doping, electron irradiation, temperature, and current are presented. The intensity of the UV band increases with temperature in the range 290-800 K (with an activation energy Ea of about 90 meV), which is observed for the first time in a wide range of current densities from 9 A/cm2 up to 2∙104 A/cm2. This effect is a fundamental feature of the band-edge IEL in SiC pn structures. The dependence of the intensity L on the current is of the power-law type, L~Jm; at high currents m≈1 at T=650-800 K. This result is probably the first direct observation of the diffusion current in SiC pn structures. The rise in the intensity of the band-edge IEL with increasing temperature and its decrease upon irradiation are probably due to the corresponding change in the lifetime of nonequilibrium carriers.
Study on Formation of Dislocation Contrast in 4H-SiC Wafer in Mirror Projection Electron Microscopy Image
Authors: Isshiki Toshiyuki , Hasegawa Masaki
Published: July 2015

A mirror projection electron microscopy (MPJ), non destructive, high spatial resolution and high throughput method, is useful for defect inspection in silicon carbide (SiC) wafer. Previously, it was demonstrate that three type of typical dislocations in 4H-SiC, threading screw dislocation (TSD), threading edge dislocation (TED) and basal plane dislocations (BPD) can be identified in MPJ image. Origin of the contrast of dislocations in MPJ image was revealed by observation of the same wafer at as-grown and after CMP processing. Streak of TSD spot is due to surface morphology, and the contrast of BPD isn’t due to surface morphology but due to charging on dislocation line.
Relations between Surface Morphology and Dislocations of SiC Crystal
Authors: Orai Yoshihisa , Watanabe Syunya , Sato Takahiro , Isshiki Toshiyuki , Fukui Munetoshi
Published: July 2015

We observed fine surface morphology of silicon carbide wafers using a low energy scanning electron microscope (LESEM). Typical kinds of surface defects were observed by LESEM. After low temperature KOH treatment, it is confirmed that positions of etch pits are the same positions of these defects. Correlation between LESEM imaging and cross-sectional scanning transmission electron microscopy (STEM) of the same defects reveals threading dislocations and basal plane dislocations at the core of the defects.
Isothermal Treatment Effects on the Carbon Vacancy in 4H Silicon Carbide
Authors: Ayedh Hussein M. , Nipoti Roberta , Hallén Anders , Svensson Bengt Gunnar
Published: July 2015

The carbon vacancy (VC) is a minority carrier lifetime controlling defect in 4H-SiC and it is formed during high temperature treatment. In this study, we have performed heat treatment on two sets of n-type 4H-SiC epitaxial samples. The first set was isothermally treated at 1850 °C to follow the evolution of VC as a function of time. The VC concentration is not affected by changing the duration. Samples of the other set were treated at 1950 °C for 10 min, but with different cooling rates and a reduction of the VC concentration was indeed demonstrated by lowering the cooling rate. The VC concentration in the slow-cooled sample is about 2 times less than in the fast-cooled one, reflecting a competition between equilibrium conditions and the cooling rate.
Surface Orientation Dependence of SiC Oxidation Process Studied by In Situ Spectroscopic Ellipsometry
Authors: Goto Daisuke , Yagi Shuhei , Hijikata Yasuto , Yaguchi Hiroyuki
Published: July 2015

We performed real-time observations of SiC oxidation at various temperatures by in-situ spectroscopic ellipsometry using a Si-face, an a-face and a C-face substrates. We calculated oxide growth rates based on “Si-C emission model,” taking into account the emission of interfacial Si and C atoms from the SiC–SiO2 interface. The calculated values well reproduced the oxide thickness dependence of oxide growth rates. We discussed the SiC oxidation mechanism using the parameters deduced from the calculations.
Basal Plane Dislocations Created in 4H-SiC Epitaxy by Implantation and Activation Anneal
Authors: Stahlbush Robert E. , Mahadik Nadeemullah A. , Zhang Q. Jon , Burk Albert A. , Hull Brett A. , Young Jonathan
Published: July 2015

Basal plane dislocations (BPDs) introduced into SiC epitaxial layers, 25 μm thick, by the combination of implantation and activation anneal are directly observed by ultraviolet photoluminescence (UVPL) imaging. BPD loops appear to originate at micron-sized or smaller areas at the surface. These loops expand by gliding along the basal plane in the offcut direction until the loops approach the substrate. The loops can glide perpendicular to the offcut direction by many millimeters.
Ohmic Contact on n-Type 3C-SiC Activated with SiO2 Encapsulation
Authors: Li Fan , Sharma Yogesh , Hamilton Dean , Fisher Craig , Jennings Michael R. , Burrows Susan , Mawby Philip  Andrew
Published: July 2015

This work has focused on using a deposited SiO2 layer as the surface protection for 3C-SiC post-implantation activation annealing process. The 3C-SiC epilayers are grown on a Si substrate, nitrogen implanted and then annealed. Both physical and electrical characterisation tools are used to evaluate the influential factors, including implantation doses, semiconductor surface roughness and post-implantation anneal conditions. It is found out that, the SiO2 capped samples achieved lower specific contact resistance in highest temperature conditions. The lowest contact resistivity of the SiO2 capped sample is 4.9x10-6Ω.cm2, which is 65.4% lower than the unprotected sample annealed in the same condition.
Al+ Ion Implanted On-Axis <0001> Semi-Insulating 4H-SiC
Authors: Nipoti Roberta , Parisini Antonella , Carnera Alberto , Albonetti Cristiano , Vantaggio Salvatore , Grossner Ulrike
Published: July 2015

P-type 4H-SiC layers have been obtained by different 400°C Al+ ion implantation processes of semi insulating 4H-SiC wafers and identical 1950°C/5 min post implantation annealing. Implanted Al+ concentration have been 4.7×1018, 9.3×1018, and 4.7×1019 cm-3, thickness of the implanted layer about 630 nm. Electrical characterizations have been performed in the temperature range 100 – 580 K. With decreasing temperature, the onset of a hole conduction through an impurity band has been seen for all the specimens.
Sputtered Ohmic Cobalt Silicide Contacts to 4H-SiC
Authors: Smedfors Katarina , Zetterling Carl Mikael , Östling Mikael
Published: July 2015

Ohmic CoSi2 contacts to n-type 4H-SiC showing low contact resistance have been made by sputter depositing sequential layers of Si and Co on 4H-SiC substrates followed by a two-step rapid thermal anneal at 600 °C and 950 °C. The contacts formed have been characterized at temperatures ranging from-40 °C to 500 °C with a specific contact resistance of 3.80∙10-5 Ωcm2 at 25 °C and a minimum of 6.0∙10-6 Ωcm2 at 500 °C.
Investigation of Pressure Dependent Thermal Contact Resistance between Silver Metallized SiC Chip and DBC Substrate
Authors: Toth Pal Zsolt , Zhang Ya Fan , Belov Ilja , Nee Hans Peter , Bakowski Mietek
Published: July 2015

– Thermal contact resistances between a silver metallized SiC chip and a direct bonded copper (DBC) substrate have been measured in a heat transfer experiment. A novel experimental method to separate thermal contact resistances in multilayer heat transfer path has been demonstrated. The experimental results have been compared with analytical calculations and also with 3D computational fluid dynamics (CFD) simulation results. A simplified CFD model of the experimental setup has been validated. The results show significant pressure dependence of the thermal contact resistance but also a pressure independent part.
Fabrication of 3C-SiC MOS Capacitors Using High-Temperature Oxidation
Authors: Sharma Yogesh K. , Li Fan , Fisher C.A. , Jennings M.R. , Hamilton Dean , Thomas S.M. , Pérez-Tomás A. , Mawby P.A.
Published: July 2015

A systematic study on the 3C-SiC/SiO2 interface has been done. 3C-SiC epilayers have been grown on a Si (001) substrate. Results obtained from room temperature conductance-voltage (G-V) and hi-low capacitance-voltage (C-V) on n-type 3C-SiC/SiO2 metal-oxide-semiconductor capacitors (MOS-Cs) have been reported using various types of oxides. The oxides used in these studies have been thermally grown at different oxidation temperatures - 1200°C, 1300°C and 1400°C. Also, the interface trap density (Dit) of as-grown MOS-C is compared with nitrided (thermally grown oxide + N2O post-oxidation annealing) oxides. Oxide grown at 1300°C followed by N2O-passivation at the same temperature gives the lowest Dit of 6x1011 cm-2eV-1 at 0.2eV from the conduction band (CB) edge.
Improving Interface Quality of 4H-SiC MOS Devices with High Temperature Oxidation Process in Mass Produce Furnace
Authors: Xu Heng Yu , Yang Qian , Wang Xiao Lei , Liu Xin Yu , Zhao Yan Li , Li Chengzhan , Watanabe Heiji
Published: July 2015

A high-temperature process is used to enhance the COx desorption rate to reduce trap density in SiC/SiO2 interface for SiC MOSFETs. Interface state density as measured by Terman method and C-ψs method for the oxidation processes at a high temperature of 1350°C show significant improvement compared to traditional Si thermal oxidation temperature of 1200°C. The higher oxidation temperature led to a much faster growth rate and some observable hysteresis in the CV curves, which could be due to electron trap and can be resolved by NOx post oxidation anneal (POA).
Influence of Phosphorous Auto-Doping on the Characteristics of SiO2/SiC Gate Dielectrics
Authors: Weng Ming Hung , Murphy A.E. , Ryan Craig , Furnival B.J.D. , Smith Dave A. , Clark David T. , Young R.A.R. , Ramsay Ewan P. , Thompson Robin. F. , Horsfall A.B.
Published: July 2015

We present the influence of phosphorous auto-doping on the characteristics of the oxide interface in 4H-SiC following high temperature gate oxide annealing. IV characteristics show no evidence of direct tunnelling breakdown; however Fowler Nordheim (F-N) conduction is observed in high electric field with the oxides able to sustain >10MV/cm. Capacitance Voltage data show DIT <1x1012 eV-1cm-2 close to the conduction band edge after POA, with undoped samples demonstrating DIT below 5x1011 eV-1cm-2. Photo CV data indicates smaller flat band voltage shifts of 0.6V at midpoint for the undoped samples, in comparison to 0.9V for the phosphorous doped devices. Temperature and bias stress tests at 200°C showed marginal hysteresis (0.3V) in both wafers. Reliability of time-dependent constant current and constant voltage characteristics revealed higher TDDB lifetimes in the undoped wafer. We conclude that the unintentional incorporation of phosphorous into the gate stack as a result of high temperature POA of the doped field oxide leads to a variation in flat band shift, higher DIT, and lower dielectric reliability.
Characteristics of MOS Capacitors with NO and POCl3 Annealed Gate Oxides on (0001), (11-20) and (000-1) 4H-SiC
Authors: Chowdhury Sauvik , Yamamoto Kensaku , Hitchcock Collin W. , Chow T. Paul
Published: July 2015

MOS capacitors have been fabricated on (0001), (11-20) and (000-1) oriented 4H-SiC under different post-oxidation anneal (POA) conditions. 100 MHz conductance measurement shows the generation of very fast donor-type interface traps after NO anneal for both Si-face (0001) and a-face (11-20), but not on C-face (000-1). Fast traps were not observed in POCl3 annealed samples for any orientation. Smallest Dit (at 0.2 eV below conduction band edge) was obtained on Si-face using POCl3 anneal (1.4x1011 cm-2 eV-1), on a-face using NO anneal (2.5x1011 cm-2 eV-1) and on C-face using POCl3 anneal (4.5x1012 cm-2 eV-1).
Plasma Nitridation of 4H-SiC by Glow Discharge of N2/H2 Mixed Gases
Authors: Akahane Yoshiyuki , Kimura Kyosuke , Kano Takuo , Watanabe Yukimune , Yamakami Tomohiko , Fujimaki Shinji , Kamimura Kiichi
Published: July 2015

The mixed gas of nitrogen and hydrogen was used for the plasma nitridation of SiC surface.A small amount of hydrogen was effective to activate the nitridation reaction and suppress the oxidationreaction. The interface properties were improved by using nitride layer as an interfacial bufferlayer of SiC MIS structure.
MOS Interface Characteristics of In Situ Ge-Doped 4H-SiC Homoepitaxial Layers
Authors: Salinaro Alberto , Alassaad Kassem , Peters Dethard , Friedrichs Peter , Ferro Gabriel
Published: July 2015

We report on the electrical characterization of the Metal-Oxide-Semiconductor (MOS) interfacerealized on in-situ Ge-doped n-type 4H-SiC epilayers grown by Chemical Vapour Deposition(CVD). In order to study the relevance of this novel material for MOSFET technology, and in particularwhether the Ge presence deteriorates the SiC/SiO2 interface, we investigated the electrical propertiesof MOS capacitors realized on this novel substrate. Capacitance-Voltage measurements, performedto determine the quality of the SiC/SiO2 interface, show that the interface traps concentration is notincreased by the Ge content. The current through the oxide layer, monitored to study the bulk oxidequality and the tunneling mechanisms, indicates that Fowler-Nordheim conduction occurs and that thesubstrate-to-oxide barrier for electrons is comparable to the reported values for the SiC/SiO2 system.
High-Speed Dicing of SiC Wafers by Femtosecond Pulsed Laser
Authors: Nakajima Akira , Tateishi Yosuke , Murakami Hiroshi , Takahashi Hidetomo , Ota Michiharu , Kosugi Ryoji , Mitani Takeshi , Nishizawa Shin Ichi , Ohashi Hiromichi
Published: July 2015

A novel dicing technology that utilizes femtosecond pulsed lasers (FSPLs) are demonstrated as a high-speed and cost-effective dicing process for SiC wafers. The developed dicing process consists of cleavage groove formation on a SiC wafer surface by the FSPL, followed by chip separation by pressing a cleavage blade. The effective FSPL scan speed on the SiC surfaces was 33 mm/s. Kerf loss can be negligible in the developed FSPL dicing process. In addition, the residual lattice strain in the FSPL-diced SiC chips was comparably small to that of the conventional mechanical process using diamond saws, due to the absence of the lattice heating effect in femtosecond-laser processes.
Thermal Laser Separation – A Novel Dicing Technology Fulfilling the Demands of Volume Manufacturing of 4H-SiC Devices
Authors: Lewke Dirk , Dohnke Karl Otto , Zühlke Hans Ulrich , Cerezuela Barreto Mercedes , Schellenberger Martin , Bauer Anton J. , Ryssel Heiner
Published: July 2015

One challenge for volume manufacturing of 4H-SiC devices is the state-of-the-art wafer dicing technology – the mechanical blade dicing which suffers from high tool wear and low feed rates. In this paper we discuss Thermal Laser Separation (TLS) as a novel dicing technology for large scale production of SiC devices. We compare the latest TLS experimental data resulting from fully processed 4H-SiC wafers with results obtained by mechanical dicing technology. Especially typical product relevant features like process control monitoring (PCM) structures and backside metallization, quality of diced SiC-devices as well as productivity are considered. It could be shown that with feed rates up to two orders of magnitude higher than state-of-the-art, no tool wear and high quality of diced chips, TLS has a very promising potential to fulfill the demands of volume manufacturing of 4H-SiC devices.
High Quality 150 mm 4H SiC Wafers for Power Device Production
Authors: Quast Jeffrey , Hansen Darren , Loboda Mark , Manning Ian , Moeggenborg Kevin , Mueller Stephan , Parfeniuk Chris , Sanchez Edward , Whiteley Clinton
Published: July 2015

The commercial availability of high quality 150 mm 4H SiC wafers has aided in the growth of SiC power device fabrication. The progress of 150 mm 4H SiC wafer development at Dow Corning is reviewed. Defect densities compare well to those typical for 100 mm wafers, with even lower threading screw dislocation densities observed in 150 mm wafers. Resistivity data shows a comparable range from 0.012 – 0.025 ohm.cm, and excellent shape control is highlighted for wafer thicknesses of 350 μm and 500 μm.
Cryogenic to High Temperature Exploration of 4H-SiC W-SBD
Authors: Berthou Maxime , Asllani Besar , Brosselard Pierre , Godignon Philippe
Published: July 2015

W-SBD show exceptional reliability from 200 to 500K, however, its barrier analysis has never been performed thoroughly down 81K. This paper shows our study of Schottky barrier and Richardson coefficient was extracted for different temperature ranges. We observed fluctuation in function of the temperature. We analyse this phenomenon and compare it to literature for other barriers. Measurements of reverse characteristics up 1200V have been performed from 81 to 450K. It confirms that partial ionization influence on the drift doping impacts on the barrier height.
A Study of Post Annealing Effects in the Repair of High Resistance Failures with Unstable Schottky Barrier Height in 4H-SiC Schottky Barrier Diode
Authors: Kyoung Sin Su , Jung Eun Sik , Kang Tai Young , Yang Chang Heon , Sung Man Young
Published: July 2015

To improve the high resistance and low Breakdown Voltage (BV) of 4H-SiC SBD, the metal annealing process is usually used to to stabilize SBH. We confirmed that post metal annealing after the chip process also stabilizes SBH by the post annealing experiment of applying failure chips (4H-SiC Ti/Al SBD) that have a forward current (IF) under 1 [A] with high resistance, because of the metal annealing process error. The result of experiments showed that the IF increment and BV decrement are proportional to the applied temperatures over 450 °C, and the second additional post annealing shows a decrease of IF and BV. Aluminum and Titanium transformation with post metal annealing made a decrease of SBH, so that the on-resistance is decreased and BV is decreased (in severe cases, the intense post annealing generates Aluminum spiking). From a result of this work, using a suitable post metal annealing, we can improve the IF of SiC SBD with a high resistance failure from the metal process event.
Static and Dynamic Characteristics of SiC MOSFETs and SBDs for 3.3 kV 400 A Full SiC Modules
Authors: Wada Keiji , Tamaso Hideto , Itoh Satomi , Kanbara Kenji , Hiyoshi Toru , Toyoshima Shigenori , Genba Jun , Tokuda Hitoki , Sugimura Takahiro , Michikoshi Hisato , Tsuno Takashi , Mikamura Yasuki
Published: July 2015

Characteristics of SiC MOSFETs and SBDs with 3.3 kV-class have been presented. Static Characteristics of the MOSFET showed a specific on-resistance of 14.2 mΩ cm2. A breakdown voltage of 3850 V is obtained by using the dose optimized edge termination structure as we have previously reported [1]. At the same time, reverse leakage current of the 3.3 kV SiC SBDs can be suppressed by the JBS structure and the edge termination which is also used in the MOSFETs. By using the MOSFETs and SBDs, we have demonstrated the superior capability of the 3.3 kV 400 A full SiC 2 in 1 modules with a compatible case and terminal configurations to Si IGBT modules. Dynamic characteristics of the full SiC module in an inductive load switching exhibits superior turn-on and turn-off properties even at a high drain voltage of 1650 V, demonstrating the availability of high voltage SiC power systems.
Simulations of a Lateral PiN Diode on Si/SiC Substrate for High Temperature Applications
Authors: Chan Chun W. , Gammon Peter Michael , Shah Vishal Ajit , Chen Han , Jennings Michael R. , Fisher C.A. , Pérez-Tomás A. , Myronov Maksym , Mawby P.A.
Published: July 2015

Simulations are presented of a lateral PiN power diode on a Si/SiC substrate for harsh environment, high temperature applications. Thermal simulations compare the Si/SiC solution to SOI, Si/SiO2/SiC, bulk Si and SiC, showing that the Si/SiC architecture, with its thin Si film intimately formed on SiC, displays significant thermal advantages over any other Si solution, and is comparable to bulk SiC. Detailed electrical simulations show that in comparison to the same device in SOI, a Si/SiC PiN diode offers no deterioration of the on-state performance, improved self-heating effects at increased current and can potentially support higher breakdown voltages.
Physical Vapor Transport Growth of 4H-SiC on {000-1} Vicinal Surfaces
Authors: Yang Xiang Long , Yang Kun , Chen Xiu Fang , Peng Yan , Hu Xiao Bo , Xu Xian Gang
Published: July 2015

Bulk 4H-SiC crystals were grown on 4° off-axis seeds by the physical vapor transport technique. Two completely different surface morphologies of as-grown crystals were observed by laser scanning confocal microscopy. The formation mechanisms of the different surface morphologies are proposed and discussed. We found that the facet formation and migration on the 4° off-axis seeds largely depended on the profile evolution of the temperature field in the growth cell over a long-term growth run. At the interface between the two growth regimes, some grown-in defects, including micropipes, dislocations and polytype inclusions, were frequently observed by polarizing optical microscopy and chemical etching. The stress induced by step coalescence could be responsible for the formation of these grown-in defects.
Comparative Study of Characteristics of Lateral MOSFETs Fabricated on 4H-SiC (11-20) and (1-100) Faces
Authors: Ariyoshi Keiko , Harada Shinsuke , Senzaki Junji , Kojima Takahito , Kobayashi Yusuke , Tanaka Yasunori , Iijima Ryosuke , Shinohe Takashi
Published: July 2015

We have fabricated the lateral MOSFETs on (11-20) and (1-100) faces and have compared the properties between these faces with various gate oxide processes. It has been demonstrated that (11-20) and (1-100) faces show comparable electrical properties with nitridation treatment on the gate oxide. Our result indicates that both faces exhibit the similar trend of the mobility vs. Dit. Furthermore, it has been shown that NO POA is beneficial to both faces in achieving high channel mobility and suppressed Vt instability.
Improved Evaluation Method for Channel Mobility in SiC Trench MOSFETs
Authors: Kutsuki Katsuhiro , Kawaji Sachiko , Watanabe Yukihiko , Miyahara Shinichiro , Saito Jun
Published: July 2015

We proposed an improved method for evaluating the effective channel mobility (μeff), involving an appropriate definition of the threshold voltage (Vth) based on the ideal gate bias voltage – drain current (VG-ID) characteristics. Using this method, the dependence of μeff on the effective field (Eeff) could be evaluated even for SiC trench MOSFETs with large interface state density (Dit) values. The dominant influence on μeff in the low Eeff region was found to be Coulomb scattering caused by interface states at the SiC/SiO2 interfaces.
Temperature Dependent Characterization of Bipolar Injection Field-Effect-Transistors (BiFET) for Determining the Short-Circuit-Capability
Authors: Hürner Andreas , Erlbacher Tobias , Mitlehner Heinz , Bauer Anton J. , Frey Lothar
Published: July 2015

In this study, the electrical performance of Bipolar-Injection Field-Effect-Transistors (BiFET) in dependence on the junction temperature is presented for the first time. Based on these results, the short circuit capability of the BiFET is discussed. Thereby, the saturation current is estimated to be approximately 150mA at 300K and it increases by a factor of 5 by rising the temperature up to 450K as analyzed in this study. Furthermore, the reduction of the gate-voltage window of the BiFET at elevated temperatures is comparable to unipolar JFETs, and indicates a very good controllability over a wide temperature range. Finally, numerical simulations demonstrate the potential to improve the electrical performance of the BiFET drastically by adjusting the doping concentration in the control region and increasing the ambipolar lifetime in the p-doped drift layer without influencing the dependency on the junction temperature.
SIMS Analysis of Fe Impurity Concentration in a PVT-Grown 4H-SiC Bulk Crystal and Source Powders
Authors: Iwamoto Naoya , Azarov Alexander , Vines Lasse , Moe Anne Marie Mardal , Svensson Bengt Gunnar
Published: July 2015

Iron (Fe) impurity concentrations in a SiC bulk crystal and source powders used for the bulk crystal growth are analyzed by means of secondary ion mass spectrometry and the validity of the obtained data are discussed. The secondary ion signal of 56Fe is found to be affected significantly by the mass interference of 28Si2, and therefore measurements of 54Fe instead of 56Fe offer a better detection limit for the analysis. A high concentration of Fe is found at proximity of the SiC bulk crystal surface. Possible sources of the Fe contamination are discussed based on the depth profile data of Fe in both the bulk crystal and the source powders.
Characterization and Comparison of 1.2kV SiC Power Devices from Cryogenic to High Temperature
Authors: Chailloux Thibaut , Calvez Cyril , Tournier Dominique , Planson Dominique
Published: July 2015

The aim of this study consists in comparing effects of temperature on various Silicon Carbide power devices. Static and dynamic electrical characteristics have been measured for temperatures from 80K to 525K.
Dynamic Voltage Rise Control (DVRC) Applied to SiC Bipolar Junction Transistors
Authors: Bödeker Christian , Rugen Sarah , Kaminski Nando
Published: July 2015

Considering the development of faster power electronic switches, especially silicon carbide (SiC) devices, parasitic elements, such as stray inductances and capacitances, become more and more crucial. Overvoltages caused by stray inductances in combination with fast switching transients can destroy the devices at turn-off. In this paper the implementation of the DVRC circuit for silicon carbide bipolar junction transistors (BJTs) is investigated. The DUT was Fairchild`s FSICBH057A120 (VCES = 1200 V, Ron = 57 mΩ).
Investigation of the Breakdown Voltage in High Voltage 4H-SiC BJT with Respect to Oxide and Interface Charges
Authors: Salemi Arash , Elahipanah Hossein , Zetterling Carl Mikael , Östling Mikael
Published: July 2015

Ion implantation in silicon carbide (SiC) induces defects during the process. Implantation free processing can eliminate these problems. The junction termination extension (JTE) can also be formed without ion implantation in SiC bipolar junction transistor (BJT) using a well-controlled etching into the epitaxial base layer. The fixed charges at the SiC/SiO2 interface modify the effective dose of the JTEs, leakage current, and breakdown voltage. In this paper the influence of fixed charges (positive and negative) and also interface trap density at the SiC/SiO2 interface on the breakdown voltage in 4.5 kV 4H-SiC non-ion implanted BJT have been simulated. SiO2 as a surface passivation layer including interface traps and fixed charges has been considered in the analysis. Simulation result shows that the fixed charges influence the breakdown voltage significantly more than the interface traps. It also shows that the positive fixed charges reduce the breakdown voltage more than the negative fixed charges. The combination of interface traps and fixed charges must be considered when optimizing the breakdown voltage.
Device Performance and Switching Characteristics of 16 kV Ultrahigh-Voltage SiC Flip-Type n-Channel IE-IGBTs
Authors: Yonezawa Yoshiyuki , Mizushima Tomonori , Takenaka Kensuke , Fujisawa Hiroyuki , Deguchi T. , Kato Tomohisa , Harada Shinsuke , Tanaka Yasunori , Okamoto Dai , Sometani Mitsuru , Okamoto M. , Yoshikawa M. , Tsutsumi T. , Sakai Y. , Kumagai N. , Matsunaga S. , Takei M. , Arai Masayuki , Hatakeyama T. , Takao K. , Shinohe T. , Izumi T. , Hayashi T. , Nakayama K. , Asano K. , Miyajima M. , Kimura H. , Otsuki A. , Fukuda K. , Okumura H. , Kimoto T.
Published: July 2015

Ultrahigh-voltage SiC flip-type n-channel implantation and epitaxial (IE)-IGBTs were developed, and the static and dynamic performance was investigated. A large device (8 mm × 8mm) with a blocking voltage greater than 16 kV was achieved, and an on-state current of 20 A was obtained at the low on-state voltage (Von) of 4.8 V. RonAdiff was 23 mΩ·cm2 at Von = 4.8 V. In order to evaluate the switching characteristics of the IE-IGBT, ultrahigh-voltage power modules were assembled. A chopper circuit configuration was used to evaluate the switching characteristics of the IE-IGBT. Smooth turn-off waveforms were successfully obtained at VCE = 6.5 kV and ICE = 60 A in the temperature range from room temperature to 250°C.
Stacking Fault Formation via 2D Nucleation in PVT Grown 4H-SiC
Authors: Wu Fang Zhen , Wang Huan Huan , Yang Yu , Guo Jian Qiu , Raghothamachar Balaji , Dudley Michael , Mueller Stephan G. , Chung Gil Yong , Sanchez Edward , Hansen Darren , Loboda Mark J. , Zhang Li Hua , Su Dong , Kisslinger Kim , Stach Eric
Published: July 2015

Synchrotron white beam x-ray topography (SWBXT), synchrotron monochromatic beam x-ray topography (SMBXT), and high resolution transmission electron microscopy (HRTEM) studies have been carried out on stacking faults in PVT grown 4H-SiC crystal. Their fault vectors were determined by SWBXT to be 1/3<-1100>, 1/2<0001>, 1/6<-2203>, 1/12<4-403>, 1/12<-4403>. HRTEM studies reveal their similarity in stacking sequences as limited numbers of bilayers of 6H polytype structure. Simulation results of the two partial dislocations associated with the stacking faults in SMBXT images reveal the opposite sign nature of their Burgers vectors. A mechanism for stacking fault formation via 2D nucleation is postulated.
Comparison of Turn-Off Strategies for SiC Thyristors
Authors: Sundaresan Siddarth G. , Singh Ranbir
Published: July 2015

Three different turn-off strategies are presented for 6.5 kV class SiC Thyristors. A cathode current of 62 A (284 A/cm2) is successfully turned off by applying a reverse bias of ≈ 30 V to the cathode of a SiC Thyristor. The minimum turn-off time (tq) for the Thyristor using this forced commutation technique is investigated as a function of cathode current density, reverse gate current and the dV/dt of the re-applied forward (blocking) bias. The Anode Switched Thyristor (AST) turn-off mode is demonstrated at a maximum cathode voltage of 3600 V and 14.5 A (199 A/cm2) of cathode current. A cathode current of 5.5 A (75 A/cm2) is successfully turned off by the gate turn off (GTO) or hard turn-off mode at different temperatures up to 200°C. The high-level lifetime (tHL) in the thick p-layer is extracted from the hard turn-off waveforms.
High Current (1225A) Optical Triggering of 18-kV 4H-SiC Thyristor in Purely Inductive Load Circuit
Authors: Rumyantsev Sergey , Levinshtein M. , Saxena T. , Shur Michael , Cheng Lin , Palmour J.
Published: July 2015

Optical switch-on of a very high voltage (18-kV class) 4H-SiC thyristor with an amplification step (pilot thyristor) to the current Imax = 1225A has been demonstrated using a purely inductive load. The results obtained show that a further switch-on current increase can only be achieved by introducing additional amplification steps in the pilot thyristor structure.