(Invited) Beyond CMOS: Memristor and Its Application for Next Generation Storage and Computing
Authors: Liu Chenchen , Liu Fuqiang , Li Hai (Helen) 
Published: February 2020

To break the Moore’s Law, beyond CMOS that is post-silicon technologies has gained great attention in recent years, especially, facing the immensely expensive computation in terms of speed and energy in the current big data environment. Novel devices and circuits and computing architectures based on them have appeared to improve the computing efficiency, such as spin device, phase change device, and memristor. Among them, memristor is considered as one of the most promising candidate for the next generation storage and computing own to its high speed, scalability, low energy, and good comparability with CMOS technology.

Being found as the fourth missing circuit element by researchers from HP labs in 2008, memristor is a two-terminal device in a MIM (metal-insulator-metal) structure that store information by resistance states. Multiple resistance states can be obtained by controlling the outside bias amplitude and duration. It is organized in cross-point structure with ultra-high density – the memristor sits between the horizontal and vertical metal lines. Research of employing the memristor-based cross-point array in nonvolatile memory, which is called resistive random access memory (ReRAM) has gained great success as an alternative technology of flash memory. Besides that, memristor is also got enormous attention in novel computing architecture, such as in-memory computing and the brain-inspired computing. The brain-inspired computing, also well known as neuromorphic computing, refers to implementing the computation in neural systems by utilizing a specific VLSI hardware system. In traditional CMOS domain, many systems in digital, analog and mixed-signal formats have been presented and demonstrated, aiming at improving computing and data communication efficiency, i.e., high computation speed with low cost. The memristor device appears as a rebirth of this technology because of its above unique features and capability to perform like synapsed naturally.

In this paper, we will summarize our work in memory and neuromorphic computing system designs by leveraging the memristor device. It includes three major parts: 1) Memristor devices modeling and related circuits design in resistive memory (ReRAM) technology by investigating their physical mechanism, statistical analysis, and intrinsic challenges. A weighted sensing scheme which assigns different weights to the cells on different bit lines was proposed. The area and power overhead of peripheral circuitry was effectively reduced while minimizing the amplitude of sneak paths. 2) Neuromorphic computing system designs by leveraging memristor devices and algorithm scaling in neural network and machine learning algorithms based on the similarity between memristive effect and biological synaptic behavior. First, a spiking neural network (SNN) with a rate coding model was developed in algorithm level and then mapped to hardware design for supervised learning. In addition, to further speed and accuracy improvement, another neuromorphic system adopting analog input signals with different voltage amplitude and a current sensing scheme was built. Moreover, the use of a single memristor crossbar for each neural network layer was explored. 3) The application-specific optimization for further reliability improvement of the developed neuromorphic systems. In this thesis, the impact of device failure on the memristor-based neuromorphic computing systems for cognitive applications was evaluated. Then, a retraining and a remapping design in algorithm level and hardware level were developed to rescue the large accuracy loss.

Our results indicate that the ReRAM design with the weighted sensing scheme save more than 50% area and power consumption. The spiking-based design achieves more than 50% energy savings, while the average probability of failed recognition increase only 1.46% and 5.99% in the feedforward and Hopfield implementations, respectively. Our evaluation based on real device testing data shows that our rescuing design can recover 99.3% of accuracy for MNIST digit recognition when 20% random defects are considered. Our fabricated neuro-chips with CMOS technology in GlobalFoundries 130nm has more than 90% accuracy for MNIST dataset classification.