(Invited) Wet-Chemical Etching of III-V Semiconductors: Towards Atomic-Layer-Scale Processing
Authors: van Dorp Dennis H. , Arnauts Sophia , Kelly John , Holsteyns Frank 
Published: February 2020

Recent developments in device technology resulted in an upsurge of interest in III-V compound semiconductors. These include improved fabrication techniques for flexible electronic devices,[1,2] and epitaxial integration of various III-V channel materials on Si-based platform wafers enabling the development of highly scaled CMOS transistors [3–5] and nanophotonic devices [6]. While fabrication strategies for traditional III-V optoelectronic devices such as light-emitting diodes, lasers and solar cells are well established, the very small dimensions of these new nanodevices pose new problems. In such applications wet-chemical etching remains an essential step. The ever decreasing size of III-V devices requires ultimately atomic-layer-scale control of surfaces in terms of etching selectivity, stoichiometry and morphology.[7,8] Considerable expertise and literature is currently available on III-V semiconductor etching[9,10]. However, much of the reported work is empirical, etch rates are high, and mechanistic insight into (electro)chemical processes occurring at the semiconductor-solution interface is often lacking.

In this work an overview will be given of wet-chemical approaches for nanoscale and atomic-layer-scale etching of Ga(In)As and InP. Two types of etching systems will be discussed. The first is based on the use of acidic H2O2 solution. Inductively coupled plasma mass spectrometry (ICP-MS) measurements, used to determine etching kinetics, showed that under similar conditions the etch rate of Ga(In)As in H2SO4/H2O2 solution is more than an order of magnitude higher than that of InP. Another striking observation is the influence of the acid, H2SO4 and HCl, on etching kinetics. An increase in HCl concentration leads to an increase in the etch rate of InP while the dissolution rate of Ga(In)As is markedly lowered for the active etching range. Previous work suggested that the surface oxide or hydroxide may be important.[11,12] We have used X-ray photoemission spectroscopy (XPS) and time-of-flight elastic recoil detection analysis (ToF-ERDA) to obtain information about (hydr)oxide formation on the etched surfaces. ToF-ERDA measurements also allowed us the detect surface chlorine in the case of HCl-based etchants. The results indicate that, while the initial step (the breaking of the III-V surface bond) is the same for both semiconductors, the ease with which the resulting group V hydroxide entity at the surface can be deprotonated determines whether the etch rate will be high (Ga(In)As) or low (InP). The mechanism can also help to explain the contrasting role of HCl in the dissolution of the two semiconductors.

An alternative digital type of etching approach for InGaAs and InAs involves self-limiting surface oxidation in O3/H2O followed by an oxide removal step in HCl solution[12]. ICP-MS quantification of the dissolved surface oxide species indicates that a high stoichiometry of etching is obtained and that the number of equivalent oxidized atomic layers can be controlled by adjusting the dissolved O3 concentration. For >4 cycles some surface roughening is observed, most likely due to due to the high solubility of As oxides in water. An important advantage of the 2-step approach is that defect selective etching can be effectively suppressed.

Examples of applications of the two etching systems will be highlighted.

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