bluuebunny/crossref_metadata_2025 huggingface dataset:
The Electrical Properties of BCZT Lead-Free Ceramics Induced by BaZrO3 Seeds
Authors: Parjansri Piewpan , Kamnoy Manlika , Intatha Uraiwan , Eitssayeam Sukum , Tunkasiri Tawee
Published: May 2016

Ba0.85Ca0.15Zr0.1Ti0.9O3 (BCZT) ceramics were produced by using the seed-induced method. The nano-particle BZ (BaZrO3) seeds were mixed with BaCO3, CaCO3, ZrO2 and TiO2 powder for preparing by the mixed oxide method. The XRD results indicated that all powder and sintered ceramic samples showed a pure perovskite phase with coexistence between rhombohedral and tetragonal phase. As the BZ seed content increased, the density of ceramics tended to decrease from 5.61 g/cm3 to 5.37 g/cm3. The average grain size of the ceramics was in the range of 12.15 -13.50 mm. The dielectric loss (tand) was less than 0.03 for all samples at room temperature (at 1 kHz). Other electrical properties, including dielectric constant (εr), remnant polarization (Pr), and piezoelectric charge coefficient (d33) values decreased with increasing BZ seed doping with relates to the decreasing grain size and density of BCZT ceramics. However, the values of coercive field (Ec) decreased and piezoelectric voltage coefficient (g33) increased with BZ seed doping.
Utilization of Expanded Perlite as a Source of Silica for Synthesizing Wollastonite by Solid State Reaction
Authors: Chantaramee Napat , Kaewpoomee Pornpimol , Puntharod Ratchadaporn
Published: May 2016

Naturally occurring volcanic glass in the form of the expanded perlite consist of 72.59wt% silica was used as a starting material together with the calcined eggshell in order to explore the wollastonite formation via solid state reaction. The molar mixing ratios of CaO:SiO2 were carried out from 1:0.8 to 1:1.4, calcined in the range of 600 - 1100°C for 2 - 5 hours. The XRD results confirm the formation of wollastonite (CaSiO3) started at 800°C, and increasing of calcination temperature favoured the formation of gelehnite (Ca2Al2SiO7) associated with wollastonite. The morphology characterized by SEM clearly show tiny needle-like shape of primary wollastonite on the surface of agglomerate particles. The CaO:SiO2 ratio of 1:1.4 which calcined at 1100 °C for 2-5 hours was found to be the most appropriate molar ratio in the case of using the calcined eggshell and expanded perlite as starting materials.
Environmental Friendly Ceramic Building Materials
Authors: Sugiyama Toyohiko , Kusumoto Keiji , Ohashi Masayoshi , Kamiya Akinori
Published: May 2016

The global warming is one of the most serious problems. The decrease of CO2 emissions in our daily life is an important subject today. Recently, an application of water retentive materials as a paving material has attracted a great deal of attention in Japan. This material is effective for reducing heat island phenomenon, which is also a recent problem in many cities in Japan. Water retained in the material during rainfall evaporates when heated by sunshine. The latent heat absorbed by evaporating water works to cool the surroundings. The water retentive ceramic products are expected to be useful for building materials as well as pavements. Several performances are required on the water retentive ceramics when it is used as building materials. Its cost and quality are the important factors. Porous ceramic materials formed by pressing without firing is one of ideal low cost and eco-friendly candidates. The porous ceramics is also expected to be produced from recycled ceramic materials. By optimizing its composition and forming method, a water retentive material with high performance was developed. The trial product had the properties as follows; fracture toughness: 1300N, bending strength: 175N/cm, water absorption: larger than 30%, and precision in size (length): +-0.5mm for 150mm. The product showed also enough frost resistance. In this paper, the fundamental properties of the porous ceramics prepared without firing are discussed with referring to the results of the field experiments.Another subject recently studied by several tile manufactures in Japan is the glazed tile with high solar reflectance. The exterior walls covered with such a high solar reflectance tile keeps the surface temperature of the wall lower under the strong sunshine of summer. It is effective against heat-island phenomenon. In this paper, the outline of the research results on visible and infrared reflectance of many kinds of glazes is also discussed.
High Performance Ag/AgBr/TiO2 Photocatalyst-Coated Silica Beads
Authors: Panichpakdee Jate , Negishi Nobuaki , Larpkiattaworn Siriporn
Published: May 2016

A series of three-component photocatalyst consisting of Ag, AgBr, and TiO2 were synthesized and successfully coated on PSB-01 beads (TiO2-coated silica beads). Different Ag to Ti molar ratios of 0.07, 0.10, and 0.20 in ethanol were prepared and coated on PSB-01 beads by sol-gel method. The morphologies and elemental compositions of these photocatalysts were characterized by SEM, EDS, and XRD, respectively. The performance of the photocatalyst coated on PSB-01 beads was evaluated in aspects of efficiency and stability. As for the photocatalytic efficiency, formic acid was used as the chemical model in this study. Results showed that the deposition of Ag/AgBr/TiO2 at Ag/Ti molar ratio of 0.07 on PSB-01 beads had the best performance in terms of formic acid degradation when compared to other ratios of Ag/AgBr/TiO2-coated PSB-01, Ag-coated PSB-01, and PSB-01 beads. In addition, for the study of stability, the release of silver from a series of Ag/AgBr/TiO2-coated PSB-01 was also evaluated.
The Effect of SiO2, TiO2, and B2O3 on the Crystallization of Glass-Ceramics Glaze Properties
Authors: Punsukumtana Lada , Rugthaicharoencheep Sansanee , Naknikham Usuma , Suphanam Netnapha
Published: May 2016

The feasibility of developing glass-ceramic glaze in the system KNaO-CaO-MgO-ZnO with a variation in the composition of SiO2, TiO2, and B2O3 was studied. The SiO2, TiO2, and B2O3 were varied in the amount of 2.25-1.50, 0.001-0.10, and 0-0.1 molar equivalents respectively. The samples were one fired at 1180°C or double fired by reheat at the crystallization temperature for 10 minutes. The gloss, sintering behavior, phase, microstucture, and hardness, and were examined by glossmeter, side-view hot stage microscope, X-ray diffraction, SEM, and Vickers hardness respectively. The results showed the importance effect of SiO2, TiO2, and B2O3 on the glaze crystallization ability and its properties. At the fix value of Al2O3 at 0.24 molar equivalents and with the 0.001-0.10 molar equivalents of TiO2, lower the SiO2 content to 1.50 molar equivalents increased the glaze crystallization potential. An increase in the B2O3 to 0.1 molar equivalents suppressed the potential of glaze crystallization. The phases of samples were amorphous or composed of silicon dioxide and diopside as the main phases depending on the glaze composition and the firing history. In this study, the glaze appearances transparent to opaque and varied from gloss to matte with the specular gloss values between 23-100 GU. All samples appeared to have high Vickers hardness value in the range of 553-644. The crystallization decreased the gloss but increased the hardness value for the 2.25 molar equivalents SiO2 glaze. Finally, a composition with high hardness and high gloss was identified and its properties was also presented. These results suggested the limitation and the potential for applying this glass-ceramic glaze system to industry applications.
Effects of Dissolving Agents on Particle Size Reduction of Titanium Dioxide Synthesized by Solution Combustion Technique
Authors: Jongprateep Oratai , Puranasamriddhi Rachata
Published: May 2016

High photocatalytic activity of nanoparticulate titanium dioxide has attracted worldwide attention. Synthesis techniques of the nanoparticles, however, often require high energy supply or costly initial reagents. Solution combustion technique is an energy-effective technique capable of synthesizing nanosized titanium powders. This research aimed at utilizing a less expensive initial reagent in synthesis of nanoparticulate titanium dioxide by the solution combustion technique. The research also examined effects of dissolving agents on chemical composition and particle sizes of the synthesized powders. A low-cost initial reagent, titanium dioxide with average particle size of 154 nanometers, was dissolved in sulfuric acid or dispersed in nitric acid prior to the combustion. Experimental results revealed that the pure anatase phase titanium dioxide was successfully obtained in powders prepared from both sulfuric acid and nitric acid. The average particle size of the powder prepared from sulfuric acid was 77 nanometers, while that of the powder prepared from nitric acid was 117 nanometers. The difference in particle sizes was attributed to solubility of the initial reagent in the acid. Complete solution of initial reagent in sulfuric acid was the main factor attributed to finer particle size.
Effect of Frit Content on the Metal Marking and Scratching Resistance of Celadon Glaze
Authors: Pee Jae Hwan , Lee Na Ri , Kim Geun Hee , Kim Yoo Jin , Oh Yoon Suk , Kim Hyung Tae , Kim Gyu Seoul
Published: May 2016

Metal marking and scratching are related to surface roughness, hardness and toughness of glaze. To improve the glaze properties, frits were added in the traditional celadon glaze and reducing firing atmosphere was controlled. Surface roughness of celadon glaze was decreased with increasing the reducing agent content (LPG flowing rate) and increasing the frits content. Though hardness of glaze without frit was increased with increasing the reducing agent content, hardness of glaze with frit was not changed extremely with increasing the reducing agent content. To evaluate the metal marking and scratching resistance, wear resistance test was used with stainless steel ball. After wear test, many metal marks and wide scratching trace were observed in the traditional celadon glaze. However, a few metal mark and scratch were observed in the celadon glaze with frit. The friction coefficient of glaze in the wear test was strongly depended on the frit contents.
The Experimental of Low Temperature Color Slip for Decorative on Earthenware Body
Authors: Mulinta Soravich
Published: May 2016

The purpose of the study was to investigate the effects of dolomite body, frit and potassium feldspar on the properties of color slip for decorative method of color slip on earthen ware production. The characterization of raw material was analyzed by X-ray fluorescence (XRF). The experiment started with triaxial blend of dolomite body, frit and potassium feldspar in the defined ratio and then to painting of color slips on earthenware production. After that, firing specimens at 950 °C in oxidation atmosphere. Finally, the specimens were tested microstructure and physical properties. The results showed that the ratio of 50% dolomite body, 40% frit and 10% potassium feldspar were optimum properties for decorative on earthenware body. In color slip consisting of blue color added Cobalt oxide 1% ,Green colors added chromic oxide 10% , Gray color added manganese oxide 10% ,yellow color added stain 2225 10% and hazel color added ferric oxide 2 wt %.
Effect of Particle Sizes of BaTiO3 (BT) Seed on Microstructure and Electrical Properties of (Ba0.85Ca0.15)(Zr0.1Ti0.9)O3
Authors: Kamnoy Manlika , Parjansri Piewpan , Intatha Uraiwan , Eitssayeam Sukum , Tunkasiri Tawee
Published: May 2016

The study was conducted to find out the effect of particle sizes of BaTiO3 (BT) seed on the microstructure and electrical properties of (Ba0.85Ca0.15)(Zr0.1Ti0.9)O3 (BCZT) ceramics. The BT seeds were prepared by the molten salt method. Results indicated that the BT seed powder showed a single pure perovskite phase when using a low temperature of ~750°C. The particle sizes of BT seeds increased from ~381 to ~600 nm with increasing heating temperatures from 750 to 900°C. After that, the different BT seeds were mixed with BaCO3, CaCo3, ZrO2 and TiO3 via the solid state reaction method. The mixed powder was calcined and sintered at 1200 °C for 2 h and 1450 °C for 4 h, respectively. The microstructure, phase formation and electrical properties were investigated. All ceramic samples showed a pure perovskite phase. The density and average grain size values of ceramics were in the range of 5.36-5.47 g/cm3 and 9.83-11.86 μm, respectively. The highest values of dielectric constant (εr), piezoelectric constant (d33) were 3393 and 452 pC/N, respectively which obtained at the sample of BT-seed size 372 nm doped.
Status and Standards in ISO/TC206 'Fine Ceramics'
Authors: Sakaguchi Shuji
Published: May 2016

ISO/TC206 'Fine ceramics' is one of a technical committee (TC) in the International Organization for Standardization (ISO), established in 1992. The first plenary meeting for this TC was held in 1994, and the latest meeting was held in August 2015, in Jeju, Republic of Korea. The scope of this TC covers very wide field concerning the ceramic materials for industrial applications, in forms of powders, monoliths, coatings and composites, and in functions of mechanical, thermal, chemical, electrical, magnetic, optical and their combinations. This TC consists of 18 participating member (P-member) countries and 13 observing member (O-member) countries. We already have 81 published standards from this TC. About 30 new work items are under discussion, about 15 items are waiting for starting the discussion, and about 10 items are in the process for revision of the published standards. In this TC, we have 12 working groups. More than twenty years have passed since starting this TC, generally speaking, the categories of the discussed items tends to shift, from some testing methods for fundamental properties (strength, density, thermal properties etc.), to some properties for specified applications, such as ceramic bearing materials, photocatalytic materials and electrical applications.
The Effect of Alumina (Al2O3) on the Characteristics of Sintered Mullite-Cordierite Ceramics Synthesized with Kaolin from Naratiwas of Thailand
Authors: Pongphot Santi , Thiansem Sakdiphon
Published: May 2016

Mullite-cordierite ceramics was prepared by the three composition of talc, kaolin (kaolin from Naratiwas in Thailand) (NT) and alumina. The different amounts of alumina (5, 10, 15 and 20 wt%) were added to produce various mullite-cordierite alumina mixtures which are denoted as NA, NB, NC and ND, respectively. The mixtures were pressed into rectangular shapes by hydraulic press with the pressure of 150 kg/cm2 then sintered at temperature of 1300 °C and 1350 °C for 2 hours. The morphology of the synthesized mullite-cordierite samples were characterized by x-ray diffraction spectroscopy (XRD), and physical-mechanical properties were investigated. Mullite-cordierite was successfully synthesized. The XRD result was represented phases of mullite and cordierite. The NA samples sintered at temperature of 1300 °C indicated the best physical-mechanical properties including bulk density (2.23 g/cm3), flexural strength (44.4 MPa) and thermal expansion coefficients (5.00x10-6). The other NA samples sintered at temperature of 1350 °C exhibited the bulk density, flexural strength and thermal expansion coefficients are 2.21 g/cm3, 47.8 MPa and 4.99 x10-6, respectively. The thermal expansion coefficient of the NT sintered samples have been plotted the length change relative to measuring temperature ranging of 30-1200 °C. The suitable condition of the synthesized mullite-cordierite ceramics is finally obtained the NA samples with 5 percent weight of alumina composition sintered at the temperature of 1350 °C.
Rapid Biomimetic Coating of Calcium Phosphate on Titanium: Effect of Soaking Time, Temperature and Solution Refreshing
Authors: Thammarakcharoen Faungchat , Suwanprateeb Jintamai
Published: May 2016

The influence of employing three different solution temperatures (23, 37 and 50 °C), three soaking times (2, 4 and 6 h) and two solution refreshing methods (Refreshed or Non-refreshed) in rapid biomimetic coating process on phase composition, functional groups, coating content and microstructure of the resulted coating was studied. Increasing soaking times and temperature increased the coating content in all cases regardless of the use of refreshed or non-refreshed accelerated calcium phosphate solution. The use of non-refreshed solution resulted in the lower rate of coating than that of refreshed solution at all coating temperatures. However, all coatings similarly comprised octacalcium phosphate and hydroxyapatite as main phases and the microstructure consisted of sharp and interconnected plate-like crystals vertically grown on the surface of titanium. However, two types of crystal structure were produced. Low solution temperature resulted in isolated spheroids while uniform and distributed crystal structure was produced by using high solution temperature. This could be related to the difference in nucleation and precipitation rate formed in rapid biomimetic coating process as a result of the interplay between temperature and ionic strength of the solutions.
Powder Injection Molding of Mullite: The Study of Mechanical and Physical Properties of the Sintered Products Using Statistical Methods
Authors: Chakartnarodom Parinya , Kongkajun Nuntaporn , Chuankrerkkul Nutthita
Published: May 2016

The aim of this work is to propose the application of statistical methods (linear regression and statistical hypothesis test) to analyze the effect of parameters used in powder injection molding including sintering temperature and the feedstock composition on the flexural strength, the porosity and the density of the sintered specimens of mullite prepared by powder injection molding (PIM) and using the composite binder consisting of 80 wt% polyethylene glycol (PEG) and 20 wt% polyvinyl butyral (PVB) for molding. The lab-scale plunger type PIM machine was used to prepare the specimens. The feedstock compositions were 50 to 54 vol% mullite, and the sintering temperatures were 1300 and 1400 °C. At level of significance 0.05 for statistical analysis, feedstock composition did not affect flexural strength, porosity, and density of the sintered specimens. For sintering temperature, the specimens sintered at 1400 °C have the greater density and the lower porosity. However, the flexural strength of the specimens sintered at 1300 °C and 1400 °C are statistically similar.
Flip-chip Bonded SiC Power Devices on a Low Temperature Co-fired Ceramic (LTCC) Substrate for Next Generation Power Modules
Authors: Seal Sayan , Glover Michael D. , Mantooth H. Alan
Published: May 2016

This paper explores the design and performance benefits of an LTCC-based power module using SiC power devices. The goal of the design is to achieve high power density with an improved level of reliability as compared to the state-of-the-art, especially at elevated operating temperatures. This will enable a more complete leveraging of the benefits of SiC semiconductor technology. The reliability of existing power modules under high thermo-mechanical stress is adversely affected by the presence of wire bonds and by delamination at the die attachment interface between the die and substrate. As power devices are driven at higher frequencies, wire bonds will inhibit performance by introducing ringing and large overshoots due to the parasitic inductances they introduce in the critical switching loops in the circuit. A flip-chip bonding process for bonding the power devices has been investigated in this paper as an alternative to wire-bonding. It was found that flip-chip interconnects not only improved the switching characteristics of the device, but also reduced thermo-mechanical stresses on the bonding interface.
Degradation Analysis of TO-247 Package SiC-MOSFETs Subjected to High Temperature Storage and Heavy Thermal Cycle Test
Authors: Araki Sawa , Suzuki Tatsuhiro , Yamashita Mari , Tanimoto Satoshi , Ono Toshiaki , Yakumaru Hisashi , Sawada Hiroki
Published: May 2016

Three types of TO-247 package SiC-MOSFETs, denoted as A, B and C and fabricated by different manufacturers, were subjected to thermal cycle tests (TCT) ranging from −40°C to 200°C and a high temperature storage test (HTST) at 200°C in air. Their reliability was continuously investigated based on electrical characterizations, X-ray inspection and scanning acoustic tomography (SAT). Intermittent SAT observation revealed that, regardless of the device type, the epoxy resin (encapsulant) first peeled on the Cu die pad around the outer edge of the SiC power die and then peeling rapidly spread outward as the number of thermal cycles or storage time increased. The number of cycles or storage time differed depending on the device type (manufacturer). Subsequently, further peeling occurred on the SiC die and the devices failed or showed instability. The deterioration pattern tended to differ somewhat between the TCT and HTST. Uplift of the die attachment was observed for device A after thermal storage for 1000 hours.
Internal Structure Refinement of Porous Sintered Silver via Electromigration
Authors: Mansourian Ali , Paknejad Seyed Amir , Wen Qiannan , Khtatba Khalid , Zayats Anatoly V. , Mannan Samjid H.
Published: May 2016

Atoms can move under high stress conditions such as temperature, mechanical pressure or electric current. Electromigration provides a driving force to move the atoms in metals conducting current usually resulting in the accumulation of atoms and void formation in anode and cathode respectively. The electromigration effect is normally considered a serious problem for electronic circuits but the recent works1–7 show that it can be used constructively for controlled fabrication of nanostructures2–4.We demonstrate that electromigration can be utilized to refine the porous structure of a sintered silver stripe leading to transformation of the internal pore and grain structure. The results show that pore shape, size and distribution are significantly changed after electromigration. Similarly, we have used the electromigration effect to mass produce nanorods under current densities of the order of 2.4 ×10+8 A/m2. Nanorods were formed across the whole stripe contrasting with studies on non-porous substrates which show nanorod production at the anode only. The results show the internal pore structure can be transformed and refined by electromigration. The results also suggest that by controlling current densities in a porous substrate, complex patterns of porous structures and high-quality single crystal nanorods can be formed in-situ with significant advantages over competing methods of nanorod formation for sensor applications.
HOT-300 – A Multidisciplinary Technology Approach Targeting Microelectronic Systems at 300 °C Operating Temperature
Authors: Vogt Holger , Altmann Frank , Braun Sebastian , Celik Yusuf , Dietrich Lothar , Dietz Dorothee , van Dijk Marius , Dreiner Stefan , Doering Ralf , Gabler Felix , Goehlich Andreas , Hutter Matthias , Ihle Martin , Kappert Holger , Kordas Norbert , Kokozinski Rainer , Naumann Falk , Nowak Torsten , Oppermann Hermann , Partsch Uwe , Petzold Matthias , Roscher Frank , Rzepka Sven , Schubert Ralph , Weber Constanze , Wiemer Maik , Wittler Olaf , Ziesche Steffen
Published: May 2016

Several applications in the fields of industrial sensors and power electronics are creating a demand for high operating temperature of 300 °C or even higher. Due to the increased temperature range new potential defect risks and material interactions have to be considered. As a consequence, innovation in semiconductor, devices and packaging technologies has to be accompanied by dedicated research of the reliability properties. Therefore various investigations on realizing high temperature capable electronic systems have shown that a multidisciplinary approach is necessary to achieve highly reliable solutions. In the course of the multi-institute Fraunhofer internal research program HOT-300 several aspects of microelectronic systems running up to 300 °C have been investigated like SOI-CMOS technology and circuits, silicon capacitor devices, a capacitive micromachined ultrasonic transducer (CMUT), ceramic substrates and different packaging and assembly techniques. A ceramic molded package has been developed. Die attach on different leadframe alloys were investigated using silver sintering and transient liquid phase bonding (TLPB). Copper and gold wire bonding was studied and used to connect the chips with the package terminals. Investigations in flip chip technology were performed using Au/Sn and Cu/Sn solder bumps for transient liquid phase bonding. High operating temperatures result in new temperature driven mechanisms of degradation and material interactions. It is quite possible that the thermomechanical reliability is a limiting factor for the technology to be developed. Therefore investigations on material diagnostics, reliability testing and modeling have been included in the project, complementing the technology developments.
The Design, Simulation, and Performance Characteristics of High Temperature Brushed and Brushless DC Motors, and Their Electronic Controllers
Authors: Snyder Harold L.
Published: May 2016

High temperature brushed and brushless direct current (DC) motors convert electrical energy to mechanical in order to actuate physical systems. This paper is an exploration of these systems from simple designs, which can actuate systems without the use of an electronic controller, to speed or power feedback controlled motors, and finally, to more complex microprocessor controlled systems. The design will review the advantages, disadvantages, specifications, and choice of these motors and their controllers. The simulation will use both Matlab and Spice models to predict the performance characteristics and system stability. And the performance characterization will evaluate measurements of the motors and their electronic control circuits in operation over wide temperature ranges.
Component Attachment with Pressureless Sintering for 300°C Applications
Authors: Yu Fang , Cui Jinzi , Zhou Zhangming , Johnson R. Wayne , Hamilton Michael C.
Published: May 2016

With an increased demand for high power and high temperature electronics, Ag sintering paste has been considered a promising Pb-free die attach material candidate for these applications. A large amount of research has been performed investigating pressure and pressureless Ag sintering for die attach.

In this work, passive component (chip resistor) attachment with Ag sintering was explored. Due to termination geometry differences between resistors and die, different processing procedures and parameters were developed.

For PtAu terminated resistors, the mean shear force of as-built samples on thick film Ag metallized substrates was 90 N, but dropped to 18.6 N after 1500 hours at 300°C. Formation of a dense Ag layer near the PtAu resistor termination and a void region near the thick film metallization was observed in cross-sections after 1000 hours at 300°C.

For PdAg terminated resistors with a plated Ni/Au finish, the initial shear force results were low due to Ag diffusion along Au metallization surface. For PdAg terminated resistors with Ag thick film substrates, the initial shear force was approximately 60 N and remained in the range of 50–70 N during aging at 300°C for 1500 hours. A new thick film metallization (Au+Ag) was developed to enable the use of thick film Au interconnect metallization.
A 200C capable embedded EEPROM
Authors: Allum Dean , Drajsajtl Tomas , Plachejda Radomir , Seleznev Stanislav , Wheelus Richard
Published: May 2016

An embedded logic EEPROM is presented that demonstrates full functionality at 200C. Several stress tests were performed to verify required reliability and endurance in the given temperature lifetime profile. Endurance has been demonstrated to greater than 110 thousand erase/write cycles (2000 cycles at 200C). This EEPROM is designed using a 0.18um logic process with a single 70 Angstrom gate oxide. This 0.18um process was designed to combine digital logic with high voltage (45V and 70V) BCD. A special test chip was designed containing 4 arrays of 512×39 bits. Test chips from a wafer lot that purposely skewed threshold voltage implants, poly CD, and gate oxide to achieve 6 sigma corners were probed at 200C and assembled in ceramic packages. The parts were soldered onto burn-in boards to avoid issues with sockets at high temperature. Six burn-in boards of 60 parts each were placed in a 200C oven for 1008 hours HTOL test and monitored while in a constant read mode. The paper describes the challenges in both design and stress that were overcome to achieve this 200C performance.
High-Temperature Operation of Silicon Carbide CMOS Circuits for Venus Surface Application
Authors: Francis A. Matthew , Holmes Jim , Chiolino Nick , Barlow Matthew , Abbasi Affan , Mantooth H. Alan
Published: May 2016

In the last decade, significant effort has been expended towards the development of reliable, high-temperature integrated circuits. Designs based on a variety of active semiconductor devices including junction field effect transistors and metal-oxide-semiconductor field effect transistors have been pursued and demonstrated.

More recently1,2, advances in low-power complementary MOS devices have enabled the development of highly-integrated digital, analog and mixed-signal integrated circuits. The results of elevated temperature testing (as high as 500°C) for extended periods (up to 100 hours) of several building block circuits will be presented. These designs, created using the Raytheon UK's HiTSiC® CMOS process, present the densest, lowest-power integrated circuit technology capable of operating at these extreme temperatures for any period of time.

Based on these results, Venus nominal temperature (470°C) SPICE m°dels and gate-level timing models were created using parasitic extracted simulations. The complete CMOS digital gate library is suitable for logic synthesis and lays the foundation for complex integrated circuits, such as a microcontroller in SiC-CMOS, with an eye for Venus as well as terrestrial applications.
Low Power Silicon Carbide RS-485 Transceiver
Authors: Benavides M. R. , Castillo A. N. , Rahman A. , Barlow M. , Abreu D. , Rowlett C. , Mantooth H. A. , Francis A. M. , Holmes J. A.
Published: May 2016

This paper describes the first RS-485 transceiver for high temperature applications designed in SiC-CMOS. The transceiver was designed and developed in a 1.2μm CMOS HiTSiC® process from Raytheon UK. It has been tested at a voltage supply of 15 V from temperatures of 25°C to 400°C. At 320°C, the rise and fall times are 40 ns (for both), and the propagation delay from driver to output high and to output low is 150 ns and 50 ns respectively. The transceiver has been demonstrated to operate over 700 m of Cat5 cable. A high temperature data acquisition and transmission system has potential applications such as deep earth drilling, remote connection to high temperature locations, and high temperature data acquisition.
A High Temperature Passive GaN-HEMT Mixer for Downhole Communications
Authors: Salem Jebreel M. , Ha Dong Sam
Published: May 2016

Declining reserves of easily accessible natural resources have motivated the oil and gas industry to drill deeper. Temperatures in these hostile wells can exceed 210 °C. Cooling and conventional heat extraction techniques are impractical in such a harsh environment. Reliable electronic designs that can sustain high temperature become necessary. This paper presents a high temperature passive RF mixer that is suited for downhole communications. The proposed mixer is designed to upconvert or downconvert the incoming signal with a low conversion loss (CL) and high linearity and reliable operation at temperature up to 250 °C. Gallium Nitride (GaN) is a wide band gap technology that can provide a reliable operation at the elevated ambient temperature, and the proposed mixer adopts a commercial GaN high electron mobility transistor (HEMT) technology. Measurement results indicate that the proposed mixer achieves CL of 6.5 dB at LO power of 2.5 dBm for the downconversion from 230–253 MHz to 97.5 MHz at 250 °C and input P1dB compression point lies at 5 dBm. The power dissipation of the mixer is virtually zero.
A 225C Geothermal Logging Tool
Authors: Soares Marshall , Normann Randy , Ohme Bruce
Published: May 2016

Geothermal logging tools are difficult to develop due to sustained high temperature operation. Recent commercial component offerings are significantly altering the high temperature geothermal tool problem. This paper implements a new baseline geothermal tool circuit working with five 225C, SOI components. An example tool including up to four spinners (fluid flow measurement), four analog inputs (for pressure, temperature or other sensors), EEPROM storage (program and data), FSK logic (wireline data transmission), and a high-speed UART (tool communication). Field updates of code and calibration constants are supported. Further, this paper demonstrates how the tool electronics can be expanded for more complex applications such as a geothermal well logging camera.
Aerospace Performances of IPDiA −250°C up to 250°C Grade Silicon Capacitors
Authors: Lengignon Laurent , Leruez Sebastien
Published: May 2016

This paper covers technological results achieved with silicon capacitors for Aerospace applications, including stability, reliability and frequency data at high temperatures, as well as thermal stress, vibration & shock tests and radiations stress, according to ESA TRP reference (n° T723-325QT).
Tantalum Capacitor Technology Options for High Temperature and Harsh Environment Applications
Authors: Reynolds Chris
Published: May 2016

As new temperature critical applications continue to emerge, the need for components capable of enduring temperatures up to and exceeding 200°C is increasing. Advanced down-hole electronics, underhood automotive and aerospace systems rely on components delivering optimal performance while subject to extreme environmental conditions.

This paper will discuss the design advances in tantalum technology that have given rise to innovative devices that provide the enabling technology for a new generation of applications.

Traditionally, hermetically sealed “wet” axial tantalum capacitors (utilizing a non-solid electrolyte that promotes self-healing and long lifetime), have been used for both high bulk capacitance (to 5,600uF) and high voltage applications (to 125VDC). In recent years, this technology has been developed to meet the 200°C operational requirements of harsher environment industrial applications.

For lower operating voltages (6v – 25v), SMD packages are preferred, and for several years, 200°C rated high temperature solid tantalum chip devices have been the preferred technology over “wet” tantalum for capacitances to 220uF, being smaller size, lower cost and having the combination of lower ESR and higher frequency response.

More recently, hermetic SMD packaging has been developed for SMD solid tantalum capacitors. The hermetic seal enables the internal element to be operated in an inert gas environment, while offering superior resistance to moisture ingress. These two factors enable operation to 230°C, with higher capacitance (up to 330uF) and voltage (up to 63vDC) ranges.

Both molded and hermetic high temperature SMD solid tantalum capacitors have been developed to be compatible with high temperature pcb or hybrid circuit assembly processes, with a range of termination finishes compatible with HMP solder, epoxy or wire bonding. Their design also harsh mechanical environment shock & vibration.

This paper will discuss the evolution in materials, design and testing for each of these technologies, along with the considerations taken into account to give maximum compatibility with emerging requirements in high temperature and harsh environment applications, with emphasis on down-hole oil exploration, aerospace and military systems and underhood automotive electronics.
AVX High Temperature Products for Surface Mount and SMPS Applications
Authors: Dupre Dave , German Patrick
Published: May 2016

AVX produces a myriad of surface mount ceramic products, as well as stacked SMPS capacitors. AVX no offers many high temperature solutions for applications involving temperature requirements above what basic X7R and C0G can offer. This paper will discuss the advantages of base metal electrode devices, as well as AVX's methods of producing high temperature Nickel NP0 and VHT dielectric ceramics. This paper will also discuss high temperature SMPS capacitors, including custom solutions for MWD and LWD applications as well as AVX's SMX style products.
System On Chip (SOC) ASIC chipset for Smart Actuators in Distributed Propulsion Systems
Authors: Tulpule Bhal , Behbahani Alireza R.
Published: May 2016

This paper describes the results of the risk reduction testing task recently completed by Embedded Systems LLC under the Air Force SBIR contract {5} titled “Improved Full Authority Digital Engine Control (FADEC) System”. The objective of this program has been to develop a hierarchical, distributed architecture for future propulsion FADEC and aerospace control systems with flexible, scalable and reconfigurable Smart Nodes (SN) built with high temperature capable devices. A key part of this program is the design, development and validation of the System On Chip (SOC) chipset in high temperature (225 Deg. C) SOI (Silicon On Insulator) technology ASIC (Application Specific Integrated Circuit) devices. The SOC chipset designed by Embedded Systems LLC provides the scalability and reconfigurability that enables the Smart Node to interfaces with most sensors and actuators found in FADEC and other aircraft control systems. The analog portion of this 2-chip SOC chipset fabricated by Honeywell using their SOI process is working properly. The digital portion of the SOC chipset, currently implemented in a commercial temperature FPGA (Field Programmable Gate Array), contains important computational functions needed for reconfiguring the SOC and performing complex control functions, such as real time control of an actuator, The risk reduction task was therefore focused on verification and validation of these key functions in a real environment before converting the design into an ASIC. The recent successful demonstration of the real time actuator control capability has minimized the risks and cleared the way for the digital ASIC implementation. The complete high temperature SOC chipset is expected to be available in late 2016.
Electrical Performance of a High Temperature 32-I/O HTCC Alumina Package
Authors: Chen Liang-Yu , Neudeck Philip G. , Spry David J. , Beheim Glenn M. , Hunter Gary W.
Published: May 2016

A high temperature co-fired ceramic (HTCC) alumina material was previously electrically tested at temperatures up to 550 °C, and demonstrated improved dielectric performance at high temperatures compared with the 96% alumina substrate that we used before, suggesting its potential use for high temperature packaging applications. This paper introduces a prototype 32-I/O (input/output) HTCC alumina package with platinum conductor for 500 °C low-power silicon carbide (SiC) integrated circuits. The design and electrical performance of this package including parasitic capacitance and parallel conductance of neighboring I/Os from 100 Hz to 1 MHz in a temperature range from room temperature to 550 °C are discussed in detail. The parasitic capacitance and parallel conductance of this package in the entire frequency and temperature ranges measured does not exceed 1.5 pF and 0.05 μS, respectively. SiC integrated circuits using this package and compatible printed circuit board have been successfully tested at 500 °C for over 3736 hours continuously, and at 700 °C for over 140 hours. Some test examples of SiC integrated circuits with this packaging system are presented. This package is the key to prolonged T ≥ 500 °C operational testing of the new generation of SiC high temperature integrated circuits and other devices currently under development at NASA Glenn Research Center.
Developments for Copper-Graphite Composite Thermal Cores for PCBs for High-Reliability and High-Temperature RF Systems
Authors: Saums David L. , Hay Robert A.
Published: May 2016

System designs that have only conduction cooling available, that must operate in harsh or challenging environments, present significant challenges to the system thermal engineer. A second thermal design challenge is continued miniaturization of semiconductor devices and increased functionality per square centimeter of semiconductor die, resulting in continued increases in device heat flux.

Elimination of packaging materials allows more efficient heat transfer as thermal resistances from one material to another are reduced or designed out. When possible, concurrent elimination of package materials that have low bulk thermal conductivity and replacement with high thermal conductivity materials will improve heat transfer efficiency. Attachment of the resulting unpackaged semiconductor device can then be made directly to the circuit carrier; however, care must be taken regarding increases in potential for damage or failure due to mismatched coefficient of thermal expansion (CTE). Continuing reductions in die size that result in higher heat flux exacerbate this potential failure mechanism at the die-to-substrate level. This is further worsened in harsh environment (i.e., vibration, shock, high moisture, rapid power cycling) and/or high operating temperature conditions.

For aerospace, military, geothermal, and other applications where increasingly high heat flux radio frequency (RF), microwave, and processor semiconductors are attached directly (with solders, silver sintering pastes, or other joining materials) to an organic or ceramic printed circuit card, efficient and rapid heat transfer becomes critical. These are frequently also applications where forced convection (air or liquid) may be unavailable to the system design engineer.

One solution for thermal management design problems of this type has traditionally been the incorporation of one or more heavy copper layers within a complex multilayer printed circuit board (PCB). This solution, however, has come under increasing scrutiny in recent years due to concerns for weight (especially in airborne and space applications) and the potential for severe CTE mismatch between semiconductor die materials with relatively low thermal expansion values and the relatively very high value of copper.

Therefore, development of CTE-matched alternative materials to replace a heavy copper layer has been a focus for development activities. A suitable selection must, however, have a bulk thermal conductivity that is as close to that of copper as is practicable. Recent developments of a copper-graphite composite material in sheet form that can be employed in standardized PCB manufacturing processes are described in this presentation.
Metallic TIM Testing and Selection for Harsh Environment Applications for GaN RF Semiconductors
Authors: Jensen Tim , Saums David L.
Published: May 2016

An important determinant of device reliability is operating temperature control. Maintaining a semiconductor device at or below the maximum rated junction temperature (Tj) is accomplished through careful thermal management design and selection of well-performing thermal interface materials (TIM) that minimize efficiency losses in packaging and between the semiconductor device package and a heat sink or liquid cold plate. Thermal management design is increasingly important in harsh operating environments, especially where higher operating temperatures are specified. Minimizing thermal resistances through each semiconductor package material stack and at the external case or package surface of the device are important aspects of maintaining operating temperatures within specified maximum values.

In addition, certain semiconductor devices require an electrical path from the semiconductor case to an external component. Maximizing electrical performance of gallium nitride (GaN) RF semiconductors is critical to system performance, as a primary example. The on-going transition within RF and microwave systems from silicon to GaN devices has increased the need for thermal interface materials which offer both improved thermal performance and electrical conductivity. Additionally, GaN semiconductor die are typically smaller in footprint and, even with equivalent power dissipation values, therefore may operate with higher heat flux values that require greater attention to proper thermal solution design.

To address such needs, recently-developed forms of metallic TIM preforms are available for integrated circuits, power semiconductors, and RF devices. Understanding how these materials may be tested and selected for specific application requirements is the subject of this discussion.
Decapsulation of Plastic Encapsulated Microelectronics with Copper Wire Bonds
Authors: Manoharan Subramani , Patel Chandradip , McCluskey Patrick
Published: May 2016

A novel method for copper wire bond decapsulation was developed, which involves conducting a sequential process to ensure minimal corrosion or, in some cases, no corrosion/degradation of the copper wire. It requires a pre-treatment which involves mechanical milling or acid etching; the main decapsulation process, utilizing a mixture of nitric and sulfuric acid under electrically biased conditions; and a post decapsulation procedure of encapsulant debris removal using a solvent. Previous studies use decapsulation methods that reveal either the ball bond or the wedge bond, separately, and thus cannot be used to perform wire pull tests. Exposing both the ball and wedge bond is not trivial, as the wire tends to break at the loop due to the long exposure time. The three-step process, when properly executed, ensures that the entire wire along with both ball and wedge bonds are exposed with minimal damage. Five parameters were found to affect the decapsulation process. These are as follows: acid ratio, biasing voltage, time of exposure, temperature and mold compound type. Careful control of these parameters can result in little to no copper wire degradation.
Towards the possible integration of Psychology and Christian faith: Faculties of human personality and the Lordship of Christ
Authors: Santrac Aleksandar S.
Published: May 2016

In recent debates every attempt to integrate Psychology and Christian Theology has met with almost complete distrust. This article suggests a possible mode of integration on the basis of the interconnectedness between the faculties of human personality and the idea of the Lordship of Christ. The compartmentalisation of human personality should be resisted, because every human faculty functions holistically. In the biblical revelation each of these faculties is subject to the Lordship of Christ in order to function properly as part of the holistic picture of the imago Dei.