bluuebunny/crossref_metadata_2025 huggingface dataset:
Behavior of LP models
Authors: Haverly C. A.
Published: April 2007

An LP analyst or model builder should thoroughly understand the way an LP model behaves. It's behavior is not identical to the behavior of the process which is being modelled. Nor does an LP model select decisions in the same way as human decision makers. However, by thoroughly understanding LP model behavior the analyst and model builder has a much better chance of using an LP model to make or guide rational decisions in the real world.
Study of domestic refining
Authors: Bonner John S.
Published: April 2007

In 1973, a project was initiated at Standard Oil of Indiana to investigate future petrochemical raw stock pricing trends. Although large in scope, the project was simple in concept: a mathematical programming model of the domestic refining industry would be subjected to projected future demand patterns for the basic olefinic and aromatic petrochemical intermediates, and the results would be used to predict industry pricing trends. In keeping with the title of this session, I am going to concentrate on the tools used for this study, rather than the study itself or its results. In fact, I could not discuss the results with you, even if I wanted to, because in the first place they are confidential and proprietary to Standard of Indiana and, in the second place, I don't know them. I guess this puts me somewhat in the position of the man who was hauled into court for returning his neighbor's lawnmower in damaged condition. In his defense, he pleaded that "in the first place, I never borrowed his lawnmower, and, in the second place, it was already busted when I picked it up, and, in the third place, it was running fine when I gave it back to him."
A theory of formal microprograms
Authors: Ito T.
Published: April 2007

This paper attempts to formulate a mathematical theory of microprogramming, along with Glushkov's approach on formal microprogram transformations. In particular, we have attempted to construct an algebraic theory of formal microprograms.
Teaching microprogramming
Authors: Lewis T. G. , DeKock A. R. , Alcorn H. R.
Published: April 2007

Many computer science departments are entering into what might be termed 3rd generation teaching of computer science. The first generation of computer science teaching was done in primarily an open shop, hands-on environment. The machines were slow, the operating systems were simple or nonexistent, and debugging quite often depended on reading the state of the machine when it died. One author, for example, fondly recalls his experience on a drum memory machine that used paper tape/flexowriter I/O. The machine had a speaker attached to the accumulator register so that one could hear his program run! It was possible to process very few student programs per day.
Statistical evaluation of program runs on a microprogrammed computer through simulation
Authors: Färber Hans-Jürgen
Published: April 2007

In 1969, the hardware of a computer installation was completed. To check out the software - WRITEN IN MICRO-INSTRUCTIONS -, it became necessary to write a series of typical user programs and to study the runs of these programs.
A microprogrammed display processor concept for 3-D dynamic interactive computer graphics
Authors: Hartenstein Reiner W. , Mueller Klaus D.
Published: April 2007

In SIGMICRO Newsletter, Vol. 3, Nr. 1 Andries van Dam defined the term "Interactive Computer Graphics" (graphics) and divided its applications into the two broad categories "interactive plotting" and "interactive design". In this paper, we want to suggest a system, which provides all those "necessary features", demanded by A. van Dam. Our suggested system is one of the type "powerful intermediate price, microprogrammed graphics", which may be used in a "stand alone mode" or a "satellite mode".
News and notices
Authors: Habib Stanley
Published: April 2007

The News and Notices in this issue include reprints from recent journals. The following is a list of the items included in this section
Computer organization for allowing dynamic user microprogramming
Authors: Thomas Richard T.
Published: April 2007

The concept of allowing the computer user to modify the virtual machine being emulated by a microprogram controlled computer is not new. Schemes for implementing this typically include the definition of a standard virtual machine (the base machine) in read-only control storage, and the provision of some writable memory to contain user-written microroutines for the duration of the user job. Alternation of a computer instruction set by the temporary addition of microroutines to the system repertoire for emulation of new instructions is known as dynamic user microprogramming.
A halfbaked idea about a set of register transfer primitives
Authors: Hartenstein Reiner W.
Published: April 2007

In vol. 1, No. 1 of SIGMICRO newsletter a message from the editor (Harold W.Lawson jr.) says"...If you have a subject area in which you would care to expound, or just try a halfbaked idea out for size, send a copy in, it doesn't have to be the polished (?) paper seen in a Spring or Fall Joint Conference ...". Just such a halfbaked idea I am going to present in the following sheets and I would be happy to get critical feedback from the readers of this "not polished" paper. About some details I feel, that they are new. But if you, dear attentive reader, know more about it, than it would be nice of you, to drop a line for me.
Towards a language for the description of IC chips
Authors: Hartenstein Reiner W.
Published: April 2007

This paper is continuing as "part II" a paper out of the preceding number of SIGMICRO Newsletter. That preceding paper (for its title see ref. |10|) is referenced as "part I" in the following lines. (As in part I |10|, also in part II some of the ideas are half-baked ideas.) In part I a draft design has been given of a set of register transfer primitives (RTP) and a corresponding symbolic notation, as well as its block diagramm equivalent. Part I particularly aimed at the demonstration of the use of register transfer notations for modelling constructs known from the software field, as seen with the eyes of a hardware man.
Microprogramming of signal processors
Authors: Ashcraft W. D.
Published: April 2007

This paper is concerned with the hardware and architecture of microprogrammed equipment intended primarily for real time signal processing applications. Principles and structural types are discussed rather than a specific structure. There are numerous advantages to microprogrammed as contrasted to hardwired signal processing equipment. People in different positions view microprogramming as having different advantages. This paper presents some of these advantages together with hardware structure, microinstruction format, diagnostic techniques for both hardware and software, and various methods of control of a microprogrammed processor.
Notes from universities
Authors: Habib Stanley
Published: April 2007

Because of its small faculty (six professors in Computer Science), Brown does not offer a complete course in microprogramming. A substantial portion of the third semester in the Computer Science sequence is devoted to aspects of microprogramming. Microprogramming is treated as merely another level in the hierarchy running from the hardware to programs written in higher level languages. The student has already had substantial experience in the design and implementation of gates, registers, adders and the like. Using a simulator written in APL he has designed and implemented a simple control unit, and arithmetic/logic unit, and a random access memory. He has written several programs in both PL/I and BAL. In the third semester, the microprogramming system available on one of the computers at Brown (either a DSC Meta 4 or an Interdata Model 3) is covered and he codes and debugs one of the more complicated instructions (i.e., Translate and Test or Search Linked List or Table).
Notes from industry
Authors: Habib Stanley
Published: April 2007

OCEANPORT, N.J., SEPT. 25, 1973 -- A 16-bit minicomputer priced at under $2,000.00 in quantities and a 32-bit minicomputer priced at under $6,000.00 in quantities, were introduced today by Interdata, Inc.
Notes from reviewers
Authors: Habib Stanley
Published: April 2007

As the title suggests, microprogramming is a secondary topic in the general treatment of "Computer Organization" in this text. (One is reminded of the discussion at the closing session of Micro-5 about whether microprogramming is a viable subject of inquiry of itself.) I do not mean to suggest that Professor Chu has simply added the name of a "hot topic" to the title of his book and then given it shallow treatment. Two of the eleven chapters deal entirely with microprogramming, and the chapter on Control Organization contains a good section of the hows and whys of microprogramming. Furthermore, the independent control points (control signals) of computer structures are referred to as "micro-operations" throughout the book. This terminology automatically stresses the proper role of microprogramming as one of the possible techniques for implementing the control function of a processor. In addition, the author's Computer Design Language (CDL) is built around the symbolic representation of these micro-operations, providing good continuity throughout the material presented.
Instruction fetch techniques using program equivalence
Authors: Eastwood Douglas E.
Published: April 2007

This paper discusses potential techniques for the dynamic generation of instructions in the instruction fetch unit of a processor. The chief advantage is the increased effective bandwidth in transfer of compressed program information from memory to the processor unit, which allows higher processor speed for a given memory access rate. The method is independent of cache memory techniques, although aimed at the same problem, and could be combined with use of a cache memory to obtain still more speedup of processor execution. The paper is largely at a conceptual level; work is planned to obtain data to facilitate design and simulation of a prototype machine.
The significance of microprogramming
Authors: Rosin Robert F.
Published: April 2007

Interest in the topic of microprogramming appears to have had a great growth in the middle and late 1960's, but since that time it has leveled off or declined somewhat. This paper examines the reasons behind this development and then offers a reconsideration of and a new proposal for the definition of microprogramming.This result is supported by the consideration of three phenomena. First is the evolution of microprogramming during the past twenty years. Second is the evolution in the use of interpretation as an implementation technique. Third is the set of "rules of thumb" resulting from the system designer having to resolve conflicting forces attempting to influence his activity.Five possible meanings of the term microprogramming are considered and rejected totally or in part prior to the one finally offered. The suggestion is made that this redefined concept be avoided as much as possible in the future, and two avenues for research alternatives are encouraged instead.
Interdata now makes own power supplies
Authors: Habib Stanley
Published: April 2007

OCEANPORT, N. J., JANUARY 24, 1974 -- Interdata, Inc., leading minicomputer manufacturer, announced today it bad begun the manufacture of its own 25 and 50-amp multiple output power supplies.
A hardware definition of microprogramming
Authors: Chroust Gerhard
Published: April 2007

This paper tries to give a simple, effective definition of 'microprogramming' by reducing this notion to the concept of a 'microcontrolled' machine. The class of microcontrolled machines can rigorously be defined using the terminology of switching algebra.
PUMPKIN
Authors: Lloyd Gregory R.
Published: April 2007

This paper provides a source level description of a compiled microprogramming language for the Microprogrammed Control Unit (MCU) of the Signal Processing Element (AN/UYK-17), currently under development at the Naval Research Laboratory. Its present form is strictly that of a "paper" language; current research at Brown is directed toward the problems encountered in optimizing microcode for this (horizontal) machine. The structure and syntax of PUMPKIN is closely related to that of LSD - a Language for Systems Development which has been implemented at Brown [BE71, BE72, MA74]. The level (power, expressibility, distance from hardware capabilities) of PUMPKIN provides some hope that we may be able to generate usable code for the MCU - no machine independence goals exist for PUMPKIN. Some aspects of the design philosophy behind the language are contained in the paper "Design Considerations for Microprogramming Languages" [LL74], to be published in the 1974 NCC Proceedings.
Digital computer controls inc®
Authors: Habib Stanley
Published: April 2007

The new models of our field proven D-116 minicomputer series are powerful, versatile, and the most cost-effective machines available today.
Recent journal articles
Authors: Habib Stanley
Published: April 2007

SPECTRUM
- February, 1974 - "Microprogrammed Hardware Speeds Fortran Subroutines for Minicomputer," - Copywright by Spectrum, New York, New York, 10017.
Microprogramming and structured design
Authors: Boulaye Guy
Published: April 2007

Microprogramming is presented, here, as programming at a certain level, with this level's characteristics. In that way, we wish to react against the traditional presentation which only retains the micropramming's use for the control units'realization. In other words, we pretend that microprogramming is not a technique specifically hardware. Contrary, we attach to show its room in a general design process.
Microprogramming the AN/UYK-17(XB-1)(V) signal processing element signal processing arithmetic unit
Authors: Rauscher Tomlinson G.
Published: April 2007

The AN/UYK-17(XB-1)(V) Signal Processing Element (SPE) is a high performance computer system being developed at the Naval Research Laboratory for radar, sonar, and communication applications. To perform signal processing tasks efficiently, the SPE comprises multiple functional units that execute different processes in parallel. Due to the inherent parallelism in signal processing tasks, horizontal microprograms are used to control the functional units [references 5 and 6]. This report overviews the SPE, describes the Signal Processing Arithmetic Unit (SPAU) in detail, discusses ANIMIL-the microprogramming language for representing SPAU microprograms, and illustrates the use of the ANIMIL translator with a simple microprogram. Companion documents describe the SPAU simulator program (reference 3) and the formal syntax and semantics of the ANIMIL language (reference 4).
An experimental seminar on microprogramming and emulation
Authors: Jones Louise H.
Published: April 2007

The purpose of this article is to describe an experimental senior/graduate-level seminar on "Microprogramming and Emulation" which was offered during the 1974 Spring Semester at the University of Delaware. The stated a priori objective of the course was:"To study the current "state-of-the-art" of microprogramming and microprogrammable machines, to look at where microprogramming is going and why; to develop tools for characterizing tasks and for designing architectures appropriate for a particular task such as emulation."
New product applications
Authors: Habib Stanley
Published: April 2007

Many other system organizations, including multiprocessors, can be imoplemented. For example, many MCU-control memory sections can share one central processor (CP) array when many similar machines or devices must be controlled. Sharing a CP array will rarely affect control speed, since control data is processed at rates far higher than normal machine operating rates.
ACM Special Interest Group on Microprogramming
Authors: Habib Stanley
Published: April 2007

As the enclosed
news release
indicates, Data Saab has merged its interest in medium and large computers with UNIVAC in Scandanavia. The new company will market the medium and large scale products of both Data Saab and UNIVAC.
A control word model for detecting conflicts between microoperations
Authors: Lewis Ted , Shriver Bruce
Published: April 2007

The compilation and optimization of a microprogram for a computer with a horizontal control word format is highly machine dependent. The compilation phase involves the detection of parallelism in a sequence of source statements followed by a mapping into a sequence of micro-operations. The optimization phase involves combining these microoperations to form microinstructions in an optimal manner. One of the important subprocesses of the optimization phase is determining whether or not two or more microoperations can be executed concurrently.
Microprogramming trend considered dangerous
Authors: Lehman M. M.
Published: April 2007

When first conceived by Wilkes and his Cambridge colleagues, the concepts of microprogramming were a valuable extension and formalization of the more heuristic, function-by-function, logic-process which had previously been used to design and implement computers using elementary electronic and logical components and circuits. As such, I have no quarrel either with the concept or its implementation.
A network of dynamically microprogrammable machines
Authors: Davidson Scott
Published: April 2007

The MESH research group at the University of Illinois is currently designing a network of mini-computers. Extensions allowing some of the machines making up this network to be dynamically microprogrammable are proposed. These microprogrammable machines will be able to be reconfigured into specialized processors designed to run specific jobs efficiently. Modifications to the network operating system required by this extension are examined, and an example of a job that could be run on the system is given.
Program control via transition matrices
Authors: Oliver A. Ron , Jones Neil D.
Published: April 2007

The problem of processing and interpreting character-strings in a systematic, efficiently implementable manner has given rise to a variety of decision-(or transition-) table and transition-diagram techniques. These have been used in the design and/or coding of string-oriented processors, such as lexical analysis protions of compilers. All these techniques share in common the idea of an input driven transition control.This report describes a micro-coded implementation fo a particularly rich concept--the transition matrix (TM). The micro-coded interpreter (ITM) executes the flow-of-control implicit within the structure of the TM. The TM may be coded in a natural, easy to use language (LTMφSP), and then be automatically translated into ITM-usable form by a user-level translator called TMφSP. The completed system (ITM and TMφSP) permits TM-oriented decision-making techniques to be utilized in virtually any task that can be described by means of transition matrix.
Operating system enhancement through microprogramming
Authors: Brown George E. , Eckhouse Richard H. , Goldberg Robert P.
Published: April 2007

Microprogramming support for the enhancement of operating system design is described briefly, organization structure of real-time operating systems are examined, and criteria proposed for determining which functions are best candidates for implementation in firmware. A suitable microprogrammed computer is selected and avenues for additional research are recommended.
Direct-execution computer architecture
Authors: Chu Yaohan
Published: April 2007

In the last issue, some concepts of high-level language computer architecture was introduced. In this issue, some of our work on direct-execution computer architecture is introduced.
Recent books on microprogramming
Authors: Lewis T. G. , Shriver Bruce
Published: April 2007

Members of SIGMICRO and readers of the SIGMICRO Newsletter are encouraged to submit reviews of current literature concerned with microprogramming. The following two books have been brought to our attention.
Microprogramming for the hardware engineer
Authors: Mick John R.
Published: April 2007

With the advent of the Am2901 four-bit microprocessor slice and the Am2909 bipolar microprogram sequencer, the design engineer can upgrade the performance of existing systems or implement new systems taking advantage of the latest state-of-the-art technology in Low-Power Schottky integrated circuits. These devices, however, utilize a new concept in machine design not familiar to many design engineers. This technique is called microprogramming.
Reflective emulations of the HP 2100A and Varian 72 Minicomputers
Authors: Ehlers Bryan L. , Harmon Gary L. , Wear Larry L.
Published: April 2007

The authors would like to thank Dr. W. G. Sitton, California State University, Chico, for directing the project and overseeing the development of this paper. Thanks also to Mr. Milton Morton, California State University, Chico, for critically reading the paper and offering many helpful suggestions.
Bridging the gap between principles and practices in microprogramming
Authors: Cohen David , Liu Ming T.
Published: April 2007

The concept of microprogramming was introduced by Wilkes [WILKM51] a quarter of a century ago, but it took more than a decade of technological developments (the advent of low-cost, high-speed ROS) to bring it to the stage of an applied concept [HUSSS70]. The interest in microprogramming has increased markedly during the past years with the introduction of the low-cost, high-density LSI memory chips. Current trends in microprogramming include user microprogrammable systems, high-level language interpreters, operating systems, microprocessors, and special applications [JONEL74, FLYNM75, JONEL75, AGRAA76]. Although microprogramming has been widely accepted as a valid approach to the design of computer systems, it is still practiced by a limited number of professionals only, due to the cloak of secrecy held over this technology by major computer manufacturers [JONEL74]. The position of microprogramming in the computer science and engineering curriculum remains obscure [MULDM75]. We feel that this is partially due to the problem in teaching about microprogramming. Currently there does not exist a well established theory of microprogramming and therefore most technical articles on this subject are based on examples and case studies. The three books on microprogramming [HUSSS70, AGRAA76, SALIA76] are satisfactory in providing a set of basic principles and many case studies, but difficulties in understanding are encountered when a specific system is introduced with all its software, firmware and hardware complexity. The student can identify the major elements, but finds it difficult (in many cases impossible) to understand how the basic principles have been transformed into the results displayed before him. Existing literature rarely covers the design objectives and the design tradeoffs which in fact determine the final product of an implemented computer system (a good example is [BUCHW62]). As a result of this situation, we have experienced a serious difficulty in our effort to close the gap between understanding the basic principles and the ability to absorb the characteristics of existing systems.
An Intel 3000 cross assembler
Authors: Willen David
Published: April 2007

This note describes MCR3000, a cross-assembler and simulator for the Intel series 3000 microcomputer chip set. The MCR3000 System is written for, and runs under, the IBM System 360 OS/MVT. It consists of an assembler facility for writing and generating microcode and an execution simulator for testing and running micro programs. When one uses both the assembler and simulator, it is necessary to specify the bit slice desired. This value can range from 2 (which represents a single 3001 CPE chip) to 32, the length of an IBM full word. There is no limit to the size of the microprogram memory and powerful extensions to the addressing schemes of the 3002 MCU chip are provided.
An Eclipse microassembler
Authors: Martin Daniel
Published: April 2007

The microprogrammed Data General Eclipse S/200 computer is available with a writable control store (WCS). The WCS feature of the Eclipse is an extension of the microprogrammed control logic of the computer's central processing unit. It allows a user to implement specialized instructions at a very low level. Its use is however, discouraged since Data General does not provide software support for the WCS feature. A microassembler was written to alleviate this problem on the Memphis State System.
A microprogrammed virtual memory for Eclipse
Authors: d'Hautcourt-Carette Françoise
Published: April 2007

The Eclipse S-200 is a Data General minicomputer available since 1975. It is a microprogrammed and micro-programmable computer : the user can buy a writable control store (WCS) to define his own specialized instructions.
MDSL
Authors: Adamowicz Michael , Mirza Jamshed
Published: April 2007

MDSL, which stands for
M
icrocomputer
D
esign and
S
imulation
L
anguage, is one of an ever growing number of computer hardware design (or description) languages or CHDL's. The introduction of any new language, particularly a new CHDL, is accompanied by a number of WHYs. Why should anyone bother to develop a CHDL? Why did we bother to develop a new one? Why did MDSL take the form it did?
Automatic enumeration and evaluation of certain multiprocessor design alternatives
Authors: Middleton Tony
Published: April 2007

Quite often, a designer has to chose from several alternative ways of achieving the same end. When the number of alternatives is very large, it is useful to have an "analyser" available which will mechanically enumerate the alternatives and assign a cost to each one - finally identifying the best alternative. The author has already produced such an analyser for serial programs [1, 2]. The intention of this paper is to suggest that the approach used in this earlier work can be of relevance to the design of systems involving several processors (in particular, pipelines which are in a steady state). The analyses used are very approximate, but should be sufficient to select, from a large number of alternatives, the few alternatives which warrant detailed study (e.g. by precise simulation).
Review of "Microprogramming Primer by Harry Katzan Jr.," McGraw-Hill, New York, $17.95
Authors: Thomas Richard T.
Published: April 2007

This book is an excellent introduction to the topics of microprogram control and emulation. It is well-organized and easy to read. The author uses a simple hypothetical machine to explain the basic concept of microprogram control. Then he proceeds to give a very detailed description of an actual microprocessor (the Burroughs D-machine), and uses this machine to introduce emulation concepts. The TRANSLANG microprogramming language for the D-machine is described, and is used to generate many sample microprograms showing emulation techniques. These sample microprograms were actually executed via a D-machine simulator, and the results of the simulation runs are given in the book along with the sample microprograms. The book is to have a companion instructor's manual which will contain FORTRAN IV listings of the TRANSLANG compiler and D-machine simulator -- ideal for use in a course on microprogramming.
Micro programming rational arithmetic operations
Authors: Thacker William I. , Gorsline G. W.
Published: April 2007

For many years, real number arithmetic, whether accomplished in hardware, software, or firmware, has utilized a floating point scheme. This paper summarizes the results of a study assessing rational representation as a possible replacement for floating point representation. The Hewlett-Packard 2100A microprogrammable computer was used as the test vehicle. Both accuracy and speed comparisons were used to judge the usefulness of the substitution.
News 2.0
Authors: Stanik John
Published: April 2007

Malware—Quantity over Quality
A License to Kode
Authors: Neville-Neil George
Published: April 2007

While it’s sometimes tempting to blame the coders, the seeds of many problems are sown well before any lines of code (dodgy as they may be) have been written. Everything from the choice of tools to the choice of a software license can affect the quality, usability, and commercial potential of a product. This month Kode Vicious takes a step away from coding technique and addresses some of these tough decisions with which developers must grapple.
One Step Ahead
Authors: Gorelik Vlad
Published: April 2007

Every day IT departments are involved in an ongoing struggle against hackers trying to break into corporate networks. A break-in can carry a hefty price: loss of valuable information, tarnishing of the corporate image and brand, service interruption, and hundreds of resource hours of recovery time. Unlike other aspects of information technology, security is adversarial. It pits IT departments against hackers.
Calendar
Authors: Stanik John
Published: April 2007

SCALE 5x
The delft MS curriculum on embedded systems
Authors: Gross Hans-Gerhard , van Gemund Arjan
Published: April 2007

Embedded Systems (ES) is the fastest growing sector in ICT technology [1][18]. Also in the Dutch economy, this sector is believed to become an important generator of added value. In this paper we describe a new MS program on ES that is offered in Delft as of the academic year 2006/2007. The MS program is a joint offering by the three Universities of Technology within The Netherlands (at Delft, Eindhoven, and Twente). We describe the program, its rationale, and two examples of already existing courses (Embedded Systems and Real-Time Systems), from which the new ES curriculum has emerged.
Bringing embedded software closer to computer science students
Authors: Muppala Jogesh K.
Published: April 2007

Computer Science (CS) students have often shied away from the field of embedded systems owing to their perception of this area as "hardware" oriented, not without reason. But recent trends in embedded systems, with the growing importance of the software component, has brought about new opportunities for computer science students to participate and contribute to embedded system development. In this paper we present our views and experience gained by teaching Computer Science students, on how we can bring embedded systems closer to them, to provide them the opportunity to fully participate in this growing field. We believe that by building on the CS students' strengths, while lessening the emphasis on the 'hardware' aspects, we can still allow them to master sufficient knowledge and skills to participate in this field.
Experiences from large embedded systems development projects in education, involving industry and research
Authors: Törngren Martin , Grimheden Martin , Adamsson Niklas
Published: April 2007

We present experiences from a final year M.Sc. course. The overall aim of the course is to provide knowledge and skills to develop products in small or large development teams. The course is implemented in terms of large projects in cooperation with external partners, in which the students, based on a product specification, apply and integrate their accumulated knowledge in the development of a prototype. This course, which has been running and further elaborated for 20 years, has been proven successful in terms of being appreciated by the students and by the external partners. The course has during the recent years more frequently been carried out in close connection to research groups. Our experiences indicate benefits by carrying out these types of large projects in an educational setting, with external partners as project providers, and in close cooperation with research groups.Having external partners as project providers feeds the course, students and faculty with many industrially relevant problems that are useful for motivational purposes, and in other courses for exemplification and for case studies in research. Carrying out the projects in close connection to research groups provides synergy between research and education, and can improve the academic level of the projects. A further interesting dimension is accomplished when the projects run in iterations, requiring new groups of students to take over an already partly developed complex system, and work incrementally on this system. The students are then faced with a very typical industrial situation. We advocate that students should be exposed to a mixture of "build from scratch" and "incremental" projects during the education.
Solving SAT and SAT Modulo Theories
Authors: Nieuwenhuis Robert , Oliveras Albert , Tinelli Cesare
Published: April 2007

We first introduce
Abstract DPLL
, a rule-based formulation of the Davis--Putnam--Logemann--Loveland (DPLL) procedure for propositional satisfiability. This abstract framework allows one to cleanly express practical DPLL algorithms and to formally reason about them in a simple way. Its properties, such as soundness, completeness or termination, immediately carry over to the modern DPLL implementations with features such as backjumping or clause learning.We then extend the framework to Satisfiability Modulo background Theories (SMT) and use it to model several variants of the so-called
lazy approach
for SMT. In particular, we use it to introduce a few variants of a new, efficient and modular approach for SMT based on a general DPLL(
X
) engine, whose parameter
X
can be instantiated with a specialized solver
Solver

T

for a given theory
T
, thus producing a DPLL(
T
) system. We describe the high-level design of DPLL(
X
) and its cooperation with
Solver

T

, discuss the role of
theory propagation
, and describe different DPLL(
T
) strategies for some theories arising in industrial applications.Our extensive experimental evidence, summarized in this article, shows that DPLL(
T
) systems can significantly outperform the other state-of-the-art tools, frequently even in orders of magnitude, and have better scaling properties.
A note on rational arithmetic
Authors: Kornerup Peter
Published: April 2007

A recent paper in SIGMICRO [1] contained a comparison of the accuracy of floating point vs. rational representations, which is very unfair to the latter. The format chosen for rational numbers utilizes 16 bits for numerators and 16 bits for denominators. This implies that the spacing between consecutive numbers in the system is in most cases of the order 2
-32
. Only around simple rational numbers (e.g. 1/1, 2/3) is the spacing of the order 2
-16
. However the rounding algorithm presented in [1] will almost certainly introduce a rounding error of the order 2
-16
, i.e. introduce an error which in most cases is of the order 2
16
larger than necessary.
Microprogrammable computer architecture design considerations
Authors: Tracz William J.
Published: April 2007

The implementation of a computer system through a microprogrammable architecture has demonstrated significant advantages in flexibility and overall cost. This paper summarizes some key questions related to the design of a microprogrammable computer architecture. Three areas are covered; general system questions, hardware questions, and software questions.
Recent articles on protection of computer related innovations
Authors: Wallach Walter
Published: April 2007

There have been a number of recent articles in the trade press regarding the protection of computer innovations which are not strictly hardware (such as firmware and software). An article by David Pressman in the August 5 issue of
EDN
(their A Question of Law column summarizes the five methods of safeguarding innovations, namely:Copyright -- protects any copy of a written work from use by others without permission. Recent changes to Federal law explicitly extend copyright protection to software.Trade Secrecy - By not disclosing information about a product, and requiring all users to sign a nondisclosure agreement, anyone stealing a copy of the product may be prosecuted for stealing a "trade secret". This method and copyright protection are mutually exclusive.Unfair Competition - If someone is trying to cash in on some aspect or your product without extending proper credit, you may be able to get relief under this doctrine.Patent - Recent Supreme Court rulings may be leading to liberalized interpretation of patent laws extending patent protection to firmware and software innovations. The key is to claim the innovation with hardware, even if that specific hardware is not required for the innovation to work. Further, the firmware or software must not be the primary item claimed. Trademarks - used to attract attention to your product, and make its piracy more obvious. [Presl].
Firmware engineering and microprogramming at Colorade State University
Authors: Johnson Gearold R. , Mueller Robert A. , Andrews Michael
Published: April 2007

Colorado State University is in the process of building a research emphasis in the area of firmware engineering and microprogramming through the Department of Computer Science and the Center for Computer-Assisted Engineering. The primary participants are Dr. Gearold Johnson, Dr. Robert Mueller, Dr. Michael Andrews, several full-time graduate research assistants (including two doctoral candidates), and a part-time graduate student from the Hewlett Packard Desktop Computer Division.
Stanford emulation laboratory
Authors: Flynn Michael J.
Published: April 2007

Over the past decade we have built a laboratory and research environment for the study of architectures and emulation. Initially most effort was directed at building the host processor, EMMY, and its support tools. The next stage was to emulate a variety of instruction sets --- building an archive of emulators. Now we have well over a dozen emulators and can add a new one quickly. A student can emulate a know image architecture in about ten weeks --- twenty weeks includes verification and documentation --- thirty weeks for I/O and interface to a simple operating system. (A student-week is about 6 - 8 hours of effort and corresponds to three units of credit.)
The codes project at the University of Southwestern Louisiana
Authors: Linn Joseph L. , Dasgupta Subrata , Shriver Bruce D.
Published: April 2007

The Computer Science Department of the University of Southwestern Louisiana (USL) has a long history of involvement in the area of firmware engineering. The CODES project began in October, 1982. It brings together the experience gained in earlier work to focus on the design and implementation of an integrated suite of microprogramming tools. The primary participants in this project are Dr. Joseph L. Linn, Dr. Subrata Dasgupta, Dr. Bruce D. Shriver, several full-time and part-time graduate research assistants at both the M.Sc. and Ph.D. level and several undergraduate students. The CODES project has been supported, in part, via funding from the Advanced Technology Laboratory of the RCA Corporation.
Firmware engineering and microprogramming at the University of Cincinnati
Authors: Papachristou Christos A.
Published: April 2007

A research program in firmware engineering and microprogramming is in progress at the Electrical and Computer Engineering Department of the University of Cincinnati. The group of researchers engaged in this effort is supervised by Dr. Christos Papachristou and involves his graduate assistants, Mr. Satnam Gambhir, Ms. Evelyn Melton and Mr. Pei-Ching Hwang. This research is supported in part by U.S. Army Research Office grant DAAG29-85-K-0106, gratefully acknowledged. Some preliminary results were reported at Micro-14, Micro-15 and the IEEE International Workshop on Computer Systems Organization.
Microprogramming at Vanderbilt University
Authors: Winner R. I.
Published: April 2007

The Computer Science Department of Vanderbilt University is actively pursuing a research program in microprogramming and related engineering. Projects at this time are being directed by Dr. Robert I. Winner with the participation of several graduate students, E. Michael Carter (Ph.D candidate), J. Eric Roskos (Ph.D student), Leonard B. Reed (Ph.D student), Thomas M. Wood (M.S. student), and Richard L. Booth (M.E. student).
On the formal pescription of microoperations and its impact on automatic microcode generation
Authors: Bingcong Chen , Xiaofan Wei , Xin Yao
Published: April 2007

Automatic microcode generation is a significant research field of firmware engineering. In the research System AMPS, three kinds of formal description of microoperations will be needed in automatic microcode generation from high level microprogramming language: algorithmic microoperations, real microoperations, and formal microoperations. In this paper, we present and discuss the formal descriptions, the relationship among real microoperations as well as the factors by which the concurrency of microoperations can be identified; we also show the vitality of these three kinds of description mentioned above in allowing the high level microprogramming language being machine-independent, and the generality of microcode compaction algorithm.
Algorithm for generating a step matrix by permutation
Authors: Seehusen J.
Published: April 2007

With an efficient algorithm it can be tested whether an n-dimensional matrix B can be reduced by a permutation. The optimal step matrix, which can be obtained by a permutation, is calculated. The algorithm needs 0(n
2
-n) operations in the case of an array reprsentation of B. If B is a Sparse matrix with m non-zero offdiagonal elements, the cost is of the order 0(max(m, nlog2(n))). Storage for 4 integer arrays of length n is necessary.
Optimization
Authors: More Jorge J. , Tapia Richard A. , Wright Margaret H.
Published: April 2007

This paper discusses research concerning the numerical solution of optimization problems. The introduction provides a non-technical overview of the field, and gives a general picture of the form and attributes of optimization problems. The subsequent sections include our view of several crucial areas in which further research is worthwhile, as well as a brief indication of the current state of the art.
K42
Authors: Krieger Orran , Auslander Marc , Rosenburg Bryan , Wisniewski Robert W. , Xenidis Jimi , Da Silva Dilma , Ostrowski Michal , Appavoo Jonathan , Butrico Maria , Mergen Mark , Waterland Amos , Uhlig Volkmar
Published: April 2007

K42 is one of the few recent research projects that is examining operating system design structure issues in the context of new whole-system design. K42 is open source and was designed from the ground up to perform well and to be scalable, customizable, and maintainable. The project was begun in 1996 by a team at IBM Research. Over the last nine years there has been a development effort on K42 from between six to twenty researchers and developers across IBM, collaborating universities, and national laboratories. K42 supports the Linux API and ABI, and is able to run unmodified Linux applications and libraries. The approach we took in K42 to achieve scalability and customizability has been successful.The project has produced positive research results, has resulted in contributions to Linux and the Xen hypervisor on Power, and continues to be a rich platform for exploring system software technology. Today, K42, is one of the key exploratory platforms in the DOE's FAST-OS program, is being used as a prototyping vehicle in IBM's PERCS project, and is being used by universities and national labs for exploratory research. In this paper, we provide insight into building an entire system by discussing the motivation and history of K42, describing its fundamental technologies, and presenting an overview of the research directions we have been pursuing.
Reducing TCB complexity for security-sensitive applications
Authors: Singaravelu Lenin , Pu Calton , Härtig Hermann , Helmuth Christian
Published: April 2007

The large size and high complexity of security-sensitive applications and systems software is a primary cause for their poor testability and high vulnerability. One approach to alleviate this problem is to extract the security-sensitive parts of application and systems software, thereby reducing the size and complexity of software that needs to be trusted. At the system software level, we use the Nizza architecture which relies on a kernelized trusted computing base (TCB) and on the reuse of legacy code using trusted wrappers to minimize the size of the TCB. At the application level, we extract the security-sensitive portions of an already existing application into an AppCore. The AppCore is executed as a trusted process in the Nizza architecture while the rest of the application executes on a virtualized, untrusted legacy operating system. In three case studies of real-world applications (e-commerce transaction client, VPN gateway and digital signatures in an e-mail client), we achieved a considerable reduction in code size and complexity. In contrast to the few hundred thousand lines of current application software code running on millions of lines of systems software code, we have AppCores with tens of thousands of lines of code running on a hundred thousand lines of systems software code. We also show the performance penalty of AppCores to be modest (a few percent) compared to current software.
On the road to recovery
Authors: Keeton Kimberly , Beyer Dirk , Brau Ernesto , Merchant Arif , Santos Cipriano , Zhang Alex
Published: April 2007

Restoring data operations after a disaster is a daunting task: how should recovery be performed to minimize data loss and application downtime? Administrators are under considerable pressure to recover quickly, so they lack time to make good scheduling decisions. They schedule recovery based on rules of thumb, or on pre-determined orders that might not be best for the failure occurrence. With multiple workloads and recovery techniques, the number of possibilities is large, so the decision process is not trivial.This paper makes several contributions to the area of data recovery scheduling. First, we formalize the description of potential recovery processes by defining recovery graphs. Recovery graphs explicitly capture alternative approaches for recovering workloads, including their recovery tasks, operational states, timing information and precedence relationships. Second, we formulate the data recovery scheduling problem as an optimization problem, where the goal is to find the schedule that minimizes the financial penalties due to downtime, data loss and vulnerability to subsequent failures. Third, we present several methods for finding optimal or near-optimal solutions, including priority-based, randomized and genetic algorithm-guided ad hoc heuristics. We quantitatively evaluate these methods using realistic storage system designs and workloads, and compare the quality of the algorithms' solutions to optimal solutions provided by a math programming formulation and to the solutions from a simple heuristic that emulates the choices made by human administrators. We find that our heuristics' solutions improve on the administrator heuristic's solutions, often approaching or achieving optimality.
TCP offload through connection handoff
Authors: Kim Hyong-youb , Rixner Scott
Published: April 2007

This paper presents a connection handoff interface between the operating system and the network interface. Using this interface, the operating system can offload a subset of TCP connections in the system to the network interface, while the remaining connections are processed on the host CPU. Offloading can reduce computation and memory bandwidth requirements for packet processing on the host CPU. However, full TCP offloading may degrade system performance because finite processing and memory resources on the network interface limit the amount of packet processing and the number of connections. Using handoff, the operating system controls the number of offloaded connections in order to fully utilize the network interface without overloading it. Handoff is transparent to the application, and the operating system may choose to offload connections to the network interface or reclaim them from the interface at any time. A prototype system based on the modified FreeBSD operating system shows that handoff reduces the number of instructions and cache misses on the host CPU. As a result, the number of CPU cycles spent processing each packet decreases by 16--84%. Simulation results show handoff can improve web server throughput (SEPCweb99) by 15%, despite short-lived connections.