(Invited) Considerations on H2o-Annealing Effects on SiO2/4H-SiC Mos Interface Structures to Improve MOSFET Perormances
Authors: Kita Koji 
Published: May 2020

4H-SiC has attractive properties for power devices of high voltage applications, however, the performance of MOSFETs is often severely limited by the SiO2/SiC interface quality. Although the most common way to passivate the interface defects is the nitrogen introduction through NO annealing [1], it is noteworthy that SiC MOS characteristics are often significantly improved only by wet-oxidizing processes compared to the ones of dry-oxidizied interface [2]. In this paper we discuss the essential differences between the dry-oxidation and wet-oxidation of SiC, especially focusing on the oxidation reaction mechanisms and the interface physical structures.

The remained carbon at SiC MOS interface as the thermal oxidation byproduct causes various kinds of interface defects formation. We found that H2O-oxidation does not leave CO-related defect structures near the interface. Moreover H2O-oxidation results in the formation of less-strained SiO2 at the interface than O2-oxidation, which was clarified from the difference of the Si-O-Si vibration mode frequencies in FTIR spectra [3]. Since the formation of near-interface oxide traps of electrons with long time constants is one of the serious causes of the poor MOSFET channel properties, such improvement of near-interface oxide structures would be an advantage of H2O-oxidation. The significant quality difference may be attributable to the essential differences of the interface reactions. The thermodynamics suggest that SiO generation is easier for SiC-O2 system (dry oxidation) than SiC-H2O system (wet oxidation) where SiO+CO generation is not preferred to SiO2+CO generation even at high temperatures, as long as a certain partial pressure of H2O was kept supplied. Based on these considerations, we have demonstrated the benefit of the post-oxidation annealing in H2O (H2O-POA) after a simple dry-oxidation, as the way to improve the performance of NMOSFETs formed on 4H-SiC (0001) [4]. In this study the H2O-POA ambient was produced by bubbling of O2 or N2 flowing gas through a temperature-controlled hot water. It should be noted that this process effectively works with only < 1nm additional growth of oxide at the interface during H2O-annealing to demonstrate a comparative or higher channel mobility than the typical results of conventional NO-passivation processes.

We also examined the effects of similar processes on PMOSFET, since Dit near valence band edge was found to be reduced by our H2O-POA processes significantly. One of the typical drawbacks of the conventional NO treatment is to introduce hole trapping sites [1] probably in near-interface oxide. In contrast, we found that the H2O-POA processes can reduce Dit while avoiding the formation of hole traps. We fabricated MOS capacitors on p-type 4H-SiC substrate with H2O-POA to examine the negative gate bias stress effects on Vfb. As a result, Vfb stability was significantly better for H2O-POA than NO-annealed one, as long as H2O-POA process was conducted in H2O+N2 ambient (w/o intentional introduction of O2). In contrast, when we introduce some O2 into H2O-POA ambient, the Vfb stability was significantly deteriorated which would be consistent with what has been often reported for wet or pyrogenic oxidized SiC MOS interface [2]. These results clearly indicate that control of oxygen partial pressure is crucial to suppress the defect formation in near-interface oxide by SiC wet oxidation processes.

In conclusion, we have clarified the essential differences between O2-oxidized SiC interface and H2O-oxidized one, and systematically investigated the impacts of H2O-annealing to grow an ultrathin interface layer from the view point of NMOSFET channel mobility enhancement. Such process is also effective for PMOSFET channel property improvement. The O2-content in H2O-annealing ambient was found to be a crucial factor to suppress the oxide trap formation by the annealing.

References

[1] J. Rozen et al., IEEE Trans. Electron Dev. 58, 3808 (2011).

[2] M. Okamoto et al., Appl. Phys. Express 5, 041302 (2012).

[3] H. Hirai and K. Kita, Appl. Phys. Lett. 110, 152104 (2017).

[4] H. Hirai and K. Kita, Appl. Phys. Lett. 113, 172103 (2018).