bluuebunny/crossref_metadata_2025 huggingface dataset:
A Novel Mathematical Model for the Study of Electrochemical Nucleation of Metals on Foreign Substrates from the Analysis of Potentiostatic Current Transients
Authors: Vargas Tomás , Colet Melanie , Salgado José C.
Published: April 2010

A numerical model has been developed in order to characterize the kinetics of electrochemical nucleation processes using chronoamperometric techniques. The main purpose has been to overcome the limitations of the Scharifker-Mostany model which is currently used to determine kinetics parameters and to reproduce current density profiles. The proposed model was validated using chronoamperometric data obtained for copper nucleation on gold electrodes in CuSO4 - H2SO4 solutions at pH 1.0, 25 ºC with 0.05 M copper concentrations for overpotentials in the range -100 and -300 mV.
Modeling the Kinetics of Anodic Dissolution of Chalcopyrite based on Electrochemical Measurements Conducted on Chalcopyrite Particle Electrodes
Authors: Jordan Héctor , Vargas Tomás
Published: April 2010

Anodic dissolution of chalcopyrite was studied with an electrochemical technique that allows direct measurements of anodic dissolution current in small chalcopyrite particles. Experiments were conducted with a working electrode made of a monolayer of chalcopyrite particles pressed onto an adhesive conductive carbon tape. Potentiostatic anodic dissolution experiments of 8 hr duration were conducted in deoxygenated iron-free sulfuric acid solutions at pH 1.7 and 70 ºC, at potential values of 0.55, 0.6, 0.7, 0.8 and 0.9 V/SHE. Results showed that anodic dissolution of chalcopyrite involves two main reactions. First, chalcopyrite is anodically dissolved while reacting with protons through a 2 electron reaction which results in the formation of intermediate polysulphide compounds and dissolution of copper and iron. Secondly, the polysulphide intermediate layer is further oxidized to elemental sulfur or sulfate which involves a much larger number of electrons. The kinetics of both reactions is interdependent and controlled by the applied potential.
Using Electrochemical Impedance Spectroscopy to Investigate Gold Dissolution in Thiourea and Thiocyanate Acid Solutions
Authors: Yang Xiyun , Moats Michael S. , Miller Jan
Published: April 2010

Gold dissolution in acidic solutions containing thiourea (Tu) and thiocyanate was studied using linear sweep voltammetry (LSV) and electrochemical impedance spectroscopy (EIS). In the presence of Tu, but in the absence of thiocyanate, passivation of gold occurred due to thiourea adsorption. When the solution also contained thiocyanate, passivation was significantly alleviated and gold dissolution enhanced. EIS revealed only one capacitive loop at 0.3 and 0.4V vs. SCE. The combination of the lixiviants lowered the polarization resistance for gold dissolution. A molar SCN:Tu ratio of 5:1 produced the lowest polarization resistance.
Electrochemical Determination of Minor Elements in Zinc Flotation Concentrates
Authors: Meléndez Angel M. , Hernández-Gómez Alejandra , Lara Carlos , González Ignacio
Published: April 2010

Characterization of complex assemblages of sulfides, such as ores or concentrates, is critical to pre-mine planning and post-mine waste characterization. An inexpensive and rapid method based on electrochemical detection is proposed to determine minor phases, that are usually associated with sphalerite (or marmatite), in zinc flotation concentrates. The information achieved by this method has been compared with the chemical and mineralogical composition obtained from X-ray fluorescence (XRF), X-ray diffraction (XRD) and scanning electron microscope (SEM). This methodology is applied to analyze galena, pyrite, chalcopyrite, pyrrothite and anglesite, in six zinc concentrates from different Mexican mine sites. With this novel experimental strategy it is possible to determine amounts of galena less than 1 %. Galvanic coupling between galena and pyrite interferes in the determination of pyrite when the galena content reaches 10 % in the concentrate.
Evaluation of the Effect of Copper Electrowinning Parameters on Current Efficiency and Energy Consumption Using Surface Response Methodology
Authors: Khouraibchia Youness , Moats Michael S.
Published: April 2010

The effect of various parameters on the current efficiency and energy consumption during copper electrowinning were studied under relevant conditions to the industrial operations using statistical analysis with the aim of developing statistical models that describe the variation of current efficiency and energy consumption during copper electrowinning. The current efficiency was found to be affected by the ferric concentration, the copper concentration, the current density and the interaction between these parameters. The energy consumption was proved to be a function of the ferric concentration, the copper concentration and the interaction existing between them. These models were proved to predict laboratory test results as well as the output of industrial operations with high accuracy.
Electrodeposition of Nickel from Sulfamate Effluents
Authors: Kelsall Geoff H. , Kovaleva Anna
Published: April 2010

Nickel sulfamate (amidosulfonate) solutions are widely used for industrial nickel plating, when bright electrodeposits with low stress are required. Partial decomposition of sulfamate with decreasing pH below ca. 2.5 degrades the properties of nickel electrodeposits, decreases charge yields and results in spent solutions, from which nickel must be recovered before they could be discharged to sewers. Results are reported for charge yields for nickel recovery from industrial sulfamate effluent, using an electrochemical reactor operating at constant current in batch recycle mode, and incorporating a nickel mesh cathode, platinised titanium anode and cation-permeable membrane to prevent anodic oxidation of sulfamate. The decrease in the charge yield from 0.99 after 3 hours to ca. 0.5 after 14 hours, resulted primarily from time-dependent catholyte pH, due to anodic oxygen evolution causing the ratio of proton to sodium ion transport through the membrane to increase with time.
Application of Current-Pulse Techniques to Analysis of Anode Gas Film Behavior in a Hall-Heroult Cell
Authors: McGregor Kathie , Snook Graeme A. , Urban Andrew J. , Lanyon Marshall R.
Published: April 2010

There is increasing pressure on aluminium smelters to reduce energy consumption in Hall-Heroult cells, for both cost and environmental considerations. A component of the cell voltage that is not well understood is the bubble-induced voltage drop at the anode, which has been estimated to be ~0.25 V. It is very difficult to measure the bubble resistance in an aluminium reduction cell - a variety of approaches have been attempted, with mixed success. We have recently developed a method, based on a current-pulse technique, that measures the dynamic ohmic equivalent series resistance (ESR) due to bubble evolution during an electrolysis reaction. The measurement can also be easily adapted to give the cell capacitance, which can give an assessment of the changes in anode surface area, e.g., anode bubble coverage. Application of these techniques to a lab-scale Hall-Heroult cell will be reported.
Depolarized Gas Anodes for Electrowinning of Metals in Molten Salts
Authors: Xiao Saijun , Mokkelbost Tommy , Haarberg Geir M. , Ratvik Arne P. , Zhu Hongmin
Published: April 2010

Constant current electrolysis of molten CaCl2-NaCl (70-30 mol %) containing CaO and AgCl at 953 K was carried out with Pt gas anode and a carbon cathode. A novel concept was tested of introducing an oxidizable gas, hydrogen, to depolarize the Pt anode, resulting in the anode potential, and hence the cell voltage, decreasing by 0.3 V when the anode was fed with hydrogen.
Direct Electrolysis of Molten Lunar Regolith for the Production of Oxygen and Metals on the Moon
Authors: Sirk Aislinn H. , Sadoway Donald R. , Sibille Laurent
Published: April 2010

The feasibility of producing oxygen by direct electrolysis of the molten lunar regolith at 1600 C was investigated and the generation of usable oxygen gas at the anode and concomitant production of iron and silicon at the cathode was successfully achieved from the tightly bound oxide mix. The current efficiency for different melt chemistries, corresponding to different degrees of electrolysis of the regolith, was measured during the course of electrolysis by on steam analysis of oxygen gas and scale-up from thin wire electrodes to plate and disc electrodes was achieved.
Graphene RF Transistor Performance
Authors: Jenkins Keith A. , Lin Yu-ming , Farmer Damon , Dimitrakopoulos Christos , Chiu Hsin-Ying , Valdes-Garcia Alberto , Avouris Phaedon , Grill Alfred
Published: April 2010

Recent excitement about graphene as a possible material for high-frequency electronics has lead to demonstrations of high-frequency field-effect transistors (FETs) in the last two years. Although graphene FETs operate by a different principle than silicon MOSFETs, and have different dc characteristics, their ac properties are quite similar. Hence the high intrinsic mobility of graphene leads to the expectation of high frequency operation of gated graphene FETs. Demonstrations of frequency response in the GHz regime have been shown using both exfoliated flakes and synthesized graphene. An intrinsic cut-off frequency as high as 100 GHz has been achieved in a 240-nm-gate graphene FET fabricated on a 2" wafer of epitaxially-grown graphene. This value exceeds that of Si MOSFETs at the same gate length, illustrating the potential of graphene for RF applications.
Novel Device Concepts for Nanotechnology: The Nanowire Pinch-Off FET and Graphene TunnelFET
Authors: Sorée Bart , Magnus Wim , Szepieniec Mark , Vandenberghe William , Verhulst Anne , Pourtois Geoffrey , Groeseneken Guido , De Gendt Stefan , Heyns Marc
Published: April 2010

We explain the basic operation of a nanowire pinch-off FET and graphene nanoribbon tunnelFET. For the nanowire pinch-off FET we construct an analytical model to obtain the threshold voltage as a function of radius and doping density. We use the gradual channel approximation to calculate the current-voltage characteristics of this device and we show that the nanowire pinch-off FET has a subthreshold slope of 60 mV/dec and good ION and ION/IOFF ratios. For the graphene nanoribbon tunnelFET we show that an improved analytical model yields more realistic results for the transmission probability and hence the tunneling current. The first simulation results for the graphene nanoribbon tunnelFET show promising subthreshold slopes.
Formation and Transport of Correlated Electron States at Room Temperature in Graphene Bilayers
Authors: Shumway John B. , Gilbert Matthew
Published: April 2010

We discuss a methodology for calculating the interlayer transport characteristics of electron-hole bilayer graphene at spontaneous coherence using path integral Monte Carlo and recursive scattering matrices at room temperature. We find transport characteristics very similar to that of the quantum Hall bilayer case in that there is a large peak in the differential interlayer conductance at low interlayer bias which decays rapidly as the bias is increased.
Infrared Imaging of Heat Dissipation in Graphene Transistors
Authors: Bae Myung-Ho , Ong Zhun-Yong , Estrada David , Pop Eric
Published: April 2010

We use infrared microscopy to image the temperature profile of graphene field-effect transistors functioning at high bias. We find a peak in the temperature profile, i.e. a "hot spot" appears near the drain (anode) electrode of the graphene sheet at high current while operating in the hole-doped regime. The hot spot position shifts on the graphene sheet by tuning the gate voltage into an ambipolar transport regime. This shows a direct demonstration and manipula-tion of Joule heating in graphene transistors. Comparison with a comprehensive electrical-thermal model leads to additional insight into graphene transport and energy dissipation physics.
Extraordinary Thermal Conductivity of Graphene: Possible Applications in Thermal Management
Authors: Balandin Alexander A. , Ghosh Suchismita , Nika D. L. , Pokatilov E. P.
Published: April 2010

We review the results of our experimental and theoretical study of thermal conductivity of graphene. Using an original optical measurement technique we discovered that thermal conductivity of suspended graphene flakes is extremely high and can exceeds that of bulk graphite and carbon nanotubes. The high value of thermal conductivity of graphene and its dependence on the graphene flake size were explained within the framework of Klemens theory. Superior thermal properties of graphene benefit all proposed electronic applications of graphene and may lead to the new high-heat flux thermal management solutions for advanced electronics.
Characterization of Impurities in Bilayer Graphene
Authors: Cockayne Eric
Published: April 2010

Experimental scanning tunneling microscopy (STM) images of bilayer graphene grown via thermal decomposition of Si from SiC display local patterns that suggest the presence of certain types of defects. One common pattern shows threefold (pseudo-sixfold) symmetry, a dark contrast in the center, and a local sqrt(3) by sqrt(3) (rotated 30 degrees) modulation of the graphene structure. Density functional theory calculations were used to study the electronic structure of bilayer graphene with Mo and Si impurities present in various positions compatible with this pseudo-sixfold symmetry. STM images were simulated, based on the the local density of states. The best agreement with experiment is found for an intercalated Mo atom below the center of a hexagon in the top layer and above a C in the bottom layer. While perfect agreement is not obtained, the results suggest that a state or states involving hybridization between m (not equals) 0 transition metal d states and C 2p states is responsible for the defect patterns observed in the STM image.
Optical and Electrical Properties of Graphene Percolated Networks from Liquid Exfoliation of Graphite
Authors: Obrzut Jan , Pristinski Denis , Yoonessi Mitra
Published: April 2010

Thin films obtained from liquid phase exfoliation of graphite exhibit the conductivity and transparency properties of percolated networks having an interconnectivity distance of about 2 micrometers to 3 micrometers. The mean radius of the platelets in solution determined by dynamic light scattering measurements was found to be in the range of about 3 micrometers. Representative transmittance electron microscope images show evidence of individual graphene sheets. The platelets have an irregular shape with apparent folding and bending, which contributes to disorder and imperfections of the films as revealed by the Raman spectra. The scaling universal exponents describing the percolation transition from an insulating, 100 % transparent state, to a transparent, conducting state are consistent with the two-dimensional (2D) percolation model. These findings provide a framework for engineering the optical and electrical properties of graphene networks for technological applications where flexibility, transparency, and conductivity are required.
Reconfigurable Graphene Logic
Authors: Tanachutiwat Sansiri , Lee Ji Ung , Wang Wei
Published: April 2010

In this paper, we introduce a novel reconfigurable graphene logic based on graphene p-n junctions. In this logic device, switching is accomplished by using co-planar split gates that modulate the properties that are unique to graphene, including ambipolar conduction, electrostatic doping, and angular dependent carrier reflection. In addition, the use of these control gates can dynamically change the operation of the device, leading to reconfigurable multi-functional logic. A device model is derived from carrier transmission probability across the p-n junction for allowing quantitative comparison to CMOS logic. Based on this model, we show that the proposed graphene logic has significant advantages over CMOS gate in terms of area, delay, power, and signal restoration. Furthermore, the device utilizes a large graphene sheet with minimal patterning, allowing facile integration with CMOS circuits, for potential CMOS-graphene hybrid circuits.
Trap-Assisted Tunneling in Deep-Submicron Ge pFET Junctions
Authors: Eneman Geert , Bargallo Gonzalez Mireia , Hellings Geert , De Jaeger Brice , Wang Gang , Mitard Jerome , DeMeyer Kristin , Claeys Cor , Meuris Marc , Heyns Marc , Hoffmann Thomas , Simoen Eddy
Published: April 2010

This work focuses on the analytical description of junction leakage in the low-voltage range (<1V) of short-channel HDD junctions, where the dominant contribution comes from the TAT regime. Starting from diodes with varying area/perimeter ratios, the area leakage contribution to the total junction leakage is experimentally determined for junctions with varying halo conditions and threading dislocation density (TDD). On the other hand, the Synopsys software of Sentaurus-Process and MEDICI was used to verify the electrical models.
Tetragonal ZrO2-Gated Ge MOS Capacitors Fabricated on Si Substrate
Authors: Wu Min-Lin , Chen Lun-Lun , Wu Jia-Rong , Wu Yung-Hsien
Published: April 2010

A tetragonal ZrO2 film stabilized by incorporating Ge atoms from an underlying Ge layer through a thermal annealing was investigated as the gate dielectric for Ge MOS devices. Formation of a tetragonal ZrO2 film and admixture of Ge atoms into a ZrO2 film were respectively confirmed by x-ray diffraction (XRD) and x-ray photoelectron spectroscopy (XPS) analysis. A sole tetragonal ZrO2 film was found to have a dielectric constant of 36.8 and demonstrated effective oxide thickness (EOT) down to 1.06 nm with good leakage current. However, it comes at the price of suffering poor interfacial quality. A more ideal gate stack for Ge MOS devices can be obtained by integrating a tetragonal ZrO2 film with an ultrathin thermal GeO2 layer to achieve a smaller EOT with satisfactory interfacial quality concurrently. Further improved gate stack performance can be accomplished by NH3 or H2 annealing to passivate grain boundaries.
The Effect of Applied Magnetic Fields on Silicon Transport in Liquid Phase Diffusion Growth of SiGe
Authors: Armour Neil , Dost Sadik
Published: April 2010

The effect of applied rotating and static magnetic fields on silicon transport during the liquid phase diffusion growth of SiGe was experimentally studied. The fields were examined on their own and in combination. A 72-hour growth period was used to produce the concentration profiles. Single crystal growth was not of primary concern. The effect of the magnetic fields on the thermal field in the system was significant, often inhibiting good growth conditions. The static field had the effect of slowing transport when compared with a sample processed with no applied field. The application of rotating magnetic field leads to additional mixing and enhances transport in the melt compared with that with no field. The combined field exhibited a similar concentration profile to the rotating field alone.
InGaAs Heterostructure FETs (HFETs) for Beyond-Roadmap CMOS
Authors: Kim Dae-Hyun , A. del Alamo Jesus
Published: April 2010

The increasing difficulties for further scaling down of Si CMOS is bringing to the fore the investigation of alternative channel materials. Among these, III-V compound semiconductors are very attractive due to their outstanding electron transport properties. This paper reviews the prospects and the challenges for a III-V transistor technology for Beyond-roadmap CMOS applications.
Novel Ga(NAsP)-Based Heterostructures for the Integration of Optoelectronic Functionalities on (001) Si-Substrate
Authors: Kunert Bernardette , Volz Kerstin , Stolz Wolfgang
Published: April 2010

The novel direct band gap, dilute nitride Ga(NAsP)-material system allows for the first time the monolithic integration of a III/V laser material lattice matched to Si substrate. This lattice-matched approach offers the possibility for a high-quality, low defect density integration of a III/V-laser material potentially leading to long-term stable laser devices on Si-substrate. The broad area laser structures consist of pseudomorphically strained active Ga(NAsP)/(BGa)(AsP) multi-quantum-well heterostructures (MQWHs) embedded in thick doped (BGa)P waveguide layers, grown by a specific low-temperature metal organic vapour phase epitaxy (MOVPE) process on (001) Si-substrate. This paper will present and discuss the current status of the material and device optimization to realise electrical injection laser diodes as a basis for Si-photonics based optoelectronic integrated circuits (OEICs) with novel functionalities.
Hetero-Epitaxy of III-V Compounds by MOCVD on Silicon Substrates
Authors: Tang Chak Wah , Zhong Zhenyu , Lau Kei May
Published: April 2010

Over the past few years, we have successfully developed heteroepitaxial techniques to grow device quality III-V and III-nitride structures on silicon substrates by MOCVD. We have demonstrated very good device performance with conventional III-V HEMT (High Electron Mobility Transistor) structures grown and fabricated on Si substrates. These devices were nearly latticematched to InP. Unlike previous approaches of using a Ge buffer, compositional grading, or superlattices, we adopted similar techniques that have been well developed for hetero-epitaxy of III-nitrides on sapphire substrates. A well-tuned nucleation layer deposited at low-temperature followed by regular high-temperature epitaxy is effective in producing good quality layers for device applications. Aided by in-situ photoreflectance anisotropy and other material characterization tools, device quality epi-layers can be grown and very good transistor characteristics were measured.
Merging Standard CVD Techniques for GaAs and Si Epitaxial Growth
Authors: Sammak Amir , De Boer Wiebe , Van den Bogaard Alex , Nanver Lis
Published: April 2010

A commercial Chemical Vapor Deposition (CVD) system, the ASMI Epsilon 2000 designed for Si and SiGe epitaxy, has, for the first time, been equipped for the growth of GaAs compounds in a manner that does not exclude the use of the system also for Si-based depositions. With the new system, intrinsic, Si-doped and Ge-doped GaAs epitaxial layers with excellent quality have been grown on GaAs substrate wafers by the decomposition of trimethylgallium (TMGa) and AsH3 in the reactor at reduced pressure and at temperatures in the 600-700°C range. A low AsH3 concentration, 0.7 % in H2, is used as one of the precursors, which has the added advantage that the severe safety precautions always associated with MOCVD systems need not be implemented.
(Invited) Silicon Photonics Technologies for Monolithic Electronic-Photonic Integrated Circuit
Authors: Lo Guo-Qiang , Ang Kah-Wee , Liow T. Y. , Fang Q. , Zhang J. , Zhu S. Y. , Song J. F. , Xiong Y. Z. , Ren F. F. , Yu MingBin , Kwong D-L.
Published: April 2010

Severe information latency and power consumption are key technology challenges facing the traditional copper interconnects which impose tremendous constraints to keep up with the performance roadmap driven by the Moore's Law. Converging electronic and photonic integrated circuits (EPIC) on a single chip platform to enable functional diversification emerges as one promising approach which could be realized by taking the advantage of low energy and huge data capacity of optical interconnects. By leveraging on the wealth of CMOS technology know-how and infrastructures, the fundamental photonics building blocks constructing the EPIC platform have been successfully developed in this work. We present an overview on the current status of this critical technology development and provide an outlook for the monolithic integration of Si micro- and nano-photonics. It is our belief that a seamless integration of EPIC is poised to become a promising technology to meet the bandwidth and energy requirements of future data communication
Novel Noncontact Approach to Characterization of Mobility in Inversion Layers Using Corona Charging of Dielectric and SPV Monitoring of Sheet Resistance
Authors: Everaert JL. , Rosseel E. , Meszaros A. , Kis-Szabo K. , Tutto P. , Pap A. , Pavelka T. , Wilson Marshall , Findlay A. , Edelman P. , Lagowski J.
Published: April 2010

A recently proposed noncontact method for mobility measurement in an inversion layer created by corona charging is modified taking advantage of two unique features of corona-voltage metrology; 1. the exact knowledge of the corona charge placed on dielectric surface and 2. the straightforward determination of the semiconductor space charge potential barrier, Vsb. These features, not available in MOS measurements simplify determining the inversion charge, Qinv. Combined with ac-surface photovoltage measurement of the inversion layer sheet resistance, Rs, they are a basis for novel simplified approach to mobility measurement. The method is illustrated using SiO2 and high-k stacked dielectrics on p-Si.
(Invited) Advanced (Millisecond) Annealing in Silicon Based Semiconductor Manufacturing
Authors: Govindaraju Sridhar , Shih Chen-luen , Ramanarayanan Panchapakesan , Lin Yi-Hung , Knutson Karson
Published: April 2010

Rapid thermal annealing has taken a new turn at the beginning of this century with the advent of term "advanced annealing". Although the annealing techniques are a few decades old, they have not seen many applications in the semiconductor industry until recently, primarily due to the complexity of the tools involved and their mechanical interaction with silicon wafers. The tolerance for dopant diffusion has reduced significantly from one ITRS node to next. Advanced anneals rely primarily on achieving super-high temperatures (>1100oC) in very short periods of time (milliseconds). These anneals provide the relevant thermal budget for dopant activation processes with minimal diffusion, thus making them attractive. However, as process integration has become more complex additional challenges are encountered by super-high temperature anneals at the recent technology nodes. Additionally, these annealing techniques impart severe mechanical stress on wafers by heating the wafers at rates >10^5 oC/s. This paper will focus on simulation and experimental verification of stress that is experienced by silicon wafers during a millisecond annealing process
Advanced Source/Drain Engineering for MOSFETs: Schottky Barrier Height Tuning for Contact Resistance Reduction
Authors: Yeo Yee-Chia
Published: April 2010

Contact resistance is becoming an important limiting factor for achieving high MOSFET drive current and speed in future technology nodes. In this paper, we review the technology solutions for reducing the contact resistance between a metal silicide contact and the source/drain region. Several new approaches for decreasing the electron and hole barrier heights between the source/drain region and the silicide layer in n-FET and p-FET, respectively, will be examined. Integration of these approaches in advanced device architectures will be discussed.
Oxygen Transport in High-k Metal Gate Stacks and Physical Characterization by SIMS Using Isotopic Labeled Oxygen
Authors: Hopstaken Marinus J. , Bruley John , Pfeiffer Dirk , Copel Matthew , Frank Martin M. , Cartier Eduard , Ando Takashi , Narayanan Vijay
Published: April 2010

We review the different diffusion pathways for oxygen in high-k/metal gate (HK/MG) stacks and the impact on electric characteristics such as equivalent oxide thickness (EOT), leakage (Jg), and threshold voltage (Vt). We have investigated the distribution and migration of oxygen in HK/MG stacks at different stages of processing using Secondary Ion Mass Spectrometry (SIMS) depth profiling, in combination with 18O isotope labeling. We demonstrate that use of isotope labeling is instrumental to detect low quantities of O and to follow exchange reactions between different O-sources in the HK/MG stack. We reveal that O-atoms can rapidly diffuse along grain boundaries in titanium nitride (TiN) electrodes at intermediate temperatures. This enables to control the O-distribution throughout the HK/MG stack and the related electrical device characteristics by engineering the chemical composition of the stack and/or by choosing the appropriate processing conditions.
Physical and Electrical Properties of MOCVD Grown HfZrO4 High-k Thin Films Deposited in a Production-Worthy 300 mm Deposition System
Authors: Consiglio Steven P. , Wajda Cory , Nakamura Genji , Clark Robert , Aoyama Shintaro , Leusink Gert
Published: April 2010

This work presents a detailed investigation of physical and electrical properties of HfZrO4 thin films deposited by metallorganic chemical vapor deposition in a production-worthy 300 mm deposition system at a wafer temperature of either 380°C or 480°C. The HfZrO4 growth rate was observed to be the same for both deposition temperatures. An increase in film density and decrease in film impurities with increasing temperature was also corroborated by improved Quantox measured leakage as well as increase in metal coverage rates. HfZrO4 was compared with HfO2 deposited at the same deposition conditions in MOS capacitor structures. A boost in k value was observed for HfZrO4 (kHfZrO4=33.6) compared to HfO2 (kHfO2=16.1) at the expense of increased interfacial EOT. Additionally, in our deposition system an excellent HfZrO4 wafer-to-wafer repeatability (0.86%) was observed for a mean thickness of 19 Aå over a 50 wafer run.
(Invited) Rare Earth Materials for Semiconductor Applications
Authors: Van Elshocht Sven , Adelmann Christoph , Popovici Mihaela , Swerts Johan , Delabie Annelies , Nyns Laura , Shi Xiaoping , Tielens Hilde , Brijs Bert , Pourtois Geoffrey , Schram Tom , Pierreux Dieter , Maes Jan-Willem , Hardy An , Van Bael Marlies K. , Kittl Jorge A.
Published: April 2010

Rare earth based oxides are researched for logic and memory semiconductor applications. Their hygroscopic nature and tendency to form silicates make them a challenging class of materials in respect of processing and stability. Using LaAlO3, LuAlO3, and GdAlO3 we have explored the impact of the oxidant, H2O or O3, during deposition, their stability when exposed to air, and their stability towards silicate formation. We show that the rare earth content of the material has a significant impact on the uniformity of the process using water-based atomic layer deposition as well as on the material stability during air exposure. We also describe silicate formation for these materials and demonstrate that an oxidation process can be used to make silicate layers with well-controlled composition.
Investigation of Band Gap, Band Alignment and Bonding States of the (TbxSc1-x)2O3/Si System
Authors: Geppert Irina , Eizenberg Moshe , Bojarczuk Nestor A. , Edge L. , Copel Matthew , Guha Supratik
Published: April 2010

The electrical and microstructural characteristics of (TbxSc1-x)2O3/Si dielectric films (x=0, 0.5, 1) prepared by the molecular beam deposition technique on silicon substrates were investigated as a function of composition. X-ray photoelectron spectroscopy was used to determine the band gap, as well as the energy band alignment with Si and the chemical structure of the films. An interfacial layer formation between Si and the dielectric films was examined by high resolution TEM analysis. The electrical properties of MOS structures were correlated with the chemical bonding states of the films.
Electrical Characterization of ALD Al2O3 and HfO2 Films on Germanium
Authors: Tantraviwat Doldet , Low YeeHooi , Baine Paul , Mitchell Neil S. , McNeill David W. , Armstrong Brian M. , Gamble Harold
Published: April 2010

Al2O3 and HfO2 films were deposited on germanium substrates by atomic layer deposition (ALD) and analyzed by MOS capacitor electrical characterization. In-situ plasma nitridation performed prior to ALD was found to improve the stability of the interface. For Al2O3/GeON/Ge capacitors, a 450°C anneal in nitrogen ambient reduced hysteresis and oxide fixed charge to 90 mV and 1012 cm-2 respectively, with low leakage current density. On the contrary, degradation was observed for un-nitrided Al2O3/Ge capacitors after 300 and 400°C post-metal anneals. HfO2/GeON/Ge capacitors benefitted from a 400°C densification anneal but exhibited degradation after post-metal anneals at temperatures greater than 300°C. This degradation is attributed to the influence of Al electrodes on the HfO2 gate stack. HfO2 is considered to be a suitable material for the gate stack and Al2O3 for the buried dielectric in a GeOI structure.
(Invited) Electrical and Physical Properties of High-k Gate Dielectrics on InxGa1-xAs
Authors: Vogel Eric , Sonnet Arif , Galatage Rohit , Milojevic Marko , Hinkle Chris , Wallace Robert M.
Published: April 2010

The electrical and physical properties of high-k gate dielectrics on InxGa1-xAs with different surface passivation techniques have been studied. A model based on disordered-induced gap states is described which explains the frequency dispersion behavior observed in capacitance-voltage measurements. InxGa1-xAs MOSFETs with different ex-situ surface passivation techniques and HfO2 gate dielectric were fabricated and characterized. The results of transport characteristics are compared and correlated to associated physical measurements.
Structural and Electrical Properties of High-k HoTiO3 Gate Dielectrics
Authors: Pan Tung-Ming , Yen Li-Chen , Hu Chia-Wei , Chao Tien-Sheng
Published: April 2010

We developed a high-k HoTiO3 gate dielectric deposited on Si (100) through reactive cosputtering. They found that the HoTiO3 dielectrics annealed at 800oC exhibited excellent electrical properties such as high capacitance value, small density of interface state, almost no hysteresis voltage, and low leakage current. This phenomenon is attributed to the decrease in intrinsic defect due to the formation of well-crystallized HoTiO3 structure and composition.
Nondestructive Characterization of Ge Content and Ge Depth Profile Variations in Si1-xGex/Si by Multiwavelength Raman Spectroscopy
Authors: Yoo Woo Sik , Ueda Takeshi , Ishigaki Toshikazu , Kang Kitaek
Published: April 2010

A multi-wavelength, micro Raman spectroscopy system was designed and used for non-contact and non-destructive thickness and Ge content characterization of Si1-xGex/Si. The thickness and Ge content estimated by Raman measurements were compared to those values obtained from X-ray diffraction (XRD) and X-ray reflectance (XRR) measurements for cross-reference and showed very good agreement. The multi-wavelength excitation capability of the Raman system allows non-contact and non-destructive probing of Ge concentration as well as Si stress in Si1-xGex/Si along the depth direction. The Ge concentration gradient of small size test pads (as small as 10μm x 10μm) in depth direction were successfully measured using the multi-wavelength Raman system. The multi-wavelength Raman system with high spectral and spatial resolution is found to be very attractive and powerful for characterizing advanced semiconductor materials, such as Si1-xGex/Si and strained Si. It is also very useful for monitoring and controlling process equipment and process conditions.
Hole-Trapping Mechanism and SILC of Dual-Layer nc-ITO Embedded ZrHfO High-k Nonvolatile Memories
Authors: Lin Chen-Han , Yang Chia-Han , Kuo Yue
Published: April 2010

MOS capacitors containing singe- and dual-layer nc-ITO embedded ZrHfO high-k gate dielectric films were fabricated and characterized for nonvolatile memory functions and reliability. The addition of the second nc-ITO into the high-k dielectric enhanced the memory function of the devices, e.g., a larger memory window, more sensitive to the gate bias voltage, and longer charge retention time. From the SILC test, the dual-layer nc-ITO sample also showed more pronounced Coulomb blockade phenomena than the single nc-ITO embedded sample, which is consistent with the hole-trapping characteristics. The novel charge storage characteristics of the dual-layer nc-ITO embedded high-k make it suitable for future memory applications.
Electrical Extraction of One Dimensional MOSFET Doping Profiles by Threshold Voltage Measurement
Authors: Park Hyunho , Lee Kong-Soo , Jeong Hanwook , Kwon Seok Il , Kim Kwang-Ryul , Choi Byoungdeog
Published: April 2010

The doping profiles of lightly doped semiconductors are most commonly determined from capacitance-voltage measurements for junction devices. Such C-V measurements work well for large-area devices and lightly doped device, but they are not very suitable for high doping concentrations found in heavily doped devices (1). And the channel region under the MOSFET gate has an additional limitation. The small gate area has very small capacitances that are difficult to measure, making C-V based techniques difficult or impossible. In view of these experimental difficulties, so we tried electrical doping profiling measurement for MOSFET with short gate length and ultra thin oxide thickness and checked an agreement with ISE simulation results.
Electrical Characterization of High-Pressure Reactive Sputtered Sc2O3 Films on Silicon
Authors: Castán Helena , Dueñas Salvador , Gómez Alfonso , García Héctor , Bailón Luis , Feijoo Pedro , Toledano-Luque M. , Del Prado Álvaro , San Andrés Enrique , Lucía María Luisa
Published: April 2010

Al/ScOx/NiOx/n-Si and Al/ScOx/SiOx/n-Si metal-insulator-semiconductor capacitors have been electrically characterized. Scandium oxide was grown by high pressure sputtering on different substrates to study the dielectric/insulator interface quality. The substrates were silicon nitride and native silicon oxide. The use of nitrided silicon interfacial layer between the silicon substrate and the scandium oxide layer improves interface quality, as interfacial state density and defect density inside the insulator are decreased.
Investigation of the Interface Oxide of Al2O3/HfO2 and HfO2/Al2O3 Stacks on GaAs(100) Surfaces
Authors: Cho Young-Dae , Suh Dong-Chan , Lee Yongshik , Ko Dae-Hong , Chung Kwun Bum , Cho Mann-Ho
Published: April 2010

The physical and the electrical properties of ALD Al2O3/HfO2 and HfO2/Al2O3 stacks on GaAs systems before after heat treatment are investigated. Results reveal that the addition of Al2O3 layers suppresses not only the poly-crystallization of HfO2 even after heat treatment, but also the formation of interfacial oxide. High-resolution transmission electron microscopy (HR-TEM) and X-ray photoelectron spectroscopy (XPS) analysis results are presented.
Dependence of SOI Properties on Memory Characteristics in a Cap-Less Memory Cell
Authors: Shim Tae-Hun , Kim Seong-Je , Kim Tae Hyun , Park Jea-Gun
Published: April 2010

The material property of silicon-on-insulator substrate affecting memory characteristic in Cap-less memory cell such as top silicon thickness, boron concentration, and a strain in channel was investigated to obtain higher memory margin. We demonstrated that the memory margin was maximized at specific top thickness and boron concentration, i.e., it was enhanced by 3.38 times at the top silicon thickness of 46.9 nm, compared with that at 15.5 nm, and also enhanced by 1.83 times at the boron concentration of 1.4e17 cm-3. Particularly, it was enhanced by 2.13 times with a bi-axial tensile strained channel.
Dopant Transport in Tungsten Silicide Buried Layers for Application in SSOI
Authors: Liao Shengzhou , Bain Michael , Baine Paul , Montgomery John , McNeill David W. , Armstrong Brian M. , Gamble Harold
Published: April 2010

The rapid diffusion of phosphorus and boron in WSi2 has been characterized using a novel Schottky Barrier test structure. Diffusivity of both dopant species was about 4-5 orders of magnitude higher than that reported in polycrystalline silicon. The dopant diffusivity is strongly dependent on the silicide morphology. Diffusivity measured in low temperature pre-annealed silicide is approximately an order of magnitude higher than in silicide pre-annealed at 1050°C. The dopant diffusivity in oxide lined silicide test structures was 3-4.3x10-10 cm2 s-1 at 900°C while polycrystalline silicon lined structures exhibited a higher value at 900°C of 1.5x10-9 cm2s-1. This is attributed primarily to greater segregation of dopant to the oxide-silicon interface compared to the polysilicon-silicide interface. Boron exhibited a higher diffusivity in WSi2 with diffusivity in the range 4x10-9 cm2s-1 - 1x10-8 cm2s-1 at 900°C.
Low Temperature Epitaxy of Si and SiGe Using Disilane Based Chemistry for Electronic Purposes
Authors: Damlencourt Jean-Francois
Published: April 2010

Low temperature epitaxy of Si and SiGe has been investigated with a Disilane based precursors. The evolution of the Si growth rate with the temperature shows some specificity: the growth rate is independent of the growth temperature in between 700°C and 600°C and remains very high at low temperature (below 500°C). Concerning the SiGe growth, the deposition rate is higher than the one obtained with Silane. The Ge incorporation seems to be independent of the growth temperature. This leads to a major advantage for the wafer uniformity and especially for wafer sizes up to 300mm.
Analytical Characterization of ALD Thin Film Precursors
Authors: Clancy Phil , Milstein Lisa S. , Gotts Hugh , Cowles Dan , Chitrathorn Piyamit , Wan Zhiwen , Vanatta Lynn , Bales Qingqing
Published: April 2010

Moore's Law compliance necessitates the use of high dielectric constant (k) (e.g. Hf, Ti, Zr, Ta) and low-k (e.g. silane chemistries) material thin films in place of traditional Si/SiO2 films. Chemical precursors of these films require characterization of trace-level impurities to avoid device failure. The reporting limits listed on precursor Certificates of Analysis require analytical methods such as inductively coupled plasma - mass spectrometry (ICP-MS) ion chromatography (IC) and gas chromatography - mass spectrometry (GC-MS), for determination of trace elements, chloride and precursor purity, respectively. Analytical challenges associated with characterizing these materials include precursor volatility, air and moisture sensitivity, parent element ICP-MS matrix effects and ICP-MS elemental and molecular interferences. In addition, sample preparation methods preceding the analyses must decompose the sample yet preserve the integrity and quantity of the analytes present in the original samples. This paper will describe analytical methods designed to meet these analytical challenges.
Electron Tunneling Between Si Quantum Dots and Two Dimensional Electron Gas under Optical Excitation at Low Temperatures
Authors: Sakurai Yoko , Takada Yukihiro , Iwata Juin-Ichi , Shiraishi Kenji , Nomura Shintaro , Muraguchi Masakazu , Endoh Tetsuo , Shigeta Yasuteru , Ikeda Mitsuhisa , Makihara Katsunori , Miyazaki Seiichi
Published: April 2010

We present results of the electron tunneling between Si-dots and the two-dimensional electron gas (2DEG) under the optical excitation at low temperatures, where modification of the 2DEG is caused by optical generation of the electron-hole pairs. We have found that the gate voltage for electron injection to Si-dots becomes remarkably smaller with increase in optical excitation intensity, while the gate voltage for electron emission shows little dependence. The difference in the observed dependences of the gate voltage for electron injection and emission process is explained our proposal which consider the geometrical matching of initial and final state electron wave functions
Hydrogen Implantation in Germanium
Authors: Low Yian Wei , Rainey Paul , Hurley Richard , Baine Paul , McNeill David W. , Mitchell Neil S. , Gamble Harold , Armstrong Brian M.
Published: April 2010

Hydrogen implantation of germanium is a promising technique for layer transfer. However, both the implantation process, and subsequent heat treatment can create defects in the transferred layer, which detrimentally effect the performance of devices fabricated on these transferred layers. In this study, implanted Germanium wafers were given various anneals and analysed optically and by spreading resistance, to gain insight on the nature of such defects. GeOI layers were produced by thermal splitting of implanted germanium wafers bonded to sapphire handle substrates.
Application of Atmospheric Plasma for Low Temperature Wafer Bonding
Authors: Low Yian Wei , Rainey Paul , Baine Paul , Montgomery John , Mitchell Neil S. , McNeill David W. , Gamble Harold , Armstrong Brian M.
Published: April 2010

An atmospheric plasma activation system has been employed to study its application on low temperature wafer bonding. High bond strength (> 2000 mJ/m2) is achieved by oxygen plasma activation on hydrophilic Si-Si and Si-SiO2 bonding at low temperature annealing. This technique has been proved to cause physical damage to thin SiO2 layers (< 0.5 µm) creating a high density of pin holes resulting in leaky oxides. When high resistivity substrates are employed the pin holes is reduced by nearly a factor of 7. A germanium disc bonded to plasma treated thin oxide on silicon was electrically connected to the substrate. The atmospheric plasma technique is currently best suited for silicon-silicon bonding, standard SOI, MMIC and MEMS technology.
Fabrication of High Electrical Performance NILC-TFTs Using FSG Buffer Layer
Authors: Chen Chien-Chih , Wu YewChung Sermon , Tung Teng-Fu , Wu Hung-Yu
Published: April 2010

Fluorinated-silicate-glass (FSG) was combined with Ni-metal-induced lateral crystallization (NILC) polycrystalline silicon thin-film transistors (poly-Si TFTs). It was found that the electrical performances were improved because the trap-state density was decreased by fluorine-ion passivation. Moreover, FSG-NILC-TFTs possess high immunity against the hot-carrier stress and, thereby, exhibit better reliability.
Improved Performance of MIC Poly-Si TFTs Using Driven-In Nickel Induced Crystallization with Cap SiO2 by F Implantation
Authors: Lai Ming-Hui , Wu YewChung Sermon , Tung Teng-Fu , Wu Hung-Yu
Published: April 2010

A cap oxide layer was employed to substantially decrease nickel residues and passivate the trap states of the devices. F+ implantation was used to drive Ni in α-Si layer to induce crystallization (DIC) process with cap oxide to reduce Ni concentration and minimize the trap-state density. As a result, DIC-TFT with cap oxide exhibit higher field-effect mobility, lower subthreshold slope, lower threshold voltage, higher on/off current ratio, and lower trap-state density (Nt) compared with conventional MIC TFTs.
Studies of Electron Trapping in ZnO Semiconductor
Authors: Chernyak Leonid , Flitsyian Elena , Shatkhin Maximilian , Dashevsky Zinovy
Published: April 2010

It has been recently discovered that electron injection into Phosphorus-, Lithium-, Antimony- or Nitrogen-doped ZnO semiconductor, using electron beam from a Scanning Electron Microscope, as well as a forward bias application to the p-n junction or Schottky barrier, leads to a multiple-fold increase of minority carrier diffusion length and lifetime (1-4). It has also been demonstrated that forward biasing a ZnO-based photovoltaic detector results in a several-fold responsivity enhancement due to a longer minority carrier diffusion length in the detector's p-region as a result of electron injection (5, 6). The observed electron injection effects were attributed to the charging of the meta-stable centers associated with the above-referenced impurities.
High Responsivity Ultraviolet Photodetector Based on p-GaN/i-ZnO Nanorod /n-ZnO:In Nanorod
Authors: Chen Chia-Hsun , Yan Jheng-Tai , Lee Ching-Ting
Published: April 2010

The p-i-n (p-GaN/i-ZnO nanorod/n-ZnO:In nanorod)-heterostructured nanorod photodetectors were fabricated using vapor cooling condensation method through anodic alumina membrane (AAM) plate. A conductive atomic force microscope system was employed to investigate the electrical properties of the single ZnO nanorod photodetector. The leakage current of the single p-i-n-heterostructured nanorod photodetector was lower than 5 pA for bias voltage up to 5V. The ultraviolet (360 nm)-visible (400 nm) rejection ratio was 66 and the photoresponsivity peaked at 360 nm was about 1461 A/W under reverse bias of -5V.