A parametric associative memory emulation
Authors: Dalrymple S. H. 
Published: April 2007

An experimental associative memory facility has been created by microprogramming a conventional computer. The microprogramming was done by expansion of an IBM 1130 emulation that was microcoded on a Digital Scientific Corporation META 4 computer. The associative memory (AM), as seen by the 1130 applications programmer, is an integral part of the computer with 54 machine instructions provided for its control and use.The structural characteristics of the apparent associative memory are parametrically defined to the emulation via a special SETUP command. This command may occur repeatedly within a program to dynamically alter the AM's characteristics or, indeed, to provide several different AM's. The characteristics that may be specified include the cell width (W) in 16-bit word increments, the number of cells (N), the locations in core memory to be used by the AM and its associated registers, and the memory protect status of these memory locations. The parameters are maintained in a fast scratch-pad memory, whence they are employed to control the AM emulation.Three pseudoregisters are used by the associative memory: (1) a data register (DR), which can hold the contents of one cell (i. e., W bits in length); (2) a response register (RR) N bits in length; and (3) an availability register (AR), also N bits in length.The data register provides the primary interface between the AM and the 1130 program. The response register is employed to indicate which cells in the AM have responded to a given search command. The availability register is used to indicate which cells are empty (or available) and which are to be considered whenever a search command is executed. The AM can be addressed either conventionally or associatively.The commands provided to utilize the AM fall into five categories: (1) register commands to manipulate the DR, RR, and AR; (2) fetch and store commands to store and retrieve information; (3) search commands to compare a given argument against the AM; (4) field-to-field search commands that compare two fields within each cell; and (5) test and branch instructions. Field specifications for search commands are defined through the use of pointer and length information contained within the command.Communication with the AM is via the DR. Search arguments and data to be stored are placed there, as are data retrieved from the AM. Searches permitted include match, no match, less than, less than or equal to, greater than, greater than or equal to, next lower, next greater, minimum, and maximum.The commands themselves, viewed as 1130 operators, may occupy either one, two, or three machine words, depending upon the operation, and may contain an address, one or two pointer specifications, one or two length specifications, a reset flag, or an immediate value, as required. Indexing is permitted for those operations having an address. The code-cracking mechanism of the 1130 emulation is used but is augmented to handle the three-word instructions. Microsubprograms are then executed for each emulated instruction or class of instructions.The META 4 computer on which the AM system was implemented is a flexible, logical processor that is controlled by an easily modified, random-access, read-only memory (ROM). Up to 32 general-purpose registers may be employed, together with three data buses (two source and one destination), an arithmetic-logical unit, and a shifter unit. Control is exercised at the gate level via microcode commands, 32 bits in length, in the ROM. Core memory is treated essentially as a peripheral with access via a pair of registers, one for data and the other for address information. The usual complement of peripherals, card readers, printers, disks, etc., may be attached.The basic hardware configuration required for 1130 emulation on a META 4 consists of 8K main-core memory, 2K read-only memory, and 20 registers. This configuration was augmented for the AM emulation by the addition of 8K more core, 2K additional ROM, two additional registers, two scratch-pad memories of 64 words each, and a set of internal timers to provide timing information on application programs.Several applications have been programmed in both a conventional manner and by using the associative memory capability in order to obtain relative timing information. One such application, a personnel file information storage and retrieval system, has provided a speed advantage of as much as 10 to 1 when the AM is employed. Building on the AM capability, a set of macroinstructions was developed to provide an apparent associative processor. Several matrix manipulation routines were developed using this facility, and these routines also exhibited a significant speed advantage over their conventionally programmed counterparts.