Low Hydrogen Silicon Carbon Nitride Cap for High Performance Sub-10 nm Cu-Low k Interconnect
Authors: Nguyen Son van , Shobha Hosadurga k , Haigh Thomas J , Yao Yiping , Tai Leo , Cohen Stephan A , Shaw Thomas M , Hu Chao-kun , Liniger Eric , Virwani Kumar , Kellock Andrew J , Canaperi Donald F 
Published: February 2020

The metallization of integrated circuits for high performance CMOS devices involves the use of copper with low-k or ultra low-k dielectrics to reduce RC delay and cross talk in devices. For the 90nm to 14 nm CMOS device nodes, conventional silicon nitride was replaced by new dielectric barrier low k materials such as SiCN, C-Rich SiCN and SiNO (1-6). As devices scale down to <=10 nm dimension, further reduction in cap thickness is required for the Cu barrier while maintaining sufficient mechanical strength, low leakage, high dielectric breakdown, and fabrication integration robustness. In a previous report (6), we showed that a single layer SiCNx film deposited by plasma enhanced CVD with TMS+NH3 is still robust down to around 15-20 nm thickness range. This paper presents the development of the second generation robust Low Hydrogen SiCN to enable cap thickness reduction to <=10 nm by simply altering/reducing the hydrogen concentration in the SiCN film composition.

EXPERIMENT

The low hydrogen SiCNx films were deposited in a commercial high throughput production worthy 13.6 MHz RF 300 mm Plasma Chemical Vapor Deposition process (PECVD) system at 350 C using a combination of Trimethyl Silane (TMS) + Ammonia (NH3) + Hydrogen precursors with excellent uniformity (1 sigma < 1 %). The as-deposited films were analyzed using various electrical , mechanical and chemical analyses to study the film's properties and compositions, Table 1. An oxidation resistance test (6) was done after the barrier film/copper blanket stack was annealed at 310°C for 24 hours in ambient atmosphere. Multi-level 7nm copper interconnect structures were built for Electro-migration (EM) and Time Dependent Dielectric Breakdown (TDDB) reliability measurement (150-300°C).

 RESULTS and DISCUSSION

Table 1 summarizes SiCN and Low H SiCN cap film properties and device performance. Overall, the low H SiCN cap has better electrical, mechanical, and device reliability performance than the standard SiCN cap. The low H SiCN film has higher density, modulus, hardness and significantly higher compressive stress, both as-deposited and post 5 minutes direct UV cure. Compositional analysis shows that PECVD SiCNx cap films deposited with the addition of hydrogen precursor actually have less hydrogen than films deposited without hydrogen under the same optimized deposition condition. Film deposition rates decrease slightly at higher hydrogen flow rate in the TMS+NH3+H2 precursor chemistry. The reduced deposition rate and the hydrogen reduction in the film’s bulk are attributed to the increase removal (etching) of weakly bonded -Si-Hx and -N-Hy species in the film during the plasma deposition process. FTIR analysis shows that Si-C and Si-N bonding density increases in the low H SiCN dielectric, which is consistent with the increase in film density, modulus and harness. A minor reduction in the dielectric constant, similar breakdown voltage and reduced leakage are observed for the low H SiCN cap. Figure 1 shows a typical Scanning Transmission Electron Micrograph (STEM) of a 3nm Co/10 nm Low H SiCN cap on a Copper Metal2 7nm interconnect structure. This Cu/Co/Low H SiCNxcap structure achieves 4-10X better EM/TDDB reliability versus a similar structure with the standardcap (Table 1). A Scanning Electron Micrograph (SEM) of the patterned surface after annealing at 310°C for 24 hours in ambient atmosphere (Figure 1) shows that the 10 nm Low H SiCN cap has excellent Cu Oxidation properties with no sign of Cu Oxidation.

 CONCLUSIONS

Low hydrogen SiCN dielectrics with improved mechanical, oxidation and Cu diffusion barrier properties versus standard SiCN were deposited using TMS, NH3 and H2. The new robust low hydrogen SiCN dielectric cap film showed a significant increase in Si-C and Si-N bonding density and a reliability performance improvement in 7 nm Cu interconnect structures at <=10 nm thickness . This enables significant improvement in capacitance, reliability and Cu_low k nano device performance.

Acknowledgment

This work was performed by the Research Alliance Teams at various IBM Research and Development Facilities. The author would like to thank B. Peethala for some analysis and A. Grill for discussion.

REFERENCES

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[3] Al Grill, Steve Gate, Son Nguyen, D. Priyadarshin, E Tood Ryan; Appl. Phys. Rev. 1, 011306 (2014).

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[5] C.Yang et al., IEEE Electron Device Letter, Vol 33, No, 4, pp.588-560 (2012).

[6] Son Nguyen et al., Electrochem. Soc. Transaction. 2010, Volume: 33, Issue: 12, pp.137-145.

Figure 1