bluuebunny/crossref_metadata_2025 huggingface dataset:
High Growth Rate with Reduced Surface Roughness during On-Axis Homoepitaxial Growth of 4H-SiC
Authors: ul Hassan Jawad , Bergman Peder , Henry Anne , Janzén Erik
Published: March 2011

The effect of different C/Si ratio on the surface morphology has been studied to optimize the on-axis homoepitaxial growth conditions on 4H-SiC substrates to improve the surface roughness of epilayers. The overall surface roughness is found to decrease with decreasing C/Si ratio. An order of magnitude lower surface roughness has been observed using C/Si ratio = 0.8 without disturbing the polytype stability in the epilayer. A high growth rate of 10 µm/h was achieved without introducing 3C inclusions. The epilayers grown at higher growth rate with C/Si ratio = 1 also had improvements in the surface roughness. 100% 4H polytype was maintained in the epilayers grown with C/Si ratio in the range of 1.2 to 0.8 and with high growth rate of 10 µm/h.
Generation of Void-Like Structures during Hot-Hydrogen Etching of Si Substrates for 3C-SiC Epitaxy
Authors: Hens Philip , Müller J. , Fahlbusch L. , Spiecker E. , Wellmann Peter J.
Published: March 2011

A new type of void-like structure has been identified in thin 3C-SiC heteroepitaxial layers grown on silicon substrates. Similar surface structures can be found in micrographs published in the literature but have not been addressed so far. We propose a mechanism which explains the formation of these “type II voids” as result of hot-hydrogen etching. Type II voids seem to act as nucleation sites for the well-known faceted voids formed beneath the 3C-SiC layer during seeding (type I voids). Suppression of type II voids by appropriate high temperature cleaning steps therefore reduces the overall density of detrimental type I voids.
Advanced Stress Analysis by Micro-Structures Realization on High Quality Hetero-Epitaxial 3C-SiC for MEMS Application
Authors: Anzalone Ruggero , Camarda Massimo , D'Arrigo Giuseppe , Locke Christopher , Canino Andrea , Piluso Nicolò , Severino Andrea , La Magna Antonino , Saddow Stephen E. , La Via Francesco
Published: March 2011

SiC is a candidate material for micro- and nano-electromechanical systems (MEMS and NEMS). The fabrication of SiC MEMS-based sensors requires new processes able to realize microstructures on either bulk material or on the SiC surface. The hetero-epitaxial growth of 3C-SiC on silicon substrates allows one to overcome the traditional limitations of SiC micro-fabrication, but the high residual stress created during the film grow limits the development of the material for these applications. In order to evaluate the amount of residual stress released from the epi-film, different micro-machined structures were developed. Finite elements simulations of the micro-machined structures have also been carried out in order to evaluate, in detail, the stress field inside the structures and to test the analytical model used. With finite element modeling a exponential approximation of the stress relationship was studied, yielding a better fit with the experimental data. This study shows that this new approximation of the total residual stress function reduces the disagreement between experimental and simulated data.
Raman Stress Characterization of Hetero-Epitaxial 3C-SiC Free Standing Structures
Authors: Piluso Nicolò , Camarda Massimo , Anzalone Ruggero , Severino Andrea , La Magna Antonino , D'Arrigo Giuseppe , La Via Francesco
Published: March 2011

Raman microscopy has been used to study the stress distribution on 3C-SiC/Si(100) micro-machined free standing structures. Linear scans along different structures reveal similar trends of the TO mode Raman Shift. We have found that, independently of the microstructure considered, the Raman frequency decreases close to the undercut. We compare our experimental measurements with FEM simulations finding that, close to the undercut, the stress tensor becomes non-diagonal, modifying the Raman shift to stress relation.
Experimental Verification of a Novel System for the Growth of SiC Single Crystals
Authors: Grasza Krzysztof , Tymicki Emil , Racka Katarzyna , Orzyłowski Marek
Published: March 2011

A set of single crystal growth experiments was performed in the new resistively heated two-heater furnace, which plays the role of an induction furnace with a moving coil. In this new experimental setup we are able to control the shape of the crystallization front, from flat to extremely convex. The positive results of the experimental tests differ significantly from prior discouraging interpretation of computational modeling results obtained by a commonly used software, previously presented in the literature. The essence of a new regulation of the temperature field during the crystal growth is a displacement of the maximum of the temperature field, which at the beginning of the growth is located close to the seed and it moves towards the source material as the crystal length increases. In this way, the crystallization front is heated with a similar intensity regardless the increasing crystal length.
Strain Measurements on Nitrogen Implanted 4H-SiC
Authors: Amigou Matthieu , Beaufort Marie France , Declémy Alain , Leclerc Stephanie , Barbot Jean François
Published: March 2011

The evolution of the normal strain induced by nitrogen implantation in 4H-SiC was investigated through X-ray diffraction measurements and compared to previous studies on helium implanted SiC. The shape of the normal strain profile in the near surface region shows that the accumulation of point defects is not the only mechanism operative at room temperature. In the highly damaged region, the normal strain profile fits the N concentration.
Compensation-Dependent Carrier Transport of Al-Doped p-Type 4H-SiC
Authors: Koizumi Atsushi , Iwamoto Naoya , Onoda Shinobu , Ohshima Takeshi , Kimoto Tsunenobu , Uchida Kazuo , Nozaki Shinji
Published: March 2011

The effects of compensation on the hole concentration and mobility in Al-doped 4H-SiC have been investigated by theoretical calculations using the parameters taken from our experimental results on the less-compensated epilayers. The hole concentrations, hole Hall mobilities and resistivities obtained by experiment and calculations are compared and discussed.
The Strong Field Transport in 4H- and 6H-SiC at Low Temperature
Authors: Sankin Vladimir Ilich , Shkrebiy Pavel P. , Lepneva Alla A. , Ostroumov Andrey G. , Abramov Pavel L.
Published: March 2011

A natural superlattice (NSL) in silicon carbide polytypes is shown to introduce a miniband structure into the conduction band, which leads to depressing of the electron impact zone-zone ionization at 300K with the electric field directed along the crystal axis or the NSL axis. The NSL influence can be also observed in the nitrogen impact ionization at 4.2K. In this case for the parallel field the impurity breakdown has not been fixed up to the fields 1.6 MV/cm in 6H-SiC. These results are explained by the insufficient gain in miniband for the ionization electron energy. Therewith the impurity breakdown at the electric field perpendicular to this axis correlates with a classical picture.
Comparison between the Piezoresistive Properties of a-SiC Films Obtained by PECVD and Magnetron Sputtering
Authors: Fraga Mariana A.
Published: March 2011

This work compares the piezoresistive properties of SiC thin films produced by two techniques enhanced by plasma, PECVD (plasma enhanced chemical vapor deposition) and RF magnetron sputtering. In order to study these properties, strain gauges based on SiC films produced were fabricated using photolithography techniques in conjunction with lift-off processes. The beam-bending method was used to characterize the SiC strain gauges fabricated.
Electrically Active Defects in Electron Irradiated P-Type 6H-SiC
Authors: Alfieri Giovanni , Kimoto Tsunenobu
Published: March 2011

An isochronal annealing in the 100-1200 oC temperature range was carried out on 116 and 400 keV electron irradiated Al-doped 6H-SiC epitaxial layers. Electrical characterization of the epilayers, performed by Fourier-Transform Deep Level Transient Spectroscopy, revealed the presence of six levels in the band gap, in the 0.1-1.6 eV energy range. Their nature is discussed in the light of previous experimental and theoretical works found in the literature.
Iron-Related Defect Centers in 4H-SiC Detected by Deep Level Transient Spectroscopy
Authors: Trapaidze Lia , Hollweck R. , Beljakowa Svetlana , Zippelius Bernd , Weber Heiko B. , Pensl Gerhard , Krieger M.
Published: March 2011

Fe-implanted n-/p-type 4H-SiC samples were investigated by deep level transient spectroscopy (DLTS). In order to be able to separate Fe-related defect centers from defects caused by implantation damage, a corresponding Ar-profile was implanted. No Fe-related defects were observed in n-type 4H-SiC, while two Fe-related centers could be identified in p-type 4H-SiC. The electrical behavior of these centers is donor-like.
Large-Scale Electronic Structure Calculations of Vacancies in 4H-SiC Using the Heyd-Scuseria-Ernzerhof Screened Hybrid Density Functional
Authors: Hornos Tamas , Gali Adam , Svensson Bengt Gunnar
Published: March 2011

Large-scale and gap error free calculations of the electronic structure of vacancies in 4H-SiC have been carried out using a hybrid density functional (HSE06) and an accurate charge correction scheme. Based on the results the carbon vacancy is proposed to be responsible for the Z1/2 and EH6/7 DLTS centers.
Efficient Image Segmentation for Detection of Dislocations in High Resolution Light Microscope Images of SiC Wafers
Authors: Karpinski Harald , Sakwe Sakwe Aloysius , Fried Michael , Bänsch Eberhard , Wellmann Peter J.
Published: March 2011

The determination of dislocation density and in particular the dislocation distribution in SiC wafers is of particular interest for SiC crystal growth development and production. We present an image recognition tool allowing the wafer analysis with specific needs for SiC. In the first stage of expansion, micropipes are selected and counted from SiC wafers that have been etched by KOH.
Defect Evaluation of SiC Crystal Grown by Solution Method: The Study by Synchrotron X-Ray Topography and Etching Method
Authors: Kozawa Shigeta , Seki Kazuaki , Alexander Alexander , Yamamoto Yuji , Ujihara Toru , Takeda Yoshikazu
Published: March 2011

We investigated dislocation behavior in the crystal grown on 6H-SiC (0001) by solution method using synchrotron X-ray topography and thermal chlorine etching. It was confirmed that basal plane dislocation was not newly formed in the grown layer. In addition, the positions of threading screw dislocations (TSDs) were displaced and some of them disappeared in the grown layer. This displacement was caused by the bending of the TSDs during growth.
Dislocation Analysis in Highly Doped n-Type 4H-SiC by Using Electron Beam Induced Current and KOH+Na2O2 Etching
Authors: Yao Yong Zhao , Sugawara Yoshihiro , Ishikawa Yukari , Saitoh Hiroaki , Danno Katsunori , Suzuki Hiroshi , Kawai Yoichiro , Shibata Noriyoshi
Published: March 2011

Dislocations in highly doped n-type 4H-SiC (n+-SiC, n>1019 cm-3) substrate have been studied by means of electron beam induced current (EBIC). Ni/n-SiC/n+-SiC/Al structure was fabricated in order to simultaneously observe the dislocations in n-SiC epilayer and n+-SiC substrate. We have found that dark dots in the EBIC image correspond to threading screw dislocations (TSDs) and threading edge dislocations (TEDs) with the former being relatively darker. Short dark lines along off-cut are attributed to basal plane dislocations (BPDs) in the epilayer; and the randomly oriented long dark lines are caused by the BPDs in the substrate. The classification of the dislocations by EBIC has been examined by wet etching in KOH+Na2O2.
New Separation Method of Threading Dislocations in 4H-SiC Epitaxial Layer by Molten KOH Etching
Authors: Katsuno T. , Watanabe Y. , Hirokazu Fujiwara , Konishi Masaki , Yamamoto Takeo , Endo Takeshi
Published: March 2011

A new method for the separation of threading screw dislocations (TSD) and threading edge dislocations (TED) in a 4H-SiC epitaxial layer is proposed by measurement of the etch pit angles. The etch pit angles of the TSDs and TEDs were 28±3 and 18±3°, respectively. In the case of etch pit depths within the epitaxial layer, the values were almost constant. Almost all of the TSDs were converted from basal plane dislocations (BPDs) at the epitaxial layer/substrate interface.
Enlargement Growth of Large 4H-SiC Bulk Single Crystal
Authors: Kato Tomohisa , Miura Tomonori , Nagai Ichiro , Taniguchi Hiroyoshi , Kawashima Hideaki , Ozawa Tetsuya , Arai Kazuo , Okumura Hajime
Published: March 2011

In this study, we suggest the effective enlargement method of (0001) 4H-SiC bulk crystals grown by the sublimation method using long length growth technique (LLG). This method could achieve low thermal strain and rapid enlargement growth comparing with conventional c-axis growth technique. We also demonstrated high quality enlargement growth from 2inch to  4inch of (0001) 4H-SiC by LLG.
Effect of Low Frequency Magnetic Field on SiC Solution Growth
Authors: Mercier Frédéric , Nishizawa Shin Ichi
Published: March 2011

We investigated numerically fluid dynamics and carbon transport in a 2 inches SiC solution growth with the presence of alternative magnetic fields. Buoyancy and Marangoni convection are taken into account. Our numerical results revealed that the magnetic field parameters have a strong impact on the melt convection. We also propose a solution to increase the mass transfer at the crystal growth front.
The Influence of Excess Nitrogen, on the Electrical Properties of the 4H-SiC/SiO2 Interface
Authors: Pintilie Ioana , Moscatelli Francesco , Nipoti Roberta , Poggi Antonella , Solmi Sandro , Løvlie Lars S. , Svensson Bengt Gunnar
Published: March 2011

The effect of nitrogen (N) introduced by ion implantation at the SiO2/4H-SiC interface on the capacitance of the MOS capacitors is investigated. The Thermal Dielectric Relaxation Current (TDRC) technique and Capacitance-Voltage (C-V) measurements performed at different temperatures and probe frequencies on an N implanted sample and on a virgin sample were employed for this purpose. There are three types of defects located at or near the interface, Dit, NIToxfast and NIToxslow that can be distinguished. Only Dit and NIToxfast respond to the a.c. small, high frequency signal at temperatures above 150K. The separation of Dit from the NIToxfast states have enabled us to study the influence of the excess of interfacial Nitrogen on each of the mentioned defects. It has been found that the N-implantation process fully suppresses the formation of NIToxfast and partially NIToxslow and Dit. Theoretical C-V characteristics were computed, based on the defect distributions determined by TDRC, and compared with the experimental ones showing a close agreement.
Reduction in the Density of Interface States at the SiO2/4H-SiC Interface after Dry Oxidation in the Presence of Potassium
Authors: Hermannsson Pétur Gordon , Sveinbjörnsson E.Ö.
Published: March 2011

We report a strong reduction in the density of near-interface traps (NITs) at the SiO2/4H-SiC interface after dry oxidation in the presence of potassium. This is accompanied by a significant enhancement of the oxidation rate. The results are in line with recent investigations of the effect of sodium on oxidation of 4H-SiC. It is evident that both alkali metals enhance the oxidation rate of SiC and strongly influence the energy distribution of interface states.
Shallow Traps at P-Doped SiO2/4H-SiC(0001) Interface
Authors: Okamoto Dai , Yano Hiroshi , Kotake Shinya , Hatayama Tomoaki , Fuyuki Takashi
Published: March 2011

We report on electrical and physical investigations aimed to clarify the mechanisms behind the high channel mobility of 4H-SiC metal–oxide–semiconductor field-effect transistors processed with POCl3 annealing. By low-temperature capacitance–voltage analysis, we found that the shallow interface traps are effectively removed by P incorporation. Using x-ray photoelectron spectroscopy, we found that the three-fold coordinated P atoms exist at the oxide/4H-SiC interface. The overall results suggest that P atoms directly remove the Si–Si bonds and thus eliminate the near-interface traps.
Non-Nitridated Oxides: Abnormal Behaviour of N-4H-SiC/SiO2 Capacitors at Low Temperature Caused by near Interface States
Authors: Pintilie Ioana , Moscatelli Francesco , Nipoti Roberta , Poggi Antonella , Solmi Sandro , Løvlie Lars S. , Svensson Bengt Gunnar
Published: March 2011

Comparative studies of gate oxides on a N+ pre-implanted area (Ninterface ~1x1019cm-3) and on a virgin Si face 4H-SiC material (Ninterface ~1x1016cm-3) have been undertaken by means of Capacitance-Voltage (C-V) characteristics, performed at different temperatures and frequencies, and Thermal Dielectric Relaxation Current technique. In the non implanted samples, the stretch out of the C-V curves get larger as the temperature is lowered to 150K, while for lower temperatures the C-V characteristics become steeper and some discontinuities occur. These discontinuities are specific for the non-implanted sample and are associated with charging of the fast near interface states (NIToxfast) via a tunneling from the shallow interface states (Dit). The tunneling from the shallow Dit to NIToxfast supress the a.c. response of Dit, which is recovered only after most of the NIToxfast are charged with electrons.
Study of the Interface Properties of TiO2/SiO2/SiC by Photocapacitance
Authors: Weng Ming Hung , Barker Simon , Mahapatra Rajat , Furnival Benjamin J.D. , Wright Nicolas G. , Horsfall Alton B.
Published: March 2011

We have investigated the annealing of fixed oxide charge and interfacial traps in MISiC strucures by means of the photo capacitance voltage technique at temperatures up to 500°C. Elevated temperature measurements show reduced hysteresis and reduced fixed oxide charge at the interface. The photo capacitance technique shows a real-time measurement at elevated temperatures, in which electrons are populated by photo energy, in a 4H-SiC MIS structure. We also confirm the reduction of fixed oxide charge at the interface by means of high temperature post deposition annealing, which occurs during the high temperature measurements.
Improved Observation of SiC/SiO2 Oxide Charge Traps Using MOS C-V
Authors: Habersat Daniel B. , Lelis Aivars J.
Published: March 2011

We have used C-V techniques to study the bias instability of 4H-SiC MOS capacitors and FETs, and compared those results to those obtained using ID-VGS. The net “back-and-forth” instability from C-V was found to exceed that of ID-VGS and matched closely with values from fast ID-VGS and midgap extrapolation, suggesting that the C-V method is more effective at measuring a “true” instability effect than ID-VGS alone. Using C-V, capacitors and large-area MOSFETs showed similar instability behavior, implying that the presence of minority carriers are not necessary to observe bias instability. One-way bias-stress C-V measurements reveal that most of the bias instability occurs under negative bias stress, whereas the opposite is observed in one-way bias stress ID-VGS measurements. Finally, post-oxidation NO annealing reduced the ΔVT bias instability for positive bias stress but does not appear to have influenced any of the other conditions.
Surface Treatments of 4H-SiC Evaluated by Contact Angle Measurement
Authors: Hatayama Tomoaki , Suzuki Hiroyuki , Koketsu Hidenori , Yano Hiroshi , Fuyuki Takashi
Published: March 2011

Surface properties of the 4H-SiC (0001) Si faces could be evaluated by the contact angle measurements with water droplet method, X-ray photoelectron spectroscopy and an atomic force microscope. The contact angles do not depend on the surface roughness under 3nm. The substrate surfaces with the contact angles over 30o will be terminated by hydrogen related species. The contact angles around 20o on 4H-SiC is caused by the removal of oxide layer with fluoride acid and terminated subsequently by the -CF species on the surface. The hydrophile surface of 4H-SiC is caused by the formation of chemical oxide layer as well as the case of the silicon wafers.
Improving Doping Efficiency of P+ Implanted Ions in 4H-SiC
Authors: Nipoti Roberta , Nath Anindya , Cristiani Stefano , Sanmartin Michele , Rao Mulpuri V.
Published: March 2011

An inductively heated furnace and an ultra-fast microwave heating system have been used for performing post implantation annealing processes of P+ implanted semi-insulating <0001> 4H SiC at 1800-1950°C for 5 min and 2000-2050°C for 30 s, respectively. Very high P+ implantation fluences in the range 71019 81020 cm-3 have been studied. The annealing processes in the inductive furnace and the one at the lower temperature in the microwave furnace show a saturation in the efficiency of the electrical activation of the implanted P+ that is bypassed by the microwave annealing process at the higher temperature. The measured electron mobility values versus electron density are elevated in all the studied samples and for every post implantation annealing process. This has been ascribed to an elevated implanted crystal recovery due to the very high annealing temperatures > 1800°C.
The Effect of Process Parameters on 4H-SiC Single Crystal Grown by a PVT Method
Authors: Yeo Im Gyu , Lee Tae Woo , Park Jong Hwi , Yang Woo Sung , Ryu Heui Bum , Park Mi Seon , Kim Il Soo , Shin Byoung Chul , Lee Won Jae , Eun Tai Hee , Lee Seung Seok , Chun Myong Chuel
Published: March 2011

Extensive study of various process parameters to influence on the growth of 4H-SiC crystal has been carried out using the transformation of the 6H-SiC seed by a PVT method. The axial temperature gradients were increased throughout increasing the crucible length along growth direction in order to enhance the growth rate and transformed crystal yield. The N2/Ar gas ratio used during the crystal growth related with carrier concentration/mobility of grown crystal. In the initial stage of growth, foreign polytypes such as 6H/15R were observed on 6H-SiC seed crystal but 4H crystals were entirely grown after the process optimization. While the typical absorption spectrum of SiC seed crystal indicated that the SiC polytype was the 6H-SiC with fundamental absorption energy of about 3.02eV, absorption spectrum of grown SiC crystal exhibited 4H-SiC with fundamental absorption energy of about 3.26eV. The entirely transformed SiC region exhibited lower micropipe density than 6H/4H transition region.
DLTS Measurements on 4H-SiC JBS-Diodes with Boron Implanted Local P-N Junctions
Authors: Ivanov Pavel A. , Korolkov Oleg , Samsonova Tat'yana P. , Sleptsuk Natalja , Potapov Alexander S. , Toompuu Jana , Rang Toomas
Published: March 2011

In the present paper, 4H-SiC JBS diodes with "boron" p–n junctions have been investigated by means of deep-level transient spectroscopy (DLTS). The sign of the DLTS signal for all the 4H-SiC diodes under study, was positive. The "anomaly" of the DLTS spectra measured is apparently connected with the properties of "boron" p–n junctions. In particular, is presented the role of deep D-centers in recompensation of donors in the JBS diodes.
Schottky Contacts to N-Type 4H-SiC Fabricated with Ti-, Mo-, Ni- and Al-Based Metallizations
Authors: Perrone Denis , Ferrero Sergio , Scaltrito Luciano , Naretto Marco , Celasco Edvige , Pirri C. Fabrizio
Published: March 2011

In this work we studied different Schottky contacts to 4H-SiC with the aim to obtain Schottky Barrier diodes (SBDs) and Junction Barrier Schottky diodes (JBS) able to operate at high temperatures, frequencies and power densities with low power losses. Schottky contacts were fabricated using Mo and Mo/Al layers annealed up to 600 °C using a Rapid Thermal Process (RTP). A comparison with previous results obtained with Ni, Ti and Ti/Al layers annealed up to 400 °C is also proposed. The Schottky contacts were characterized by means of standard Current-Voltage (I-V) and Capacitance-Voltage (C-V) techniques. X-ray Photoelectron Spectroscopy (XPS) analyses were performed in depth profile mode in order to study the structural evolution of the interface Mo/SiC and Al/Mo during annealing treatments. Mo/Al contacts show a lower barrier height and better overall performances in forward polarization when compared to the Ti- and Ni-based contacts, and they are very promising for Schottky contact fabrication on SBD and JBS.
Graded Etched Junction Termination for SiC Thyristors
Authors: Pâques Gontran , Dheilly Nicolas , Planson Dominique , De Doncker Rik W. , Scharnholz Sigo
Published: March 2011

In this paper, we propose a graded etched junction termination extension for SiC thyristors. It has the functionality of a multiple implanted JTE, but is realized by purely etched means. This termination is demonstrated up to 4 kV on a sample with a drift layer thickness of 35 µm. On another sample with a thinner drift layer, similar thyristors have been realized with a low resistive contact, resulting in an on-state voltage drop of 3.2 V at 40 A/cm².
Recovery of Ohmic Contacts Formed on C-Face 4H-SiC Following High Temperature Post-Processing
Authors: Furnival Benjamin J.D. , Vassilevski Konstantin , Wright Nicolas G. , Horsfall Alton B.
Published: March 2011

In this paper we demonstrate the recovery of Ohmic contacts formed on C-face 4H-SiC following high temperature post-processing. After a typical high-κ dielectric anneal in O2 for 3 minutes at 650 °C, replacing the metallization stack is revealed to significantly reduce the damage produced in the I-V characteristics. Using C-AFM we have also studied the mechanisms responsible for Ohmic contact formation, presenting a possible relationship between changes in the SiC crystal orientation and the establishment of Ohmic behaviour.
Influence of the Masking Material and Geometry on the 4H-SiC RIE Etched Surface State
Authors: Lazar Mihai , Enoch Fabrice , Laariedh Farah , Planson Dominique , Brosselard Pierre
Published: March 2011

The roughness of etched SiC surfaces must be minimized to obtain surfaces with a smooth aspect, avoiding micromasking artifacts originating from re-deposited particles during the etching process. Four varieties of masks, Al, Ni, Si and C, were deposited on the SiC surface by photolithographic process. The C structures were formed by annealing conversion of patterned thick photoresist. On these surfaces, dry etching was performed with an SF6/O2 plasma produced in a Reactive-Ion-Etching (RIE) reactor. Although a better aspect of the surface is obtained with Ni in comparison with Al mask, micromasking could also occur even with Ni if the mask design was not enough spaced out. With C and Si masks, which produce fluorides species with negative boiling temperature, smooth etched surface was obtained without micromasking, even for tight masks covering up to 90% of the SiC surface.
Evolution of Extended Defects during Epitaxial Growths: A Monte Carlo Study
Authors: Camarda Massimo , La Magna Antonino , La Via Francesco
Published: March 2011

Three dimensional kinetic Monte Carlo simulations on super-lattices are applied to study the evolution of stacking faults during epitaxial growths. We show that, in the case of misoriented close packed substrates, these defects can either extend throughout the entire epilayer (i.e. extended from the substrate up to the surface) or close in dislocation loops, in dependence of the deposition conditions. We explain this behavior in terms of a surface kinetic competition between these defects and the surrounding crystal: if the local growth rate of the defect is larger compared with that of the perfect crystal the defect will expands, otherwise it will closes. This mechanisms allows to explain several experimental results on homo and hetero epitaxies.
TEM Observation of 8 Deg Off-Axis 4H-SiC (0001) Surfaces Planarized by Catalyst-Referred Etching
Authors: Sadakuni Shun , Dai Ngo Xuan , Sano Yasuhisa , Arima Kenta , Yagi Keita , Murata Junji , Okamoto Takeshi , Tachibana Kazuma , Yamauchi Kazuto
Published: March 2011

We have developed a novel abrasive-free planarization method called catalyst-referred etching (CARE). A CARE-processed 8 deg off-axis 4H-SiC (0001) surface is investigated by cross-sectional transmission electron microscopy (TEM). The surface is composed of alternating wide and narrow terraces with single-bilayer-height steps, which are similar to the structure observed on a CARE-processed on-axis 4H-SiC (0001) surface. These results indicate that the structure appears on CARE-processed surfaces regardless of the off-cut angle.
Carbon-Cap for Ohmic Contacts on n-Type Ion Implanted 4H-SiC
Authors: Nipoti Roberta , Mancarella Fulvio , Moscatelli Francesco , Rizzoli R. , Zampolli S.
Published: March 2011

In this study a pyrolyzed photoresist film that has been used for protecting the implanted surface of a 4H-SiC wafer during post implantation annealing at 1800-1950 °C has preserved on the wafer surface and used for the fabrication of ohmic contact pads on P+ implanted areas. The carbon film has been patterned by using a RIE O2-based plasma. A specific contact resistance of 9  10 5 cm2 has been obtained on P+ 1  1020 cm 3 implanted 4H-SiC. Micro-Raman characterizations show that the carbon cap is formed of a nano-crystalline graphitic phase.
Time-Dependent Density Functional Calculations on Hydrogenated Silicon Carbide Nanocrystals
Authors: Vörös Marton , Deák Peter , Frauenheim Thomas , Gali Adam
Published: March 2011

The electronic structure and absorption spectrum of hydrogenated silicon carbide nanocrystals (SiC NC) have been determined by first principles calculations. We show that the reconstructed surface can significantly change not just the onset of absorption but the shape of the spectrum at higher energies. We compare our results with two recent experiments on ultrasmall SiC NCs.
Component Technologies for Ultra-High-Voltage 4H-SiC pin Diode
Authors: Nakayama Koji , Ishii Ryosuke , Asano Katsunori , Miyazawa Tetsuya , Ito Masahiko , Tsuchida Hidekazu
Published: March 2011

Forward voltage drops of carbon implanted and thermal oxidized pin diode with thick drift layer are investigated to evaluate the effect on the lifetime. The forward voltage drops of the carbon implanted and thermal oxidized pin diodes with drift layer of 120 μm thick were around 4.0 V. Furthermore, blocking characteristics of 4H-SiC pin diodes with mesa-JTE, which were fabricated on C-face and Si-face substrates, are also investigated. The breakdown voltages of pin diodes with 250 μm and 100 μm epitaxial layers are 17.1 kV and 10.9 kV, respectively.
Bipolar Degradation of High Voltage 4H-SiC p-i-n Diodes in Pulse Regime
Authors: Levinshtein Michael E. , Ivanov Pavel A. , Palmour John W. , Agarwal Anant K. , Das Mrinal K.
Published: March 2011

We report on specific features of forward voltage degradation of 4H-SiC p-i-n diodes in the pulse mode. It is shown that pulse stresses with a pulse duration shorter than several milliseconds cause substantially smaller forward voltage drift in comparison with a dc stress with the same charge passed through the diodes and the same distribution of injected carriers. A self-recovery of the forward voltage is observed at room temperature.
Effect of Proton Irradiation Induced Defects on 4H-SiC Schottky Diode X-Ray Detectors
Authors: Stevens Rupert C. , Vassilevski Konstantin , Lees John E. , Wright Nicolas G. , Horsfall Alton B.
Published: March 2011

Detectors capable of withstanding high radiation environments for prolonged periods of exposure are essential for the monitoring of nuclear power stations and nuclear waste as well as for space exploration. Schottky diode X-ray detectors were exposed to high dose proton irradiation (1013 cm-2, 50 MeV) and changes in the detection resolution (spectroscopic full width half-maximum) have been observed. Using Deep Level Transient Spectroscopy (DLTS) and the degradation of the electrical characteristics of the diode, we have shown that radiation induced traps located in the upper half of the bandgap have reduced the concentration of carriers.
3.3 kV Rated Silicon Carbide Schottky Diodes with Epitaxial Field Stop Ring
Authors: Vassilevski Konstantin , Nikitina Irina P. , Horsfall Alton B. , Wright Nicolas G. , Johnson C. Mark
Published: March 2011

3.3 kV rated 4H-SiC diodes with nickel monosilicide Schottky contacts and 2-zone JTE regions were fabricated on commercial epitaxial wafers having a 34 m thick blocking layer with donor concentration of 2.2×1015 cm-3. The diodes were fabricated with and without additional field stop rings to investigate the impact of practically realizable stopper rings on the diode blocking characteristics. The field stop ring was formed by reactive ion etching of heavily doped epitaxial capping layer. The diodes with field stop rings demonstrated significantly higher yield and reduction of reverse leakage current. The diodes demonstrated blocking voltages in excess of 4.0 kV and very low change of leakage current at ambient temperatures up to 200 °C.
Optical and Electrical Simulation of 4H-SiC UV Photodetector by Finite Element Method
Authors: Biondo Stéphane , Vervisch Wilfried , Ottaviani Laurent , Palais Olivier
Published: March 2011

This paper focuses on UV-photodetector simulation. The calculus method description and the physical equations which occur in this model are presented as well as the UV-photodetector structure (p+n--n+ diode). Based on the Finite Element Method the electrical part solves the continuity and Poisson equation, and the optical part solves by Maxwell’s equation, FDTD [1]. Simulation works point out the influence of the p+-type layer on the electrical characteristics such as the current densities versus reverse bias. Indeed, simulation results show the current density increase with the decrease doping concentration or the p+-type layer thickness.
4H-SiC Schottky Diodes for Temperature Sensing Applications in Harsh Environments
Authors: Brezeanu Gheorghe , Draghici Florin , Craciunioiu F. , Boianceanu C. , Udrea Florin , Udrea F. , Puscasu D. , Rusu Ion
Published: March 2011

4H-SiC Schottky Barrier Diodes (SBDs) with remarkable electrical performance have been fabricated and characterised. A barrier height about 1.64V and an ideality factor close to 1 are extracted from the forward characteristics measured at several temperatures. These essential Schottky contact parameters are observed to be constant with temperature. A temperature probe with a simple and innovative scheme is designed and applied. The probe uses SiC SBDs as temperature sensor in the 20-4000C range, with measured sensitivities varying from 1.3 mV/K to 2.8 mV/K. The probe is meant to monitorize the temperature inside the furnaces, in the cement industry.
Study of Mobility Limiting Mechanisms in (0001) 4H and 6H-SiC MOSFETs
Authors: Naik Harsh , Chow T. Paul
Published: March 2011

To study the mobility limiting mechanisms in (0001) 4H-SiC and 6H-SiC MOSFETs, physics based modeling of the inversion mobility of has been done. Two very different limiting mechanisms have been found for 4H-SiC and 6H-SiC MOSFETs. The mobility in 6H-SiC MOSFETs is limited by phonon scattering while the 4H-SiC MOSFET mobility is limited by Coulombic at low electric fields and surface roughness scattering at high electric fields.
High-Temperature Reliability of SiC Power MOSFETs
Authors: Lelis Aivars J. , Green Ronald , Habersat Daniel B.
Published: March 2011

We have observed a significant increase in the instability of SiC power MOSFET ID-VGS characteristics following bias stressing at elevated temperature, similar to the effect we previously observed following an ON-state current stress. Devices stressed by elevated temperature alone exhibited very little instability compared with devices stressed with both temperature and applied bias. These results, along with other results in the literature, suggest that this increase in threshold voltage instability at elevated temperature is due to the activation of additional near-interfacial oxide traps related to an O-vacancy defect known as an E′ center. It is important to develop improved processing methods to decrease the number of precursor oxide defect sites, since an increased negative shift can give rise to increased leakage current in the OFF-state and potential device failure if proper precautions are not met to provide an adequate margin for the threshold voltage.
Schottky Barrier 3C-SiC Nanowire Field Effect Transistor
Authors: Rogdakis Konstantinos , Bano Edwige , Montes Laurent , Bechelany Mikhael , Cornu David , Zekentes Konstantinos
Published: March 2011

Back-gated field effect transistors (FETs) based on catalyst-free grown 3C-SiC nanowire (NW) were fabricated. Devices with rectifying Source (S) and Drain (D) contacts have been observed. In contrast with the ohmic-like devices reported in the literature, the Schottky contact barrier (SB) at S/ D regions acts beneficially for the FET performance by suppressing the off-current. At high positive gate voltages (>10 V), the Schottky barriers tend to be more transparent leading to ION/IOFF ratio equal to ~ 103 in contrast to the weak gating effect of the ohmic-contacted 3C-SiC NWFETs.
Numerical Simulations of a 4H-SiC BMFET Power Transistor with Normally-Off Characteristics
Authors: Della Corte Francesco Giuseppe , Pezzimenti Fortunato , Bellone Salvatore , Nipoti Roberta
Published: March 2011

A numerical simulation study focused on an oxide-free 4H-SiC power device that is based on a normally-off Bipolar Mode Field Effect Transistor (BMFET) structure, and therefore on the principle of conductivity modulation from minority carrier injection, is presented. Starting from a n-/n+ 4H-SiC epi-wafer, with an epitaxial layer thickness of a few microns, and considering the presently available 4H-SiC ion implantation technology, a completely planar SiC-based BMFET has been designed. Such a device has interesting features in terms of static forward and blocking I V characteristics for high power applications. The 4H-SiC fundamental physical models, such as the doping incomplete ionization and the carrier recombination processes, were taken into account during the simulations.
Optically Triggered Power Switch Based on 4H-SiC Vertical JFET
Authors: Alexandrov Peter , Li Xue Qing , Zhao Jian Hui
Published: March 2011

An optically controlled power switch based on 4H-SiC Trenched and Implanted Vertical JFETs (TIVJFET) was developed that comprises three parts: an LED light-source driver, light-triggered integrated gate buffer driver, and vertical high power normally-off switch. The light-triggered integrated gate buffer driver includes a photodiode and four stages of low voltage 4H-SiC TIVJFETs, which are hybrid integrated. Optically gated power switching was experimentally demonstrated with a maximum switching frequency of about 50 kHz, the system performance limiting factors were clearly identified and experimentally confirmed, and ways to substantially increase the switching frequency were shown. From calculations, based on realistically possible system parameters values, it could be seen that a maximum switching frequency around 1 MHz is theoretically possible with a proper choice of light source, detector, and buffer transistor parameters.
A Comparison of 1200 V Normally-OFF & Normally-on Vertical Trench SiC Power JFET Devices
Authors: Casady Jeff B. , Sheridan David C. , Kelley Robin L. , Bondarenko Volodymyr , Ritenour Andrew
Published: March 2011

Equivalent sized (4.5 mm2 die area), 1200 V, 4H-SiC, vertical trench Junction Field Effect Transistors (JFETs) were characterized in terms of DC and switching performance. The 100 mΩ Enhancement-Mode (EM) JFET was found to have natural advantages in safe operation being normally-off, whereas the Depletion-Mode (DM) JFET was found to have advantages with ~ twice as high saturation current, less on-resistance (85 mΩ) and no gate current required in the on-state. The JFETs were found to both have radically less (five to ten times) switching energies than corresponding 1200 V Si transistors, with the DM JFET and EM JFET having EON and EOFF of only 115 µJ and 173 µJ, respectively when tested at half-rated voltage (600 V) and 12 A.
Silicon Carbide Vertical JFET with Self-Aligned Nickel Silicide Contacts
Authors: Vassilevski Konstantin , Nikitina Irina P. , Horsfall Alton B. , Wright Nicolas G. , Smith Andrew J. , Johnson C. Mark
Published: March 2011

Trenched implanted vertical JFETs (TI-VJFETs) with self-aligned gate and source contacts were fabricated on commercial 4H-SiC epitaxial wafers. Gate regions were formed by aluminium implantation through the same silicon oxide mask which was used for etching mesa-structures. Self-aligned nickel silicide source and gate contacts were formed using a silicon oxide spacer formed on mesa-structure sidewalls by anisotropic thermal oxidation of silicon carbide followed by anisotropic reactive ion etching of oxide. Fabricated normally-on 4H-SiC TI-VJFETs demonstrated low gate leakage currents and blocking voltages exceeding 200 V.
Characterisation of HfO2/Si/SiC MOS Capacitors
Authors: Gammon Peter Michael , Pérez-Tomás Amador , Jennings Michael R. , Guy Owen James , Rimmer N. , Llobet J. , Mestres Narcis , Godignon Philippe , Placidi Marcel , Zabala M. , Covington James A. , Mawby Philip  Andrew
Published: March 2011

In this paper, the integration of HfO2 onto SiC has been investigated via a number of different test structures. Capacitors consisting of HfO2 on Si, SiC, Si/SiC and SiO2/SiC have been fabricated and electrically tested. The new HfO2/Si/SiC capacitors provide the greatest breakdown electric field of 3.5 MV/cm, whilst leakage currents are minimised through the insertion of the narrow bandgap material. The Si layer, which is wafer bonded to the SiC, is proven to be stress free through Raman spectroscopy, whilst TEM and EDX prove that the interface is free of contaminants.
Pulse Current Characterization of SiC GTO Thyristors
Authors: Scharnholz Sigo , Vergne Bertrand , Konrath Jens Peter , Pâques Gontran , Zorngiebel Volker
Published: March 2011

With a focus on pulsed power applications, this paper presents results of the pulse current characterization of GTO thyristors developed and fabricated within a previous ISL funded project. Limited by the pulse current capability of the bonding wire connection, the devices demonstrated to handle a peak current of up to 6 kA/cm2 (about 20 µs FWHM). Pulse tests of Al wires indicate that two 50 µm wires should be sufficient to test a 1 mm2 device up to a peak current of 30 kA/cm2.
Optical Triggering of 4H-SiC Thyristors with a 365 nm UV LED
Authors: Dheilly Nicolas , Pâques Gontran , Planson Dominique , Bevilacqua Pascal , Scharnholz Sigo
Published: March 2011

Direct light triggering of 4H-SiC thyristors with a 365 nm UV LED was demonstrated. Two different structures with etched and non etched gate were successfully tested. The current rise time was less than 100 ns and the delay time as short as 1.5 μs. The optical energy density necessary to switch-on a thyristor has been studied for different optical power densities and bus voltages. This work shows that the UV LED technology is becoming sufficiently powerful to switch-on SiC thyristors. Thus, an alternative, less expensive and more compact gate light source than UV laser is now possible. This can be of particular interest for very high voltage and pulse power electronic applications.
Reverse Electrical Characteristics of 4H-SiC JBS Diodes Fabricated on In-House Substrate with Low Threading Dislocation Density
Authors: Hirokazu Fujiwara , Konishi Masaki , Ohnishi T. , Nakamura T. , Hamada Kimimori , Katsuno T. , Watanabe Y. , Endo Takeshi , Yamamoto Takeo , Tsuruta K. , Onda Shoichi
Published: March 2011

The impacts of threading dislocations, surface defects, donor concentration, and schottky Schottky barrier height on the reverse IV characteristic of silicon carbide (SiC) junction barrier schottky Schottky (JBS) diodes were investigated. The 100 A JBS diodes were fabricated on 4H-SiC 3-inch N-type wafers with two types of threading dislocation density. The typical densities are were 0.2×104 and 3.8×104 cm-2, respectively. The improvement of vIt was found that variations in the leakage current and the high yield of large area JBS diodes werecould be were obtained improved by using a wafer with a low threading dislocation density. In the range of low leakage current, the investigation shows showed a correlation between leakage current and threading dislocation density.
On the Mechanism of Twin Boundary Elimination in 3C-SiC(111) Heteroepitaxial Layers on α-SiC Substrates
Authors: Ferro Gabriel , Kim-Hak Olivier , Lorenzzi Jean , Jegenyes Nikoletta , Marinova Maya , Soueidan Maher , Carole Davy , Polychroniadis Efstathios K.
Published: March 2011

This paper deals with the formation and propagation of twin boundaries (TBs) inside 3C-SiC layers grown heteroepitaxially on -SiC substrate. The equivalent probability of nucleating 60° rotated 3C islands on such substrate lead to the systematic formation of TB upon coalescence of these islands. Elimination of these defects should occur by bending of the propagation direction. Bending through incoherent TBs is usually encountered during both VLS and CVD growth and it generates crystalline defects due to high built-in energy. One would prefer coherent TBs, formed by two-by-two annihilation of neighbouring TBs, which do not form new defect except microtwin inclusion at the interface. Such TB annihilation seems to be a specificity of growth by VLS mechanism. The mechanism of such bending is discussed
Performance Tests of a 4,1x4,1mm2 SiC LCVJFET for a DC/DC Boost Converter Application
Authors: Tolstoy Georg , Peftitsis Dimosthenis , Rabkowski Jacek , Nee Hans Peter
Published: March 2011

A 4.1x4.1mm2, 100mΩ 1,2kV lateral channel vertical junction field effect transistor (LCVJFET) built in silicon carbide (SiC) from SiCED, to use as the active switch component in a high-temperature operation DC/DC-boost converter, has been investigated. The switching loss for room temperature (RT) and on-state resistance (Ron) for RT up to 170°C is investigated. Since the SiC VJFET has a buried body diode it is also ideal to use instead of a switch and diode setup. The voltage drop over the body diode decreases slightly with a higher temperature. A short-circuit test has also been conducted, which shows a high ruggedness.
300°C Silicon Carbide Integrated Circuits
Authors: Stum Zachary , Tilak Vinayak , Losee Peter A. , Andarawis Emad , Chen Cheng Po
Published: March 2011

MOSFET-based integrated circuits were fabricated on silicon carbide (SiC) substrates. SiC devices can operate at much higher temperatures than current semiconductor devices. Simple circuit components including operational amplifiers and common source amplifiers were fabricated and tested at room temperature and at 300°C. The common source amplifier displayed gain of 7.6 at room temperature and 6.8 at 300°C. The operational amplifier was tested for small signal open loop gain at 1kHz, measuring 60 dB at room temperature and 57 dB at 300°C. Stability testing was also performed at 300°C, showing very little drift at over 100 hours for the individual MOSFETs and the common source amplifier.
4H-SiC N-MOSFET Logic Circuits for High Temperature Operation
Authors: Le-Huu Martin , Grieb Michael , Schrey Frederik F. , Schmitt H. , Haeublein Volker , Bauer Anton J. , Ryssel Heiner , Frey Lothar
Published: March 2011

The suitability of normally-off 4H-SiC MOSFETs for high temperature operation in logic gates is investigated. Fowler-Nordheim analysis shows a lowering of the effective tunneling barrier height at elevated temperatures. Trap assisted tunneling induced by carbon interstitials is proposed as the responsible mechanism. Nevertheless, reliability of MOS devices even at 400°C is excellent with an extrapolated critical field of 2.69MV/cm for a 10 year time to dielectric breakdown. The switching behavior of logic gates is also characterized between 25°C and 400°C. Using these logic gates, a fully integrated edge triggered flip-flop is build and high temperature operation is demonstrated.