bluuebunny/crossref_metadata_2025 huggingface dataset:
Introduction to Verification and Test Using a 4-Bit Arithmetic Logic Unit Including a Failure Module in a Xilinx XC9572XL CPLD
Authors: Versen Martin , Hayn Michael
Published: December 2020

In order to educate students in a practical way, a test object for a lab course is created: shorts and opens in an electrical model of physical defects are injected to a net list of a 4-bit arithmetic logic unit and are implemented in a Xilinx CPLD 9572XL. The fails are electrically controllable and observable in verification and electrical hardware test. By using a Test Access Port (TAP), the fails are analyzed in terms of their root cause. The arithmetic logic unit is used as a key component for lab exercises that complement the test part of an Integrated Circuit System Design and Test course in the master program Electrical Engineering and Information Technology at the University of Applied Sciences in Rosenheim. The labs include an introduction to a HILEVEL Griffin III test system, creation of pin and test setup, the import of vector files from verification test benches, control of a scan test engine and analysis of scan test data.
Electrically-Enhanced LADA (EeLADA) Technique
Authors: Goh S.H. , Yeoh B.L. , You G.F. , Hao H. , Sio W.L. , Lam J. , Chua C.M.
Published: December 2020

A modulated laser beam in the form of a continuous pulse train is explored on Laser Assisted Device Alteration (LADA). We term this pulsed-LADA to differentiate from conventional continuous wave (cw)-LADA. It is found that a duty cycle of less than 0.9 at low frequency above 1 kHz is sufficient to experience significant enhancements in laser stimulation. Following this, a new derivative of LADA technique called Electrically-enhanced LADA (EeLADA) is developed. Experimental results to demonstrate its capability in improving diagnostic resolution and potential application to hard failure debug will be presented.
Circuit Tracing on Integrated Circuit Using FIB Passive Voltage Contrast Effect
Authors: Sorkin Alexander , Pawlowicz Chris , Krechmer Alex , Phaneuf Michael W.
Published: December 2020

Competitive circuit analysis of Integrated Circuits (ICs) is one of the most challenging types of analysis. It involves multiple complex IC die de-processing/de-layering steps while keeping precise planarity from metal layer to metal layer. Each step is followed by Scanning Electron Microscope (SEM) imaging together with mosaicking that subsequently passes through an image recognition and Graphic Database System (GDS) conversion process. This conventional procedure is quite time and resource consuming. The current paper discusses and demonstrates a new inventive methodology of circuit tracing on an IC using known FIB Passive Voltage Contrast (PVC) effects [1]. This technique provides significant savings in time and resources.
Fast Feature Based Non-Destructive Fault Isolation in 3D IC Packages Utilizing Virtual Known Good Device
Authors: Lee K.C. , Alton J. , Igarashi M. , Barbeau S.
Published: December 2020

We combine Electro Optical Terahertz Pulse Reflectometry (EOTPR), with full three dimensional device-under-test (DUT) modeling utilizing virtual known good device to quickly and non-destructively isolate faults in advanced 3D IC packages. Computation power required for modeling can quickly become prohibitive with the design complexities of modern IC packages. In this study we adopt a piecemeal modeling approach that bypasses this exponential requirement. A PFA study verifies the accuracy of our model. This shows that feature-based fault analysis with a distance-to-defect accuracy of less than 10 μm can be readily attained through the combination of these techniques.
Failure Mechanism Studies and Elimination of Galvanic Corrosion (Al-Cu Cell) on Microchip Aluminum Bondpads in Copper Process
Authors: Younan Hua , Yixin Chen , Chao Fu , Xiaomin Li
Published: December 2020

In the authors' previous papers, the failure mechanism and elimination solutions of galvanic corrosion (Al-Cu cell) on microchip Al bondpads in the Al process (0.18un and above) have been studied [1-2]. In this paper, the authors will further study the failure mechanism and root cause of galvanic corrosion (Al-Cu cell) on microchip Al bondpads in the Cu process (0.13um and below) with Ta barrier metal. Based on our results, the root cause of galvanic corrosion (Al-Cu cell) in the Al process is only one way and Al-Cu cell is from Al alloy (Al + 0.5%Cu) on Al bondpads. However, in the Cu process it may be from two ways and Al-Cu cell can be from both Al alloy (Al + 0.5%Cu) on Al bondpads and the Cu metal layer below the barrier metal Ta when Ta has weak points or pinhole. As such, the pinhole defects on Al bondpad caused by galvanic corrosion (Al-Cu cell) in the Cu process might be more serious than that in the Al process. In this paper, TEM is used for root cause identification. Based on the TEM results, galvanic corrosion was due to the weak point/pinhole at the Ta barrier metal layer and Al-Cu diffusion.
A More Rapid Approach in Revealing the Physical Status of Polyfuses and Thin Film Fuses in a Multilayer Integrated Circuit
Authors: Lagar Jason H. , Sia Rudolf A. , Cajita Melanie S.
Published: December 2020

This paper aims to discuss the processes involved in establishing a more rapid approach in exposing the polyfuse and thin film fuse using the reactive ion etching, chemical deprocessing and parallel lapping techniques. The results proved that parallel lapping technique in combination with chemical deprocessing and reactive ion etching is a faster approach in exposing the physical status of the fuses.
Advanced Failure Analysis of Junction Profile Defect by Using EBAC/EBIC
Authors: Lee Jong Hak , Lee Jae Yoon , Kim Dae Woo , Jung Kyoung Wook , Son Soo Yong
Published: December 2020

As semiconductor device geometries shrink due to process technology development and circuit density rapidly increases, it is becoming extremely difficult to effectively analyze defects. Against this background, more precise and efficient techniques to analyze the root cause of defects is in constant demand. This paper proposes a method to quickly and accurately identify the true cause of device failure by using a nano probe EBAC/EBIC analysis technique. The most significant benefit of the EBAC/EBIC analysis technique is the ability to identify normal or abnormal circuit behavior with an intuitive image. This benefit can minimize the damage to a sample during the initial analysis phase, which has been an issue in the analysis of existing physical properties of semiconductors. In this paper, we identified the root cause of a series transistor defect in CIS (CMOS Image Sensor) product by using EBAC/EBIC (analysis) technique, and verified this with the assistance of SSRM (Scanning Spreading Resistance Microscopy) and APT (Atomic Probe Tomography). By doing so, we confirmed that the analysis technique proposed in this paper is very effective in identifying and pinpointing the true cause and location of the defect.
Characterization of 14 nm Silicon Integrated Circuits with 1.55–2 μm Emission Microscopy—A Case Study
Authors: Serrels K.A. , Kalarikkal A. , Jakati A.M. , Schmidt C. , Dabney G.
Published: December 2020

We describe here the first demonstration of 14nm silicon device characterization using 1.55-2µm emission microscopy as a technique to interrogate the radiative properties of various physical defects. A study is presented and discussed for cases highlighting photo-emission only, hybrid photo-thermal-emission, and thermal-emission only.
Signature Analysis of Device Failure Mechanisms on 2.5D Package IC Devices
Authors: Nuez Daniel C.
Published: December 2020

The growing popularity of 2.5D SSIT (Stacked Silicon Interconnect Technology) & 3D package technology in the IC industry had made it more challenging for manufacturers and packaging assembly sites to perform failure analysis and identifying the root causes of failures. There had been some technical papers written on various failure analysis techniques on 2.5D SSIT and 3D IC packages using a variety of equipment for detecting and localizing failures [1, 2]. This paper explains a non-evasive, non-destructive approach of localizing failures on a 2.5D SSIT package by identifying and recognizing certain waveform patterns that the failing devices exhibit in the scanning acoustic microscope A-Scan and in Time domain reflectometry. There are noticeable waveform patterns that an analyst can recognize and used to determine certain types of failure mechanisms that may be present in the device. Please note that it is very important to use the exact same type of package sample when characterizing and comparing waveform patterns as package variability from vendor to vendor and material contents can certainly affect the results.
Combining Current Imaging, EBIC/EBAC, and Electrical Probing for Fast and Reliable In-Situ Electrical Fault Isolation
Authors: Kleindiek Stephan , Kemmler Matthias , Rummel Andreas , Schock Klaus
Published: December 2020

Using a compact nanoprobing setup comprising eight probe tips attached to piezo-driven micromanipulators, various techniques for fault isolation are performed on 28 nm samples inside an SEM. The recently implemented Current Imaging technique is used to quickly image large arrays of contacts providing a means of locating faults.
Verification of DLS Data by LVP in Case of Marginal Failure
Authors: Kim Keonil , Kim Sungjin , Lee Kunjae , Jin Kyeongju , Lee Yunwoo , Lee Euncheol
Published: December 2020

In most of the non-destructive electrical fault isolation cases, techniques such as DLS, Photon Emission, LIT, OBIRCH indicate a fault location directly. But relying on just one of these techniques for marginal failure mechanism is not enough for better fault localization. When Failure Analysis (FA) engineers encounter high NDF (No Defect Found) rates, by using only one of the techniques, they may need to consider the relationship between the responded locations by different techniques and fail phenomenon for better defect isolation. This paper talks about how a responded DLS location does not always indicate a fault location and how LVP data collected using DLS location can pin point the real defect location.
Authentication of Printed Circuit Boards
Authors: Iyengar Anirudh , Vobilisetti Nareen , Ghosh Swaroop
Published: December 2020

Printed Circuit Boards (PCBs) are easy target for reverse engineering and counterfeiting attacks due to the distributed supply chain. The integrated circuits (ICs) authentication techniques such as Physically Unclonable Function (PUF) are not easily extendible to PCBs. In this paper, we analyze various sources of variations in PCB and qualitatively study the quality metrics that can be used to quantify the PCB PUFs. We propose several flavors of PCB PUFs by exploiting the manufacture process variations. We also propose a multi-stage arbiter PUF with exponential challenge response pairs. Our preliminary simulations revealed an average 50.4% inter-PCB hamming distance.
Open Failure Localization by Using MOFM—Magneto-Optical Frequency Mapping System with 532 nm Light Source
Authors: Nakamura Tomonori , Otaka Akihiro
Published: December 2020

Magnetic current imaging (MCI) is an effective method for the isolation of individual integrated circuit (IC) current paths [1]. MCI is therefore useful in localizing open/short defects. In the case of a short, the failure current must be large enough to enable the detection of the magnetic field; however, in the case of the open failure, the current is very weak and detection can be limited by the wiring capacitance and modulation frequency. Often, magnetic sensor sensitivity is a function of the sensor size. Superconducting Quantum Interference Device (SQUID) sensors can detect weak current in an open failure, but the resolution is limited by the sensor size and can be difficult to utilize for IC applications. A Giant Magnetic Resistance (GMR) sensor has enough resolution [2], but cannot achieve enough sensitivity till now. This paper will present the use of Magneto-Optical Frequency Mapping (MOFM) using a 532nm light source. In addition, this paper will describe a specific IC application for an open failure measurement. For this technique, the MO crystal (sensor material) is placed directly on the DUT (a wiring test sample). This paper will demonstrate that the magnetic field modulation from AC current in open wirings can be detected. In addition, the details of the AC current path can be visualized using a Magneto-Optical based MCI measurement. Finally, the open point in the failing circuit will be shown to be isolated with an accuracy of a few tens of micrometers.
Fault Localization by Finding Schematic of Devices Connecting All Emission Sites in Photon Emission Microscope Image
Authors: Oberai Ankush , Yuan Jiann-Shiun
Published: December 2020

The work presented here is related to the utilization of computer aided design (CAD) Navigation tools in combination with images from Emission Microscope (EMMI) to improve the accuracy and efficiency of Failure Analysis. The paper presents the flow to quickly identify the failing device by taking the photon emission microscope image and CAD data as input. EMMI is used extensively for detecting leakage current resulting from device defects, e.g., gate oxide defects/ leakage, latch-up, electrostatic discharge (ESD) failure, junction leakage, etc. This emitted light is captured as hotspots on the image. A typical photon emission microscope image has a series of photon emission spots initiated by one physical defect. Not all emission spots may be defects; for example, emissions are shown during normal saturation or switching mode of the transistor. This results in multiple connectivity path between these spots which failure analysis (FA) engineer may want to analyze. The FA engineer wants to detect the one failed device which causes multiple other devices to show false hotspots. The work presented in this paper involves identifying all the devices beneath the hotspot areas, processing the connectivity of the found devices and extracting the schematic for all the devices beneath these hotspots. The connectivity between the devices could be direct connections through nets or indirect through “transmission gates”. The extracted schematic helps the FA engineer focus the FA work on critical devices such as a driver and enables faster and more accurate fault localization. The work in the paper shows the extraction of critical path of devices and their connectivity.
Laser Silicon Interaction Study on Ring Oscillators to Establish Temperature Voltage Dependency Trends on 14 nm and Future FinFET Technologies
Authors: Mattey Gaurav , Ranganathan Lava
Published: December 2020

Critical speed path analysis using Dynamic Laser Stimulation (DLS) technique has been an indispensable technology used in the Semiconductor IC industry for identifying process defects, design and layout issues that limit product speed performance. Primarily by injecting heat or injecting photocurrent in the active diffusion of the transistors, the laser either slows down or speeds up the switching speed of transistors, thereby affecting the overall speed performance of the chip and revealing the speed limiting/enhancing circuits. However, recently on Qualcomm Technologies’ 14nm FinFET technology SOC product, the 1340nm laser’s heating characteristic revealed a Vt (threshold voltage) improvement behavior at low operating voltages which helped identify process issues on multiple memory array blocks across multiple cores failing for MBIST (Memory Built-in Self-test). In this paper, we explore the innovative approach of using the laser to study Vt shifts in transistors due to process issues. We also study the laser silicon interactions through scanning the 1340nm thermal laser on silicon and observing frequency shifts in a high-speed Ring Oscillator (RO) on 16nm FinFET technology. This revealed the normal and reverse Temperature Dependency Gate voltages for 16nm FinFET, thereby illustrating the dual nature of stimulation (reducing mobility and improving Vt) from a thermal laser. Frequency mapping through Laser Voltage Imaging (LVI) was performed on the Ring Oscillator (RO) using the 1340nm thermal laser, while concurrently stimulating the transistors of the RO. Spatial distribution of stimulation was studied by observing the frequency changes on LVI.
Application of Conductive-AFM in Soft Failure Analysis
Authors: Zhang Chuan , Ma Yinzhe , Dabney Gregory , Khiam Oh Chong , Chen Esther P.Y.
Published: December 2020

Soft failures are among the most challenging yield detractors. They typically show test parameter sensitive characteristics, which would pass under certain test conditions but fail under other conditions. Conductive-atomic force microscopy (CAFM) emerged as an ideal solution for soft failure analysis that can balance the time and thoroughness. By inserting CAFM into the soft failure analysis flow, success rate of such type of analysis can be significantly enhanced. In this paper, a logic chain soft failure and a SRAM local bitline soft failure are used as examples to illustrate how this failure analysis methodology provides a powerful and efficient solution for soft failure analysis.
Magnetic Field Imaging on Stacked Flash Memories by Laser Probing and SQUID Scanning
Authors: Sanchez K. , Bascoul G. , Infante F. , Courjault N. , Nakamura T.
Published: December 2020

Magnetic field imaging is a well-known technique which gives the possibility to study the internal activity of electronic components in a contactless and non-invasive way. Additional data processing can convert the magnetic field image into a current path and give the possibility to identify current flow anomalies in electronic devices. This technique can be applied at board level or device level and is particularly suitable for the failure analysis of complex packages (stacked device & 3D packaging). This approach can be combined with thermal imaging, X-ray observation and other failure analysis tool. This paper will present two different techniques which give the possibility to measure the magnetic field in two dimensions over an active device. Same device and same level of current is used for the two techniques to give the possibility to compare the performance.
Pico-Second Laser and Broad Argon Beam Tools for Characterization of Advanced Packaged Devices
Authors: Wang Y. , Spence C. , Coyle S. , Hunt J. , Shearer M. Hassel
Published: December 2020

In this paper, a workflow consisting of a pico-second laser tool followed by a broad argon beam tool is proposed as a solution for extremely large area preparation with surfaces suitable for SEM and FIB based analysis directly after polishing in the broad argon beam tool. Results are presented discussing the advantages of this workflow in terms of speed, size and quality of the surface for electron microscopy analysis. The use of the broad argon beam tool to complete the process produces near perfect interfaces especially compared to mechanical preparation techniques on the multilayers with vastly different properties found in advanced packages. Additionally, the tool can be used for backside thinning and reducing front side delayering.
Halogen-Free Microwave Induced Plasma Decapsulation of System in Package Modules
Authors: Tang J. , Wang J. , Dixon-Warren St.J. , Beenakker C.I.M.
Published: December 2020

When it comes to complex system-in-package (SiP) with a wide spectrum of materials and packaging structures integrated into a single module, decapsulation and the following failure analysis become extremely complex. Previous work published by the authors' group has demonstrated that a halogen-free microwave induced plasma (MIP) system has great advantage compared to the conventional techniques mentioned before. This paper explores the applicability of the halogen-free MIP on the most complex SiP module decapsulation. Applications in special structures in SiP include 3D stacked-die, gallium arsenide, surface acoustic wave (SAW) and bulk acoustic wave filters, and copper re-distribution layer. The halogen-free MIP decapsulation process can expose and preserve all the dies and passive components as well as the original failure sites, which proves to be key to ensuring a high success rate in SiP failure analysis.
Efficient and Effective Failure Analysis of Low-Resistive Defect in Logic Device Using Layout-aware and Volume Diagnosis
Authors: Song Ho Seok , Park Eun Ji , Kim Tae Hwan , Kang Dong Hae , Hong Jong Taek , Kim Ju-Heon , Won Seok-Jun , Kim Jin Sung
Published: December 2020

Efficient and effective failure analysis (FA) of low-resistive defect was studied by using layout-aware and volume diagnosis. Small or marginal defect is one of the most difficult defectivities to identify during FA effort, especially if defect-induced resistance is not as high as the electrical isolation can detect. Here, we used new analysis methodologies, particularly using layout-aware and volume diagnosis, and prioritizing patterns in terms of a defective risk for following FA. The actual FA work verified that new analysis methodologies successfully identified low-resistive defect of Back-End-of-Line (BEOL) which was not detected by a conventional way and efficiently reduced the turn-around time (TAT) of physical failure analysis (PFA) by 57%, prompting fast feedback to fab.
Sub-20nm Device Voltage-Sensitive SRAM Characterization and Failure Analysis
Authors: Ting Seng Nguon , Lo Hsien-Ching , Nedeau Donald , Sinnott Aaron , Beaudoin Felix
Published: December 2020

With rapid scaling of semiconductor devices, new and more complicated challenges emerge as technology development progresses. In SRAM yield learning vehicles, it is becoming increasingly difficult to differentiate the voltage-sensitive SRAM yield loss from the expected hard bit-cells failures. It can only be accomplished by extensively leveraging yield, layout analysis and fault localization in sub-micron devices. In this paper, we describe the successful debugging of the yield gap observed between the High Density and the High Performance bit-cells. The SRAM yield loss is observed to be strongly modulated by different active sizing between two pull up (PU) bit-cells. Failure analysis focused at the weak point vicinity successfully identified abnormal poly edge profile with systematic High k Dielectric shorts. Tight active space on High Density cells led to limitation of complete trench gap-fill creating void filled with gate material. Thanks to this knowledge, the process was optimized with “Skip Active Atomic Level Oxide Deposition” step improving trench gap-fill margin.
High-Resolution Image Fusion of Linearly Polarized Subsurface Optical Images
Authors: Cilingiroglu T. Berkin , Leslie Neel , Somani Seema , Sabbineni Prasad
Published: December 2020

In high numerical aperture (NA) subsurface imaging, we can obtain higher resolution in selected directions at the expense of resolutions in other directions, utilizing the vectorial properties of polarized light. In this work, we propose an image fusion framework that produces a single image with higher resolution and image quality in all directions by processing multiple images acquired by varying the polarization direction of the linearly polarized input laser light.
Single Shot Logic Patterns: Increasing Diagnostic Resolution of Logic Failures Utilizing Single Fault Targeting and Constraints
Authors: Estores Rommel , Barbian Eric
Published: December 2020

ATPG diagnosis is an essential part in failure analysis and is proven to be an effective technique in isolating faults in the digital core. In many single failure cases however, ATPG diagnosis could yield either incorrect candidates or includes a large amount of equivalency which limits diagnostic resolution. While iterative ATPG diagnosis improves diagnostic resolution, there are many cases where the resolution is still insufficient. This paper will discuss a methodology that helps the analyst understand and complement ATPG diagnosis by using an approach called “single shot logic patterns”. New patterns that each target one singular fault in the area of interest provide the failure analyst with simplified analytical data. This process is repeated for each suspect candidate. The number of times a target fault is detected is increased for better resolution. Aggregating this analytical data with the layout and fan out of the net instances could provide greater resolution into the likely defective area. Furthermore, adding constraints can also be used to further simplify the test and/or control the fan out of failures. Only equivalencies where there is observable fan out can achieve greater diagnostic resolution. ATPG tools have been observed to not always maximize this fan out.
Backside Mechanical Preparation Methodology for Effective Failure Analysis on Small and Non-Exposed Die Paddle Package
Authors: Hoon Ong Pei , Kay Ng Kiong , Yen Gwee Hoon
Published: December 2020

Chemical etching is commonly used in exposing the die surface from die front-side and die backside because of its quick etching time, burr-free and stress-free. However, this technique is risky when performing copper lead frame etching during backside preparation on small and non-exposed die paddle package. The drawback of this technique is that the copper leads will be over etched by 65% Acid Nitric Fuming even though the device’s leads are protected by chemical resistance tape. Consequently, the device is not able to proceed to any other further electrical measurements. Therefore, we introduced mechanical preparation as an alternative solution to replace the existing procedure. With the new method, we are able to ensure the copper leads are intact for the electrical measurements to improve the effectiveness and accuracy of physical failure analysis.
High Resolution Mapping of Subsurface Defects at SiO2/SiC Interfaces by Time-Resolved Scanning Nonlinear Dielectric Microscopy
Authors: Yamagishi Yuji , Cho Yasuo
Published: December 2020

High resolution observation of density of interface states (Dit) at SiO2/4H-SiC interfaces was performed by time-resolved scanning nonlinear dielectric microscopy (tr-SNDM). The sizes of the non-uniform contrasts observed in the map of Dit were in the order of several tens of nanometers, which are smaller than the value reported in the previous study (>100 nm). The simulation of the tr-SNDM measurement suggested that the spatial resolution of tr-SNDM is down to the tip radius of the cantilever used for the measurement and can be smaller than the lateral spread of the depletion layer width.
A Study of Clustering for the Enhancement of Image Resolution in Dynamic Photon Emission
Authors: Chef S. , Chua C. T. , Gan C. L.
Published: December 2020

Limited spatial resolution and low signal to noise ratio are some of the main challenges in optical signal observation, especially for photon emission microscopy. As dynamic emission signals are generated in a 3D space, the use of the time dimension in addition to space enables a better localization of switching events. It can actually be used to infer information with a precision above the resolution limits of the acquired signals. Taking advantage of this property, we report on a post-acquisition processing scheme to generate emission images with a better image resolution than the initial acquisition.
Case Study of Electro-Optical Probing Signal with High Signal-Noise Ratio
Authors: Xiao Ryan , Wang William , Li Ang , Xu Shengqiu , Liu Binghai
Published: December 2020

With the development of semiconductor technology and the increment quantity of metal layers in past few years, backside EFA (Electrical Failure Analysis) technology has become the dominant method. In this paper, abnormally high Signal Noise Ratio (SNR) signal captured by Electro-Optical Probing (EOP)/Laser Voltage Probing (LVP) from backside is shown and the cause of these phenomena are studied. Based on the real case collection, two kinds of failure mode are summarized, and simulated experiments are performed. The results indicate that when a current path from power to ground is formed, the high SNR signal can be captured at the transistor which was on this current path. It is helpful of this consequence for FA to identify the failure mode by high SNR signal.
Visualization and Measurements of 3D Structures in Memory and Logic Devices
Authors: Avishai A. , Buxbaum A. , Klochkov D. , Neumann J. T. , Korb T. , Foca E.
Published: December 2020

This paper describes the application of 3D FIB-SEM tomography as a method for quantifying process variations across the die and across the wafer, as well as layout investigations. In this study, the analysis of results acquired by 3D FIB-SEM tomography were applied to a 64L 3D-NAND device where process induced variation in the high aspect ratio vertical memory channels is measured and to a double stack 3D-NAND architecture, which is comprised of two 32-layer stacks where eccentricity of the pillars was evaluated for layers in both upper and lower stacks. In addition, a partial layout of a 14nm logic device is investigated by this method, demonstrating the capabilities for structural verification, and structural overlay of elements from a 7nm logic device were also evaluated. The results demonstrate the value of 3D FIB-SEM tomography for physical confirmation of the structural layout, which can be applied towards device debug and reverse engineering.
A Novel Approach to Unsupervised Automated Extraction of Standard Cell Library for Reverse Engineering and Hardware Assurance
Authors: Wilson Ronald , Acharya Rabin Y. , Forte Domenic , Asadizanjani Navid , Woodard Damon
Published: December 2020

Reverse engineering today is supported by several tools, such as ICWorks, that assist in the processing and extraction of logic elements from high definition layer by layer images of integrated circuits. To the best of our knowledge, they all work under the assumption that the standard cell library used in the design process of the integrated circuit is available. However, in situations where reverse engineering is done on commercial off-the-shelf components, this information is not available thereby, rendering the assumption invalid. Until now, this problem has not been addressed. In this paper, we introduce a novel approach for the extraction of standard cell library using the contact layer from these images. The approach is completely automated and does not require any prior knowledge on the construction or layout of the target semiconductor integrated circuit. The performance of the approach is evaluated on two AES designs with 10,000 cells compiled from standard libraries with 32nm and 90nm node technologies having 350 and 340 standard cells respectively. We were able to successfully extract 94% and 60% of the standard cells from the 32nm and 90nm AES designs using the proposed approach. We also perform a case study using a realworld sample extracted from a smartcard. Finally, we also investigate the various challenges involved in the extraction of standard cells from images and the steps involved in resolving them.
Transistor Level Reliability Assessment of Gate Oxide Defects by BTI Stress Nanoprobing
Authors: Albert Dave , Song Zhigang , Tenney Mike , McGinnis Pat , Oarethu Johns
Published: December 2020

This paper presents Electrical Failure Analysis (EFA) and Physical Failure Analysis (PFA) on a random time zero (t0) gate oxide defect within an IBM processor manufactured with a 14nm SOI (Silicon On Insulator) FinFET technology. The natures of the Functional Fail, the gate oxide defect, and the transistor characteristics are included.

The impact of this gate oxide defect to product yield and performance, plus the extent to which it extends across the product chip, which includes passing circuits, is covered. Since chips, which may contain this defect, could be present within the entire product lifecycle, the reliability aspects of the defect at the transistor level were investigated.

Among the various reliability stresses available for transistors, Constant Voltage Stress (CVS) Bias Temperature Instability (BTI) was chosen. CVS BTI stressing was able to be performed on both the NFETs and PFETs within the Inverter of the failing circuit, plus other identical reference circuits.

The BTI stress nanoprobing is covered. This includes an overview of BTI stressing, confirming the nanoprobing system and electrical stress/test programs are adequate for BTI stressing, BTI stress methodologies for Inverters, plus the BTI stress results.

The transistor level BTI stress results are discussed and compared to other published BTI literature. Finally, the reliability aspects of this gate oxide defect are discussed.
Scanning Capacitance Microscopy and Spectroscopy for Root Cause Analysis on Location Specific Individual FinFET Devices
Authors: Kaszuba Phil , Moszkowicz Leon , Wells Randy
Published: December 2020

In 1986 the Atomic Force Microscope (AFM) was invented by Gerd Binnig, Christoph Gerber, and Calvin Quate [1]. Since then, numerous analytical techniques have been developed and implemented on the AFM platform, evolving into what is collectively called the Scanning Probe Microscope (SPM). The SPM has since become well established as a mainstream analytical instrument with a continually increasing role in the development of nanoscale semiconductor technologies providing critical data from initial concept to technology development to manufacturing to failure analysis [2].

Scanning Capacitance Microscopy (SCM) has a longstanding, well-established track record for detecting dopant-related mechanisms that adversely affect device performance on planar (Field Effect Transistor) FETs as well as other structures (e.g., diodes, capacitors, resistors). The semiconductor industry’s transition to three dimensional FinFET devices has resulted in many challenges with regard to device analysis. This is especially true when it is necessary to perform detailed dopant analysis on a specific device; the device may be comprised of a single or multiple fins that have been called out specifically through traditional fault localization techniques. Scanning Capacitance Spectroscopy (SCS) is an analytical method, implemented on the SCM platform in which a series of DC bias conditions is applied to the sample and the carrier response is recorded using SCM [3]. SCS has a proven history of highlighting dopant related anomalies in semiconductor devices, which, in some instances, might not otherwise be “visible”. This paper describes successful application of SCM and SCS in showing, in full detail, a dopant-related failure mechanism on an individual, location-specific 14 nm FinFET.
The Potential of Inline Automated Defect Review of Mechanical Property and Electrical Characterization by AFM
Authors: Cho Sang-Joon , Kim Seong-Oh , Lee Moses , Lee Yoonkyoung
Published: December 2020

With decreasing device sizes, nanometer-sized defects on the wafer substrates can already limit the performance of the devices. The detection and precise classification of these defects requires additional characterization methods with a resolution in the nanometer range. It is well known that AFM can measure not only surface morphology but also mechanical and electrical properties. However, the versatility of AFM is not fully utilized in industrial applications due to the various limitations. Various limitations include low throughput and tip life in addition to the laborious efforts for finding the defects in inline automated defect review (ADR). In this paper we introduce the ADR AFM with mechanical and electrical characterization capability of defects in addition to high throughput, high resolution, and non-destructive means for obtaining 3D information for nm-scale defect review and classification.
DE HOBBES A APPADURAI
Authors: Soares Gomes Fernando , Rodrigues Teixeira Arthur , Silva Ravnjak Leandro Luciano
Published: December 2020

Ao longo da construção do pensamento filosófico e político modernos, diversos teóricos desenvolveram a concepção de que, com o escopo de constituírem Estados organizados, harmônicos e pautados na segurança jurídica, as sociedades primevas estabeleceram termos e organizaram-se sob a égide de um pacto social. Tal preceito foi, nessa perspectiva, responsável pelo retardamento do processo natural de produção do inimigo, bem como pela garantia do desenvolvimento do corpo social. Entretanto, a análise do cenário contemporâneo, sugere a existência de Estados que não apresentam interesse em assegurar a essência do pacto aos sujeitos diretamente tutelados, seja por ações contrárias a essa premissa, seja por incapacidade do Estado ou pela omissão deliberada, o que se identifica com destaque na condição do refugiado. Nessa direção, o presente artigo, que utiliza como método a revisão de literatura, tem como objetivo evidenciar a crise do contrato social a partir da ótica do instituto do refúgio, estabelecendo conexões na ciência política moderna, por meio da leitura do conceito de geografia da raiva. A principal contribuição deste texto é o embasamento de uma percepção humanitária, na qual o instituto do refúgio – tão necessário como é -, em si, representa uma ruptura nefasta dos parâmetros mais básicos da sociabilidade. Denota-se, ao final, que o entendimento do refugiado como personagem de uma pactuação violada é noção elementar para a projeção de políticas e estratégias de inclusão e de promoção dos direitos humanos.
Wetlands for a Sustainable Urban Future: Insights from Pondicherry, South India
Authors: Mathevet Raphaël , Targowla Simon , Munisamy Anbarashan , Govindan Venkatasubramanian , Narayanan Ayyappan , Bautès Nicolas
Published: December 2020

Wetland ecosystems hold an important part of the world’s biodiversity and are complex social-ecological systems. Aiming to understand interdependencies among their components and to define management policies, the social-ecological trajectory of Oussudu lake – a wetland of Pondicherry region in South India – was reconstructed and analysed. During the last decades, this wetland has transformed from an irrigation tank to a lake to cater biodiversity conservation and recreation. The environmental history highlights a governance change that has contributed to “black boxing” the wetland’s functional environment and to conceal major water issues at regional and local levels. This study emphasizes the importance of implementing an approach that combines the management of this urban lake commons with a multi-scalar, socio-ecological and multi-stakeholder analysis. A trade-off on the seasonal water regime between different users - including fauna and flora - has to be found.
Industrial-Scale Production and Applications of Bacterial Cellulose
Authors: Zhong Chunyan
Published: December 2020

Bacterial cellulose (BC) is a natural biomaterial synthesized by bacteria. It possesses a unique structure of cellulose nanofiber-weaved three-dimensional reticulated network that endows it excellent mechanical properties, high water holding capability and outstanding suspension stability. It is also characterized with high purity, high degree of crystallinity, great biocompatibility and biodegradability. Due to these advantages, BC has gained great attentions in both academic and industrial areas. This critical review summarizes the up-to-date development of BC production and application from an industrial perspective. Firstly, a fundamental knowledge of BC's biosynthesis, structure and properties is described, and then recent developments in the industrial fermentation of BC are introduced. Subsequently, the latest commercial applications of BC in the areas of food, personal care, household chemicals, biomedicine, textile, composite resin are summarized. Finally, a brief discussion of future development of BC industry is presented at the end.
Metal Organic Frame-Upconverting Nanoparticle Assemblies for the FRET Based Sensor Detection of Bisphenol A in High-Salt Foods
Authors: Xu Zhou , Zhang Lin-wei , Long Ling-li , Zhu Shao-hua , Chen Mao-long , Ding Li , Cheng Yun-hui
Published: December 2020

To resolve the occurrence of unfulfillable detection in high-salts foods, we used fluorescence resonant energy transfer (FRET) sensors based on nanoparticle upconversion. In this study, we developed a novel FRET sensor for the detection of bisphenol A (BPA) in high-salt foods. We based this approach on the assembly of aptamer modified upconversion nanoparticles (DNA1-UCNPs) and complementary DNA modified metal organic frames (DNA2-MOFs), which possessed corresponding wavelength absorption. Targeting BPA signal transduction was performed using the BPA aptamer, via competitive recognition between the BPA analyte and complementary DNA sequences in a high-salt solution. Sensor adaption in high-salt samples was attributed to functional hydrophilic groups, modified in the MOFs, and the enhanced colloidal stability of these MOFs. The MOF-UCNP assembly displayed considerable analytical performance in terms of BPA detection, with a linear range of 0.1–100 nM, and a limit of detection (LOD) of 0.02 nM, in a 340 mM NaCl food sample (the energy drink, Gatorade). Thus, this method provides a solid basis for small molecules detection in high-salt foods.
Impacts of Climatic Variation on the Growth of Black Spruce Across the Forest-Tundra Ecotone: Positive Effects of Warm Growing Seasons and Heat Waves Are Offset by Late Spring Frosts
Authors: Moreau Guillaume , Chagnon Catherine , Auty David , Caspersen John , Achim Alexis
Published: December 2020

Climate strongly limits the physiological processes of trees near their range limits, leading to increased growth sensitivity. Northeastern North America is experiencing considerable warming, so the growth of trees near the northern treeline represents a key indicator of forest responses to climate change. However, tree-ring series and corresponding climatic data are scarce across the forest-tundra ecotone when compared to southern boreal regions, resulting in fewer studies on growth-climate relationships focused on this ecotone. Using daily climatic data, we identified trends in growing season heat accumulation and the intensity of acute climatic events over the last several decades in the southern and the northern parts of the forest-tundra ecotone in northeastern North America, and investigated their influence on black spruce radial growth. We found that black spruce trees responded positively to the increase in growing season temperatures and heat wave intensity, suggesting that growth is currently limited by suboptimal temperatures. While tree growth in the southern region generally benefited from warm spring temperatures, vulnerability to late spring frosts reduced tree growth in the northern region and increased probability of abrupt growth decline. In this region, late spring frosts offset approximately half of the additional growth that would otherwise occur over the course of a warm growing season. This vulnerability of northern trees may result from local adaptations to short growing seasons, which initiate biological activities at colder temperatures in the spring. Overall, our results highlight the need to explicitly incorporate acute climatic events into modeling efforts in order to refine our understanding of the impact of climate change on forest dynamics.
Status Construction During COVID-19: Antibody Positive People's Rising Prestige
Authors: Evans M. D. R. , Kelley Jonathan , Kelley Sarah
Published: December 2020

The protracted COVID-19 crisis provides a new social niche in which new inequalities can emerge. We provide predictions about one such new inequality using the logic of Status Construction Theory (SCT). SCT, rooted in Expectations State Theory and from there developed by Ridgeway and colleagues, proposes general hypotheses about how new inequalities arise through process of interaction at the individual level: an unordered categorical difference becomes attached to a cultural value that gives one category more value than the other; social scripts concerning it emerge; small elements of assertion and deference creep into more and more encounters that an individual participates in, hears about through networks, and learns about via social and conventional media. The categorical difference begins to morph into a hierarchical status distinction. Through these mechanisms, individuals develop “status beliefs” that most people in their communities endorse the status distinction. Although they may or may not endorse the distinction personally, they believe that most people do so and they find that the path of least resistance socially is to enact the scripts that affirm the higher status/prestige of the favored group. We apply Status Construction Theory to the categorical difference between Antibody Positives (who have been tested for IgG antibodies) and Others (everybody else). Using the general logic of SCT and specifically developing applications of its key propositions, we predict that the categorical difference between Antibody Positives and Others will transition to a status distinction and propose testable, falsifiable hypotheses about each step of the process.
Influence of Iron-Enriched Biochar on Cd Sorption, Its Ionic Concentration and Redox Regulation of Radish under Cadmium Toxicity
Authors: Dad Fiza Pir , Khan Waqas-ud-Din , Tanveer Mohsin , Ramzani Pia Muhammad Adnan , Shaukat Rabia , Muktadir Abdul
Published: December 2020

Cadmium (Cd), a potent heavy metal, causes a significant reduction in plant growth and its yield by interfering with the plant’s mineral nutrition and, primarily, by inducing Cd-induced oxidative damage. Cd mobilization at the soil–root interface is also very important in context of its bioavailability to plants. Therefore, an experiment was carried out to evaluate the mitigating role of iron-enriched biochar (Fe-BC) on Cd accumulation in soil and Cd toxicity in radish plants. Radish seeds were sown in pots, and two levels of Cd (0 and 0.75 mg kg−1) and two levels of Fe-BC (0 and 0.5%) were applied. Cd stress significantly reduced radish fresh and dry biomass production, which was due to high production of malondialdehyde (36%) and increase in cell membrane permeability (twofold) relative to control. Moreover, Cd stress considerably reduced chlorophyll concentrations and uptake of some essential nutrients, such as Ca, K, and Fe. Contrarily, Fe-BC application ameliorated Cd toxicity by triggering the activation of antioxidant enzymes (catalase and ascorbate peroxidase), primary and secondary metabolite accumulation (protein and phenolics concentrations), and by improving plant mineral nutrition under Cd treatment, compared with Cd treatment only. The ability of biosorbent material (Fe-BC) to adsorb the Cd ion on its surface and its immobilization from Cd-polluted soil to plant root was determined by using Langmuir and Freundlich isotherm models. Interestingly, Cd concentration was found in soil as diethylenetriamine (DTPA)-extractable soil Cd on radish root, but not reported in radish shoot with Cd+Fe-BC treatment, compared to Cd treatment; suggesting that Fe-BC treatment has a potential to provide extra strength to the root and shoot, and plays an important role in regulation ionic and redox homeostasis under Cd stress.