bluuebunny/crossref_metadata_2025 huggingface dataset:
The harpy machine
Authors: Bisiani R.
Published: January 2007

Efficiently storing and retrieving data has always been one of the major problems in computer technology. Until recently there has been more interest for the technology of storing and retrieving data in mass memory than for the problem of accessing data in main memory. Semiconductor technology improvements have lowered main memory cost and increased speed, therefore opening new application areas (e.g. image and speech understanding, graphics) to low cost systems. Some of the tasks in these areas are data intensive and require complex data structures. In these cases, most of the computing power is used to access data rather than to perform operations on them. The performance of such applications can be improved if the memories are tailored to the data structures they contain and to the access operations that can be performed on those data structures. The paper describes an architecture designed to explore the advantages offered by tailored, intelligent memories. The architecture has been implemented and tested on the Harpy speech understanding system. The implementation has been measured and the results are reported in the paper.
A LISP machine
Authors: Greenblatt Richard D. , Knight Thomas F. , Holloway John T. , Moon David A.
Published: January 2007

LISP is the second oldest computer-programming language still in active use. Our implementation is based on a powerful microprogrammed processor designed specifically for LISP. This processor supports a tagged macro-architecture; it manipulates items which have a built-in data-type field.

The system supports several important new storage-management features, including a real-time garbage collector with hardware assist (using the basic algorithm of Baker).

The software itself is written in LISP to a much larger extent than in previous systems. In fact, there are only two levels in which code is written: LISP and microcode. Among other things this improves the consistancy of system interfaces.

The system design incorporates the personal computer philosophy. We believe the personal computer will predominate in the future since it is preferable to time-sharing in most cases and technological trends are greatly reducing its cost penality. In the case of very large programs, the personal computer can be cost-effective today, due to the phenomenon of thrashing encountered in time-sharing systems.
SYNGLISH - a high level query language for the RAP database machine
Authors: Ozso Tamer M. , Ozkarahan Esen A.
Published: January 2007

This paper describes a high-level query language developed and implemented for the RAP database machine. The language, called SYNGLISH, is based on the semantic structure of the English sentences. The software system developed accepts SYNGLISH queries and produces RAP assembler code which is then executed by the RAP software emulator.
Virtual I/O, an experiment
Authors: Hartung R. L. , Ammerman A.
Published: January 2007

This paper describes an experiment in virtualizing Input/Output (I/O) for allowing new I/O technologies, such as ARPANET, to replace old hardwired interface disciplines. This was accomplished using micro-programmable host machines, emulation, and virtual machine concepts. The I/O system under study was the Naval Tactical Data System interface which is a U.S. Navy standard.
Some studies on microprogram optimization
Authors: Srimani Pradip K. , Sinha Bhabani P.
Published: January 2007

Minimization of control memory bit dimension constitutes a major problem in the synthesis of a microprogrammed digital computer. This paper investigates the problem in both the cases of static and dynamic microprogramming, i.e., the problems of ROM, as well as WCS minimization. It develops certain useful results and pre-estimates about the possible minimal cost of implementation and finally describes a simple reduction methodology to pick up one of the near minimal or engineering solutions with much less computational labor and, if necessary, the true minimal solution with some extra computation.
The micro-architecture of the ECLIPSE® MV/8000
Authors: Blau Jonathan S. , Holland Charles J. , Keating David L.
Published: January 2007

The microcode of the ECLIPSE MV/8000 controls the hardware to emulate an instruction set. In the MV/8000 the micro-architecture is defined and limited by the following constraints: 1) the desire to implement microcode in a limited number of locations; 2) the use of LSI technology; 3) a virtual memory architecture.

This paper will attempt to show how each of these factors contributed to the micro-architecture, to describe that architecture, and to relate some of the more interesting microcoding issues.
Design of a user-microprogrammable building block
Authors: Kraley Michael , Rettberg Randall , Herman Philip , Bressler Robert , Lake Anthony
Published: January 2007

A user-microprogrammable computer has been developed for use as a building block in general-purpose and dedicated computer systems. The architecture is designed to be easily microprogrammed and features a 32-bit, vertically oriented microinstruction. The processor has a 135-nanosecond cycle time, either 16- or 20-bit macro data paths, and 1024 hardware registers. A significant fraction of the processor bandwidth may be budgeted for I/O processing to allow the substitution of microcode for expensive peripheral controllers. Furthermore, the micromachine is well suited to the emulation of other computer architectures in that it provides a large writable microcode memory and a minimum of special processor data paths. The design goals and strategies which determined the machine architecture are discussed, as well as an overview of the architecture and hardware organization. Finally, we report a number of specific applications developed to date.
Compressing control ROM for VLSI microprogrammed microprocessors
Authors: Guttag Karl M.
Published: January 2007

By taking advantage of information redundancy and MOS structures, control ROMs for microprogrammed microprocessors can be considerably reduced. The Compressed Control ROM (CCROM) method for reducing control ROMs is described in terms of a simple example that compares the fully horizontal (unencoded) approach, the normal partially encoded approach, and the CCROM approach. Due to using CCROM, the effective cost of control ROM is considerably reduced, and this in turn can have a significant effect on the design approach by making it more cost effective to implement control signals directly from the control ROM rather than from random logic decodes.
A data abstraction language based on microprogramming
Authors: Kurki-Suonio R. , Heinänen J.
Published: January 2007

The paper describes the basic ideas in extending a machine-oriented microprogramming language into a system implementation language through data and control abstraction. The approach allows an extremely primitive base language to be bootstrapped to a higher level by a type definition mechanism where the operations of the types may be microprogrammed. Vertical migration is then possible by local modifications in operation definitions. On the other hand, a suitable type definition library would make it unnecessary for an ordinary user to know that all operations are ultimately based on microprogrammed definitions. This work is part of project Ukko which has designed a special microprogrammable computer for experimentation with user microprogramming.
A retargetable microcode generation system for a high-level microprogramming language
Authors: Marwedel Peter
Published: January 2007

A system for the generation of microcode from a high-level microprogramming language is presented. The system is independent of the target machine because it is table-driven by a separate hardware declaration. It is applicable for horizontally microprogrammed machines.
S*(QM-1)
Authors: Klassen Alynn , Dasgupta Subrata
Published: January 2007

In previous papers [1,2,3] a high level microprogramming language schema called S* was described. S* is a partially specified language such that for a given host machine M1, a particular language S*(M1) results when M1's properties are used to complete the specifications of S*. We say that S* is
instantiated
into S*(M1) with respect to M1. This paper describes the instantiation of S* with respect to the Nanodata QM-1. The resulting language S*(QM-1) allows high level “nanoprograms” to be written for the QM-1. The major objective of this research was to examine the language schema S*, from which S*(QM-1) was instantiated, in light of its overall philosophy and usefulness as a tool in the development of a specific microprogramming language for a highly complex microprogrammable machine.
Considerations for local compaction of nanocode for the nanodata QM-1
Authors: Rideout Douglas J.
Published: January 2007

Much work has been done recently on the problem of compaction of microcode, that of detecting parallelism between microoperations expressed in a sequential manner in order to pack the operations into as few microinstructions as possible. In particular, the theory of
local
compaction has developed to the stage where some extensive testing of the models and methods is called for.

This paper examines some of the considerations for local compaction of the
nanocode
of the Nanodata QM-1 in the context of the theoretical model of compaction presented in the literature.

This application of compaction to QM-1 nanocode not only provides a stringent test of the model, but also shows that compaction of code for this architecture is feasible, thus forming part of a test of the practicalities of developing a high-level microprogramming language for the QM-1.
MIPS
Authors: Hennessy John , Jouppi Norman , Przybylski Steven , Rowen Christopher , Gross Thomas , Baskett Forest , Gill John
Published: January 2007

MIPS is a new single chip VLSI microprocessor. It attempts to achieve high performance with the use of a simplified instruction set, similar to those found in microengines. The processor is a fast pipelined engine without pipeline interlocks. Software solutions to several traditional hardware problems, such as providing pipeline interlocks, are used.
The Burroughs B1800 microprogrammed measurement system
Authors: Denny W. Michael
Published: January 2007

Traditional computers are not usually effective assistants in their own measurement.

It is cost-prohibitive to dedicate much of the hardware to measurement. And, when any is dedicated, it is usually too rigidly attached to the hardware itself to follow the rapidly changing software structures.

Software measurement tools, on the other hand, often exhibit overhead penalties and usually remain tools for a few elite “system” programmers. The majority - programming in “non system” languages like COBOL, FORTRAN, and RPG - look to these “experts” for analysis of their own programs' performance.

The B1800 utilizes a hybrid measurement approach which retains many of the advantages of traditional hardware and software monitoring while avoiding the rigidity of hardware-only measurements and the overhead of software-only measurements. This hybrid system is easily implemented in ordinary high level languages like COBOL, RPG, and FORTRAN and easily used by non-system programmers.
Microprogrammed control for signal processing
Authors: Swartzlander Earl E.
Published: January 2007

An easily implemented microprogrammed control concept for signal processors is presented. The control unit is developed by restricting the next state function of a classical Moore machine, and by using microprogramming in its implementation. The concept is well matched to requirements for signal processors (which do not require complex branching logic). It is optimized for efficient implementation with commercially available integrated circuits as demonstrated by an example signal processor which is described in detail to illustrate the simplicity and flexibility of the concept.
Our machine, a microcoded LSI processor
Authors: Johannsen Dave
Published: January 2007

Current LSI technology allows the systems designer to construct complex data processing structures containing tens of thousands of transistors on single silicon chips. Constraints imposed by the technology influence design tradeoffs and result in computer architectures dramatically different from the more classical computer designs. At CalTech we are exploring the possibilities offered by nMOS technology, with the “Our Machine” (OM) project being one of the current research projects. The OM project is investigating the structured design of a multi-chip microcoded processor system. Due to constraints imposed by limited man- and computer-power, we are gaining insights into future constraints that will be placed on all large chip designs as the technology improves to allow chips with hundreds of times the complexity of today's designs.
Improving the performance of interpretive hierarchies by the introduction of local hardware
Authors: Manthey Michael J.
Published: January 2007

This paper introduces the notion of improving the performance of interpretive hierarchies by filtering out trivial operations at the highest possible level of the hierarchy and executing them by hardware local to that level. The technique can be used either with microprocessors or a set of identical general purpose hardware modules together with tables specifying the details of the specific interpreters.
EMMY/360
Authors: Wallach Walter A.
Published: January 2007

The Stanford EMMY is a vertically organized, dynamically microprogrammed flexible host machine configured as part of the Stanford Emulation Laboratory. EMMY/360 is an emulation of System/360 central processor architecture microcoded for the Stanford EMMY. This paper presents the characteristics and organization of EMMY/360. Performance of both the emulator and the host machine on a typical S/360 instruction mix is summarized.
Proposal on efficient address allocation algorithm for horizontal microprograms
Authors: Tanaka Tadashi , Kawada Tadamichi , Emori Teiji
Published: January 2007

A new algorithm to allocate horizontal microprograms having many addressing restrictions is presented in this note. This algorithm, using simultaneous partitioning, sufficiently maximizes the microprogram performance and minimizes the necessary memory amount in practical use.
A comparison of the code space and execution time required for FORTRAN assignment statements on six computer architectures
Authors: Belgard Richard A. , Schneider Victor B.
Published: January 2007

A method is presented for deriving lower and upper bounds for memory space and execution time of compiled FORTRAN assignment statements. Formulas, in terms of variable references, are presented. The method is applied to six hypothetical computer architectures, standardized to eliminate variations resulting from addressing strategies and varying opcode lengths. The results are presented in tabular form.
Design considerations for a QM-1 based multimicroprocessor emulation system
Authors: Crocker Steve
Published: January 2007

Microprocessors, which are now readily available, are being used in the design of many systems. Soon avionic systems will be designed that use many microprocessors working together. Systems based on multiple microprocessors (MMP) will be designed to offer higher throughput and/or higher reliability than uniprocessor systems.

There are now very few design tools to aid in developing or evaluating proposed microprocessor systems. One highly useful tool is an emulation facility for modeling, testing, and measuring proposed MMP systems.
A micro signal processing module
Authors: Bell David M. , Hand Larry E.
Published: January 2007

A small, high-speed programmable digital signal processing module utilizing bit slice microprocessor techniques is described. The processor is designed to provide low-cost, modular implementations of digital signal processing tasks, such as fast Fourier transforms, data compression, digital filtering, etc. The module demonstrates the use of recent LSI technology in a small compact design for both single and multiple processor implementation of signal processing algorithms.
Programming a microcoded processor for speech waveform generation
Authors: Kopec Gary E. , Miranker Glen S.
Published: January 2007

One effective way to exploit decreasing hardware costs is to build processors tailored to highly specialized tasks. Our experience with the specification, design and programming of a hardware realization of a terminal analog model of the human vocal tract are discussed.
Quantum computing in Fortran
Authors: Markus Arjen
Published: January 2007

Quantum computing is the delicate art of using a quantum-mechanical system to perform some kind of computation. Such a system differs in a number of significant ways from ordinary computers:• A quantum computer actually does a lot of computations
at the same time,
each solution is represented by a particular possible state. This is inherent to the physical properties of such a system.• Unless you are sure that you have reached the final (unique) solution, you can not "look" at the "values" of the variables in the computer program that is being run: since all solutions are possible
at the same time,
observing the values will influence the system and put it into one particular, but otherwise arbitrary, state.• All computations must be reversible, that is, a statement like "a = 5" can only appear in the initialization phase of a program, because the previous value will be lost. On the other hand, a statement like "a = a + 5" is reversible, since you can retrieve the original value.The properties of such a quantum computer make it possible to devise very efficient algorithms. One such algorithm, described by L. Grover (see the references), is searching in an unsorted array of items. With ordinary computers this can not be done more efficiently than in
O
(N) steps (an exhaustive search: each item is examined in the worst case), with this quantum algorithm, however, the number of steps needed is
O
(N
1/2
).Devising quantum algorithms requires a thorough understanding of quantum mechanics, there is no doubt about that. Another question is: do we need quantum computers and special programming languages to program (or perhaps emulate) these algorithms? This article tries to show that, at least for the quantum search algorithm, a classical programming language like Fortran is quite fit (yes, the pun is fortunate).
On the foundations of artificial workload design
Authors: Ferrari Domenico
Published: January 2007

The principles on which artificial workload model design is currently based are reviewed. Design methods are found wanting for three main reasons: their resource orientation, with the selection of resources often unrelated to the performance impact of resource demands; their avoiding to define an accuracy criterion for the resulting workload model; and their ignoring the dynamics of the workload to be modeled. An attempt at establishing conceptual foundations for the design of interactive artificial workloads is described. The problems found in current design methods are taken into account, and sufficient conditions for the applicability of these methods are determined. The study also provides guidance for some of the decisions to be made in workload model design using one of the current methods.
Improved lineariser methods for queueing networks with queue dependent centres
Authors: Krzesinski A. , Greyling J.
Published: January 2007

The Lineariser is an MVA-based technique developed for the approximate solution of large multiclass product form queueing networks. The Lineariser is capable of computing accurate solutions for networks of fixed rate centres. However, problems arise when the Lineariser is applied to networks containing centres with queue dependent service rates. Thus networks exist which seem well suited (a large number of lightly loaded centres, large numbers of customers in each closed chain) for Lineariser solution but whose queue dependent centres cannot be solved accurately by the Lineariser method. Examples have also been found where the Lineariser computes accurate values for the queue lengths, waiting times and throughputs though the values computed for the queue length distributions are totally in error.

This paper presents an Improved Lineariser which computes accurate approximate solutions for multiclass networks containing an arbitrary number of queue dependent centres. The Improved Lineariser is based on MVA results and is therefore simple to implement and numerically well behaved. The Improved Lineariser has storage and computation requirements of order (MN) locations and (MNJ
2
) arithmetic operations where M is the number of centres, N the total number of customers and J the number of closed chains.

Results from 130 randomly generated test networks are used to compare the accuracy of the standard and Improved Linearisers. The Improved Lineariser is consistently more accurate (tolerance errors on all performance measures less than 2 per cent) than the standard Lineariser and its accuracy is insensitive to the size of the network model. In addition, the Improved Lineariser computes accurate solutions for networks which cause the standard Lineariser to fail.
Incorporating load dependent servers in approximate mean value analysis
Authors: Zahorjan John , Lazowska Edward D.
Published: January 2007

Queueing network performance modelling technology has made tremendous strides in recent years. Two of the most important developments in facilitating the modelling of large and complex systems are
hierarchical modelling
, in which a single load dependent server is used as a surrogate for a subsystem, and
approximate mean value analysis
, in which reliable approximate solutions of separable models are efficiently obtained. Unfortunately, there has been no successful marriage of these two developments; that is, existing algorithms for approximate mean value analysis do not accommodate load dependent servers reliably.

This paper presents a successful technique for incorporating load dependent servers in approximate mean value analysis. We consider multiple class models in which the service rate of each load dependent server is a function of the queue length at that server. In other words, load dependent center
k
delivers “service units” at a total rate of f
@@@@
(n
@@@@
) when n
@@@@
customers are present. We present extensive experimental validation which indicates that our algorithm contributes an average error in response times of less than 1% compared to the (much more expensive) exact solution.

In addition to the practical value of our algorithm, several of the techniques that it employs are of independent interest.
Evaluation of parallel execution of program tree structures
Authors: Mussi Ph. , Nain Ph.
Published: January 2007

We define and evaluate two policies (NA-policy, A-policy) for parallel execution of program tree structures. Via a probabilistic model we analytically determine, for each policy, the Laplace-Stieltjes transform for the tree processing time distribution. The acceleration of the program execution time achieved when adding processors to a single processor environment, is computed and plotted for each policy.
Processor queueing disciplines in distributed systems
Authors: Williams Elizabeth
Published: January 2007

A distributed program consists of processes, many of which can execute concurrently on different processors in a distributed system of processors. When several processes from the same or different distributed programs have been assigned to a processor in a distributed system, the processor must select the next process to run. The following two questions are investigated: What is an appropriate method for selecting the next process to run? Under what conditions are substantial gains in performance achieved by an appropriate method of selection? Standard processor queueing disciplines, such as first-come-first-serve and round-robin-fixed-quantum, are studied. The results for four classes of queueing disciplines tested on three problems are presented. These problems were run on a testbed, consisting of a compiler and simulator used to run distributed programs on user-specified architectures.
Convolutional bound hierarchies
Authors: Stephens Lindsey E. , Dowdy Lawrence W.
Published: January 2007

The time required to find the exact solution of a product-form queueing network model of a computer system can be high. Faster and cheaper methods of solution, such as approximations, are natural alternatives. However, the errors incurred when using an approximation technique should be bounded.

Several recent techniques have been developed which provide solution bounds. These bounding techniques have the added benefit that the bounds can be made tighter if extra computational effort is expended. Thus, a smooth tradeoff of cost and accuracy is available. These techniques are based upon mean value analysis. In this paper a new bounding technique based upon the convolution algorithm is presented. It provides a continuous range of cost versus accuracy tradeoffs for both upper and lower bounds. The bounds produced by the technique converge to the exact solution as the computational effort approaches that of convolution. Also, the technique may be used to improve any existing set of bounds.
A modeling methodology for sizing A computer based system in a netted environment
Authors: Becker S. T. , Rege K. M. , Sengupta B.
Published: January 2007

This paper describes a hybrid model, combining both analytical and simulation techniques, which was developed to study the performance of a netted computer based system. The computer based system that was modeled is the Facility Assignment and Control System (FACS). This system is presently being deployed within several Bell Operating Companies to inventory and assign central office and outside plant facilities. A key feature of the model is its ability to characterize the dynamic nature of FACS. An understanding of this dynamic nature is necessary in establishing important operational guidelines such as allowable CPU utilization, levels of multiprogramming and priority of transaction processing. In addition, the model allows the user to investigate the sensitivity of the system to a wide range of conditions. Typical study items could include the effect of various load scenarios, ability of the system to meet performance objectives, and different hardware configurations. As part of this paper, both the practical aspects of modeling a netted computer based system and the theoretical development of the hybrid model are considered.
A Unified Approach to Scan Time Analysis of Token Rings and Polling Networks.
Authors: Agrawal Subhash C. , Buzen Jeffrey P. , Thareja Ashok K.
Published: January 2007

Token rings and multipoint polled lines are two widely used network interconnection techniques. The general concept of cyclic allocation processes is defined and used to characterize token passing and polling in these networks. Scan time, the time to poll all nodes at least once, is an important quantity in the response time analysis of such networks. We derive expressions for the mean and variance of scan times using a direct, operational approach. Resulting expressions are general and are applicable to both exhaustive and non-exhaustive service. The effect of higher level protocols is easily incorporated in the analysis via calculations of constituent quantities. The expression for mean scan time is exact and depends only on the means of message transmission times and arrival rates. The approximate analysis of variance takes into account the correlation between message transmissions at different nodes. Expected level of accuracy is indicated by an example.
Efficient approximation for models of multiprogramming with shared domains
Authors: Brandwajn Alexandre , McCormack William M.
Published: January 2007

Queueing network models of multiprogramming systems with memory constraints and multiple classes of jobs are important in representing large commercial computer systems. Typically, an exact analytical solution of such models is unavailable, and, given the size of their state space, the solution of models of this type is approached through simulation and/or approximation techniques. Recently, a computationally efficient iterative technique has been proposed by Brandwajn, Lazowska and Zahorjan for models of systems in which each job is subject to a separate memory constraint, i.e., has its own memory domain. In some important applications, it is not unusual, however, to have several jobs of different classes share a single memory “domain” (e.g., IBM's Information Management System). We present a simple approximate solution to the shared domain problem. The approach is inspired by the recently proposed technique which is complemented by a few approximations to preserve the conceptual simplicity and computational efficiency of this technique. The accuracy of the results is generally in fair agreement with simulation.
The response times of priority classes under preemptive resume in M/G/m queues
Authors: Bondi André B. , Buzen Jeffrey P.
Published: January 2007

Approximations are given for the mean response times of each priority level in a multiple-class multiserver M/G/m queue operating under preemptive resume scheduling. The results have been tested against simulations of systems with two and three priority classes and different numbers of servers.
The effective management of paging storage hierarchies
Authors: Bunt R. B. , Harbus R. S. , Plumb S. J.
Published: January 2007

The use of storage hierarchies in the implementation of a paging system is investigated. Alternative approaches for managing a paging storage hierarchy are described and two are selected for further study - staging and migration. Characteristic behaviour is determined for each of these approaches and a series of simulation experiments is conducted (using program reference strings as data) for the purpose of comparing them. The results clearly show migration to be a superior approach from the point of view of both cost and performance. Conclusions are drawn on the effectiveness of each approach in practice.
Multiple class memory constrained queueing networks
Authors: Lazowska Edward D. , Zahorjan John
Published: January 2007

Most computer systems have a memory constraint: a limit on the number of requests that can actively compete for processing resources, imposed by finite memory resources. This characteristic violates the conditions required for queueing network performance models to be separable, i.e., amenable to efficient analysis by standard algorithms. Useful algorithms for analyzing models of memory constrained systems have been devised only for models with a single customer class.

In this paper we consider the multiple class case. We introduce and evaluate an algorithm for analyzing multiple class queueing networks in which the classes have independent memory constraints. We extend this algorithm to situations in which several classes share a memory constraint. We sketch a generalization to situations in which a subsystem within an overall system model has a population constraint.

Our algorithm is compatible with the extremely time- and space-efficient iterative approximate solution techniques for separable queueing networks. This level of efficiency is mandatory for modelling large systems.
Error analysis of homogeneous mean queue and response time estimators
Authors: Brumfield Jeffrey A. , Denning Peter J.
Published: January 2007

Flow balance and homogeneity assumptions are needed to derive operational counterparts of M/M/1 queue length and response time formulas. This paper presents relationships between the assumption errors and the errors in the queue length and response time estimates. A simpler set of assumption error measures is used to derive bounds on the error in the response time estimate. An empirical study compares actual errors with their bounds.
Asymptotic regimes and approximations for discriminatory processor sharing
Authors: van Kessel Gijs , Núñez-Queija Rudesindo , Borst Sem
Published: January 2007

We study the joint queue length distribution of the Discriminatory Processor Sharing model, assuming all classes have phase-type service requirement distributions. We show that the moments of the joint queue length distribution can be obtained by solving linear equations. We use this to study the system in two asymptotic regimes. In the first regime, the different user classes operate on strictly separated time scales. Then we study the system in heavy traffic.
Optimal probabilistic routing in distributed parallel queues
Authors: Guo Xin , Lu Yingdong , Squillante Mark S.
Published: January 2007

We consider the fundamental problem of routing customers among distributed parallel queues to minimize an objective function based on equilibrium sojourn times under general assumptions for the arrival and service processes and under the assumption that customers are routed to the parallel queues in a probabilistic manner. More specifically, we derive explicit solutions for the asymptotically optimal vector of probabilities that control the routing of customers upon arrival among a set of heterogeneous general single-server queues through stochastic-process limits. Our assumption of probabilistic routing is consistent with previous theoretical studies of this optimization problem, and our solutions can be used for the parameter settings of other routing mechanisms found in practice. Stochastic-process limits are exploited in order to be able to handle general arrival and service processes and obtain explicit solutions to the scheduling optimization problems of interest.
Monitoring critical success factors across selected business strategies
Authors: Jenster Per V.
Published: January 2007

This research investigates executive monitoring of critical success factors (CSF) across selected business strategies. Based on a sample of 124 organizations, the extent, importance, and consistency in executive monitoring are examined, as well as the degree to which differences exist across the four strategy types proposed in the Miles-Snow typology. The study concludes that different monitoring patterns are associated with the various strategy types.
Proving the validity and accessibility of dynamic web-pages
Authors: Stone R. G. , Dhiensa J.
Published: January 2007

If a static web-page is checked for accessibility and passes then all is well. However checking the accessibility of the output from a dynamic (scripted) web-page is like testing a program to find errors. However many times a test succeeds it is always possible that the program will produce bad output next time. What is needed is something closer to a proof of correctness. This paper describes a first attempt to provide a proof of validity for dynamic web-pages which can be extended to a proof of accessibility.
Designing search engine user interfaces for the visually impaired
Authors: Leporini Barbara , Andronico Patrizia , Buzzi Marina
Published: January 2007

Search engines are a fundamental tool for retrieving specific and appropriate information on the Internet; for this reason it is essential for any user to be able to interact with simple, clear and accessible interfaces. In this paper we discuss the main differences between a visual layout and aural perception, and propose a set of guidelines for search engine user interface UIs design.
Computer language instruction
Authors: Litecky Charles R.
Published: January 2007

Instructors in the Decision Sciences are faced with a dilemma in training students in computer programming. Programming skill is frequently a prerequisite to effectively utilizing conceptual and applied material in the Decision Sciences. However, teaching computer programming languages in the classroom is often viewed as wasteful of time that can be devoted to more conceptual material. Along with this dilemma is another problem. Providing programming instruction to satisfying increasing student demand is placing an ever increasing burden on business schools' resources.
User involvement in the systems analysis function
Authors: Halpern E. V.
Published: January 2007

"The most common explanation for failure in systems application is lack of management involvement..."
Programmer exemption
Authors: Willoughby T. C.
Published: January 2007

On February 3, 1971 a hearing was conducted by the U. S. Department of Labor's Wage and Hour Division to examine whether the various data processing occupations should or should not be exempt from the overtime provisions of the Fair Labor Standards Act. Among those testifying at the hearing was Walter M. Carlson (1), President of The Association for Computing Machinery. Carlson focused his discussion on programmers. In a later speech (2) Carlson challenged the Special Interest Group on Computer Personnel Research to conduct research which would provide better information for making the exempt/non-exempt decision for programmers. This report is one response to that challenge.
An integrated productivity, training, and performance planning/appraisal framework
Authors: Rouse R. A.
Published: January 2007

Improving the productivity of computer personnel requires an integrated view of the factors which promote effective and efficient work. Motivation, training, performance planning, and productivity are so closely interrelated that to attack them individually results in initiatives which often conflict with one another and lead to confusion of ends by professional personnel. Successful integration of these factors results in a management style and organizational form that supports the accomplishments of productive work.

The framework identifies five major areas contributing to performance and behavior: personal effort, knowledge and skills, attitudes and values, environment, health, and sense of direction. These areas define the impact of training, personal development, management style, project control, performance planning, and job/goal direction-setting on performance and behavior.

The framework also identifies five outcomes of work performance and behavior: rewards, costs, appraisal, equity, and satisfaction. The roles played by reward strategies, appraisal techniques tied to performance planning, and personal job costs to the worker are placed in a unified concept.

The framework provides a view of how to make these factors work together to improve productivity.

Data processing personnel career development implies the exercising of a specific plan within a structured environment. Career development should allow an individual to start as a programmer trainee or anywhere in the hierarchy of the group and progress to appropriate levels of responsibility, authority, and pay that are commensurate with the individual's abilities and desires.

Career development is "GOOD BUSINESS" for the company and for the individual, as it provides for the development and optimal use of existing potential. It can provide significant contributions to productivity improvement and at the same time reduce retention problems. If a career development program is to work, it must be pragmatic. First, it has to be developed and implemented within the environment of each individual company. Second, it has to have sufficient flexibility to allow for the specific career requirements of each individual. This "tall order" has been met with varying degrees of success.

This case study is intended to provide one example of how career development can and does work for the Missouri Pacific Railroad computer professional.
How executive search answers demand
Authors: Abkowicz Leslie
Published: January 2007

Addressing a data processing audience with an article explaining executive recruiting/search is analogous to the problem of explaining the unexplainable three-hour lunch. You have to be intrepid, creative, and witty; all while being under intense time pressure.
Research issues in systems development prototyping
Authors: Olfman Lorne
Published: January 2007

The systems development function is changing. A recent survey by Alloway and Quillard indicates that the demand for new systems is shifting away from transaction processing systems and toward managerial support systems [3]. The survey also points out large known and invisible backlogs in systems development requests. These changing demands are happening in conjunction with new developments in hardware and software technology. As changes occur in demand and technology, the systems development function strives to attain a high level of user satisfaction. Prototyping is suggested as a method for building better systems, faster.
A role of a user in the development and maintenance of an information system
Authors: Järvinen Pertti
Published: January 2007

This paper comprises two parts. The first describes results from the empirical follow-up study. This study concerns the change-over and early use periods of new application software. After one year's experience in usage of a computer system we organize a programming course for users. Our findings encourage to give users more responsibility in systemeering. Most clerks passed the program comprehension test and some of them constructed small simple programs.

The second part comprises a consideration of various systemeering models. Much attention is paid to participation of users in different systemeering tasks. Also a short post-analysis is made concerning the role of the user. Various degrees of participation are identified.
ANTS VI
Authors: Kotsireas Ilias , Volcheck Emil
Published: January 2007

The Algorithmic Number Theory Symposium (ANTS) meetings are held bianually since 1994, and have become the premier international forum for the presentation of new research in Computational Number Theory. Previous ANTS conferences have been held as follows: ANTS I, 1994, Cornell University, USA, ANTS II, 1996, University of Bordeaux, France, ANTS III, 1998 Reed College, USA, ANTS IV, 2000, University of Leiden, Netherlands, ANTS V, 2002, University of Sydney, Australia. ANTS VI was held on June 13-18, 2004 at the University of Vermont in the United States, http://web.ew.usna.edu/~ants. ANTS VII is scheduled to be held in Berlin in the summer of 2006. Below are six poster abstracts presented during ANTS VI. We thank the organizers for the opportunity to publish the ANTS VI posters. We hope to help bring this work to a wider audience, not only to computational number theorists, but throughout the Symbolic Computation community.
Fortran 77 compiler survey
Authors: Vallance D. M.
Published: January 2007

A questionnaire, concerning features of Fortran 77 compiler implementations, was developed by David M. Vallance (Computing Services, University of Salford, Salford M5 4WT, England) for presentation to the Fortran Specialist Group of the British Computer Society. The results from this questionnaire were presented to the Fortran Specialist Group at a meeting in September 1982, and were printed as an Appendix to the minutes of the Group's meeting.
SCHENKER
Authors: Smoliar Stephen
Published: January 2007

SCHENKER is an interactive programming language in which a music theorist can formulate and verify analyses of tonal compositions. The command set of this language is derived from a theory of music formulated by Heinrich Schenker (1867--1935). The basis of Schenker's theory involves the existence of musical proto-structures which expand into tonal compositions through a well-defined set of rewriting rules. The SCHENKER commands allow one to specify how these rules are to be applied in the derivation of a particular composition. The language also incorporates a macro facility with which often-used sequences of rules may be grouped together under a single name.
A system for natural language computation
Authors: Biermann Alan W. , Ballard Bruce W. , Holler Anne M.
Published: January 2007

This paper briefly describes a natural language programming system called NLC which allows users to type commands in English and watch the resulting actions carried out on a computer display screen. The data entities appear on the screen at all times, so that the user can observe the effect of each input before proceeding to the next one. Should some input ever be incorrectly processed, a backup facility allows requests to be clarified after restoring the previous context and data values. The user may identify a sequence of natural language commands as a procedure which, when given a name, acts as a new imperative verb and may be used to define further customizations.
Review of "Constraints on structural descriptions: local transformations by Joshi, A.K. and Levy, L.S." SIAM J. on Computing 6.2:272-284 June 1977
Authors: Rodman Robert D.
Published: January 2007

In [4] it is shown that when a set of constituent structure trees is specified by context sensitive rules applied solely as "node admissibility conditions" (cf. [3]) the set of corresponding terminal strings is nonetheless a context free language. In the paper under review, this result is extended to a more general class of node admissibility conditions comprised of Boolean combinations of contexts that analyze trees both horizontally and vertically. Linguists and others interested in formal language theory should find this article relevant.
An ASL dictionary in APL
Authors: Moffat David V.
Published: January 2007

This paper summarizes a project to develop a computerized dictionary of American Sign Language. The topics discussed are: project scope and development, the resulting system of programs, applications in sign language studies, and problems for future development. Appendices describe details of thee notation used for sign descriptions, show an example dictionary, and tell how some of the programs are used.
A computer application in music composition
Authors: Colquhoun D. G.
Published: January 2007

We describe the contribution made by the computer to the composition of an atonal piano concerto. The computer has in no sense "composed" any music but has assisted in preliminary analysis of the relationships between the chords on which is to be based.
The linguistic reason why the computer will never think
Authors: Hammen John R.
Published: January 2007

The thinking computer is a popular theme in science fiction. No such machine yet exists. Computer Scientists disagree on the possibility of ever programming the computer to think or at least simulate human thought patterns. Until such time that the computer will have been programmed for the capability of human style mental activity, the debate will remain unresolved. For now, a good place to start is to break the basic ingredients of computer programming and human reasoning down to their respective lowest denominators and then draw a comparison between the two.
Ontologies and technologies
Authors: O'Hara Kieron
Published: January 2007

The development of the Semantic Web (SW) raises a number of difficult and interesting technical issues. Less often remarked, however, are the social and political debates that it will engender, if and when the technologies become widely accepted. As the SW is a technology for transferring information and knowledge efficiently and effectively, then many of these questions have an epistemological base. In this paper I want to focus especially on the epistemological underpinnings of these social issues, to think about the interaction between the epistemological and the political. How does technology affect the social networks in which it is embedded? How can technology be successfully transplanted into a new context? And, perhaps most importantly for us, how is technology affected by its context? In particular, I want to look at how our decisions about how we treat knowledge can impact quite dramatically on the technologies we produce.