bluuebunny/crossref_metadata_2025 huggingface dataset:
8H Stacking Faults in a 4H-SiC Matrix: Simple Unit Cell or Double 3C Quantum Well?
Authors: Robert Teddy , Juillaguet Sandrine , Marinova Maya , Chassagne Thierry , Tsiaousis Ioannis , Frangis N. , Polychroniadis Efstathios K. , Camassel Jean
Published: March 2009

The electronic structure of in-grown 8H stacking faults in 4H-SiC matrix has been investigated in detail. After assessment of the structural properties by high resolution transmission electron microscopy, we focus on the electronic structure. We show that one unit cell of 8H does not behave like a single type-II quantum well but, rather, like two type-II quantum wells of 3C coupled by a thin hexagonal barrier. Using a transfer matrix method, we compute the corresponding transition energies, taking into account the effect of the valence band offset and built-in electric field. A good agreement is found with the experimental data collected from low temperature photoluminescence spectroscopy.
The Silicon Vacancy in SiC
Authors: Janzén Erik , Gali Adam , Carlsson Patrick , Gällström Andreas , Magnusson Björn , Son Nguyen Tien
Published: March 2009

A model is presented for the silicon vacancy in SiC. The previously reported photoluminescence spectra in 4H and 6H SiC attributed to the silicon vacancy are in this model due to internal transitions in the negative charge state of the silicon vacancy. The magnetic resonance signals observed are due to the initial and final states of these transitions.
Pulsed EPR Studies of the Tv2a Center in 4H-SiC
Authors: Isoya Junichi , Umeda T. , Mizuochi N. , Ohshima Takeshi
Published: March 2009

The Tv2a center in 4H-SiC irradiated by electrons at room temperature has been studied by pulsed EPR. Various techniques such as pulsed ELDOR (electron-electron double resonance), 2-pulse echo decay, 3-pulse inversion recovery, pulsed ENDOR (electron nuclear double resonance), and 3-pulse ESEEM (electron spin echo envelope modulation) have been applied to perform the detailed structure determination and to exploit applicability for the coherent spin control experiments.
Characterization of Deep Levels in High-Resistive 6H-SiC by Current Deep Level Transient Spectroscopy
Authors: Kato Masashi , Kito Kosuke , Ichimura Masaya
Published: March 2009

We measured the temperature dependence of the electrical resistivity for two high-purity undoped 6H-SiC bulk wafers with resistivities of 1.5103 cm and 8.3108 cm at room temperature. We also characterized the deep levels affecting the semi-insulating property by current deep level transient spectroscopy (I-DLTS) and photo induced current level transient spectroscopy (PICTS) measurements. The activation energies of the resistivity were 0.11 eV and 0.59 eV for the samples with lower and higher resistivities, respectively. In I-DLTS and PICTS spectra, the sample with lower resistivity shows a donor level at Ec0.17 eV and two acceptor levels around Ec0.40 eV, while the sample with higher resistivity shows acceptor levels at Ec0.77 eV and Ev+0.46 eV. We calculated the temperature dependence of the resistivity with a model considering one donor level and one acceptor level based on parameters from I-DLTS peaks. We reproduced the experimental results only for the sample with lower resistivity. The acceptor level near the valence band needs to be considered to explain the resistivity for the sample with higher resistivity.
Determination of Intrinsic Defects in High-Purity Semi-Insulating 4H-SiC by Discharge Current Transient Spectroscopy
Authors: Matsuura Hideharu , Takahashi Miyuki , Kagawa Yoshitaka , Tano Shoichi , Miyake Takayuki
Published: March 2009

To determine the energy levels of intrinsic defects in high-purity semi-insulating 4H-SiC, we apply discharge current transient spectroscopy (DCTS) that is a graphical peak analysis method based on the transient reverse current of a Schottky barrier diode, because transient capacitance methods such as deep level transient spectroscopy and isothermal capacitance transient spectroscopy are feasible only in low-resistivity semiconductors. Seven intrinsic defects are detected in the high-purity semi-insulating 4H-SiC. From the temperature dependence of the emission rate of each intrinsic defect, its activation energy is approximately determined.
Capacitance Spectroscopy Study of Midgap Levels in n-Type SiC Polytypes
Authors: Alfieri Giovanni , Kimoto Tsunenobu
Published: March 2009

As-grown and 116 keV electron-irradiated n-type 3C and 4H-SiC epilayers were electrically characterized by means of Fourier-transform deep level transient spectroscopy (FT-DLTS). A total of four deep levels, in the 0.20-0.73 eV range, below the conduction band, have been detected. By considering the band gap offset between 4H and 3C polytypes, we found that the deepest level in 3C-SiC labeled K3 (Ec-0.73 eV) has an energy position close to the EH6/7 level in 4H-SiC. An electron-dose dependence study of K3 and EH6/7, reveals that these two centers display a similar dose dependence behavior, suggesting that they may be related to the same defect.
Optical Identification of Mo Related Deep Level Defect in 4H and 6H SiC
Authors: Gällström Andreas , Magnusson Björn , Janzén Erik
Published: March 2009

The photoluminescence (PL) from the I 1 centre is observed in p-, n-type as well as in compensated samples, using above band gap excitation. The PL from I 1 in the two polytypes 4H and 6H is very similar, the difference being the position of the main peak, in 4H 1.1521 eV and 1.1057 eV in 6H. We here suggest I-1 to be Mo related based on intentional doping, SIMS results and comparison with earlier reports of Mo in SiC using magnetic resonance techniques. From PL measurements, we analyze the electron structure of the defect, and suggest it be the neutral Mo (4d2) residing on a Si site, the luminescence coming from the transition between the 3A2 multiplet of the first excited electronic configuration and the ground state 3A2.
Top Seeded Solution Growth of 3C-SiC Single Crystals
Authors: Mercier Frédéric , Chaussende Didier , Dedulle Jean Marc , Pons Michel , Madar Roland
Published: March 2009

The main problem for the development of 3C-SiC electronics is the lack of an adapted bulk growth process. The seeded sublimation method is not very adapted for the 3C polytype because of the solid-state transition from cubic to hexagonal that occurs at high temperature (above 1800°C). In this paper, we propose a new experimental set-up for the development of a solution route for the growth of high quality 3C-SiC crystals. By a coupled approach involving experiments and global process modeling, we have addressed the problems of dissolution and crystallization, elimination of parasitic nucleation and stabilization of the growth front. With an appropriate control of the different convection mechanisms, a stable growth front is demonstrated, with a growth rate of a few tens of µm/h at 1650°C. Further improvements and potentialities of this approach are discussed.
Use of Micro-PL to Monitor the Process of Damage Introduction, its Development and Removal by Annealing
Authors: Steeds John W.
Published: March 2009

An attempt is made, in the light of recent developments in the identification of intrinsic defects in 4H SiC, to account for differences that have been reported after electron-irradiation of different samples and to discuss the progression of defects that is observed on annealing. The emphasis is placed on internal stress in the material and on defects involving carbon anti-sites and silicon vacancies because they are readily detected by photoluminescence.
Simulation of Ion Implantation in SiC: Dopant Profiling and Activation
Authors: Morata Stéphane , Torregrosa Frank , Bouchet Thierry
Published: March 2009

This paper presents a new simple hand using and fast simulator for ion implantation in 4H-SiC substrates developed by IBS for ESCAPEE European project. The modeling is divided in two parts: Empirical Depth Profile Simulator (EDPS) and Activation/Electrical Properties Simulator (AEPS). EDPS is calibrated for aluminium (Al) and nitrogen (N) implantations into 4H-SiC from SIMS measurements. Implanted dopant profile is constructed using the Pearson IV distribution. Moments of this distribution are extracted from experimental data (SIMS). This modeling takes multiple implantation and dopant diffusion into consideration. After annealing, activation properties related to the junction are predicted using AEPS. This allows prediction of sheet resistance of the implanted layer. Modeling accuracy is demonstrated by comparisons with experimental data.
Formation of Extended Defects in 4H-SiC Induced by Ion Implantation/Annealing
Authors: Nagano Masahiro , Tsuchida Hidekazu , Suzuki Takuma , Hatakeyama Tetsuo , Senzaki Junji , Fukuda Kenji
Published: March 2009

Defect formation during the ion implantation/annealing process in 4H-SiC epilayers is investigated by synchrotron reflection X-ray topography. The 4H-SiC epilayers are subjected to an activation annealing process after Aluminum ions being implanted in the epilayers. The formation modes of extended defects induced by the implantation/annealing process are classified into the migration of preexisting dislocations and the generation of new dislocations/stacking faults. The migration of preexisting basal plane dislocations (BPDs) takes place corresponding to the ion implantation interface or the epilayer/substrate interface. The generation of new dislocations/stacking faults is confirmed as the formation of Shockley faults near the surface of the epilayer and BPD half-loops in the epilayer.
Structural and Electrical Properties of Poly-3C-SiC Layer Obtained from P Ion Implanted 4H-SiC
Authors: Satoh Masataka , Jinushi Takeshi , Nakamura Tohru
Published: March 2009

We investigate the structural and electrical properties of polycrystalline 3C-SiC obtained from P ion implanted 4H-SiC with the box-shaped doping profile (NP: 6 x 1020/cm3, thickness: 400 nm, ion dose: 1.6 x 1016/cm2, room temperature). RBS measurement reveals that the highly defective region is formed by P ion implantation, which remains even after annealing at 1700 oC. X-TEM observation shows the P ion induced amorphous layer is recrystallized to twinned-3C-SiC. After annealing at 1300 oC, a sheet resistance of 950 /sq. and sheet carrier concentration of 1 x 1015/cm2 was obtained. By increasing the annealing temperature from 1500 to 1700 oC, the sheet resistance was drastically decreased to about 200 /sq., while there was a small change in the sheet carrier concentration. For the sample annealed at 1700 oC, the electrical activity of the P impurity was estimated to be about 10 % which is comparable to the case of hot implanted sample.
Heat-Resistant Barrier Contacts Made on the Basis of TiBx and ZrBx to SiC and GaN
Authors: Lebedev Alexander A. , Belyaev A.E. , Boltovets N.S. , Ivanov V.N. , Konakova Raisa V. , Kudryk Ya.Ya. , Milenin Victor V. , Sheremet V.N.
Published: March 2009

We studied the heat resistance of AuTiBx (ZrBx) barrier contacts to n-SiC 6H and n-GaN. The Schottky barrier diode (SBD) parameters, the concentration depth profiles for contact structure components and the phase composition of contact metallization were measured both before and after rapid thermal annealing (RTA) at temperatures up to 900 °С (1000 °С) for contacts to GaN (SiC 6H). It is shown that the layered structure of metallization and electrophysical properties of Schottky barriers (SBs) remain stable after RTA, thus indicating their heat resistance. The ideality factor n of the I-V characteristic of SBDs after RTA was 1.2, while the SB height φВ was ~0.9 eV (~0.8 eV) for the gallium nitride (silicon carbide) barrier structures.
Performance Modification of SiC MEMS
Authors: Niebelschütz Florentina , Brueckner Klemens , Cimalla Volker , Hein Matthias A. , Pezoldt Joerg
Published: March 2009

The adjustment of the properties of 3C-SiC based MEMS devices, i.e. the quality factor and resonant frequency, was achieved by changing the residual stress and the 3C-SiC material quality of the SiC-layers grown on Si(111) by manipulating the nucleation conditions and growth conditions with Ge deposition prior to the carbonization and epitaxial growth. Previous Raman analysis of the SiC-layers and measured resonant frequencies and quality factors of the processed MEMS show a dependence on the Ge amount at the interface of the Si/SiC heterostructure, which allows to adjust the MEMS properties to the requirements needed for certain applications.
Fast Epitaxial Growth of 4H-SiC and Analysis of Defect Transfer
Authors: Tsuchida Hidekazu , Ito Masahiko , Kamata Isaho , Nagano Masahiro
Published: March 2009

The transfer and generation of extended defects in 4H-SiC epitaxial growth at a high growth rate are examined. An epilayer with virtually no basal plane dislocations (BPDs) is obtained using 4º off Si-face substrates, although the formation of 3C-polytype inclusions is occasionally observed. The behavior of BPDs and threading screw dislocations (TSDs) in epitaxial growth is also investigated by X-ray topography and transmission electron microscopy, and the propagation of BPDs and conversion and generation of TSDs in the epilayers are discussed.
Voltage-Current (V-I) Characteristics of 1.5kV Class pn Junctions with p-Well Structures on (0001) 4H-SiC
Authors: Kosugi Ryouji , Sakata T. , Sakuma Y. , Suzuki K. , Yatsuo Tsutomu , Matsuhata H. , Yamaguchi Hirotaka , Nagai Ichiro , Fukuda Kenji , Okumura Hajime , Arai Kazuo
Published: March 2009

We have fabricated the four pn-type junction TEGs (Test Element Groups) having different structure. Those TEGs are close to the double-implanted (Di) MOSFETs, step by step from the simple pn diode. Voltage-current (V-I) characteristics of the hundred TEGs having p-well structure show similar blocking characteristics of those of simple pn diodes on the same wafer. This indicates that the p-well structure itself does not cause a significant deterioration on the blocking yield. On the other hand, the yield is significantly influenced by the annealing condition for ion-implanted layer. The oxide-related hard breakdown on the JFET region dominates the blocking yield. The reach-through breakdown of the TEGs having the n+ region within each p-well becomes largely suppressed by the high-temperature and short-time annealing.
Measurement of Carrier Lifetime Temperature Dependence in 3.3kV 4H-SiC PiN Diodes Using OCVD Technique
Authors: Dheilly Nicolas , Planson Dominique , Brosselard Pierre , ul Hassan Jawad , Bevilacqua Pascal , Tournier Dominique , Montserrat Josep , Raynaud Christophe , Morel Hervé
Published: March 2009

This paper reports on the influence of temperature on the electrical carrier lifetime of a 3.3 kV 4H-SiC PiN diode processed with a new generation of SiC material. The Open Circuit Voltage Decay (OCVD) is used to evaluate ambipolar lifetime evolution versus temperature. The paper presents a description of the setup, electrical measurements and extraction fittings. The ambipolar lifetime is found to rise from 600 ns at 30 °C to 3.5 μs at 150 °C.
EBIC Analysis of Breakdown Failure Point in 4H-SiC PiN Diodes
Authors: Ohyanagi Takasumi , Bin Chen , Sekiguchi Takashi , Yamaguchi Hirotaka , Matsuhata Hirofumi
Published: March 2009

The breakdown failure points in the 4H-SiC PiN diodes were analyzed by the electron beam induced current (EBIC). We focused on the failure, which showed the avalanche breakdown, and we determined the failure points by an emission microscopy. We observed the basal plane dislocation around the failure point and at measured temperatures below 200K we found the dark spots in the EBIC. However, in the X-ray topography image, no spots were found around the dislocations. We therefore think that these spots originated from the metal contamination. The electric field was multiplied due to a permittivity change, and this multiplication caused the avalanche breakdown.
VJFET Based All-SiC Normally-Off Cascode Switch for High Temperature Power Handling Applications
Authors: Veliadis Victor , Hearne Harold , McNutt Ty , Snook Megan , Potyraj Paul , Scozzie Charles
Published: March 2009

High-voltage vertical-junction-field-effect-transistors (VJFETs) are typically designed normally-on to ensure low-resistance voltage-control operation at high current-gain. To exploit the high-voltage/temperature capabilities of VJFETs in a normally-off voltage-controlled switch, high-voltage normally-on and low-voltage normally-off VJFETs were connected in the cascode configuration. The cascode gate’s threshold voltage decreases from 2.5 V to 2 V as the temperature increases from 25°C to 225°C, while its breakdown voltage increases from -23 V to -19 V. At 300°C, the drain current of the cascode switch is 21.4% of its 25°C value, which agrees well with the reduction of the 4H-SiC electron mobility with temperature. The VJFET based all-SiC cascode switch is normally-off at 300°C, with its threshold voltage shifting from 1.6 V to 0.9 V as the temperature increases from 25°C to 300°C. This agrees well with the measured reduction in VJFET built-in potential. Finally, the reduction in cascode transconductance with temperature follows that of the theoretical 4H-SiC electron mobility. Overall, the measured thermally-induced cascode parameter shifts are in excellent agreement with theory, which signifies fabrication of robust SiC VJFETs for power switching applications.
Effect of Bipolar Gate-to-Drain Current on the Electrical Properties of Vertical Junction Field Effect Transistors
Authors: Veliadis Victor , Hearne Harold , Stewart Eric J. , Caldwell Joshua D. , Snook Megan , McNutt Ty , Potyraj Paul , Scozzie Charles
Published: March 2009

Electron-hole recombination-induced stacking faults have been shown to degrade the I-V characteristics of SiC power p-n diodes and DMOSFETs with thick drift epitaxial layers. In this paper, we investigate the effect of bipolar gate-to-drain current on vertical-channel JFETs. The devices have n- drift epitaxial layers of 12-μm and 100-μm thicknesses, and were stressed at a fixed gate-to-drain current density of 100 A/cm2 for 500 hrs and 5 hrs, respectively. Significant gate-to-drain and on-state conduction current degradations were observed after stressing the 100-μm drift VJFET. Annealing at 350°C reverses the stress induced degradations. After 500 hours of stressing, the gate-to-source, gate-to-drain, and blocking voltage characteristics of the 12-μm VJFET remain unaffected. However, the on-state drain current was 79% of its pre-stress value. Annealing at 350°C has no impact on the post-stress on-state drain current of the 12-μm VJFET. This leads us to attribute the degradation to a “burn-in” effect.
High Temperature Characteristics of 4H-SiC RESURF-Type JFET
Authors: Fujikawa Kazuhiro , Sawada Kenichi , Tokuda Hitoki , Tamaso Hideto , Harada Shin , Shinkai Jiro , Tsuno Takashi , Namikawa Yasuo
Published: March 2009

400V/2.5A 4H-SiC JFETs having a reduced surface field (RESURF) structure were fabricated. Measurements on the on-resistance, blocking and switching characteristics at high temperature were carried out. It was confirmed that the JFET has smaller dependence of on-resistance on temperature than a Si-MOSFET and positive temperature dependence of the breakdown voltage. It was also confirmed that the JFET has fast switching characteristics, that is, the turn-on and turn-off times are about 15 ns and 10 ns, at 200 °C as well as at 25 °C. A demonstration of a DC-DC converter using a module consisting of the JFET was carried out at a junction temperature of 200 °C. Stable continuous switching operation of the JFET at a junction temperature of 200 °C was confirmed.
Atomistic and Continuum Simulations of the Homo-Epitaxial Growth of SiC
Authors: Camarda Massimo , La Magna Antonino , La Via Francesco
Published: March 2009

Using joined super-lattice Kinetic Monte Carlo simulations, continuous modelling and recent experimental data on the homoepitaxial growth of 4H Silicon Carbide we study the transition between monocrystalline and polycrystalline growth in terms of misorientation cut, growth rate and temperature. We compare these optimally calibrated results both with previous continuous models and literature data. We demonstrate that this study was, indeed, necessary to correctly reformulate the phase diagram of the transition.
Electro-Thermal SPICE Model for High-Voltage SiC VJFETs
Authors: Elpelt Rudolf , Friedrichs Peter , Hippeli J. , Schörner Reinhold , Treu Michael , Türkes Peter
Published: March 2009

After the successful introduction of silicon carbide Schottky-Barrier diodes in 2001, next commercial devices will be switching components. The development focus is targeted to MOSFETs and VJFETs. Regarding VJFETs, a promising device was presented several years ago and tested successfully in several applications. Since the unconventional device structure does not allow the use of classical JFET models, a new electro-thermal model was developed, taking into account the features of the design as well as the targeted enlarged range of operating temperatures.
Silicon Carbide Static Induction Transistor with Implanted Buried Gate
Authors: Vassilevski Konstantin , Nikitina Irina P. , Horsfall Alton B. , Wright Nicolas G. , O'Neill Anthony G. , Gwilliam Russell , Johnson C. Mark
Published: March 2009

Buried gate static induction transistors (BGSITs) were fabricated on commercial 4H-SiC wafer with 20 m thick n-type epilayer having a net donor density of 0.71015 cm-3. Buried gate regions were formed by the selective implantation of high energy (up to 2 MeV) aluminium performed at 600 °C. Nitrogen was implanted at temperature of 400 °C to form a heavily doped blanket source region. Post-implantation annealing was carried out at the atmospheric pressure in argon using a graphite capping layer. Fabricated normally-on devices with source contact diameter of 0.2 mm were tested at temperatures up to 500 °C and current densities up to 270 A/cm2. The specific on-resistance of a completely open 4H-SiC BGSIT was 34 mcm2 and showed a thermally activated behaviour at temperatures up to 500 °C.
Short-Circuit Operation of SiC Buried Gate Static Induction Transistors (SiC BGSITs)
Authors: Yano Koji , Tanaka Yasunori , Yatsuo Tsutomu , Takatsuka Akio , Arai Kazuo
Published: March 2009

Short-circuit capabilities of silicon carbide static induction transistors with the buried gate structures (BGSITs) have been measured for the first time, and have been followed by 2D device simulations. The short-circuit operation of the normally-on type BGSITs is characterized by an abrupt decrease in the output current through a high peak in the initial phase of the short-circuit period, which is distinguished from that of the conventional IGBTs and power MOSFETs. This operation is caused by the inherent operation of the SITs including the non-saturating current-voltage characteristics with the unipolar operation. Decreasing the channel width adequately is a useful method to increase the short-circuit capability.
1.5 kV Lateral Double RESURF MOSFETs on 4H-SiC (000-1)C Face
Authors: Noborio Masato , Suda Jun , Kimoto Tsunenobu
Published: March 2009

SiC lateral double RESURF MOSFETs have been fabricated on the 4H-SiC (000-1)C face. By utilizing the C face, the channel resistance can be reduced because the C-face MOSFETs show higher channel mobility than the Si-face MOSFETs. In addition, by employing the double RESURF structure, the drift resistance is decreased and the breakdown voltage is increased with increasing the RESURF doses. The fabricated RESURF MOSFETs on the 4H-SiC (000-1)C face have demonstrated a low on-resistance of 40 mΩcm2 at an oxide field of 3 MV/cm and a breakdown voltage of 1580 V at zero gate bias. The figure-of-merit of the MOSFET is 62 MW/cm2, which is more than 10 times better than the conventional “Si limit” and the highest value among any lateral MOSFETs to date.
Large-Area Homoepitaxial Growth of Low-Doped Thick Epilayers for Power Devices with VBR > 4 kV
Authors: Thomas Bernd , Hecht Christian , Kallinger Birgit
Published: March 2009

In this paper we present results on the growth of low-doped thick epitaxial layers on 4° off-oriented 4H-SiC using a commercially available hot-wall multi-wafer CVD system. For the first time we show results of a low-doped full-loaded 73” run on 4° off-oriented substrates with a layer thickness of more than 70 µm. The target doping concentration of 1.2×1015 cm-3 is suitable for blocking voltages > 6 kV. Results on doping, thickness and wafer-to-wafer homogeneities are shown. The surface quality of the grown layers was characterized by AFM. The density of different types of dislocations was determined by Defect Selective Etching.
Investigation of On and Off State Characteristics of 4H-SiC DMOSFETs
Authors: Potbhare Siddharth , Goldsman Neil , Akturk Akin , Lelis Aivars J. , Green Ronald
Published: March 2009

We build upon our previous work on 4H SiC lateral MOSFETs to present physics based numerical modeling and characterization of a 4H-SiC DMOSFET operating in ON state. Comparison of simulated ON state characteristics to experiment shows that surface roughness scattering dominates at the operating bias of VGS=15V, whereas interface trap density contributes to reducing the inversion charge in the channel and thereby increasing the ON resistance. OFF state performance of the DMOSFET was modeled by considering impact ionization in the device. Excellent leakage characteristics were observed with the device blocking 2kV drain voltage. Impact ionization related breakdown was observed at 2048V drain bias.
Low Frequency Noise in 4H-SiC MOSFETs
Authors: Rumyantsev Sergey L. , Shur Michael S. , Levinshtein Michael E. , Ivanov Pavel A. , Palmour John W. , Das Mrinal K. , Hull Brett A.
Published: March 2009

Low-frequency noise in 4H-SiC MOSFETs has been measured for the first time. At drain currents varying from deep subthreshold to strong inversion, the 1/f (flicker) noise dominated at frequencies 1 - 105 Hz. The dependence of relative spectral noise density, , on drain current Id (at a constant drain voltage Vd) differs qualitatively from that in Si MOSFETs. In Si MOSFETs, ~ 1/ in strong inversion, whereas tends to saturate in sub-threshold. In 4H-SiC MOSFETs under study, ~ 1/ over the whole range of currents from deep sub-threshold to strong inversion. Similar noise behavior is often observed in poly- or a-Si TFTs. The effective channel mobility in 4H-SiC MOSFETs, 3 - 7 cm2/Vs, is also as low as that in TFTs. Both noise behavior and transport properties of 4H-SiC MOSFETs are explained, analogously to TFTs, by a high density of localized states (bulk and interface) near the conduction band edge in the ion implanted p-well.
A New High Current Gain 4H-SiC Bipolar Junction Transistor with Suppressed Surface Recombination Structure: SSR-BJT
Authors: Nonaka Kenichi , Horiuchi Akihiko , Negoro Yuki , Iwanaga Kensuke , Yokoyama Seiichi , Hashimoto Hideki , Sato Masashi , Maeyama Yusuke , Shimizu Masaaki , Iwakuro Hiroaki
Published: March 2009

A new 4H-SiC Bipolar Junction Transistor with Suppressed Surface Recombination structure: SSR-BJT has been proposed to improve the common emitter current gain which is one of the main issues for 4H-SiC BJTs. A Lightly Doped N-type layer (LDN-layer) between the emitter and base layers, and a High Resistive P-type region (HRP-region) formed between the emitter mesa edge and the base contact region were employed in the SSR-BJT. A fabricated SSR-BJT showed a maximum current gain of 134 at room temperature with a specific on-resistance of 3.2 mΩcm2 and a blocking voltage VCEO of 950 V. The SSR-BJT kept a current gain of 60 at 250°C with a specific on-resistance of 8 mΩcm2. To our knowledge, these current gains are the highest among 4H-SiC BJTs with a blocking voltage VCEO more than about 1000 V which have been ever reported.
4H-SiC Bipolar Junction Transistors with Graded Base Doping Profile
Authors: Zhang Jian Hui , Fursin Leonid , Li Xue Qing , Wang Xiao Hui , Zhao Jian Hui , VanMil Brenda L. , Myers-Ward Rachael L. , Eddy Charles R. , Gaskill D. Kurt
Published: March 2009

This work reports 4H-SiC bipolar junction transistor (BJT) results based upon our first intentionally graded base BJT wafer with both base and emitter epi-layers continuously grown in the same reactor. The 4H-SiC BJTs were designed to improve the common emitter current gain through the built-in electrical fields originating from the grading of the base doping. Continuously-grown epi-layers are also believed to be the key to increasing carrier lifetime and high current gains. The 4H-SiC BJT wafer was grown in an Aixtron/Epigress VP508, a horizontal hot-wall chemical vapor deposition reactor using standard silane/propane chemistry and nitrogen and aluminum dopants. High performance 4H-SiC BJTs based on this initial non-optimized graded base doping have been demonstrated, including a 4H-SiC BJT with a DC current gain of ~33, specific on-resistance of 2.9 mcm2, and blocking voltage VCEO of over 1000 V.
Surface Passivation of 4H-SiC for High Current Gain Bipolar Junction Transistors
Authors: Negoro Yuki , Horiuchi Akihiko , Iwanaga Kensuke , Yokoyama Seiichi , Hashimoto Hideki , Nonaka Kenichi , Maeyama Yusuke , Sato Masashi , Shimizu Masaaki , Iwakuro Hiroaki
Published: March 2009

Surface passivation of 4H-SiC has been investigated for high current-gain bipolar junction transistors (BJTs). For the characterization of surface passivation, we have introduced the product “sp•Ls” of a surface recombination velocity (sp) and a surface diffusion length (Ls). The sp•Ls value was obtained by analyzing the I-V characteristics of pn diodes. Both BJTs and pn diodes were fabricated with several passivation methods. We have found clear correlation between the sp•Ls value and the current gain of the fabricated BJTs. Optimizing the surface passivation, we realized high performance BJTs with a current gain of 107 and a blocking voltage VCEO of 950 V.
Simulations of Open Emitter Breakdown Voltage in SiC BJTs with Non Implanted JTE
Authors: Buono Benedetto , Lee Hyung Seok , Domeij Martin , Zetterling Carl Mikael , Östling Mikael
Published: March 2009

Ion implantation for selective doping of SiC is problematic due to damage generation during the process and low activation of dopants. In SiC bipolar junction transistor (BJT) the junction termination extension (JTE) can be formed without ion implantation using instead a controlled etching into the epitaxial base. This etched JTE is advantageous because it eliminates ion implantation induced damage and the need for high temperature annealing. However, the dose, which is controlled by the etched base thickness and doping concentration, plays a crucial role. In order to find the optimum parameters, device simulations of different etched base thicknesses have been performed using the software Sentaurus Device. A surface passivation layer consisting of silicon dioxide, considering interface traps and fixed trapped charge, has been included in the analysis by simulations. Moreover a comparison with measured data for fabricated SiC BJTs has been performed.
4H-SiC Nuclear Radiation p-n Detectors for Operation up to Temperature 375 °C
Authors: Ivanov Alexander M. , Kalinina Evgenia V. , Strokan Nikita B. , Lebedev Alexander A.
Published: March 2009

The spectrometric characteristics of detectors based on 4H-SiC ﬁlms with ion-doped p+–n junctions in a temperature range from 25 to 375 °C have been studied. The experiments with 5.8-MeV α-particles in a high-temperature chamber were performed. The interference factors of the detectors operation in a mode of spectrometry are established. The energy resolution of 1.35% is received. An increase of the efﬁciency of the diffusion–drift charge transport with increasing temperature has been observed. The last is explained by an increase in the diffusion length of minority carriers.
P- and n-Type Doping in SiC Sublimation Epitaxy Using Highly Doped Substrates
Authors: Hens Philip , Syväjärvi Mikael , Oehlschläger Felix , Wellmann Peter J. , Yakimova Rositza
Published: March 2009

The co-doping of nitrogen and aluminum has been studied in the sublimation epitaxy growth process. It is shown that the doping may be tuned from n-type to p-type by effect of substrate doping, growth face and volume of the growth crucible. The co-doped layers show a nearly ideal I V characteristic and luminescence at room temperature.
Operation of Al-Implanted SiC Nuclear Detectors Subjected to High Radiation Fluences at Temperatures of up to 250 °C
Authors: Ivanov Alexander M. , Strokan Nikita B. , Lebedev Alexander A. , Kozlovski Vitalii V.
Published: March 2009

The effect of a cycle "introduction of defects – annealing – introduction of defects" on the SiC properties has been studied to know the degradation of characteristics of p-n- nuclear radiation detectors. The irradiation with 8 МeV protons at fluences of about 3×1014 сm-2 was used. The annealing was carried out in two stages one-hour at temperatures of 600 and 700 °С. Nuclear spectrometric techniques with 5.8 MeV -particles were employed to test the detectors. The charge collection efficiency and features of the amplitude spectrum were determined to study the capture of charge carriers by radiation-induced defects. Measurements were made in the temperature range of 20–250 °С. It is shown that at 250 °С there is a decrease in the carriers capture. The form of the amplitude spectrum essentially improves. The first irradiation and the subsequent annealing do not change significantly the radiation hardness of SiC. During the second irradiation the effective concentration of the introduced centers is 1.3 times higher. This result may be due to the high total fluence of protons, 6×1014 cm-2.
Charge Collection Properties of 6H-SiC Diodes by Wide Variety of Charged Particles up to Several Hundreds MeV
Authors: Onoda Shinobu , Iwamoto Naoya , Murakami Makoto , Ohshima Takeshi , Hirao Toshio , Kojima Kazu , Kawano K. , Nakano I.
Published: March 2009

We investigated the energy spectra in p+n 6H-SiC diodes by a wide variety of charged particles with energies up to several hundred MeV. Though Pulse Height Defect (PHD) was detected when the samples were irradiated with high energy heavy ions (322MeV-Kr and 454MeV-Xe), linearity between pulse height (peak channel) and ion energy up to 150MeV was observed.
6H and 4H-SiC Avalanche Photodiodes
Authors: Rowland L.B. , Wyatt Jeffery L. , Fronheiser Jody , Vert Alexey V. , Sandvik Peter M. , Borsa T. , Van Zeghbroeck J. , Van Zeghbroeck Bart , Babu S.
Published: March 2009

We report on the fabrication and testing of SiC p-i-n avalanche photodiodes. APDs of 0.25 mm2 area on a-plane (1120) 6H-SiC as well as off-axis Si face 6H and 4H-SiC were successfully fabricated. A beveled mesa was used as edge termination. Recessed windows were formed using reactive ion etching to enhance low-wavelength UV performance. We performed current-voltage tests with and without UV illumination to determine dark current, photocurrent, and gain on selected devices. Dark current was less than 1 pA at 0.5Vbr on multiple devices. Quantum efficiency of 40% or greater was observed for all orientations and polytypes.
Perspectives of SiC Power Devices in Highly Efficient Renewable Energy Conversion Systems
Authors: Zacharias Peter
Published: March 2009

In the long run, regenerative energy sources represent the most important alternatives to fossil fuels.
In general, they are characterized by decentralized logistics and supply capabilities due to ihnerent
lower energetic densitiy per are, when compared with the fossil counterparts. As a result, the
increased use of regenerative energy sources will require decentralized structures for energy supply,
consumption optimisation and regional balancing between supply and demand. Both, the more
efficient utilization of fossil energy sources and the utilization of regenerative energy sources, lead
to increasingly decentralized supply structures and can be understood as being both complementary
and convergent in relation to each other. Most of the converter units for utilization of decentralized
energy resources (DER) use power electronics for the AC power conditioning with grid quality. The
current paper shows market perspectives of DER applications and the impact of SiC on these
application.
Substantial Reduction of Power Loss in a 14kVA Inverter Using Paralleled SiC-MOSFETs and SiC-SBDs
Authors: Nakata Shuhei , Kinouchi Shin Ichi , Sawada T. , Oi T. , Oomori Tatsuo
Published: March 2009

For higher power application of SiC devices, we have designed and developed an inverter module with paralleled SiC-MOSFETs and SiC-SBDs.We have successfully completed the operation of the SiC inverter module at continuous rating of up to 11kW with carrier frequency of 20 kHz. The power loss during the operation was measured by calorimetric method and the results showed that the loss was considerably reduced by 30% of a similar rating commercialized IGBT power module at carrier frequency of 15 kHz.
Monocrystalline and Polycrystalline SiC in EADS Astrium Space Applications
Authors: Berberich Stefan , Goñi A. , Schäper Wolfgang , Kolm Manfred
Published: March 2009

Of all the wide bandgap semiconductors, SiC is currently the most attractive material for aerospace
applications. It offers significant advantages at high temperatures and high voltage levels while
benefiting from an excellent thermal conductivity, the resistance to a harsh radiation environment
(in particular in medium low orbits (MEO) where the Van Allan belts show a high concentration of
electron and proton radiation) and an advanced materials technology. Due to the significant progress
in the last years in monocrystalline SiC material fabrication and process technology, the space
industry is increasingly interested in exploiting the SiC characteristics for electronic application.
Although the requirement for space components are highly demanding with space qualified
technological processes required, it is expected that high quality commercial SiC components
submitted to a stringent screening process will allow the realisation of highly reliable space
components. Electronic applications of monocrystalline SiC for space mainly exploit the high
breakdown electric field which allows for lower specific on-resistances due to high doping and
thinner drift region layers in vertical SiC power device structures. Among all SiC power devices,
high voltage rectifiers have reached the highest degree of maturity. EADS Astrium has started
evaluation activities of commercially available 1200 V SiC diodes and also 4.5 kV diodes
developed in the frame of the ESA CHPCA (components for high power conditioning application)
project. One application is power supply of ion thrusters on satellites which require electric power
in the range of 2 to 8 kW at voltages of 1 to 2 kV.
Mechanical aerospace applications of polycrystalline SiC
300°C SiC Blocking Diodes for Solar Array Strings
Authors: Maset E. , Sanchis-Kilders Esteban , Brosselard Pierre , Jordá Xavier , Vellvehi Miquel , Godignon Philippe
Published: March 2009

Silicon Carbide 300V-5A Ni and W Schottky diodes with high temperature operation capability (up to 300°C) have been fabricated. This paper reports on the stability tests (ESA space mission to Mercury, BepiColombo requirements) performed on these diodes. A DC current stress of 5A has been applied to these diodes at 270°C for 800 hours. These reliability tests revealed both, degradation at the Schottky interface (forward voltage drift) and at the diode top surface due to Aluminum diffusion (bond pull strength degradation). The use of W as Schottky metal allows eliminating the forward voltage drift producing stable metal–semiconductor interface properties. Nevertheless, SEM observations of the top metallization still reveal metal degradation after stress. The bond pull strength of the wire bond is also significantly reduced.
High-Breakdown-Voltage GaN Vertical Schottky Barrier Diodes with Field Plate Structure
Authors: Horii Taku , Miyazaki Tomihito , Saito Yu , Hashimoto Shin , Tanabe Tatsuya , Kiyama Makoto
Published: March 2009

Gallium nitride (GaN) vertical Schottky barrier diodes (SBDs) with a SiNx field plate (FP) structure on low-dislocation-density GaN substrates have been designed and fabricated. We have successfully achieved the SBD breakdown voltage (Vb) of 680V with the FP structure, in contrast to that of 400V without the FP structure. There was no difference in the forward current-voltage characteristics with a specific on-resistance (Ron) of 1.1mcm2. The figure of merit V2b/Ron of the SBD with the FP structure was 420MWcm-2. The FP structure and the high quality drift layers grown on the GaN substrates with low dislocation densities have greatly contributed to the obtained results.
Metal Contacts to Boron-Doped Diamond
Authors: Lodzinski Michal , Guy Owen James , Castaing A. , Batcup S. , Wilks S.P. , Igic P. , Balmer R.S. , Wort C.J.H. , Lang R.
Published: March 2009

This paper describes the fabrication of Ni and Ti contacts to single crystal, boron-doped diamond. The electrical performance of metal-diamond contacts has been investigated using current-voltage I(V) characterization of circular transmission line model (CTLM) test structures. X-ray photoelectron spectroscopy (XPS) analysis of Ti/diamond contacts has been performed and is correlated with CTLM results. Post deposition annealing of metal-diamond contacts has a dramatic influence on contact resistivity, with lower resistances observed after annealing at 900°C. Specific contact resistances as low as 9 x 10-5 Ω.cm2 have been obtained. The effect of doping (via epitaxial growth and boron implantation) on metal-diamond contacts is also reported.
Callus formation and bark moisture as potential physical defenses of northern red oak,Quercus rubra, against red oak borer,Enaphalodes rufulus(Coleoptera: Cerambycidae)
Authors: Fierke Melissa K. , Stephen Fred M.
Published: March 2009

The red oak borer,Enaphalodes rufulus(Haldeman), is a native wood-boring beetle implicated as a major contributor to recent high levels of oak mortality in northern Arkansas. Northern red oaks,Quercus rubraL. (Fagaceae), were grouped into three classes of red oak borer infestation history based on crown condition and basal red oak borer emergence holes: class I (low infestation), class II (moderate infestation), and class III (high infestation). In 2004 and 2005, trees from each class were mechanically wounded and callus formation was measured after one year. Class I trees exhibited significantly greater callus formation than class III trees in both years. Monthly measurements in spring and summer of 2006 indicated significant differences in callus formation among classes, with class I trees healing over significantly earlier. Moisture was measured in bark samples removed 1 week and 4 weeks after initiation of three treatments: control, mechanical wounding, and artificial insertion of larvae. Moisture levels did not vary among infestation classes or treatments. This research indicates that bark moisture is likely not a defense against red oak borer, but that callus overgrowth may be a defense early in the second year of the life cycle in healthy trees.
Attraction of male summerform pear psylla to volatiles from female pear psylla: effects of female age, mating status, and presence of host plant
Authors: Horton David R. , Guédot Christelle , Landolt Peter J.
Published: March 2009

Pear psylla, Cacopsylla pyricola (Förster) (Hemiptera: Psyllidae), is a pest of pears, Pyrus L. (Rosaceae), throughout North America and western Europe. Previous studies in our laboratory showed that males of the overwintering form (winter morphotype) were attracted to volatile chemicals from pear shoots infested with post-diapause females. The current study shows that males of the summer morphotype also are attracted to volatiles from female-infested host material. Older females (8–10 d old) were significantly more attractive to males than younger (2–5 d old) females. Both virgin and mated females attracted male psylla. Volatiles from female summerforms attracted males even in the absence of host-plant material, and both living and freshly killed females were attractive. Our results indicate that female C. pyricola emit a volatile sex attractant, and the results of the studies further define the life-history conditions in female pear psylla that lead to male attraction.
Recent Advances in the Synthesis of 2‐Imidazolines and Their Applications in Homogeneous Catalysis
Authors: Liu Han , Du Da‐Ming
Published: March 2009

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As an important class of heterocyclic scaffolds, 2‐imidazolines have attracted the attention from the chemists interested in natural products, pharmaceutical chemistry, synthetic organic chemistry, coordination chemistry, and homogeneous catalysis. To fulfill the demand of structural diversity, many efficient methods towards 2‐imidazolines, as well as modifications of traditional methods, have been reported in the past two decades. 2‐Imidazolines have been developed as ligands in homogeneous catalysis, for the substitution on the nitrogen atom that provides an opportunity for fine‐tuning of the electronic effect. This review summarizes recent advances in the synthesis of 2‐imidazolines and their applications in homogeneous catalysis.
Dynamic operability analysis of nonlinear process networks based on dissipativity
Authors: Rojas Osvaldo J. , Setiawan Ridwan , Bao Jie , Lee Peter L.
Published: March 2009

Most modern chemical plants are complex networks of multiple interconnected nonlinear process units, often with multiple recycle and by‐pass streams and energy integration. Interactions between process units often lead to plant‐wide operability problems (i.e., difficulties in process control). Plant‐wide operability analysis is often difficult due to the complexity and nonlinearity of the processes. This article provides a new framework of dynamic operability analysis for plant‐wide processes, based on the dissipativity of each process unit and the topology of the process network. Based on the concept of dissipative systems, this approach can deal with nonlinear processes directly. Developed from a network perspective, the proposed framework is also inherently scalable and thus can be applied to large process networks. © 2009 American Institute of Chemical Engineers AIChE J, 2009
A chaos‐based iterated multistep predictor for blast furnace ironmaking process
Authors: Gao Chuanhou , Chen Jiming , Zeng Jiusun , Liu Xueyi , Sun Youxian
Published: March 2009

The prediction and control of the inner thermal state of a blast furnace, represented as silicon content in blast furnace hot metal, pose a great challenge because of complex chemical reactions and transfer phenomena taking place in blast furnace ironmaking process. In this article, a chaos‐based iterated multistep predictor is designed for predicting the silicon content in blast furnace hot metal collected from a pint‐sized blast furnace. The reasonable agreement between the predicted values and the observed values indicates that the established high dimensional chaotic predictor can predict the evolvement of silicon series well, which conversely render the strong indication of existing deterministic mechanism ruling the dynamics of complex blast furnace ironmaking process, i.e., a high‐dimensional chaotic system is suitable for representing the blast furnace system. The results may serve as guidelines for characterizing blast furnace ironmaking process, an extremely complex but fascinating field, with chaos in the future investigation. © 2009 American Institute of Chemical Engineers AIChE J, 2009