bluuebunny/crossref_metadata_2025 huggingface dataset:
Intermediate Smalltalk (abstract)
Authors: Reenskaug Trygve
Published: January 2007

Careful design before programming is as important in Smalltalk as in other languages. This tutorial describes techniques that have proven useful in commercial development of large Smalltalk systems. The tutorial shows how to develop a language independent design and then go to detailed programming and testing. The examples will be based on Smalltalk-80 and use the release 4.1 graphical user interface framework.
Object-oriented geometry and graphics (abstract)
Authors: Krc-Jediny Jan , Mrazik Augustin
Published: January 2007

Spatial information is an important part of geographic information systems, CAD and CAM systems, and user interfaces for visualization of any kind of information. The object-oriented approach to spatial object modelling results in much more understandable designs than non-object-oriented approaches.

This tutorial describes the design of several key components of a system for dealing with spatial information which are: analytical geometry closed with respect to union, intersection and complement operations; hierarchically structured objects for maintaining topological information; object identity and problems arising from change of spatial objects in the database and user interface, transactions and copies of objects; dependencies of spatial objects and their copies in the MVC user-interface architecture.

You should have experience in building user-interfaces and should have some background in analytical geometry. Examples are shown in Smalltalk, so a basic knowledge of Smalltalk would be helpful.
Composition based object-oriented software development (COOSD) methodology and supporting tools (abstract)
Authors: Bosch Jan
Published: January 2007

At the University of Twente, the Netherlands, we have been
developing methods and techniques in the area of object oriented
analysis and design. Our major contribution is the so-called
Composition Based Object Oriented Software Development (COOSD)
methodology, which includes methods, computational models, and
supporting tools. We have applied this methodology in about 20
pilot studies and we have been organizing tutorials in Europe.

The supporting tools, organized in an Integrated CASE tool
environment, support the developer both in the analysis and in the
design process, whereafter automatic translation of the design,
described in a high-level object oriented language, called SINA, to
C++ is offered.
HotDraw (abstract)
Authors: Johnson Ralph
Published: January 2007

HotDraw is a framework for structured drawing editors that has
been floating around the Smalltalk community for several years
under several incarnations. It was originally developed by Kent
Beck and Ward Cunningham, but has been reimplemented many times
since then. Most of these implementations were proprietary. Our
design extends the original one by making constraints more
composable and by adding metafigures, but the system is instantly
recognizable by anyone familiar with one of the earlier
implementations.

We wrote a version of HotDraw for ObjectWorks\Smalltalk Release
4.0 that we are distributing. We will describe and demonstrate the
basic framework and several applications built from it, such as a
visual programming language, a tool for inspecting Smalltalk
objects by drawing pictures of them, an environment for learning
Smalltalk by issuing commands and writing scripts for visible
objects, and a PERT chart editor. These applications illustrate
several advanced Smalltalk techniques, such as light-weight
classes, compiling code on the fly, and dynamically redirecting
messages by overriding doesNotUnderstand:. Time permitting, well
explore the implementation of HotDraw and how it uses these
techniques.
Teaching practical object-oriented software engineering
Authors: Dodani Mahesh H.
Published: January 2007

This paper describes the effort undertaken at the University of Iowa to institute a software engineering curriculum at the graduate level. We describe our experiences over 2 years in developing a pilot 2-semester course in object-oriented software engineering. This pilot course had the goals of introducing practical and realistic object-oriented software engineering to students, and developed several innovative techniques to achieve this goal on a very limited budget.
The role of object-oriented technology in the undergraduate computer science curriculum
Authors: Osborne Martin
Published: January 2007

Currently object-oriented technology (OOT) plays only a minor role in the computer science curriculum at most universities. This is because the curriculum is already crowded and OOT is just one of many new topics competing for a place. This paper describes reasons for including OOT in the curriculum and strategies for doing so. The experiences of two universities which teach OOT are described. The first university emphasizes OOT, while the second offers only a single course on the subject.
THE TURING TEST MISUNDERSTOOD
Authors: Larsson Jan Eric
Published: January 2007

The Turing test was conceived by Alan Turing [1] as a device to get around the difficult question of whether computers can think, and replace it with one which would be easier to discuss and answer. Since then the suggested test has repeatedly been quoted as an important aim for actual research and as a working test for intelligence.
A knowledge based Arabic question answering system (AQAS)
Authors: Mohammed F. A. , Nasser Khaled , Harb H. M.
Published: January 2007

This system accepts an arabic sentence (declarative statements or questions to be answered) and generates the appropriate output to the user. The proposed system could be considered an Arabic implementation to the general natural language processing system. It uses frames technique to represent the knowledge base of a radiation domain.
The testing of an APL compiler
Authors: Ching Wai-Mee , Katz Alex
Published: January 2007

The testing of the APL-to-C compiler, COMPC, developed at the IBM T.J. Watson Research Center consists of two components: a testing suite of 140 APL programs collected from various sources covering a variety of fields, and a unit-testing procedure which tests each primitive function on all possible subcases arising from different combinations of storage types and shapes. The second component, unit-testing, is an interesting example of the productivity APL can provide for software development. The unit-testing procedure is based on a workspace written in APL, and utilizes the □
FX
feature of APL to dynamically create a test function from one of several templates. The running of both testing components is automated through the use of control programs written in the REXX procedures language under the VM/CMS operating system.
APL helps the deaf to hear again
Authors: Deslauriers Pierre
Published: January 2007

This paper describes the role of APL as an efficient and crucial tool in research and development of sophisticated electronic systems. It will show how APL was successfully used in the development of a cochlear implant device. Cochlear implants are bio-medical electronic systems allowing completely deaf persons to recover partial hearing capabilities. This kind of system has been around for some time. Unfortunately, performance and flexibility have improved at a slow pace. Also, a more in-depth scientific understanding and testing were required.We will begin with an overview of the system itself, followed by the important role of APL as a time-saver and flexible tool, present some details on the APL programs and conclude with future directions for this technology.
Confessions of two APL educators learning J
Authors: Eisenberg Murray , Peelle Howard A.
Published: January 2007

This paper reports how we, two university teachers of APL, began to learn J. By presenting accounts of a series of small experiments, it reveals our understandings and misunderstandings along the way. It discusses things we especially liked and disliked about J as well as the resources available for learning it, and it indicates some implications of our experience for teaching J.
A modern APL windows user interface with DOS downwards compatibility
Authors: Eller Richard R. N.
Published: January 2007

Windows 3.1 represents the biggest revolution to APL technology since the advent of full screen techniques. This creates a new challenge to APLers migrating their applications from mainframe or PC DOS environments into Windows 3.1. This paper describes an ease means to adapt existing and new applications to exploit Windows Graphical User Interfaces (GUI). By using the techniques described below one can utilize most GUI features without needing to comprehend the massive amount of detail typical to Windows programming. Additionally, any application will also be backwards compatible to the DOS character based screen interface.
Using defined operators and function arrays to solve non-linear equations in APL2
Authors: Mansour Stephen M.
Published: January 2007

There are many mathematical algorithms such as Newton's method used to calculate solutions to non-linear equations. This paper will show how easy it is to implement these algorithms in APL2 with a minimum of code using the defined operator and careful design of its input functions. Although a very powerful and unique approach to solving non-linear equations using APL was described recently [Ne89], the emphasis in this paper is on the method of developing an application using APL2 and the concepts of defined operators and function arrays. This requires that input functions be robustly designed to take arrays as arguments and to produce array results much like primitive scalar functions. In this manner one can minimize the number of calls to the input function and take advantage of APL2's array handling capabilities. Since operators are permitted at most two operands, it is critical to minimize the number of input functions. This requires the input function designer to think in terms of function arrays. While there has been some discussion of the theory [Be84] and implementation [Be91] of function arrays, they can be created in APL2 with defined operators [Bk85]. In fact, function arrays can easily be defined in standard APL.
An introduction to log-linear analysis and implementing the Newton-Raphson algorithm in APL2
Authors: McArthur Duncan
Published: January 2007

This paper introduces the method of log-linear analysis for performing hypothesis testing on contingency tables. The reader will see a brief development of this topic beginning with Pearson's classic chi-square test and examples of analyses on two and three dimensional tables. The idea of hierarchical models and backward elimination are discussed. Finally, the APL2 implementation of the Newton-Raphson algorithm is described. Newton-Raphson is an iterative procedure for finding the roots of a function. It is used in log-linear analysis to find the maximum-likelihood estimation of expected frequencies that cannot be calculated from expressions in closed form.
From trees into boxes
Authors: Steinbrook David , McDonnell Eugene
Published: January 2007

This paper is a progress report on work undertaken to include tree data structures by means of the boxed data type available in J. Methods for displaying these boxed arrays as trees are shown. This work is part of a larger effort to provide a comprehensive set of facilities in J for working with tree structures. The facilities described were at first modelled in J and subsequently translated into C, in order to provide a J interpreter which has trees as native facilities. Thus this work also exemplifies the way in which one can tailor the J interpreter to special needs.
Understanding ANOVA the APL way
Authors: Thomson Norman
Published: January 2007

Statistics text books expound the collection of techniques known as

analysis of variance

by using mathematical formulae. The term analysis of variance is something of a misnomer, since any analysis follows a primary exercise of partitioning sums of squares, which is entirely a matter of computation and data reorganization of the sort which APL is particularly adept at. The crux of the analysis stage then consists of making choices between what is often a bewilderingly large range of subtly different sums of squares partitions. The primitive function
enclose with axis
maps naturally into the data manipulations involved in sums of squares partitions for arrays. To the casual reader the latter are obscured rather clarified by the use of mathematical formulae alone. This paper explores the relationships between APL functions and ANOVA, and goes on to illustrate how these can be used in the context of a designed experiment.
Cache inclusion and processor sampling in multiprocessor simulations
Authors: Chame Jacqueline , Dubois Michel
Published: January 2007

The evaluation of cache-based systems demands careful simulations of entire benchmarks. Simulation efficiency is essential to realistic evaluations. For systems with large caches and large number of processors, simulation is often too slow to be practical. In particular, the optimized design of a cache for a multiprocessor is very complex with current techniques.This paper addresses these problems. First we introduce necessary and sufficient conditions for cache inclusion in systems with invalidations. Second, under cache inclusion, we show that an accurate trace for a given processor or for a cluster of processors can be extracted from a multiprocessor trace. With this methodology, possible cache architectures for a processor or for a cluster of processors are evaluated independently of the rest of the system, resulting in a drastic reduction of the trace length and simulation complexity. Moreover, many important system-wide metrics can be estimated with good accuracy by extracting the traces of a set of randomly selected processors, an approach we call processor sampling. We demonstrate the accuracy and efficiency of these techniques by applying them to three 64-processor traces.
The KSR1
Authors: Rosti E. , Smirni E. , Wagner T. D. , Apon A. W. , Dowdy L. W.
Published: January 2007

Kendall Square Research introduced the KSR1 system in 1991. The architecture is based on a ring of rings of 64-bit microprocessora. It is a distributed, shared memory system and is scalable. The memory structure is unique and is the key to understanding the system. Different levels of caching eliminates physical memory addressing and leads to the ALLCACHE™ scheme. Since requested data may be found in any of several caches, the initial access time is variable. Once pulled into the local (sub) cache, subsequent access times are fixed and minimal. Thus, the KSR1 is a Cache-Only Memory Architecture (COMA) system.This paper describes experimentation and an analytic model of the KSR1. The focus is on the poststore programmer option. With the poststore option, the programm er can elect to broadcast the updated value of a variable to all processors that might have a copy. This may save time for threads on other processors, but delays the broadcasting thread and places additional traffic on the ring. The specific issue addressed is to determine under what conditions poststore is beneficial. The analytic model and the experimental observations are in good agreement. They indicate that the decision to use poststore depends both on the application and the current system load.
An analytic performance model of disk arrays
Authors: Lee Edward K. , Katz Randy H.
Published: January 2007

As disk arrays become widely used, tools for understanding and analyzing their performance become increasingly important. In particular, performance models can be invaluable in both configuring and designing disk arrays. Accurate analytic performance models are preferable to other types of models because they can be quickly evaluated, are applicable under a wide range of system and workload parameters, and can be manipulated by a range of mathematical techniques. Unfortunately, analytic performance models of disk arrays are difficult to formulate due to the presence of
queueing
and
fork-join synchronization
; a disk array request is broken up into independent disk requests which must all complete to satisfy the original request. In this paper, we develop and validate an analytic performance model for disk arrays. We derive simple equations for approximating their utilization, response time and throughput. We validate the analytic model via simulation, investigate the error introduced by each approximation used in deriving the analytic model, and examine the validity of some of the conclusions that can be drawn from the model.
The accuracy of trace-driven simulations of multiprocessors
Authors: Goldschmidt Stephen R. , Hennessy John L.
Published: January 2007

In trace-driven simulation, traces generated for one set of system characteristics are used to simulate a system with different characteristics. However, the execution path of a multiprocessor workload may depend on the order of events occurring on different processing elements. The event order, in turn, depends on system charcteristics such as memory-system latencies and buffer-sizes. Trace-driven simulations of multiprocessor workloads are inaccurate unless the dependencies are eliminated from the traces.We have measured the effects of these inaccuracies by comparing trace-driven simulations to direct simulations of the same workloads. The simulators predicted identical performance only for workloads whose traces were timing-independent. Workloads that used first-come first-served scheduling and/or non-deterministic algorithms produced timing-dependent traces, and simulation of these traces produced inaccurate performance predictions. Two types of performance metrics were particularly affected: those related to synchronization latency and those derived from relatively small numbers of events. To accurately predict such performance metrics, timing-independent traces or direct simulation should be used.
Processor scheduling on multiprogrammed, distributed memory parallel computers
Authors: Setia Sanjeev K. , Squillante Mark S. , Tripathi Satish K.
Published: January 2007

Multicomputers, consisting of many processing nodes connected through a high speed interconnection network, have become an important and common platform for a large body of scientific computations. These parallel systems have traditionally executed programs in batch mode, or have at most space-shared the processors among multiple programs using a static partitioning policy. This, however, can result in relatively low system utilization and throughput for important classes of scientific applications.In this paper we consider "a class of scheduling policies that attempt to increase processor utilization and system throughput by timesharing a partition of processors among multiple programs. We compare the system performance under this multiprogramming policy with that of static partitioning for a variety of workloads via both analytic and simulation modeling. Our results show that timesharing a partition can provide significant improvements in performance, particularly at moderate to heavy loads. The performance gains of the multiprogrammed policy depend upon the inherent efficiency of the parallel programs that comprise the workload, decreasing with increasing program efficiency. Our analysis also provides the regions over which one scheduling policy outperforms the other, as a function of system load.
Performance comparison of thrashing control policies for concurrent Mergesorts with parallel prefetching
Authors: Wu Kun-Lung , Yu Philip S. , Teng James Z.
Published: January 2007

We study the performance of various run-time thrashing control policies for the merge phase of concurrent mergesorts using parallel prefetching, where initial sorted runs are stored on multiple disks and the final sorted run is written back to another dedicated disk. Parallel prefetching via multiple disks can be attractive in reducing the response times for concurrent mergesorts. However, severe
thrashing
may develop due to imbalances between input and output rates, thus a large number of prefetched pages in the buffer can be replaced before referenced. We evaluate through detailed simulations three run-time thrashing control policies: (a) disabling prefetching, (b) forcing synchronous writes and (c) lowering the prefetch quantity in addition to forcing synchronous writes. The results show that (1) thrashing resulted from parallel prefetching can severely degrade the system response time; (2) though effective in reducing the degree of thrashing, disabling prefetching may worsen the response time since more synchronous reads are needed; (3) forcing synchronous writes can both reduce thrashing and improve the response time; (4) lowering the prefetch quantity in addition to forcing synchronous writes is most effective in reducing thrashing and improving the response time.
ROBUST
Authors: Baruah Sanjoy , Haritsa Jayant R.
Published: January 2007

No on-line scheduling algorithm operating in a uniprocessor environment can guarantee to obtain an effective processor utilization greater than 25% under conditions of overload. This result holds in the most generad case, where incoming tasks may have arbitrary slack times. We address here the issue of improving overload performance in environments where the slack-time charactersitics of all incoming tasks satisfy certain constraints. In particular, we present a new scheduling algorithm, ROBUST, that efficiently takes advantage of these task slack constraints to provide improved overload performance and is asymptotically optimal.
Analysis of superposition of streams into a cache buffer
Authors: Morris Robert J. T.
Published: January 2007

We consider the superposition of address streams into a cache buffer which is managed according to a Least Recently Used (LRU) replacement policy. Each of the streams is characterized by a stack depth distribution, i.e., the cache hit ratio as a function of the cache size, if that individual stream were applied to a LRU cache. We seek the cache hit ratio for each stream, when the combined stream is applied to a shared LRU cache. This problem arises in a number of branches of computer science, particularly in database systems and processor architecture.We provide two techniques to solve this problem and demonstrate their effectiveness using database I/O request streams. The first technique is extremely simple and relies on an assumption that the buffer is "well-mixed". The second technique relaxes this assumption and provides more accurate results. We evaluate the performance of the two techniques on realistic data, both in a lab environment and a large database installation. We find that the first simple technique provides accuracy which is sufficient for most practical purposes. By investigating sources of error and trying various improvements in the model we obtain some insight into the nature of database I/O request streams.
Effectiveness of trace sampling for performance debugging tools
Authors: Martonosi Margaret , Gupta Anoop , Anderson Thomas
Published: January 2007

Recently there has been a surge of interest in developing performance debugging tools to help programmers tune their applications for better memory performance [2, 4, 10]. These tools vary both in the detail of feedback provided to the user, and in the run-time overbead of using them. MemSpy [10] is a simulation-based tool which gives programmers detailed statistics on the memory system behavior of applications. It provides information on the frequency and causes of cache misses, and presents it in terms of source-level data and code objects with which the programmer is familiar. However, using MemSpy increases a program's execution time by roughly 10 to 40 fold. This overhead is generally acceptable for applications with execution times of several minutes or less, but it can be inconvenient when tuning applications with very long execution times.This paper examines the use of trace sampling techniques to reduce the execution time overhead of tools like MemSpy. When simulating one tenth of the references, we find that MemSpy's execution time overhead is improved by a factor of 4 to 6. That is, the execution time when using MemSpy is generally within a factor of 3 to 8 times the normal exwution time. With this improved performance, we observe only small errors in the performance statistics reported by MemSpy. On moderate sized caches of 16KB to 128KB, simulating as few as one tenth of the references (in samples of 0.5M references each) allows us to estimate the program's actual cache miss rate with an absolute error no greater than 0.3% on our five benchmarks. These errors are quite tolerable within the context of performance bugging. With larger caches we can also obtain good accuracy by using longer sample lengths. We conclude that, used with care, trace sampling is a powerful technique that makes possible performance debugging tools which provide
both
detailed memory statistics
and
low execution time overheads.
Parallel algorithms for simulating continuous time Markov chains
Authors: Nicol David M. , Heidelberger Philip
Published: January 2007

We have previously shown that the mathematical technique of uniformization can serve as the basis of synchronization for the parallel simulation of continuous-time Markov chains. This paper reviews the basic method and compares four different methods based on uniformization, evaluating their strengths and weaknesses as a function of problem characteristics. The methods vary in their use of optimism, logical aggregation, communication management, and adaptivity. Touchstone Delta multiprocessor, using up to 256 processors.
Global synchronization for optimistic parallel discrete event simulation
Authors: Nicol David M.
Published: January 2007

A number of optimistic synchronization schemes for parallel simulation rely upon a global synchronization. The problem is to determine when every processor has completed all its work,
and
there are no messages in transit in the system that will cause more work. Most previous solutions to the problem have used distributed termination algorithms, which are inherently serial; other parallel mechanisms may be inefficient. In this paper we describe an efficient parallel algorithm derived from a common “barrier” synchronization algorithm used in parallel processing. The algorithm's principal attraction is speed, and generality—it is designed to be used in contexts more general than parallel discrete-event simulation. To establish our claim to speed, we compare our algorithm's performance with the standard barrier algorithm, and find that its additional costs are not excessive. Our experiments are conducted using up to 256 processors on the Intel Touchstone Delta.
Disseminating critical target-specific synchronization information in parallel discrete event simulations
Authors: Pancerella Carmen M. , Reynolds Paul F.
Published: January 2007

A hardware-based framework which supports a wide range of parallel discrete event synchronization protocols has been proposed in [Reyn92]. This framework offloads all synchronization activity from the host processors and host communication network in the system. The underlying hardware computes results of global, binary associative operations, or global reductions. In this paper we present results of simulations that strongly suggest the need for a next-generation reduction network which computes and disseminates results of target-specific reductions to support both aggressive and non-aggressive parallel discrete event simulations. Target-specific reductions allow a logical process to receive synchronization information only from those logical processes which may have a direct or indirect impact on its performance.
Shared variables in distributed simulation
Authors: Mehl Horst , Hammes Stefan
Published: January 2007

Although users may want to employ shared variables when they program distributed simulation applications, almost none of the currently existing distributed simulation systems do offer this facility. In this paper, we present new algorithms which provide the illusion of consistent shared variables in distributed simulation systems without physically shared memmory.
Efficient implementation of event sets in Time Warp
Authors: Rönngren Robert , Ayani Rassul , Fujimoto Richard M. , Das Samir R.
Published: January 2007

The implementation of the pending event set (PES) is crucial to the execution speed of discrete event simulation programs. This paper studies the implementation of the PES in the context of simulations executing on parallel computers using the Time Warp mechanism. We present a scheme for implementing Time Warsp's PES based on well-known data structures for priority queues. This scheme supports efficient management of future and past events, especially for rollback and fossil collection operations. A comparative study of several queue implementations is presented. Experiments with a Time Warp system executing on a Kendall Square Research multiprocessor (KSR1) demonstrate that the implementation of the input queue can have a dramatic impact on performance, as large as an order of magnitude, that is much greater than what can be accounted for by simply the reduced execution time to access the data structure. In particular, it is demonstrated that an efficient input queue implementation can also significantly reduce the number of rollbacks, and the efficiency of memory management policies such as Jefferson's cancelback protocol. In the context of this work we also present an improved version of the skew heap that allows dequeueing of arbitrary elements at low cost. In particular, the possibility of dequeueing arbitrary elements will improve memory utilization. This ability is also important in applications where frequent rescheduling may occur, as in ready queues used to select the next logical process to execute.
The local Time Warp approach to parallel simulation
Authors: Rajaei Hassan , Ayani Rassul , Thorelli Lars-Erik
Published: January 2007

The two main approaches to parallel discrete event simulation – conservative and optimistic – are likely to encounter some limitations when the size and complexity of the simulation system increases. For such large scale simulations, the conservative approach appears to be limited by blocking overhead and sensitivity to lookahead, whereas the optimistic approach may become prone to cascading rollbacks, state saving overhead, and demands for larger memory space. These drawbacks restrict the synchronization schemes based on each of the two approaches from scaling up. A combined approach may resolve these limitations, while preserving and utilizing potential advantages of each method. However, the schemes proposed so far integrate the two views at the same level, i.e. local to a logical process, and hence may not be able to fully solve the problems. In this paper we propose the Local Time Warp method for parallel discrete-event simulation and present a novel synchronization scheme for it called HCTW. The new scheme hierarchically combines a Conservative Time Window algorithm with Time Warp and aims at reducing cascade rollbacks, sensitivity to lookahead, and the scalability problems. Local Time Warp is believed to be suitable for parallel machines equipped with thousands of processors and thus an appropriate candidate for simulation of large and complex systems.
An analytical comparison of periodic checkpointing and incremental state saving
Authors: Palaniswamy Avinash C. , Wilsey Philip A.
Published: January 2007

The successful application of optimistic synchronization techniques in parallel simulation requires that rollback overheads be contained. The chief contributions to rollback overhead in a Time Warp simulation are the time required to save state information and the time required to restore a previous state. Two competing techniques for reducing rollback overhead are periodic checkpointing (Lin and Lazowska, 1989) and incremental state saving (Bauer et al., 1991). This paper analytically compares the relative performance of periodic checkpointing to incremental state savings. The analytical model derived for periodic checkpointing is based almost entirely on the previous model developed by Lin (Lin and Lazowska, 1989). The analytical model for incremental state saving has been developed for this study. The comparison assumes an optimal checkpoint interval and shows under what simulation parameters each technique performs best.
A performance study of the cancelback protocol for Time Warp
Authors: Das Samir R. , Fujimoto Richard M.
Published: January 2007

This work presents results from an experimental evaluation of the space-time tradeoffs in Time Warp augmented with the cancelback protocol for memory management. An implementation of the cancelback protocol on Time Warp is described that executes on a shared memory multiprocessor, a 32 processor Kendall Square Research Machine (KSR1). The implementation supports canceling back more than one object when memory has been exhausted. The limited memory performance of the system is evaluated for three different workloads with varying degrees of symmetry. These workloads provide interesting stress cases for evaluating limited memory behavior. We, however, make certain simplifying assumptions (e.g., uniform memory requirement by all the events in the system) to keep the experiments tractable. The experiments are extensively monitored to determine the extent to which various overheads affect performance. It is observed that (i) depending on the available memory and asymmetry in the workload, canceling back several (called the
salvage parameter
) events at one time may improve performance significantly, by reducing certain overheads, (ii) a performance nearly equivalent to that with unlimited memory can be achieved with only a modest amount of memory depending on the degree of asymmetry in the workload.
The effect of synchronization requirements on the performance of distributed simulations
Authors: Shanker Murali S. , Patuwo B. Eddy
Published: January 2007

Recent experiments have shown that conservative methods can achieve good performance by exploiting the characteristics of the system being simulated. In this paper we focus on the interrelationship between run time and synchronization requirements of a distributed simulation. A metric that considers the effect of lookahead and the physical rate of transmission of messages, and an arrival approximation that models the effect of synchronization requirements on the run time are developed. It is shown that even when good lookahead is exploited in the system, poor run-time performance is achieved if an inefficient mapping of LPs to processors is used.
Restructuring a parallel simulation to improve cache behavior in a shared-memory multiprocessor
Authors: Cheriton David R. , Goosen Hendrik A. , Holbrook Hugh , Machanick Philip
Published: January 2007

Synchronization is a significant cost in many parallel programs, and can be a major bottleneck if it is handled in a centralized fashion using traditional shared-memory constructs such as barriers. In a parallel time-stepped simulation, the use of global synchronization primitives limits scalability, increases the sensitivity to load imbalance, and reduces the potential for exploiting locality to improve cache behavior.

This paper presents the results of an initial one-application study quantifying the costs and performance benefits of distributed, nearest neighbors synchronization. The application studied, MP3D, is a particle-based wind tunnel simulation. Our results for this one application on current shared-memory multiprocessors show a significant decrease in synchronization time using these techniques. We prototyped an application-independent library that implements distributed synchronization. The library allows a variety of parallel simulations to exploit these techniques without increasing the application programming beyond that of conventional approaches.
High performance Fortran language specification
Authors: Rice University CORPORATE
Published: January 2007

(PART I)Fortran Forum is reprinting this High Performance Fortran Language Specification over several issues. The current issue is devoted to the first four chapters of the HPFF Language Specification. Remaining chapters of the HPFF Language Specification, and the HPFF Journal of Development, will be printed in installments in filture issues of Fortran Forum.
Port activity simulation
Authors: Hassan Said Ali
Published: January 2007

Port can be viewed as a complex system containing several entities with interfering attributes. The whole image is very complex and special care should be considered to model such systems.Several works for investigating, analysing evaluating and improving port activities are carried out, each of them is concerned with a specific area related to the port functions, the key tool for most of these works is the simulation.The purpose of this paper is to give an overview of a computer simulation program used as a management decision support tool helping in evaluating and improving the comprehensive port activities. The proposed simulation model consists from a statistical module, an input module, ship generator, cargo generator, ship operation planner, cargo handling equipment planner, warehouse controller, and the transportation means planner. All the planning and controlling modules related to ships, cargoes, warehousing and transportation means contain special optimizers the optimizers constitute operations research packages to be used whenever possible to optimize the specific process related to port operations.The computer model will have several output results; evaluating different port performance indicators, performing port improvement analysis, studying port expansion possibilities, estimating future view of the port and making an economic impact evaluation.
Interaction design at the Utrecht School of the Arts
Authors: Barfield Lon , van Burgsteden Willie , Lanfermeijer Ruud , Mulder Bert , Ossewold Jurriënne , Rijken Dick , Wegner Philippe
Published: January 2007

The "Hogeschool voor de Kunsten Utrecht" (Utrecht School of the Arts, Utrecht, The Netherlands) offers a four-year curriculum in interaction design (roughly equivalent to an MA) and a one year master of arts degree in interactive multimedia. The material here presents our approach to interaction design as a discipline and the curriculum that embodies this approach. It features a collection of thoughts and snapshots-- we regard it as work in progress. Interaction design is a new field. It is growing fast, continuously adapting to new circumstances. We believe in our approach, but do not regard it as the final truth. There will be questions, as well as answers. Your comments, criticisms and suggestions are appreciated!
Rethinking theoretical frameworks for HCI
Authors: Rogers Yvonne , Bannon Liam , Button Graham
Published: January 2007

This one-and-a-half day workshop was intended to bring together researchers concerned about the state of theory in HCI, to discuss the adequacy of current theoretical frameworks and to examine more closely a number of alternative or extended frameworks that have been proposed for HCI. A further aim was to examine the recent 'turn to the social' and its implications for design practice in HCI. A wide variety of position papers (to put it mildly) were received, from which 15 were selected for presentation and discussion at the workshop. These ranged from critiques of the role of theory in HCI, expositions of various theoretical frameworks and the importance of considering methodology in relation to theory. Several authors also described how their alternative frameworks had enabled them to 'open their eyes' to alternative design solutions when analysing particular problems in a work context. The workshop was organized around three inter-related themes with the intention of engaging in both reflective and projected thinking. These were: i) What is the problem in HCI? (ii) What does my theoretical approach have to offer HCI, and (iii) How does my theory relate to practice? The participants were asked to address these questions in relation to their position papers. A general concern that became central to all themes was what theory was being used for in HCI. Several attempts at identifying and demystifying its role were suggested and it became clear that in fact it was being used in a multitude of ways. These included a background from which to: frame the problem, pose questions, to analyse, to describe and to explain. There was a general consensus, however, that the most 'scientific' use of a theory to propose and evaluate predictions about human performance was not appropriate for the current wave of alternative theory building. The lessons learnt from attempts to apply information-processing models to user performance were taken as sufficient evidence that the field of HCI is far too rich and complex to force into a set of hypotheses that can be quantitatively tested. Furthermore, the field is too diverse and changing to be formulated as a coherent theory of HCI. Alternatively, the role of theory in HCI should be to inform and guide system analysis and design.
Integrating ILP and EBL
Authors: Mooney Raymond J. , Zelle John M.
Published: January 2007

This paper presents a review of recent work that integrates methods from Inductive Logic Programming (ILP) and Explanation-Based Learning (EBL). ILP and EBL methods have complementary strengths and weaknesses and a number of recent projects have effectively combined them into systems with better performance than either of the individual approaches. In particular, integrated systems have been developed for guiding induction with prior knowledge (ML-Smart, FOCL, GRENDEL) refining imperfect domain theories (FORTE, AUDREY, Rx), and learning effective search-control knowledge (AxA-EBL, DOLPHIN).
InQuisiX—an electronic catalog for software reuse
Authors: Donaldson Cameron
Published: January 2007

InQuisiX is an interactive system supporting the development and use of an electronic catalog. Features are provided for organizing the catalog, classifying and describing items, and searching and browsing catalog descriptions. Items described in the catalog are stored elsewhere and are accessed for display or retrieval through end-user tools integrated with InQuisiX. InQuisiX provides public interfaces for loading data, exchanging catalog data with other tools, invoking end-user tools, and making searchable any information stored outside the catalog, such as documents or graphics.Although InQuisiX is being marketed for use in cataloguing reusable software assets, there is nothing inherent in the design or functionality which restricts its use to this domain. Certain features, particularly the ability to invoke and work cooperatively with other automated tools in the development environment, are particularly useful to software developers. Hexible classification and description features are also important for the emerging software reuse market because best practices in classifying and describing software are still a research topic.InQuisiX runs on UNIX/X Window based environments and is currently hosted on both Sun SPARCstations and IBM RISC 6000 workstations. The system has been developed entirely in Classic-Ada, an object-oriented preprocessor for Ada, and uses a custom, automatically generated persistent object base for storing all information, including both the organization and the contents of the catalog, inverted indexes used to support searching, saved queries, and interfaces to end-user tools. The object base is implemented as a single binary file.
Book review: Neural Networks for Pattern Recognition by Albert Nigrin (MIT Press, 1993)
Authors: de la Maza Michael
Published: January 2007

Newly minted assistant professors often super-charge their careers and their curriculum vitae by publishing elaborations of their dissertations in the form of books. Indeed, the practice is so common and so effective that it is recommended in "Getting what you came for: The smart student's guide to earning a Master's or a Ph.D." by Robert L. Peters. Albert Nigrin's "Neural Networks for Pattern Recognition" is such a book. The dissertation from which the book springs was written under the direction of Alan Biermann at Duke University.
Unification using a distributed representation
Authors: Browne A. , Pilkington J.
Published: January 2007

In the neural network and artificial intelligence research communities at the moment there is an ongoing debate about the representational adequacy of neural networks versus that of classical symbolic systems. Supporters of the classical symbolic AI paradigm argue that systems such as neural networks using a distributed representation do not have the compositionality required to perform structure-sensitive logical tasks. Supporters of the neural network paradigm point to the difficulty symbolic systems have in generalising to novel inputs. We have investigated performing variable binding with a distributed representation by using a neural network to perform unification. The successful performance of this task adds further evidence to the assertion that neural networks using distributed representations can be used to perform complex structure-sensitive tasks.
Analysis of the impact of memory in distributed parallel processing systems
Authors: Peris Vinod G. J. , Squillante Mark S. , Naik Vijay K.
Published: January 2007

We consider an important tradeoff between processor and memory allocation in distributed parallel processing systems. To study this tradeoff, we formulate stochastic models of parallel program behavior, distributed parallel processing environments and memory overheads incurred by parallel programs as a function of their processor allocation. A mathematical analysis of the models is developed, which includes the effects of contention for shared resources caused by paging activity. We conduct a detailed analysis of real large-scale scientific applications and use these results to parameterize our models. Our results show that memory overhead resulting from processor allocation decisions can have a significant effect on system performance in distributed parallel environments, strongly suggesting that memory considerations must be incorporated in the resource allocation policies for parallel systems. We also demonstrate the importance of the inter-locality miss ratio, which is introduced in this paper and analyzed for the first time.
Processor allocation policies for message-passing parallel computers
Authors: McCann Cathy , Zahorjan John
Published: January 2007

When multiple jobs compete for processing resources on a parallel computer, the operating system kernel's processor allocation policy determines how many and which processors to allocate to each. In this paper we investigate the issues involved in constructing a processor allocation policy for large scale, message-passing parallel computers supporting a scientific workload.

We make four specific contributions:

We define the concept of
efficiency preservation
as a characteristic of processor allocation policies. Efficiency preservation is the degree to which the decisions of the processor allocator degrade the processor efficiencies experienced by individual applications relative to their efficiencies when run alone.

We identify the interplay between the kernel processor allocation policy and the application load distribution policy as a determinant of efficiency preservation.

We specify the details of two families of processor allocation policies, called Equipartition and Folding. Within each family, different member policies cover a range of efficiency preservation values, from very high to very low.

By comparing policies within each family as well as between families, we show that high efficiency preservation is essential to good performance, and that efficiency preservation is a more dominant factor in obtaining good performance than is equality of resource allocation.