bluuebunny/crossref_metadata_2025 huggingface dataset:
Evidence of Low Temperature Decomposition of GaN Hetero-Epitaxial Layers on C-Plane Sapphire Surface Characterized by Differential Scanning Calorimetry
Authors: Thierry-Jebali Nicolas , Chiriac Rodica , Brylinski Christian
Published: February 2014

This work reports on the characterization of the decomposition of GaN layers epitaxied on c-plane Sapphire substrate by Differential Scanning Calorimetry. Many configurations have been characterized from two different GaN epilayer providers with a large range of doping concentrations from Non-intentionally Doped layers up to 2x1019 cm-3. All intentionally doped layers exhibit an endothermic reaction starting at 200-300 °C while the NiD layer thermogram is the same as the blank experiment. XPS and SEM observations demonstrated that the endothermic reaction is related to the GaN decomposition through Threading Dislocation and nanoPipe.
A Proposal to Apply Effective Acceptor Level for Representing Increased Ionization Ratio of Mg Acceptors in Extrinsically Photon-Recycled GaN
Authors: Mochizuki Kazuhiro , Mishima Tomoyoshi , Ishida Yuya , Hatakeyama Yoshitomo , Nomoto Kazuki , Kaneda Naoki , Tsuchiya Tadayoshi , Terano Akihisa , Tsuchiya Tomonobu , Uchiyama Hiroyuki , Tanaka Shigehisa , Nakamura Tohru
Published: February 2014

An effective acceptor level (EAeff) for representing the increased ionization ratio in extrinsically photon-recycled p-type GaN is proposed. EAeff at 300 K in the range of 0.1360.145 eV is found to reproduce current/voltage characteristics of transmission-line-model patterns formed with GaN p-n junction epitaxial layers and electrode spacing of 320 μm when the p-n diode current flowing through an 80×100-μm electrode is 90 mA. When EAeff is decreased from 0.160 eV to 0.145 eV, the on-resistance of 18×100-μm GaN bipolar transistors is predicted to be reduced by more than 50%.
Structural Analysis of ZnO Thin Films Grown in Room Temperature on PET Film
Authors: Yamamoto Hiroshi , Idehara Kohei , Kimura Ryota , Nishigaki Hiroshi , Hasuike Noriyuki , Harima Hiroshi , Isshiki Toshiyuki
Published: February 2014

The structure of ZnO thin films grown in room temperature by reactive DC sputter technique on polyethylene terephthalate film were evaluated by SEM and TEM. The quality of ZnO thin films grown in room temperature were observed to vary widely. ZnO crystals grow without uniform orientation in early stage of growth, and then ZnO crystallinity improves as the ZnO thin films grow up. And ZnO crystallinity is influenced by roughened surface of PET film.
Comparative Study of Defects in 4H-SiC Epilayers Grown on 4o Off-Axis (0001) and (000-1) Substrates
Authors: Aigo Takashi , Itoh Wataru , Fujimoto Tatsuo , Yano Takayuki
Published: February 2014

In this paper, we present a comparison of defects in 4H-SiC epilayers grown on 4o off-axis (0001) and (000-1) substrates. It was confirmed using high sensitive surface observation and micro-Raman spectroscopy that the generation of epitaxial defects on (000-1) C-face substrates was less susceptible to substrate morphological defects such as pits than that on (0001) Si-face substrates and 'comet-like' defects on (000-1) C-faces were caused by the inclusion of 3C-SiC. Moreover, PL imaging observation showed that stacking fault densities decreased when increasing the growth temperature, and they increased when increasing the C/Si ratio, irrespective of the face polarity. The densities, however, were lower for C-faces at higher growth temperature and C/Si ratio. The present results indicated that C-faces were preferable to Si-faces to achieve smooth step-flow growth suppressing epitaxial defects and stacking faults, which were influenced by the substrate morphological defects and the fluctuation of C/Si ratio in the epitaxial growth.
Simulation Study of High-Speed Wafer Rotation Effects in a Vertical Reactor for 4H-SiC Epitaxial Growth on 150 mm Substrates
Authors: Ito Masahiko , Fujibayashi Hiroaki , Ito Hideki , Kamata Isaho , Naito Masami , Hara Kazukuni , Yamauchi Shoichi , Suzuki Kunihiko , Yajima Masayoshi , Mitani Shin Ichi , Suzuki Katsumi , Aoki Hirofumi , Nishikawa Koichi , Kozawa Takahiro , Tsuchida Hidekazu
Published: February 2014

The effects of high-speed wafer rotation for 4H-SiC epitaxy in newly developed 150 mm vertical reactor is investigated by simulation analysis. The simulation model shows a good agreement with experimental results. It is revealed that a combination of high-speed wafer rotation as high as 1000 rpm and relatively high system pressure of 267 mbar is effective to reducing boundary layer thickness above the 4H-SiC wafer, and greatly enhances the epitaxial growth rates. The growth rate increase ~2 times using the combination of high-speed wafer rotation and relatively high system pressure.
Fast Growth Rate Epitaxy on 4° Off-Cut 4-Inch Diameter 4H-SiC Wafers
Authors: Hassan Jawad , Bae Heung Taek , Lilja Louise , Farkas Ildiko , Kim Ickchan , Stenberg Pontus , Sun Jian Wu , Kordina Olle , Bergman Peder , Ha Seoyong , Janzén Erik
Published: February 2014

We report the development of over 100 μm/h growth rate process on 4-inch diameter wafers using chlorinated growth. The optimized growth process has shown extremely smooth epilayers completely free of surface step-bunching with very low surface defect density, high uniformity in thickness and doping and high run to run reproducibility in growth rate, controlled doping and defect density.
Study of Surface Morphologies of On-Axis 6H-SiC Wafer after High-Temperature Etching and Epitaxial Growth
Authors: Liu Xue Chao , Shi Biao , Xin Jun , Huang Wei , Liu Xi , Zheng Yan Qing , Shi Er Wei
Published: February 2014

Gas etching and homoepitaxial growth on a nominally on-axis 2-inch 6H-SiC (0001) Si-face were studied. Regular steps with one unit cell height and complex pattern with facets and steps were observed after gas etching in the central region and edge region, respectively. The homoepitaxial growth shows that the complex (facets & steps) pattern expands and merges during the growth to bring on a rough epi-layer surface in the edge region. The steps with one unit cell height on the substrate split into steps with bilayers on the epilayer. The different lateral growth rates of <11-20>- and <1-100>-orientated steps make the width of steps orientated to <11-20> much larger than the ones orientated to <1-100>.
Improved Epilayer Surface Morphology on 2˚ Off-Cut 4H-SiC Substrates
Authors: Lilja Louise , Hassan Jawad , Janzén Erik , Bergman J. Peder
Published: February 2014

Homoepitaxial layers of 4H-SiC were grown with horizontal hot-wall CVD on 2˚ off-cut substrates, with the purpose of improving the surface morphology of the epilayers and reducing the density of surface morphological defects. In-situ etching conditions in either pure hydrogen or in a mixture of silane and hydrogen prior to the growth were compared as well as C/Si ratios in the range 0.8 to 1.0 during growth. The smoothest epilayer surface, together with lowest defect density, was achieved with growth at a C/Si ratio of 0.9 after an in-situ etching in pure hydrogen atmosphere.
3C-SiC Seeded Growth on Diamond Substrate by VLS Transport
Authors: Vo-Ha Arthur , Rebaud Mickaël , Carole Davy , Lazar Mihai , Tallaire Alexandre , Soulière Véronique , Pinero Jose Carlos , Araujo Daniel , Ferro Gabriel
Published: February 2014

This work deals with the localized epitaxial growth of SiC on (100) diamond substrate using the Vapour-Liquid-Solid (VLS) transport. An epitaxial relationship of grown SiC with the seed was succesfully achieved when inserting a silicidation step before the VLS growth. This silicidation consists in the formation of a SiC intermediate layer on the diamond substrate by solid-state reaction with a silicon layer deposited at 1000 or 1350 °C. On the 1350°C formed SiC buffer layer, p-doped 3C-SiC(100) islands elongated in the <110> directions were obtained after VLS growth. For the 1000°C buffer layer, the SiC deposit after VLS growth is much denser but mostly polycrystalline. Interfacial reactivity and diffusion are considered to explain the obtained results.
Monte Carlo Study of the Early Growth Stages of 3C-SiC on Misoriented and 6H-Sic Substrates
Authors: Camarda Massimo , La Magna Antonino , La Via Francesco
Published: February 2014

In this paper we used three dimensional kinetic Monte Carlo simulations on super-lattices to study the hetero-polytypical growth of cubic silicon carbide polytype (3C-SiC) on hexagonal 6H-SiC substrates with miscuts towards the <11-20> and <1-100> directions. We analyze the grown film for different miscut angles (in the range 2° to 12° degrees) and different growth rates, finding that substrates with miscut of 3-4° degrees towards the <1-100> direction should be the best choice for the growth of high quality cubic epitaxial films, being able to promote, given a suitable pre-growth treatment to induce step bunching, the nucleation of single domain 3C-SiC films.
Curvature Evaluation of Si/3C-SiC/Si Hetero-Structure Grown by Chemical Vapor Deposition
Authors: Anzalone Ruggero , Camarda Massimo , Severino Andrea , Piluso Nicolo’ , La Via Francesco
Published: February 2014

In this work we analyzed the variation of wafer curvature due to the growth of thin Si layers on top of 3C-SiC/Si films. The final Si/3C-SiC/Si hetero-structure, allows not only to have a deeper understanding of the stress within the different layers, but can also be used for MEMS applications, using the Si film as sacrificial layer in order to obtain 3C-SiC free-standing structure, or for electronic application, e.g. using the thin Si layer as high quality MOSFET channel and the SiC layer as the drift region. In details, the influence on wafer curvature by the growth of thin Si layer on top on the 3C-SiC/Si film as been studied by optical profilometer. A theoretical model was also applied in order to fit the measured curvature of the hetero-structure and optimize the system. Finally, in order to study the morphology of the hetero-structure micro-Raman spectroscopy and Transmission Electron Microscopy (TEM) measurements has been performed.
Effect of TaC-Coated Crucible on SiC Single Crystal Growth
Authors: Lee Doe Hyung , Lee Hee Tae , Bae Byung Joong , Lee Hee Jun , Lee Sang II , Park Mi Seon , Lee Won Jae , Yeo Im Gyu , Eun Tai Hee , Chun Myong Chuel
Published: February 2014

The present research was focused to extensively investigate the effect of TaC-coated crucible on the SiC crystal growth and then compare the difference of various properties between SiC crystals grown in conventional graphite crucible and TaC-coated crucible. The bulk growth was conducted around 2200°C of the growth temperature and 40 mbar of an argon atmosphere for the growth pressure. The better crystalline quality was obtained from the crystal grown in TaC-coated crucible. The SiC crystal grown in the TaC-coated crucible exhibited superior characteristics than SiC crystal grown in the conventional crucible in terms of the crystal quality and defect density. Furthermore, nitrogen incorporation in SiC crystal grown in the TaC-coated crucible was definitely decreased.
Identification of the Negative Carbon Vacancy at Quasi-Cubic Site in 4H-SiC by EPR and Theoretical Calculations
Authors: Trinh Xuan Thang , Szasz Krisztian , Hornos Tamas , Kawahara Koutarou , Suda Jun , Kimoto Tsunenobu , Gali Adam , Janzén Erik , Son Nguyen Tien
Published: February 2014

In freestanding n-type 4H-SiC epilayers irradiated with low-energy (250 keV) electrons at room temperature, the electron paramagnetic resonance (EPR) spectrum of the negative carbon vacancy at the hexagonal site, VC- (h), and a new signal were observed. From the similarity in defect formation and the spin-Hamiltonian parameters of the two defects, the new center is suggested to be the negative C vacancy at the quasi-cubic site, VC- (k). The identification is further supported by hyperfine calculations.
Correlation between Microwave Reflectivity and Excess Carrier Concentrations in 4H-SiC
Authors: Kato Masashi , Mori Yuto , Ichimura Masaya
Published: February 2014

Carrier lifetime in a high injection condition is a key parameter for design of bipolar devices. Microwave photoconductivity decay (μ-PCD) is a popular method to evaluate the carrier lifetime in silicon carbide (SiC). For accurate evaluation of the carrier lifetime by μ-PCD measurements, the microwave reflectivity needs to be proportional to the excess carrier concentration. In this study, we observed microwave reflectivity from 4H-SiC as a function of injected photon density and suggested a method to keep proportionality of the reflectivity to the excess carrier concentration.
Open Issues in SiC Bulk Growth
Authors: Chaussende Didier , Ariyawong Kanaparin , Tsavdaris Nikolaos , Seiss Martin , Shin Yun Ji , Dedulle Jean Marc , Madar Roland , Sarigiannidou Eirini , La Manna Joseph , Chaix-Pluchery Odette , Ouisse Thierry
Published: February 2014

In this paper, an overview of the SiC bulk growth processes is given with a special focus on the most recent results related to growth and modeling. In addition, even if SiC growth is a very old topic and that it is now considered as an « industrial development problem », we will show that there are still many open questions of both fundamental and technological importance related to its crystal growth. Process chemistry and surface mechanisms will be more specifically discussed.
Basal Plane Dislocations from Inclusions in 4H-SiC Epitaxy
Authors: Stahlbush Robert E. , Mahadik Nadeemullah A. , O'Loughlin Michael  J.
Published: February 2014

Suppression of basal plane dislocations (BPDs) from critical epitaxial drift layer has occurred mainly by converting BPDs in the substrate into threading edge dislocations before the BPDs enter the drift layer. As optimized epitaxial growth has produced drift layers free of BPDs originating from the substrate over a large fraction of the wafer, other sources of BPDs have become important. One source of BPDs introduced during epitaxial growth is from inclusions, which mainly consist of misoriented 4H-SiC. Inclusions are surrounded by a local cluster of BPDs and in thick, low-BPD epitaxy the outermost BPDs glide centimeters from the inclusion forming a much larger damaged area. The details of BPD migration from inclusions are discussed.
Polarized Photoluminescence from Partial Dislocations in 4H-SiC
Authors: Hirano Rii , Tajima Michio , Tsuchida Hidekazu , Itoh Kohei M. , Maeda Koji
Published: February 2014

Polarization characteristics of luminescence from partial dislocations (PDs) in 4H-SiC have been investigated by room-temperature photoluminescence (PL) imaging. After expansion of Shockley stacking faults by high-power laser irradiation, PL from PDs tilted by 6° from their Burgers vector (6°-PDs) was observed with almost the same PL peak energy as that of 30°-Si (g) PDs. The PL from the 30°-Si (g) and 6°-PDs which were mobile under illumination were both found to be polarized perpendicular to their dislocation lines. In contrast, the PL from immobile 30°-C(g) PDs was not polarized. The present results suggest that the carriers bound to the 30°-Si (g) and 6°-PDs have anisotropic wave functions and those bound to 30°-C(g)PDs have isotropic wave functions.
Post-Growth Reduction of Basal Plane Dislocations by High Temperature Annealing in 4H-SiC Epilayers
Authors: Mahadik Nadeemullah A. , Stahlbush Robert E. , Nath Anindya , Tadjer Marko J. , Imhoff Eugene A. , Feygelson Boris N. , Nipoti Roberta
Published: February 2014

Basal Plane Dislocations (BPD) were reduced in 4H-SiC epilayers by high temperature annealing in the range of 1600 °C to 1950 °C using two annealing techniques. Samples annealed at > 1750 °C showed almost complete elimination of BPDs propagating from the substrate. However, surface morphology was degraded for MW annealed samples above 1800 °C, with new BPDs being generated from the surface. A new capping technique was developed along with application of high N2 overpressure to preserve the surface morphology and avoid formation of new BPDs.
Comparison of Thermodynamic Databases for the Modeling of SiC Growth by PVT
Authors: Ariyawong Kanaparin , Blanquet Elisabeth , Dedulle Jean Marc , Ouisse Thierry , Chaussende Didier
Published: February 2014

The numerical modeling of the SiC bulk growth process by physical vapor transport has been established as the essential tool for the process development, especially for understanding and predicting the favorable growth conditions. An accurate computation of mass transfers is strongly dependent on the equilibrium partial pressure calculations. In this paper, we compare the relative impact of the different thermodynamic databases available on the full PVT process modeling. We found that whatever the database used, the trends regarding growth rate calculation, crystal shape, Si/C ratio are correctly described and none of the database would bring about unacceptable errors from the process development point of view even if some discrepancies in the absolute values could be obtained.
Dislocation Analysis of 4H-SiC Using KOH Low Temperature Etching
Authors: Sato Takahiro , Suzuki Yuya , Ito Hiroyuki , Isshiki Toshiyuki , Fukui Munetoshi
Published: February 2014

The conventional KOH etching method at elevated temperatures is an easy way to study SiC dislocations, but presents problems due to an increased etch rate. Here, we examine the application of low temperature KOH treatment for the analysis of dislocation cores and etch pits in SiC. A low energy scanning electron microscope (SEM) is effective to classify dislocation kinds. The scanning transmission electron microscope (STEM) observation of thick samples prepared by the in situ micro-sampling technique enables evaluation of detailed dislocation properties.
Characterization of Threading Edge Dislocation in 4H-SiC by X-Ray Topography and Transmission Electron Microscopy
Authors: Sugawara Yoshihiro , Yao Yong Zhao , Ishikawa Yukari , Danno Katsunori , Suzuki Hiroshi , Bessho Takeshi , Yamaguchi Satoshi , Nishikawa Koichi , Ikuhara Yuichi
Published: February 2014

A threading dislocation (TD) in 4H-SiC, which was currently interpreted as a perfect threading edge dislocation (TED) by synchrotron monochromatic-beam X-ray topography (SMBXT) and molten KOH etching with Na2O2 additive, was performed comparative characterization using weak-beam dark-field (WBDF) and large-angle convergent-beam electron diffraction (LACBED) methods. The TD was suggested to be dissociated into a dislocation pair which can be observed in the WBDF image of g=-12-10. The TD, which was identified as b//[-12-10] by SMBXT observation, was unambiguously determined as b=1/3[-12-10] by LACBED analysis. In the case of perfect TED, it was found that the direction of Burgers vector derived from SMBXT observation corresponds to LACBED analysis.
Defects Grouping and Characterizations of PL-Imaging Methods for 4H-SiC Epitaxial Layers
Authors: Odawara Michiya , Kamei Koji , Miyasaka Yoshihiko , Yamashita Tamotsu , Takahashi Seiichi , Kageshima Yoshiaki , Momose Kenji , Osawa Hiroshi , Sato Takayuki
Published: February 2014

4H-SiC epitaxial wafers were prepared for the investigation of epitaxial stacking faults (SFs), for the purpose of classification and add to the epitaxial specification by PL-imaging analysis. Black colored SFs detected in PL colored images were focused, and investigated. Black SFs in the PL images were classified for two species, ones were correspond to the triangular defects, and the others were similar to the known SFs. Triangular defects were the killer defects for the I-V properties and the other black defects were not affected the I-V properties. Most of PL spectrums of triangular defects had the 538nm peak, and showed the 3C properties. Black defects undetectable as the surface defects (SDs) had 460, 480nm peak, differed from the reported typical 1-4SSFs spectrum. It seemed that these defects differed from the thickness of stacking layer and PL peak, whether the defects led to detectable/undetectable as the SDs. Thick stacking layers generated the triangular defects, and thin ones generated the PL-black defects undetectable as the surface analysis. Consequently, the black defects undetectable as the surface analysis (detected only for the PL-imaging analysis) has no use for add to the specification at the moment.
Characterization of Vacant Broken Line Defects in A-Face Grown Crystals of Silicon Carbide
Authors: Sugiyama Naohiro , Yamada Masanori , Urakami Yasushi , Kobayashi Masakazu , Masuda Takashi , Shigetoh Keisuke , Gunjishima Itaru , Hirose Fusao , Onda Shoichi
Published: February 2014

A new type of defects, vacant broken line defects, was found to occur in a-face grown crystals of 4H-Silicon Carbide. We characterized the vacant broken line defects by high voltage transmission electron microscope (HV-TEM). The HV-TEM image revealed that the edges of broken line defects were connected by a bundle of dislocations, which elongated to the growth direction on the basal plane. The analysis by gb method for determining Burgers vector indicated that the dislocations were not pure screw dislocations, but complex of screw and edge dislocations. The vacant broken line defect was considered to be a quasi-stable state of a bundle of basal plane dislocations in a-face growth, similar to a micropipe defect in c-face growth.
Single Event Gate Rupture in SiC MOS Capacitors with Different Gate Oxide Thicknesses
Authors: Deki Manato , Makino Takahiro , Kojima Kazutoshi , Tomita Takuro , Ohshima Takeshi
Published: February 2014

The leakage currents through the gate oxide of MOS capacitors fabricated on n-type 4H-Silicon Carbide (SiC) was measured under accumulation bias conditions with heavy-ion irradiation. The Linear Energy Transfer (LET) dependence of the critical electric field (Ecr) at which dielectric breakdown occurred in these capacitors with two different oxide thicknesses was evaluated. The MOS capacitors with thin gate oxide showed higher Ecr values than those with thick gate oxide. The linear relationship between the reciprocal Ecr and LET was observed for both MOS capacitors. The slope of LET dependence of 1/Ecr for SiC MOS capacitors was smaller than that for Si, suggesting that SiC MOS devices are less susceptible to single-event gate rupture (SEGR) than Si MOS devices.
Improved Analytical Expressions for Avalanche Breakdown in 4H-SiC
Authors: Stum Zachary , Tang Yi , Naik Harsh , Chow T. Paul
Published: February 2014

A new power law is approximated for effective impact ionization in 4H-SiC, which is then used to generate one-dimensional equations for critical electric field, avalanche breakdown voltage, and depletion layer width that match both simulation and published device results better than previous published equations.
Growth of Low Resistivity n-Type 4H-SiC Bulk Crystals by Sublimation Method Using Co-Doping Technique
Authors: Kato Tomohisa , Eto Kazuma , Takagi Satoru , Miura Tomonori , Urakami Yasushi , Kondo Hiroyuki , Hirose Fusao , Okumura Hajime
Published: February 2014

The nitrogen (N) and aluminum (Al) co-doped growth of n-type 4H-SiC bulk crystals were performed by sublimation method. In the co-doping growth, we achieved the lowest resistivity of 6.9mWcm, and we also confirmed phenomenon of stacking faults suppression in spite of high N concentration more than 8 x 1019cm-3.
Threshold Voltage Instability of SiC-MOSFETs on Various Crystal Faces
Authors: Senzaki Junji , Shimozato Atsushi , Kojima Kazutoshi , Harada Shinsuke , Ariyoshi Keiko , Kojima Takahito , Tanaka Yasunori , Okumura Hajime
Published: February 2014

Threshold voltage (VTH) of SiC-MOSFETs on various crystal faces has been investigated systematically using the same bias-temperature-stress (BTS) conditions. In addition, dependences of gate-oxide-forming process on VTH instability is also discussed. Nitridation treatments such as N2O and NH3 post-oxidation annealing (POA) are effective in stabilization of VTH under both positive-and negative-BTS tests regardless of crystal face. On the other hand, serious VTH instability was confirmed in MOSFETs with gate oxide by pyrogenic oxidation followed by H2 POA.
Low Energy Proton Radiation Impact on 4H-SiC nMOSFET Gate Oxide Stability
Authors: Florentin Matthieu , Alexandru Mihaela , Constant Aurore , Schmidt Bernd , Millan José , Godignon Philippe
Published: February 2014

The 4H-SiC MOSFET electrical response to 180 keV proton radiations at three different fluences has been evaluated. For a certain dose, the devices show an apparent improvement of their electrical characteristics likely due to the N and/or H atoms diffusion inside the oxide layer. This work complete our previous studies on high energy proton irradiation, showing that the 4H-SiC MOSFET is also robust to the low energy proton radiation, when the proton implanted range is located near the MOS interface.
Radiation-Induced Trapped Charging Effects in SiC Power MOSFETs
Authors: Green Ronald , Lelis Aivars J. , Urciuoli Damian P. , Litz Marc , Carroll James
Published: February 2014

Commercial SiC MOSFETs were exposed to ionizing radiation to characterize the radiation response and to compare the observed threshold voltage (VT) instability post-radiation exposure, with the VT instability following bias temperature stress (BTS) testing. As expected, a large number of positively charged oxide traps were present in these devices following irradiation, resulting in a significant negative VT shift. However, the observed VT instability following irradiation was much smaller than that for similarly processed devices exposed to a BTS. Irradiated devices subjected to unbiased thermal treatments experienced a significant annealing of trapped holes above 100 °C. However, isochronal annealing treatments did not significantly alter the number of switching oxide traps, suggesting that a large portion of the traps activated by irradiation may lie deeper within the SiO2, beyond the tunneling distance from the SiC.
Degradation of SiO2/SiC Interface Properties due to Mobile Ions Intrinsically Generated by High-Temperature Hydrogen Annealing
Authors: Chanthaphan Atthawut , Hosoi Takuji , Nakano Yuki , Nakamura Takashi , Shimura Takayoshi , Watanabe Heiji
Published: February 2014

The impact of mobile ions intrinsically generated in thermally grown SiO2 by high-temperature forming gas annealing (FGA) on the SiO2/4H-SiC interface properties was studied by means of electrical characterization of SiC metal-oxide-semiconductor (MOS) capacitors. Unlike Si devices, mobile ions located at the interfaces were found to cause a remarkable stretch-out of capacitance-voltage (C-V) curve near the accumulation condition, and the degree of stretch-out was more pronounced with increasing probe frequency. This suggests that the interface states with a long emission time constant are formed near the conduction band edge due to the mobile ions. To clarify this unusual phenomenon, several characterization techniques to evaluate interface state densities (Dit), including Terman, conductance, and C-ψs methods, were employed. The Dit values estimated for SiO2/SiC interfaces with mobile ions were a few times as large as those without mobile ions.
Fast 4H-SiC Crystal Growth by High-Temperature Gas Source Method
Authors: Hoshino Norihiro , Kamata Isaho , Tokuda Yuichiro , Makino Emi , Kojima Jun , Tsuchida Hidekazu
Published: February 2014

Possibilities of very fast 4H-SiC crystal growth using a high-temperature gas source method are surveyed by computational simulation and experimental studies. The temperature range suitable to obtain high growth rates are investigated by simulating temperature dependences of growth rates for H2+SiH4+C3H8 and H2 +SiH4+C3H8+HCl gas systems. Simulation and experimental results demonstrate that an increase in source gas flow rates as well as gas-flow velocities enhance growth rates. High growth rates exceeding 1 mm/h are experimentally obtained using both gas systems. Single crystal growth on a 3-inch diameter seed crystal is also demonstrated.
Retarded Oxide Growth on 4H-SiC(0001) Substrates due to Sacrificial Oxidation
Authors: Hosoi Takuji , Uenishi Yusuke , Nakano Yuki , Nakamura Takashi , Shimura Takayoshi , Watanabe Heiji
Published: February 2014

The impact of a sacrificial oxidation treatment on subsequent gate oxide formation on 4H-SiC(0001) substrates was investigated. Although x-ray photoelectron spectroscopy (XPS) analysis revealed that the SiC surface after removing a 40-nm-thick sacrificial oxide by diluted HF solution was almost identical to that of an as-grown epilayer, the subsequent dry O2 oxidation resulted in a thinner SiO2 layer for the sample with the sacrificial oxidation in the ultrathin film regime (~3 nm). The metal-oxide-semiconductor (MOS) capacitor with sacrificial oxidation also exhibited a larger frequency dispersion in capacitance-voltage (C-V) characteristics, indicating that interface property had been degraded. However, when the oxide thickness reached about 10 nm, there was no difference in frequency dispersion with and without sacrificial oxidation. This means that the SiO2 growth in the initial stage of oxidation was significantly affected by the sacrificial oxidation treatment.
MOS Interfacial Studies Using Hall Measurement and Split C-V Measurement in n-Channel Carbon-Face 4H-SiC MOSFET
Authors: Ono Shuichi , Waki Eiji , Arai Manabu , Yamasaki Kimiyoshi , Takagi Shinichi
Published: February 2014

The electron mobility and the surface carrier density in the channel layer of a C-face 4H-SiC MOSFET was studied using a Hall measurement and a split C-V measurement. Total surface carrier density and the effective mobility were extracted experimentally using the split C-V measurement. It was found that the difference of the peak Hall mobility and the peak effective mobility was less than 20%. And the total trap density was the order of the 1012 cm-2. The cause of the relatively small difference between the Hall mobility and the effective mobility was discussed.
Conduction Mechanism of Leakage Current in Thermal Oxide on 4H-SiC
Authors: Sometani Mitsuru , Okamoto Dai , Harada Shinsuke , Ishimori Hitoshi , Takasu Shinji , Hatakeyama Tetsuo , Takei Manabu , Yonezawa Yoshiyuki , Fukuda Kenji , Okumura Hajime
Published: February 2014

The conduction mechanism of the leakage current in thermal oxide on 4H-SiC was identified. The carrier separation current-voltage method clarified that electrons are the dominant carriers of the leakage current. The temperature dependence of the currentvoltage characteristics indicated that the conduction mechanism of the leakage current involved not only Fowler-Nordheim tunneling (FN) but also Poole-Frenkel (PF) emission. The PF emission current due to the existence of defects in the oxide increased with temperature.
Dislocation Analysis of 4H-SiC Crystals Obtained at Fast Growth Rate by the High-Temperature Gas Source Method
Authors: Kamata Isaho , Hoshino Norihiro , Tokuda Yuichiro , Makino Emi , Kojima Jun , Tsuchida Hidekazu
Published: February 2014

This paper reports on evidence of high-quality and very fast 4H-SiC crystal growth achieved using a high-temperature gas source method. The formation of threading screw dislocations (TSDs) during crystal growth was examined by comparing synchrotron X-ray topography images taken for a seed and grown crystals, while the generation of a high density of new TSDs is observed under improper growth condition. High-quality crystal growth retaining the TSD density of the seed crystal was accomplished under an improved condition, even for a very high growth rate of 2.1 mm/h.
Impact of the Oxidation Temperature on the Interface Trap Density in 4H-SiC MOS Capacitors
Authors: Thomas Stephen M. , Jennings Michael R. , Sharma Yogesh K. , Fisher Craig A. , Mawby Philip  Andrew
Published: February 2014

Despite the material advantages of Silicon-Carbide (SiC), the on resistance of 4H-SiC metal-oxide-semiconductor transistors are severely degraded by high trap densities near the oxide/SiC interface (Dit). In this work, the effect of the oxidation ambient (oxygen flow rates of 0.05 l/min-2.5 l/min) and oxidation temperature (1200°C-1600°C) on the Dit is investigated. The Dit was reduced by up to an order of magnitude using a combination of a low oxygen flow rate and a high temperature. The Dit was extracted from capacitance-voltage measurements made on MOS capacitors.
NF3 Added Oxidation of 4H-SiC(0001) and Suppression of Interface Degradation
Authors: Hasunuma Ryu , Nagoshi Masahito , Yamabe Kikuo
Published: February 2014

The electrical properties of SiO2/4H-SiC(0001) was characterized, and it was confirmed that the NF3 added oxidation in O2 can achieve interface with low interface state density. Optimization of NF3 added oxidation process was attempted to obtain films with both good interface properties and low leakage current. It was concluded that optimization of oxidation process should take account of obtaining proper balance among the rate of oxidation, which generates impurity carbon, the ability of carbon removal, and the rate of SiO2 etching which also affects the leakage characteristics.
Characterization of SiO2/SiC Interfaces Annealed in N2O or POCl3
Authors: Fiorenza Patrick , Swanson Lukas K. , Vivona Marilena , Giannazzo Filippo , Bongiorno Corrado , Lorenti Simona , Frazzetto Alessia M. , Roccaforte Fabrizio
Published: February 2014

This paper reports a comparative characterization of SiO2/SiC interfaces subjected to post-oxide-deposition annealing in N2O or POCl3. Annealing process of the gate oxide in POCl3 allowed to achieve a notable increase of the MOSFET channel mobility (up to 108 cm2V-1s-1) with respect to the N2O annealing (about 20 cm2V-1s-1), accompanied by a different temperature behaviour of the electrical parameters in the two cases. Structural and compositional analyses revealed a different surface morphology of the oxide treated in POCl3, as a consequence of the strong incorporation of phosphorous inside the SiO2 matrix during annealing. This latter explained the instability of the electrical behaviour of MOS capacitors annealed in POCl3.
Increase in the Growth Rate by Rotating the Seed Crystal at High Speed during the Solution Growth of SiC
Authors: Umezaki Tomonori , Koike Daiki , Horio Atsushi , Harada Shunta , Ujihara Toru
Published: February 2014

We studied the effect of rotation speed of seed crystal on the growth rate during the solution growth of SiC. The growth rate increased with increasing rotation speed of the seed crystal. The increase in the growth rate was observed in relatively wide range of carbon concentration. According to the numerical simulation, the carbon concentration gradient near the growth interface under 150 rpm condition is larger than 20 rpm (ACRT) condition. This indicates that increase in the growth rate is caused by the increase in the carbon concentration gradient of the diffusion layer.
Al+ Implanted 4H-SiC p+-i-n Diodes: Evidence for Post-Implantation-Annealing Dependent Defect Activation
Authors: Grossner Ulrike , Moscatelli Francesco , Nipoti Roberta
Published: February 2014

Two families of Al+ implanted vertical p+in diodes that have been processed all by identical steps except the post implantation annealing one have been characterized with current voltage measurements from -100 to +5V at different temperatures. Analysis of the static forward current voltage characteristics shows two different ideality factor regions, which are distinct for each family. The reverse current voltage characteristics reveals corresponding two different activation energies. These are assumed to be correlated to the Z1/2 defect for the one case and another one with an activation energy of 0.25eV.
Temperature Dependence of Electric Conductivities in Femtosecond Laser Modified Areas in Silicon Carbide
Authors: Deki Manato , Oka Tomoki , Takayoshi Shodai , Naoi Yoshiki , Makino Takahiro , Ohshima Takeshi , Tomita Takuro
Published: February 2014

Temperature dependence of the femtosecond laser modified region on silicon carbide was measured. The current-voltage characteristics showed the ohmic properties and thus we could evaluate the specific resistance for each irradiation conditions and the measured temperatures. The specific resistance was increased with decreasing temperature. From the double exponential fit to the temperature dependence of the specific resistance, the trapping energy of the impurity levels formed by the femtosecond laser modification was found to be 4.5 meV and 51.4 meV.
Surface Morphology and Threading Dislocation Conversion Behavior during Solution Growth of 4H-SiC Using Al-Si Solvent
Authors: Harada Shunta , Yamamoto Yuji , Xiao S. , Tagawa M. , Ujihara Toru
Published: February 2014

Surface morphology and threading dislocation conversion behavior during solution growth of 4H-SiC using pure Si and Al-Si solvents was investigated. The growth surfaces on the C face were smoother than the Si face. By the addition of Al to the solvent, the growth surface became smooth on the C face and rough on the Si face. Threading screw dislocation conversion took place only in the grown crystals on the Si face and threading edge dislocation conversion occurs both on the Si face and the C face using the pure Si solvent. On the other hand, in the grown crystal on the C face using the Al-Si solvent, the threading dislocation conversion was hardly observed. These results indicate that the threading dislocation conversion behavior is influenced by the surface morphology.
Low Resistance Ohmic Contact Formation of Ni Silicide on Partially Si Ion Implanted n+ 4H-SiC
Authors: De Silva Wijemuni , Sato Tadashi , Kuroki Shin Ichiro , Kikkawa Takamaro
Published: February 2014

In this work, a partial amorphization is introduced to form a Nickel silicide ohmic contact for 4H-SiC bottom electrode. In a conventional Nickel silicide electrode, a carbon agglomeration at the silicide/SiC interface has been occured, and contant resistance between Ni silicide and SiC substrate became larger. For the reduction of the contact resistance, the partial amorphization of surface of SiC substrate was introduced. By this partial amorphization, the space position of the carbon agglomeration is controlled, and contact resistance can be reduced. As a result, with an amorphous 100 nm line pattern, a reliable contact resistance of 1.9×10-3Ωcm2 was realized.
Electromagnetic Enhancement of Carbon Transport in SiC Solution Growth Process: A Numerical Modeling Approach
Authors: Ariyawong Kanaparin , Dedulle Jean Marc , Chaussende Didier
Published: February 2014

The carbon distribution and its transport in the liquid from the source to the crystal directly affect the control of parasitic nucleation, the growth front stability, and the growth rate during SiC solution growth. Controlling the carbon transport is one of the key issues for understanding and improving the process. In this paper, numerical modeling by finite element method is used to describe the complex convective flow pattern in the melt. We focus on electromagnetic convection and investigate the effect of coil frequency, keeping a simple and technologically realistic crucible design. We show that below a critical value of frequency, the carbon transport can be controlled by the electromagnetic convection, giving rise to significant growth rate enhancement.
Impact of Interface Traps on Current-Voltage Characteristics of 4H-SiC Schottky-Barrier Diodes
Authors: Moghadam Hamid Amini , Dimitrijev Sima , Han Ji Sheng
Published: February 2014

This paper presents a physical model based on interface traps to explain both the larger barrier heights of practical Schottky diodes in comparison to the theoretically expected values and the appearance of a knee in the log I–V characteristics. According to this model, acceptor-type interface traps near the valance band increase the Schottky barrier height, which shifts the log I–V characteristic to higher forward-bias voltages. In addition to the acceptor traps, donor-type interface traps can appear near the conduction band, and when they do, they cause the knee in the log I–V characteristics as their energy level falls below the Fermi level and the charge associated with these traps changes from positive to neutral.
I - V Characteristics in Surface-Activated Bonding (SAB) Based Si/SiC Junctions at Raised Ambient Temperatures
Authors: Nishida Shota , Liang Jian Bo , Morimoto Masashi , Shigekawa Naoteru , Arai Manabu
Published: February 2014

The physical and electrical properties of p+-Si/n-4H-SiC and n+-Si/n-4H-SiC heterojunctions fabricated by using surface-activated bonding (SAB) were investigated by scanning electron microscopy (SEM), current-voltage (I-V) and breakdown characteristics measurements at raised ambient temperatures. The I-V characteristics for the reverse bias voltages of the two junctions were compared with the expectations based on Frenkel-Poole, and trap-assisted tunneling models. The results of calculations using the trap-assisted tunneling model were close to the measurements.
Off-Orientation Influence on C-Face (0001) 4H-SiC Surface Morphology Produced by Etching Using Chlorine Trifluoride Gas
Authors: Fukumoto Yusuke , Habuka Hitoshi , Kato Tomohisa
Published: February 2014

The C-face (0001) 4H-SiC surface morphology produced by etching using chlorine trifluoride gas was studied, focusing on the influence of the off-orientation. The etching pit at the 4o off-oriented surface was formed at a temperature higher than 973 K, which was higher than 623 K for the on-axis surface. At 1073 K, the hexagonal-shaped etching pits were observed after the etching at the chlorine trifluoride gas concentration of less than 3 %. In the temperature range lower than 900 K, the mirror surface could be maintained after the etching. Thus, the mirror surface and the pitted surface are expected to be formed on the 4o off-oriented surface by means of appropriately adjusting the parameters, such as the temperature and the chlorine trifluoride gas concentration.
Solution Growth of p-Type 4H-SiC Bulk Crystals with Low Resistivity
Authors: Shirai Takayuki , Danno Katsunori , Seki Akinori , Sakamoto Hidemitsu , Bessho Takeshi
Published: February 2014

P-type 4H-SiC bulk crystals have been grown at a high growth rate of 1.0 mm/h by solution growth using Si-Cr-Al based melt. The crystals grown from solution with an Al content of 10at% show low resistivity of 35 mcm, which is two orders of magnitude lower than commercialwafers (Resistivity: 2500 mcm). The low-resistivity crystals have flat surface and few solvent inclusions. These results indicate that solution growth is a suitable method for fabricating low-resistivity p-type substrates with low cost.
High-Speed Slicing of SiC Ingot by High-Speed Multi Wire Saw
Authors: Maeda Hiroto , Takanabe Ryuichi , Takeda Atsunori , Matsuda Syogo , Kato Tomohisa
Published: February 2014

Development of high efficient and high accuracy slice processing technology is required for realizing the high quality and low cost large SiC wafer. Our target of high speed slicing is slicing a 6 inch SiC single crystal ingot in about 9 hours. This slicing speed is about 10 times higher than the loose abrasive slurry sawing and about 4 times higher than the current technology of diamond wire sawing. The slicing speed and the slicing accuracy are in the relationship of trade-off. Therefore, in this research, we have studied the high speed slicing technique of 3 inch and 4 inch SiC single crystal ingot aiming at reduction of sliced wafers SORI. Moreover, we have extracted subjects to scale-up for the high speed slicing of the 6 inch SiC single crystal ingot.
Characteristics of a Schottky Barrier Diode and the SiC Wafers Sliced by Wire Electrical Discharge Machining
Authors: Miyake Hidetaka , Tomita Nobuyuki , Nakaki Yoshiyuki , Furusho Tomoaki , Itokazu Atsushi , Hashimoto Takashi , Toyoda Yoshihiko , Yamakawa Satoshi , Sumitani Hiroaki , Kuroiwa Takeharu , Sato Tatsushi
Published: February 2014

The multi-wire electrical discharge slicing (multi-wire EDS), which is a brand-new method for fabricating wafers, is expected to considerably reduce the production cost of SiC wafers by decreasing in the width of kerf and kerf loss. We evaluated, for the first time, the influences of a wire electrical discharge machining (WEDM) on the SiC wafers based on experiments using WEDM equipped with a power supply of EDS. Although the analyses by transmission electron microscopy (TEM) and energy dispersive X-ray (EDX) revealed that the WEDM influenced layer consists of a contamination layer including several kinds of metals and a layer having crystal defects was certainly formed near the wafer surfaces, the width of the influenced layers was only 3μm, and the layer could be easily removed by the grinding process. Furthermore, characteristics of Schottky barrier diodes (SBDs) fabricated with removing the influenced layer formed by WEDM are comparable to those fabricated with using conventional wafers.
Temperature and dIDS/dt Dependence of the Switching Energy of SiC Schottky Diodes in Clamped Inductive Switching Applications
Authors: Jahdi Saeed , Alatise Olayiwola , Mawby Philip  Andrew
Published: February 2014

This paper presents the temperature and switching rate dependence of 1.2 kV/30 A SiC Schottky diode energy losses in clamped inductive switching circuits with 1.2 kV/30 A SiC MOSFETs as the switching transistors. The devices are tested under an ambient temperature range that spans from -75°C to 175°C and with switching rates that span from 10 to 100 A/μs. Due to the abruptness of the diode turn-OFF, low series resistance and the lack of reverse recovery, SiC SBDs are known to exhibit ringing or electromagnetic oscillations in the presence of parasitic inductances and high switching rates. The impact of these electromagnetic oscillations on the switching energy, the dependence of the switching energy on temperature and the switching rate (dIDS/dt) is the purpose of this paper’s investigation.
Investigation of Stacking Faults Affecting on Reverse Leakage Current of 4H-SiC Junction Barrier Schottky Diodes Using Device Simulation
Authors: Hasegawa Junichi , Konishi Kazuya , Nakamura Yu , Ohtsuka Kenichi , Nakata Shuhei , Nakamine Yoshifumi , Nishimura Tadashi , Hatano Mutsuko
Published: February 2014

We clarified the relationship between the enhanced leakage current of SiC Junction Barrier Schottky diodes and the stacking faults in the SiC crystal at the SiC and metal electrode interface by measuring the electrical and optical properties, and confirm by using the numerical simulations. Numerical simulation considering local lowering of Schottky barrier height, which is 0.8 eV lower than that of 4H-SiC well explained the 2-4 orders of magnitude higher reverse leakage current caused by the SFs. We concluded that the locally lowering of the Schottky barrier height at the 3C-SiC layer in the 4H-SiC surface is a main cause of the large reverse leakage current.
The Cryogenic Testing and Characterisation of SiC Diodes
Authors: Gammon Peter Michael , Fisher Craig A. , Shah Vishal A. , Jennings Michael R. , Pérez-Tomás Amador , Burrows Susan E. , Myronov Maksym , Leadley David R. , Mawby Philip  Andrew
Published: February 2014

High-resolution cryogenic performance testing is carried out on 4H-SiC PiN and Schottky diodes. At 2K intervals from 20 to 320K, current-voltage tests are performed to extract static characteristics such as turn-on, ideality factor and barrier height from across the temperature range. We also analyse the performance of the diodes within a low current/voltage switching circuit across the same temperature range using an inductive switching setup. Both diodes suffer markedly increased conduction losses at the lower temperatures, the PiN diode losing all the benefits of conductivity modulation as dopant freezes-out, reducing its series resistance. However, minor gains in the total switching losses are expected at low temperature due to faster switching speeds.