bluuebunny/crossref_metadata_2025 huggingface dataset:
LTPL Investigation of N-Ga and N-Al Donor-Acceptor Pair Spectra in 3C-SiC Layers Grown by VLS on 6H-SiC Substrates
Authors: Sun Jian Wu , Zoulis Georgios , Lorenzzi Jean , Jegenyes Nikoletta , Juillaguet Sandrine , Peyre Hervé , Soulière Véronique , Ferro Gabriel , Milesi Frédéric , Camassel Jean
Published: May 2010

Ga-doped 3C-SiC layers have been grown on on-axis 6H-SiC (0001) substrates by the VLS technique and investigated by low temperature photoluminescence (LTPL) measurements. On these Ga-doped samples, all experimental spectra collected at 5K were found dominated by strong N-Ga donor-acceptor pair (DAP) transitions and phonon replicas. As expected, the N-Ga DAP zero-phonon line (ZPL) was located at lower energy (~ 86 meV) below the N-Al one. Fitting the transition energies for the N-Al close DAP lines gave 251 meV for the Al acceptor binding energy in 3C-SiC and, by comparison, 337 meV for the Ga acceptor one.
Deep Defects in 3C-SiC Generated by H+- and He+-Implantation or by Irradiation with High-Energy Electrons
Authors: Weidner Michael , Trapaidze Lia , Pensl Gerhard , Reshanov Sergey A. , Schöner Adolf , Itoh Hisayoshi , Ohshima Takeshi , Kimoto Tsunenobu
Published: May 2010

Intrinsic defects in 3C-SiC are generated by implantation of H+- and He+-ions or irra¬diation with high energy electrons. The defect parameters and the thermal stability of the observed defects are determined. The capture-cross-section of the W6-center is directly measured by variation of the filling pulse length. The charge state of the W6-center is obtained from double-correlated DLTS investigations according to the Poole-Frenkel effect.
Optical Characterization of VLS+CVD Grown 3C-SiC Films by Non-Linear and Photoluminescence Techniques
Authors: Manolis Georgios , Zoulis Georgios , Juillaguet Sandrine , Lorenzzi Jean , Ferro Gabriel , Camassel Jean , Jarašiūnas Kęstutis
Published: May 2010

Thin 3C-SiC(111) epilayers grown on 6H-SiC(0001) substrate by VLS and CVD procedures were studied by low temperature photoluminescence (LTPL) and nonlinear optical techniques at room and low temperatures. Free carrier density ((0.3-7)×1017 cm-3) and nitrogen concentration (4×1016 cm-3) in the layers were determined from Raman and LTPL data. Investigation of non-equilibrium carrier dynamics by using transient grating and free carrier absorption techniques provided an ambipolar diffusion coefficient Da (~2.5 cm2/s) and carrier lifetime τR (2-4 ns) values at room temperature. The temperature dependences of Da and τR in 40-300 K range revealed the scattering processes in high density plasma as well the impact of defects.
Growth of Single-Phase 2H-SiC Layers by Vapor–Liquid–Solid Process
Authors: Imade Mamoru , Takeuchi Shin , Uemura Masahiro , Yoshimura Masashi , Kitaoka Yasuo , Sasaki Takatomo , Mori Yusuke , Itoh Shinroh , Okuda Hiroyuki , Yamazaki Masanobu
Published: May 2010

We attempted the vapor–liquid–solid (VLS) growth of SiC film in Si-Li solution using gaseous CH4 as a carbon source at 900 oC. A 100-m-thick liquid-phase epitaxy (LPE) layer was obtained on a 4H-SiC (0001) substrate under CH4 pressure of 0.9 MPa. X-ray diffraction (XRD) and a high-resolution transmission electron microscope (HR-TEM) measurement showed that the LPE layer was single-phase 2H-SiC. We concluded that VLS growth in Si-Li solution using gaseous CH4 as a carbon source is useful for growing single-phase 2H-SiC.
Thermally Stimulated Current Separation of Hole and Acceptor Trap Density in 4H-SiC MOS Devices Using Gamma Ray Irradiation
Authors: Tadjer Marko J. , Hobart Karl D. , Stahlbush Robert E. , McMarr Patrick J. , Hughes Hap L. , Kub Fritz J. , Haney Sarah K.
Published: May 2010

Thermally stimulated current (TSC) measurements on epitaxial and implanted 4H-SiC MOS capacitors are presented. The effect of gamma ray irradiation on the TSC spectra of epitaxial 4H-SiC MOSCAP devices is discussed. On non-irradiated samples, two TSC peaks are observed near 55 K and 80 K. Due to the generated oxide charge during irradiation, the 80 K emission split into two constituent peaks. These have been attributed to hole traps and Al acceptors.
Multiscale Modeling and Analysis of the Nitridation Effect of SiC/SiO2 Interface
Authors: Chatterjee Aveek , Matocha Kevin , Tilak Vinayak , Fronheiser Jody , Piao Hong
Published: May 2010

We explain the role of nitrogen in simultaneously increasing the inversion channel mobility and reducing the threshold voltage of SiC MOSFET. A variety of computational techniques have been used to compute the atomic scale configuration of a nitridated SiC/SiO2 interface, and the corresponding change in Fermi level, inversion channel mobility, and threshold voltage. X-ray photoelectron spectroscopy (XPS) has been used to investigate the SiC/SiO2 interface to determine the nitrogen concentrations and chemical bonding. We elucidate the physics behind improved channel mobility due to NO anneal and demonstrate that the trade-off between threshold voltage and inversion channel mobility can be correlated to the extent of nitridation.
Dynamical Simulations of Dry Oxidation and NO Annealing of SiO2/4H-SiC Interface on C-Face at 1500K: From First Principles
Authors: Ohnuma Toshiharu , Miyashita Atsumi , Yoshikawa Masahito , Tsuchida Hidekazu
Published: May 2010

We perform dynamical simulations of dry oxidation and NO annealing of the SiO2/4H-SiC C-face interface at 1500K using first-principles molecular dynamics based on plane waves, supercells, and the projector-augmented wave method. The slab model is used for the simulation. In the dry oxidation simulation, O atoms oxidize not only the C atoms at the SiC interface but also second-atomic-layer Si atoms in the SiC layer. Bilayer oxidation occurs in the oxidation process. The formation of C clusters that grow in the c-axis direction is observed. In the simulation of NO annealing, N atoms passivate interface C atoms. The density of N atoms saturates, then N atoms desorb as N2 molecules. CN molecules are formed by the abstraction of C atoms by the N atoms, and the CN molecules readily react at the interface. The formation of a Si3N structure is also observed.
Experimental Identification of Extra Type of Charges at SiO2/SiC Interface in 4H-SiC
Authors: Naik Harsh , Li Z. , Chow T. Paul
Published: May 2010

High temperature C-V characterization with and without UV illumination has been performed on n-type 4H-SiC MOS capacitors fabricated using different processing conditions to extract various types of interfacial charges. An anomalous positive flatband voltage shift with temperature has been observed in most of the SiC MOS capacitors measured. We have experimentally identified an extra type of fixed charges at the 4H-SiC/SiO2 interface from the temperature dependence of the flatband voltage, particularly under UV illumination.
A C-V Method of Slow-Switching Interface Traps Identification in Silicon Carbide MOS Structures
Authors: Gutt Tomasz , Przewlocki Henryk M. , Bakowski Mietek
Published: May 2010

A novel method based on the analysis of the C-V hysteresis change with increasing charge release time is proposed. The presence of a band of deep traps was demonstrated using this method in 3C-SiC samples. The same band of deep traps was also observed using photo-electric measurements of barrier height EBS in the same samples.
EDMR and EPR Studies of 4H SiC MOSFETs and Capacitors
Authors: Cochrane Corey J. , Bittel Brad C. , Lenahan Patrick M. , Fronheiser Jody , Matocha Kevin , Lelis Aivars J.
Published: May 2010

We have extended a magnetic resonance based study of MOS devices to include electrically detected magnetic resonance (EDMR) measurements of fully processed MOSFETs from three facilities as well as conventional electron paramagnetic resonance (EPR) resonance measurements on simple SiC/SiO2 structures. We find close similarity between the conventional EPR and the EDMR spectra.
Crystalline Quality of Channel Regions in SiC Buried Gate Static Induction Transistors (SiC-BGSITs)
Authors: Takatsuka Akio , Tanaka Yasunori , Yano Koji , Yatsuo Tsutomu , Arai Kazuo
Published: May 2010

We investigated the crystalline quality and electrical properties of the channel regions in 4H-SiC buried gate static induction transistors (SiC-BGSITs). To accurately determine the characteristics of the channel regions, we performed transmission electron microscopy and scanning spreading resistance microscopy. It was found that the channel regions have high crystalline quality and no significant fluctuations in doping concentration.
Study of the Evolution of Basal Plane Dislocations during Epitaxial Growth: Role of the Surface Kinetics
Authors: Camarda Massimo , La Magna Antonino , Canino Andrea , La Via Francesco
Published: May 2010

In this article, using Kinetic Monte simulations on super-lattices, we study the evolution of extended defects during epitaxial growth. Specifically we show that, in the case of misoriented, close-packed substrates, a single-layer stacking fault can either extend throughout the entire epilayer (i.e. extended from the substrate up to the surface) or close in a dislocation loop depending on the deposition conditions and the crystallographic structure of the exposed surface containing the defect. We explain this behaviour in terms of a surface kinetic competition between the defect and the surrounding, perfect crystal: if the growth rate of the defect is higher compared to the growth rate of the surrounding crystal the defect will expand, otherwise it will close. This physical mechanism allows us to explain several experimental results of homo- and heteroepitaxy.
Modal Composition of the SiC Surface Electromagnetic Response to the External Radiation at Lattice Resonant Frequency
Authors: Kazantsev Dmitry
Published: May 2010

To observe the direction of the surface polariton wave excited by the external radiation on the semi-infinite crystal surface, the opaque mask was placed onto the sample surface. The penetration of the surface polariton wave from the open surface in beneath the metal mask was observed via small openings in the mask. It was shown that despite the k-vector mismatch between the surface polariton states and the light in the environmental media (vacuum), non-zero efficiency of the surface wave excitation is still present and that the k-vector of the excited wave corresponds to the k-vector projection of the driving light.
Study of Indentation Damage in Single Crystal Silicon Carbide by Using Micro Raman Spectroscopy
Authors: Yamaguchi Makoto , Fujitsuka M. , Ueno S. , Miura I. , Erikawa W. , Tomita Takuro
Published: May 2010

Raman spectroscopic study is carried on the Vickers indented area on the surface of a single crystal silicon carbide (4H- and 6H-SiC) as a nondestructive structure probe to investigate a residual stress and crystal structure. LO phonon frequency shifts and the broad and weak bands around LO phonon band were observed. The residual strain field around the indentation is discussed.
Characterization of Defects in Semi-Insulating 6H-SiC Substrates Using IR Thermal Imaging Camera
Authors: Lee Kun Yong , Miyazaki Hisashi , Okamoto Yoichi , Morimoto Jun
Published: May 2010

We have detected defects micro-pipes and a cluster of impurities in semi-insulating 6H-SiC substrates using long-wavelength infrared thermal imaging camera (IR-camera) with 8 ~ 14 µm in non-destructive and non-contact. Also we have evaluated the thermal influence of defects on the entire substrates from the observation results of scanning laser microscope (SLM) and light scattering tomography (LST). Through the process, it was certificated that the defects in the substrates could be detected with relatively macroscopic scale (8  6 mm2). Moreover, through a temperature profile processing by a 0.1 K thermal resolution, we estimated thermal behavior of the defect areas in the 6H-SiC precisely. The IR-camera is considered as effective technique for evaluating the defects in the intermediate range between micro and macro scale.
Structural Evaluation of Graphene/SiC (0001) Grown in Atmospheric Pressure
Authors: Boeckl John , Mitchel W.C. , Clarke Edwina , Barbosa Roland L. , Lu Wei Jie
Published: May 2010

Graphene growth on SiC in atmospheric pressure argon exhibits large terrace sizes and coverage over the entire substrate surface. Graphene growth and the resulting morphology are correlated with the characteristics of the growth chamber and the surface quality of the starting SiC substrate. Without in-situ surface preparation prior to growth, we observe “wrinkles” in the graphene surface. Graphitic-like disordered structures are formed at 1500°C while atomically flat graphene terraces are formed above 1600°C.
Growth and Characterization of Epitaxial Graphene on SiC Induced by Carbon Evaporation
Authors: Al-Temimy Ameer , Riedl Christian , Starke Ulrich
Published: May 2010

By carbon evaporation under ultrahigh vacuum (UHV) conditions, epitaxial graphene can be grown on SiC(0001) at significantly lower temperatures than with conventional Si sublimation. Therefore, the degradation of the initial SiC surface morphology can be avoided. The layers of graphene are characterized by low energy electron diffraction (LEED), angle resolved ultraviolet photoelectron spectroscopy (ARUPS), and atomic force microscopy (AFM). On SiC the graphene lattice is rotated by 30o in comparison to preparation by annealing in UHV alone.
Epitaxial Graphene Growth Studied by Low-Energy Electron Microscopy and First-Principles
Authors: Kageshima Hiroyuki , Hibino Hiroki , Nagase Masao
Published: May 2010

Epitaxial graphene growth on SiC is investigated using low-energy electron microscopy (LEEM) and first-principles calculations. LEEM is one of the most powerful tools to identify the thickness of graphene on SiC with a good spatial resolution. With the help of such LEEM, the thickness-dependent physical properties are identified by various experiments. It is shown that epitaxial graphene sheets continue even over steps of the substrate, and that a new graphene sheet often grows from step edges while the surface morphology changes drastically. Furthermore, the first-principles calculations also show the energetics of the epitaxial graphene growth on SiC. It is expected that the fine control of epitaxial graphene growth on SiC will open the way to novel graphene devices in the post-scaling era of the ultra-large-scale integrations (ULSI).
Deep UV Raman Spectroscopy of Epitaxial Graphenes on Vicinal 6H-SiC Substrates
Authors: Kamoi Susumu , Hasuike Noriyuki , Kisoda Kenji , Harima Hiroshi , Morita Kouhei , Tanaka Satoru , Hashimoto Akihiro
Published: May 2010

We report microscopic Raman scattering studies of epitaxial graphene grown on SiC substrates using a deep-ultraviolet (UV) laser excitation at 266 nm to elucidate the interaction between the graphene layer and the substrate. The samples were grown on the Si-face of vicinal 6H-SiC (0001) substrates by sublimation of Si from SiC. The G band of the epitaxial graphene layer was clearly observed without any data manipulation. Increasing the number of graphene layers, the peak frequency of the G-band decreases linearly, while the peak width and the intensity increase. The G-band frequency of the graphene layers on SiC is higher than those of exfoliated graphene, which has been ascribed to compression from the substrate.
Optical Transmission of Epitaxial Graphene Layers on SiC in the Visible Spectral Range
Authors: Drabińska Aneta , Borysiuk Jolanta , Strupiński Wlodek , Baranowski Jacek M.
Published: May 2010

Optical transmission and transmission electron microscopy studies of epitaxial graphene structures grown on the carbon terminated face of 4H-SiC(000-1) on-axis substrates are presented. Several samples obtained using different growth conditions were studied. Optical microscope showed regions of micrometer size with different layer number. The exact number of layers was obtained from transmission electron microscope studies. Optical transmission spectra showed no wavelength dependence and allowed us to obtain the average number of graphene layers.
Improvements of the Continuous Feed-Physical Vapor Transport Technique (CF-PVT) for the Seeded Growth of 3C-SiC Crystals
Authors: Sun Guoli L. , Galben-Sandulache Irina G. , Ouisse Thierry , Dedulle Jean Marc , Pons Michel , Madar Roland , Chaussende Didier
Published: May 2010

The Continuous Feed-Physical Vapor Transport Technique (CF-PVT) was optimized by considering the heating, thermal insulation and the geometry of growth cavity. The effects of seeds on the surface morphology of the grown layer have been discussed. We successfully grew 3C-SiC bulk with a diameter of 7.0 mm and 3.3 mm in height with a high growth rate of 0.8 mm/h by the CF-PVT technique.
Transport Properties of Single-Layer Epitaxial Graphene on 6H-SiC (0001)
Authors: Jobst Johannes , Waldmann Daniel , Emtsev Konstantin V. , Seyller Thomas , Weber Heiko B.
Published: May 2010

We report on electrical measurements on epitaxial graphene on 6H-SiC (0001). The
graphene layers were fabricated by thermal decomposition in Argon atmosphere. Large van der
Pauw structures and Hall bars were patterned by e-beam lithography, the Hall bars ranged from
rather large structures down to sub-micrometer sized Hall bars entirely placed on atomically
°at substrate terraces. We present Hall measurements in a broad temperature range, Shubnikov
de Haas oscillations and quantum Hall steps. The data lead to the conclusion that electrons
in epitaxial graphene have the same quasi-relativistic properties previously shown in exfoliated
graphene. A remarkable di®erence, however, is the stronger coupling to substrate phonons and
the relatively high charging being an intrinsic property of this epitaxial system.
Correlation between Schottky Contact Characteristics and Regions with a Low Barrier Height Revealed by the Electrochemical Deposition on 4H-SiC
Authors: Kato Masashi , Ono H. , Ichimura Masaya
Published: May 2010

We performed electrochemical deposition of ZnO on the surfaces of 4H-SiC epilayers and characterized Ni Schottky diodes fabricated on the same epilayers. We found correlation between positions where ZnO was deposited and positions where Schottky barrier height of Ni contacts is lower than of the rest of the contacts. Parts of the surface where ZnO was deposited were observed by AFM after removal of the ZnO layer, and we discussed the origin of the low Schottky barrier height from the AFM images.
On the Viability of Au/3C-SiC Schottky Barrier Diodes
Authors: Eriksson Jens , Weng Ming Hung , Roccaforte Fabrizio , Giannazzo Filippo , Di Franco Salvatore , Leone Stefano , Raineri Vito
Published: May 2010

The electrical characteristics of Au/3C-SiC Schottky diodes were studied and related to crystal defects. A structural analysis performed by transmission electron microscopy (TEM), combined with a current mapping of the surface by conductive atomic force microscopy (C-AFM), indicated that stacking faults (SFs) are the conductive defects having the biggest influence on the electrical properties of the Schottky barrier on 3C-SiC. Further, C-AFM current mapping of the semiconductor surface also showed that an ultraviolet (UV) irradiation process enables the electrical passivation of the SFs, due to their preferential oxidation. From current-voltage (I-V) measurements in diodes of different area (different amount of defects) it was observed that, for the non-irradiated surface, no significant dependence of the Schottky barrier height (ΦB) on the contact area could be observed. On contrast, after the UV-irradiation, ΦB gradually increases with decreasing contact area, ultimately leading to a nearly ideal value of the barrier height for the smallest diodes. The results indicate that even after the passivation of SFs there are still some electrically active defects contributing to deleterious conduction, responsible for a worsening of the electrical properties of the diodes.
Significant Improvement in Reliability of Thermal Oxide on 4H-SiC (0001) Face Using Ammonia Post-Oxidation Annealing
Authors: Senzaki Junji , Suzuki Takuma , Shimozato Atsushi , Fukuda Kenji , Arai Kazuo , Okumura Hajime
Published: May 2010

The effect of ammonia (NH3) post-oxidation annealing (POA) technique on the reliability of thermal oxides grown on a n-type 4H-SiC (0001) face by dry oxidation has been investigated. Comparing other POA techniques using hydrogen and nitrous oxide gases, it was indicated that the NH3 POA after dry oxidation remarkably improves the insulating properties of thermal oxides. The mode value of field-to-breakdown for thermal oxides prepared by NH3 POA was 12.1 MV/cm. The charge-to-breakdown (QBD) in the NH3 POA sample was the highest in all samples, and the QBD value at 63% cumulative failure rate was 19.1 C/cm2. In addition, the NH3 POA maintained excellent electron trapping characteristics of thermal oxides against the electron injection.
Consequences of NO Thermal Treatments in the Properties of Dielectric Films / SiC Structures
Authors: Stedile Fernanda Chiarello , Corrêa Silma Alberton , Radtke Cláudio , Miotti Leonardo , Baumvol Israel J.R. , Soares Gabriel V. , Kong Fred , Han Ji Sheng , Hold Leonie , Dimitrijev Sima
Published: May 2010

The consequences of thermal treatments in nitric oxide atmospheres on the characteristics of dielectric films / SiC structures was investigated by high-frequency capacitance-voltage measurements, X-ray photoelectron spectroscopy, and X-ray reflectometry techniques. It was observed that nitrogen incorporation in dielectric films / SiC structures leads to the formation of a thinner interfacial layer that contains carbon. This fact was related to the improvement of electrical properties of those structures.
The Limits of Post Oxidation Annealing in NO
Authors: Rozen John , Zhu Xing Guang , Ahyi Ayayi Claude , Williams John R. , Feldman Leonard C.
Published: May 2010

We report on the benefits and the shortcomings of the NO annealing process following observations made on capacitors and transistors with various nitrogen densities at the SiO2/SiC interface. While NO annealing leads to a progressively lower interface state density and higher inversion mobility, consistent with Coulomb-limited transport, MOSFET properties are still limited by the relatively poor interface quality. Moreover, NO induces a large amount of hole traps in the oxide. We establish that these properties are not related to the oxidation rate and we discuss them in terms of the nitrogen content.
Electrical Activation of B+-Ions Implanted into 4H-SiC
Authors: Tsirimpis Thanos , Krieger M. , Weber Heiko B. , Pensl Gerhard
Published: May 2010

Boron (B) ions were implanted into 4H-SiC. In order to avoid the out-diffusion of B ions during the subsequent annealing process, two processing techniques were applied. Either a box-shaped B-profile was implanted, which was followed by a two-step annealing (900°C for 120 min + annealing temperature TA for 30 min), or a box-shaped B-profile was implanted together with two carbon (C) Gaussian profiles located on both edges of the B box-profile followed by a one-step annealing (TA for 30 min). The annealing temperature TA ranged from 1500°C to 1750°C. The electrically activated B acceptor concentration was measured by temperature-dependent Hall effect and the energy for the formation of the B acceptor was determined assuming a first order process.
The Effect of Phenol Resin Types and Mixing Ratios on the Synthesis of High-Purity β-SiC Powder by the Sol-Gel Method
Authors: Byeun Yun Ki , Telle Rainer , Han Kyong Sop , Park Sang Whan
Published: May 2010

In this study, we carried out a sol-gel processing to synthesize two types of phenol resin and TEOS sol with fluoric acid as the catalysts, and fabricated the β-SiC powder by carbothermal reduction of the obtained precursor gels. The gels were observed to be cross linked between TEOS and phenol resins by FT-IR and TG-DTA. After pyrolyzed at 1000oC in Ar to obtain the precursor, to confirm the phase transition and morphologies by XRD, and SEM were measured. Finally, the light green colored SiC powder was obtained after carbothermal reduction process up to 1800oC. The residual condensed SiO(v) phase and free carbons as a role of impurities for final products using the solid type phenol resin was observed in the surface of powder by BSE.
Influence of Heating and Cooling Rates of Post-Implantation Annealing Process on Al-Implanted 4H-SiC Epitaxial Samples
Authors: Ottaviani Laurent , Biondo Stéphane , Morata Stéphane , Palais Olivier , Sauvage Thierry , Torregrosa Frank
Published: May 2010

We report on topographical, structural and electrical measurements of aluminum-implanted and annealed 4H-SiC epitaxial samples. The influence of heating-up and cooling-down temperature rates on the SiC surface roughness, the crystal volume reordering and the dopant electrical activation was particularly studied. A higher heating-rate was found to preserve the rms roughness for annealing temperatures lower than 1700°C, and to improve the sheet resistance whatever the annealing temperature due to a better dopant activation (except for 1600°C process, which induced a dark zone in the sample volume). A complete activation was calculated for an annealing at 1700°C during 30 minutes, with a ramp-up at 20°C/s. Rising the cooling-down rate appeared to increase the sheet resistance, probably due to a higher concentration of point defects in the implanted layer.
Effects of Helium Implantation on the Mechanical Properties of 4H-SiC
Authors: Barbot Jean François , Beaufort Marie France , Audurier Valerie
Published: May 2010

The evolution of mechanical properties of helium-implanted 4H-SiC at room temperature has been mainly studied by nanoindentation tests. The curves of hardness and elastic modulus present a maximum at low levels of damage while a degradation of the mechanical properties is observed for high levels of damage. However, when the concentration of implanted ions exceeds 0.5 %, complex defects (helium-vacancy defects) become predominant which results in the increase of both the hardness and the modulus. Under high fluence of helium implantation tiny bubbles form and the amorphous transition is observed above a critical level of damage.
SiC-Die-Attachment for High Temperature Applications
Authors: Heuck Nicolas , Palm G. , Sauerberg T. , Stranz A. , Waag A. , Bakin Andrey
Published: May 2010

In this paper a die-attachment technology for high temperature applications based on the Low Temperature Joining Technique (LTJT) is presented. The present challenge is to fit the thermal expansion as well as the mechanical properties of the die-attach layer to the characteristics of chip and substrate. While the classic LTJT is based on sintering a sub-micron silver paste at temperatures between 150°C and 300°C to bond an electronic device to a substrate, the modified procedure employs a powder mixture consisting of silver powder and special filling powder material. Type and amount of the filling material is dependent on the application and the used substrates. Considering a low thermal expansion and high electrical as well as thermal conductivity we chose SiC, TiC, and BN as filling materials in this work.
Fabrication and Use of Atomically Smooth Steps on 6H-SiC for Calibration of z-Displacements in Scanning Probe Microscopy
Authors: Lebedev Sergey P. , Dement’ev P.A. , Lebedev Alexander A. , Petrov V.N. , Titkov Alexander N.
Published: May 2010

Atomic-force microscopy and scanning tunnel electron microscopy have been used to study the surface of single-crystal 6H-SiC (0001) substrates subjected to step-by-step high-temperature annealing in vacuum. An annealing procedure leading to surface structuring by atomically smooth steps with heights of 0.75 and 1.5 nm has been found. It is suggested to use the structured surfaces as test objects for z-calibration of scanning probe microscopes.
Low-Pressure Fast Growth and Characterization of 4H-SiC Epilayers
Authors: Tsuchida Hidekazu , Ito Masahiko , Kamata Isaho , Nagano Masahiro , Miyazawa Tetsuya , Hoshino Norihiro
Published: May 2010

Fast and thick 4H-SiC epitaxial growth is demonstrated in a vertical-type reactor under a low system pressure within the range 13-40 mbar. A very fast growth rate of up to 250 m/h is obtained. The material quality of the epilayers grown in the reactor is evaluated by low-temperature photoluminescence, deep level transient spectroscopy, microwave photoconductive decay, synchrotron topography and room temperature PL imaging. The carrier lifetime of thick epilayers with or without the application of the C+-implantation/annealing method and extended defects in the epilayers grown on 8º and 4º off substrates are discussed.
4H-SiC Surface Morphology Etched Using ClF3 Gas
Authors: Habuka Hitoshi , Tanaka Keiko , Katsumi Yusuke , Takechi Naoto , Fukae Katsuya , Kato Tomohisa
Published: May 2010

The morphology of a single-crystalline 4H-silicon carbide (SiC) substrate surface after etching by chlorine trifluoride (ClF3) gas was studied over the wide temperature range of 673-1573 K at atmospheric pressure in a horizontal cold wall reactor. The Si-face and C-face showed pitted surfaces at low temperatures; the pits tended to become small and shallow with the increasing substrate temperature. The etching for 0.5 min at the substrate temperature of 1573K and at the ClF3 gas concentration of 1% could maintain a specular surface on both the Si-face and C-face 4H-SiC, the root-mean-square roughness of which was comparable to that of the substrate before etching.
Influence of Negative Charging on High Rate SiC Etching for GaN HEMT MMICs
Authors: Okamoto Naoya , Imanishi Kenji , Kikkawa Toshihide , Nara Naoki
Published: May 2010

We discuss the influence of negative charging on high-rate ICP etching of SiC via-holes for GaN HEMT MMICs. There is large differential etching behavior such as etch rate, etching profile, and RIE lag between S.I.- and n-SiC substrates because of the difference in wafer heating and negative charging of the sidewall during etching between both substrates. We analyze the difference in negative charging between both substrates by simulating the etching profile.
Influence of the UV Light Intensity on the Photoelectrochemical Planarization Technique for Gallium Nitride
Authors: Sadakuni Shun , Murata Junji , Yagi Keita , Sano Yasuhisa , Arima Kenta , Hattori Azusa N. , Okamoto Takeshi , Yamauchi Kazuto
Published: May 2010

We have developed a novel planarization technique for gallium nitride (GaN) substrates using a photo-electro chemical process and solid acid catalyst. In this method, a GaN surface is oxidized by ultraviolet (UV) light irradiation, and the oxide layer is chemically removed by a solid acid catalyst. In the current work, the dependence of the removal rate on the UV light intensity was investigated.
Impact of Oxidation Conditions and Surface Defects on the Reliability of Large-Area Gate Oxide on the C-Face of 4H-SiC
Authors: Hatakeyama Tetsuo , Suzuki Takuma , Ichinoseki Kyoichi , Matsuhata Hirofumi , Fukuda Kenji , Shinohe Takashi , Arai Kazuo
Published: May 2010

This paper discusses the issues regarding reliability of large-area (up to 25mm2) gate oxide on the C-face of 4H-SiC. We have shown that the TDDB characteristics of large-area gate oxide improved by separating gate oxidation processes into oxide growth by dry-oxidation and successive interface control by anneal in N2O ambient or that by wet-oxidation followed by anneal in H2 ambient. In particular, dry-oxidation followed by anneal in N2O ambient for interface treatment (dry+N2O process) is effective for the suppression of the random failure in TDDB characteristics. The estimated lifetime of gate oxide of less than 9mm2 by the dry+N2O process is six-digits larger than 30 years. In the case of the TDDB characteristics of 25mm2 gate oxide grown by the dry+N2O process, the initial and random failure in TDDB characteristics is dominant. However, even in this case, we have confirmed that the evaluated lifetime of 25mm2 gate oxide is more than 30 years. In order to clarify the mechanism of the degradation of the TDDB characteristics of large-area gate oxide, we examined the effect of the surface defect on the TDDB characteristics by observing the surface of each broken MOS capacitor after the TDDB test. We have found following results. (1) The initial failures in TDDB characteristics are mainly due to surface defects such as “down fall”, “comet”, and “triangular defect”. (2) The footprints of random failure do not correspond to the positions of smaller surface defects such as “bump”. Finally, we have found that the quality of the epitaxial layer affects random failure rate in the TDDB characteristics of large area gate oxide; the random failure in the TDDB characteristics of 25mm2 gate oxide on epitaxial layer grown by a certain epitaxial vendor is almost suppressed. However, the cause of the difference in TDDB characteristics is not identified.
In Situ Spectroscopic Ellipsometry Study of SiC Oxidation at Low Oxygen-Partial-Pressures
Authors: Kouda Keiko , Hijikata Yasuto , Yaguchi Hiroyuki , Yoshida Sadafumi
Published: May 2010

We have investigated the oxidation process of SiC (000-1) C-face at low oxygen partial pressures using an in-situ spectroscopic ellipsometry. The oxide growth rate decreased steeply at the early stage of oxidation and then slowly decreased with increasing oxide thickness. The initial oxide growth rate was almost proportional to the oxygen　partial　pressure for both the polar directions. This result suggests that the initial interfacial reaction rate is constant regardless of the concentration of oxidants reaching the interface.
Effects of Post-Deposition Annealing on CeO2 Gate Prepared by Metal-Organic Decomposition (MOD) Method on 4H-SiC
Authors: Lim Way Foong , Cheong Kuan Yew , Lockman Zainovia , Jasni Farah Ainis , Quah Hock Jin
Published: May 2010

Electrical properties of MOD-derived CeO2 film deposited on n-type 4H-SiC have been investigated. Post-deposition annealing of the oxide was performed in argon ambient for 15 minutes at 600, 800, and 1000°C in order to optimize the oxide properties. Spin-on coating was then used to deposit the annealed oxide onto the substrate. Results indicated that the effective oxide charge and slow trap density increased as temperature increased. Negative effective oxide charges were revealed in all annealed oxides. The lowest leakage current and interface trap density was obtained in the sample annealed in the highest temperature.
Nanostructuring Techniques for 3C-SiC(100) NEMS Structures
Authors: Hofer Manuel , Stauden Thomas , Rangelow Ivo W. , Pezoldt Joerg
Published: May 2010

In this work nanostructures based on a 30 nm thick 3C-SiC (100) heteroepitaxially grown on Si(100) are demonstrated. They consist of free standing nanoresonators with dimensions below 50 nm. The free standing nanostructures and resonators were defined by electron beam lithography using hydrogen silsesquioxane (HSQ) as a negative tone e-beam resist acting as a selective etching mask during the anisotropic and isotropic dry etching. The influences of the proximity effect, the crystallographic orientation, the angle of exposing on the feature size are highlighted.
SiC on SOI Resonators: A Route for Electrically Driven MEMS in Harsh Environment
Authors: Placidi Marcel , Pérez-Tomás Amador , Godignon Philippe , Mestres Narcis , Abadal Gabriel , Chassagne Thierry , Zielinski Marcin
Published: May 2010

In this study, a SiC on insulator growth is optimized, in order to electrically isolate the active structural layer towards the substrate. High quality single crystalline SiC was grown on SOI and SIS substrates. Smooth surface, low stress and bowing, confirmed by microscopy techniques, SEM, AFM, X-Ray diffraction and Raman spectroscopy, have been obtained. SiC electrostatic resonators on insulated substrates were also fabricated, and electrically driven. These results demonstrate that this material is very promising for MEMS application requiring isolation from the substrate and operation in harsh ambient.
Ultra-Precision Machining of Stainless Steel and Nickel with Single Crystal 4H and 6H Boule SiC
Authors: Choyke Wolfgang J. , D'Urso B. , Yan Fei , Devaty Robert P.
Published: May 2010

Ultra-precision machining is dominated by single-crystal diamond cutting tools, and is typically applied to a narrow range of materials, particularly aluminum and copper. Single-crystal SiC can be comparable to some diamonds in hardness and thermal conductivity, while potentially having superior chemical and thermal stability, yet it has not been explored as a cutting tool for ultra-precision machining. We made two cutting tools with single-crystal SiC, one with sharp corners and one with a large circular radius, and used them to cut flat surfaces on two materials, 316 stainless steel and nickel. These materials generally cause unacceptably rapid diamond tool wear. We report the average roughness of the resulting surfaces cut with single-crystal 4H and 6H SiC tools.
Thinning of SiC Wafer by Plasma Chemical Vaporization Machining
Authors: Sano Yasuhisa , Kato Takehiro , Hori Tsutomu , Yamamura Kazuya , Mimura Hidekazu , Katsuyama Yoshiaki , Yamauchi Kazuto
Published: May 2010

In order to reduce the on-resistance in vertical power transistors, backside thinning is required after device processing. However, it is difficult to thin an SiC wafer with a high yield rate by conventional mechanical machining because its high hardness and brittleness cause cracking and chipping during thinning. In this study, a small rectangular SiC sample was thinned by plasma chemical vaporization machining (PCVM), which is plasma etching using atmospheric-pressure plasma. As a result, the sample was successfully thinned to 40 m without any cracking or chipping. Furthermore, the surface roughness was improved after thinning, and the edge of the wafer became rounded automatically. Therefore, PCVM can be used as an effective method for thinning SiC wafers.
Electric Discharge Machining for Silicon Carbide in Gases of Ar, Ar-CH4 and Ar-CF4 Mixtures
Authors: Sugimoto Tatsunori , Noro Toshiya , Yamaguchi Satarou , Majima Hideyoshi , Kato Tomohisa
Published: May 2010

We report on the discharge gas of the electric discharge machining (EDM) for silicon carbide (SiC) single crystal. We investigated the cutting speed and the kerf loss of EDM for SiC by using three kinds discharge gases: Ar, Ar+CH4(10%) and Ar+CF4(10%). The maximum cutting speed of EDM in Ar, Ar+CH4(10%) and Ar+CF4(10%) was 0.02mm/min, 0.04 mm/min and 0.06 mm/min, respectively. The kerf loss of EDM in Ar, Ar+CH4(10%) and Ar+CF4(10%) was 490m, 430m and 470m, respectively. It is shown that cutting with a smooth edge and low kerf loss is faster by mixing CH4 or CF4 in Ar.
Effect of In Situ Doped Nitrogen Concentrations on the Characteristics of Poly 3C-SiC Micro Resonators
Authors: Chung Gwiy Sang , Yoon Kyu Hyung
Published: May 2010

This paper describes the characteristics of polycrystalline 3C-SiC micro resonators with 3 ×1017 - 1×1019 cm-3 in-situ N-doping concentrations. In this work, the 1.2 μm thick cantilevers and the 0.4 μm thick doubly-clamped beam micro resonators with various lengths were implemented using in-situ doping poly 3C-SiC thin films. The characteristics of the poly 3C-SiC micro resonators were evaluated using quartz actuator and optical read-out vibrometer under vacuum conditions at room temperature. The resonant frequencies of the SiC micro resonators decreased with doping concentrations owing to the reduction of the Young's modulus of the poly 3C-SiC thin films. It was confirmed that the resonant frequencies of the poly 3C-SiC micro- resonators are controllable by adjusting the doping concentrations.
Active Devices for Power Electronics: SiC vs III-N Compounds – The Case of Schottky Rectifiers
Authors: Brylinski Christian , Ménard Olivier , Thierry-Jebali Nicolas , Cayrel Frédéric , Alquier Daniel
Published: May 2010

The main rectifier device structures for power electronics based on SiC and on GaN are compared and the main issues for each structure are evaluated in terms of performance and manufacturability. The driving volume markets for power electronics devices correspond to the systems working on 127, 240 and 400 V energy supply networks, setting the device voltage handling to 300, 600, and 1200V respectively. We have limited the scope hereafter to the 600 V typical target, for which SiC Schottky rectifiers are now commercially available from at least 3 sources. The key physical properties for any semiconductor material used as the active layer of a unipolar device for power electronics are the breakdown field and carriers mobility. The bulk values are very similar for SiC and GaN. Two main other key issues are related to quality of the ohmic and Schottky contacts. For the ohmic contacts, adequate solutions have been found for both SiC and GaN. Surprisingly, on hetero-epitaxial GaN layers on sapphire despite of the very high crystal defects density ( ≥ 109cm-2 ), the ideality factor of the best Schottky contacts seems very promising. On the other hand, improving this ideality factor and the reverse leakage current for Schottky contacts on GaN layers grown on silicon substrate remains a fierce challenge. For the SiC Schottky rectifiers, cost and availability of the SiC substrates appear as the main residual limiting factors today. For GaN based rectifiers, although engineering device prototypes have already been published [1], there are both basic issues to be validated regarding reverse leakage current and reliability, and also difficult manufacturing issues to be solved in relation with device reliability, directly resulting from the nature of the possible substrates: mainly sapphire and silicon.
A New Generation of SiC Schottky Diodes with Improved Thermal Management and Reduced Capacitive Losses
Authors: Rupp Roland , Björk Fanny , Deboy Gerald , Holz Matthias , Treu Michael , Hilsenbeck Jochen , Otremba Ralf , Zeichen Hannes
Published: May 2010

With the help of an improved die attach the Rth,jc of SiC Schottky diodes can be reduced by 40-50% at a given chip size. This enables a significant higher power density for these SiC diode chips, resulting in a chip shrink of ~ 35% for a given nominal current. This has a significant impact not only on the cost position of the device but also on the switching performance of the diodes, as their capacitive charge directly scales with the chip area. Of course these advantages are accompanied by a small penalty in static losses as the Vf of the diodes at nominal current also slightly increases by the chip shrink. However, the reduction of switching losses dominates upon the marginally increased static losses besides full load operation conditions (which are pretty exceptional in today’s SiC Schottky diode applications) combined with frequencies below 130 kHz. This allows a better competitive positioning against fast Si-based diodes and improved system efficiency at the same time.
Germanium – Silicon Carbide Heterojunction Diodes – A Study in Device Characteristics with Increasing Layer Thickness and Deposition Temperature
Authors: Gammon Peter Michael , Pérez-Tomás Amador , Jennings Michael R. , Roberts G.J. , Shah V.A. , Covington James A. , Mawby Philip  Andrew
Published: May 2010

SiC schottky diodes take advantage of the material's superior reverse breakdown voltage when compared to Silicon (Si) [1]. However, when considered for MOSFET applications, the high concentration of interface traps at the SiC/SiO2 interface reduce the material's already low channel mobility [2]. Therefore, a Ge/SiC heterojunction solution becomes an attractive prospect, whereby the Ge forms the control region after being epitaxially grown on the SiC. With a well established Ge-High K dielectric technology [3], a carbon-free oxide would exist, leaving a channel-region with a mobility approximately four times that of SiC.
High-Performance Multi-Wafer SiC Epitaxy – First Results of Using a 10x100mm Reactor
Authors: Hecht Christian , Stein René A. , Thomas Bernd , Wehrhahn-Kilian Larissa , Rosberg Jonas , Kitahata Hiroya , Wischmeyer Frank
Published: May 2010

In this paper, we present first results of epitaxial layer deposition using a novel warm-wall CVD multi-wafer system AIX 2800G4 WW from AIXTRON with a capability of processing 10x100mm wafers per run. Intra-wafer and wafer-to-wafer homogeneities of doping and thickness for full-loaded 10x100mm runs will be shown and compared to results of the 6x100mm setup of our hot-wall reactor VP2000HW by AIXTRON used for device production since 2001.
Correlation between Carrier Recombination Lifetime and Forward Voltage Drop in 4H-SiC PiN Diodes
Authors: Chung Gil Yong , Loboda Mark J. , Sundaresan Siddarth G. , Singh Ranbir
Published: May 2010

Correlation between carrier lifetime and forward voltage drop in 4H-SiC PiN diodes has been investigated. PiN diodes from the drift layer of 20 m shows breakdown voltage of 3.3 kV and forward voltage drop as low as 3.13 V at 100A/cm2. Variation of calculated forward voltage drop ( ) from measured carrier lifetimes is very comparable to measured of fully processed PiN diodes. Measured carrier lifetime and of PiN diodes also show good spatial correlation. Wafer level lifetime mapping can be employed to assess and predict of PiN diodes.
Preliminary Investigation of Laser Induced Photoconductivity in 4H-SiC PiN Diodes and HPSI Substrate
Authors: Vergne Bertrand , Scharnholz Sigo , Konrath Jens Peter , Couderc Vincent , Lévêque Philippe , Spahn Emil
Published: May 2010

We present photoconductivity experiments on a 4H-SiC diode and on 4H-SiC high purity semi-insulating (HPSI) substrate. These devices have been tested over a wide optical wavelength range: 355 nm to 820 nm. The penetration depth of optical wavelength has been estimated from spectrophotometer measurements. Photoconductivity regime has been studied at low electrical field for both devices and photoconductivity efficiency has been compared to Si switches.
4H-SiC PiN Diodes Fabricated Using Low-Temperature Halo-Carbon Epitaxial Growth Method
Authors: Krishnan Bharat , Merrett Joseph Neil , Melnychuk Galyna , Koshka Yaroslav
Published: May 2010

In this work, the benefits of the low-temperature halo-carbon epitaxial growth at 1300oC to form anodes of 4H-SiC PiN diodes were investigated. Regular-temperature epitaxial growth was used to form an 8.6 μm-thick n-type drift region with net donor concentration of 6.45x1015 cm-3. Trimethylaluminum doping, in situ during blanket low-temperature halo-carbon epitaxial growth, was used to form heavily doped p-type layers. Forward I-V characteristics measured from diodes having different anode areas indicated that the new epitaxial growth technique provides anodes with low values of the series resistance, even without contact annealing. At room temperature, a 100 μm-diameter diode had a forward voltage of 3.75 V at 1000A/cm² before annealing and 3.23 V after annealing for 2 min at 750°C. The reverse breakdown voltage was more than 680 V (on average) in the devices without edge termination or surface passivation.
Performance of 15 mm2 1200 V Normally-Off SiC VJFETs with 120 A Saturation Current
Authors: Ritenour Andrew , Sheridan David C. , Bondarenko Volodymyr , Casady Jeff B.
Published: May 2010

Recently 63 m, 100 m, and 125 m 1200 V normally-off SiC VJFETs have become commercially available and 99% efficiency has been demonstrated in a single-phase solar inverter using these components [1]. They exhibit low specific on-resistance (3 m∙cm2), high saturation current density (1000 A∙cm-2), and low switching losses. For some applications, including 30 to 100 kW inverter modules and those requiring high surge current capability, larger die size is required. This paper reports the static and dynamic performance of 15 mm2 1200 V normally-off VJFETs with 25 m on-resistance and 120 A saturation current at 25 °C.