bluuebunny/crossref_metadata_2025 huggingface dataset:
(Invited) Strained Silicon Heterojunction Bipolar Transistors
Authors: O'Neill Anthony
Published: March 2013

Strained Si HBTs have been demonstrated with a maximum current gain of 3700 using a relaxed Si0.85Ge0.15 virtual substrate, Si0.7Ge0.3 base and strained Si emitter. This represents 10x and 27x larger gain compared with pseudomorphic SiGe HBTs and Si control BJTs that were manufactured in parallel and had current gains of 334 and 135, respectively. The key idea in SiGe Heterojunction Bipolar Transistors (HBTs) is the incorporation of Ge in the base. This reduces the bandgap Eg, and increases the current gain. However, the amount of Ge that can be incorporated in the base is limited by material constraints such as critical thickness. Epitaxial growth of SiGe layers beyond a certain thickness can lead to strain relaxation by the generation of defects. Therefore, it is interesting to increase the Ge concentration while keeping the strain at a tolerable level.
SiGe Doped-Channel FET Formed by Sputter Epitaxy Method
Authors: Yoshikawa Mitsuhiro , Otsuka Hidemoto , Kasamatsu Akifumi , Hirose Nobmitsu , Mimura Takashi , Matsui Toshiaki , Suda Yoshiyuki
Published: March 2013

We report on a Si/Si0.7Ge0.3 p-type doped channel field effect transistor (p-DCFET) with a Si0.7Ge0.3 compressively strained channel fabricated by our previously proposed sputter epitaxy method. We have found that a postanneal is effective to increase the strain of the Si0.7Ge0.3 channel sandwiched by i-Si layers and that a 575 ˚C anneal for 10 min is most effective to obtain the largest strain. By comparison to the results of model simulation, the experimetally obtained I-V curves indicate that the hole mobility is enhanced by strain, the value of which is comparable to the theoretical prediction.
(Invited) Modeling of Field-Effect-Transistors with Strained and Alternative Channel Materials
Authors: Conzatti Francesco , Esseni David , Palestri Pierpaolo , Selmi Luca
Published: March 2013

In this paper we present a review of the modeling of strain effects in nano-scale transistors and we describe different approaches that can be followed in order to include the effect of strain in both conventional and innovative devices. We first describe the mathematical framework for the modeling of strain and then we present two important case-studies where we have successfully emploied advanced modeling techniques in order to investigate the effect of strain in germanium-based MOSFETs and in InAs Tunnel-FETs.
(Invited) Reliability of SiGe Channel MOS
Authors: Franco Jacopo , Kaczer Ben , Mitard Jerome , Toledano-Luque Maria , Eneman Geert , Roussel Philippe J. , Cho Moonju , Kauerauf Thomas , Witters Liesbeth , Hikavyy Andriy , Hellings Geert , Ragnarsson Lars-Åke , Horiguchi Naoto , Grasser Tibor , Heyns Marc M. , Groeseneken Guido
Published: March 2013

We report extensive experimental results on the Negative Bias Temperature Instability (NBTI) of SiGe channel pMOSFETs as a function of the main gate stack parameters. These results clearly show that this high-mobility channel technology offers a significantly improved NBTI robustness compared to Si-channel devices, which can virtually eliminate this critical reliability issue for sub-1 nm EOT devices. The intrinsically superior NBTI robustness is understood in terms of a favorable energy decoupling between the SiGe channel and the gate dielectric defects. Thanks to this effect, both a significantly reduced time-dependent variability in nanoscaled SiGe devices and a reduced low-frequency noise are also observed. Other reliability mechanisms, such as Channel Hot Carriers and Time-Dependent Dielectric Breakdown are shown not to be showstoppers. All these aspects underscore the SiGe channel technology as a very promising alternative to Si pMOSFETs for future CMOS technology nodes.
Evaluation Of Ni(Si1-xGex) and Pt(Si1-xGex) Contact Resistance for FD-SOI PMOS Metallic Source and Drain
Authors: Bourjot Emilie , Nemouchi Fabrice , Carron Véronique , Morand Yves , Bernasconi Sophie , Vinet Maud , Damlencourt Jean-François , Allain Fabienne , Cueto Olga , Lafond Dominique
Published: March 2013

To improve 20nm FD-SOI pMOS transistor performances, salicide process must be optimized on SiGe source&drain. In this paper, we propose an investigation on Ni and Pt/Si1-xGex (x=0.15, 0.3) systems. In a first part, process window is studied to determine thermal budget domain where the less resistive phase is stable morphologically and thermically. Solid state reactions in terms of phase sequence, thermal stability and morphology have been examined. At high temperature, two kinds of degradations have been observed. In Ni case, Ge out diffusion leads to the film agglomeration. In Pt case, grain coalescence degrades germanosilicide film. In a second part, contact resistivity has been extracted on lateral germanosilicides thanks to new designed structures. After a validation on Pt/Si system, RC extraction has been carried out on Si1-xGex substrate up to 30% of Ge. RC seems to be better with Pt compared to Ni with the same conditions of process optimizations.
(Invited) Understanding Diffusion, Activation, and Related Phenomena in SiGe Alloys: Models and Challenges
Authors: Kennel Harold W
Published: March 2013

An effective diffusivity modeling approach is described that proposes scaling relations for point defect-mediated dopant diffusion to reflect how SiGe with a given Ge concentration differs from Si. Literature results from density functional theory calculations, statistical arguments, and kinetic lattice Monte Carlo simulations can be used to determine the expected scaling relations, which can be verified and adjusted later by comparisons to experimental data. Considerations for targeting of anneals for SiGe and Ge are given. Approaches to optimize annealing using millisecond anneals and nonequilibrium effects are discussed and expectations of behavior in SiGe are outlined. Additional uncertainties related to these SiGe-related behaviors in nanoscale materials are discussed.
(Invited) Strain Control of Si and Si1-x-yGexCy Layers in Si/Si1-x-yGexCy/Si Heterostructures by Low-Pressure Chemical Vapor Deposition
Authors: Murota Junichi , Kikuchi Tomohira , Hasegawa Jiro , Sakuraba Masao
Published: March 2013

The epitaxial growth of strained Si1-x-yGexCy layer with high Ge fraction and high C fraction on unstrained and tensile-strained Si(100) is performed at 500 or 550oC by ultraclean low-pressure chemical vapor deposition. Evaluating the Si1-x-yGexCy layer by high resolution X-ray photoelectron spectroscopy (XPS), X-ray diffraction and Raman scattering spectroscopy, it is proposed that XPS C1s peak at around 283.3 eV is attributed to substititional C in Si1-x-yGexCy layer. The relationship between Raman shift and vertical lattice constant for the strained layer is explained qualitatively and it is confirmed that growth characteristics as well as electrical activity of impurity in the strained layer are influenced by the substrate surface strain before the layer growth. By stripe-shape patterning unstrained Si cap layer/strained Si1-x-yGexCy layer/Si(100) heterostructure, the compressive- and tensile-strained Si layer formation is performed.
Phosphorus Profile Control in Ge by Si Delta Layers
Authors: Yamamoto Yuji , Zaumseil Peter , Kurps Rainer , Murota Junichi , Tillack Bernd
Published: March 2013

The impact of Si spike layer on phosphorus diffusion in germanium is investigated. Ge cap/in-situ P-doped Ge/Ge buffer is deposited and post-annealed using PRCVD tool. In the case of samples without Si spikes, P diffusion/segregation and desorption from the Ge surface happened during Ge cap layer deposition at 550C resulting in dopant dose reduction and profile broadening. By interposing P-doped Ge by Si spikes, P diffusion is suppressed. The diffused P is piled-up at the position of the Si spikes. The P diffusion suppression effect by the Si spike is observed after postannealing even at 650C. XRD-RSM shows that the Si spike is pseudomorphic to Ge lattice. After postannealing, Si diffusion is observed but no Ge crystal degradation was evident. Enhanced Si diffusion is observed by presence of P. Based on these results, the P diffusion suppression seems to be caused by the replacement of substitutional Si by diffused P.
Dopant Enhanced Diffusion for High n-type Doped Ge
Authors: Cai Yan , Camacho-Aguilera Rodolfo Ernesto , Bessette Jonathan T. , Kimerling Lionel C. , Michel Jurgen
Published: March 2013

We study the phosphorous (P) diffusion in Ge grown on Si substrate with different background doping and we find that the diffusion coefficient is extrinsic and is enhanced by over 500 times in Ge doped at 1x1019 cm-3 compared to diffusivity in intrinsic Ge. We study the loss mechanisms in Ge-on-Si. We show that the doping level is a result of the balance between in-diffusion and dopant loss. The high diffusivity in doped Ge leads to a uniform distribution of P in Ge with the concentration above 4.5x1019 cm-3.
Study of Ge Threading Dislocations Post Growth Treatments
Authors: Silber Amir , Ginsburg Eyal
Published: March 2013

Threading dislocation density (TDD) of epitaxial Ge layer on Si was explored by defect etching. Ge samples were etched by chromium free Dash etching solution, and the influence of post process annealing was studied. The first part of this work deals with the comparison of two characterization methods for TDD: AFM of etch pits and TEM. The etch rate and morphology of Dash solution on pure Ge is introduced. The morphology and density of the etched pits is introduced for various annealing conditions after the growth.
Substrate Design and Thermal Budget Tuning for Integration of Photonic Components in a High-Performance SiGe:C BiCMOS Process
Authors: Knoll Dieter , Richter Harald H. , Heinemann Bernd , Lischke Stefan , Yamamoto Yuji , Zimmermann Lars , Tillack Bernd
Published: March 2013

We describe a scenario for FEOL integration of photonic components such as wave-guides and Ge photodiodes in a 200 GHz SiGe:C HBT BiCMOS process. We focus on two essential integration aspects. First, a novel, local-SOI approach is introduced which allows us to fabricate SOI-based photonic structures in a bulk BiCMOS environment. It is demonstrated in particular that the BiCMOS yield is not impaired by this approach. Second, we will show that the additional thermal budget of photodiode fabrication can seriously degrade BiCMOS devices parameters. We will offer a route to prevent that. These results pave the way for a new, modular photonic BiCMOS process.
Direct Band-gap Electroluminescence from Strained n-Ge Light Emitting Diodes
Authors: Velha Philippe , Gallacher Kevin Francis , Dumas Derek Charles , Paul Douglas J , Myronov Maksym , Leadley David R
Published: March 2013

The fabrication and characterisation of LED structures made of Ge grown on Si substrates is reported. The structures are circular mesa of strained n-Ge etched down to an undoped buffer of Ge. The electroluminescence exhibit average power levels at 1.7 um of a few uW, many orders of magnitude larger than the nW previously reported. 3 individual mechanisms of emission are identified which can be used to interpret the results encountered in other publications. This work potentially opens the route for integrated source of light and photo-detectors above 1.6 um on Si with applications for lab-on-a-chip and healthcare.
Parameters Controlling Emission of Terahertz Frequency Electromagnetic Radiation from InAs and GaAs: An Ensemble Monte Carlo Simulation Study
Authors: Cortie David L. , Lewis Roger A.
Published: March 2013

The generation, manipulation and detection of terahertz-frequency electromagnetic radiation are topics of great current theoretical and experimental interest. In particular, the coherent generation and detection of ultrashort pulses of terahertz radiation has opened up the field of terahertz time-domain spectroscopy, which permits the simultaneous measurement of amplitude and phase of the terahertz electric field. In this paper, the emission of terahertz radiation from bare semiconductor surfaces following photoexcitation by ultrashort pulses of near-infrared radiation is studied using ensemble Monte Carlo simulations. The simulation allows us to examine separately distinct scattering mechanisms and to vary the materials parameters of bandgap, absorption coefficient, effective mass, and surface potential. The narrower-gap semiconductor InAs and the wider-gap semiconductor GaAs are given as examples in which diffusion and drift processes, respectively, dominate. We find that scattering is relatively unimportant in the case of InAs but is very important in the case of GaAs.
(Invited) Selective-Area Epitaxial Lateral Overgrowth of InGaAs Microdiscs on Si
Authors: Sugiyama Masakazu
Published: March 2013

Dislocation-free, single-domain InGaAs microdiscs, with a diameter of 6 μm and a height of 0.2 μm, were epitaxially grown from small Si (111) windows defined by an SiO2 mask. Seed on Si was InAs, the large lattice mismatch of which against Si encapsulated misfit dislocations to the InAs/Si interface. The lateral growth of InGaAs on the InAs seed was initiated by the incorporation of Ga into the crystal surface and the InGaAs inlands override on the SiO2 mask without voids. The stable (111) surface of InGaAs islands is essential to the highly-lateral growth with planar top surfaces. The size uniformity was excellent owing to the template effect of the SiO2 mask on the initial InAs islands. Device layers can be grown on the InGaAs microdiscs, such as double-hetero structure for optical devices and buried electron channel for MISFETs, which will open a way to III-V on Si integration.
(Invited) III-V/GaP Epitaxy on Si for Advanced Photovoltaics and Green Light Emitters
Authors: Grassman Tyler J. , Ratcliff Chris , Carlin Andrew M. , Carlin John A. , Yang Limei , Mills Michael J. , Ringel Steven A.
Published: March 2013

Epitaxy of III-V compound semiconductors on Si-based substrates with lattice constants between Si and Ge is of great interest for photovoltaic applications as it opens a pathway for achieving near ideal bandgap profiles for maximum solar energy conversion efficiency while simultaneously providing a low-cost Si production platform for III-V cell technologies. The same range of lattice constants also enables access to direct gap III-Vs that can fill the "green gap" present in light emitting devices. This presentation focuses on the materials and III-V/Si heteroepitaxy issues that are currently being addressed, which can lead to breakthrough technologies for both photovoltaics and light emitting devices. We focus on an approach in which the grading between Si and Ge (GaAs) is achieved via wider bandgap GaAsyP1-y metamorphic buffers, from GaP to GaAs, enabling access to the underlying Si as an active solar cell component.
Controlling Epitaxial GaAsxP1-x/Si1-yGey Heterovalent Interfaces
Authors: Sharma Prithu , Milakovich Timothy , Bulsara Mayank T. , Fitzgerald Eugene A.
Published: March 2013

High quality epitaxial growth of GaAsP on SiGe templates would allow access to materials and band gaps that would enable novel, high performance devices on Si. However, GaAsP/SiGe interface engineering has proved to be very complex. In this paper, we explore the effects of strain at the heterovalent interface between GaAsP and SiGe alloys on the overall defect morphology.
High Efficiency Low Temperature Pre-epi Clean Method for Advanced Group IV epi Processing
Authors: Machkaoutsan Vladimir , Weeks K. Doran , Bauer Matthias , Maes Jan Willem , Tolle John , Thomas Shawn G. , Alian AliReza , Hikavyy Andriy , Loo Roger
Published: March 2013

In the present paper we discuss an alternative pre-epi clean method, which is performed at a reduced temperature of 600ºC, while maintaining SiO2 removal efficiency of the conventional H2 pre-epi bake at 800-900ºC. It is essentially an ex-situ HF-dip followed by a GeH4-enhanced Si etch that is performed in-situ in an epi reactor. The etch process lifts-off residual SiO2 together with a very thin well controlled top layer of crystalline Si. An optimal combination of 1.5-1.6nm loss and O, C - free interface has been demonstrated on bare (100) Si wafers. Defect-free substrate-epi interface was verified by photoluminescence study. The amount of removed Si was found to depend on crystal orientation of exposed Si surface, (110) Si being etched ~3x faster than (100) Si. Therefore the method needs to be carefully optimized for devices with various surfaces exposed simultaneously.
Analysis of Local Electric Conductive Property for Si Nanowire Models
Authors: Ikeda Yuji , Senami Masato , Tachibana Akitomo
Published: March 2013

Local electric conductive properties of Si nanowire models are investigated by using two local electric conductivity tensors defined in Rigged QED. It is emphasized that one of these local conductivities is defined as the response of electric current to the actual electric field at a specific point and does not have corresponding macroscopic physical quantity. For the analysis of local conductivities, it is found that there are regions which show complicated response of electric current density to electric field, in particular, opposite and rotational ones. It is also found that two local conductivity tensor shows quite different pattern. We also study the effects of impurities by using a model including a O atom, in terms of the local response to electric field.
Ge1-xSnx Alloys Pseudomorphically Grown on Ge (001) by Sputtering
Authors: Pérez Ladrón de Guevara Héctor , Rodríguez Vázquez Ángel Gabriel , Navarro Contreras Hugo Ricardo , Vidal Borbolla Miguel Ángel
Published: March 2013

Ge1-xSnx alloys were grown on Ge(001) and GaAs(001) substrates in a conventional R. F. sputtering system with two independents plasmas not simultaneous focus to substrate. We determined the in-plane and in-growth lattice parameters, as well as the alloy bulk lattice parameter of the alloys for different Sn concentrations by high resolution x-ray diffraction. At low concentrations, we observed that Ge1-xSnx layers have pseudomorphic characteristics. We also determine the band gap of these alloys from transmittance measurements at different temperatures, using a fast-Fourier-transform infrared interferometer. Our results show that the change from indirect to direct band gap it is observed to lie between 0.10< xc < 0.13.
Accurate Reactive Ion Etching of Si, Ge and P Doped Ge in an SF6-O2 Radio-Frequency Plasma
Authors: Wongwanitwattana Chalermwat , Shah Vishal Ajit , Myronov Maksym , Parker Evan H C , Whall Terry E , Leadley David R
Published: March 2013

The effect of reactive ion etching (RIE) of Silicon (Si), Germanium (Ge) and highly phosphorous doped Germanium (Ge:P) in an SF6-O2 plasma has been studied. We find that the etch characteristics of etch rate and sidewall profile are greatly affected by the O2 content. Etching rates of Ge and Ge:P depend on the O2 content with a significant reduction up to 20% of O2. We also find that an anisotropic sidewall etching mechanism exists and is dependent on the percentage of O2 (%O2) in the plasma. Sidewall angles range from a minimum of 66° to a maximum of 166°, where a critical concentration for etching angle exists where the etching angle can alternate from below 90° to above 90°. In combination, both features allow for precision plasma etching of Si, Ge and Ge:P.
Formation of Large Grain SiGe on Insulator by Si Segregation in Seedless-Rapid-Melting Process
Authors: Kato Ryusuke , Kurosawa Masashi , Matsumura Ryo , Tojo Yuki , Sadoh Taizoh , Miyao Masanobu
Published: March 2013

Rapid-melting growth of SiGe stripes on insulator without any crystal-seed has been investigated. After rapid-thermal annealing (RTA) of amorphous SiGe stripes (~5 μm) at a temperature between melting-point and solidification-point, SiGe crystals with large lateral sizes (~20 μm) are formed. The Si concentrations in the grains show peaks at the center of the grains and gradually decrease toward the grain boundaries. These phenomena are explained based on the formation of Si-rich micro-crystals and subsequent Si-segregating lateral-growth during RTA.
Nano-Engineered Gexsi1-x -On Insulator for Heteroepitaxy
Authors: Hossain Khalid , Debnath Mukul C. , Mishima Tetsuya D. , Santos Michael B. , Holland Orin W.
Published: March 2013

A compliant substrate has been prepared for growth of metamorphic semiconductor films on a Si-based platform. It involves the formation of a dilute GeSi layer by implanting Ge+ into a silicon-on-insulator (SOI) substrate. Thermal oxidation segregates the Ge at the growing oxide interface to form a distinct GexSi1-x thin-film with a composition that can be tailored by controlling the oxidation parameters. This technique combines the demonstrated compliancy of a nano-film (on insulator) to yield an obedient substrate to accommodate lattice mismatch. Fabrication and characterization of the GexSi1-x thin-film will be discussed. The substrates thin film was characterized with RBS, Raman spectroscopy, AFM, SEM and x-TEM. The compliancy was tested with epitaxial growth of III-V heterostructure.
NMOS SiP Epitaxy Process - Optimizing Facet Growth
Authors: Liao Chin I. , Chien Chin Cheng , Chan Michael , Yang Chan Lon , Wu J. Y. , Chung Chuck , Ramachandran Balasubramanian
Published: March 2013

Phosphorous doped selective epitaxial technology has gained interest recently as the source / drain for NMOS. High, >1E20 atm./cc., Phosphorous doping is required to ensure low contact resistance when metal contacts are formed. The study of contact resistance as a function of temperature and chemical composition of reactants is presented in this paper. Additionally, the phosphorous growth needs to have a facet to prevent any nitride residue during the remaining process flows. In this paper, the faceted growth of high Phosphorous doped Silicon epitaxy using various process schemes is explored.
Control of Schottky Barrier Height at Al/p-Ge Junctions by Ultrathin Layer Insertion
Authors: Ohta Akio , Matsui Masafumi , Murakami Hideki , Higashi Seiichiro , Miyazaki Seiichi
Published: March 2013

We have fabricated Al/p-Ge(100) junctions with an ultrathin GeO2 interfacial control layer and studied the effect of post-metallization annealing on the electrical properties from the current-voltage characteristics. Then, the changes in the chemical bonding features with annealing were directly evaluated by using hard x-ray photo-emission spectroscopy. Results of these analyses showed that a GeO2 reduction in the region near the Al/GeO2 interface occurs after annealing at temperatures over 300{degree sign}C and that the Fermi level pinning (FLP) effect increases. This suggests that inserting a thermally and chemically stable thin layer suppresses the FLP effect at the Metal/Ge interface caused by thermal annealing. The release of this FLP effect in Al/p-Ge junctions has also been demonstrated by using ultrathin N2 sputtered hafnium nitride layer instead of GeO2. And we found that the formation of a nitrogen rich region near the metal/Ge interface was an effective means of controlling the Schottky barrier height.
X-ray and Raman Characterization of Strained SiGe Layers Treated by Stain Etching
Authors: Zhou Wei , Liang Renrong , Yan Liren
Published: March 2013

The characterization of porous SiGe layers by means of X-ray and Raman spectroscopy is reported. The strained p-SiGe layers are stain etched to form porous SiGe layers which are studied by HRXRD and compared to the control sample. The rocking curves show that Si-Ge peak is no significant change at the beginning of stain etching and collapses for 30 seconds treatment. However, Raman spectroscopy shows Si-Ge peak in the SiGe epilayer almost vanished at the beginning of etching and meanwhile, Ge-Ge peak raised. XRR shows small changes in the thickness of SiGe layers for short time stain etching but critical angels change significantly. It appears that Si and Ge in the SiGe layer have different behaviors during the stain etching.
Ge-on-Si Bufferless Epitaxial Growth for Photonic Devices
Authors: Camacho-Aguilera Rodolfo Ernesto , Cai Yan , Kimerling Lionel C. , Michel Jurgen
Published: March 2013

Demonstration of bufferless fully crystalline Ge-on-Si is shown. Si-Ge interdiffusion is limited to 10nm. One dimension lateral constrain provides a mechanism to prevent the formation of polycrystalline material. TEM, SEM and XRD analysis confirms Ge crystallinity. PL shows that dopant concentration is retained avoiding the dopant sink that the Ge buffer provides. Dopant concentration is retained at high levels of 1019cm-3 for n-type. Preliminary results exhibit a dopant surfactant effect determining changing the required channel dimensions for crystallinity with the dopant concentration and type used.
Formation of Large-Grain Ge(111) Films on Insulator by Gold-Induced Layer-Exchange Crystallization at Low Temperature
Authors: Park Jong-Hyeok , Suzuki Tsuneharu , Kurosawa Masashi , Miyao Masanobu , Sadoh Taizoh
Published: March 2013

A formation technique of orientation-controlled large-grain (< 10 μm) Ge crystals on insulator at low temperature ({less than or equal to} 350oC) has been investigated to realize advanced flexible electronics. Previously, we proposed a gold-induced crystallization technique, and demonstrated low temperature crystallization (250oC) of Ge on insulator. In the present study, we intentionally inserted thin Al2O3 layers between gold and a-Ge layer, to control crystal nucleation. Consequently, (111)-oriented large-grain (< 20 μm) Ge crystals are obtained at 350oC by optimizing interfacial oxide layer thickness. It is speculated that this phenomena is attributed to suppression of random bulk nucleation of Ge in Au films and resultant dominance of interfacial nucleation at Ge/SiO2 interfaces.
Impedance Spectroscopy of GeSn-based Heterostructures
Authors: Baert Bruno , Nakatsuka Osamu , Zaima Shigeaki , Nguyen Ngoc Duy
Published: March 2013

In this work, we investigated the electrical characteristics of p-GeSn/p-Ge and p-GeSn/n-Ge structures obtained by simulation of the basic semiconductor equations. We developed a numerical formalism based on a drift-diffusion model including a trap level and applied it to typical GeSn-based heterostructures by focusing on the electrical response under small-signal alternating current regime. The results demonstrate that our method provides an access to both microscopic and macroscopic properties, and thereon, to a physical interpretation of the electrical characteristics of GeSn-based structures by linking measurable quantities to micro-scale variations in the structures.
Orientation Dependence of Si1-xCx:P Growth and the Impact on FinFET Structures
Authors: Tolle John , Weeks K. Doran , Bauer Matthias , Machkaoutsan Vladimir , Maes Jan Willem , Togo Mitsuhiro , Brus Stephan , Hikavyy Andriy , Loo Roger
Published: March 2013

The shift of device design to more complex structures with multiple crystallographic orientations has significantly complicated the incorporation of mobility enhancing stressors. The growth rate, composition and crystalline perfection of these stressors is dependent on the crystal orientation and is therefore of significant importance. For embedded source-drain and FinFET devices there are multiple crystallographic orientations present during the epitaxial stressor growth process. The compositional, growth rate and crystal quality dependence of Si1-xCx:P blanket epitaxial growth results on (001), (011), and (111) oriented Si substrates will be discussed and how they relate to the processing of FinFET device structures.
High Throughput Selective Epitaxial Growth of In Situ Doped SiCP/SiP Layers for NMOS Devices Using a Si3H8/SiH3CH3/PH3/Cl2 Based Cyclic Deposition and Etch Process
Authors: Bauer Matthias
Published: March 2013

In this paper an efficient deposition process based on Si3H8 (SiH3CH3, and PH3) is combined with a Cl2 based selective chemical vapor etch process. The most efficient and robust processes are isothermal and isobaric, since temperature or pressure changes add processing time, introduce complexity and potential instabilities. Therefore, in order to maximize process efficiency and stability, the aim is to compose isothermal and isobaric process recipes. Deposition profiles and etch profiles are decoupled by clever HW and recipe design and can be tuned independently. [C] concentration and deposition profiles are, to a good approximation, independently optimized, using temperature dependent [C] incorporation and mass flow dominated deposition profile. Important metrics for SiCP epitaxial quality are growth-per-cycle (GPC) and epitaxial etch-to-deposition ratio. Once process temperature and pressure, as well as Si3H8/SiH3CH3/ PH3 deposition gas ratios (determining SiCP alloy composition) are determined, GPC can be adjusted using appropriately chosen (equal) deposition/etch times and the final total film thickness can be targeted by adjusting number of cycles.
Point-of-Use Sampling and Organic Impurity Analysis for Bulk Gases in Semiconductor Processing
Authors: Park Jungdae , Shin Sangyoon , Lee Yoonmi , Jun Pilkwon , Kim Jongsoo
Published: March 2013

Highly purified gases, such as nitrogen, hydrogen and oxygen, are critical bulk gases in many semiconductor fabrication processes. The ongoing challenge in delivering such gases to the point-of-use is to prevent contamination of the gases by accumulation of organic impurities from tubing and components. This paper describes a point-of-use (POU) sampling and off-line analytical method for qualification and semi-quantification of trace organic impurities in CO2 gas as a model case. The sampling method is based upon a Tenax-GC adsorbent tube for sampling in gaseous CO2. Analysis of organic impurities trapped in the tube is achieved by thermal desorption gas chromatography mass-spectrometry (TD-GC/MS). From on-site sampling with a Tenax-GC adsorbent tube, we found that some hydrocarbons and halogenated carbons were detected from various point-of-uses and could define the contamination sources in CO2 delivery system.
Optimization of SiC:P Raised Source Drain Epitaxy for Planar 20nm Fully Depleted SOI MOSFET Structures
Authors: Loubet Nicolas , Nagumo Toshiharu , Adam Thomas , Liu Qing , Raymond Mark , Cheng Kangguo , Khakifirooz Ali , Zhu Zhengmao , Khare Prasanna , Paruchuri Vamsi K. , Doris Bruce , Sampson Ron
Published: March 2013

This paper will focus on the capability of a low-temperature cyclical deposition/etch (CDE) epitaxy process based on Si2H6 to fabricate SiCP films exhibiting very-high, electrically-active P and C concentrations with fast growth rates. This process will be characterized on blanket wafers first and optimized for raised source/drain applications in planar FDSOI technology featuring 20nm design rules. Low temperature drive-in anneal in combination with high phosphorus doping was employed leading to best resistivity values of 0.3 mΩ.cm for SiP and 0.6 mΩ.cm for SiC2%P. We will show that increasing the phosphorus concentration in the layers enables us to have the same transistor overlap after diffusion anneal for comparable resistivity with SiP films and improved carbon substitutionality. Best Ron values as low as 220Ω.μm will be reported, measured on 20nm gate length transistors in planar FDSOI technology with an optimized process.
Effect of B+ Flux on the Electrical Activation of Ultra-Shallow B+ Implants in Ge
Authors: Yates Bradley R , Darby Blake L , Petersen Dirch H , Hansen Ole , Lin Rong , Nielsen Peter F , Doyle Barney L , Kontos Alex , Jones Kevin S
Published: March 2013

The residual implanted dose of ultra-shallow B+ implants in Ge was characterized using elastic recoil detection and was determined to correlate well with simulations with a dose loss of 23% due to ion backscattering for 2 keV implants in Ge. The electrical characterization of ultra-shallow B+ implants at 2 keV to a dose of 5.0×1014 cm-2 at beam currents ranging from 0.4 to 6.4 mA has been studied using micro Hall effect measurements after annealing at 400˚C for 60 s. It has been shown that the sheet number increases with beam current across the investigated range with electrical activation being 76% higher at 6.4 mA as compared to 0.4mA. However, at 6.4 mA, the electrically active fraction remained low at 11.4%. Structural characterization revealed that the implanted region remained crystalline and amorphization is not able to explain the increased activation. The results suggest the presence of a stable B:Ge cluster whose formation is altered by point defect recombination during high flux implantation which results in increased B activation.
Investigations on GeO Disproportionation Using X-ray Photoelectron Spectroscopy
Authors: Wang Shengkai , Liu Honggang , Nishimura Tomonori , Nagashio Kosuke , Kita Koji , Toriumi Akira
Published: March 2013

GeO disproportionation into GeO2 and Ge is investigated using x-ray photoelectron spectroscopy. Direct evidence about the reaction, 2GeO→GeO2 +Ge, after annealing in ultra-high vacuum is provided in this paper. By considering the oxygen transfer in GeOx network, a kinetic model about the disproportionation is established. On the basis of kinetic and thermodynamic calculation, the activation energy for the disproportionation has been extracted to be around 0.7 eV. The apparent contradictions between GeO desorption through interfacial red-ox reaction and GeO disproportionation is explained by taking oxygen vacancy into consideration. The band alignment of the Ge: GeO: GeO2 system has also been studied.
Oxidation and Sulfidation of Germanium Surfaces: A Comparative Atomic Level Study of Different Passivation Schemes
Authors: Fleischmann Claudia , Schouteden Koen , Houssa M. , Sioncke Sonja , Merckling Clement , Meuris Marc , Hönicke Philipp , Müller Matthias , Beckhoff Burkhard , Van Haesendonck Chris , Temst Kristiaan , Vantomme Andre
Published: March 2013

The effective passivation of germanium surfaces and interfaces has been claimed to be the key to a substantial progress in developing Ge-based microelectronic devices. This paper compares the currently most promising passivation routes, i.e. oxidation and sulfidation, focusing on the underlying atomic scale processes and highlighting similarities and discrepancies between both approaches. The effect of oxidation and sulfidation on electrically active defects is addressed, and the chemical and structural properties of the passivated surfaces are described in detail.
(Invited) GeSn Photodetection and Electroluminescence Devices on Si
Authors: Oehme Michael , Kasper Erich , Schulze Joerg
Published: March 2013

GeSn heterojunction photonic devices with Sn concentration up to 4 % were fabricated. The complete layer structure is grown by means of ultra low temperature MBE with special Ge/Si heterocontacts. The Sn incorporation in Ge is facilitated by a very low temperature growth step in order to suppress Sn surface segregation. For vertical photodetectors an increase of the optical responsivity for higher wavelengths can be observed with increasing Sn content. At the wavelength of 1600 nm the optical responsivity is increased by more than a factor of 10 for the GeSn p-i-n diode with 4 % Sn in comparison to the Ge reference diode. Clear direct bandgap electroluminescence emission at room temperature is demonstrated for LED's with this new material.
High Performance Group IV Photodiodes with Tunable Absorption Edges based on Ternary SiGeSn Alloys
Authors: Beeler Richard T. , Menéndez Jose , Smith David J , Kouvetakis John
Published: March 2013

We describe the fabrication of ternary SiGeSn photodiodes and compare the optical and electrical properties of heterostructure devices with the same target compositions (Si: 8-11 %, Sn: 1.7-2.3 %) grown directly on Si(100) and Ge(100) substrates via UHV-CVD reactions of SnD4, Si3H8 and Ge2H6. We show that the quantum efficiency and dark current levels of near lattice-matched alloys grown on Ge wafers are superior to those of comparable Ge devices. The corresponding optoelectronic properties of analogous SiGeSn devices grown on Si are significantly degraded due to the inferior microstructure resulting from the lattice mismatch between the substrate and epilayer. Finally, we also show that minor variations in composition produce significant shifts in the absorption edge of the devices grown on Ge. Collectively the SiGeSn diodes described here exhibit enhanced performance over any previous Sn based group-IV system, underscoring the potential of this 1 eV gap material as versatile candidates for next generations of Si-based optoelectronics, including multijunction photovoltaics.
(Invited) Epitaxial Growth of Low Defect SiGe Buffer Layers for Integration of New Materials on 300 mm Silicon Wafers
Authors: Kozlowski Gregorz , Fursenko Oksana , Zaumseil Peter , Schroeder Thomas , Vorderwestner Martin , Storck Peter
Published: March 2013

We report on the structural characterization of state-of-the-art SiGe graded buffers on Si(001) substrates with a diameter of 300 mm with and without a backside stressor. The main beneficial effect of the backside stressor is a clear improvement in surface morphology in terms of reduced surface roughness and substantially decreased density of threading dislocation pile-ups all across the wafer. X-ray diffraction furthermore proves that the relaxation of the various layers in the SiGe buffer is triggered by the misfit stress of the subsequently deposited layer. In addition, spatially resolved micro-Raman studies demonstrate that the formed cross hatch pattern surface morphology is clearly correlated with strain field and not with Ge concentration fluctuations.
Nano-Synthesis Approach to the Fabrication of Monocrystalline Silicon-like (III-V)yIV5-2y Semiconductors
Authors: Chizmeshya Andrew V.G. , Kouvetakis John , Grzybowski Gordon , Beeler Richard T. , Menendez Jose
Published: March 2013

A new synthetic strategy for (III-V)y(IV)5-2y materials is introduced to avoid III-V/IV phase separation. As a proof of principle, crystalline AlPSi3 with thickness <900 nm was grown directly, and virtually lattice matched, on Si(100) substrates by combining Al atoms and the well-known P(SiH3)3 molecule as co-reactants using gas-source MBE techniques at temperatures < 600 oC. Intermediate "Al:P(SiH3)3" complexes containing (Al-P)-Si3 cores are presumed to form, and incorporate intact into highly stable diamond-like solid devoid of phase segregation and defects, and a composition with maximal III-V content in which "donor-acceptor" pairs are isolated within an Si matrix. This strategy is generalized to: (i) expand the composition space for this class of materials (ii) grow bulk-like films for detailed comparative characterization and (iii) alloy on the III-V and/or IV sublattice as a means of tuning lattice constants and band gaps. Assembly mechanisms, thermochemistry and key materials properties are elucidated via molecular/solid-state simulation
(Invited) Undoped Ge Core-Si(Ge) Shell Nanowires: Synthesis, Local Composition and Strain Characterization
Authors: Hu Shu , Goldthorpe Irene A. , Marshall Ann F. , McIntyre Paul C.
Published: March 2013

Germanium-silicon core-shell nanowire (NW) heterostructures are promising building blocks to enable improved performance of nanophotonic and nanoelectronic devices. However, surface passivation is an important requirement for realization of NW-based devices: Small diameter Ge nanowires have large surface area-to-volume ratio, and carrier scattering and recombination at the surface defects may significantly compromise the electronic and optoelectronic properties of nanowire devices. On promising approach to passivating Ge NWs is to deposit an epitaxial shell of Si or SiGe around them. This paper describes the details of chemical vapor deposition growth of single crystal Ge core-Si(Ge) shell nanowires that are not intentionally doped and have coherent core-shell interfaces. Methods for quantitative local composition and strain measurements of these coaxial heterostructures are highlighted.
(Invited) Single-Shot Readout of Singlet-Triplet Qubit States in a Si/SiGe Double Quantum Dot
Authors: Prance Jon R. , Shi Zhan , Simmons Christie B. , Savage Don E. , Lagally Max G. , Schreiber Lars R. , Vandersypen Lieven M.K. , Friesen Mark , Joynt Robert , Coppersmith Susan N. , Eriksson Mark A.
Published: March 2013

The spin singlet and triplet states of a two-electron double quantum dot can be used to form a logical qubit that combines fast manipulation and a spin readout mechanism. We demonstrate single-shot readout of the two-electron states of a Si/SiGe double quantum dot using a quantum-point-contact charge sensor and spin-to-charge conversion. From the statistics of multiple single-shot measurements, we find the lifetimes of the spin states as a function of in-plane magnetic field. The lifetimes of the singlet and T0 triplet are both ~10ms and insensitive to magnetic field. The T- triplet lifetime increases with magnetic field, reaching ~3s at 1T.
Phonon Dispersion in <100> Si Nanowire Covered with SiO2 Film Calculated by Molecular Dynamics Simulation
Authors: Watanabe Takanobu , Zushi Tomofumi , Tomita Masanori , Kuriyama Ryo , Aoki Naoshige , Kamioka Takefumi
Published: March 2013

The phonon dispersion relation in <100> Si nanowire (SiNW) is calculated by employing a realistic atomistic model surrounded by thin SiO2 layers. We performed molecular dynamics simulation to calculate the dynamical structure factor by the space-time Fourier transform of atomic trajectories, and extracted the phonon dispersion relations. Although the bulk dispersion relations are maintained in the SiNWs on the whole, acoustic phonon branches are diffused beyond recognition, which is considered as the origin of the thermal conductivity degradation in SiNWs. A red shift of the transverse optical mode also appears probably due to the lattice strain induced by the outer oxide film. These results provide a foothold to estimate the electron-phonon scattering rates and the heat transport processes of realistic SiNWs.
Electrical Isolation of Dislocations in Ge Layers on Si(001) Substrates through CMOS Compatible Suspended Structures
Authors: Shah Vishal Ajit , Myronov Maksym , Wongwanitwatana Chalermwat , Prest Martin J , Richardson-Bullock James S , Parker Evan H C , Whall Terry E , Leadley David R
Published: March 2013

Suspended crystalline Ge semiconductor structures are created on a Si(001) substrate by a combination of epitaxial growth and simple patterning from the front surface using anisotropic underetching. Geometric definition of the surface Ge layer gives access to a range of planes to either retain or etch the underlying Si. The structures are aligned to avoid etch resistive planes in making the suspended regions and to take advantage of these planes to support the structures. The technique is demonstrated by forming suspended microwires, spiderwebs and Van-der Pauw cross structures. We finally report on the low temperature electrical isolation of the undoped Ge layers. This novel isolation method increases the 10{degree sign}K Ge resistivity to 280 Ω-cm, over two orders of magnitude above that of a bulk Ge on Si(001) layer, by removing material containing the underlying misfit dislocation network that otherwise provides the main source of electrical conduction.
Long Wavelength {greater than or equal to}1.9 μm Germanium for Optoelectronics Using Process Induced Strain
Authors: Velha Philippe , Gallacher Kevin Francis , Dumas Derek Charles , Paul Douglas J , Myronov Maksym , Leadley David R
Published: March 2013

The photoluminescence of tensile strained germanium nanostructures is reported. Sub-micron gratings and pillars were fabricated before bein embedded in a strained silicon nitride films. Using different deposition conditions and different sizes of structures the stress in the nanostructures can be controlled. The measured optical properties of the samples show that the direct band-gap is shifted drastically towards higher wavelength over 1.9 um wavelength. This process of local control of the stress in germanium nanostructures is compatible with integrated photonic devices in waveguides geometry. That opens the route for both emitters and photo-detectors above 1.6 um wavelength which are not easily available and also potentially towards a germanium laser.
(Invited) Heteroepitaxial Lattice Mismatch Stress Relaxation in Nonpolar and Semipolar GaN by Dislocation Glide
Authors: Young Erin C , Speck James S.
Published: March 2013

Lattice mismatch stresses in heteroepitaxial (In,Al,Ga)N structures based on nonpolar and semipolar orientations of GaN can result in relaxation via dislocation glide as a result of shear stresses on inclined slip planes, with important consequences for optoelectronic device design.
High Ge Content SiGe Selective Processes for Manufacturing Source/Drain in the Next Generations of pMOS Transistors
Authors: Hikavyy Andriy , Vanherle Wendy , Witters Liesbeth , Vincent Benjamin , Dekoster Johan , Loo Roger
Published: March 2013

Selectivity of different SiGe processes towards oxide and nitride has been studied on both: blanket and patterned Si wafers. Three different precursors: silane, dichlorosilane and disilane were used for SiGe growth. It was found that growth of SiGe with Ge content higher than 35% is intrinsically selective towards SiO2; SiGe with any Ge content, up to pure Ge, could not be grown selectively towards nitride; in order to get selectivity towards nitride an etching gas should be used and its amount in the gas phase decreases with the Ge content increase.
Formation of Uniaxially Strained Si/Ge Channels on SiGe Buffers Strain-Controlled with Selective Ion Implantation
Authors: Sawano Kentarou , Hoshi Yusuke , Nagakura So , Arimoto Keisuke , Nakagawa Kiyokazu , Usami Noritaka , Shiraki Yasuhiro
Published: March 2013

We fabricate uniaxially strained SiGe channels on SiGe buffer layers containing the uniaxial strain. For introducing the uniaxial strain into SiGe buffer layers, a selective ion implantation technique is developed. Laterally selective ion implantation with a stripe pattern is performed into a Si substrate, followed by SiGe overgrowth in the whole region. Large strain relaxation of SiGe occurs only in the ion-implanted area. This relaxed SiGe provides shear stress to the neighboring strained SiGe in the unimplanted area, leading to the uniaxial strain relaxation. The amount of the uniaxial relaxation strongly depends on the stripe line width, indicating high controllability of the strain states. On the strain-controlled SiGe buffer, the uniaxially strained SiGe channel with the higher Ge concentration is found to be pseudomorphically grown. This result indicates that this technique has a high potential to realize high-mobility Si/Ge channels with uniaxial strain.
GeSn Alloys on Si Using Deuterated Stannane and Trigermane: Synthesis and Properties
Authors: Grzybowski Gordon , Beeler Richard T. , Jiang Liying , Smith David J , Chizmeshya Andrew V.G. , Kouvetakis John , Menéndez Jose
Published: March 2013

Thick ( > 500 nm) Ge1-y
Sn
y
films with Sn concentrations as high as y = 0.09 were grown on Si substrates by ultrahigh-vacuum chemical vapor deposition using trigermane (Ge3H8) and deuterated stannane (SnD4) as molecular sources. The trigermane precursor makes it possible to grow Ge at lower temperatures, and is therefore more compatible with the low temperatures required for high Sn incorporation. The properties of the films are investigated in detail using a variety of structural probes. All films exhibit a sizable photoluminescence signal, with a direct band gap downshift relative to Ge that approaches 0.3 eV for the highest Sn concentrations.