Fluxless Bonding Via In-Situ Oxide Reduction
Authors: Chylak Bob 
Published: January 2025

Today there is a growing need for

high performance computing for server,

artificial intelligence, cloud, graphics, and other computationally

challenging applications. These emerging and growing applications require processors, ASICs, and graphics chips that have extreme computing power.

Semiconductor chips are being designed

and fabricated for these applications

have a need to fit as much computing and

support circuitry on them as possible on

the die. Because of this these die are

becoming large and have higher I/O.

However, the chips have a maximum size

limitation which is the reticle size of

the lithography stepper which is 32 mm X 28 mm. These large die chips also have finer and finer pitch for the I/O

interconnects which need to be flip chip

assembled by either mass reflow or more

and more commonly via thermos-compression bonding. Today these chips are normally have copper pillars with solder caps with a minimum pitch of

about 40 um. To put this into perspective a full reticle size die with this I/O pitch would have over 560,000 pillars! There are a number of

challenges in assembling a flip chip

which has this I/O density. One of the

largest challenges to be overcome is

caused by the fact that these devices

need to be fluxed in order to eliminate

oxides from the interconnect interface so the surfaces can wet and bond reliably. This is true whether the

devices are mass reflowed or thermos-

compression bonded. The fluxing can be

accomplished via dipping into a trough

filled with flux or by spraying it on

the surface of the substrate or wafer

before the flip chip bonding. The

problem arises because the flux needs to be completely cleaned before the bonded

die is under-filled. The reason that the

flux needs to be completely cleaned is

that the under fill will not adhere to a

surface which has any flux residue. If

there is underfill residue, the molding

process will result in voids near the

solder interconnect. If there are voids

in the underfill the solder will leak

into the voids during the reflow portion

of the reliability testing process and

the solder will often short to the

adjacent interconnect resulting in a

failure. One can imagine that cleaning

flux residue completely on a die with over 500,000 interconnects that have 40 um or finer pitch would be difficult. In response to this issue flux

manufacturers have developed no clean

fluxes. However, we have found that

while these fluxes do leave less residue. However, the residue that is left is even more difficult to clean.

These problems become more extreme as the pitch decreases and the I/O density increases accelerating the need for industry solutions.

There are 2 potential solutions to this

issue that are being develop in the

industry. First there has been R&D

activity to eliminate solder by developing Cu to Cu interconnect

technology. This would eliminate the

requirement for fluxing and facilitate

the transition to finer and finer pitches. Another method is to develop a method to eliminate oxide on solder other than by using flux. We have been developing such a solution by using

Formic Acid vapor oxide reduction in-

situ to clean the oxide directly and

immediately before thermo-compression

bonding by injecting formic acid vapor

onto the surfaces directly on the

bonding machine, cleaning and

eliminating the oxides so that flux is

not required.

The developed solution consists of a

Shroud that fits over a standard TCB

bondhead. The shroud has 3 distinct

chambers. The first to deliver the formic acid vapor, the next consists of a vacuum exhaust, and the third is a Nitrogen shield, which prevents the gas from getting into the factory environment. This creates a mini

environment that can clean oxides from

the solder for robust bonding.

This presentation will show the design

of the oxide reducing gas, discuss

experimental data on oxide cleaning

parameters and cleaning times, and

provide a set of data to clarify the

performance of the fluxless process.

Additionally, future applicability of

the process technology for Cu to Cu interconnect will be discussed.

Experimental data showing Cu to Cu

interconnect on various devices will be shown that have promising results.