bluuebunny/crossref_metadata_2025 huggingface dataset:
Investigation on the Gate Electrode Configuration of IGZO TFTs for Improved Channel Control and Suppression of Bias-Stress Induced Instability
Authors: Mudgal Tarun , Edwards Nicholas , Ganesh Prashant , Bharadwaj Anish , Powell Eli , Pierce Michael S , Manley Robert G. , Hirschman Karl D
Published: February 2020

The classic bottom-gate IGZO TFT structure requires a passivation layer application over the back-channel for stability and process integration. However, the passivation material deposition process usually degrades the interface quality and presents defect states at the back-channel interface which are difficult to compensate by a controlling gate electrode positioned on the opposite side of the semiconductor. A top-gate configuration takes advantage of a superior back-channel interface between the substrate and the sputtered IGZO film. The gate dielectric must be deposited on the IGZO which presents an inferior interface, however the influence of defect states can be reduced by annealing in an oxidizing ambient prior to the gate electrode deposition. As positioned directly above the inferior interface, there is an improvement in the ability of the gate potential to control the device operation in the presence of remaining defect states.

This work presents an investigation on TFTs which have been fabricated with very similar process flows with the exception of the placement of the gate electrode. Bottom-gate TFTs with back-channel passivation that demonstrate good performance and resistance to aging have been realized, however bias-stress stability continues to remain a challenge. Top-gate TFTs have demonstrated improvement in the uniformity of device operation as well as bias-stress stability, and have the potential to offer an advantage in off-state performance (see fig. 1). Double-gate TFTs take further advantage of improved electrostatics, but present additional challenges in process integration. Results from all three gate electrode configurations will be compared. Device testing performed over a temperature range from 10 K to 400 K allows a comprehensive assessment of transport behavior (see fig. 2), with results used to refine a material and device model for TCAD simulation.

Figure 1
(Invited) Strain Sensing Inverter and Photovoltaic Circuits Based on Novel Heptazole Organic Thin Film
Authors: Im Seongil
Published: February 2020

Following solid pentacene films and other p-type small molecules, in the present work, we show a new small molecule, 8,16-dihydrobenzo[a]benzo[6,7]indolo[2,3-h]carbazole (heptazole; C26H16N2) which has almost the same HOMO level as that of pentacene but with a higher HOMO-LUMO gap of ~2.95 eV, so as to be photostable under visible light except deep blue-to-violet range. The field-effect mobility of our new OTFT turns out to be ~0.21 cm2/V s which is lower than that of the pentacene OTFT on the same dielectric layer, however our new OTFT on flexible substrate is found to work as a strain sensor because organic heptazole layer changes its electric resistance under tensile strain but such change appears elastically recoverable by removing the strain. We here display an inverter which is composed of two OTFTs but with 90 drgree different channel orientations each other: one would work as a strain sensor while the other works as a load under static and dynamic tensile bending strain conditions. Moreover, we also found that our heptzole organic film has very small exciton binding (~40 meV) properties under deep blue photons (wave length~410 nm). Taking advantages of such small exciton binding energy, we developed a Schottky diode circuit which can dynamically measure the photovoltaic effects without any assistacnce of electric power. Based on above-mentioned benefits of our heptazole layer in TFT and Schottky diode, we demonstrate in the meeting the dynamic strain sensing of the organic inverter on flexble substrate, and dynamic photovoltaic switching of the Schottky diode circuits as briefly shown below.

Figure 1
A Current Supply with Single Organic Thin-Film Transistor for Charging Supercapacitors
Authors: Keshmiri Vahid , Larsen Christian , Edman Ludvig , Forchheimer Robert , Tu Deyu
Published: February 2020

Supercapacitors (also referred to as ultracapacitors, electric double-layer capacitors) bridge the gap between rechargeable batteries and electrolytic capacitors with moderate capacity and fast charging and are very promising for electric energy storage. Compared with lithium-ion batteries, supercapacitors are also superior regarding cycle life, specific power, and operating temperature. However, the cost per kWh of supercapacitors are tenfold to lithium-ion batteries. Printed electronics offers a route to a low-cost manufacturing platform that enables mass production of supercapacitors at low cost. Supercapacitors are usually charged with constant current supply, for example, Keithley 2200 programmable power supply. Here we present a current supply with single organic thin-film transistor (OTFT) to charge supercapacitors. The current supply takes power directly from the electric grid (115 V AC, US standard), converts the AC voltage to a quasi-constant current (~0.1 mA) regardless of the impedance of loads, and charges the supercapacitors. This work demonstrates steps towards all printable supercapacitor energy storage systems integrated with chargers that enable direct charging from the power outlet.

Solution-processed OTFTs based on the popular polymer semiconductor P3HT have been developed to rectify 115 V AC voltage. The P3HT OTFTs were fabricated on glass substrates and Au electrodes for drain and source were patterned with a standard UV-lithographic lift-off process. The thickness of the spin-coated P3HT layer is around 35 nm. In order to operate the transistors at such high voltage, a rather thick (2500 nm) polymer PMMA was deposited on the P3HT as the gate dielectric. For gate electrodes, 100 nm Al was subsequently deposited by thermal evaporation through a shadow-mask. The channel length and width are 50 um and 55 mm respectively. The transistors delivers 0.7mA current when the drain voltage and the gate voltage are both at -200V. The average mobility is 2.6x10-2 cm2/Vs while the average threshold voltage is 2V.

A diode-configured OTFT was used to rectify 115 V AC as a half-wave rectifier. Paralleling a 15-uF capacitor with the load, the ripples were smoothed and a DC output was obtained. With a 10-kΩ load, the output current is 0.1 mA at a voltage of 1 V. Varying the load from 10 kΩ to 100 kΩ, the voltage across the load increased to 8 V (eight times higher) while the output current dropped only 20% to 0.08 mA. The rectifier thus provides quasi-constant current output for different loads. In addition, no other voltage step-down devices, for instance, transformers, are required to take the 115 V AC voltage down to a few volts. During charging of the supercapacitors, the load resistor also works as a protection device that protects against overcharging. This single OTFT current source was demonstrated to charge a 430mF supercapacitors to 1 V directly using 115 V AC voltage from power outlet.
(Invited) Physical Properties of Novel 2D Semimetal WTe2: From Microscopic Study to Devices
Authors: Pan Minghu , Yuan Hui
Published: February 2020

In this study, multiple measurements, including scanning tunneling microscopy (STM), electrical transport, corroborated by DFT calculations are performed on freshly cleaved surfaces of semimetallic tungsten ditelluride (WTe2) crystals. High sample quality with very low density of defects is confirmed by STM observation and in-plane anisotropic conductance (originated from quasi-one dimensional Fermi surfaces) can be conclude based on transport measurement and DFT calculation.We reveal that strong Rashba type spin-orbit effects due to the non-centrosymmetric structure splits the electron and hole bands crossing the Fermi level and lifts the spin degeneracy of these bands. Low temperature STM/S measurements show the umklapp-type interference pattern on WTe2 surface at 4.2 K, proven to be a spectroscopic feature dominated by spin-conserving processes. Furthermore, we investigate electronic properties of devices made from few-layer WTe2 down to a few nanometers. Our results reveal that few-layer WTe2 could be an ideal candidate for future 2D electronic, optoelectronic after solving the ambient sensitivity of device process.
(Invited) Performance Limit and Potential of Layered MoTe2 Transistors
Authors: Lin Yen-Fu
Published: February 2020

Atomically thin flaks were obtained to fabricate field-effect transistors by using mechanical exfoliation of 2H-type α-molybdenum ditelluride (MoTe2) bulk crystal grown by chemical vapor transport. Both static and dynamic charge transport of these layered transistors were systematically investigated to explore the underlying mechanism of charge transport. In the quasi-static measurements, carrier ambipolarity was observed and originated from the formation of tunable Schottky barriers at the metal/MoTe2 contacts. In the dynamic measurements, .the 1/f dependence of the noise was observed in the conducting channels in vacuum and followed the carrier number fluctuation model. Moreover, the noise spectrum in ambient conditions changed to a Lorentzian, possibly because a large number of gas molecules absorbed at the chalcogen vacancies, enhancing the trapping and emission of carriers between two discrete energy states. Using such unique layered transistors, we further realized complementary-like inverters, amplifiers and environmental sensors, demonstrating their feasibility for future digital and analog circuit applications.
(Invited) Fully-Printed Stretchable Electronic Devices and Circuits
Authors: Cai Le , Zhang Suoming , Miao Jinshui , Yu Zhibin , Wang Chuan
Published: February 2020

Flexible electronics has generated great amount of interest due to its wide range of potential applications in flexible displays, wearable electronics and sensors, implantable biomedical devices, and many more. Despite significant amount of success and progress being made in the field, mechanical flexibility alone may not be sufficient for certain applications. For instance, in order to conformally wrap a surface with nonzero Gaussian curvature, stretchable electronic system is needed. In this talk, I will present our recent work on addressing the two major challenges faced by stretchable electronics - the development of intrinsically-stretchable electronic materials and the need for scalable fabrication processes. We have developed nanomaterials-based metal, semiconductor, and dielectric materials with superior electronic property, stretchability, and inter-layer adhesion. Such materials are formulated as electronic inks to allow highly uniform and scalable material patterning using a fully-printed process, allowing us to directly print high-performance thin-film transistors (TFTs) and logic circuits onto ultrathin elastomer substrates. Electrical and mechanical characterizations reveal that the TFTs and inverters can withstand biaxial strain of up to 125% for hundreds of cycles. The TFTs also exhibit respectable performance with field-effect mobility up to 10 cm2/Vs. This work represents a major step forward in moving the stretchable electronics research from proof-of-concept demonstrations toward practical applications in wearable devices or stretchable displays.
(Invited) Wearable Electronics Using 1D-2D Hybrid Nanostructures
Authors: Park Jang-Ung
Published: February 2020

Wearable electronics is an important area of future electronics. Stretchable and flexible transparent electrodes are required to form wearable displays and touch screen panels with comfort designs. Conductive transparent materials have been intensively studied to replace conventional indium tin oxide (ITO) due to its limited supply and rigidity. Especially, graphene and metal nanowire (NW) random networks have attracted considerable attentions due to their high transparency and conductivity comparable to properties of the ITO electrodes. Metal nanowire networks can be simply formed through solution processes and have lower sheet resistances than the resistances of undoped synthesized graphene. However, the nanowire networks have critical disadvantages such as high inter-nanowire junction resistances, low breakdown voltages, and high contact resistances with other active materials. Here, we present the formation of the graphene-metal nanowire hybrid films as transparent and flexible electrodes. These hybrid films show low sheet resistance (~30 Ω/sq), high transmittance (94 % at 550 nm wavelength), and outstanding mechanical stretchability (maximum tensile strain of 100 % with negligible resistance change).
Fabrication of Self-Assembly Metal /Semiconductor Heterostructured Nanowires By Using Anodic Aluminum Oxide (AAO)-Assisted Molding Injection Process
Authors: Chen Shih-Hsun , Wang Chiu-yen , Hung Yu Chen , Chen Chien-Chon , Lin Jin Shyong
Published: February 2020

Self-assembly metal/semiconductor heterostructured Cu-Ge alloy nanowires were successfully synthesized by using the anodic aluminum oxide (AAO) template-assisted vacuum casting process for the first time, analyzed their interface microstructures and fabricated single nanowire into device. AAO, a membrane with a controllable microstructure of nano-channel array, was utilized to synthesize nanowires of the identical stoichiometry to bulk materials, combining with solid-liquid-solid transformation process. Through choosing a suitable hypoeutectic or hypereutectic composition ratio the size effect will force the phases of nanowires to solidify alternatively along axial direction. Thus, self-assembly nanowires with an alternative metal/semiconductor heterostructure can be obtained. Furthermore, a single nanowire device was synthesized to investigate the relative electrical properties for semiconductor applications. This results are useful in developing metal/semiconductor heterostructured nanowires for advanced FET devices.

Figure 1
A Novel Core-Shell Structure of Anti-Reflection Layer for Cu(In,Ga)Se2 Solar Cell Application
Authors: Chen Chia-Wei , Tsai Hung-Wei , Su Teng-Yu , Lin Wei-Sheng , Thomas Stuart Richard , Chueh Yu-Lun
Published: February 2020

Copper-indium-gallium- diselenide (CIGS) is one of the potential candidates for high conversion efficiency solar cells with direct band gap of 1~1.7 eV and high absorption coefficient of 104~105 cm-1. Introducing an anti-reflection layer on top of CIGS solar cell can enhance light scattering in the device, prolong optical path and therefore increase the photocurrent. Surface texture is one of the approaches to reduce the reflectance, and creating nanostructures by chemical etching or electrochemical method for anti-reflection layer has been reported. However, those approaches have concomitant disadva ntages including the complex mold fabrication and the etching solution remaining on the device.

In this regard, we utilize glancing angle deposition system to fabricate mold-less self-synthesizing TiO2 helical nanostructure on the top of CIGS device as anti-reflection layer. In order to create gradient refractive index for further decreasing the reflectance, an oxide shell is deposited surrounding the TiO2 helical nanostructure by chemical bath deposition. The core-shell nanostructure is observed by transmission electron microscopy (TEM). According to UV-Vis spectroscopy, the reflectance is dropped after the nanostructure created on the device, which means that the CIGS layer can absorb more light and create more carriers. At last, the cell performance is improved due to the enhanced short circuit current (Jsc), which results from the decreasing reflectance. The basic research from this project will be beneficial to development in photovoltaic field both in research and industry fields.
Enhancement of Light Extraction Efficiency in Organic Light Emitting Diode with Nano-Scaled Random Patterns
Authors: Lee Heon , Kim Yangdoo
Published: February 2020

Fast response, true color representation, and applicability to flexible display, organic light emiting diodes (OLED) become prominent next generation display devices. However, light extraction efficiency of OLED is still limited to below 30% due to surface plasmon polaritons (SPP) and total internal reflection phenomena at each layer. In order to improve the lower value of light extraction efficiency, various works are investigated. The main reasons of trapped light inside OLED device are total internal reflection and waveguide and SPP mode.

Total internal reflection effect can be decreased by application of micro-lenz array and surface scattering structures. However, the clarity of image can also be damaged as an unwanted side effect. Captured light inside the device, due to waveguide and SPP mode can be decreased by photonic crystal pattern or moth-eye pattern. In both cases, device fabrication process is the key issue.

In order to fabricate highly efficient OLED display without blurring of image, nano-scaled random pattern was formed on glass substrate using direct ptinting method[1]. Nano-scaled random pattern has low haziness and smoothed curvatures on the surface. It was formed by direct printing of spin on glass (SOG)materials such as hydrogen silsesquioxane (HSQ). After proper heat treatment, HSQ becomes SiO2. Current efficiency and power efficiency of OLED, formed on glass substrate with nano-scaled random pattern, exhibit 25% and 35% increase, compared to OLED device on flat glass substrate, respectively. External quantum efficiency of OLED device on nano-patterned substrate also shows 28% of increase[1].

Keywords: optical scattering pattern, nanoimprint, OLED, light extraction efficiency

 

References:

[1] Optic Letter 40 (2015) 5838-5841
(Invited) Si/NiCoSex Nanorods Photocathode for Enhanced Photoelectrochemical Hydrogen Production
Authors: Zhang Xingwang , Zhang Hongxiu , He Denghong
Published: February 2020

Hydrogen is considered as the ideally sustainable alternative to fossil fuels. Photoelectrochemical (PEC) water splitting is attractive as it can store solar energy in the form of hydrogen. Silicon as an earth-abundant and efficient visible light absorption material has been widely used in PEC for hydrogen generation. However, achieving a high photocurrent density still faces a challenge when utilizing silicon as a photocathode owing to its sluggish hydrogen evolution reaction (HER) kinetics and low light harvesting capability. Here, we design a novel one-dimensional photocathodes - Si/NiCoSex nanorods using a facile photo-assistant electrodeposition method and demonstrate their enhanced PEC hydrogen production performance with high photocurrent density. Si nanorods were covered with NiCoSex electrocatalysts, where electrons efficiently diffuse across the electrode/electrolyte interface. The synergy effects of the high light harvesting of Si nanorod morphology and NiCoSex electrocatalyst enhanced the production and utilization of photogenerated electrons. The high quality junctions between one-dimensional semiconductor and electrocatalyst for charge collection and utilization is significant to enhance the efficiency of water splitting for hydrogen generation. The improved charge separation and hydrogen evolution reaction kinetics on the electrode-electrolyte interface were confirmed. Furthermore, we expect that inducting the buried junction of Si or optimizing the electrode/electrolyte interface might further boost the PEC-HER performance of the Si/NiCoSex nanorods, making it a more competitive candidate for PEC-HER photocathode. The reported new Si/NiCoSex nanorods photocathode offers a new strategy for preparing efficient solar energy conversion devices.
ZnO Nanowire Device Fabricated By Hydrothermal Synthesis and Dielectrophoresis Method for Gas Sensor Applications
Authors: Lyu Cheng-Han , Sun Kai-Heng , Wang Yu-Hung , Hsu Hsun-Feng
Published: February 2020

Recently, metal-oxide semiconductor-based gas sensors have gotten a great attention due to their special advantages, such as low cost, high performance and easily fabricated. ZnO has been extensively studied, because it can be applied to sense various gases. One-dimensional ZnO nanostructures can enhance the sensing performance. The vertical nanowire array is a common structure for ZnO nanowire-based gas sensor. However, the seed layer under the nanowire array reduces the sensing capability. Therefore, in this study, the gas sensing devices were fabricated by the arrangement of nanowires between the electrodes.

ZnO nanowires were synthesized on the ZnO seed layer by hydrothermal method. The alternating current electrical field was used to align ZnO nanowires of different lengths between the electrodes. For gas sensing application, two types of the nanowire structured devices were used to detect CO.

The results show that a flat surface and small grain of seed layer was received by annealing at 300℃, and it can be used to fabricate ZnO nanowires with small fluctuation in length and width by hydrothermal method. ZnO nanowires had the highest aspect ratio when the concentration of precursors was 0.04M. The length of nanowires increased by adding an appropriate concentration of Polyetherimide (PEI). In the process of ZnO nanowires aligment by dielectrophoresis method, the parallel and crossed ZnO nanowire-based devices were achieved by adjusting the frequency and the peak-to-peak voltage of alternating current electrical field. For the CO sensing , the sensing sensitivity and stability of the crossed structure nanowires-based devices were enhanced after annealing. The sensing sensitivity and limit-of-detection of the crossed nanowire-based devices were better than the parallel nanowire-based ones due to the potential barrier modulation at the nanojunctions between two nanowires.
Dielectrophoretic Alignment of Functional Nanowires for Chemical Sensing Application
Authors: Kim Jaekyun
Published: February 2020

Dielectrophoresis has received much attention owing to its capability to manipulate the polarizable nanowires at the specific locations on a substrate. Bottom-up integration of batch-synthesized nanowires with CMOS circuitry represents significant step toward the multifunctional miniaturized chip with the chemical diversity. We investigate the spatially-confined dielectrophoretic nanowires alignment on the parallel electrode array, covered by the dielectric layer, where they tend to repel each other because of the local electrostatic interaction of the polarized charges between them. Furthermore, the local capacitive coupling between the assembled nanowires and biased electrodes determines the final configuration of the nanowires relative to the electrodes. By using this combination of long- and short-range forces, it was observed that the uniformly-spaced nanowire array can be readily obtained over large area (~5×5 mm2) and even expandable to the entire wafer. Theoretical calculation and experimental data show that we can achieve the spacing-controlled nanowire array at the desired locations with the excellent end-to-end registration. Its combination with the periodic array of micron-scale recessed photoresist well produced the ultrahigh density nanowire device array, ~106 devices/cm2, on a substrate with sub-micron registration accuracy and high assembly yield exceeding ~90%. Post-assembly process including the electrodeposition provides a mechanically robust and low-resistant contact to the assembled nanowires while it also removes the misaligned nanowires. Device isolation using a dry etch completes the individual single nanowire device made of the metallic and semiconducting materials. They turned out to be all functional, achieving ~90% yield of single nanowire device fabrication on the desired sites, sparsely distributed within a chip. This scheme is also applicable to the integration of individual semiconducting nanowires with the desired locations on the complex circuitry which typically includes the metal interconnects, discrete devices, and topographical profiles.
(Invited) Novel Integrated Circuit Platforms Employing Monolithic Silicon CMOS + GaN Devices
Authors: Fitzgerald Eugene A , Lee K.E. , Zhang Li , Huang C.C. , Kadir A. , Bao Shuyu , Ren Z. , Wang C. , Wang Y. , Lee Kwang Hong , Liu Z.H. , Palacios Tomas , Tan Chuan Seng , Ng G.I. , Chua S.J.
Published: February 2020

We describe the research results produced from our focus on integrating GaN HEMTs and LEDs into silicon CMOS integrated circuits. Although current component markets are driving most GaN HEMT development, we have undertaken an innovation path in which the value of an integrated GaN device in a silicon design environment is the driver for materials and device development. Specifically, our integrated process flow involving foundry production of front and back end standard CMOS processes demands certain GaN epitaxial and material constraints that are different than constraints on non-integrated devices. We report on 200 mm GaN-on-Si 725 um thick engineered substrates formed through a combination of MOCVD and wafer bonding processes. Our optimized 200 mm GaN-on-Si (111) epitaxial wafers have bow values < 30 um, with total III-N film thicknesses of 2.7 um including a 1.5 um capping GaN layer. XRD FWHM values of 400 and 380 arcsec for (002) and (102) reflections indicate TDD of approximately 4e8 cm-2. CMOS-compatible GaN HEMTs demonstrated on these wafers have achieved 2DEG mobilities of ~1200 cm2/Vs and sheet carrier densities of 1-2e13 cm-2, with Id, max values of 700 mA/mm and 25 GHz fT, fmax for Lg = 0.25 um. High quality InGaN/GaN MQW LEDs emitting at 450 nm with total III-N stack thickness of 3.7 um have also been demonstrated. Central emission wavelength standard deviation of < 2 nm was achieved across the entire 200 mm, wafer, and typical devices exhibited turn-on at ~2.5 V with diode ideality factor of 2.8. We have developed wafer engineering techniques such as edge encapsulation and substrate replacement to address wafer fragility issues typically associated with GaN on SEMI-spec 725 um Si wafers. This also leads new wafer/device platforms such as GaN-OI and CMOS + GaN that will open new avenues in device performance and integration of III-N with Si CMOS.
(Invited) Silicon Carbide as a Robust Neural Interface
Authors: Frewin Christopher L. , Bernardin Evans E. , Deku Felix , Everly Richard , Hassan Jawad , Pancrazio Joseph J. , Saddow Stephen E.
Published: February 2020

The potential impact of neuro-compatible implantable devices to assist millions who suffer from brain and spinal cord injury or limb loss is tremendous, both in restoring patient health, as well as quality of life. Until now, no known reliable solution to this challenge has been found, with most of the current technology relying on non-neuro-compatible materials such as silicon, tungsten, or platinum, and polymer insulators. Silicon Carbide (SiC) and, in particular 3C-SiC, appears to be an ideal material to meet this challenging application: the evidence of bio- and hemocompatibility is increasing; it is a semiconductor that allows for tailored doping profiles and the seamless integration of electronics with the implants; it is highly durable, even within harsh, corrosive environments; SiC is also an excellent thermal conductor. For the first time, a comprehensive analysis of 3C-SiC for neural device applications has been performed and is reported here.
(Invited) Physics of GaN High Electron Mobility Transistors
Authors: Shur Michael
Published: February 2020

The device physics of GaN/AlN/InN High Electron Mobility Transistors (HEMTs) is affected by wurtzite (hexagonal) symmetry leading to strong spontaneous and piezoelectric polarization differences at AlGaN/GaN and AlGaInN/InGaN interfaces (polarization doping). The polarization doping enhances the electron mobility in the device channel and leads to the formation of two-dimensional (2D) electron gas with concentrations 10 to 20 times higher than that for more conventional field effect transistors (over 4.5x1013 cm-2 for AlGaN/GaN HEMTs). The resulting low channel resistance makes parasitic series resistances to be very important. The high current carrying capability due to a very high carrier concentration in the device channel and a very high breakdown voltage lead to high power densities and make the issues of heat dissipation to be a priority. Switching voltage is typically proportional to the gate-to-drain separation, which could be many microns for high voltage switches. The breakdown voltage is affected by the peaks in the electric field near the gate edge or the edges of the metal field plates introduced for boosting the breakdown voltage. The device characteristics strongly depend on the substrate that affects the dislocation and point defect densities in the device channel and determines heat dissipation. The research started from using sapphire substrates, but silicon substrates have become a commercial technology. SiC, diamond, or AlN bulk or template substrates could have significant advantages over silicon. Strain induced during growth and caused by a strong piezoelectric effect in the device channel is another crucial factor affecting the device reliability (linked to the transient and permanent detects induced under the voltage stress). Novel emerging designs, such as Perforated Channel HFET (PC-HFET), devices with low conducting passivation covering the gate-to-drain spacing and/or inserted between the gate and the barrier layer account for this device physics and might be especially beneficial for high temperature and radiation hard electronics applications.
(Invited) RF Power Performance of Nanocrystalline Diamond Coated InAlN/AlN/GaN HEMTs
Authors: Downey Brian P. , Meyer David J. , Ancona Mario G. , Feygelson Tatyana I , Pate Bradford B , Roussos Jason A. , Tadjer Marko J. , Anderson Travis J , Hardy Matthew T , Nepal Neeraj , Eddy Charles R.
Published: February 2020

While GaN high-electron-mobility transistors (HEMTs) provide the highest achievable RF power densities among all commercially available solid-state technologies, their rated output power densities are typically backed off substantially from the intrinsic limit of the device to ensure robust reliability. Power dissipation during RF operation is typically localized to an area near the drain-edge of the gate. The combination of this “hot spot” and the high electric fields that are present causes acceleration of known degradation mechanisms that limit device lifetime. In order to meet system reliability requirements, the rated output power is therefore constrained to keep the dissipated power, and thus the HEMT channel temperature, below a fixed limit. We previously showed that a high thermal conductivity nanocrystalline diamond (NCD) coating, 0.4 µm to 0.5 µm in thickness, on the top-side of the device nearest to the area of high power dissipation, can reduce channel temperature [1] while improving RF power performance [2] of AlGaN/GaN HEMTs compared to similar devices with SiNx passivation only.

Here we continue this development with new designs that lead to further improvements in reduced junction temperature, RF output power, and operating frequency. The crucial design enhancements introduced here include a combination of thicker NCD coatings (>1 µm) and sub-micron gate lengths. Instead of a conventional AlGaN barrier, an InAlN barrier layer was used to reduce parasitic source/drain resistance, increase transconductance, and support gate lengths for millimeter wavelength operation (>30 GHz). In addition, the InAlN barrier is lattice-matched to GaN, which may provide reliability benefits by reducing the intrinsic strain in the layer compared to an AlGaN barrier. For devices with a 0.75 µm gate length and a 5 µm source-drain spacing, a maximum drain current of 1.8 A/mm, a peak fT
of 29 GHz, and a peak fmax
of 60 GHz was measured. Output power densities exceeded 5 W/mm and 3 W/mm with power-added efficiency of 52% and 42% for 4 GHz and 10 GHz operating frequencies, respectively. The effects of device design on electrical performance and the reduction in junction temperature will be discussed. Thermal simulations will be presented that verify the reduced channel temperature extracted through a calibrated pulsed I-V measurement technique [3] for NCD coated devices.

[1] M.J. Tadjer et al., IEEE Electron Dev. Lett., vol. 33, no. 1, pp. 23-25 (2012).

[2] D.J. Meyer et al., IEEE Electron Dev. Lett., vol. 35, no. 10, pp. 1013-1015 (2014).

[3] J. Joh et al., IEEE T. Electron. Dev., vol. 56, no. 12, pp. 2895-2900 (2009).
(Invited) Simulation of the Effects of As-Grown Defects on GaN-Based Power HEMTs
Authors: Mukherjee Shrijit , Patrick Erin , Law Mark E , Ren Fan , Pearton Stephen J.
Published: February 2020

With the wide band-gap of Gallium Nitride (GaN) and high mobility of 2 dimensional electron gas(2DEG), AlGaN/GaN high electron mobility transistors (HEMTs) are considered ideal candidates for high speed and power applications ranging from hybrid vehicles to space communication. Developments in the fabrication of GaN-based blue LEDs have been incorporated into the processing of AlGaN/GaN HEMT structures leading to improvements in amount of defects and dislocations resulting from heteroepitaxial growth. But evident degradation of dynamic performance of such devices due to the presence of as-grown defects still remains a subject of major concern. Using FLorida Object Oriented Device Simulator (FLOODS) TCAD, this work looks to analyze the impact of variation of defect properties as well as their spatial distribution and concentration on the steady-state and dynamic behavior of AlGaN/GaN HEMTs.

FLOODS TCAD’s defect modeling capability will be applied to examine how multiple defect levels, of both donor and acceptor-like nature, can influence device performance. Particular emphasis will be on transient switching, such as gate-lag and drain-lag experiments, in consideration of the slow nature observed frequently in literature. While comprehensive investigation of the role of charged defects at the AlGaN/passivation layer interface on performance degradation has already been performed, contribution by as-grown defects, expected to be in significant quantity in the GaN buffer layer, is yet to be investigated. Building on experimental results, which suggest the presence of multiple acceptor-like defects, impact on steady-state current-voltage characteristics will be observed followed by an examination of how such defects will affect dynamic performance by isolating their contribution to transient and switching behavior.

Figure: (a) Drain current against gate voltage at VDS=0.5V for HEMT A with 1 acceptor-like level (nT=1014 cm-3, Et=Ec-0.7eV) and HEMT B with 2 acceptor levels(Level 1: nT=1014 cm-3, Et=Ec-0.7eV; Level 2: nT=1015 cm-3, Et=Ec-0.5eV) (b) Optical pumping like detrapping of electrons, biasing at VDS=1V and VGS=0V. HEMT A(Level 1: nT=1013 cm-3, Ec-0.2eV, τ=1s; Level 2: nT=4x1013 cm-3, Ec-0.5eV, τ=1ms), HEMT B(Level 1: nT=1013 cm-3, Ec-0.2eV, τ=1s; Level 2: nT=1013 cm-3, Ec-0.5eV, τ=1ms)

Figure 1
Deformation Measurement of the Hybrid Cells Using a Microfluidic Array Device
Authors: Zhang Xiaoling , Yang Jun , Hu Ning , Zheng Xiaolin
Published: February 2020

Cell fusion is a method to asexually fuse two or more cells and produce a mono- or multi-nucleated cell hybrid in vitro. Bare research on the mechanical properties of the hybrid cells has been investigated. In this paper, we present a method to analyze the deformability of the hybrid cells. A discrete co-planar microelectrode device was used to generate non-uniform electric fields. Dielectrophoresis (DEP) force was used to trap cells on the microelectrodes. Then cells were deformed under a sufficient magnitude electric field. The device contains a serpentine-shaped microchannel with 22500 pairs of vertical sidewall microelectrodes patterned on two opposing vertical sidewalls of the microchannel, so it could analyze thousands of cells in parallel. These cell deformations were recorded by a CCD camera. The deformation ratio increased as the applied voltage increased for the mESCs and the fused mESCs and NIH3T3 cells. The two cell-types tested here were found to deform quite differently under identical ED conditions. The deformation ratio of the hybrid cells and the mESCs was respectively 1.205 ± 0.137 and 1.39 ± 0.256 at 16 Vp-p, 1.517 ± 0.211 and 1.428 ± 0.243 at 20 Vp-p. The current results show that compared to the stem cell, the mechanical properties of the hybrid cells were changed. After applying an enough load, the hybrid cells could significantly be deformed. The hybrid cells were observed to be stiffer than the stem cells at first, and less easily deformed by electrical stresses during ED. However, after applied a voltage of 20 V, the hybrid cells were found to be more easily deformed than the stem cells. It seems the cytoskeletons of the hybrid cells have been changed and the hybrid cells may be in an unstable state. We can use this characteristic to separate the hybrid cells and unfused cells, or other applications.
Miniaturized Redox Flow Batteries for Electronic Applications: CFD Modeling
Authors: Kumar Brijesh , Bhargav Atul , Ruch Patrick
Published: February 2020

Miniaturized redox flow batteries have seen interest in electronic applications because of their potential to simultaneously deliver electric power and remove heat. For these applications, the flow battery has to be constructed on a side of a computer chip, with components such as flow channels, manifolds, supply tubes, electrodes, membranes and current collectors. There are efforts underway to optimize the design of these components for different objectives such as maximum power density or maximum efficiency. Due to space constraints, design rules employed for classical redox flow batteries are only of limited use in microfluidic systems. Since experimentation with micro-scale components is especially expensive and time-consuming, there is a need to develop computational tools to understand trade-offs in the design and operation of these flow batteries. We have carried out computational fluid dynamics study of redox flow batteries using commercially available software. This paper analyses the effect of manifold and flow channel design on current and voltage distribution in the flow battery.

The anolyte and catholyte fluid flows are modeled using Navier-Stokes equations of mass momentum and energy conservation. Species diffusion through porous electrodes is modeled using species-dependent diffusion coefficients, which are calculated based on the fluid state and the electrode geometry. The electrochemical reactions are modeled using the Butler-Volmer equation with a pre-defined exchange current density. The species concentrations, pressures and temperatures at various parts of the flow battery are solved using a multiphysics simulation software package. We find that the flow channel geometry and manifold design has an important effect on the flow distribution as well as current collection inside the flow battery. It also affects the pressure drop, thereby affecting the pumping power required to keep the battery operational. Based on these findings, we make observations regarding cell design and operation. We expect that these simulations, once validated with experiments, lead to a better understanding of the trade-offs involved in the design and operation of miniature redox flow batteries for electronic applications.
Effect of MoO3 Vapor Flow to Large Area MoS2 Few-Layered Films Growth
Authors: Chen Hung-Yi , Wang Hsiang-Chen , Wu Wen-Wei , Lu Ming-Pei , Lu Ming-Yen
Published: February 2020

Two-dimensional (2D) materials are a new material system with interesting and extraordinary physical properties. These characteristics make them have many applications including field-effect transistor (FET), flexible electronics, and optoelectronic devices [
1,2,3
]. Transition Metal Dichalcogenides (TMDs), such as MoS2 and WSe2, are drawn much attentions, because they have direct bandgap if they are monolayer. Acquisition of large area MoS2 flakes using chemical vapor deposition (CVD) method is feasible. Here, we report a method to optimize the uniformity and the size of MoS2 few-layered films. The growth substrates were placed up-side down on the MoO3 source with the separation (d) of 7 to 9 mm during the growth (figure 1a). The resulting films were significantly different (figures 1b-d). Based on the results, the MoS2 films grown when the separation is 8mm have the best uniformity and largest area (figure 1c). The MoS2 films are as large as 1 cm2, which is 3-3.5 times larger than that grown from other separation parameters. The number of MoS2 films was identified to be monolayer from Raman analysis (E1
2g to A1g peak difference is about 20.5 cm-1) and photoluminescence analysis (a peak at ~677 nm). The detailed growth mechanism of large area MoS2 films is discussed in this study.

References

Yin, ZY et al, ACS NANO., 6, 74-80 (2012).

Tsai, ML et al, ACS NANO., 8, 8317-8322 (2014).

Lopez-Sanchez, O et al, Nature Nanotechnology., 8, 497-501 (2013)

Figure 1
The Optimization of PEM Fuel Cell Performance Using the CFD Method Combined with Experimental Validation
Authors: Wei Guanghua , Lu Jiabin , Zhu Fengjuan , Zhang Qinglei , Zhang Junliang
Published: February 2020

Abstract: The polymer electrolyte membrane fuel cell (PEMFC) possesses many advantages for both automotive and stationary application, including high energy efficiency, low operating temperature, zero emission, and so on. Aside from the fact that great improvement should be made on its key materials, i.e., the ORR electrocatalysts and proton exchange membrane, it is believed that the PEM fuel cell performance is greatly affected by the operating temperature, gas inlet humidity as well as the flow pattern, and so on [1,2]. Thus, in this work, a 3D steady state model is established to investigate detailedly the effects of the flow pattern (co-flow and counter-flow), the anode and cathode gas inlet relative humidity (RH) on the cell performance. The governing equations of the 3D model result from careful analysis on the electro-chemical reactions, current conservation, membrane proton migration, membrane water transport and water-vapor phase transition. The membrane water transport takes into accounts the electro-osmatic drag and water back diffusion, and the conservation of momentum, species and energy is applied to all components of the PEM fuel cell. Experimental validation is also performed and fits very well with the simulation. Figure 1 shows the current density distribution for different flow patterns: (a), co-flow and (b), counter-flow. The corresponding achievement will offer an efficient guide on the design and performance optimization of PEMFC.

Acknowledgements

This work was supported in part by National Natural Science Foundation of China (Grant No. 21373135 and 21533005) and Science Foundation of Ministry of Education of China ( Grant No. 413064).

References

K. Dannenberg, P. Ekdunge, G. Lindbergh, Mathematical model of the PEMFC, Journal of Applied Electrochemistry, 2000, 30: 1377-1387.

S.H. Ge, B.L. Yi, A mathematical model for PEMFC in different flow modes, Journal of power sources, 2003, 124: 1-11.

Figure 1
Advances in Electrochemical Hydrogen Compression and Purification
Authors: Bouwman Peter Jaime
Published: February 2020

These are exciting times to be pioneering Electrochemical Hydrogen Compression (EHC) as the call for linking renewable electrical energy and chemical energy storage is becoming stronger. Hydrogen is ideally suited for electrochemical conversion, thanks to its relative abundance in compounds on earth, extremely fast redox reaction and highest energy content by weight. Although we do not produce hydrogen, we are utilising the fast redox reaction to convert hydrogen gas at the membrane interface to protons, and back to hydrogen gas again.

The principles of Electrochemical Hydrogen Compression have been disseminated before and demonstrated the capability to achieve high pressures of 100 MPa single stage (14,503 psi), while simultaneously purifying the hydrogen gas. The company HyET is developing a product that will be suitable for multiple applications, ranging from (home) refuelling hydrogen vehicles to purification and recycling of industrial hydrogen (bio)gas.

Here we present the outcome of the project PHAEDRUS and DONQUICHOTE, where EHC technology was developed and validated as compressor for a Hydrogen Refuelling Station, further compressing the hydrogen gas supplied directly from a PEM electrolyser. Both technologies exhibit dynamic operation, fast response and modularity making them well compatible. The most effective system configuration to capture renewable wind and solar energy and deliver high pressure hydrogen has been investigated.

In addition, we review the purification ability of the EHC technology, extracting hydrogen selectively from mixed gasses in low and high concentrations. Hydrogen gas is typically produced from compounds (e.g. methane), its value is highly determined by its quality and any residual contaminations. The solid membrane was design to hold back high pressure hydrogen, and therefore shows superior permselectivity limiting passage of larger molecules. As for the active hydrogen extraction process, the membrane selection should be viewed in tandem with the catalyst system, which may be affected by specific contaminations.

Technical working principles are elaborated on in this presentation, pointing out key benefits and scientific challenges that were encountered and to some degree resolved, finally discussing the roadmap ahead leading towards very attractive applications.

Figure 1