(Invited) Physical Understanding and Prevention of Bipolar Degradation in SiC Power Devices
Authors: Kimoto Tsunenobu , Iijima Akifumi , Kaneko Mitsuaki 
Published: July 2022

Through recent progress in SiC technology, 1–3 kV-class SiC power devices (field effect transistors and Schottky barrier diodes) have been commercialized, demonstrating remarkable reduction of power dissipation in various electric systems. However, “bipolar degradation” caused by forward conduction of pn junctions has not been completely solved [1]. In this paper, physical understanding and prevention of the bipolar degradation in SiC devices are reviewed.

Degradation in SiC bipolar devices is caused by expansion of a single Shockley-type stacking fault (SSF) in {0001} from a basal plane dislocation (dislocations lying on a {0001} plane) through minority carrier injection and subsequent recombination [2]. The authors conducted careful observation and theoretical analyses on the shapes of expanded SSFs in SiC upon minority carrier injection, and clarified 36 different types of SSFs [3]. For fabrication of high-reliability SiC devices, any basal plane dislocations must be eliminated from a lightly-doped voltage-blocking layer, where a high density of excess carriers is injected during device operation. The authors carried out a number of SiC epitaxial growth runs by using a custom-made chemical vapor deposition system and discovered that almost all the basal plane dislocations can be converted to threading edge dislocations in the initial stage of SiC epitaxial growth (dislocation conversion occurs near the epilayer/substrate interface). The typical density of basal plane dislocations in SiC epitaxial layers was 1–10 cm-2, but the density could be reduced to 0.1 cm-2 or less by increasing the growth rate from 5 to 24 µm/h on 4 degrees off-axis SiC(0001) substrates without any conflicts in the surface morphology and doping control (see the attached image). The achieved dislocation density (< 0.1 cm-2) is low enough to fabricate 1 cm2 devices (300–400 A devices) free from the degradation phenomenon. A basal plane dislocation and a threading edge dislocation can possess the same Burgers vector, which is the reason why the dislocation conversion can take place. It is also noted that a threading edge dislocation, which runs along <0001> (perpendicular to the {0001} plane), does not affect the performance and reliability of SiC devices, at least, within operation conditions in practical applications.

It has been experimentally revealed that a SSF can either expand or contract, depending on the current density and temperature. Thus, it is essential to clarify the critical condition where SSF expansion starts. The authors developed a physics-based model to calculate the effective formation energy of a SSF in SiC, taking account of the electronic energy gain by forming a SSF under minority carrier injection [4]. Here a SSF exhibits a slightly smaller bandgap than the perfect SiC and a SSF behaves like a quasi-quantum well in SiC. It can be judged that SSF expansion takes place when the effective SSF formation energy is negative, by which the free energy is lowered by SSF expansion [5].

The effective SSF formation energy was calculated as a function of the injected excess carrier density at different temperatures. When the carrier density is low, the SSF formation energy is close to the value in equilibrium (4.7 mJ/m2 [6]). As the carrier density increases, the SSF formation energy turns to be negative due to the electronic energy gain, and the critical excess carrier density above which SSF expansion occurs can be determined as about 5E14 cm-3 at 300 K from this calculation. This critical carrier density gradually increases with elevating the temperature, due to the enhanced emission of electrons from an SSF and thereby a lowered energy gain. The critical carrier density was experimentally determined through observation of SSFs in fabricated SiC pn diodes operating at different current densities and temperatures. The critical carrier density experimentally determined was 4E14 cm-3 at room temperature, being a very good agreement with the theoretical prediction mentioned above. Therefore, the developed model serves as a guideline for preventing bipolar degradation. Based on these results, nearly perfect prevention of bipolar degradation can be achieved by introducing a “recombination-enhancement layer” between a voltage-blocking layer and a substrate, the detail of which shall be explained at the conference.

[1] T. Kimoto and H. Watanabe, Appl. Phys. Express, 13, 120101 (2020).

[2] M. Skowronski and S. Ha, J. Appl. Phys., 99, 011101 (2006).

[3] A. Iijima et al., Philos. Mag., 97, 2736 (2017).

[4] A. Iijima and T. Kimoto, J. Appl. Phys., 126, 105703 (2019).

[5] K. Maeda et al., Mater. Sci. Forum, 725, 35 (2012).

[6] K. Maeda et al., Appl. Phys. Express, 14, 044001 (2021).

Figure 1