bluuebunny/crossref_metadata_2025 huggingface dataset:
Trends in Commercially Available SiC Substrates
Authors: Oliver James D.
Published: March 2009

Device quality SiC wafers are extremely expensive and available from only a limited
number of vendors. This has limited the ability of researchers to compare and evaluate quality from
various vendors. This paper surveys some properties and characteristics of SiC wafers purchased in
the commercial market place and describes the product variability among vendors as a method to
highlight the areas where improvements in substrate quality are desirable.
Quality Aspects for the Production of SiC Bulk Crystals
Authors: Straubinger Thomas L. , Rasp Michael , Schmitt Erwin , Weber Arnd Dietrich
Published: March 2009

For several years the major focus of material issues in SiC substrates was laid on the
reduction of macroscopic defects like polytype inclusions, low angle grain boundaries and
micropipes. Since then significant improvements have been achieved and micropipe densities could
be reduced to values below 1 cm-2. Nevertheless the fabrication of high quality substrates at high
volume and low cost is still challenging. Therefore preconditions for reproducible process and
quality control will be discussed. Since it is obvious that dislocations are the main reason for
degradation in power devices the prevailing attention has also been shifted to that field of material
research. Intense studies were utilized on dislocation and stacking fault formation during
sublimation growth. For this reason we systematically varied crucial parameters of the crystal
growth process and applied several specific characterization methods, e.g. KOH-defect-etching,
electron microscopy and optical microscopy, to evaluate resulting material properties. The
investigations were accompanied by failure analysis on devices of the Schottky-type. We found out
that for the improvement of substrate quality emphasis has to be laid on the reduction of thermoelastic
stress in the growing crystal. The results of numerical calculations enabled us to derive
moderate growth conditions with reduced temperature gradients and correspondingly low defect
concentration.
(Nitrogen-Vacancy)-Complex Formation in SiC: Experiment and Theory
Authors: Pensl Gerhard , Schmid Frank , Reshanov Sergey A. , Weber Heiko B. , Bockstedte M. , Mattausch Alexander , Pankratov Oleg , Ohshima Takeshi , Itoh Hisayoshi
Published: March 2009

Nitrogen (N) donors in SiC are partially deactivated either by Si+-/N+-co-implantation or
by irradiation with electrons of 200 keV energy and subsequent annealing at temperatures above
1450°C; simultaneously the compensation is decreased. The free electron concentration and the
formation of energetically deep defects in the processed samples are determined by Hall effect and
deep level transient spectroscopy. A detailed theoretical treatment based on the density functional
theory is conducted; it takes into account the kinetic mechanisms for the formation of N interstitial
clusters and (N-vacancy)-complexes. This analysis clearly indicates that the (NC)4-VSi complex,
which is thermally stable up to high temperatures and which has no level in the band gap of 4HSiC,
is responsible for the N donor deactivation.
Photoluminescence Investigation of Defects Created by Electron Bombardment of 4H-SiC
Authors: Steeds John W.
Published: March 2009

Use of a transmission electron microscope to irradiate silicon carbide samples has been
demonstrated as a useful additional characterisation technique. The photoluminescence spectra of
crystal defects introduced in this way have been found to be extremely rich in detail, involving
more than 50 zero phonon lines. It is perhaps disappointing that relatively few of these optical
centres have been identified conclusively. Indeed, controversy exists over most of the
interpretations that have been advanced. As a step towards clarifying this situation we have been
studying many of the more important photoluminescent systems by investigating the dependence of
the results on the sample n- and p-doping levels, their stoichiometry, the source of supply, the
electron dose, the subsequent annealing history, and by exploiting two new aspects of the technique
that will be introduced here. A brief review will be given of new results obtained for some of the
major optical centres. Most of the irradiations have been performed at room temperature using
300 kV electrons but some were carried out at 750°C.
Carrier Lifetime Analysis by Microwave Photoconductive Decay (μ-PCD) for 4H SiC Epitaxial Wafers
Authors: Chung Gil Yong , Loboda Mark J. , MacMillan Mike F. , Wan Jian Wei , Hansen Darren M.
Published: March 2009

Excess carrier lifetimes in 4H SiC epitaxial wafers were characterized by microwave
photoconductive decay (o/PCD). The measured decay compromised of surface and bulk
recombination curves have fast and slow components. Measured lifetimes are not changed with
various surface passivation techniques. High resolution lifetime maps show good correlation with
stress birefringence images and lower lifetime around extended material defects like grainboundaries,
defect clusters, edge defects and polytype switching bands. Chlorosilane based CVD
epiwafers show higher bulk lifetime values than standard silane based CVD materials due to less
bulk lifetime defect density.
Dependence of DAP Emission Properties on Impurity Concentrations in N-/B-co-doped 6H-SiC
Authors: Murata Satoshi , Nakamura Yoshihiro , Maeda Tomohiko , Shibata Yoko , Ikuta Mina , Sugiura Masaaki , Nitta Shugo , Iwaya Motoaki , Kamiyama Satoshi , Amano Hiroshi , Akasaki Isamu , Yoshimoto Masahiro , Furusho Tomoaki , Kinoshita Hiroyuki
Published: March 2009

The dependence of donor-acceptor pair (DAP) emission properties on impurity
concentrations of N and B in 6H-SiC epilayers was investigated. Doped samples were grown by
closed sublimation technique, and impurity concentrations were confirmed by secondary ion mass
spectrometry (SIMS). Photoluminescence (PL) measurement results indicate that p-type 6H-SiC with
NA>ND had extremely low DAP emission efficiency, whereas n-type 6H-SiC with NA<ND showed
intense DAP emission. Moreover, n-type 6H-SiC with high N and B concentrations exceeding
1018cm-3 is preferable for high DAP emission efficiency.
Electrical Characterisation of 4H-SiC Epitaxial Samples Treated by Hydrogen or Helium
Authors: Ottaviani Laurent , Barakel Damien , Yakimov Eugene B. , Pasquinelli Marcel
Published: March 2009

This paper presents results of investigations about the influence of Hydrogen (introduced
by annealing or plasma implantation), and Helium (ion implantation followed by a proper annealing
for creating nanocavities) on the electrical properties of 4H-SiC n-type epitaxial samples. First, 4HSiC
epitaxial layers were hydrogenated either by annealing under H2 ambient or by a RF plasma
treatment. This last process took place before or after the deposition of Schottky contacts. Two
different annealing temperatures were imposed (300°C and 400°C), as well as two plasma hydrogen
doses for the same low energy. An improvement of electrical characteristics (25 % increasing of the
minority carrier diffusion length, lowering of ideality factor, better switching characteristic) is
detected for samples annealed at 400°C. The treatment of 4H-SiC surface in hydrogen plasma
through Ni metal also increases the diffusion length, but not sufficiently to have an effect on I-V
characteristics. A second set of 4H-SiC epitaxial layers were secondly implanted with He+ ions at
two distinct temperatures. An annealing at 1700°C during 30 minutes under argon atmosphere was
then carried out. C-V measurements revealed the presence of a high charge density zone around the
nanocavities, containing fixed negative charges, opposite in sign to the donor atoms.
Excess Carrier Lifetimes in a Bulk p-Type SiC Wafer Measured by the Microwave Photoconductivity Decay Method
Authors: Kawai Masahiko , Mori Tatsuhiro , Kato Masashi , Ichimura Masaya , Sumie Shingo , Hashizume Hidehisa
Published: March 2009

We carried out mapping of the excess carrier lifetime for a bulk p-type 4H-SiC wafer by
the microwave photoconductivity decay (μ-PCD) method, and we compared the lifetime map with
structural defect distribution. Several small regions with short lifetimes compared with surrounding
parts are found, and they correspond to regions with high-density structural defects. Excess carrier
decay curves for this wafer show a slow component, which originates from minority carrier traps.
From temperature dependence of the excess carrier decay curve, we found decrease of the time
constant of the slow component with increasing temperature. We compared the activation energy of
the time constant with that obtained from the numerical simulation, and concluded that the energy
level for the minority carrier trap would be 125 meV from the conduction band.
Mechanisms of Decrease in Hole Concentration in Al-Doped 4H-SiC by Irradiation of 200 keV Electrons
Authors: Matsuura Hideharu , Minohara Nobumasa , Inagawa Yusuke , Takahashi Miyuki , Ohshima Takeshi , Itoh Hisayoshi
Published: March 2009

From the temperature dependence of the hole concentration p(T) in a lightly Al-doped
4H-SiC epilayer irradiated with several fluences of 200 keV electrons, the density of Al acceptors
with 0.2 V E + eV decreases significantly with increasing fluence, whereas the density of unknown
defects with 0.37 V E + eV increases with fluence and then decreases slightly. Although only C
vacancies increase with fluence because 200 keV electrons can displace only C atoms, only the
increase in the density of C monovacancies cannot explain the changes of p(T) by 200 keV
electron irradiation. It may be necessary to consider the relationship between C vacancies and Al
acceptors.
Nitrogen Donor Aggregation in 4H-SiC: g-Tensor Calculations
Authors: Gerstmann Uwe , Rauls E. , Greulich-Weber Siegmund , Kalabukhova Ekaterina N. , Savchenko D.V. , Pöppl Andreas , Mauri Francesco
Published: March 2009

The microscopic origin of the Nx EPR-lines observed in heavily nitrogen doped 4H-SiC
and 6H-SiC is discussed with the help of EPR parameters calculated from first principles. Based on
the symmetry of the g-tensors we propose a model with distant NC donor pairs on inequivalent
lattice sites which are coupled to S=1 centers but with nearly vanishing zero-field splittings, giving
rise to an essentially S=1/2 like spectrum. The proposed aggregation in neutral donor pairs can
contribute to the saturation of the free concentration observed in heavily nitrogen doped SiC.
Nonequilibrium Carrier Dynamics in DPB-Free 3C-SiC Layer Studied by Dynamic Grating Technique in Wide Excitation and Temperature Range
Authors: Neimontas K. , Jarašiūnas Kęstutis , Soueidan Maher , Ferro Gabriel , Monteil Yves
Published: March 2009

We applied picosecond dynamic grating technique for studies of carrier dynamics in ntype
DPB(double positioning boundary)-free 3C-SiC (111) epilayer grown by VLS (vapour-liquidsolid)
mechanism on 6H-SiC (0001). The measurements of bipolar diffusion coefficient D and
carrier lifetime τR in the samples at various pump energies (0.5 – 3.0 mJ/cm2) and temperatures (9 –
300 K) provided the values of bipolar mobility of ~ 80 cm2/Vs and τR = 1.5 - 2.0 ns at 300 K. The
ionized impurity scattering, dominant at T < 100 K, and carrier-density dependent lifetimes in 10-
300 K range were attributed to contribution of trapping centers which electrical activity saturates at
high carrier density.
Optical and Electron Paramagnetic Resonance Study of Sponge Silicon Carbide Prepared by Direct Synthesis
Authors: Kiselov V.S. , Kalabukhova Ekaterina N. , Lukin S.N. , Sitnikov A.A. , Yukhymchyk V.A. , Yakimova Rositza
Published: March 2009

The objective of the present work is to examine the preparation and characterization of
the SiC sponge obtained by direct synthesis of high purity graphite and silicon powder in inert
atmosphere at 1900 - 2000 0C for 2-3 hours. To burn out the carbon excess the samples were
subsequently heated in oxygen atmosphere at 800 -900 0C resulting in a weight loss of SiC. The
relative density of SiC sponge is 1.5-1.7 g/cm 3. The advantages of the proposed method are the
high rate of ceramic yield and capability to create the ceramic samples of preliminary selected
shape by using a graphite cell of different configurations. Raman scattering spectroscopy and
electron paramagnetic resonance (EPR) data have shown that SiC sponge produced by direct
synthesis of graphite and silicon powder consists of 6H and 3C SiC polytypes.
The Premature Breakdown in 6H-SiC p-n Junction
Authors: Sankin Vladimir Ilich , Monakhov Andrey M. , Shkrebiy Pavel P.
Published: March 2009

In the 6H-SiC p+-n--n+ junction the effect of the premature breakdown has been revealed.
This effect stimulated by the small temperature increase and illumination by light with energy
greater than the bandgap energy of 6H-SiC. The breakdown field appears to be 20% less than the
intrinsic breakdown field in these structures.
Theory of the Stark Effect on the Donor Levels in 4H Silicon Carbide
Authors: Ivanov Ivan G. , Janzén Erik
Published: March 2009

The paper presents the results of a quantitative theoretical calculation concerning the shift
and the splitting of the ground-state manifold of the nitrogen donor in 4H-SiC under uniform
electric field. Two cases are distinguished corresponding to a field applied parallel and
perpendicular to the crystal axis. A comparison with the phosphorus donor in Si is carried out.
Point Defects and their Aggregation in Silicon Carbide
Authors: Gali Adam , Hornos T. , Bockstedte M. , Frauenheim Thomas
Published: March 2009

The existence of point defects is one of the key problems in SiC technology. Combined
experimental and theoretical investigations can be successful in identification of point defects.
We report the identification of a basic intrinsic defect in p-type SiC. In addition, we predict the
existence of interstitial-related electrically active defects which may be detected by experimental
tools.
Deep Acceptor Levels of the Carbon Vacancy-Carbon Antisite Pairs in 4H-SiC
Authors: Carlsson Patrick , Son Nguyen Tien , Umeda T. , Isoya Junichi , Janzén Erik
Published: March 2009

The SI-5 electron-paramagnetic-resonance (EPR) centre is a dominant defect in some
high-purity semi-insulating (HPSI) SiC substrates and has recently been shown to originate from
the negatively charged carbon vacancy-carbon antisite pair (VC
−
Si C ). In this work, photoexcitation
EPR (photo-EPR) was used for determination of the energy position of deep acceptor levels of
VCCSi in 4H-SiC. Our photo-EPR measurements in slightly n-type material show an increase of the
EPR signal of VC
−
Si C for photon energies from ~0.8 eV to ~1.3 eV. Combining the data from EPR,
deep level transient spectroscopy and supercell calculations we suggest that the (1–|2–) levels of the
different configurations of the defect are located in the range ~0.8-1.1 eV below the conduction
band.
Atomic Crack Defects Developing at Silicon Carbide Surfaces Studied by STM, Synchrotron Radiation-Based μ-spot XPS and LEEM
Authors: Soukiassian P. , Amy F. , Brylinski Christian , Mentes T.O. , Locatelli A.
Published: March 2009

Atomic structure and morphology of 6H-SiC(0001) and 3C-SiC(100) surfaces are studied
by scanning tunneling microscopy (STM), synchrotron radiation-based !-spot x-ray photoemission
spectroscopy (!-spot XPS) and low energy electron microscopy (LEEM). STM shows very high
quality Si-rich 6H-SiC(0001) 3x3 surfaces with less than 2% of atomic defects. Si removal upon
annealing leads to atomic crack defects formation with a novel 2"3x2"3-R30° reconstruction
coexisting with few 3x3 domains having no crack, suggesting important stress relief during the phase
transition. LEEM also shows cracks formation on cubic 3C-SiC(100) surfaces and gives insights
about surface morphology with large faceting and mesa (!m) formation. These defect fractures
developing upon Si removal are likely to be also generated during initial oxidation since the initial
oxygen interaction tends to relieve surface strain on SiC in contrast to Si surfaces. These atomic
crack defects could be related to the interface electronic states recurrent at SiO2/SiC interfaces.
An Approach to Model Temperature Effects of Interface Traps in 4H-SiC
Authors: Rao R. Ramakrishna , Balaji S. , Matocha Kevin , Tilak Vinayak
Published: March 2009

In 4H silicon carbide MOSFETs, threshold voltage varies with temperature. It is believed
that this is caused by trapping of inversion electrons at high density of interface-traps (Dit) present
at the SiC/SiO2 interface in 4H-SiC MOSFETs. In this work, we present an approach to model the
interface trap density as a function of temperature that includes the effect of band gap narrowing.
Using the temperature dependent trap charge density, we can estimate the variation of mobile
inversion layer charge density, which in turn, explains the threshold voltage behavior with
temperature in 4H-SiC MOSFETs.
Conductive Atomic Force Microscopy Studies on the Reliability of Thermally Oxidized SiO2/4H-SiC
Authors: Fiorenza Patrick , Lo Nigro Raffaella , Raineri Vito , Salinas Dario
Published: March 2009

The nano-characterization of thermal oxides grown on 4H-SiC is for the first time
presented and analysed to derive its reliability. The dielectric breakdown (BD) kinetics of silicon
dioxide (SiO2) thin films thermally grown on 4H-SiC has been determined by comparison between
I-V measurements on large-area (up to 1.96×10-5 cm2) metal-oxide-semiconductor (MOS) structures
and conductive atomic force microscopy (C-AFM) with a resolution of a few nanometers. C-AFM
clearly images the weak breakdown single spots under constant voltage stresses. The stress time on
the single C-AFM tip dot has been varied from 1×10-3 to 1×10-1 s. The density of BD spots, upon
increasing the stress time, exhibits an exponential trend. The Weibull slope and the characteristic
time of the dielectric BD events were so determined by direct measurements at nanometer scale
demonstrating that the percolation model is valid for thin thermal oxide layers on 4H-SiC (5-7nm),
but it fails for larger thicknesses (10 nm).
Nanowire Reconstruction on the 4H-SiC(1102) Surface
Authors: Hetzel M. , Virojanadara Charíya , Choyke Wolfgang J. , Starke Ulrich
Published: March 2009

Ordered reconstruction phases on the 4H-SiC(1102) surface have been investigated using
low-energy electron diffraction (LEED), Auger electron spectroscopy (AES) and scanning tunneling
microscopy (STM). After initial hydrogen etching, the samples were prepared by Si deposition and
annealing in ultra-high vacuum (UHV). Two distinct reconstruction phases develop upon annealing,
first with a (2×1), and at higher temperatures with a c(2×2) LEED pattern. After further annealing
the fractional order LEED spots vanish and a (1x1) pattern develops. For the (2×1) phase, STM
micrographs show that adatom chains develop on large flat terraces, which in view of AES consist
of additional Si. These highly linear and equidistant chains represent a self-assembled well-ordered
pattern of nanowires developing due to the intrinsic structure of the 4H-SiC(1102) surface. For the
c(2×2) phase AES indicates a surface composition close to the bulk stoichiometry. For the (1×1)
phase a further Si depletion is observed.
The Al2O3/4H-SiC Interface Investigated by Thermal Dielectric Relaxation Current Technique
Authors: Avice Marc , Grossner Ulrike , Nilsen Ola , Fjellvåg Helmer , Svensson Bengt Gunnar
Published: March 2009

Al2O3 has been grown by Atomic Layer Chemical Vapour Deposition (ALCVD) on ntype
4H-SiC using O3 as an oxidant and tri-methyl-aluminum (TMA) as a precursor. After
deposition, annealing at 1000°C during 3h in different atmospheres (Ar, N2 and O2) was performed.
Interface properties were studied by Capacitance-Voltage (CV) and Thermal Dielectric Relaxation
Current (TDRC) measurements. The highest near-interface trap density (Nit) was deduced to be
4x1012 eV-1cm-2 between 0.36 eV and 0.5 eV below the conduction band, Ec, for O2 annealed
samples, 2.8x1012 eV-1cm-2 between 0.42 eV and 0.56 eV below Ec for Ar annealed samples and
2.2x1012 eV-1cm-2 between 0.4 eV and 0.6 eV below Ec for N2 annealed samples. Only samples
annealed in Ar exhibit a nearly trap free region close to Ec. Annealing in N2 is found to decrease Nit
between 0.3 and 0.7 eV but shows a slightly higher Nit close the conduction band compared to the
Ar case.
The Mechanism of Interface State Passivation by NO
Authors: Deák Peter , Hornos T. , Thill Christoph , Knaup Jan , Gali Adam , Frauenheim Thomas
Published: March 2009

Preliminary results of a systematic theoretical study on the reactions of NO with a model
4H-SiC/SiO2 interface are presented. We show, that nitridation is a complex process, in which the
balance between various mechanisms depends on doping and temperature. For weakly doped
(1015-16 cm-3) n-type SiC, the crucial effect is an additional oxidation without creation of excess carbon
at the interface.
Two Dimensional Imaging of the Laterally Inhomogeneous Au/4H-SiC Schottky Barrier by Conductive Atomic Force Microscopy
Authors: Giannazzo Filippo , Roccaforte Fabrizio , Liotta S.F. , Raineri Vito
Published: March 2009

We present a novel approach based on conductive atomic force microscopy (c-AFM) for
nano-scale mapping of the Schottky barrier height (SBH) between a semiconductor and an ultrathin
(1-5 nm) metal film. The method was applied to characterize the uniformity of the Au/4H-SiC
Schottky contact, which is attractive for applications due to the high reported (∼1.8 eV) SBH value.
Since this system is very sensitive to the SiC surface preparation, we investigated the effect on the
nano-scale SBH distribution of a ∼2 nm thick not uniform SiO2 layer. The macroscopic I-V
characteristics on Au/SiC and Au/not uniform SiO2/SiC diodes showed that the interfacial oxide
lowers the average SBH. The c-AFM investigation is carried out collecting arrays of I-V curves for
different tip positions on 1μm×1μm area. From these curves, 2D SBH maps are obtained with 10-
20 nm spatial resolution and energy resolution <0.1 eV. The laterally inhomogeneous character of
the Au/SiC contact is demonstrated. In fact, a SBH distribution peaked at 1.8 eV and with tails from
1.6 eV to 2.1 eV is obtained. Moreover, in the presence of the not uniform oxide at the interface, the
SBH distribution exhibits a 0.3 eV peak lowering and a broadening (tails from 1.1 eV to 2.1 eV).
XPS Study of the Electronic Properties of the Ce/4H-SiC Interface, and the Formation of the SiO2/Ce2Si2O7/4H-SiC Interface Structure upon Oxidation
Authors: Kildemo Morten , Grossner Ulrike , Svensson Bengt Gunnar , Raaen S.
Published: March 2009

The deposition and annealing in ultra high vacuum (UHV) of 5-6 monolayers (ML) of
cerium on clean reconstructed Si-face 4H-SiC (0001) is studied by x-ray photoemission
spectroscopy (XPS). Band bending as a function of annealing was studied by shifts of the bulk peak
contribution in the C1s and Si2p spectra relative to the clean reconstructed surface. Additional datapoints
for Schottky barrier formation on 4H-SiC are thus obtained by the low work function rareearth
metals, and presented in the framework of the metal-induced-gap states and electronegativity
model. A Ce/CeSi2-x/4H-SiC interface alloy forms by annealing to 850-1050oC. Kinetic information
from the oxidation of the Ce/CeSi2-x/4H-SiC interface alloy is also reported. In particular, a SiO2-
x/Ce-Si mixed oxide/4H-SiC forms upon oxidation. The shift of the C1s SiC-bulk-peak towards
higher binding energies upon oxidation indicates that the mixed Ce-Si oxide interface layer appears
to passivate the near Fermi-level 4H-SiC interface states at least as well as SiO2, and are expected to
modify the electrical interface characteristics.
Control of the Flatband Voltage of 4H-SiC Metal-Oxide Semiconductor (MOS) Capacitors by Co-Implantation of Nitrogen and Aluminum
Authors: Frank Thomas , Beljakowa Svetlana , Pensl Gerhard , Kimoto Tsunenobu , Afanas'ev Valeri V.
Published: March 2009

In n-type 4H-SiC, over-oxidation of an implanted surface-near, Gaussian nitrogen-profile
results in MOS capacitors, which possess a distinctly reduced density of interface states Dit and an
undesirable large negative flatband voltage UFB. Their values are determined by the implantation
parameters and the thickness of the oxide layer. The negative flatband voltage can strongly be
compensated in the case that a Gaussian aluminum-profile is co-implanted prior to the oxidation.
Depending on the conditions of the Al implantation, UFB can be controlled within a wide range.
Secondary ion mass spectrometry analyses reveal that the implanted N and Al atoms are mobile in
the oxide layer during the oxidation process and are partly accumulated at the SiC/SiO2 interface.
Post-Implantation Annealing of SiC: Relevance of the Heating Rate
Authors: Nipoti Roberta
Published: March 2009

With the aim to set a starting point for future investigations on the relevance of the
heating ramp on the annealing of ion implanted SiC, a review study is presented here. This study
focuses on the heating rate of different annealing setups and presents results that highlight the
relevance of the heating ramp on the morphological, structural and electrical properties of ion
implanted <0001> 4H- and 6H-SiC. The post-implantation annealing results of hot and room
temperature implanted SiC are so different that their presentation is kept distinct.
Achieving Low Sheet Resistance from Implanted P-Type Layers in 4H-SiC Using High Temperature Graphite Capped Annealing
Authors: Wang Y. , Losee Peter A. , Balachandran S. , Bhat I. , Chow T. Paul , Wang Y. , Skromme B.J. , Kim J.K. , Schubert E.F.
Published: March 2009

Low resistance p-layers are achieved in this paper using a graphite cap to protect SiC
surface from out-diffusion of Si during high temperature post-implantation annealing, which is
carried out to maximize the activation of Al dopant in 4H-SiC. With a graphite layer converted from
photoresist, as high as 1700 and 1800oC post-implantation annealing is able to be used. Low RMS
roughness of surface after high temperature annealing shows the effectiveness of the graphite cap.
Small sheet resistance and resistivity are also achieved from the high temperature annealing. At room
temperature, sheet resistances of 9.8 and 1.3 k/□, and the corresponding resistivities of 235 and
31 m-cm are obtained from 1700 and 1800oC annealed samples, respectively. The Al ionization
energy extracted from Arrhenius plot is also close to the typical reported values. Therefore, it can be
concluded that, using graphite cap could help to activate the Al dopant effectively during high
temperature annealing.
Analysis of the Electrical Activation of P+ Implanted Layers as a Function of the Heating Rate of the Annealing Process
Authors: Canino Mariaconcetta , Giannazzo Filippo , Roccaforte Fabrizio , Poggi Antonella , Solmi Sandro , Raineri Vito , Nipoti Roberta
Published: March 2009

The surface morphology and the electrical activation of P+ implanted 4H-SiC were
investigated with respect to annealing treatments that differ only for the heating rate. P+
implantation was carried out in lightly doped n-type epitaxial layers. The implantation temperature
was 300 °C. The computed P profile was 250 nm thick with a concentration of 1×1020 cm-3. Two
samples underwent annealing at 1400 °C in argon with different constant ramp up rates equal to
0.05° C/s and 40 °C/s. A third sample underwent an incoherent light Rapid Thermal Annealing
(RTA) at 1100 °C in argon before the annealing at 1400 °C with the lower ramp rate. The ramp up
of the RTA process is a few hundred degrees per second. Atomic Force Microscopy (AFM)
micrographs pointed out that the surface roughness of the samples annealed at 1400 °C increases
with increasing heating rate and that the critical temperature for surface roughening is above 1100
°C. Independently on the annealing cycle, Scanning Capacitance Microscopy (SCM) measurements
showed that the P profiles are uniform over the implantation thickness and have plateau
concentration around 9×1018 cm-3 in all the implanted samples. The fraction of P atoms activated as
donors is 13% of the total implanted fluence.
Comparison of Graphite and BN/AlN Annealing Caps for Ion Implanted SiC
Authors: Jones Kenneth A. , Wood M.C. , Zheleva T.S. , Kirchner K.W. , Derenge Michael A. , Bolonikov A. , Sudarshan Tangali S. , Vispute R.D. , Hullavarad Shiva S. , Dhar S.
Published: March 2009

4H-SiC samples implanted with 1020 Al were annealed at various temperatures with a
BN/AlN or graphite cap, and there morphological, structural, and electrical properties are
compared. No blow holes were observed in either cap. Some Si out-diffuses through the graphite
cap which results in a rougher surface and a structurally modified region near the surface. The
BN/AlN cap annealed at 1800°C cannot be readily removed, whereas the graphite cap can be
removed easily after any annealing temperature. The sheet resistances for both types of samples
were about the same.
Electrical Properties of N Ion Implanted Layer in 3C-SiC(100) Grown on Self-Standing 3C-SiC Substrate
Authors: Taguchi Etsushi , Suzuki Yu , Satoh Masataka
Published: March 2009

The electrical properties of N ion implanted 3C-SiC(100) have been investigated by
means of Hall effect measurement. The p-type epitaxial layer grown on n+ substrate is multiply
implanted with N ions with energy ranging from 15 to 120 keV at a total dose of 2.4×1015 cm-2 at
room temperature, which corresponds to the doping layer with a N concentration of 1×1020 cm-3 and
a thickness of 250 nm. The implanted sample is annealed by RF inductive heating annealer at
temperature ranging from 1000 to 1500 oC for 10 min in Ar gas flow. The sample annealed at
1000 oC shows the sheet resistance of 1 k./sq. The sheet resistance of the implanted sample is
decreased with the increase of annealing temperature. The sample annealed at 1500 oC shows the
sheet resistance of 81 ./sq. and the sheet carrier concentration of 1.6×1015 cm-2. The electrical
activity of implanted N impurity is estimated to be 68 %, which is much larger than that of N ion
implanted 4H-SiC (about 0.9 %). The higher electrical activity of implanted N impurity is attributed
to the shallower donor level than that in 4H-SiC.
Reduction of Traps and Improvement of Carrier Lifetime in SiC Epilayer by Ion Implantation
Authors: Storasta L. , Tsuchida Hidekazu
Published: March 2009

Reduction in deep level defects and increase of carrier lifetime in 4H-SiC epilayer was
observed after carbon ion implantation into the shallow surface layer of 250 nm and subsequent
annealing above 1400 °C. The concentration of Z1/2 and EH6/7 traps was determined by deep level
transient spectroscopy 4 μm below the implanted layer. After annealing, concentration of both traps
decreased from 1013 cm-3 range to below the detection limit. Minority carrier lifetime almost doubled
in the implanted samples compared to the unimplanted samples. We suggest that carbon interstitials
from the implanted layer in-diffuse into the layer underneath during annealing and annihilate with
carbon vacancies. Our results indicate that Z1/2 and EH6/7 traps are most likely carbon vacancy
related.
Selenium and Tellurium Double Donors in SiC
Authors: Reshanov Sergey A. , Weber Heiko B. , Pensl Gerhard , Schöner Adolf , Nagasawa Hiroyuki
Published: March 2009

Selenium (Se) and tellurium (Te) ions are implanted into n-type 6H-, 4H- and 3C-SiC
epilayers. Double-correlated deep level transient spectroscopy investigations reveal that both Se and
Te atoms form double donors in SiC. The number of double donors observed corresponds to the
number of inequivalent lattice sites of the particular SiC polytype. This observation is a strong hint
that Se and Te atoms reside on lattice sites. The activation energies FEa of Te double donors are
larger than the corresponding ones of Se double donors.
Trap Assisted Gas Sensing Mechanism in MISiC Capacitors
Authors: Horsfall Alton B. , Weng Ming Hung , Mahapatra Rajat , Wright Nicolas G.
Published: March 2009

We present the variation of trap assisted conduction current through a dielectric stack
comprising TiO2 and SiO2 on SiC as a function of both temperature and hydrogen gas
concentration. We show that the current can be modeled by the use of a single barrier height across
the temperature range of interest (>300oC ambient). Upon exposure to hydrogen gas, this barrier
height is reduced from 0.405 to 0.325eV, whilst the density of traps in the bulk of the TiO2 remains
unaffected. We conclude that the formation of a charge dipole layer under the palladium contact is
responsible for this change in barrier height, as has been observed in Schottky diode sensor
structures. Further, sensing the gas concentration by monitoring of the trap assisted conduction
current appears not to be influenced by the existence of interfacial traps, offering the chance to
fabricate low drift sensors for deployment in extreme environments.
Electrical Properties of Metal-Oxide-Semiconductor (MOS) Structures on 4H-SiC(0001) Formed by Oxidizing Pre-Deposited SixNy
Authors: Moon Jeong Hyun , Kim Dong Hwan , Song Ho Keun , Yim Jeong Hyuk , Bahng Wook , Kim Nam Kyun , Seo Kwang Seok , Kim Hyeong Joon
Published: March 2009

We have fabricated advanced metal-oxide-semiconductor (MOS) capacitors with ultra thin
(5 nm) remote-PECVD SixNy dielectric layers and investigated electrical properties of nitrided
SiO2/4H-SiC interface after oxidizing the SixNy in dry oxygen at 1150 °C for 30, 60, 90 min.
Improvements of electrical properties have been revealed in capacitance-voltage (C-V) and
current density-electrical field (J-E) measurements in comparison with dry oxide. The improvements
of SiC MOS capacitors formed by oxidizing the pre-deposited SixNy have been explained in this
paper.
Growth and Properties of Gadolinium Oxide Dielectric Layers on Silicon Carbide for High-K Application
Authors: Fissel Andreas , Czernohorsky M. , Dagris R. , Osten H.J.
Published: March 2009

We investigated the growth, interface formation as well as the structural and electrical
properties of crystalline gadolinium oxide (Gd2O3) directly grown on 6H-SiC(0001) substrates by
molecular beam epitaxy. The Gd2O3 layers were found to grow epitaxially resulting in the formation
of flat (111) oriented layers with the cubic bixbyite type of structure. X-ray photoelectron
spectroscopy measurements reveal a silicate-like Gd2O3/SiC interface. Furthermore, conduction and
valence band discontinuities at the Gd2O3/6H-SiC interface were estimated with 1.9 eV and 1.2 eV,
respectively. The fabricated capacitors exhibit suitable dielectric properties at room temperature;
such as a dielectric constant of ε = 22, a leakage current of 10-8 A/cm2@1V and breakdown fields >
4.3 MV/cm for layers with 14 nm thickness. The CV measurements exhibit only small negative flat
band shifts and a very small hysteresis, resulting from fixed charges or interface trap levels in the
range of 1x1012 cm-2. These properties make Gd2O3 suitable for high-k application also for SiC.
Study of Polyimide Films as Passivation for High Temperature High Voltage Silicon Carbide Devices
Authors: Diaham Sombel , Locatelli Marie Laure , Lebey Thierry
Published: March 2009

Characterizations of Al/Polyimide/Al capacitors in a temperature range extended up to
400°C are presented. The aim is to determine the retained BPDA/PPD polyimide (PI) intrinsic
dielectric and conduction properties, as a first stage in the evaluation of its ability to be applied as a
passivation material for high temperature operating silicon carbide power devices. The dielectric
constant, dielectric loss factor, and the static leakage current of the “as-prepared” Al/PI/Al
structures are strongly affected above 175°C, reaching critical values at 400°C with regard to the
aimed application. However, an evolution of these characteristics after the sample exposure at high
temperature is observed, resulting in a very good and stabilized electrical behavior even at 400°C.
Trap Assisted Conduction in High K Dielectric Capacitors on 4H-SiC
Authors: Weng Ming Hung , Mahapatra Rajat , Horsfall Alton B. , Wright Nicolas G. , Coleman Paul G. , Burrows C.P.
Published: March 2009

The characteristic of trap assisted conduction and interface states for a Pd/TiO2/SiO2/SiC
structure has been investigated at temperatures up to 500 °C. Thermally oxidized Ti/SiO2 gate
capacitors fabricated by dry oxidation in O2 were studied. The electrical measurements show the
current conduction through this capacitor structure is controlled by a trap assisted conduction
mechanism at low bias and the barrier height (φA) between the metal and the TiO2 was extracted.
The current density in the dielectric stacks is also shown to be strongly temperature dependent. The
results demonstrate that the formation of a charge dipole under the Pd contact is responsible for
barrier height and not any changes in the behaviour of the TiO2 film itself, such as a change in
concentration of trapping centres. The reported results indicate electron trapping property across the
SiO2 layer is consistent with fitting experimental results to the trap assisted conduction model.
A Case for High Temperature, High Voltage SiC Bipolar Devices
Authors: Agarwal Anant K.
Published: March 2009

The last three years have seen a rapid growth of 600 V and 1200 V SiC Schottky diodes
primarily in the Power Factor Correction (PFC) circuits. The next logical step is introduction of a
SiC MOSFET to not only further improve the power density and efficiency of the PFC circuits but
also to enable the entry of all SiC power modules in Pulse Width Modulated (PWM) based power
converters such as motor control in 600-1200 V range. The combination of SiC MOSFET and
Schottky diodes will offer 60-80% lower losses in most low voltage applications at normal
operating temperatures (< 200°C) where no significant improvements in packaging are required.
This will cover most commercial applications with the exception of those having to function under
extreme environment (>200°C) such as applications in automotive, aerospace and oil/gas
exploration. For these high temperature applications, a case can be made for 600 - 2000 V Bipolar
Junction Transistors (BJTs) and PiN diodes provided we do our homework on high temperature
packaging. A number of interesting device related problems persist in bipolar devices such as
forward voltage increase in PiN diodes and current gain degradation in BJTs. For very high voltage
(>10 kV) applications such as those found in utilities (Transmission and Distribution), Large Drives
and Traction, a case can be made for >10 kV PiN diodes, IGBTs, Thyristors and GTOs. While
IGBTs will be restricted to <200°C junction temperature, the PiN diodes, Thyristors and GTOs may
be operated at >250°C junction temperature provided that the high temperature, high voltage
packaging issues are also addressed. Significant progress has been made in the development of the
p-channel IGBTs and GTOs. The main issues seem to be the VF degradation due to stacking fault
formation and improvement of minority carrier life-time.
Comparison of Chlorine Based In Situ Etching of 4H SiC Substrates
Authors: MacMillan Mike F. , Loboda Mark J. , Wan Jian Wei , Chung Gil Yong , Carlson E.P. , Spaulding Michael J. , Deese D.
Published: March 2009

Gas phase etching of 4H SiC n+ substrates was performed utilizing chlorine containing
etch chemistries in a hot wall CVD system. Carbon and silicon vapor were added to explore
selective etching reactions on the wafer surface. The impact of the etch on the bare wafer surface as
a function of temperature and etch chemistry is investigated. Selection of the etch chemistry and
temperature are critical to ensure a smooth etched surface on which to begin epitaxial deposition.
Etching also influences defect propagation from the substrate into the epitaxial layer. The results
show etch chemistry reactions will influence the conversion of micropipes in the epi buffer layer.
Ab Initio Study of the Structural and Electronic Properties of the Graphene/SiC{0001} Interface
Authors: Mattausch Alexander , Pankratov Oleg
Published: March 2009

Employing density functional theory we investigate the model interface between
1 × 1-6H-SiC{0001} surfaces and graphene layers. We find that the first graphene layer is
covalently bonded to the SiC substrate, opposing the earlier assumption of a weak van-der-Waals
bonding. The interface at the Si-face is metallic, while on the C-face it remains semiconducting.
Further graphene layers are then only weakly bound and the typical graphitic properties of the
electronic structure appear.
Sloped Sidewalls in 4H-SiC Mesa Structure Formed by a Cl2-O2 Thermal Etching
Authors: Takenami S. , Hatayama Tomoaki , Yano Hiroshi , Uraoka Yukiharu , Fuyuki Takashi
Published: March 2009

Sloped sidewalls in 4H-SiC mesa structures on the (000-1) C face were formed by a
Cl2-O2 thermal etching method. The etching rate of 4H-SiC (000-1) C face was 10 times faster than
that of (0001) Si face, and the etching rate at 910oC was about 18μm/h. The etched surface was
rather smooth, and the sidewall of the mesa was inclined to the off-axis substrate. Taking into
account the off angle of about 8o toward [11-20] off direction, the angles of the sidewalls were
52-56o for the <1-100> and 55-57o for the <11-20> directions from the crystallographically accurate
(000-1) C face. Epitaxial pn junction diodes with the sloped sidewalls structure were fabricated,
which had good electrical properties.
Nano-Columnar Pore Formation in the Photo-Electrochemical Etching of n-Type 6H SiC
Authors: Ke Yue , Devaty Robert P. , Choyke Wolfgang J.
Published: March 2009

We have fabricated columnar nano-porous SiC by photo-electrochemical etching on the
C-face of n-type 6H SiC at constant voltage. SEM images reveal that the pores are long, straight
and parallel with diameters of about 20 nm. We have produced such layers up to 250 μm thick. The
pore morphologies for both Si and C-face SiC samples are compared and discussed as a part of the
effort to understand the growth mechanism. It is found that the constant voltage etching condition
on C-face SiC is crucial for this nano-columnar pore formation.
Porosity Dependence of the Velocity of Surface and Bulk Acoustic Waves in Porous Silicon Carbide Films
Authors: Young C.K. , Andrews G.T. , Clouter Maynard J. , Ke Yue , Choyke Wolfgang J. , Devaty Robert P.
Published: March 2009

Brillouin light scattering spectroscopy was used to probe porous silicon carbide films
formed from p-type 6H crystalline silicon carbide. The porosities of the films ranged from 30% to
58%. Surface and bulk acoustic wave velocities were measured and compared with those calculated
from the Mori-Tanaka acoustic effective medium model. Qualitative agreement is obtained
between the experimentally determined velocities and those predicted by Mori-Tanaka acoustic
effective medium models with spherical pores and, in the case of surface acoustic waves, also with
prolate spheroidal pores with shape factor equal to 0.2. The model demonstrates the importance of
morphology in determining the behavior of acoustic waves in a porous material.
4H-SiC Power BJTs with High Current Gain and Low On-Resistance
Authors: Lee Hyung Seok , Domeij Martin , Zetterling Carl Mikael , Östling Mikael
Published: March 2009

4H-SiC BJTs have been fabricated with varying geometrical designs. The maximum
value of the current gain was about 30 at IC=85 mA, VCE=14 V and room temperature (RT) for a
20 μm emitter width structure. A collector-emitter voltage drop VCE of 2 V at a forward collector
current 55 mA (JC = 128 A/cm2) was obtained and a specific on-resistance of 15.4 m2·cm2 was
extracted at RT. Optimum emitter finger widths and base-contact implant distances were derived
from measurement. The temperature dependent DC I-V characteristics of the BJTs have been
studied resulting in 45 % reduction of the gain and 75 % increase of the on-resistance at 225 oC
compared to RT. Forward-bias stress on SiC BJTs was investigated and about 20 % reduction of the
initial current gain was found after 27.5 hours. Resistive switching measurements with packaged
SiC BJTs were performed showing a resistive fast turn-on with a VCE fall-time of 90 ns. The results
indicate that significantly faster switching can be obtained by actively controlling the base current.
Developing an Effective and Robust Process for Manufacturing Bipolar SiC Power Devices
Authors: Sumakeris Joseph J. , Hull Brett A. , O'Loughlin Michael  J. , Skowronski Marek , Balakrishna Vijay
Published: March 2009

We detail a comprehensive approach to preparing epiwafers for bipolar SiC power
devices which entails etching the substrate, growing a semi-sacrificial basal plane dislocation (BPD)
conversion epilayer, polishing away a portion of that conversion epilayer to recover a smooth
surface and then growing the device epilayers following specific methods to prevent the reintroduction
of BPDs. With our best processing, we achieve a BPD density of < 10 cm-2 and an
extended defect density of < 1.5 cm-2. Specifics of low BPD processing and particular concerns and
metrics will be discussed in regard to process optimization and simplification.
Hall Effect and Admittance Measurements of n-Channel 6H-SiC MOSFETs
Authors: Lee Kin Kiong , Laube Michael , Ohshima Takeshi , Itoh Hisayoshi , Pensl Gerhard
Published: March 2009

In this paper we give a comparative study of two types of gate oxidation of n-channel 6HSiC
MOSFETs. One set of transistors was fabricated using pyrogenic oxidation with no postoxidation
annealing, and for the second set the oxide was grown in dry O2 with post-oxidation
annealing. The lateral MOSFETs show a Hall mobility of ~ 75 cm2/Vs which is essentially same for
both types of oxide. From the IV characteristics curves, the latter devices exhibit an average
effective channel mobility of 72 (± 5) cm2/Vs, whereas the former has a value of 30 (± 3) cm2/Vs.
From the capacitance and conductance measurements, the interface trap density for pyrogenicgrown
oxide using is roughly a factor of 2 greater than those grown by dry oxidation. We found that
the pyrogenic post-oxidation anneal at 1073K helps to reduce the interface states density and
improves the effective channel mobility of 6H-SiC MOSFETs.
High Temperature Characterisation of 4H-SiC VJFET
Authors: Bhatnagar Praneet , Wright Nicolas G. , Horsfall Alton B. , Vassilevski Konstantin , Johnson C. Mark , Uren Michael J. , Hilton Keith P. , Munday A.G. , Hydes A.J.
Published: March 2009

4H-SiC depletion mode (normally-on) VJFETs were fabricated and characterised at
temperatures up to 377 °C. The device current density at drain voltage of 50 V drops down from
54 A/cm2 at room temperature to around 42 A/cm2 at 377 °C which is a 20 % reduction in drain
current density. This drop in drain currents is much lower than previously reported values of a 30 %
drop in JFETs at high temperatures. The average temperature coefficient of the threshold voltage
was found to be -1.36 mV/°C which is smaller than for most Si FETs. We have found that these
devices have shown good I-V characteristics upto 377 °C along with being able to retain its
characteristics on being retested at room temperature.
FLR Geometry Dependence of Breakdown Voltage Characteristics for JBS-Assisted FLR SiC-SBD
Authors: Kim S.J. , Kim S. , Kim Sang Cheol , Kang In Ho , Lee K.H. , Matsuoka T.
Published: March 2009

We have investigated the field limiting ring (FLR) geometry dependence of breakdown
voltage characteristics for a junction barrier Schottky (JBS)-assisted FLR SiC-SBD. The SiC-SBDs
having a guard ring-assisted FLR surrounding a Schottky contact edge and an internal ring inside
Schottky contact were fabricated. The breakdown voltage characteristics of the JBS-assisted FLR
SiC-SBD are significantly dependent on the width, spacing, and number of FLR. The breakdown
voltage characteristic is improved as either the FLR width and FLR number increase or the FLR
spacing decreases. Approximately 1650 V maximal breakdown voltage, corresponding to 82% ideal
breakdown voltage, is observed with seven FLRs having 5 2m width and 1 2m spacing.