Hybrid molecular solid state memories and electronic nanodevices based on polyoxometalates and other molecules of reversible redox activity
Authors: Μπάλλιου Αγγελική-Μαρία 
Published: September 2021

According to ITRS 2.0 2015, memory technologies will continue todrive pitch scaling and highest transistor count. As DRAM products areexpected to reach their scaling limits by 2024, and unless some majorbreakthrough occurs, flash memory is expected to lead the semiconduc-tor industry towards the next revolution in transistor density.Inspired from this fact, this work focuses on molecular flash mem-ories and logic switching molecular networks which, among all emerg-ing technology candidates, are considered particularly promising due totheir ability for reduction of size per cell and solution processing (lowcost, injection-printing friendly), conceptual compatibility with photonicaddressing due to molecular photosensitivity, multilevel storage, high in-formation density, quick write-read operations, low power consumption,mechanical flexibility, bottom-up fabrication logic (overcoming the litho-graphic patterning constrains), conceptual non-binary data representationand properties’ tunability through chemical tailoring.Molecular electronic devices are fabricated via a combination of bottom-up layer-by-layer nanofabrication and self-assembly with CMOS platformlithography in order to provide a low cost large-scale route towards ex-tension of the functional value of Si-based platforms.Tungsten Polyoxometalates (POM, [PW 12 O 40 ] 3− ) of the Keggin classare being self-arranged both on nanocrystal and hyperstructure level ina rational way resulting in layers of tunable spatial correlation length.The hyperstructures exhibit tunable valence and conduction bands and,hence, adjustable electronic properties directly related to the extent ofcrystallization of their building blocks.Dimensional crossover-driven insulator-to-semimetal transitions canbe enforced in these hyperstructures via tuning the extent of crystalliza-tion in solution. Being able to transport or confine charge at will, thesehyperstructures constitute ideal candidates for alternative molecule-basedsolution-printed circuitry components and transistor channels.Hybrid CMOS/molecular memory devices based on the parallel platearchitecture are fabricated, characterized and tested. Each memory el-ement contains a planar hyperstructure of molecules (typically several millions) that can store charge having multiple times the charge densityof a typical DRAM capacitor.Transition-metal-oxide hybrids composed of high surface-to-volumeratio Ta 2 O 5 matrices and tungsten POMs are investigated as a chargestorage composite in molecular nonvolatile capacitive memory cells. En-hanced internal scattering of carriers results in a memory window of 4.0V for the write state and a retention time around 10 4 s without blockingmedium.Differential distance of molecular trapping centers from the cells gateand electronic coupling to the space charge region of the underlying Sisubstrate are being identified as critical parameters for enhanced electrontrapping for the first time in such devices.The incorporation of a molecular-friendly blocking oxide that facili-tates long term retention while suppressing cross-talking, is performedthrough realization of a multi-functional oxide stack (SiO 2 /hybrid Ta 2 O 5 -POM transition metal oxide/Al 2 O 3 ) that takes parallel advantage of photo-nically-addressed phononic modes to boost information storage and reachmolecular states that were previously non-available. A 37 % informationdensity increase is attained via phononic pumping, while the memorywindow reaches 7.0 V, corresponding to ∼ 4 × 10 14 cm 2 charging nodesable to carry 65-195 μCb/cm 2 . Ability of multi-state addressing and writespeed of 10 ns are being documented for the packed cell.The fabricated high performance non-volatile memories are the firstdocumented CMOS-compatible long term (10 years criterion satisfaction)retention molecular capacitive cell of its kind.Following a different approach, brain-inspired, neural systems per-forming in networks and data-centric non-Von Neumann processing areamong the latest trends for non-conventional approaches in the semicon-ductor industry. We focus on hybrid molecular-nanoparticle networksthat exploit the massive parallelism of designless interconnected net-works of locally active components, obviating the need for expensivelithographic steps.Molecular multi-junction networks comprising of gold nanoparticles(AuNPs) of diam.∼1.4 nm, electronically linked by means of copper 3-diethylamino-1-propylsulphonamide sulfonic acid substituted phthalocya-nine (CuPcSu) molecules are fabricated and studied.When electrons flow through the non-linked nanoparticle arrays, theyexperience on-site Coulomb repulsion and are strongly localized, with lo-calization length (ξ=0.7 nm). Under dynamic excitation the system under-goes Coulomb oscillations, while the introduction of CuPcSu moleculesresults in the formation of a network of multiple molecular/Au nanojunc-tions and conductance increases by 5 orders of magnitude. This switching behavior functions on reversible red-ox reactions andpushes carriers in a weak localization state. In this state electrons spreadover several junctions and all temperature scaled current vs voltage curves,J/T^(1+α) vs eV/kT, collapse in one universal curve, characterizing the net-work and the extent of its disorder.On the other hand, the strongly non-linear I-V response and negativedifferential resistance of drop-cast nanojunction 3-d arrays makes themsuitable platforms for logic function exhibition. Common miniaturiza-tion bottlenecks such as capacitive crosstalk, are embraced as exploitablephysical processes, that can lead to robust computational functionality.The networks can be configured on-flight with pulses as quick as 10 nsto modify their resistance between two discrete levels. Both levels can beaddressed real time utilizing patterned nano-electrode pairs and readingvoltage of the order of 500 mV. The networks are able to perform as atwo-input “then-if” logic gates.