Impact of X-Ray Radiation on SOI Mosfet: Insulator Film Degradation and Hot-Carrier Reliability
Authors: Omura Yasuhisa 
Published: February 2020

This paper discusses the impact of X-ray radiation in the SOI MOSFET in terms of hot-carrier reliability. We examine sub-micron complimentary SOI MOSFETs in order to investigate the various factors influencing device characteristics [1]. All devices were fabricated using conventional photolithography in the 1990s, and after fabrication were subjected to continuous X-ray radiation in the range of 1J/cm2 to 10J/cm2. N-channel MOSFETs are inversion-channel devices, and p-channel MOSFETs are buried-channel devices. They have 0.36-μm or 1-μm channel length and 4.5-μm or 20.6-μm channel width. Some devices were annealed at 400 C with the ambient being the forming gas. D. C. characteristics of as-irradiated devices and post-annealed devices and hot-carrier reliability of post-annealed devices were fully investigated.

Figure 1 shows front ID-VG transfer characteristics of X-ray irradiated nMOS devices and post-annealed nMOS devices. It is seen that X-ray irradiation increases the gate SiO2/SOI interface state density (Dit) and that annealing under the forming gas reduced the Dit value to almost the same value as the non-irradiated device. Figure 2 shows back ID-VB transfer characteristics of X-ray irradiated nMOS devices and post-annealed nMOS devices, where VB is the substrate voltage. It is seen that positive ionized charges are generated inside the buried oxide with 10-J/cm2 X-ray radiation, and that SOI/buried oxide interface state density increased with 1-J/cm2 and 5-J/cm2 X-ray radiation. The Dit values are not reduced to those of non-irradiated devices and non-negligible band-to-band tunneling current around the drain junction is present. It is anticipated that electron trap sites are generated inside the buried oxide but near the SOI/buried oxide [2].

Figure 3 shows front ID-VG transfer characteristics of X-ray irradiated pMOS devices and post-annealed pMOS devices. It is seen that X-ray irradiation alters the threshold voltage (VTH); the annealing under the forming gas reduced the VTH value to almost the same value as the non-irradiated device. In addition, it is seen that X-ray irradiation increases the SOI/buried oxide interface states density (Dit); the annealing under the forming gas reduced the Dit value to almost reduced the same value as the non-irradiated device. This suggests that holes near the SOI/buried oxide are not sensitive to the behavior of trap sites generated inside the buried oxide. Figure 4 shows back ID-VB transfer characteristics of X-ray irradiated pMOS devices and post-annealed pMOS devices. It is seen that the positive ionized charges are generated inside the gate SiO2, regardless of integrated X-ray radiation energy, and that the gate SiO2/SOI interface state density increases regardless of the integrated X-ray radiation energy. The Dit values and VTH values are recovered by annealing in the forming gas.

The above experimental results are summarized as

X-ray radiation generates gate SiO2/SOI interface states around the midgap of Si.

X-ray radiation generates positive ionized traps inside the buried oxide and the SOI/buried oxide interface states.

Electron trap sites are generated inside the buried oxide but near the SOI/buried oxide; these sites are not readily eliminated by annealing in the forming gas.

Holes are not sensitive to the behavior of trap sited generated inside the buried oxide.

Finally, we investigated the hot-carrier immunity of X-ray irradiated 0.36-μm gate devices. The results of pMOS devices suggest that their lifetime is strongly influenced by the SOI/buried oxide interface property, while the lifetime behavior of nMOS devices is insensitive to the SOI/buried oxide interface property.

In summary, our analysis of device characteristics strongly suggests that SOI MOSFETs have high immunity to X-ray irradiation. The devices examined here worked over 20 years after their fabrication. It can be considered that chemical structures of the thermal SiO2 film and the buried oxide film played important roles in achieving such robustness [3-5].

References

[1] Y. Omura, S. Nakashima, K. Izumi and T. Ishii, IEEE Trans. on Electron Devices, vol. 40, pp. 1019-1022, 1993.

[2] Y. Omura, “SOI Lubistors”, Wiley/IEEE press, 2013, Chapter 22.

[3] Y. Omura, Hindawi, Advances in Materials Science and Engineering, vol. 2015, ID-909523, pp. 1-8, 2015.

[4] R. Yamaguchi, S. Sato, and Y. Omura, Jpn. J. Appl. Phys., vol. 56, No. 4, pp. 041301-1-041301-6, 2017.

[5] Y. Omura, R. Yamaguchi, and S. Sato, IEEE Trans. Devices, Materials, and Reliability, (in press).

Figure 1