Simulation of Light Emission from Nano-Resistors in Solid-State Incandescent Light Emitting Devices
Authors: Shukla Abhinav , Kuo Yue 
Published: February 2020

Recently, a novel type of solid-state incandescent light emitting device (SSI-LED) that emitted broad-band warm white light was reported [1-4]. The device was made from a simple MOS capacitor with a high-k gate dielectric deposited on the p-type Si substrate [1-4]. Thermal excitation of nano-sized conductive paths, i.e., nano-resistors, formed from the dielectric breakdown of the high-k film was being cited as the explanation behind light emission. [4]. Figure 1(a) show that conductive paths were randomly and uniformly formed under the ITO electrode except a higher density near the edge [1]. Fig. 1(b) shows the light emission from a single nano-resistor [5]. In this paper, authors investigated the temperature distribution in the single nano-resistor using the simulation method. The result is then compared with the experimental data.

The previous studies demonstrated that the leakage current density vs. gate voltage (J-Vg
) curve of the SSI-LED at the |Vg
| larger than the breakdown voltage follows the Ohm’s Law [1]. Hence, it can be assumed that the conductive path behaves as a typical resistor which when stressed under the large Vg
experiences Joule heating. Joule heating is a multi-physics process where the energy of an electric current is converted into heat as it flows through a resistor. In this work the COMSOL Multiphysics® 5.2a software was utilized to setup a 3D mathematical model. The modeling process follows the standard procedure of combining differential forms of continuity equations for:

Electric Current Density
J
,

Heat Flux Density
q
,

with constitutive equations:

J = -σ grad(ψ) (Ohm’s Law),

q = -κ grad(T) (Fourier’s Law),

where ψ is the electric potential, T is the temperature, σ is the electrical conductivity, and κ is the thermal conductivity of the nano-resistor.

Material properties of the high-k dielectric film, substrate, and ITO gate, such as density, electrical conductivity, specific heat, thermal conductivity, and permittivity, were taken from literatures [6-8]. Since the material nature of the nano-resistor was unknown, certain properties were estimated within the framework of scientific principles. For instance, the thermal conductivity was estimated using the Wiedemann-Franz Law which states that the ratio of the electronic contribution of the thermal conductivity (κ) to the electrical conductivity (σ) of a metal is proportional to the temperature. Electrical conductivity was estimated from the J-Vg
characteristics of the device as reported earlier [9]. The resistivity of the single nano-resistor was about 103 Ω⋅cm in the high gate voltage range [9]. The barrier height at the nano-resistor to Si substrate contact, which was about 0.66 V [9], was neglected for model simplification. The density and specific heat capacity of the nano-resistor were assumed to be the same as those of the hafnium oxide high-k dielectric material [7,8]. The finite element method was used to solve the electromagnetic field and heat transfer equations. Fig. 1(c) shows the top view of the temperature distribution within and around a single nano-resistor. Fig. 1(d) shows the cross-sectional view of the temperature distributions in two adjacent 20 nm-diameter nano-resistors in a triangular arrangement and separated by 100 nm.

The electric potential contours in the high-k dielectric film were drawn at different gate voltages to understand the distribution of conductive paths formed after the dielectric breakdown. The breakdown voltage (VBD
), as per the reported experimental data, was -7 V [1]. The distribution of nano-resistors is assumed randomly formed across the gate electrode area. Nano-resistors in different geometrical arrangements and sizes were used to calculate temperatures within and around them. The temperature distribution was simulated under different gate voltage stress conditions.

[1] Y. Kuo and C.-C. Lin, Appl. Phys. Lett.,
102, 031117 (2013).

[2] Y. Kuo and C.-C. Lin, Electrochem. Solid-State Lett.
,
2, Q59 (2013).

[3] Y. Kuo and C.-C. Lin, Solid-State Electron., 89, 120 (2013).

[4] C.-C. Lin and Y. Kuo, Appl. Phys. Lett., 106, 121107 (2015).

[5] Y. Kuo, IEEE Trans. Electron Devices, 62 (11), 3536 (2015).

[6] T. Ashida, A. Miyamura, N. Oka, Y. Sato, T. Yagi, N. Taketoshi, T. Baba and Y. Shigesato, J Appl. Phys., 105, 073709 (2009).

[7] M. A. Panzer, M. Shandalov, J. A. Rowlette, Y. Oshima, Y. W. Chen and K. E. Goodson, IEEE Electron Device Lett., 30 (12), 1269 (2009).

[8] E. A. Scott, J. T. Gaskins, S. W. King and P. E. Hopkins, APL Materials, 6 (5), 058302 (2018).

[9] S. Zhang and Y. Kuo, ECS Trans., 77 (2), 63 (2017).

Figure 1