bluuebunny/crossref_metadata_2025 huggingface dataset:
Stereolithographic Additive Manufacturing of Diamond Photonic Crystal Composed of Titania and Alumina Micro Lattices
Authors: Kirihara Soshu
Published: October 2015

Three dimensional micro photonic crystals with a diamond structure made of a dense titania and alumina were fabricated successfully by using stereolithographic additive manufacturing. Photonic band gap properties were investigated in gigahertz and terahertz wave frequency ranges. Acrylic diamond lattice structures with nanometer sized particles of titania and alumina dispersion at 40 vol. % were fabricated by the stereolithography. The forming accuracy was 10 μm. After dewaxing and sintering process, the titania and alumina diamond lattice structures were obtained. The relative density reached above 98 %. Electromagnetic wave transmittances were measured by using a W-band millimeter waveguide connected with a network analyzer and a terahertz wave time domain spectroscopy. In the transmission spectra for the Γ-X <100> direction, a forbidden band was observed at 90 – 110 GHz and 0.4 – 0.6 THz. The band gap frequencies well agreed with calculated results by plane wave expansion (PWE) method. Additionally, simulated results by transmission line modeling (TLM) method indicated that a localized mode can be obtained by introducing a plane defect between twinned diamond lattice structures.
Advanced Surface Finishes for Ceramic Electronics for Soldering, Conductive Adhesive, Aluminum- , Gold-, and Copper Wire Bonding.
Authors: Bruder Maren , Heinz Guenter , Oezkoek Mustafa
Published: October 2015

Surface finishes for ceramic electronics are an important feature. . The suitable surface finish allows the appropriate assembly technology to be performed on the ceramic substrate. The paper will present the possible surface finish options for ceramic substrates and include the advantages and challenges of each surface finish. Furthermore it will show the potential of a new surface finish called “Direct EPAG”. The demand for these new finishes is based on needs for new assembly technologies like copper wire bonding and for high frequency applications. Furthermore Nickel which the main layer of many surface finishes like ENIG or ENEPIG, is more and more regarded as an unpleasant element due to several disadvantages.

All these concerns are supporting the introduction of a new surface finish called “direct EPAG” (Electroless Palladium, Autocatalytic Gold) finish. In particular, its suitability for copper wire bonding and its fine line capability makes it very attractive from a cost standpoint. In addition, the mentioned technological drawbacks of nickel based finishes could be solved by applying a revolutionary surface finish: “direct palladium with an optional direct gold layer on copper”. The direct deposition of palladium on copper with an optional gold layer does have a number of technological, environmental and economic benefits. The suggested paper will describe and discuss the advantages and challenges using this new surface finish. It will also exhibit the results of various soldering and wire bond tests on the EPAG finish.
Application of Cylindrical Pipe-Type LTCC Substrates as a Platform for Multi-Array Gas Sensors
Authors: Kita Jaroslaw , Brandenburg Annica , Moos Ralf
Published: October 2015

Thick-film technology-based gas sensors have been known for many years. On a ceramic substrate, a thick-film heater, electrodes, and a gas sensitive layer are deposited. Due to the ease of layer deposition, such structures are usually manufactured as planar ones. However, recently-suggested cylindrical pipe-type substrates made in LTCC technology offer unique inherent advantages for gas sensor technology, like a uniform temperature profile along the gas sensitive layer or a reduction of the distortion of the gas flow in the pipe.

As shown in our previous study, cylindrical LTCC substrates with inner electrodes and integrated heaters may be very promising in the field of high-temperature gas sensors. In this paper, we continue our work on cylindrically shaped LTCC sensor substrates, with special focus on the construction of a platform with multiple heater/electrodes couples for multi-array gas sensors. For such multi-sensor structures, decoupling of the heat sources is the most important platform feature. Therefore, a cylindrical substrate with integrated heaters was FEM-modeled and optimized in the first stage. Subsequently, tubes with three integrated heaters were prepared. In this paper, it is discussed how reduced thermal masses can be obtained by thinner tube walls or by the integration of laser-patterned cavities and how different integrated heat sources can be decoupled.
Integration of Silver Heat Spreaders in LTCC utilizing Thick Silver Tape in the Co-fire Process
Authors: Welker T. , Günschmann S. , Gutzeit N. , Müller J.
Published: October 2015

The integration density in semiconductor devices is significantly increased in the last years. This trend is already described by Moore's law what forecasts a doubling of the integration density every two years. This evolution makes greater demands on the substrate technology which is used for the first level interconnect between the semiconductor and the device package. Higher pattern resolution is required to connect more functions on a smaller chip. Also the thermal performance of the substrate is a crucial issue. The increased integration density leads to an increased power density, what means that more heat has to dissipate on a smaller area. Thus, substrates with a high thermal conductivity (e. g. direct bonded copper (DBC)) are utilized which spread the heat over a large area. However, the reduced pattern resolution caused by thick metal layers is disadvantageous for this substrate technology. Alternatively, low temperature co-fired ceramic (LTCC) can be used. This multilayer technology provides a high pattern resolution in combination with a high integration grade. The poor thermal conductivity of LTCC (3 … 5 W*m−1*K−1) requires thermal vias made of silver paste which are placed between the power chip and the heat sink and reduce the thermal resistance of the substrate. The via-pitch and diameter is limited by the LTCC technology, what allows a maximum filling grade of approx. 20 to 25 %. Alternatively, an opening in the ceramic is created, to bond the chip directly to the heat sink. This leads to technological challenges like the CTE mismatch between the chip and the heat sink material. Expensive materials like copper molybdenum composites with matched CTE have to be used. In the presented investigation, a thick silver tape is used to form a thick silver heat spreader through the LTCC substrate. An opening is structured by laser cutting in the LTCC tape and filled with a laser cut silver tape. After lamination, the substrate is fired using a constraint sintering process. The bond strength of the silver to LTCC interface is approx. 5.6 MPa. The thermal resistance of the silver structure is measured by a thermal test chip (Delphi PST1, 2.5 mm × 2.5 mm) glued with a high thermal conducting epoxy to the silver structure. The chip contains a resistor and diodes to generate heat and to determine the junction temperature respectively. The backside of the test structure is temperature stabilized by a temperature controlled heat sink. The resulting thermal resistance is in the range of 1.1 K/W to 1.5 K/W depending on the length of silver structure (5 mm to 7 mm). Advantages of the presented heat spreader are the low thermal resistance and the good embedding capability in the co-fire LTCC process.
Electrical characterization of thick film materials
Authors: Rebenklau L. , Gierth P. , Grießmann H.
Published: October 2015

The thick-film technology is one of the fundamental technologies for the production of circuit carriers for electronic modules. It is mainly used in areas with harsh environmental conditions, such as sensor or automotive applications. Basis of the thick film technology are glass-based pastes, which are screen printed on ceramic substrates and fired in a high temperature process at (500…1000) ° C. Such thick film pastes are commercially available from various suppliers as elements of paste systems, which mainly include compatible isolation, resistance and conductive pastes.

There are a number of requirements according the fired thick film characteristics, such as high breakdown voltage of isolation thick films or low noise performances of resistance thick films. However, the most requirements are concentrating on conductor thick films. They should guarantee excellent properties in terms of assembling (soldering, bonding) which are focused in a many publications. Simultaneously, they should also offer very good electrical characteristics that have not been completely investigated until today.

At Fraunhofer IKTS different measurement methods are developed and adapted to characterize the electrical performance of thick film structures. Already well known is the short term overload (STOL) measurement of thick film resistances, which determining the maximum power dissipation of the thick film structure. The basic concept of this measurement is adapted on conductive thick film structures like conductive tracks or vias. The investigations show correlations between geometrical thick film properties and the resulting thermal characteristics of the thick film structure. Results can be used to improve screen-printing layouts in terms of cost reduction (paste consumption) and thermal management (track width, via diameter), but can also help to improve paste compositions itself. The paper will give an overview of the used electrical measurement methods and present exemplary results.
Mechanical characterization of miniaturized functional substrates and components in different environments
Authors: Bermejo Raul , Krautgasser Clemens , Deluca Marco , Pletz Martin , Supancic Peter , Aldrian Franz , Danzer Robert
Published: October 2015

Functional components such as multilayer low temperature co-fired ceramics are examples of the combination of a ceramic-based substrate with internal electrodes as well as surface features (e.g. metallization, contacting pads, cylindrical vias, etc) employed to provide the component with a given functionality. Another example is that of functionalized silicon chips to be embedded into polymer circuit boards in order to enhance integration and save costs. The functionality of the system can be influenced by the mechanical reliability of the different components. Due to miniaturization and design complexity, no standard methods for mechanical testing can be applied for the characterization of these brittle components.

In this work, an experimental approach is presented, which enables determining the strength distribution in functional components (e.g. rectangular plates as small as 2 × 2 × 0.1 mm3) in different environments at different temperatures. The method is based on localized biaxial testing using a ball-on-three-balls fixture. The high accuracy of the test allows quantifying the effect of surface quality, surface features and/or metallization (e.g. contact pads or cylindrical vias) on the component strength distribution.

Experimental findings show that the strength distribution of ceramic components can be affected by environmental degradation, whereby subcritical crack growth phenomena can be enhanced in environments with high relative humidity. In addition, metallization at the surface subjected to tensile stresses can even raise the strength of the component, acting as a protective layer against environmental degradation, whereas cylindrical vias can become weak points in the design. It is shown that functionalized layers such as those used in silicon chips can have a significant effect on the strength parameters, thus influencing the lifetime of the device.
Optimization of Electromagnetic Coupling to Ceramic Resonators for Magnetic Resonance Imaging Applications
Authors: Pyrz Matthew , Lanagan Michael T. , Perini Steven E. , Neuberger Thomas , Chen Fang , Semouchkina Elena
Published: October 2015

Research into the properties of dielectric resonators can provide insight to potential applications in magnetic resonance imaging (MRI) technology as replacements for the radiofrequency (RF) coils used in current designs. Increasing the strength of the external magnetic field offers several advantages, including improved signal-to-noise ratio (SNR) and spectral resolution. However, this increase in field strength may require an alternative coil design as traditional RF coils have numerous difficulties at higher frequencies such as low quality factor. A potential solution may be to replace these coils with dielectric resonators. The objective of this research project is aimed at gathering information pertinent to dielectric resonators with various boundary conditions. Specifically, probe design and alternative coupling methods were investigated using network analyzers to provide insight into methods that could increase power supplied to the resonator, allowing it to generate strong RF magnetic fields within MRI equipment. By implementing a full loop probe design around the ceramic resonator, the effective power transmission was increased by 70.6% to −9.60 dB in the experimental design and by 75.7% to −15.6 dB when it was used in the MRI probe. However, this strong increase in signal transmission, made possible through the replacement of the original 12 mm diameter coil, had unintentional consequences in that the resonant frequency could be tuned to a minimum of 605 MHz instead of the ideal 600 MHz. In order to correct for this, a thin plate of CaTiO3 was added to the side of the existing resonator disk to achieve a lower resonant frequency.
The influence of carbon additions on structure and properties of composites manufactured via powder metallurgy method
Authors: Hekner Bartosz , Myalski Jerzy
Published: October 2015

This paper presents an influence of reinforcement and additions types on tribological properties for composite materials produced for potential application in high loaded friction point. The influence of carbon nanotubes or amorphous form of carbon on tribological properties was subject of authors' interest. A technology of materials manufacturing based on preparation of composite powders using high energy ball milling, with subsequent hot pressing in the semi-liquid phase. All materials based on an aluminum alloys, with silicon carbide (SiC) or silicon nitride particles (Si3N4) applied as a reinforcement. As a additions 1 wt.% of multiwalled carbon nanotubes (CNT) or 5 wt.% of glassy carbon particles (GCp) were used. A proper parameters selection (speed, powder to ball ratio, time ect.) of high energy milling led to fragmentation of ceramic particles up to nano- or submicro scale with desirable homogenization in whole volume of solid material. Due to partially crushed of glassy carbon particles, their size was between 2 – 200 μm. However GCp revealed also proper distribution in volume of composite. Moreover, the good quality of bonding between matrix and reinforcement particles were achieved due to high energy during milling.

For manufactured materials a rating of tribological properties (coefficient of friction, wear rate, ect.) at ambient and high temperature were made. The research confirmed that, due to desirable coefficient of friction (COF) value and low mass loss, manufactured materials can be applied in automotive industry, eg. for brake pads. A high stability of COF on desirable value (0.5 – 0.8) was observed up to temperature higher than 500 °C. The application of carbon additions resulted in increasing of friction properties. The material with silicon nitride as a reinforcement and glassy carbon particles addition revealed the best friction properties between analysed materials.
Investigation of inhomogeneous shrinkage of partially crystallizing Low Temperature Co-fired Ceramics (LTCC)”
Authors: Lenz Christian , Kappert Sandro , Ziesche Steffen , Partsch Uwe , Neubert Holger
Published: October 2015

The aim of our study is an improved level of geometrical design fidelity of LTCC microsystems by consideration of location-dependent shrinkage under free sintering conditions. To achieve this, the commercial low temperature co-fired ceramic (LTCC) systems: DuPont GT 951, DuPont 9k7 and Heraeus CT 702 have been investigated experimentally with special regard to the local lateral shrinkage over a 4 inch × 4 inch substrate typically used for the fabrication in multiple panels. Partially crystallizing LTCC materials reveal a significant local dependence of the lateral shrinkage. This dependence is introduced as a shrinkage field. Furthermore, we present an approach for shrinkage field approximation and forecasting. Applied to shrinkage allowance, it allows for minimizing the geometrical deviations after sintering from designed dimensions. Alternatively to a design adapted to the forecasted shrinkage field, local shrinkage deviations can be minimized by sintering for homogeneous shrinkage. Detailed analyses of the DuPont GT 951 system indicate a strong influence of the temperature profile during the free sintering on the shrinkage field. By utilizing this influence, a homogenous shrinkage field can be achieved for optimized heating rate and dwell time at the peak temperature 850 °C.
Fabrication and Characterisation of Vibration and Wind Energy Harvesters Using Multi-layer Free-standing Piezoelectric Thick-films
Authors: Bai Yang , Hughes Hana , Tofel Pavel , Meggs Carl , Button Tim W.
Published: October 2015

This paper demonstrates the feasibility of fabricating energy harvesters based on piezoelectric cantilevers with a free-standing thick-film structure. Demonstrator devices have been designed, built and evaluated in a range of mechanical coupling configurations, in order to harvest energy from machinery vibrations and weak air flow. In terms of wideband vibration energy harvesters, arrays of the individual harvesters were assembled onto plastic test circuit boards integrated with diode bridge rectifiers. The harvesters were designed with different dimensions and various tip masses were attached on the tip of the cantilevers in order to individually tune the resonant frequencies. The assembled harvesters were tested under harmonic vibration conditions. Great potential of harvesting vibration energy and broadening working bandwidth has been exhibited. In terms of the harvester for weak air flow, two individual cantilever devices were assembled on the chassis of a free-spinning fan. Permanent magnets were fixed on the blades of the fan as well as the cantilevers. The device was tested in an open fluidic environments. The air flow has been successfully transferred to axial oscillations thus driving the cantilevers bending up and down. Possibilities of such devices being optimised to meet the requirements of real applications of self-powered wireless sensor networks can be foreseen.
NiC: a highly sensitive functional layer based on a nickel/graphene thin film for pressure and force sensors.
Authors: Koppert Ralf
Published: October 2015

A functional layer based on nickel and graphene called NiC was developed with the goal of a high strain sensitivity in combination with an adjustable temperature coefficient of resistance (TCR). A gauge factor up to 30 and TCR values of approximately 0±25 ppm/K can be achieved by variation of the film composition. Based on the increased sensitivity the important pressure range of below 2.5 bar is opened up for steel membrane pressure sensors without the need of a sophisticated technical effort.

First pressure and force sensors with NiC functional layers were realized in order to demonstrate the high performance of this new material. The enlarged sensitivity of the film leads to a complex re-development of the microsystems “pressure and force sensors” in order to take the advantage of the high linearity, low hysteresis, high overload protection and stability. Due to the high sensitivity, it is possible to produce sensors with significantly increased stability values in the overload region. Using the same output voltage range as usual with NiCr thin film elements, the overload capability of the sensors with the new functional layer is about twenty times the characteristic value of NiCr sensors. On the other hand, the low pressure range is opened up since the membrane needs to be deformed only one tenth of its usual value. Because of this low stress the load cycle stability increases accordingly. Additionally base body materials like 1.4435 (316L), which are not very suitable for the production of pressure sensor membranes, can be used for example for hydrogen applications.
Porous thick-film silver metallisation for thermally mismatched brazing operations in tokamak magnetic sensor
Authors: Jacq Caroline , Maeder Thomas , Güniat Lucas , Corne Adrien , Testa Duccio , Ryser Peter
Published: October 2015

A novel sensor based on thick-film + LTCC (low-temperature cofired ceramic) technology has been recently developed for sensing high-frequency 3D magnetic fields in tokamak fusion devices. For integration within the walls of the tokamak, the sensor has to be connected to the mineral-insulated cabling, which is carried out by brazing to ensure sufficient thermal stability. However, thermal mismatch stresses between the braze and the cable vs. the alumina substrate may cause local cracking of the latter during cooling, as the basic dense silver metallisation of the alumina does not provide a sufficient degree of stress decoupling. To address this issue, a series of porous metallisations have been formulated by incorporation of a mix of silver and fugitive graphite powder into a thick-film paste. To allow co-firing of thick, multi-layered prints. Such porous metallisations have allowed successful brazing operations, without cracking of the alumina substrate. Metallisations were assessed by measuring their electrical resistivity and shear stress have been realised as preliminary results to measure the influence of the porosity on the maximal stress before cracking.
A Low Temperature Cofired Ceramic Microfluidic Calorimeter for ELISA Biosensing
Authors: Brummel Benjamin , Berron Bradley , Eitel Richard E.
Published: October 2015

The expense and difficulty of current biomarker detection methods is driving the design of microfluidic detection platforms. A ceramic microfluidic biosensor has been developed for conducting enzyme-linked immunosorbent assays (ELISA) using a novel polymerization amplified thermal detection (PATD) scheme. Prototype testing has yielded several results that support the viability of this device. It was seen that LTCC is an effective and durable substrate for the temperature sensor. Noise testing with our prototype revealed that our temperature sensors can detect changes as small as 0.01 K. Additional temperature testing showed that the thermistor behavior matches the expected thermistor beta equation. Finally, it was shown that polymerization reaction induction time is inversely proportional to glucose oxidase (GOx) initiator concentration. These preliminary results provide a foundation for future work developing the sensor into a protein detection device with cancer prognosis applications.
Transient Liquid Phase Soldering for lead-free joining of power electronic modules in high temperature applications
Authors: Ehrhardt Christian , Hutter Matthias , Oppermann Hermann , Lang Klaus-Dieter
Published: October 2015

The study focuses on a new variant of transient liquid phase soldering (TLPS) using tin based solder with copper powder. This technology may act as an alternative for lead free joining of semiconductor dies in power electronic applications at high operating temperature. Lead-free joining technologies currently used like gold-rich solders and silver sintering are well suited for high temperature applications. However, due to the high metal price they have a limited acceptance.

Using a special soldering process it is feasible to produce an almost void-less solder joint, using a paste of tin-based solder powder (e.g. SAC305), copper powder and a solvent which is hardly activated. The resulting interconnection is characterized by an almost complete transformation into intermetallic phases of Cu6Sn5 and Cu3Sn. Thus the melting point of the transformed interconnect can be increased up to the decomposition temperature of the Cu6Sn5 intermetallic phase which is 415 °C. A two-step soldering process allows to eliminating the typical skeleton structure that forms as a result of the immediate reaction of the liquid tin-based solder with the higher melted copper powder to form the Cu6Sn5 and Cu3Sn intermetallic phases. An alternative way compared to the two-step-process is also explained in this study: Capillary forces let the solder flow into the gap filled with Cu spheres.
Highly Reliable Double-sided Bonding used in Double-sided Cooling for High Temperature Power Electronics
Authors: Yoon Sang Won , Glover Michael D. , Mantooth H. Alan , Shiozaki Koji
Published: October 2015

This paper demonstrates the feasibility of double-sided die attachment bonding, a key technology for double-sided cooling structures, using copper-tin transient liquid phase (Cu-Sn TLP) bonding. Recently, double-sided cooling has drawn particular interest by providing a notable improvement in thermal management and increasing allowable power density for automotive power electronics. The use of TLP bonding for double-sided attachment avoids a number of complications in the assembly process, enables multiple attachments, and provides a high bonding quality and reliability at high temperature operation (because of its high re-melting temperature). In addition, Cu-Sn TLP facilitates high thermal and electrical conductivities, which exactly correspond to the aim of double-sided cooling. Cu-Sn TLP bonding is developed using silicon dummy dies and DBC (direct bonded copper) substrates. The feasibility of double-sided Cu-Sn TLP bonding is demonstrated by (1) proof-of-concept fabrication, (2) optical analysis using optical microscopy and SAM, and (3) material identification using SEM and EDX analysis.
Characteristics of High Temperature Switch Mode Power Supplies
Authors: Snyder Harold L.
Published: October 2015

High temperature switch mode power supplies (SMPS) typically use transformers with much lower permeability than those used in commercial or industrial SMPS systems. The design characteristics of these low permeability transformers are discussed, simulated in SPICE with Jiles-Atherton models and measurements are presented for a single forward based design.
End of Life Failure Modes for Packaged SOI Devices for Signal Conditioning and Processing Applications
Authors: Riches S T , Johnston C , Crossley A , Grant P
Published: October 2015

Silicon on Insulator (SOI) device technology has been shown to be capable of functioning satisfactorily at operating temperatures of >200°C. Most of the applications to date have required performance for short times (<2,000 hours) at the highest operating temperatures of up to 225°C in down-well drilling applications. There is interest in extending the endurance of high temperature electronics into aero-engine and other applications where a minimum 20 year operating life is stipulated. In order to gain confidence in high temperature electronics that can meet this requirement, accurate reliability data are needed and end of life failure modes need to be identified. Most of the reliability data on the high temperature endurance of the integrated circuit is generated with little consideration of the packaging technologies, whilst most of the reliability data pertinent to high temperature packaging technologies uses test pieces rather than devices, which limits any conclusions relating to long term electrical performance.

This paper presents results of temperature storage and cycling endurance studies on SOI devices combined with high temperature packaging technologies relevant to signal conditioning and processing functions for sensors in down-well and aero-engine applications. The endurance studies have been carried out for up to 11,088 hours at 250°C, with functioning devices being tested periodically at room temperature, 125°C and 250°C and rapid thermal cycling from −40°C to +225°C. Different die attach and wire bond options have been included in the study and the performance of several functional blocks on the SOI device has been tracked over the endurance tests. The failure modes observed on completion of the endurance tests include die cracking and deterioration of the device bond pads accelerated due to degradation of some die attach materials. The routes to achieving stable long term performance of packaged devices at temperatures of 250°C will be outlined.
Combined Temperature and Vibration Testing for Wire Bond Interconnections in Harsh Environment Electronics
Authors: Mirgkizoudi M. , Liu C. , Conway P. , Riches S.
Published: October 2015

The performance of electronics located in harsh environments is often affected by a combination of environmental factors. Qualification tests on such electronics are normally carried out by separate environmental tests such as temperature storage, temperature cycling and vibration tests. This approach may mask the effects of combined parameters, where degradation in a vibration environment may be accelerated by temperature related effects on material properties, for example.

This paper presents details of an initial study into the combined effects of temperature and vibration on wire bonded interconnections used in the production of high temperature electronic components. The study is focused on the testing of electronic components under the combination of temperature exposure up to 250°C and vibration loading with a frequency range between 50Hz and 2000Hz and acceleration up to 20g rms. The study covers the fundamental aspects of wire bond connections and their failure mechanisms, where the effect of wire loop height and length under separate and combined vibration and temperature tests has been investigated. The study has also assessed the effect on packaged silicon on insulator (SOI) devices assembled into ceramic packages under representative combined temperature and vibration profiles. The work has shown that the combined effect of temperature and vibration has increased the susceptibility of wire bond interconnections to vibration induced failures and vibration testing under the applied temperature is recommended for assessment of components for harsh environments.
VEGA & RIGEL: New tiny high temperature adjustable voltage regulators for reduced PCB footprint and extended reliability of medium and high temperature systems
Authors: Delatte Pierre , Vanzieleghem Etienne , François Thomas , Doucet Jean-Christophe
Published: October 2015

This paper presents two new tiny high-temperature adjustable voltage regulators. CHT-VEGA can regulate a 5V ±10% input voltage to an output within the range 1.1V to 3.6V and delivering up to 500mA at 225°C (junction). The output voltage is set by an external resistor divider and is maintained within +/−5% total accuracy in all load, line and temperature conditions. The second device, CHT-RIGEL, supports a wide input voltage range up to 30V; its output is adjustable between 1.8V and 24V, with up to 100mA capability at 225°C. Both chips feature a thermal shut-down with a threshold in the 250∼300°C range: the first over-temperature protection of this kind in high temperature devices. CISSOID created a new TDFP SMD package that combines tiny size and good thermal resistance. A detailed thermal characterization is presented, as well as what it means for the operating temperature, and the impact on PCB footprint and system cost. As a conclusion, will be highlighted the benefits of using such ICs rated 225°C at junction level, even if the ambient temperature of the application remains low (e.g. 175°C), and in particular the impact on reduction of the PCB footprint, compared to 175–210°C ratings.
Temperature Induced Voltage Offset Drifts in Silicon Carbide Pressure Sensors
Authors: Okojie R.S. , Lukco D. , Nguyen V. , Savrun E.
Published: October 2015

We report the reduction of transient drifts in the zero pressure offset voltage in silicon carbide (SiC) pressure sensors when operating at 600 °C. The previously observed maximum drift of ± 10 mV of the reference offset voltage at 600 °C was reduced to within ± 5 mV. The offset voltage drifts and bridge resistance changes over time at test temperature are explained in terms of the microstructure and phase changes occurring within the contact metallization, as analyzed by Auger electron spectroscopy and field emission scanning electron microscopy. The results have helped to identify the upper temperature reliable operational limit of this particular metallization scheme to be 605 °C.
Determination of the Creep Properties of Pb-free Solders for Harsh Environments Using Meso-scale Testing
Authors: Desmarest S. Godard , Johnston C. , Grant P. S.
Published: October 2015

Solder joints in electronic packages are prone to failure due to the evolution of thermal expansion mismatch strains during thermal cycling. The comparatively wide operating temperature range and long lifetimes of aerospace electronics require high reliability solder joints. Since 2006, high reliability industries (aerospace and military amongst others) that are exempt from lead-free RoHS regulation on account of concerns over the reliability of Pb-free solders have found it increasingly difficult and expensive to continue using traditional Sn-Pb-based solders. Hence there is a pressing need to find a suitable alternative that can match the manufacturing and reliability performance of Sn-Pb. There remains a dearth of data for the constitutive behaviour of Pb-free solders under harsh environment scenarios. Unfortunately, conventional test approaches, particularly in the case of creep behaviour which is critical to solder lifetimes, are expensive and time-consuming. High temperature nanoindentation has been recently developed as a quick method for the determination of creep properties of solder alloys. This paper compares and contrasts nanoindentation creep results for bulk Pb-Sn and lead-free solders. However, there are limits to nanoindentation creep, in particular the load-dependence of the technique. A new meso-scale test approach that lies between nanoindentation and bulk creep testing has been developed. Real ball grid arrays using Pb-free solders have been creep tested in the temperature and stress ranges of operating solder joints. High temperature creep constitutive data has been obtained. The technique offers promising time and materials savings in obtaining important mechanical property data for subsequent use in life-prediction models.
Investigation of Photo-Imageable Thick Film Metallization on Low Temperature Cofired Ceramics (LTCC) for Improved Packaging Density
Authors: Shen Zhenzhen , Johnson R. Wayne , Zhang Tan , Shaddock David
Published: October 2015

With the increasing electronics demand on complexity and functionality, low temperature cofired ceramic (LTCC) shows its advantages for cost efficiency under high volume, multilayer high packaging density, and compatibility of passive components integration. However, compared with thin film technology, the minimum thick film line width and spacing on LTCC is 4mil, which limits the packaging of fine pitch devices. In this study, one of DuPont™ photoimageable thick film gold (Au) conductors has been selected to fabricate on DuPont 951PX substrate, with the patterns as small as 1mil. Surface insulation resistance (SIR) and serpentine resistance patterns with a series of line width and spacing was printed and post fired on LTCC to investigate the capabilities and limits of the feature size. Feature dimensions were measured to compare with the design value. Metal adhesion and stud bump patterns are also included in the test substrate. After initial testing, the substrates are undergoing 300°C aging. Post aging resistance measurement, metallization adhesion pull test and Au stud bump shear test are carried out to evaluate its high temperature behaviors.
Updated Analysis of Circuit Reliability Test Results
Authors: Watts Milton
Published: October 2015

The downhole oil and gas market is continually pushing for higher reliability at higher temperatures. Satisfying this need requires continuous improvement, driven by failure analysis of both internal testing and field returns. This paper discusses recent lessons learned from on-going tests. Results of unpowered circuit assembly tests are reviewed. Also, a detailed analysis of separate powered life testing is presented. The internal testing results are further discussed in the context of field return data.
A High-Temperature Folded-Cascode Operational Transconductance Amplifier in 0.8-μm BCD-on-SOI
Authors: Su C. , Blalock B. J. , Islam S. K. , Zuo L. , Tolbert L. M.
Published: October 2015

The rapid growth of the hybrid electric vehicles (HEVs) has been driving the demand of high temperature automotive electronics target for the engine compartment, power train, and brakes where the ambient temperature normally exceeds 150°C. An operational transconductance amplifier (OTA) is an essential building block of various analog circuits such as data converters, instrumentation systems, linear regulators, etc. This work presents a high temperature folded cascode operational transconductance amplifier designed and fabricated in a commercially available 0.8-μm BCD-on-SOI process. SOI processes offer several orders of magnitude smaller junction leakage current than bulk-CMOS processes at temperatures beyond 150°C. This amplifier is designed for a high temperature linear voltage regulator; the higher open-loop gain of this amplifier will enhance the overall performance of a linear regulator. In addition, the lower current consumption of the OTA is critical for improving the current efficiency of the linear regulator and reducing the power dissipation at elevated temperature. A PMOS input pair folded cascode OTA topology had been selected in this work, PMOS input pair offers wider ICMR (input common-mode range) and empirically lower flicker noise compared to its NMOS counterpart. By cascoding current mirror load at the output node, the folded cascode OTA obtains higher voltage gain than the symmetrical OTA topology. The PSRR (power supply rejection ratio) is also improved. A on-chip temperature stable current reference is employed to bias the amplifier. The amplifier consumes less than 65μA bias current at 175°C. The core layout area of the amplifier is 0.16mm2 (400 μm × 400 μm).
Development of a SiC SSPC Module with Advanced High Temperature Packaging
Authors: Hopkins Douglas C , Guo Yuan-Bo , Dwyer Herbert E , Scofield James D.
Published: October 2015

Development of a multi-chip power module (MCPM) is reported that uses advanced metal-matrix composite aluminum packaging to manage high thermally induced stresses in devices that incur 350°C transients. The MCPM uses parallel SiC devices to control 120A DC nominal, 1200A fault in a 270V DC system. Electrical system modeling is presented to characterize electrical fault transients that induce electrical and thermal stresses in the semiconductors and packaging. The characterization of the advanced aluminum-based packaging system, which uses composites, such as AlSiC, and direct bonded aluminum (DBA), is discussed to manage the thermal stresses and transient heat flow.
The Behaviour of Au-Au Wire Bonds in Extreme Environments
Authors: Shepherd D. , Grant P.S. , Johnston C. , Riches S.
Published: October 2015

Microelectronics are being required to show high reliability within aero-engines, oil-gas wells and other extreme applications where devices can experience over 250°C, 1000bar, corrosive environments and significant vibration. Currently operation may be only possible for a small number of hours, which necessitates expensive shut-down and replacement.

Wire bond interconnects continue to be critical to overall reliability though previous studies have shown that traditional Au-Al bonds fail in such environments due to microstructural instability. Au-Au bonds offer a potentially stable solution that is increasingly desirable as microelectronics are required to endure ever harsher conditions.

Au ball bonds on two representative substrates with Au surfaces and ceramic bases have been exposed to 250 and 300°C in N2 for up to 2000 hours. Substrate 1 was a high temperature co-fired ceramic (HTCC) with a Au coating above Ni-Co and W layers, and Substrate 2 was a Au thick film on alumina.

Wire pull and ball shear tests for both sample types significantly exceeded industry specifications, though a decrease in yield strength was observed. Key samples were cross-sectioned and grain structure was revealed by ion channelling contrast within a focused ion beam (FIB) system.

The yield strength decrease was attributed to the Hall-Petch effect through elimination of twin grains formed during bonding deformation. Electron probe microanalysis (EPMA) of underlying Ni showed little interdiffusion into the Au. Hence the mechanical robustness and microstructural stability of Au-Au wire bonds in extreme environments has been demonstrated and understanding of thermal ageing mechanisms has been improved.
High Temperature Inverter for Airborne Application
Authors: Dubois Fabien , Bergogne Dominique , Risaletto Damien , Robutel Rémi , Morel Hervé , Meuret Régis , Dhokkar Sonia
Published: October 2015

This paper reports the design, fabrication and experimental performance of a 2kW, 20kHz, High Temperature, three-phase, all-SiC JFET Voltage Source Inverter (VSI). The inverter includes a specific JFET driver and a DC-link capacitor. All these elements have been validated over a wide temperature range, between 25°C and 200°C. The power device used, a 1200V, 15A, JFET from SiCED has been characterized up to 200°C. An innovative reliable protection circuit for normally-on devices is also presented and validated.
A Universal BCD-on-SOI Based High Temperature Short Circuit Protection for SiC Power Switches
Authors: Zuo Liang , Islam S. K. , Huque M. A. , Su C. , Blalock B. J. , Tolbert L. M.
Published: October 2015

In recent years, the rapid increase in the market for hybrid electric vehicles has generated great demand for low-cost, high-volume, high-temperature power converters that can work in harsh environment (temperature ≥ 150°C) conditions. Most of the commercially available power semiconductor devices and associated control electronics are rated for maximum of 85°C ambient temperature. Under this circumstance, wide bandgap (WBG) semiconductors have become a better alternative due to their ability to operate at much higher temperatures (≥500°C) than conventional bulk silicon based devices. As with any other power devices, SiC switches also require fault detection and protection mechanisms for their reliable application to real systems. One severe fault situation is the short circuit at the load end, which can cause very high surge currents that flow through the power switches. Quick detection and removal of the short circuit fault current by external circuitry is required to protect the power switch as well as the power converter module.

This work presents a high-temperature (≥200°C), high-voltage short circuit protection (SCP) for SiC power devices. The circuit is designed using a resistor sensing method to provide protections for both “normally ON” and “normally OFF” SiC FET switches. A rail-to-rail input comparator is employed to ensure that the circuit operates under different power supply levels. The prototype circuit is implemented using a 0.8-micron, 2-poly, and 3-metal BCD-on-SOI process. The die size for the protection circuit is 0.52 mm2 (845 μm × 612 μm). The circuit has been successfully tested up to 200°C ambient temperature under power supplies ranging from 10 V to 30 V without any heat sink or cooling mechanism.
285°C Resistor Drift and Failure Analysis
Authors: Hahn Mark , Smith Ron , Watts Milton
Published: October 2015

In order to improve the reliability of down-hole electronics Quartzdyne Electronics has invested over 10 million device test hours in life testing of our circuits in both powered and un-powered modes. In addition to time at temperature, these tests include thermal cycling and high impact drop testing. While resistors tend to be generally reliable, we have observed resistance drift in some units that has pushed circuit performance outside of accepted electrical specifications. In an attempt to comprehend the root cause(s) of resistance drift, failed samples have been studied in a scanning electron microscope. The resulting observations have led to structured designs of experiment to isolate the many possible root causes. This paper will present these observations, experimental outcomes and draw conclusions surrounding thick film vs. thin film performance, variations between value ranges, differences between vendors, and a possible link relating the drift mechanism to the method and extent of value trimming. This information should be useful to resistor vendors interested in improving the quality and performance of their products.
Parylene HT®: A High Temperature Vapor Phase Polymer for Electronics Applications
Authors: Kumar Rakesh
Published: October 2015

A development in the area of high temperature polymers, which offers solutions to many existing packaging and reliability challenges of electronics industry, is described. Packaging, protection and reliability of various electronic devices and components that include PCB's, MEM's, optoelectronic devices, fuel cell components and nano-electronic parts are becoming more challenging due to their long-term performance requirements. Parylene HT offers solutions to many existing packaging and reliability issues of electronics industry in part because of its excellent electrical & mechanical properties, chemical inertness and long-term thermal stability at high temperature exposure to over 350°C (short-term at 450 °C). Experimental results and trial runs demonstrate the ability of Parylene HT coating to meet the growing requirements of higher dielectric capabilities, higher temperature integrity and mechanical processing etc. of dynamic electronic industry. In addition, Parylene HT polymer coating truly conforms to the parts due to its molecular level deposition characteristics. Its suitability and biocompatibilty encourage researchers to explore Parylene HT's role in sensors and in active electronic devices for various industries, which include enhancing high temperature application/technologies.
High Temperature (230 °C) Isolated Power Supply
Authors: Reese B. , Shaw R. , Hornberger J. , Schupbach R. , Lostetter A.
Published: October 2015

This paper discusses the development of a high temperature (i.e., 230 °C ambient) 100V–300V/15V 20W isolated power supply. The power supply is implemented using Silicon-Carbide (SiC) power switches, high-temperature silicon on insulator (HTSOI) control circuitry, as well as custom high temperature magnetics and packaging technology. The heart of this power supply is a custom-built PWM controller. The controller was built utilizing HTSOI component, which operate at temperatures as high as 300 °C. The developed power supply targets high ambient temperature environment applications and includes features such as housekeeping power supply, soft-start and under-voltage lockout. The power supply is packaged using a multi-chip module (MCM) packaging approach. A single layer power substrate and a multiple layer control substrate are used. Bare die devices are utilized to save space, reduce parasitic impedances, and increase temperature of operation and reliability. This paper provides details on the electrical and thermal design as well as fabrication and characterization of the power supply. Additionally, results of the full characterization of this power supply are provided; this includes temperature testing up to 230 °C, efficiency results, load transition behavior, output ripple, etc.