Electrochemical Lithiation/Delithiation Process of Si
Authors: Kondo Toshihiro , Aoki Nana , Omachi Asami , Uosaki Kohei 
Published: February 2020

Introduction.

It is well-known that LiSi alloy forms by electrochemical lithiation of the Si substrate [1]. Since the high performance of lithiation amount of Si is theoretically predicted [2-4], LiSi alloy formation/deformation, i.e., lithiation/delithiation of Si, is very attractive interest not only in the Li ion based battery research field but also fundamental electrochemistry area [5]. However, there is no report to investigate in detail the lithiation/delithiation process into Si substrate.

X-ray photoelectron spectroscopy (XPS) method was often used for electronic state analysis of LiSi alloy [5]. However, information from XP spectrum is limited only about inner shell electron and then, electronic state of LiSi alloy has not been clarified yet. On the other hand, soft X-ray emission spectroscopy (SXES) provides us the information about valence band electron and then, we can obtain the electronic states of lithiated/delithiated Si in details.

In this study, we electrochemically prepared the samples with different lithiation/delithiation amounts and investigated the geometric and electronic structures during electrochemical lithiation/delithiation process of the Si(111) and Si(100) substrate by scanning electron microscopy (SEM), SXES, and surface x-ray diffraction (SXRD) using synchrotron radiation as an x-ray source.

Experimentals.

After the surfaces of n-Si(111) and n-Si(100) substrates (phosphorous-doped, 1 – 10 W cm) were hydrogen terminated [6], Lithiated samples were prepared in the glove box under Ar atmosphere as below. The potential of the Si electrode was negatively scanned from open circuit potential (OCP) (ca. 2.4 V vs. Li/Li+) to 0.01 V with a scan rate of 1 mV s-1 in the electrolyte solution (1 M LiPF6 in ethylene carbonate (EC) and dimethyl carbonate (DMC) (EC : DMC = 1 : 1, v/v%). At 0.01 V, the potential was kept for several periods. After that, the potential was back to OCP, namely the Si electrode was disconnected. Delithiated samples were prepared by the potential scan from 0.01 V to 2.4 V after keeping the potential of 0.01 V for 60 min.

After washing, the sample was transferred to the SEM chamber or the SXRD cell under Ar atmosphere without any exposure in air. Then, SEM, SXES, and SXRD measurements were carried out.

Results and Discussion.

Time dependences of current density and electrode potential during the lithiation/delithiation of the Si(111) and Si(100) electrodes were measured. At both electrodes, similar behaviors were observed. When the electrode potential was negatively scanned from OCP, small cathodic current, which is due to the formation of solid electrolyte interphase (SEI), was observed around 1.50 V. Around 0.05 V, large cathodic current due to lithiation flowed and it continued to flow when the potential scan was stopped at 0.01 V. After keeping the potential of 0.01 V for several periods, when the potential was positively scanned from 0.01 V to 2.4 V, large anodic current due to delithiation started to flow around 0.05 V, reached a maximum around 0.5 V, and then decreased to zero, indicating that all lithium was desorbed.

Surface SEM image of the lithiated samples showed that the shape of the surface layer was a triangular and rectangular pyramids on Si(111) and Si(100), respectively. The longer the lithiation period, the larger the pyramid. Cross sectional SEM image shows that both lithiated Si(111) and Si(100) consist of four kinds of layers. Based on the results of SXES and SXRD, these layers can be assigned in the order from the surface as follows, single crystalline Li15Si4 alloy phase, amorphous Li15Si4 and/or Li13Si4 mixed alloy phase, mixed phase of amorphous Li15/13Si4 alloy and crystalline Si, and crystalline Si phase containing Li atoms [7].

After delithiation, the first and second layers, i.e., single crystalline Li15Si4 alloy phase and amorphous Li15Si4 and/or Li13Si4 mixed alloy phase, were peeling off and these layers became the amorphous Si phase. The third and fourth layers were back to the crystalline Si phase.

References.

[1] V. A. Sethuraman, et al., J. Electrochem. Soc., 160 (2013) A394 and references there in.

[2] B. A. Boukamp, et al., J. Electrochem. Soc., 128 (1981) 725.

[3] C. K. Chan, et al., Nature Nanotechnol., 3 (2008) 31.

[4] C. K. Chan, et al., J. Power Sources, 189 (2009) 34.

[5] S.-O. Kim and A. J. Manthiram, J. Mater. Chem. A, 4 (2015) 2399 and references there in.

[6] S. Nihonyanagi, et al., J. Am. Chem. Soc., 126 (2004) 7034.

[7] N. Aoki, et al., ChemElectroChem, in press (2016).