bluuebunny/crossref_metadata_2025 huggingface dataset:
Motivations of contributors to Wikipedia
Authors: Kuznetsov Stacey
Published: April 2007

This paper aims to explain why people are motivated to contribute to the Wikipedia project. A comprehensive analysis of the motivations of Wikipedians is conducted using the iterative methodology developed by Batya Friedman and Peter Kahn in
Value Sensitive Design and Information Systems
and co-developed by Nissenbaum and Friedman in
Bias in Computer Systems
. The Value Sensitive Design (VSD) approach consists of three stages: Empirical Investigation, Conceptual Investigation, and Technical Investigation. During the empirical phase, motivations of the contributors to Wikipedia are identified through analysis of data from two published surveys and a pilot survey conducted at New York University. The underlying values behind these motivations are then defined in the conceptual phase of the study. Finally, a technical investigation is conducted in order to determine how features of the Wiki technology support and facilitate these values.
How much do technical scientists really cooperate?
Authors: Sodan Angela C.
Published: April 2007

Teamwork has evolved to play an important role in science and is called for by funding agencies, universities, and industry. However, as important as teamwork nowadays is, teamwork may not be the only approach to produce relevant research results. Furthermore, cooperation does not always match its ideal and ranges from nominal collaboration to close interaction. Given that researchers in technical sciences are often rated as introverts, the question is whether this is true and how this affects their collaboration style and their capability to solve conflicts in collaboration. This paper presents the results of a study that investigates to what extent researchers collaborate, what their motivation for collaboration is, and how they deal with conflicts. Furthermore, the paper assesses the researchers' personality types and checks whether a correlation exists between collaboration-related choices and personality types. The study was carried out with researchers in the area of high-performance computing.
On the twin measure and system predictability and fairness
Authors: Raz David , Levy Hanoch , Avi-Itzhak Benjamin
Published: April 2007

Two identical customers with deterministically identical service times arrive at a queueing system simultaneously (Twins), but leave the system 2 hours apart. Is their sojourn time predictable? Is the system fair? We propose a novel measure based on the principle that in a predictable and fair system, "twin" customers should not depart the system very far apart. We analyze this measure for a number of common service policies and compare the results. We compare the results to those of other fairness and predictability approaches proposed recently and discuss its usefulness.
On the completion time distribution for tasks that must restart from the beginning if a failure occurs
Authors: Sheahan Robert , Lipsky Lester , Fiorini Pierre M. , Asmussen Søren
Published: April 2007

For many systems, failure is so common that the design choice of how to deal with it may have a significant impact on the performance of the system. There are many specific and distinct failure recovery schemes, but they can be grouped into three broad classes:
RESUME
, also referred to as preemptive resume (prs), or check-pointing;
REPLACE
, also referred to as preemptive repeat different (prd); and
RESTART
, also referred to as preemptive repeat identical (pri). The following describes the three recovery schemes: (1)
RESUME:
when a task is fails, it knows exactly where it stops, and can continue from that point when allowed to resume; (2)
REPLACE:
given a task fails, then when it begins processing again, it starts with a brand new task sampled from the same task time distribution; and, (3)
RESTART:
When a task fails, it loses all that it had acquired to up to that point and must start anew when upon continuing later. This is distinctly different from (2) since the task must run at least as long as it did before it failed, whereas a new sample, selected at random, might run for a shorter or longer time.
Free-Drop TCP
Authors: Baryshnikov Yuliy , Coffman Ed , Feng Jing , Misra Vishal
Published: April 2007

We introduce a new class of TCP congestion control algorithms that take a non-standard approach: instead of modifying AIMD parameters or exploiting traffic measurements, the new protocols modify the rule for deciding when to cut the congestion window. The class is defined by an additional window with a packet-count parameter
w;
the congestion window is reduced by half when a packet loss is detected, at time
t
say, if and only if there has been at least one dropped packet in the last
w
packet transmissions prior to time
t
. An algorithm in the class is called
Free-Drop TCP
, since dropped packets are "free" (they do not cause cuts in the window size) unless they are sufficiently bursty. We propose this new class as a means to achieve high utilizations in high bandwidth-delay product networks with small buffers. We analyze a fluid model which leads to explicit estimates of the average throughput for small loss probabilities. We then give the results of experiments, which show that, relative to TCP, a family of 'shifted' response functions of the form
O
(1/√
p
- ε) can be obtained over a wide range of
p
by suitably varying
w
. Potential costs of these increases in throughput are also examined in terms of coefficents of variation and Jain's fairness measure. The costs range from negligible to moderate.
Analysis of route stability under the random direction mobility model
Authors: Carofiglio G. , Chiasserini C. , Garetto M. , Leonardi E.
Published: April 2007

In this work we study the stability of routing paths in a Mobile Ad-hoc Network (MANET), where links are subject to failure due to nodes' mobility. We focus on the Random Direction mobility model, and consider as metrics of interest the duration and availability of links and paths.
Optimal scheduling in a multiserver stochastic network
Authors: Bayati Mohsen , Sharma Mayank , Squillante Mark S.
Published: April 2007

We consider a fundamental scheduling problem in a multiserver stochastic network consisting of 2 classes of customers and 2 classes of servers. Customers of class
k
arrive to queue
k
according to a Poisson process with rate λ

k
, k

= 1, 2. The service times of class
k
customers at class ℓ servers are i.i.d. following an exponential distribution with mean μ

k
ℓ

-1
, ∀
k
, ℓ = 1, 2, where 0 < μ
11
, μ
12
, μ
22
< ∞ and μ
21
= 0. Hence, class 1 customers can be served at both classes of servers, but class 2 customers can only be served at class 2 servers. A FCFS queueing discipline is employed at each queue. The customer arrival and service processes are mutually independent of each other and of all resource allocation decisions.
Client-driven channel management for wireless LANs
Authors: Mishra Arunesh , Brik Vladimir , Banerjee Suman , Srinivasan Aravind , Arbaugh William
Published: April 2007

With the explosive growth in the density of 802.11 access points (APs) in the form of hotspots and public/home access networks, coordinating the shared use of spectrum has become an important problem. The irregular coverage topologies present in WLANs due to the vagaries of the indoor RF environment make the channel assignment algorithms in cellular networks inapplicable [1, 2].
Capacity improvement of wireless ad hoc networks with directional antennae
Authors: Zhang JiaLiang , Liew Soung Chang
Published: April 2007

Network Capacity, which is limited by interference between simultaneous transmissions of neighboring links, is a fundamental performance metric for wireless ad hoc networks. Ref. [1] showed that the capacity of wireless ad hoc networks with omnidirectional antennae does not scale well as the node density increases. Other related work ([2], [3], [4], etc.) demonstrated that the network capacity scales better with the use of directional antennae. Most previous investigations, however, were based on simplified but unrealizable models of antenna patterns. So far, there has not been a general framework for the analysis of network capacity when directional antennae of realizable generic patterns are used. Also, few papers have derived explicitly the impact of nulls and null-width in antenna pattern on network scalability. Specifically, the scale law of network capacity with general directional antennae has not yet been investigated. This paper addresses these issues. We study arbitrary and random networks (corresponding to the best case and random case respectively), where nodes with smart antennae are assumed to be located in a planar disk without mobility. We also point out how to generalize the result to that of generic directional antenna pattern. To conserve space here, we defer detailed analysis of the impact of null-width to the full paper.
Addressing hazards in wireless sensor and actor networks
Authors: Vedantham Ramanuja , Zhuang Zhenyun , Sivakumar Raghupathy
Published: April 2007

In wireless sensor and actor networks (WSANs), sensors monitor the environment based on which the sink issues commands to actors to act on the environment. In order to provide tight coupling between sensing and acting, an effective coordination mechanism is required among sensors and actors. In this context, we identify the problem of "hazards", which is the out-of-order execution of commands and queries due to lack of coordination between sensors and actors. We identify three hazards and show with an example application, the undesirable consequences of these hazards. We also outline the basic design needed to address this problem efficiently.
Bandwidth reservation using WLAN handoff prediction
Authors: Song Libo , Deshpande Udayan , Kozat Ulas , Kotz David , Jain Ravi
Published: April 2007

Many network services may be improved or enabled by successful predictions of users' future mobility. The success of predictions depend on how much accuracy can be achieved on real data and on the sensitivity of particular applications to this achievable accuracy. We investigate these issues for the case of advanced bandwidth reservation using real WLAN traces collected on the Dartmouth College campus [1].
Protocols and model for sink mobility in wireless sensor networks
Authors: Basagni S. , Carosi A. , Melachrinoudis E. , Petrioli C. , Wang Z. M.
Published: April 2007

This paper concerns the definition of an analytical model and of a distributed protocol, termed Greedy Maximum Residual Energy (GMRE), for determining the routes of a mobile data collector (sink) traveling through the nodes of a wireless sensor network (WSN). The routes are determined with the overall aim of maximizing the network lifetime. An ns2-based simulation comparison between GMRE, optical static sink placement and random sink mobility shows that GMRE yields remarkable improvements both for network lifetime and for balancing energy consumptions throughout the network.
Enabling the 21st century health care information technology revolution
Authors: Agrawal Rakesh , Grandison Tyrone , Johnson Christopher , Kiernan Jerry
Published: April 2007

The U.S. government's vision of the health care information infrastructure is possible using technologies that support the sharing of medical e-records while maintaining patient privacy.
An integrated approach to federated identity and privilege management in open systems
Authors: Bhatti Rafae , Bertino Elisa , Ghafoor Arif
Published: April 2007

Online partnerships depend on federations of not only user identities but also of user entitlements across organizational boundaries.
What road ahead for Microsoft the company?
Authors: Cusumano Michael A.
Published: April 2007

Mapping the critical decisions involved in building the next version of the software company.
Patent reform through the courts
Authors: Samuelson Pamela
Published: April 2007

Although some reforms can happen only through legislation, some key reforms may be achievable through the courts.
IT security
Authors: Oppliger Rolf
Published: April 2007

Approaching IT security as an engineering and management problem.
Proposal for a program support facility
Authors: Sachs Jon
Published: April 2007

This paper presents a preliminary definition of a program support facility (PSF). A PSF supports a programming effort with reporting operations and documentation. It interacts with other software running on the host operating system, and thus can perform many of its functions automatically.The properties of a PSF are described here in the context of IBM's OS/360 or 370, but the principles are applicable to any hardware and operating system sophisticated enough to support them.
Technical writing
Authors: Patterson Diana
Published: April 2007

"I feel very strongly that when one opens a manual, the first printed page to fall to the eye should be a very general explanation of exactly what the system is, what problem it was intended to attack, and the reasons fo bothering to attack that problem at all.
Illinois Bell Telephone
Authors: Wolf Herbert W.
Published: April 2007

I am currently involved in developing and programming a new Payroll/Personnel System for Illinois Bell Telephone. I would be interested in comments from the members of SICDOC about the following EDP Function Requirements Standard.
A self documenting technique for systems analysis
Authors: Rose Lois A.
Published: April 2007

Probably the biggest, messiest, most onerous task in systems analysis is documentation. Typically, we produce enormous amounts of highly detailed narrative, together with some fairly general flowcharts. If anybody ever actually reads these documents, they often find redundant and contradictory information. Even though the documents are laden with all the detail we could think of to include, the reader typically walks away muttering, "But what's the system supposed to
do?
" The feeling is something like expecting floor plans and renderings of your new custom house from the architect, and instead receiving an accounting of the barrels of nails, board-feet of lumber, reels of copper wire, and a carpentry manual.
Multiple fault diagnosis in digital microfluidic biochips
Authors: Davids Daniel , Datta Siddhartha , Mukherjee Arindam , Joshi Bharat , Ravindran Arun
Published: April 2007

Microfluidics-based biochips consist of microfluidic arrays on rigid substrates through which, movement of fluids is tightly controlled to facilitate biological reactions. Biochips are soon expected to revolutionize biosensing, clinical diagnostics, and drug discovery. Critical to the deployment of biochips in such diverse areas is the dependability of these systems. Thus, robust testing techniques are required to ensure an adequate level of system dependability. Due to the underlying mixed technology and energy domains, such biochips exhibit unique failure mechanisms and defects. In this article we present a highly effective fault diagnosis strategy that uses a single source and sink to detect and locate multiple faults in a microfluidic array, without flooding the array, a problem that has hampered realistic implementations of all existing strategies. The strategy renders itself well for a built-in self-test that could drastically reduce the operating cost of microfluidic biochips. It can be used during both the manufacturing phase of the biochip, as well as field operation. Furthermore, the algorithm can pinpoint the actual fault, as opposed to merely the faulty regions that are typically identified by strategies proposed in the literature. Also, analytical results suggest that it is an effective strategy that can be used to design highly dependable biochip systems.
A mini-computer configuration for CAI
Authors: Adler Louis S.
Published: April 2007

Computer assisted instruction (CAI) has not impacted the educational world with the degree of success which early proponents predicted. Although CAI has proven to be a more efficient learning tool than common traditional methods in specific instances, the overall success of such systems has been sporadic. There is no question that a well-designed and correctly implemented CAI system can be highly effective; however, several important factors must be overcome to guarantee a reasonable amount of success. These are:• Overcoming the present high cost of hardware while still providing a reliable system having acceptable display capability.• Developing a software real-time operating system which guarantees fast response times.• Authoring high quality courseware.
Design team composition for high level language computer architectures
Authors: Cox Lyle A. , McGraw James R. , Wetherell Charles S.
Published: April 2007

Recently the declining costs of computer hardware, combined with the rapidly increasing costs of software systems have led to considerable discussion of computer organizations. When a computing system is viewed as a data structure, a control structure, and a processing structure designed to execute algorithms, it is reasonable to consider how this system can be optimized in both a hardware sense, and in the sense of reducing the total system software costs. A reasonable approach to greater efficiency is to design computer systems whose structure more closely resembles that of the higher level language in which the algorithms are to be expressed.
Some remarks on "Ambiguous Machine Architecture"
Authors: Hayes Ian J.
Published: April 2007

I would like to respond to an article, entitled "Ambiguous Machine Architecture and Program Efficiency", by Andrew Tanenbaum in Computer Architecture News Vol. 6 No. 3 (August 1977).
Internet nuggets
Authors: Thorson Mark
Published: April 2007

This column consists of selected traffic from the
comp.arch
newsgroup, a forum for discussion of computer architecture on Internet---an international computer network.As always, the opinions expressed in this column are the personal views of the authors, and do not necessarily represent the institutions to which they are affiliated.Text which sets the context of a message appears in italics; this is usually text the author has quoted from earlier messages. The code-like expressions below the authors' names are their addresses on Internet.
An update on GKS
Authors: Wright Thomas
Published: April 2007

Last February, SIGGRAPH published the proposed American National Standard (ANS) called 'The Graphical Kernel System' (GKS) [1]. Since that time there have been changes in the standard as the result of comments submitted during the public review of the standard and simultaneous work on the parallel standard being finalized in the international arena by the International Standards Organization (ISO). Changes in the body of the standard are essentially editorial, with certain passages clarified and corrections made. These changes are best analyzed by reviewing the entire document, which should be available from the American National Standards Institute in the first quarter of 1985.
ALP
Authors: Sasanka Ruchira , Li Man-Lap , Adve Sarita V. , Chen Yen-Kuang , Debes Eric
Published: April 2007

The real-time execution of contemporary complex media applications requires energy-efficient processing capabilities beyond those of current superscalar processors. We observe that the complexity of contemporary media applications requires support for multiple forms of parallelism, including ILP, TLP, and various forms of DLP, such as subword SIMD, short vectors, and streams. Based on our observations, we propose an architecture, called ALP, that efficiently integrates all of these forms of parallelism with evolutionary changes to the programming model and hardware. The novel part of ALP is a DLP technique called
SIMD vectors and streams (SVectors/SStreams)
, which is integrated within a conventional superscalar-based CMP/SMT architecture with subword SIMD. This technique lies between subword SIMD and vectors, providing significant benefits over the former at a lower cost than the latter. Our evaluations show that each form of parallelism supported by ALP is important. Specifically, SVectors/SStreams are effective, compared to a system with the other enhancements in ALP. They give speedups of 1.1 to 3.4X and energy-delay product improvements of 1.1 to 5.1X for applications with DLP.
Software-directed power-aware interconnection networks
Authors: Soteriou Vassos , Eisley Noel , Peh Li-Shiuan
Published: April 2007

Interconnection networks have been deployed as the communication fabric in a wide spectrum of parallel computer systems, ranging from chip multiprocessors (CMPs) and embedded multicore systems-on-a-chip (SoCs) to clusters and server blades. Recent technology trends have permitted a rapid growth of chip resources, faster clock rates, and wider communication bandwidths, however, these trends have also led to an increase in power consumption that is becoming a key limiting factor in the design of such scalable interconnected systems. Power-aware networks, therefore, need to become inherent components of single and multi-chip parallel systems. In the hardware arena, recent interconnection network power-management research work has employed limited-scope techniques that mostly focus on reducing the power consumed by the network communication links. As these limited-scope techniques are not tailored to the applications running on the network, power savings and the corresponding impact on network latency vary significantly from one application to the next as we demonstrate in this paper; in many cases, network performance can severely suffer. In the software arena, extensive research on compile-time optimizations has produced parallelizing compilers that can efficiently map an application onto hardware for high performance. However, research into power-aware parallelizing compilers is in its infancy. In this paper, we take the first steps toward tailoring applications' communication needs at run-time for low power. We propose software techniques that extend the flow of a parallelizing compiler in order to direct run-time network power reduction. We target network links, a significant power consumer in these systems, allowing dynamic voltage scaling (DVS) instructions extracted during static compilation to orchestrate link voltage and frequency transitions for power savings during application run-time. Concurrently, an online hardware mechanism measures network congestion levels and adapts these off-line DVS settings to maximize network performance. Our simulations over three existing parallel systems, ranging from very fine-grained single-chip to coarse-grained multi-chip architectures, show that link power consumption can be reduced by up to 76.3%, with a minor increase in latency, ranging from 0.18 to 6.78% across a number of benchmark suites.
Snug set-associative caches
Authors: Hwang Yuan-Shin , Li Jia-Jhe
Published: April 2007

As transistors keep shrinking and on-chip caches keep growing, static power dissipation resulting from leakage of caches takes an increasing fraction of total power in processors. Several techniques have already been proposed to reduce leakage power by turning off unused cache lines. However, they all have to pay the price of performance degradation. This paper presents a cache architecture, the
snug set-associative
(
SSA
) cache, that cuts most of static power dissipation of caches without incuring performance penalties. The SSA cache reduces leakage power by implementing the
minimum set-associative
scheme, which only activates the minimal numbers of ways in each cache set, while the performance losses caused by this scheme are compensated by the
base-offset load/store queues
. The rationale of combining these two techniques is locality: as the contents of the cache blocks in the current working set are repeatedly accessed, same addresses would be computed again and again. The SSA cache architecture can be applied to data and instruction caches to reduce leakage power without incurring performance penalties. Experimental results show that SSA can cut static power consumption of the L1 data cache by 93%, on average, for SPECint2000 benchmarks, while the execution times are reduced by 5%. Similarly, SSA can cut leakage dissipation of the L1 instruction cache by 92%, on average, and improve performance over 3%. Furthermore, when SSA is adopted for both L1 data and instruction caches, the normalized leakage of L1 data and instruction caches is lowered to 8%, on average, while still accomplishing a 2% reduction in execution times.
Single-dimension software pipelining for multidimensional loops
Authors: Rong Hongbo , Tang Zhizhong , Govindarajan R. , Douillet Alban , Gao Guang R.
Published: April 2007

Traditionally, software pipelining is applied either to the innermost loop of a given loop nest or from the innermost loop to outer loops. This paper proposes a three-step approach, called
single-dimension software pipelining (SSP)
, to software pipeline a loop nest at an arbitrary loop level that has a rectangular iteration space and contains no sibling inner loops in it. The first step identifies the most profitable loop level for software pipelining in terms of initiation rate, data reuse potential, or any other optimization criteria. The second step simplifies the multidimensional data-dependence graph (DDG) of the selected loop level into a one-dimensional DDG and constructs a one-dimensional (1D) schedule. Based on the one-dimensional schedule, the third step derives a simple mapping function that specifies the schedule time for the operation instances in the multidimensional loop. The classical modulo scheduling is subsumed by SSP as a special case. SSP is also closely related to hyperplane scheduling, and, in fact, extends it to be resource constrained. We prove that SSP schedules are correct and at least as efficient as those schedules generated by traditional modulo scheduling methods. We extend SSP to schedule imperfect loop nests, which are most common at the instruction level. Multiple initiation intervals are naturally allowed to improve execution efficiency. Feasibility and correctness of our approach are verified by a prototype implementation in the ORC compiler for the IA-64 architecture, tested with loop nests from Livermore and SPEC2000 floating-point benchmarks. Preliminary experimental results reveal that, compared to modulo scheduling, software pipelining at an appropriate loop level results in significant performance improvement. Software pipelining is beneficial even with prior loop transformations.
A step towards the establishment of a "systems optimization laboratory"
Authors: Kreuser Jerome L.
Published: April 2007

The Madison Optimization Applications Laboratory, MOAL, is an organization which is being established to provide extensive services in the theoretical and computational applications of optimization techniques. The establishment of a similar service, "The Systems Optimization Laboratory," was proposed by G. B. Dantzig in a talk at the Advanced Seminar on Mathematical Programming at the University of Wisconsin - Madison on September 11-13, 1972.
An exercise in basis inversion
Authors: Orchard-Hays Wm.
Published: April 2007

At the NATO conference on Large Scale Decomposition in Cambridge, England, July 1972, it appeared to me that few people knew how matrix inversion is really done in standard MP systems with product form. So I concocted an example and used part of my talk time to run through it. Several people appreciated this and Mike Grigoridis suggested I should put it in the Newsletter. He also wanted it for his own use. My apology to him for the long delay in organizing and typing it, but here it is.
Integer programming by partitioning
Authors: Haverly C. A.
Published: April 2007

Integer Programming problems can be solved by a variety of methods. These can be grouped as follows:Complete EnumerationImplicit EnumerationBranch and BoundCutting PlanesPartitioningAsymptotic (or Group) TheoryConvex Analysis.The first two were discussed in educational series #2. This paper discusses the partitioning approach. This approach was first proposed by Dr. J. F. Benders in 1962.
The sandwich method for computing fixed points
Authors: Kuhn H. W. , MacKinnon J. G.
Published: April 2007

Many equilibrium and optimization problems in economics and operations research can be put in the form: Find x such that f(x) = x, where x is a nonnegative vector with component sum one and f is a continuous function (not necessarily differentiable, convex, or concave).
Three integer programming problems
Authors: Williams H. P.
Published: April 2007

The following is an informal and condensed version of the paper presented at the 1973 Mathematical Programming Symposium in Stanford. At that symposium the title was EXPERIMENTS IN THE FORMULATION OF INTEGER PROGRAMMING PROBLEMS. That paper has been more fully written up under that title and can be obtained from the author on request. All references are given there.
Improved solutions for some minimal-network test problems
Authors: Boyce W. M. , Seery J. B. , Breyer J.
Published: April 2007

In a recent SIGMAP newsletter [1] J. Soukup and W. F. Chow proposed forty-six test problems for the "Problem fo Steiner": finding the shortest network which connects a given set of points. All of the problems were planar, and except for one 62-point set (#11), the number of points per problem ranged from 3 to 20. Soukup and Chow also provided for each problem the length of the shortest network known to them, and they asserted the optimality of 24 of their solutions, including all eleven of the three-and four-point problems.
Some computational experiments with Scolnik's linear programming approach
Authors: Saiidi Mohammad , Tomlin J. A.
Published: April 2007

In this note we describe a reasonably efficient implementation of Scolnik's linear programming approach. We became interested in using the code to test the usefulness of this approach as a starting heuristic or "crashing" technique, as the method is known to fail in general. Our computational experience, however, leads us to believe that the method is too costly even for this modest objective.
Modern practice in facility location modelling
Authors: Haverly C. A.
Published: April 2007

Facility location modelling has come a long way in the past few years. It encompasses a number of applications which did not at first appear to be related (such as the purchasing decision model described in another paper in this newsletter). In this paper I will discuss some of the applications that are being made.
A guided tour of recent practical advances in integer linear programming
Authors: Geoffrion Arthur M.
Published: April 2007

The field of integer programming has been an extremely active one in recent years. Only a small fraction of the contributions, however, are of demonstrable practical value to practitioners or software designers within the near future. These are the contributions which these notes will attempt to survey. The selections are made on a subjective basis from the published and unpublished literature appearing over the last two years. The reader is cordially invited to express his opinions concerning my sins of omission and commission.
A difficult small integer program
Authors: Salkin Harvey M. , Morito Susumu
Published: April 2007

An apparently difficult, yet small, integer program has been tested on what we believe to be is a most efficient computer system containing a group theoretic algorithm. Although a good solution was produced, the code did not converge in at most thirty seconds of UNIVAC 1108 time, and thus the integer program can serve as a principal test problem. The model represents a real world chemical blending situation and was received from E. I. DuPont DeNemours & Co., Inc.
Benchmark test of MPSX/370 vs MPS-III
Authors: Falk P. G.
Published: April 2007

Provide the Management Systems Division of my previous employer with a Mathematical Programming System, MPS, evaluation and ultimately selection compatible with existing and proposed company hardware and software environment.
Minimum Steiner trees, roots of a polynomial, and other magic
Authors: Soukup J.
Published: April 2007

The paper is a collection of observations and ideas on a surprising similarity between Steiner points on one hand, and roots of a complex polynomial on the other. These ideas can also be used to derive a simple practical method to generate good suboptimal Steiner trees. However, the main purpose of the paper is to point out a vast area of problems still open to further research.
Euromicro
Authors: Habib Stanley
Published: April 2007

Euromicro Correspondents (formerly National Representatives) must obtain the approval and support of their National Information Processing Societies in order to insure favorable working conditions for the Association.
MicrodataNews
Authors: Habib Stanley
Published: April 2007

IRVINE, California -- The MICRO-ONE, a high-speed microprogrammed microprocessor designed to sell for less than $1,000, has been introduced by Microdata Corporation.
An overview of the MATHILDA system
Authors: Kornerup Peter , Shriver Bruce D.
Published: April 2007

A dynamically microprogrammable processor called MATHILDA is described. MATHILDA has been designed to be used as a tool in emulator and processor design research. It has a very general micro-instruction sequencing scheme, sophisticated masking and shifting capability, high speed local storage, a 64-bit wide main data path, a horizontally encoded microinstruction, and other facilities which make it reasonably well suited for this purpose. This paper presents an overview of the MATHILDA system.
Computer performance improvement by measurement and microprogramming
Authors: Snyder David C.
Published: April 2007

MICROPROGRAMMING
, or microcode, is a comparatively old technique for computer design. It was first described by Wilkes in 1951, when most logic gates were vacuum tubes and the transistor was only a three-year-old infant. The original objective was "to provide a systematic alternative to the somewhat ad hoc procedure used for designing the control system" of a computer.
Firmware/hardware support for operating systems
Authors: Sockut Gary H.
Published: April 2007

Firmware/hardware support for operating systems is described briefly, and proposed criteria for determining which operating system functions are the best candidates for firmware/hardware implementation are listed. A selected history of the area is presented in three sections: past and current research in support for virtual machines and two sections on past and current research in support for non -- virtual machine operating system functions.
A microprogramming design laboratory
Authors: Vickery Christopher
Published: April 2007

Sophisticated design aids are available to help automate microprogram development both for large, complex computers and for microprocessor-based systems. These aids include procedures for source code verification, object code generation, micro-program simulation, and interactive debugging. For various reasons, such aids are generally not well-developed for micro-programmable minicomputers. This paper describes a microprogramming laboratory developed for the Interdata 85 minicomputer which uses both the minicomputer itself as well as the time-sharing and batch facilities of a large computer center. Experience with the laboratory has shown that the facility for interacting with a microprogram is as important as the availability of complete diagnostic information. The argument is made that design automation aids for microprogramming minicomputers could be produced most efficiently from standardized assembly and simulation programs.
Design of a microprogrammed controller managing the SDLC data link control procedure
Authors: Dromard D. , Lafage D.
Published: April 2007

This paper describes a sophisticated data communications controller, as cheap as possible, capable of taking all the required decisions to manage the SDLC protocol, in such a way that the SDLC problems are ignored by the host machine. In existing solutions, only front-end processors or very complex wired controllers can perform these functions for the classical disciplines.
Microprogram design at the processor level
Authors: Wood Graham
Published: April 2007

This paper presents a method for separating the design and implementation phases of microprogram development. The microprogram is written in terms of register transfer level micro-operations and the microinstruction format is specified by means of a field-based representation schema. The micro-operations are automatically mapped into the micro-orders of the format and packed together into microinstruction words to yield a microprogram in the defined format.
Two's-complement multiplication
Authors: Sheue A. E.
Published: April 2007

Two's complement multiplication, defined in terms of adds, subtracts, and shifts, is derived from a novel expression relating a two's-complement number and its integer interpretation. Although the derived algorithm is considered well known, the derivation itself is believed to be original and easily grasped. Implementation of the algorithm in terms of computer arithmetic is shown to be safe from overflow except for the case when the multiplier is 10...0 (max. negative). In this case, the resulting product will have the proper magnitude but the wrong algebraic sign. The implementation can, however, be modified to handle this special case properly.
Review of “Why Programs Fail: A Guide to Systematic Debugging by Andreas Zeller”, Morgan Kaufmann, 2005, $54.95, ISBN: 1558608664
Authors: Berzal Fernando
Published: April 2007

Review of “Why Programs Fail: A Guide to Systematic Debugging by Andreas Zeller”, Morgan Kaufmann, 2005, $54.95, ISBN: 1558608664
DOA with SOA
Authors: Bell Alex
Published: April 2007

It looks like today is finally the day that we all knew was coming. It was only a matter of time. An ambulance has just pulled up to haul away Marty the Software Manager after his boss pummeled him for failing to deliver on promises of money savings, improved software reuse, and reduced time to market that had been virtually guaranteed merely by adopting SOA (service-oriented architecture). Everything could have been so different for Marty. If only there had been a red-hot market for a software application that fetched the price of London gold, converted the price from pounds to dollars, calculated the shipping costs for the desired quantity, and then returned a random verse from the King James Bible. As opposed to the currently unfolding scenario involving an ambulance, Marty’s mental vision was one of a Brinks truck speeding to the scene to empty coffers buckling under the strain of overflowing cash.
A knowledge-driven model to personalize e-learning
Authors: Teo Chao Boon , Gay Robert Kheng Leng
Published: April 2007

This article highlights basic issues that have hindered e-learning systems from becoming the revolutionary force it could be for education. While current systems aim to foster significant improvements in learning, this article argues that most systems are still limited to just being online repositories. This and the lack of learning personalization has become a topic for research. A knowledge-driven model to personalize e-learning is proposed in this article. A novel methodology for eliciting and personalizing tacit knowledge is presented. We focus on describing the complex information processing in terms of knowledge, rather than the details of its implementation.
Response
Authors: Thacker W. I. , Gorsline G. W.
Published: April 2007

Within the context of our study; that is, the direct substitution of a pure rational scheme for a floating point scheme of arithmetic and storage within an extant FORTRAN system with
no
changes to the compiler (and thus to the storage space available for a single numerical quantity), we continue to claim that our results are valid. We again wish to note that our investigation was limited to the pure rational scheme using the same storage space available to a floating point scheme.
A note to a response to a note
Authors: Kornerup Peter
Published: April 2007

Although I hate to drag on a discussion on a matter which may only have a limited interest to the audience of SIGMICRO Newsletter, I find that the response by Thacker and Gorsline [1] missed my point in [2].
The direct execution of intermediate languages on an Eclipse computer
Authors: Cooper R. E. M.
Published: April 2007

The use of intermediate languages as a convenient means of developing portable high-level language compilers, appears to be growing. With this approach, the compiler for language A (which may be written in language A) compiles the source code into an intermediate language I, which is usually a pseudo-machine language. For each machine that the language is to be implemented on, there is then either a program that converts I into the assembler language for that machine or, alternatively, an interpreter may be written which executes the pseudo-machines code interpretively.
A new perspective on the classical microcode compaction problem
Authors: Vegdahl Steven R.
Published: April 2007

Some comments are made concerning the generality and complexity of the classical microcode compaction problem. A trivial example is given that
no
classical compaction algorithm would compact optimally, because the computation of data precedence relations is dependent on the order of the source code. It is further argued that the classical compaction problem can be solved optimally in polynomial time, where the degree of the polynomial is dependent only on the micromachine architecture. We conclude that the most difficult portion of the microcode compaction problem is that of initially ordering the source code.
SLIM
Authors: Hennessy John
Published: April 2007

SLIM (Stanford Language for Implementing Microcode) is a programming language based system for specifying and simulating microcode in a VLSI chip. The language is oriented towards PLA implementations of microcoded machines using either a microprogram counter or a finite state machine. The SLIM system supports simulation of the microcode and will drive a PLA layout program to automatically create the PLA.
Cramer's rule reconsidered or equilibration desirable
Authors: Dunham Charles B.
Published: April 2007

Consider the solution of systems of two linear equations, for which Cramer's rule has some attractions [3]. It is claimed by Moler [3] that Cramer's rule is of unsatisfactory accuracy even in this case, whereas the claim is made that Gaussian eliminatino with pivoting is good (a related analysis, cited by Moler, is that of Bauer [1]). But consider the example (14) of Forsythe [2, p. 505]
A course on mathematical software
Authors: Cline A. K.
Published: April 2007

During the four academic years ending in 1981, a one semester course in mathematical software construction has been offered by the Computer Sciences Department at the University of Texas at Austin. Although originally offered at a graduate level, a modified version has been offered three times for undergraduate students. Those electing the class include students interested in scientific programming as a profession as well as mathematics, engineering, and science studetns who seek to improve their programming skills.
Understanding collateral evolution in Linux device drivers
Authors: Padioleau Yoann , Lawall Julia L. , Muller Gilles
Published: April 2007

In a modern operating system (OS), device drivers can make up over 70% of the source code. Driver code is also heavily dependent on the rest of the OS, for functions and data structures defined in the kernel and driver support libraries. These properties pose a significant problem for OS evolution, as any changes in the interfaces exported by the kernel and driver support libraries can trigger a large number of adjustments in dependent drivers. These adjustments, which we refer to as
collateral evolutions
, may be complex, entailing substantial code reorganizations. As to our knowledge there exist no tools to help in this process, collateral evolution is thus time consuming and error prone.In this paper, we present a qualitative and quantitative assessment of collateral evolution in Linux device driver code. We provide a taxonomy of evolutions and collateral evolutions, and use an automated patch-analysis tool that we have developed to measure the number of evolutions and collateral evolutions that affect device drivers between Linux versions 2.2 and 2.6. In particular, we find that from one version of Linux to the next, collateral evolutions can account for up to 35% of the lines modified in such code.
Database replication policies for dynamic content applications
Authors: Soundararajan Gokul , Amza Cristiana , Goel Ashvin
Published: April 2007

The database tier of dynamic content servers at large Internet sites is typically hosted on centralized and expensive hardware. Recently, research prototypes have proposed using database replication on commodity clusters as a more economical scaling solution. In this paper, we propose using database replication to support
multiple
applications on a shared cluster. Our system dynamically allocates replicas to applications in order to maintain application-level performance in response to either peak loads or failure conditions. This approach allows unifying load and fault management functionality. The main challenge in the design of our system is the lime taken to add database replicas. We present replica allocation policies that take this time delay into account and also design an efficient replica addition method that has minimal impact on other applications.We evaluate our dynamic replication system on a commodity cluster with two standard benchmarks: the TPC-W e-commerce benchmark and the RUBIS auction benchmark. Our evaluation shows that dynamic replication requires fewer resources than static partitioning or full overlap replication policies and provides over 90% latency compliance to each application under a range of load and failure scenarios.
A quantitative analysis of aspects in the eCos kernel
Authors: Lohmann Daniel , Scheler Fabian , Tartler Reinhard , Spinczyk Olaf , Schröder-Preikschat Wolfgang
Published: April 2007

Nearly ten years after its first presentation and five years after its first application to operating systems, the suitability of
Aspect-Oriented Programming (AOP)
for the development of operating system kernels is still highly in dispute. While the AOP advocacy emphasizes the benefits of AOP towards better configurability and maintainability of system software, most kernel developers express a sound skepticism regarding the thereby induced runtime and memory costs: Operating system kernels have to be lean and efficient.We have analyzed the runtime and memory costs of aspects in general, on the level of μ-benchmarks, and by refactoring and extending the eCos operating system kernel using AspectC++, an AOP extension to the C++ language. Our results show that most AOP features do not induce a intrinsic overhead and that the actual overhead induced by AspectC++ is very low. We have also analyzed a test case with significant aspect-related costs. This example shows how the structure of the underlying kernel can have a negative impact on aspect implementations and how these costs can be avoided by an aspect-aware design.Based on this analysis, our conclusion is that AOP
is
suitable for the development of operating system kernels and other kinds of highly efficient infrastructure software.