(Keynote) FD-SOI: The History from Early Transistors to Today
Authors: Mazure Carlos , Cristoloveanu Sorin 
Published: February 2020

SOI technology was initiated in the mid 60’s by the quest for radiation-hard devices. Silicon on Sapphire (SOS) was the founder of the SOI family which later attracted many other members: epitaxial overgrowth (ELO), lamp or laser-induced melting and recrystallization (ZMR), wafer bonding and etch-back (BESOI), oxygen implantation (SIMOX), porous Si (FIPOS), etc. The coexistence of numerous options meant that none was really convincing as an industrial solution. The discovery of the Smart-Cut technology in early 90’s brought the necessary industrial momentum in terms of material quality, device performance and product adaptability to a variety of IC applications. The further development of Smart Cut Technology for ultra thin Si SOI in the mid 2000’s opened the door to a manufacturing-compatible planar fully-depleted CMOS IC platform, known today as FD-SOI.

The basic mechanisms in fully depleted FD-SOI MOSFETs (interface coupling, back-biasing for threshold voltage adjustment, volume inversion, residual floating-body effects, etc.) have been understood early, when the thickness of Si film and buried dielectric was still in the micrometer range. Since then, these layers become two orders of magnitude thinner, revealing additional phenomena, for example reduced short-channel effects and size quantization. The concept of full depletion spread from FD-SOI to FinFETs and nanowire FETs simply because it is the unique solution for continuing the CMOS down-scaling.

This paper reviews the milestones in FD-SOI history with the key technical steps, the strategic industrial decisions, the path to becoming a mass production qualified 22/28nm platform, the formation of the corresponding ecosystem, the early adopters and the markets driving its future growth. We will give a brief story of FD-SOI with insider experience and discuss its future prospects as the ultra low-power mixed signal & CMOS platform of the Internet of Things (IoT) era.SOI technology was initiated in the mid 60’s by the quest for radiation-hard devices. Silicon on Sapphire (SOS) was the founder of the SOI family which later attracted many other members: epitaxial overgrowth (ELO), lamp or laser-induced melting and recrystallization (ZMR), wafer bonding and etch-back (BESOI), oxygen implantation (SIMOX), porous Si (FIPOS), etc. The coexistence of numerous options meant that none was really convincing as an industrial solution. The discovery of the Smart-Cut technology in early 90’s brought the necessary industrial momentum in terms of material quality, device performance and product adaptability to a variety of IC applications. The further development of Smart Cut Technology for ultra thin Si SOI in the mid 2000’s opened the door to a manufacturing-compatible planar fully-depleted CMOS IC platform, known today as FD-SOI.

The basic mechanisms in fully depleted FD-SOI MOSFETs (interface coupling, back-biasing for threshold voltage adjustment, volume inversion, residual floating-body effects, etc.) have been understood early, when the thickness of Si film and buried dielectric was still in the micrometer range. Since then, these layers become two orders of magnitude thinner, revealing additional phenomena, for example reduced short-channel effects and size quantization. The concept of full depletion spread from FD-SOI to FinFETs and nanowire FETs simply because it is the unique solution for continuing the CMOS down-scaling.

This paper reviews the milestones in FD-SOI history with the key technical steps, the strategic industrial decisions, the path to becoming a mass production qualified 22/28nm platform, the formation of the corresponding ecosystem, the early adopters and the markets driving its future growth. We will give a brief story of FD-SOI with insider experience and discuss its future prospects as the ultra low-power mixed signal & CMOS platform of the Internet of Things (IoT) era.