bluuebunny/crossref_metadata_2025 huggingface dataset:
Interface Trap Characterization and Fermi Level Pinning in Si-Passivated Ge/HfO2 Capacitors
Authors: Martens Koen , Kaczer Ben , Roussel Philippe , Groeseneken Guido , Maes Herman
Published: November 2006

Recently germanium MOSFETs have attracted attention due to the promising carrier mobility of germanium compared to silicon. To understand the germanium MOSFET interface, the conductance interface trap density extraction technique was verified for the first time on germanium MOSFETs. In order to know the characteristics of the (near-) interface traps it is essential to confirm the validity of the model on which their extraction is based. It cannot be simply assumed that the interface will behave as in Si. For this purpose low temperature measurements were performed at 80 K and a variation on the ac conductance technique was developed. Typical Si impedance behavior is found for Ge but Si extraction methods cannot be applied to Ge capacitors in general. Indications for weak Fermi-level pinning near the conduction band were found in Si-passivated Ge/HfO2 capacitors. This explains the weak performance of the corresponding nMOSFET.
Advanced High K Dielectrics for Nano Electronics - Science and Technologies
Authors: Hong Minghwei , Kwo Jueinai
Published: November 2006

Our research activities on high k dielectrics on GaAs, Si, and GaN are reviewed. Novel Ga2O3(Gd2O3) has unpinned the GaAs Fermi level for the first time. Systematic heat treatments under various gases and temperatures were studied to achieve low leakage currents of 10-8 - 10-9 A/cm2 and low Dit's in the range of 4-9 x 1010 cm-2V-1. By removing moisture from the oxide, thermodynamic stability of Ga2O3(Gd2O3)/GaAs is achieved. The mechanism of Fermi-level unpinning in ALD-Al2O3 on InGaAs was unveiled. Single crystal Gd2O3 was found to grow epitaxially on GaAs and unpin its Fermi level. Inversion- channel, depletion-mode, and power GaAs MOSFET's using Ga2O3 (Gd2O3) as the gate dielectric are discussed. The advances in MBE-HfO2 on Si and the MOSFET's with metal gate of TiN and gate dielectric of HfO2 are discussed. Recent work of nano- thick single crystal oxides of Al2O3 and Sc2O3 epitaxially grown on Si (111) is discussed.
Characterization of Charge Storage in ALD Nanolaminates
Authors: Seidel Thomas E. , Srivastava Anuranjan , Zhang Zhihong , Dimitrova Tatiana , Londergan A. R. , Karim Zia
Published: November 2006

Charge storage in ALD nanolaminates is characterized. In this work Al2O3/HfAlO/Al2O3 and SiO2/HfAlO/SiO2 nanolaminates are made on p- substrates with all-ALD processes in a single process module. A metal Hg electrode probe was used to form MIS structures for standard and stressed electrical measurements. Measurements of charge storage, its reversibility and stability were carried out. A signature of positive trapped charge under negative bias stress to the electrode and a signature of negative trapped charge under positive electrode bias stress are observed. Certain Al2O3/HfAlO/Al2O3 structures exhibit larger storage efficiency than their SiO2/HfAlO/SiO2 counterparts.
Recent Developments in ALD Technology for 50 nm Trench DRAM Applications
Authors: Schroeder Uwe , Jakschik Stefan , Erben Elke , Avellan Alejandro , Kudelka Stephan P. , Kerber Martin , Link Angela , Kersch Alfred
Published: November 2006

Key ALD technologies required for the scaling of DRAM trench capacitors below 50nm are demonstrated. The main focus in this article is on the introduction of HfSiO as a dielectric material for deep trench capacitors in combination with the development of an ALD process for this application. Here, the special selection procedure for precursors used for deposition of films in high aspect ratio structures and their implementation in ALD processes will be described, which results in specific requirements for the ALD precursors. Quantum mechanical calculations were used to model reaction chemistry and to understand critical differences between precursors. Electrical properties of an HfSiO/TiN MIS film stack for capacitor applications will be presented showing excellent capacitance values and reliability results for future DRAM applications.
Ruthenium and Ruthenium Oxide Films Deposition by MOCVD Using Ru(DMPD)2
Authors: Kawano Kazuhisa , Kosuge Hiroaki , Oshima Noriaki , Funakubo Hiroshi
Published: November 2006

Physical properties of bis(2,4-dimethylpentadienyl) ruthenium [Ru(DMPD)2] were examined by comparing with those of (2,4- dimethylpentadienyl)(ethylcyclopentadienyl) ruthenium [Ru(DMPD) (EtCp)]. Ru(DMPD)2 had almost the same vaporizing characteristic as Ru(DMPD)(EtCp) and showed lower decomposition temperature of 210{degree sign}C than those of Ru(DMPD)(EtCp), 270{degree sign}C. Ru- based films was deposited from Ru(DMPD)2 - O2 system. Metallic Ru films were deposited at 400{degree sign}C under the oxygen concentration below 0.25%. Crystalline metallic Ru films were deposited down to 220{degree sign}C under this oxygen concentration for the first time using Ru(DMPD)2.
Dielectric Properties of (ZrxTi1-x)O2 Film on Ru/SiO2/Si Substrates Deposited by the Atomic Layer Deposition Using [Zr(OtBu)4 + Ti(OtBu)4] Cocktail Source
Authors: Lim Jaesoon , Cho Kyuho , Kim Kichul , Yoo Chayoung , Kim Sung-Tae , Chung Uin , Moon Jootae
Published: November 2006

Zr-TiO2 thin films were prepared by the atomic layer deposition using Zr(OtBu)4 and Ti(OtBu)4 cocktail sources. 8- inch Ru/SiO2/Si wafers were used for the substrates. It was found that the composition ratio of Zr and Ti in Zr-TiO2 films was similar to the mixing ratio of the precursors. The dielectric constant of as deposited Zr-TiO2 film was 35, which was 1.5 times higher than that of ZrO2. In addition, the leakage currents of Zr-TiO2 film was several orders lower than those of TiO2. The leakage currents of 100 Aå Zr-TiO2 films were less than 100nA/cm2 at 1.0 V, which satisfied the requirements for the DRAM capacitor
A Chemists View of Precursors and Processes for the Production of Hf-Based High K Dielectrics
Authors: Clark Robert D. , Hochberg Arthur , Jahl Matthias , Cuthill Kirk , Kok Tingfung
Published: November 2006

The four major Hf precursors used by the industry are reviewed, compared and contrasted. The production of Hf-based chemicals proceeds through HfCl4, the first of the four major Hf precursors used by the industry, and the precursor to all Hf based materials. The synthesis of the other three major Hf precursors (TEMAH, TDEAH and Hf t-butoxide) starting from HfCl4 provides a rational model for the major impurities commonly found in these materials. Analysis of these impurities in Hf- based precursors is reviewed, including the influence that differing sample preparation methods can have on analytical results leading to apparently different analyses of the same chemical batch. Thermal stability of the Hf precursors is also reviewed. Using our knowledge of the chemical reactivity of these precursors with protic reagents we were able to design a CVD method for producing HfSiON films.
Influence of an In-Situ Formed Interfacial SiNx Layer on the Electrical Performance and Thermal Stability of High-k HfO2 Films
Authors: Hong Sug H. , Kim Jeong Hwan , Park Taejoo , Won J.Y , Jung R.J , Kim Seong Keun , Hwang C.S. , Cho M. J.
Published: November 2006

The influence of an in-situ formed SiNx layer at the interface between a Si substrate and atomic-layer-deposited high-k HfO2 film on the structural stability and electrical performance was investigated. It was found that the densely formed SiNx layer strongly reduces the degradation in capacitance density and interface trap properties during post-deposition annealing up to 1000oC. This is mostly due to a reduced SiO2 formation at the HfO2/SiNx interface during post-annealing. Hf-silicate is mostly formed on the surface region of the film during post- annealing which is also reduced by the SiNx layer.
Workfunction Tuning of Nickel Silicide by Varying Nickel and Silicon Composition
Authors: Biswas Nivedita , Novak Steven , Lee Bongmook , Chen Bei , Misra Veena
Published: November 2006

Effect of varying the composition of nickel and silicon in NixSiy on the work function of nickel silicide gates was investigated. Composition of nickel and silicon was varied by i) co-sputtering Ni and Si and ii) by changing the layer thickness of nickel, in the case of stacked nickel and silicon on SiO2 and hafnium based high-k dielectrics. Wide range of tuning of work function was achieved on SiO2 dielectrics for both co-sputtered and stacked nickel and silicon. The extent of work function tuning decreased on high-k dielectrics. XRD measurements confirmed the presence of NixSiy phases that conformed to the calculated work function values.
Threshold Voltage Control in PMOSFETs with Polysilicon or Fully-Silicided Gates on Hf-Based Gate Dielectric Using Controlled Lateral Oxidation
Authors: Kaushik Vidya S. , Rohr Erika , Hyun Sangjin , De Gendt Stefan , Van Elshocht Sven , Delabie Annelies , Everaert Jean-Luc , Veloso Anabela , Brus Stephan , Ragnarsson Lars-Ake , Richard Olivier , Caymax Matty , Heyns Marc
Published: November 2006

Large threshold-voltage (Vt) shifts are seen in PMOSFETs with Hf-based highK gate dielectric and polysilicon gates. The polysilicon-highK interface can be modified by introducing a thin interfacial oxide layer using a controlled lateral oxidation (CLO) step after gate patterning. This can reduce the threshold voltage shift to within 0.1V of SiO2 reference for devices with gate length <1mm. The benefit of lower Vt with the lateral oxidation comes at the expense of increased EOT. We therefore tried CLO using fully-silicided NiSi gates since the poly-depletion gain can offset the EOT increase. Our results show that the Vt difference between SiO2 and HfSiO is within 50mV. Moreover, the Ion-Ioff performance shows that while poly gates are lower in performance due to high Vt, the FUSI gates give Ion/Ioff at 1.1V of 180 (μA/μm)/20 (pA/μm) for both Hf- silicates and conventional SiO2. Interfacial modification using CLO can be a potential integration solution for highK gate dielectrics with polysilicon gates.
The Influence of NH3 Anneal on the Crystallization Kinetics of HfO2 Gate Dielectric Films
Authors: Lysaght Patrick , Barnett Joel , Woicik Joseph C. , Foran Brendan , Bersuker Gennadi , Lee Byoung Hun
Published: November 2006

HfO2 gate dielectric thin films have been exposed to anneal processing in NH3 and N2 ambient in order to decouple the influence of N incorporation from that of the thermal cycle alone. We report on the effectiveness of NH3 processing to introduce N into the dielectric film system and characterize the local coordination and crystallization kinetics that give rise to the resultant high-k film microstructure as determined from a variety of high resolution spectroscopic and imaging analysis techniques.
Microscopic and Spectroscopic Analysis of High-k Oxide HfOx Films
Authors: Park Jonghyurk , Jung R.J , Cho Yong-Jai
Published: November 2006

We report the non-destructive study of high-k dielectric HfO film using conductive atomic force microsocpe and spectroscopic ellipsometry. We have grown ultrathin samples by sputter- oxidtaion and atomic layer deposition and compared their electrical and optical properties at the nanometer scale.
Materials Interaction at the Nanoscale in High-k Metal Gate Stacks: The Role of Oxygen
Authors: Guha Supratik , Preisler Edward , Bojarczuk Nestor , Copel Matthew
Published: November 2006

We have studied tungsten gated hafnium oxide silicon MOSFETs and show that dissolved oxygen in the tungsten metal can diffuse to the hafnium oxide silicon interface, resulting in interfacial oxide growth and higher mobilities. These results indicate that even small amounts of dissolved oxygen in metal gates is a key issue that can impact device microstructure. We also examine the formation of this oxide and show that there is critical oxygen vacancy concentration in the hafnium oxide, below which interfacial silicon oxide formation will be favorable and above which the interfacial oxide will be unstable.
Band Edge Traps at Spectroscopically-Detected O-Atom Vacancies in Nanocrystalline ZrO2 and HfO2: An Engineering Solution for Elimination of O-Atom Vacancy Defects in Non-crystalline Ternary Silicate Alloys
Authors: Lucovsky Gerald , Luning J. , Stoute N. A. , Seo H. , Hinkle C. L. , Ju B.
Published: November 2006

Spectroscopic studies, supported by theory indicate that neutral and negatively charged O-atom vacancies are the most important intrinsic defects in nanocrystalline thin films of Hf (Zr)O2. O-atom vacancy defects are identified in this paper by different spectroscopic technique: vacuum ultra-violet spectroscopic ellipsometry, near edge x-ray absorption spectroscopy, and cathodo-luminescence spectroscopy. O-vacancy defects are active as i) interface traps for Si substrate injection of holes, and ii) bulk film traps for Si substrate injection of electrons. The markedly different electron and hole trapping properties are a potentially serious problem for threshold voltage control and stability in CMOS inverter FETs using nanocrystalline Hf(Zr)O2 dielectrics. O-vacancy defects are not observed specrtroscopically in thermally and chemically stable Zr Si oxynitride alloy films, (SiO2)x(Si3N4)y(ZrO2)z, that have been annealed at 1100ºC in Ar. Si3N4 concentrations in these alloys must be controlled within narrow limits, ~0.36 to 0.4, with equal SiO2 and ZrO2 concentrations of approximately 0.32 to 0.3.
Effects of the Defects at HfOxNy/Si Interface on Electrical and Reliability Characteristics of MOS Devices
Authors: Chang-Liao Kuei-Shu , Cheng C. L. , Lu C. Y. , Huang C. H. , Wang S. H. , Wang T. K.
Published: November 2006

This work investigates and compares the effects of forming a denuded zone (DZ) at (111) and (100) Si surface on the electrical characteristic of MOS devices with HfOxNy high-k gate dielectric. Devices with DZ (low defect region) treatment at Si surface exhibit better electrical characteristics, such as reduced gate leakage current, defect generation rate, and interface trap density, as well as increased time to breakdown than those of without DZ treatment. This improvement can be attributed to the decrease of the defects at Si surface. In particular, by introducing DZ at the Si surface, the (111)- surface-oriented Si substrate has demonstrated more significant improvement on electrical properties than the (100) one.
Formation of Pedestal Oxynitride Layer by Extremely Shallow Nitrogen Implantation in Planar R.F. Plasma Reactor
Authors: Bieniek Tomasz , Beck Romuald , Jakubowski Andrzej , Hoffmann Patrick , Schmeisser Dieter , Konarski Piotr , Cwil Michal
Published: November 2006

Presented in this work experiments are a part of a broader study that examines the possibility of fabrication of pedestal oxynitride layers for high-K gate stacks by nitrogen implantation from r.f. plasma. The aim of this work was to study the influence of type of nitrogen gas source of nitrogen, r.f. power, temperature and implantation time on the oxynitride layer properties. The obtained layers were characterized by means of: ellipsometry, XPS and SIMS. In order to obtain dielectric layers suitable for electrical characterization methods, the plasma nitridation was followed by plasma oxidation process. The results of electrical characterization of test structures fabricated with investigated layers used as gate dielectric, are also discussed.
Sub 2 nm Thick Zirconium Doped Hafnium Oxide High-K Gate Dielectrics
Authors: Kuo Yue , Lu Jiang , Yan Jiong , Yuan Tao , Kim Hyun Chul , Peterson Jeff , Gardner Mark , Chatterjee S. , Luo W.
Published: November 2006

Zr-doped HfOx high-k gate dielectric films with TiN gate electrode were sputter deposited on 1 nm SiO2 or SiOxNy interface layer. Electrical properties including the equivalent oxide thickness, flat band voltage, interface state density, and the oxide charge trapped density of the MOS capacitors were investigated with respect to fabrication parameters such as Zr doping condition, post deposition annealing ambient, and type of bottom interface layer. Excellent electrical properties were obtained for films deposited at low sputtering powers. An equivalent oxide thickness of 1.7 nm was achieved for Zr-doped HfOx on a 1 nm SiO2 interface. The leakage current is four orders of magnitude lower than that of the SiO2 film. The magnitude and polarity of the flat band voltage is influenced by the high-k film deposition method, the dopant concentration, and the post deposition annealing condition. With the same SiOxNy interface layer, the Zr-doped film has a lower leakage current and a smaller interface density of states than the undoped film.
Ultra-Thin HfON Films Formed with He/FG Plasma Jet Assisted PVD Process
Authors: Liu Yanxiang , Wang Sharon , Ma T.P. , Lee Lurng-Shehng , Tsai Ming-Jinn , Chou Yu-Wei
Published: November 2006

Ultra-thin HfON films with excellent electrical properties have been made with a He/FG Plasma Jet Assisted PVD Process. In the process, He jet with high impinging energy gives rise to an in-situ annealing effect, and forming gas provides atomic N and H incorporation. More than 10% atomic concentration N is found bonded in the ultra-thin HfON films. Electrical characterization proves the high quality of the HfON films with negligible traps and interfacial states.
Characteristics of the HfO2 Thin Films Grown by Remote Plasma Atomic Layer Deposition Method on the Plasma Oxidized Si Substrate
Authors: Kang Hyunseok , Kim Seokhoon , Kim Jinwoo , Choi Jihoon , Jeon Hyeongtag , Bae Choelhwyi
Published: November 2006

We investigated the electrical and physical characteristics of HfO2/SiO2/Si structure grown by remote plasma atomic layer deposition (RPALD) method. The surface preparation of Si (100) substrate was performed on HF-cleaned Si substrate by remote plasma oxidation (RPO) process and yielded about 0.5-nm-thick SiO2 layer. HfO2 films were deposited on both HF-cleaned and RPO-treated Si substrates by the RPALD method, respectively. Results show that the RPO-treated substrate effectively suppressed the diffusion of oxygen or/and silicon into the film during film deposition. Therefore, the RPO-treated samples have thinner initial Hf silicate layers than those without RPO treated substrate. And we have also observed a decreasing of the hysteresis and effective charge density (Qeff) as well as an improvement of the equivalent oxide thickness (EOT) in RPO treated samples.
Dielectric Evolution Characteristics of HfCN Metal Electrode Gated MOS Stacks
Authors: Wang Wenwu , Nabatame Toshihide , Shimogaki Yukihiro
Published: November 2006

Hafnium carbonitride (HfCN) films were synthesized as a metal gate electrode by metal organic chemical vapor deposition (MOCVD) technique using Hf[N(C2H5)2]4 (TDEAHf) precursor. The physical and electrical properties, especially the dielectric evolution characteristic of oxide dielectric were evaluated by using X-ray photoelectron spectroscopy (XPS), capacitance- voltage (C-V) and current-voltage (I-V) measurements. As a result, the capacitance-deduced equivalent oxide thickness (EOT) becomes much smaller than the initial physical thickness of various oxide dielectrics after HfCN deposition. For the case of HfCN/SiO2 stacks, the reduction in EOTs was attributed to the increase in average effective dielectric constant, possibly due to atoms interdiffusion, e.g, N, Hf or O atoms, which may promote the formation of high-k dielectric phases. Based on the dielectric evolution characteristic, although the leakage current in HfCN/SiO2 stack with reduced EOT is close to the level of n+ p-Si/SiO2 stack, Hf-based metal electrode/high- k dielectric/Si MOS stacks are also expected to be integrated on the conventional SiO2 dielectric by one step metal electrode deposition.
Composition Dependence of Physical and Electrical Properties of HfSiON Films as Alternative Gate Dielectrics
Authors: Nishiyama Akira , Koike Masahiro , Kamimuta Yuuichi , Suzuki Masamichi , Ino Tsunehiro , Koyama Masato
Published: November 2006

Detailed investigation of the HfSiON electrical property dependence on Hf and N concentration has been conducted. The electrical property has been correlated with the film physical structure in this study. Increase in Hf and N concentrations enhances the film dielectric constant, especially when Hf-N bonds are formed in the film. The Hf-N formation results in the bandgap narrowing, leading to barrier height reduction at the same time. In view of the figure of merit in terms of the suppression of the direct tunneling leakage current, high Hf and N may be desirable for the application of HfSiON films as alternative gate dielectrics.
High Performance Metal Gate CMOSFETs with Aggressively Scaled Hf-Based High-k
Authors: Song Seung-Chul , Zhang G. L. , Bae S. H. , Kirsch P. , Majhi P. , Choi R. , Lee B. H.
Published: November 2006

The optimization of MOSFET performance with Hf-based high-k and TiN metal gate is discussed. MOSFET performance and mobility of metal and poly gate on both high-k and SiO2 are compared. Optimization of the thickness and composition of Hf-silicate is discussed in terms of charge trapping and boron diffusion. The effect of metal gate thickness is also investigated. Appropriate dry and wet etch processes are found to effectively eliminate the metal foot and high-k undercut. Impressive Ion- Ioff characteristics have been achieved by applying an optimized gate-first CMOS flow to the high-k/metal stack. Ion = 1100µA/µm and 540µA/µm was attained for N and PMOSFETs with Vdd = 1.2V and Ioff = 100nA/µm.
Influence of Ta(N) Metal Gate Microstructure on Its Etch Properties
Authors: Shamiryan Denis , Paraschiv Vasile , Tokei Zsolt , Boullart Werner
Published: November 2006

The etch properties of PVD TaN used as a metal gate electrode have been found to be dependent on its crystalline microstructure. As found by XRD, the initially amorphous TaN crystallizes at temperatures above 500C. The crystallization results in lower resistivity (decreased by 13%), and lower etch rate in BCl3 plasma (decreased by 24%). The different crystalline microstructure can manifest itself in different etch results when the same etch process is applied for gate stacks that contain the same TaN but were subjected to different thermal budget.
Wet Etch Characteristics of Hafnium Silicate Layers
Authors: Claes Martine , Paraschiv Vasile , Dictus Dries , Conard Thierry , Boullart Werner , Vanhaelemeersch Serge , De Gendt Stefan , Delabie Annelies , Van Elshocht Sven , Zhao Chao , Everaert Jean-Luc
Published: November 2006

To facilitate selective removal of the gate dielectric towards the gate electrode, wet etch characteristics of HfSiOx and HfSiOx(N) in acidified HF solutions were determined as function of several process parameters. Etch behavior of Hf- silicates was found to be little influenced by the various CVD deposition processes. The top part (0-2 nm) of thick Hf- silicate layers etched similar to as-deposited thin layers (< 2nm) while the bulk part was etching significantly slower. However, etch rates were strongly dependent on composition (lower for Hf-rich silicates). Also, the removal rate of HfSiOx (N) was mainly depending on the amount of incorporated nitrogen and crystallization temperature. Thermally nitrided layers were easier to remove compared to plasma nitrided layers. Post nitridation anneals at high temperature in nitrogen environment decreased the etch rate. After removal, Hf concentrations below 1e11 at/cm2 for most of the HfSiOx(N) layers under study were observed after a short (typically a few seconds) etch process in a single wafer spin cleaning tool.
Charge Trapping Effects in High-k Transistors
Authors: Bersuker Gennadi , Sim Johnny , Young Chad , Choi Rino , Park C.S. , Lee Byoung Hun
Published: November 2006

Fast transient and relatively slow constant voltage stress (CVS) electron trapping phenomena in high-k gate dielectrics are investigated. It is suggested that the resonance tunneling of the injected electrons directly into the shallow defect states is responsible for the fast transient trapping, while the temperature-activated electron migration between the traps govern slow CVS trapping. The extracted trap energies and their effective dimensions fit the calculated characteristics of the O vacancies in monoclinic hafnia. The relationship between trap characteristics and the reduction of trapping observed in ultra- thin high-k gate stacks is discussed.
Effect of Nitridation on 1/f Noise in n-MOSFETs with High-k Dielectric
Authors: Srinivasan Purushothaman , Simoen Eddy , Rittersma Chris , Pantisano Luigi , Claeys C. L. , Misra D.
Published: November 2006

This paper reports the nitridation effects on 1/f noise in n- MOSFETs with MOCVD HfO2 as gate dielectric. Nitridation was carried out by using a post-deposition anneal (PDA) process in a N2 or NH3 ambient.For non-nitrided interfaces, significant variation in noise was observed for different PDAs. Devices annealed with N2 show the lowest input referred noise, close to ITRS specifications when compared to O2 and NH3 anneals. Decoupled plasma nitridation (DPN) was employed for devices involving nitrided interfaces.A suppressed effect was observed as the input-referred noise was found to have similar values for different conditions.A significant change in trap profile is noticed between nitrided and non-nitrided interfaces, which may be one of the causes for the differences observed. Trap densities, showed lowest values for a N2 PDA anneal and highest for an O2 anneal. Devices with nitrided interfaces show similar value for all PDAs in-between the N2 and O2 non-nitrided PDA.
Efficient Calculation of Lifetime Based Direct Tunneling Through Stacked Dielectrics
Authors: Karner Markus , Gehring Andreas , Holzer Stefan , Kosina Hans , Selberherr Siegfried
Published: November 2006

We present an efficient simulation method for lifetime based tunneling in CMOS devices through layers of high-κ dielectrics, which relies on the precise determination of quasi-bound states (QBS). The QBS are calculated with the perfectly matched layer (PML) method. Introducing a complex coordinate stretching allows artifical absorbing layers to be applied at the boundaries. The QBS appear as the eigenvalues of a linear, non-Hermitian Hamiltonian where the QBS lifetimes are directly related to the imaginary part of the eigenvalues. The PML method turns out to be a numerically stable and efficient method to calculate QBS lifetimes for the investigation of direct tunneling through stacked gate dielectrics.
New Insights in Hf Based High-k Gate Deielectrics in MOSFETs
Authors: Li Ming-Fu , Zhu Chunxiang , Shen Chen , Yu Xiong Fei , Feng Yuan Ping , Yeo Yee Chia , Chin Albert , Kwong Dim-Lee , Wang S. H. , Du A. Y. , Samudra G.
Published: November 2006

I. Two different traps (fast and slow) in HfO2 gate dielectric are identified. For the slow traps, the negative U (-U) property of trap is proposed and confirmed by the first principle calculation. Each trap can trap two electrons or two holes and lower the trap energy due to a large lattice relaxation. The observed experimental result of reduction in slow component of bias temperature instability (BTI) degradation with an increase in stress frequency can be simulated with excellent agreement, based on the concept of - U. A fast BTI component is also observed. The fast dynamic BTI degradation is increased with an increase in stress frequency. It is due to the existence of fast traps and can be simulated by the conventional trapping/de-trapping equations. The fast trap is a standard conventional trap. II. Mixing Ta and La into HfO2 to form HfTaO and HfLaO gate dielectric have been studied systematically. Comparing to the HfO2 gate dielectric, the HfTaO and HfLaO have the advantages of much higher crystallization temperature, much lower charge trapping as well as the BTI degradation, and increased channel mobility. In addition, variation of La concentration in HfLaO/TaN or HfLaO/HfN gate stack can effectively tune the metal work function continuously from mid gap to 4eV. Possible physical explanation for these interesting properties are discussed.
Atomic Layer Deposited HfO2 and HfSiO to Enable CMOS Gate Dielectric Scaling, Mobility, and VTH Stability
Authors: Kirsch Paul D. , Quevedo-Lopez Manuel , Krishnan Siddarth , Song Seung-Chul , Choi Rino , Majhi Prashant , Senzaki Yoshi , Bersuker Gennadi , Lee Byoung Hun
Published: November 2006

Atomic layer deposited (ALD) Hf-based dielectrics have been studied to understand scaling, electron mobility, and threshold voltage stability issues in transistor devices. ALD HfO2 formed from TEMAHf and O3 was found to reach a scaling limit near Tphys=1.2 nm. Knowledge of this limit is important because mobility improvements are observed as HfO2 is scaled to 2.0 nm and below. Concurrent with mobility improvement, a reduction in transient charging is manifested as improved VTH and Id stability during constant voltage stress. HfO2 attributes include the following: EOT=1.0 nm, >100× Jg reduction vs. SiO2/PolySi, high field mobility of 82% universal SiO2 and ~20 mV of DVTH after 1000s stress at 1.8V. Similar results can be obtained for (HfO2)x(SiO2)1-x alloys. These results suggest that high-k dielectrics can be competitive with the current gate dielectric material SiON.
Metal-Organic Atomic Layer Deposition of Metals for Applications in Interconnect Technology
Authors: van der Straten Oscar , Rossnagel S.M. , Doyle J.P. , Rodbell K.P.
Published: November 2006

Metal-organic atomic layer deposition (ALD) of ruthenium has been investigated by both thermal and remote plasma-enhanced methods. Based on the metal-organic ruthenium source bis(2,4- dimethylpentadienyl)ruthenium, a suitable reduction path towards the formation of ruthenium films by ALD was found using either molecular oxygen, or a remote nitrogen plasma. The ruthenium films were deposited in-situ on ultra-thin tantalum nitride layers, grown by plasma-enhanced ALD. Although in both the thermal and remote plasma-enhanced ALD cases highly pure ruthenium was obtained, key differences in film growth rate and film surface morphology were identified when comparing both ALD methods.
Platinum Liner Deposited by Atomic Layer Deposition for Cu Interconnect Application
Authors: Zhu Yu , Dunn Kathleen , Kaloyeros Alain
Published: November 2006

Ultra-thin platinum films have a wide range of nanoscale applications including seed layer for electrochemical deposition of copper for integrated circuit interconnects. Atomic layer deposition of platinum provides a uniform and continuous conductive surface for subsequent Cu electroplating. A thermal metal-organic atomic layer deposition approach was developed for the growth of ultra-thin platinum films by alternating pulses of (methylcyclopentadienyl)trimethylplatinum and oxygen. The platinum films were deposited in-situ on atomic layer deposited tantalum nitride films. The ALD process was optimized by investigating growth rate saturation as a function of individual reactant exposures as controlled by the length of reactant pulses and the duration of the inert gas purge cycles separating the reactant pulses. Subsequent electrochemical deposition of Cu was demonstrated on ultra- thin Pt films.
LEIS Study of ALD WNxCy Growth on Dielectric Layers
Authors: Stokhof Maarten , Sprey Hessel , Li Wei-Min , Haukka Suvi , Ridder de Marco , Brongersma Hidde
Published: November 2006

The required thickness for closure of WNxCy layers deposited with the Atomic Layer Deposition (ALD) technique on Plasma Enhanced CVD SiOx and Aurora® low-k dielectric was investigated using Low Energy Ion Scattering Spectroscopy (LEIS). This analysis technique has proven to be very surface sensitive and uniquely suited to determine closure of deposited layers with atomic precision. It was shown that the WNxCy layer closes around 40 ALD deposition cycles, setting the upper thickness limit for closure at 3.2 nm. This thickness is in line with the requirements for copper diffusion barriers for the metallization of Si-devices for 45 nm node and beyond.
Low-k SiBN (Silicon Boron Nitride) Film Synthesized by a Plasma-Assisted Atomic Layer Deposition
Authors: Yang Sang Ryol , Kim Jin-Gyun , Noh Jin-Tae , Kim Hong-Suk , Lee Sung-Hae , Ahn Jae-Young , Hwang Ki-Hyun , Shin Yu-Gyun , Chung Uin , Moon Jootae , Lee Dong-Kak , Yi In-Sun , Jung Ran-Ju , Kang Sang-Bum
Published: November 2006

In this study, SiBN films were prepared by plasma assisted atomic layer deposition (PAALD) using dichlorosilane, boron trichloride and ammonia as source gases. In this material system, the reaction control of boron, silicon and nitrogen is a key issue because nitrogen reacts more readily with boron than with silicon. On the other hand, ammonia radicals created by remote plasma during PAALD enhance the reaction between silicon and nitrogen. Therefore, PAALD enables an enhanced controllability of silicon and boron contents. SiBN films with dielectric constant of 4.45 to 5.47 were applied to buried- contact (BC) spacer instead of SiN films in 70 nm DRAM device, and 12 - 24% reduction of bit-line loading capacitance (CBL) was obtained. Low-k SiBN films using PAALD are promising materials for insulating interlayer such as Si3N4 spacer for future sub-70 nm DRAM devices.
Modeling and Engineering of Hafnium Silicate (HfSiO) Gate Dielectrics Deposited by Nano-Laminated Atomic-Layer Deposition (NL-ALD)
Authors: Chang Vincent S. , Hou Y.T. , Hsu P.F. , Lim P.S. , Yao L.G. , Yen F.Y. , Hung C.L. , Lin H.J. , Jiang J.C. , Jin Y. , Chen C.C. , Tao H.J. , Chen S.C. , Jang S.M. , Liang Mong-Song
Published: November 2006

A semi-empirical, stacked capacitor model was developed to calculate the dielectric constants (k) and deposition rates of hafnium silicate (HfSiO) deposited by nano-laminated atomic layer deposition (NL-ALD) from the HfO2 and SiO2 ALD cycles (m and n, respectively). The calculations agree well with the experimental data, with an accuracy of 90%. The model enables the deposition of HfSiO with desired thicknesses and any dielectric constants ranging from 7 to 19 using proper combinations of m and n. The systematic study on the effects of various combinations of m and n that give similar dielectric constants showed that increasing m and n enhances the dielectric scalability due to less defects formed at the high- k/IL oxide interface during NL-ALD, but degrades the electrical stability due to more severe charge trapping. Changing m and n has no significant effect on thermal stability and electron mobility.
Characteristics of ZnO Thin Films by Means of Plasma Enhanced Atomic Layer Deposition
Authors: Park Sang-Hee K. , Kwack Ho-Sang , Lee Jin-Hong , Hwang Chi-Sun , Chu Hye-Yong
Published: November 2006

Zinc oxide thin films were grown in a temperature range of 70 to 180oC by means of plasma enhanced atomic layer deposition (PEALD) for the first time. The films have growth rate of 1.9Aå/cycle. The XRD patterns showed more or less random orientation of ZnO films grown by PEALD, but the reduced plasma power resulted in preferred (002) orientation of films at 150oC. The sheet resistivity of films grown with oxygen plasma was too high to measure with 4 point probe and Hall measurement system. The difference of electrical property between PEALD and H2O-based ALD films is attributed to a different O/Zn atomic ratio.
Dependence of Photoresist and Etch Residue Removal on CO2 Pressure in Alcohol-Based Gas-Expanded Liquids
Authors: Hess Dennis , Song Ingu , Spuller Matthew , Levitin Galit
Published: November 2006

With rapid technology development of integrated circuits, new challenges arise. Current liquid based removal chemistries are limited by continuous decrease in feature devices as well by their hazardous nature. Gas expanded liquids (GXLs) and supercritical fluids may offer a more environtmentally benign alternative. The GXL formulated by CO2 expanded ethanol (up to 75 mole % CO2) removed PHOST (polyhydroxystyrene) photoresist film indicating that the inclusion of CO2 does not inhibit photoresist removal. In situ interferometry measurements of the PHOST layers generated insight into the removal mechanism. The GXL CO2 expanded TMAHCO3/CH3OH at a temperature of 90oC and pressures above 1000 psig removed photoresist and post plasma etch residue. Cleaning efficiency depended upon CO2 pressure; at low pressures the CO2 reduced the mole fraction of the TMAHCO3/CH3OH while at higher pressures the CO2 assisted removal.
Study of the Intrinsic Safety Features in a Cylindrical Li-Ion Cell
Authors: Jeevarajan Judith A. , Hall Albert
Published: November 2006

Li-ion cell manufacturers have been looking into solving the issue of catastrophic hazards due to the flammability property of the cells and cell failure due to overdischarge conditions. The current program involves testing of cells that have a self- extinguishing electrolyte and a zero voltage tolerance. Under this program, fresh and cycled cells with a self- extinguishing electrolyte and zero-voltage tolerance were tested. The tests performed were heat-to-vent, overcharge, overdischarge, short circuits and crush. The results of the tests and the behavior of the cells will be compared to results from standard cells that do not have these properties.
Comparison of Safety of Two Primary Lithium Batteries for the Orbiter Wing Leading Edge Impact Sensors
Authors: Jeevarajan Judith A.
Published: November 2006

The Extended Wide Band Micro-Tri-axial Assembly Wing Leading Edge (EWBMTAU-WLE) consists of impact sensor, receiver and relay units that are installed in the Orbiter for its two flights. There are 22 sensor and 2 relay units on each wing. There are two receiver units inside the cabin. All sensor, relay and receiver units are powered by batteries. The batteries used for the first two flights after the Orbiter returns to flight are made up of battery assemblies that contain two LiFeS2 cells in series. Extensive testing was performed on the LiFeS2 and LiBCX cells to determine the safety of these cells under nominal and abuse conditions. The LiFeS2 cells were found to be extremely safe under all the conditions tested. The battery pack has diodes on each cell to prevent cell reversal and a fuse to prevent external short circuits from affecting the cells. The cells are internally fitted with PTCs (positive temperature coefficient) to reduce the load on the cell in the event of an external short. The batteries have undergone extreme environmental tests as single cells, battery packs and as part of the sensor units. This paper will discuss the results of the tests performed on the LiBCX and LiFeS2 cells.
New Alkaline Electrochemical Cells Using Stabilized CuO-CuS Cathodes
Authors: Bushong William , Destephen Mario , Jin Zoe , Ndzebet Ernest , Kennedy Jon , Ramaswami Karthik , Scherer Jürgen , Boone David , Mortensen Erik , Gilbert Deb , Vu Viet
Published: November 2006

The discharge behavior of CuO-CuS based cathodes was investigated for use in primary alkaline cells. It was found that the Zn//CuO-CuS cells exhibited longer service life than traditional Zn//MnO2 cells. However, their shelf life was lower due to self-discharge reactions occurring in the cathode. The mechanism of CuO-CuS cathode self-discharge was investigated. Improved storage performance was achieved when CuS particles were encapsulated with CuO.
Plenary Address- New Types of Rechargeable Lithium and Lithium-Ion Polymer Batteries
Authors: Scrosati Bruno , Panero Stefania , Settimi Lucia , Croce Fausto
Published: November 2006

The activities in progress in our laboratory for the development of new types of lithium batteries to be proposed for portable electronics and hybrid car application, are reviewed and discussed. The research has been mainly focused on the characterization of new electrode and electrolyte materials. Results related to improved, solvent-free , as well as gel-type, polymer electrolytes are particularly stressed. It is shown that the use of proper gel electrolytes in combination with suitable electrode couples, allows the development of new types of safe, reliable and low cost lithium ion batteries which appear very promising power sources for hybrid vehicles.
The Influence of SBR on the Recycling Performances of Co3O4 Negative Electrode in Lithium-Ion Batteries
Authors: Yu Weiping , Qian Jiancai , Zhang Shichao , Pan Cao , Huang Dong
Published: November 2006

In the present research, a novel negative electrode, Co3O4-SBR has been prepared by a co-deposition-sintering method in aqueous solution. XRD analysis indicated that Co(OH)2-SBR obtained by electro-deposition was transformed to Co3O4-SBR after heat-treated under vacuum at 245°C. SEM images show that the Co3O4 film exhibits a honeycomb structure filled with SBR, in which the wall of honeycomb is about 30-50 nm in thickness. Such Co3O4-SBR nano-composite layer is stable and can prevent active materials spalling from the substrate effectively. Charge-discharge tests show that the characteristics of Co3O4 electrode, such as specific capacity and cycle life, can be significantly improved by doping SBR, especialy for long cycles.
Corrosion and Passivation of Aluminum in LiBOB/EC+DMC Electrolyte
Authors: Devine Thomas M. , Xueyuan Zhang
Published: November 2006

The passive film that forms on aluminum in 1:1 Ethylene Carbonate (EC) + Dimethyl Carbonate (DMC) with 1M Lithium Bis-oxalato borate (LiBOB) was investigated by a combination of cyclic polarization tests and electrochemical quartz crystal microbalance measurements. The results suggest the passive film consists of AlBO3 and that the passive film is very resistant to pitting corrosion in electrolytes with LiTFSI, which is normally highly corrosive to aluminum.
On-chip Electrical Field Sensing for Lab-on-a-Chip Applications
Authors: Badawy Wael , Ghallab Yehya
Published: November 2006

This paper presents a novel CMOS electric field sensor, termed as a Differential Electric Field Sensitive Field Effect Transistor (DeFET). It's based on a standard 0.18µm CMOS technology. The DeFET shows a sensitivity of 76 µA/V/µm. Also, the DefET's theory of operation is presented and discussed. Both the experimental and simulation results confirm the DeFET's theory of operation is presented.
Nano-Crystalline Grained Silicon Formed by Rapid Thermal Chemical Vapor Deposition for Advanced Gate Electrode Application
Authors: Li Ming , Ma Yi , Zhang Kangzhan , Panayil Sheeba , Maeda Yuji , Iyer R
Published: November 2006

With continuous down scaling of semiconductor devices, poly depletion has become a significant portion of gate dielectric inversion thickness. In an effort to reduce poly depletion, nano-crystalline grained (NCG) silicon has been developed using a rapid thermal chemical vapor deposition process. The grain structures were controlled through varying deposition temperature, pressure and flow rate of gases. NCG silicon formation has been engineered through a new two step process. The structure demonstrated retention of nano-crystalline characteristics with limited grain growth after boron and phosphorous doping and high temperature dopant activation annealing. Higher boron concentration at gate and dielectric interface provides a potential poly depletion reduction of about 1.2 Aå, compared with conventional columnar grained poly- silicon.
Enhanced Boron Activation in Strained-Si/Si1-xGex Substrate Using Laser Annealing
Authors: Pey Kin-Leong , Ong Kuang-Kian , Lee Pooi-See , Wee Andrew , Wang Xincai , Wong Lydia
Published: November 2006

Strained-Si/SiGe substrate comprises a thermally less conductive SiGe layer, which deprives a good thermal dissipation pathway. This gives rise to a highly non- equilibrium laser process and can vary significantly to that in normal bulk silicon substrate. Our results show that the boron distribution in strained-Si/SiGe substrate is always deeper and more abrupt than that in bulk silicon substrate, signifying a substantial thermal confinement that leads to a greater melt extent and melting duration. It is found that a decrease of over 94% thermal transfer rate occurs in the strained-Si/SiGe substrate. Non-melt laser annealing, on the other hand, produces dopant profiles of negligible diffusion and improves activation in the strained-Si/SiGe substrates. No degradation in the strain in the strained-Si layer was induced after non- melt laser annealing. The study demonstrates that non-melt laser annealing in thermally less conductive semiconductor substrates is capable of enhancing dopant activation at low laser fluence.
Using Dynamic Signal Analyzers for Electrochemical Impedance Spectroscopy
Authors: Lee James I.
Published: November 2006

This publication summarizes the advantages of using a dynamic signal analyzer (DSA) for electrochemical impedance spectroscopy (EIS). The built-in fast Fourier transform (FFT) technique can provide a significant improvement in speed of data acquisition at the cost of dynamic range. The two-pane plotting of data in real time can provide a rapid assessment of data quality. The fact that a DSA does not require a computer makes it a good candidate for field measurements.
Novel Approach for Silicon Contamination Monitoring Using Surface Photo-voltage Measurements
Authors: Rapoport Igor , Taylor Patrick , Kim Seung-Bae , Orschel Benno , Huber Walter , Kearns Joel
Published: November 2006

Two-side Surface Photovoltage (TS-SPV) based on measuring SPV from both wafer sides is proposed as novel approach for silicon surface contamination monitoring. TS-SPV is applied to investigate the process of diffusion of implanted iron in lightly doped p-type silicon during Rapid Thermal Anneal (RTA). Good correlation was found for iron distribution vs. RTA conditions in the temperature range from 375 to 1100oC. The portion of electrically active interstitial iron measured by TS-SPV was studied as function of RTA time and temperature conditions. Low thermal budget RTA combined with TS-SPV is proven to be effective to monitor iron contamination and to identify the contamination sources character and location.
Selective Epitaxial Growth of Arsenic-Doped SiGe Structures with LPCVD
Authors: Schindler Markus , Senftleben Oliver , Schmidt Matthias , Eisele Ignaz , Taylor William
Published: November 2006

We investigated selective epi in low pressure chemical vapour deposition(LPCVD) with a dichlorosilane(DCS)/silane-germane-arsine chemistry. Characterisation was done with secondary-ion-mass-spectroscopy (SIMS), scanning-electron microscopy (SEM) and 4-pt-probing. The areal growth rates show an Arrhenius type behaviour in the temperature regime from 775{degree sign}C down to 600{degree sign}C. For LPCVD at 10 Torr the arsenic dopant concentration was very low (1E17/cm3) for DCS. For 640 Torr the arsenic dopant concentration shows a temperature dependence ranging from 4E19/cm3 (775{degree sign}C) up to 2E21/cm3 (600{degree sign}C). Adding 4sccm GeH4 at 700{degree sign}C drasically reduces the resistivity (5mOhmcm) and at the same time increases the deposition rate. The doping transition lenghts ranged from 20 nanometers (DCS/germane) up to more than 50nm for silane. These are drasically reduced by an arsine build-up process. Selectivity with respect to silicondioxide was achieved for DCS and DCS/arsine at low pressures (10,20)Torr. Howewer, considerably loading effects have been observed as soon as arsine has been added.
DMAB Oxidation for Electroless Deposition from Alkaline Solutions
Authors: Rohan James F. , Ahern Bernadette M. , Nagle Lorraine C.
Published: November 2006

Dimethylamine borane (DMAB) has been used as a reducing agent in electroless baths for many years. There has been an increased interest in DMAB-based electroless baths recently for applications in microelectronics such as barrier/capping layers for copper IC interconnect. To optimise the plating baths a thorough understanding of the role of each of the bath constituents is required. To this end we have employed microelectrodes to investigate the oxidation mechanism of boranes in alkaline solutions. In this paper we present data for DMAB and the simpler ammonia borane (AB) to assist in the analysis of borane oxidation in alkaline solutions. Both DMAB and AB are shown to oxidise in two steady state mass transport- controlled oxidation waves for specific concentration ranges. The potential range for oxidation, the optimum concentration and a suggested mechanism for oxidation are shown.