Total ionizing dose effect of double-trench SiC MOSFET
Authors: ZHU Wenlu , GUO Hongxia , LI Yangfan , MA Wuying , ZHANG Fengqi , BAI Ruxue , ZHONG Xiangli , LI Jifang , CAO Yanhui , JU Anan ,   School of Material Science and Engineering, Xiang Tan University, Xiangtan 411105, China,   Northwest Institute of Nuclear Technology, Xi’an 710024, China
Published: January 2025

In this work, the influence of <sup>60</sup>Co-γ ray irradiation on double trench SiC metal–oxide–semiconductor field-effect transistors (MOSFETs) is investigated under different conditions. First, the effects of the total ionizing dose (TID) on the electrical performance of the device at different gate bias voltages are studied. The results indicate that at 150 krad (Si) irradiation dose, the threshold voltage of the device after being irradiated decreases by 3.28 and 2.36 V for gate voltages of +5 and –5 V bias, respectively, whereas the threshold voltage of the device after being irradiated decreases by only 1.36 V for a gate voltage of 0 V bias. The threshold voltage of the device after irradiation drifts in the negative direction, and the degradation of the electrical performance is especially obvious under the positive gate bias. This is attributed to the increase in the number of charges trapped in the oxide layer. At the same time, room temperature annealing experiments are performed on the irradiated devices for 24, 48 and 168 h. The shallow oxide trap charges generated by irradiation are annealed at room temperature, while the deep oxide trap charges and interface trap charges are difficult to recover at room temperature, resulting in an increase in the threshold voltage of the devices after being annealed, indicating that the electrical properties of the devices can be partially recovered after being annealed at room temperature. In order to characterize the effect of <sup>60</sup>Co-γ ray irradiation on the interfacial state defect density of the devices, low frequency noise (1/<i>f</i>) tests are performed at different doses and different gate bias voltages. The 1/<i>f</i> low frequency noise testing shows that under different bias voltages, the density of irradiation defects in the device increases due to the presence of induced oxide trap charges in the oxide layer of the device after being irradiated and the interfacial trap charges generated at the SiO<sub>2</sub>/SiC interface. This results in an increase of 4–9 orders of magnitude in the normalized power spectral density of the drain current noise of the irradiated device. To further ascertain the irradiation damage mechanism of the device, a numerical simulation is carried out using the TCAD simulation tool, and the results show that a large number of oxide trap charges induced by irradiation in the oxide layer cause an increase in the electric field strength in the gate oxide layer close to the trench side, which leads to a negative drift of the threshold voltage of the device and affects the performance of the device. The results of this work can provide important theoretical references for investigating the radiation effect mechanism and designing the anti radiation reinforcement of double trench SiC MOSFET devices.