Applications of graphene transistor optimized fabrication process in monolithic integrated driving gallium nitride micro-light-emitting diode
Authors: Yuan Ying-Kuo , Guo Wei-Ling , Du Zai-Fa , Qian Feng-Song , Liu Ming , Wang Le , Xu Chen , Yan Qun , Sun Jie ,   Key Laboratory of Optoelectronics Technology, Ministry of Education, College of Microelectronics, Beijing University of Technology, Beijing 100124, China,   National and Local United Engineering Laboratory of Flat Panel Display Technology, Fuzhou University, and Fujian Science and Technology Innovation Laboratory for Optoelectronic Information of China, Fuzhou 350100, China,   Quantum Device Physics Laboratory, Chalmers University of Technology, Göteborg 41296, Sweden
Published: September 2021

In the information display field, micro-light-emitting diodes (micro-LEDs) possess high potentials and they are expected to lead the direction of developing the next-generation new display technologies. Their display performances are superior to those produced by the currently prevailing liquid crystal and organic light-emitting diode based technologies. However, the micro-LED pixels and their driving circuits are often fabricated on different wafers, which implies that the so-called mass transfer seems to be inevitable, thus facing an obvious bottleneck. In this paper, the emerging graphene field effect transistors are used as the driving elements and integrated onto the GaN micro-LEDs, which is because the pixels and drivers are prepared directly on the same wafer, the technical problem of mass transfer is fundamentally bypassed. Furthermore, in traditional lithographic process, the ultraviolet photoresist directly contacts the graphene, which introduces severe carrier doping, thereby leading to deteriorated graphene transistor properties. This, not surprisingly, further translates into lower performances of the integrated devices. In the present work, proposed is a technique in which the polymethyl methacrylate (PMMA) thin films act as both the protection layers and the interlayers when optimizing the graphene field effect transistor processing. The PMMA layers are sandwiched between the graphene and the ultraviolet photoresist, which is a brand new device fabrication process. First, the new process is tested in discrete graphene field effect transistors. Compared with those devices that are processed without the PMMA protection thin films, the graphene devices fabricated with the new technology typically show their Dirac point at a gate voltage (<i>V</i><sub>g</sub>) deviation from <i>V</i><sub>g</sub> = 0, that is, 22 V lower than their counterparts. In addition, an increase in the carrier mobility of 32% is also observed. Finally, after applying the newly developed fabrication process to the pixel-and-driver integrated devices, it is found that their performances are improved significantly. With this new technique, the ultraviolet photoresist no longer directly contacts the sensitive graphene channel because of the PMMA protection. The doping effect and the performance dropping are dramatically reduced. The technique is facile and cheap, and it is also applicable to two-dimensional materials besides graphene, such as MoS<sub>2</sub> and h-BN. It is hoped that it is of some value for device engineers working in this field.