bluuebunny/crossref_metadata_2025 huggingface dataset:
Quality Control in Ultrasonic Wire Bonding
Authors: Rodwell R. , Worrall D.A.
Published: February 2008

This paper reviews methods of quality control for the ultrasonic wire bonding process. It also covers the basic principles of the process, a model for the bonding mechanism, and the criteria which determine bond quality. In practice, quality control in production is mainly by batch destructive testing and by ensuring consistent performance of the bonding machine by, for example, periodic calibration. A more desirable approach is that of in‐process monitoring and control of every joint made. Although in‐process techniques have been extensively studied, they are currently little used because of the lack of a universal system, doubts on reliability and access problems. The in‐process monitoring and control techniques which have been studied have concentrated on methods which involve the detection of variations in the mechanical impedance of the bond zone; these are reflected back into the excitation system of the equipment during bond formation. It is believed that further development of these techniques, coupled with simultaneous monitoring of associated parameters, e.g., bonding wire deformation, offers hope of improved process control.
The Plastic Composite Package Provides an Economic Alternative To LSI‐VLSI Packaging for High Density Microcircuits
Authors: Mallem O. , Lantaires J.
Published: February 2008

The increase in semiconductor integration level has led to complex Integrated Circuits (ICs) characterised by an increasing number of I/O, such that dies with 40 to 84 metallised pads are currently manufactured and frequently used in modern electronic systems. The advent from 1980 onwards of these LSI‐VLSI semiconductors requires new economical micropackages to be devised that can be adapted to surface mounting techniques on Hybrid Integrated Circuits (HICs) and Printed Circuits Boards (PCBs). Plastic encapsulation using a transfer moulded epoxy resin is a widely used method for packaging silicon devices because of the reduced manufacturing cost for large volumes. This economic criterion, which is considered with widespread interest in the electronics industry, has recently led the major semiconductor manufacturers to produce Plastic Leaded Chip Carriers (PLCCs) with up to 84 J bend connections on 1·27 mm pitch, and Mini Quad Packs with 40 to 84 Z bend pins on 0·75∼0·80mm centres. However, until now, a significant number of ICs, such as full custom circuits, are not yet available in any packaged form. Thus, in order to take advantage of the compactness offered by micropackages without being under component manufacturers' constraints for packaged LSI needs, it was decided at the Microelectronics Division of CIT‐Alcatel to develop a flexible semiconductor encapsulation technology which does not require any moulding equipment. The process involved has led to the development of a small economical package with 52 peripheral Z bend leads on 0·75 mm centres which has been evaluated. This original LSI carrier, named Plastic Composite Package (PCP) because of its special feature, is perfectly suited to the specific needs of multilayer HICs for all non‐military applications. In addition, another PCP format with 68 pins on 0·635 mm centres, designed for LSI Industrial applications, has been investigated. The purpose of this paper is to explain the specific needs in the hybrid industry and to give the authors' views on trends in LSI‐VLSI plastic encapsulation. Moreover, the PCP manufacturing process is described, the evaluation results being discussed as well as the economic aspect.
Influence of Trimming on the Electric Field Distribution in Thick Film Resistors
Authors: Casselman G. , De Mey G.
Published: February 2008

A finite difference method is presented to calculate the potential distribution in a trimmed resistor. The numerical results are used to study the influence of trimming on the power density distribution and the noise performance.
A Fluorochemical Coating Material for the Protection of Electronic Circuits
Authors: Wood R.
Published: February 2008

There are many different types of protective coating available to the circuit manufacturer. Most are covered by United States Military Specification MIL‐I‐46058 and by British Standard Specification 5917 under such headings as acrylic, urethane, epoxide, silicone and paraxylylene. Whilst each of these coatings is effective for certain applications, all have limitations. Acrylics are easily applied but may have low resistance to abrasion and certain organic solvents. Urethanes may be applied only to very clean surfaces and usually have long cure times. Epoxides are strong with good abrasion resistance but exhibit high shrinkage and are very difficult to remove. Silicones have good electrical properties and temperature resistance but generally have poor adhesion to unprimed surfaces. Paraxylylene coatings have excellent abrasion resistance but are almost impossible to remove and expensive to apply (needing special equipment and the payment of royalties). This paper describes a new type of coating based upon fluoroacrylic polymers, developed in response to a US Mantech programme generated by Wright‐Patterson Air Force Base, which meets all the requirements of US MIL‐I‐46058 and is the only fluorocarbon coating included in the Qualified Products List for this specification.
Use of Adhesives in Surface Mounting
Authors: Grant S. , Wigham J.
Published: February 2008

Increasing interest in surface mount technology has led to a growth in the use of adhesives for attachment of SMDs. This paper reviews the properties of an adhesive which make it suitable for use in attachment of SMDs. Visibility, rheology and cure speed are of primary importance but the need for one‐part stable materials is stressed. The existing adhesives offered are generally based on epoxy or acrylic technology. Though these products are effective in attachment they have many features which make them less than ideal, e.g., mixing of multi‐component systems, high cure temperature, etc. One‐part acrylic anaerobic adhesives offer the benefit of low cure temperatures with good strength and product stability. Curing data, adhesive properties and cured polymer properties are reported for a new acrylic anaerobic adhesive which has been specifically designed for attachment of SMDs to substrates.
Accuracy of Integrated Voltage Dividers in Plastic Packaged Linear ICs
Authors: Cognetti C. , Simonini F. , Villa F.F.
Published: February 2008

This study attempts to quantify the loss of accuracy that arises after packaging and during the life of the IC device. To identify a solution to the problem of mismatch in voltage dividers, the characterisation of the amount of stress associated with commercially available moulding compounds was performed by means of silicon integrated strain gauges. In addition, the influence of the voltage divider lay‐out was measured with a specifically designed test pattern. The possibility of producing circuits with an accuracy level better than 0·1% without trimming was demonstrated.
Thick Film Conductors and Resistors on Dielectrics for High Reliability Applications
Authors: Wheeler J.M.
Published: February 2008

Platinum gold conductors, used as solderable terminations, contain a glass frit which reacts with the minority constituents in debased alumina substrates forming an adhesive bond. Some conductor inks also contain copper and cadmium, in addition to the glass frit, which react directly with the alumina to form a chemical bond. Dielectric inks contain a crystalline filler, such as alumina or zirconia, in a glass matrix. The effect on the physical and electrical properties of platinum golds on various dielectrics was examined in comparison with the behaviour on alumina. Composition and surface structure of the dielectric affects the adhesion strength, solderability and solder leach resistance of the conductor inks. Interaction between the glasses in the dielectrics and conductors was determined by analysis in the SEM. Interdiffusion between the conductor and solder metals occurs and brittle intermetallic compounds are formed. The effects of the intermetallic formation on the adhesion strength and modes of failure, especially after thermal ageing at 150°C, have been examined. Thick film resistors printed and fired onto dielectrics rather than onto alumina substrates generally have different electrical properties. Chosen resistor systems, terminated with a gold conductor, were evaluated on different dielectrics. The values of electrical parameters such as resistance, TCR and noise index were compared with those on alumina. Interactions between the glasses in the resistors and dielectrics were examined as for the conductors. Thermal ageing on various resistor/dielectric combinations was carried out in order to determine the long‐term stability. The activation energies and time dependences of the ageing mechanisms for each combination were found. Corresponding ageing equations were calculated in order to predict the likely behaviour during life.
Polyimide Protection of Thin Film Chip Resistors
Authors: Diletti H. , Noser J.R. , Sele G.J.
Published: February 2008

In hybrid technology, components (e.g., ICs, capacitors, resistor chips) are mounted onto a thin or thick film circuit. Bare chip resistors are usually incorporated into hermetically sealed hybrid circuits (die and wire bonding). Encapsulated chip resistors or chip resistors with a protective layer are required in the case of non hermetic sealing (flip chip soldering, surface mounting). The electrical performance of resistor chips with and without polyimide protective coating was investigated and is compared. This investigation was performed on NiCr based and Ta2N thin resistive films.
Thermal Design of Hybrid Microelectronics for Everyone
Authors: Dean D.J.
Published: February 2008

This paper is an introduction to a personal approach to Electronic Thermal Design and Temperature Prediction. The approach described is essentially one of reducing the problems to manageable proportions. The designer should then probe around the boundaries of the problem and establish a temperature envelope. The envelope can then be trimmed until its extent is within the required accuracy. An additional point that comes from the paper is that perfection is the enemy of good and that sufficient is all that is required.
ISHM news
Authors: Monneraye Marc , Panizza  , Waterfield Brian , Knowles John , Bainbridge P.L.
Published: February 2008

A month or so after the Stresa meeting, the French ISHM chapter, organising a session on ‘Gallic inks’ (!), summoned me to deliver some comments on the 5th European Hybrid Microelectronics Conference. Although it was only a matter of interlude during this technical session, I felt the task quite a difficult one. It became a hazardous project when Brian C. Waterfield kindly asked me to let what is in fact a personal opinion—my personal opinion, standing back from my daily work—appear in Hybrid Circuits. I'll do my best.
Thin Film Technology for Prototypes and Small Scale Production—Equipment Needed, Experimental Results, Applications
Authors: Nørlyng S.
Published: February 2008

This paper gives a popular introduction to thin film and some reasons for using this technology. The miniaturisation techniques at Brel & Kjaer are described and the background for the work with thin film techniques is given. The company's method of realising thin film circuits is described by going through the resistor materials, resistor design and photolithography and etching steps. The kind of equipment needed and what B & K use to make prototypes and small scale production are shown. TCR‐values and the resistor stability after 10,000 hours at different environmental exposures are given. Examples of applications with single layer and double layer structures are shown. A thick film circuit is transformed to thin film, and the size reduction can be seen. Finally, for this circuit, the cost calculations are stated for both versions.
Infra‐red Reflow for the Solder Attachment of Surface Mounted Devices
Authors: Flattery D.K.
Published: February 2008

Infra‐red ovens and furnaces have been in use in the microelectronics industry for a long time, but recent design advancements and process developments have provided the precise furnace control dictated by surface mount technology. This paper addresses the process implemented by state‐of‐the‐art infra‐red equipment and the impact which that technology has on the surface mount industry. The temperature cycles that current infra‐red equipment utilises to reflow surface mount devices differ from the competing technologies in several distinct areas. Infra‐red equipment provides controlled preheat rates in the critical initial heating stages, followed by temperature equilibration and final reflow. The radiative and other processes involved in the preheat of product are discussed, with particular attention paid to the removal of volatile organics from the solder paste and the stress induced on all elements of the assembly. The control of temperature uniformity is discussed, and the effects of geometry, thermal complexity, and absorptivity are examined with reference to heat transfer theory. The ability of infra‐red equipment to provide close control of the ambient atmosphere during reflow cycles is outlined. Control of the atmosphere can benefit process control, reliability, and cosmetics. Inert atmospheres, such as pure nitrogen, can provide faster processing, more rapid and easier cleaning of fluxes, better solderability of secondary joints, and better cosmetics for the assembly. The inclusion of small amounts of hydrogen in the ambient can induce changes in the contact angle of the flux to polymers and ceramics, providing benefits for other process considerations, such as component shifting, solder balling and flux removal.
Thick Film Platinum Temperature Sensors
Authors: Reynolds Q.M. , Norton M.G.
Published: February 2008

This paper describes the fabrication of integral screen printed platinum resistance elements. A detailed description is given of the techniques of element manufacture and performance. The paper is finally illustrated by an example of sensor integration into a temperature critical subsystem. This example serves to demonstrate the potential manufacturing economies achieved by this approach.
Experience with Trimming of Chip Resistors and how to Improve Trimming Results with CAD Simulation and Thick Film Process Control
Authors: Ronniger R.
Published: February 2008

High speed chip resistor trimming requires a more advanced technology than just passive network‐trimming. Some guidelines have to be observed to obtain a good approach to the desired goal. One fast and inexpensive way of finding the best parameters for a trim cut, i.e., maximum speed and best accuracy, is CAD‐network simulation. Last but not least several parameters should be checked and controlled continuously to optimise yield.
Power Transistor Chips on Heat Sink: Evaluation of Different Mounting Techniques
Authors: Rocchelli R. , Simonetta A.
Published: February 2008

Assembly techniques for power semiconductor devices destined for automotive applications are examined. Attention has been paid to materials or their combinations showing an acceptable compromise between good thermal conductivity and low cost. Extensive work has been carried out on type and/or thickness of same to minimise the strains dependent on different TCEs. Measurements and tests on thermal resistance have been performed. Rth measurements, together with thermal fatigue cycle and cycled life test, have confirmed themselves as a very suitable way to study and optimise the assembly technique for power devices.
A Thermal Model for Hybrid Circuits
Authors: Casselman G. , De Mey G.
Published: February 2008

The present paper describes a relaxation technique to calculate the two dimensional temperature distribution of a hybrid circuit made on a ceramic substrate. The method calculates the potential and power density distribution in the resistors before the temperature is evaluated so that special effects due to trimming cuts can be analysed.
The Measurement of the Solderability of Metallic Pads on Thick‐film Substrates
Authors: Verguld M.M.F.
Published: February 2008

A method for assessing the solderability of thick‐film substrates is described. An appropriate quantity of solder, with a soldering flux, is applied to the land to be tested and is melted under precisely defined conditions. After solidification of the solder, the diameter of the base of the droplet is measured. The value of the wetting angle, which is a measure of the solderability, can be read from a calibration graph. An analysis of variance has been performed to evaluate the reproducibility of the test method used.
Evaluation of Polyimide Thick Film High Temperature Polymeric Materials
Authors: Hanassab S.
Published: February 2008

This report discusses the physical, electrical, mechanical and thermal characteristics of polyimide conductive, resistive, and dielectric thick film compositions made for high‐temperature curing and coating on non‐flexible substrates (alumina). The effects of curing times and print direction on sheet resistivity are presented for conductive patterns. The rates of silver migration of silver loaded resins are examined under 100% relative humidity at 25°C and various gap distances. The effect of current limiting resistors on silver migration is also examined. The electrical characteristics of polyimide thick film (PTF) resistors such as temperature coefficient of resistance and drifts are examined. The relationship of aspect ratio versus mean resistance and sheet resistance, as well as distribution diagrams are presented. The printability and definition of conductor patterns relative to their thickness, separation and the direction of the prints are examined, while the electrical characteristics of crossovers such as voltage breakdown are also investigated.
Silicon Substrates for Chip Interconnection
Authors: Reichl H.
Published: February 2008

Through the use of silicon‐on‐silicon packaging, VLSI chips can be interconnected by dense contacts and very fine conductor lines. Electrical and thermal properties obtained by means of this technique are discussed. The fabrication of small cooling channels in the silicon substrate and the application of the anodic bonding technique for chip mounting are demonstrated.
Die Attach of Large Dice with Ag/Glass in Multilayer Packages
Authors: Loo M.C. , Su K.
Published: February 2008

Due to oxide formation at the die backside, excessive non‐wetting and voiding can occur especially for the larger die (100K sq. mil) by gold eutectic die attach. Such voiding can cause die lift‐off and cracking. Ag/glass seems to be a promising candidate. However, it has some shortcomings. First, solder seal hermeticity reject may occur due to nickel diffusing through gold metallisation and being oxidised on the surface of the multilayer package. Secondly, for those devices requiring backside contact, gold metallisation on the die backside becomes the barrier for the reaction between the silicon and the glass. The adhesion may be degraded. The factors which may overcome these shortcomings will be discussed.
ISHM's Education Program
Authors: Cadenhead R.L. , Prokop J.S.
Published: February 2008

An outline is given of the purpose and activities of the ISHM‐US Education Program. Guidelines for establishing and operating Student Chapters are provided, together with the benefits of membership, and several of the facilities made available to student members are described.
Substrate Bowing of Multilayer Thick Film Circuits
Authors: Storbeck I. , Balke H. , Wolf M.
Published: February 2008

The production of interconnection modules with an increasing number of layers leads to problems in the planarity of modules and therefore in the chip mounting process. The present paper discusses a model based on the theory of plates which allows the calculation of bowing degree in relation to the coefficients of thermal expansion αi, Young's moduli Ei, the thicknesses hi, and the softening point of the glassy components in the thick film pastes. The calculated values are compared with experimental data for substrates built up as entirely covered model substrates of up to 7 layers of one type of paste (conductor and dielectric, respectively) and of alternately printed layers.
The Justification of 100% Conductor Testing for Improved Yields
Authors: Hammershøj R.
Published: February 2008

Automatic thickfilm conductor testing performed as a 100% test gives a number of advantages if used correctly and well adjusted to the real needs. Though improved yield in production is the essential benefit of automatic test, a number of advantages and perspectives reach other company divisions outside the thickfilm production area. A number of general guidelines help to define the need and calculate the justification figures for a given production. The quality of the test process itself, however, can be an important part of the calculations.
Measurement of the Tackiness of Solder Pastes
Authors: Ainsworth P.A.
Published: February 2008

Arising from discussions at the International Institute of Welding Solder Paste Committee, the influences of a number of testing variables on the tack strength of solder pastes have been examined using the load cell system on a Meniscograph Solderability Tester. As a result, a standard method of testing has been proposed.
Advanced PWB Materials for Surface Mounted Devices in Aerospace Applications
Authors: Menozzi G.
Published: February 2008

Faced with LCCC growth and their widespread acceptance for military applications, Crouzet has planned a two‐way approach for SMDs with MLTF (multilayer thick film) hybrids and advanced PWBs. This paper deals with the R&D programme carried out on both technologies. It briefly addresses MLTF interconnects under a CNES qualification programme and now being used and describes PWB R&D: first investigation and screening, optimisation programme and improvement of large advanced PWB processing. Data are given on the material analysis, TCE measurements, MLB assembly, PTH (plated‐through‐holes), solder joints and thermal analysis.
ISHM news
Authors: Waterfield Brian , Kersuzan G. , Herod Boguslaw
Published: February 2008

The Benelux chapter has made a habit of organising meetings with a scientific and commercial accent more or less alternately. This approach has proven to be successful in the past three years. The 1986 Autumn meeting will be another display meeting. A number of papers will be presented by suppliers of materials and equipment for the hybrid and surface mounting industry. In a 300 m2 exhibition room about 25 companies will display their products. The programme of the day leaves ample opportunity for meeting colleagues and suppliers. The meeting will be held in the ‘Jaarbeurs Vergadercentrum’ in Utrecht on 16 October from 9.30–17.00. The annual ISHM‐Benelux general membership meeting will precede the lectures.
A Study of Various Nitrogen‐based Furnace Atmospheres and Their Effects on Copper Thick‐film Conductors and Dielectrics
Authors: Yext W. , Hayduk E.A. , Fisher C.K.
Published: February 2008

Manufacturers of multilayer copper thick‐film circuitry face the challenge of firing parts in an inert nitrogen atmosphere to prevent the copper from oxidising. Nitrogen, while protecting the copper from oxidation, offers no efficient mechanism for removing the carbon‐based vehicles used in the copper thick‐film paste. Because of this, carbon residues or soot often deposit on the parts during the firing process. In an attempt to improve the nitrogen furnace atmosphere's ability to remove the vehicles, several gases or gas blends were added to a nitrogen‐based furnace atmosphere. Thick‐film copper conductors and dielectric test pieces were then processed using the various gas blends. The physical properties of adhesion, aged adhesion, solderability, and conductivity of the copper conductor test pieces were studied along with the dielectric properties of dissipation factor, insulation resistance, and dielectric constant. Some of the gases tested included H2, H2O, CO, CO2, and a variety of other gas combinations. Test results demonstrated the atmosphere's ability to effect changes in the physical properties of the parts being processed. A proprietary gas blend was developed which proved effective in removing carbon residues while maintaining the desirable physical properties of the thick films. This work demonstrates the ability of certain gas additives to improve the performance of conventional nitrogen atmospheres when firing copper thick‐film circuitry. With the proper selection of the gas additive, atmosphere flows can be reduced, carbon residues eliminated, and the physical properties of the copper conductors and dielectrics maintained or improved.
Thick Film Resistors with High TCR
Authors: Kuž R. , Kopřivová E. , Broukal J.
Published: February 2008

New resistor compositions prepared by using special kinds of glass, CdO and ruthenium compound have been developed. The properties of resistors prepared from various compositions were tested in relation to peak firing temperature varying in the range from 760°C up to 850°C. In this way conditions were found for resistor preparation with constant, positive and relatively high TCR (2,500 ppm/°C) and high long‐term stability at 95% relative humidity at 40°C, and with various sheet resistivity (500 ohms/sq.?3,000 ohms/sq.). This system is typical in containing only small amounts of ruthenium compound ranging from 6 wt % to 12 wt %. The resistors can be used for temperature measurement as temperature sensors.
Design and Fabrication of Thick Film Sensors
Authors: White N. , Cranny A.
Published: February 2008

This paper describes the stages in the construction of sensors implemented in thick film technology. The use of CAD facilities greatly reduces the time required for development, and automatic design rule checking minimises errors. Steps in the fabrication from layout to finished mask(s) are detailed and specific examples given. Strain gauges using piezoresistive properties of thick film resistor inks with various sheet resistivities (Du Pont HS80 series) printed on insulated stainless steel substrates were examined under strains ranging from 0 to ±1000 microstrain. Results show gauge factors to be dependent on the ink's sheet resistivity and range from 2 to 12. The temperature coefficients of resistance were determined over temperatures of +20°C to +140°C, revealing good tracking and reproducibility.
Laser Soldering of Surface Mounted Assemblies
Authors: Lea C.
Published: February 2008

Laser soldering has become a viable method for the assembly of surface mounting components on printed circuit boards. This paper discusses the techniques both in terms of the physics involved and the practicalities of a production facility.
Thick‐film Resistor as a Heater
Authors: Kozłowski J. , Dziedzic A. , Nitsch K. , Szeloch R.F.
Published: February 2008

This paper presents the thermal behaviour of the thick‐film resistor. Continuous and pulse power heating were supplied. The maximum non‐destroyed power was established and the maximum temperatures reached by the resistive layer were estimated for each method of heating.
Industrial Aspects of Hybrid Production
Authors: Möller A.
Published: February 2008

With high growth rates, hybrid technology has attained a strong position in microelectronics. Consequently, industrial aspects are coming to the fore. The target is ‘Just in Time’ production, which is strongly linked with concepts such as flexible automation, zero defects and zero inventory.
Hybrid Microelectronics Design The Intergraph Solution
Authors: Möllerström L.
Published: February 2008

This paper describes a fully integrated system for automated design and manufacture of hybrid microcircuits, enabling all engineering and manufacturing disciplines to be integrated. Areas covered include resistor design, part definition, and placement and routing alternatives. The system's Design Rule Checking process is outlined.
Automatic Inspection of Component Boards Using 3‐D and Greyscale Vision
Authors: Svetkoff D.J. , Smith D.N. , Doss B.L.
Published: February 2008

Recently great interest has developed for a high speed, flexible machine vision system which can accurately determine solder paste and component placement for both process verification and quality control inspection. Present SMT inspection systems must cope with the unpredictable appearance of components and backgrounds and are often used only to determine presence and absence. This paper describes a new approach which combines greyscale data with a three‐dimensional map of the board under test. Originally this method was proposed as a robust technique for locating components in low contrast greyscale images. However, experience working with manufacturers and developers of placement equipment has shown that emerging SMT inspection requirements indicate the importance of three‐dimensional information. In addition to the detection of components and measurement of orientation, examples are shown of solder paste volume measurements, lead co‐planarity, and tombstone effect detection.
Notes on the Effects of Metallisation of Surface Mounted Components on Soldering
Authors: Klein Wassink R.J.
Published: February 2008

Some characteristics of the metallisation of leadless ceramic components are discussed, such as dissolution, reliability of joints, intermetallic compound formations and the migration of silver. It is concluded that it is not the type of the metallisation that is important, but the quality of the make.
Thermodynamics of Processing Copper Thick Film Systems in a Reactive Atmosphere
Authors: Palanisamy P. , Sarma D.H.R.
Published: February 2008

A major drawback of current copper thick‐film technology is the inefficient removal of the organic binder associated with the dielectric material in the low‐oxygen inert gas (N2) atmosphere of the furnace. In processing large area and/or multilayer substrates, the incomplete binder removal causes deleterious effects which have been well documented. Therefore, it is necessary to remove hydrocarbons and residual carbon from the films in the burn‐out section of the furnace before the films begin developing their characteristic microstructures. However, the atmosphere currently employed is not capable of removing all the carbon and hydrogen in the form of gaseous oxides. In literature, in addition to furnace modifications, several atmosphere modifications and manipulations have been proposed to achieve optimum properties for the fired films. With few exceptions, the scientific basis for such atmosphere modifications and manipulations has been left either unaddressed or obscure. With this background, this paper examines the feasibility of using a reactive gas mixture in the furnace to achieve efficient organic binder removal. Phase stability diagrams are presented to illustrate the stability of (i) carbon, (ii) thick film copper ingredients, (iii) active phases of resistors, and (iv) components of glassy and crystalline phases of dielectrics in selected reactive atmospheres. The stability of certain furnace belt constituents is also addressed. Mass balance calculations are shown to demonstrate the extent of carbon removal and copper oxidation in typical nitrogen atmospheres. Based on the interpretation of thermodynamic data and reaction mechanisms involved, a specific H2‐H2O mixture with nitrogen as the carrier gas is recommended. The approach presented here constitutes a general analytical scheme to understand materials‐atmosphere interactions occurring across a temperature range. Several issues in furnace design are also discussed from the standpoint of gas‐solid reaction kinetics. These deal with the design of gas‐flow systems that facilitate removal of organic binders.
Inexpensive Substrates from Moulded Glass Powder for Thin Film Potentiometers
Authors: Herod B. , Lusniak‐Wojcicka D.
Published: February 2008

Manufacturing of thin film potentiometers involves using very special substrates, usually with complicated shapes and explicit dimensional tolerance. Commonly, such substrates should possess holes and recesses for assembling of the terminals as well as for mounting into housing. Particular difficulties are connected with the labour and time consumption necessary for forming of the molten glass, and limited utilisation of the glass substrates for potentiometer bodies. On the other hand, this material is the best one for the thin film elements. To solve these problems with the objective of producing inexpensive glass substrates for potentiometers, different tests were carried out with moulded elements made from glass powder. The aim of this research was the optimisation of a glass frit granulation and composition of the softening agent (plasticiser) as well as a choice of the temperature profile of firing of the moulded pieces to guarantee the precise structure of the substrate, essential for its application in thin film technology.
Silver‐glass Die Attachment—Adhesion Mechanisms with Gold and Chromium/Gold Backed Die
Authors: Davey N.M. , Wiese F.W.
Published: February 2008

Silver‐glass die attach materials represent a significant advance in silicon packaging technology and are expected to displace gold‐silicon eutectic bonding as the preferred method of die attachment for high reliability applications. In this paper the rle of the glass in the adhesion mechanism of silver‐glass to gold and chromium/gold backed die has been determined using thermal analysis and X‐ray diffraction in addition to scanning electron microscopy and electron probe microanalysis of the sintered film. An adhesion mechanism is proposed in which the glass of the silver‐glass system migrates to the die interface during the firing cycle and chemically bonds to the silicon which is present at the surface of the gold‐silicon eutectic. Adhesion between the die back and the silver of the die attach material is by means of a simple mechanical bond between ‘fingers’ of glass and the sintered silver matrix. Thermodynamic and kinetic considerations suggest that insufficient silicon dioxide may be formed using chromium/gold backed die for acceptable adhesion. Processing changes are proposed which resolve this adhesion problem.
Thermosonic Wire Bonding on Single‐layer Polymer Hybrid Integrated Circuits (POLYHICs)
Authors: Shook R.L.
Published: February 2008

A study was undertaken to evaluate the thermosonic gold‐wire bonding capability to Ti‐Pd‐Cu‐Ni‐Au thin film metallisation on newly developed polymer hybrid integrated circuits (POLYHICs). (The POLYHIC technology incorporates alternating layers of polymer and metal added to conventional Hybrid Integrated Circuits which provide for increased interconnection density.) Destructive wire‐pull strengths were measured as a function of varying wire‐bonding machine operating parameters of wedge bond force, wedge bond time, temperature, and ultrasonic energy. All data were evaluated and compared with wire bonding under similar conditions to thin film circuits on Al2O3 ceramic. The results for wedge‐bond associated failures indicated that machine operating parameters of wedge bond force, time and ultrasonic energy similarly affected the average wire‐pull strength for both the ceramic and POLYHIC circuits. Pull strengths for equivalent metallisation schemes and bonding parameters were generally slightly higher and more tightly distributed for bonds made to metal films on ceramic. A strong correlation was found to exist between wire‐pull strengths and surface topography (as measured by a profilometer technique) of the thin film metallisation for the POLYHICs which had both smooth and rough metallisation surfaces for metal films on top of the polymer. The results indicated that rough metallisation bonded more easily and yielded much higher wire‐pull strengths. Also, rougher films were shown to effectively increase the parameter‐operating windows for producing reliable wire bonds. A semi‐quantitative analysis was developed to help explain this correlation. Surface topography effects were also found to be a key factor when evaluating wire bondability as a function of substrate bonding temperature. Wedge‐bond strength was essentially independent of temperature for bonds made to rougher metallisation while a strong temperature dependency was found when wire bonds were made to smoother films.
Men, Methods and Machines in Microelectronics Packaging and Interconnection
Authors: Sinnadurai Nihal
Published: February 2008

The once highly publicised Porcelain Enamelled Steel (PES) substrates seem to have disappeared from the public gaze, or have they? They certainly have not. If anything, they have consolidated their place in electronics applications and are growing in use at a remarkable pace in particular applications supplied by the major USA source, namely Ferro‐ECA.
An Investigation of Thick Film Resistor Materials' Properties During the Firing Process
Authors: Hrovat M. , Jan F.
Published: February 2008

Thick film resistor materials' microstructure, sheet resistivity and temperature coefficient of resistivity during the firing process in the temperature range between 350°C and 950°C were investigated. During firing the sheet resistivities at first decrease because of evaporation and/or oxidation of the organic phase and later, at higher firing temperatures, increase due to sintering of the glass phase and the rearrangement of conductive particles. The TCR is negative for firing temperatures below 450°C, due to the presence of partly pyrolysed organic vehicle, and positive for higher firing temperatures.
The Influence of Termination Effects with respect to the Behaviour of Thin‐film Resistors
Authors: de Groot P.
Published: February 2008

Termination resistances can affect the behaviour of thin‐film resistors. Depending on the dimensions of a resistor both the TCR and the long‐term stability will be affected, while the termination resistance forms part of the practical resistance value. This paper deals with the results of an investigation concerning the influence of termination resistances with respect to the behaviour of thin‐film resistors. Three thin‐fiim technologies were investigated. Values for the resistance, TCR and ageing drifts of both the bulk material and the terminations will be discussed. Some remarks on the structure of a termination will be mentioned.
Electrical CAD Analysis for Multilayer Package Design
Authors: Belcourt F.J. , Lane T.A.
Published: February 2008

One of the most challenging problems facing the package designer today is how to predict electrical performance before committing a design to fabrication. One means of accomplishing this task is to employ computer‐aided design (CAD) tools that analyse performance from simulations done on models derived from the physical package structures. These models, when combined with the chip models, allow interactive simulation and timing analysis of an entire multilayer package. This paper describes a CAD approach for evaluating interconnect performance within multilayer package structures and presents several examples to show how the approach is applied.
Integration of Polymer Thick Films with PCB Technology in the Telecommunication Field
Authors: Castelli G. , Lovati G.
Published: February 2008

The paper describes the results obtained by the integration of Polymer Thick Film and Printed Circuit Technologies. Polymer Thick Film (PTF) Technology, applied to PCB manufacturing, helps the designer's task considerably and offers an interesting way to achieve time and cost reduction. The use of conductive and dielectric materials to generate cross‐overs and low interconnection density multilayers on epoxy‐glass substrates is shown and basic design rules are discussed. The performances of PTF conductive materials from two different suppliers are investigated in terms of conductivity, current carrying capacity and contact resistance with the copper‐clad layer. Surface and bulk insulation resistance, capacitance, loss factor and breakdown voltage are studied for dielectric materials from two different suppliers. The effects of environmental tests, i.e., thermal shocks, high temperature storage and temperature‐humidity‐bias test, on the performances of dielectric and conductive PTF are investigated by means of suitable test patterns. Application examples of Transmission System boards are discussed in terms of design and manufacturing times and costs.
Temperature Cycling of Surface Mounted Thick Film ‘Zero‐ohm’ Jumpers
Authors: Whalley D.C. , Campbell D.S.
Published: February 2008

Thermal cycling tests for surface mounted components are usually taken around a mean temperature of approximately 35°C (e.g., −55°C to +125°C; −40°C to +110°C). To test the effect of different maximum temperatures thermal cycling tests using a lower temperature of −55°C have been conducted with alumina/thick film ‘zero‐ohm’ jumper chips with nickel barriers. These are connected in series chains and wave soldered on to FR‐4 test coupons (128 chips/coupon). The test regimes used were −55°C to +5°C; +65°C; +95°C, +110°C and +125°C. Resistance changes before and after cycling were observed at room temperature. After 100 cycles changes of approximately +200 mΩ were observed against a total resistance of 5·5 Ω. However, more detailed examination showed that a top temperature of +95°C gives optimum results with a total change over 100 cycles of +4·9%.
Wire Bonding to GaAs Electronic Devices
Authors: Riches S.T. , White G.L.
Published: February 2008

GaAs electronic devices are becoming increasingly used in the microelectronics industry especially in solid state microwave, ultra high speed digital processing and optoelectronic applications. However, in the manufacture of the GaAs devices, problems due to the inherent brittleness of the GaAs and batch to batch variability of the bond pad metallisation have commonly been experienced. This has resulted in some difficulties in wire bonding to GaAs devices with ultrasonic and thermocompression wire bonding techniques. This paper describes a programme undertaken to investigate Au wire bonding techniques to GaAs devices. Specifically, bonding trials have been performed on a range of GaAs substrates using pulse tip and continuously heated thermocompression bonding and ultrasonic bonding. The results of this work have shown that thermocompression and ultrasonic wire bonding techniques are cabable of producing acceptable bonds to GaAs devices, although some of the advantages and limitations of each technique have been demonstrated. Thermocompression bonding with a continuously heated capillary gave the most tolerant envelope of bonding conditions and highest bond strengths. Pulse tip thermocompression bonding gave a less tolerant envelope of acceptable bonding conditions, required a longer bonding time and the wire was weakened above the ball bond. Ultrasonic bonding did not require any substrate heating to give acceptable bonds. However, the choice of equipment can be critical if damage to the device is to be avoided.
European Microelectronics Conference '87
Authors: Turnbull Bob , Barnwell Peter , Yates Paul , Fairbairn Alan , Waterfield Brian , Waterfield Mary
Published: February 2008

The conference and exhibition got off to a good start with an official reception by the Mayor of Bournemouth on Tuesday evening where attendees could relax and chat—a pleasant way to meet old friends and to make new acquaintances.
Aspo—The Northernmost Microelectronics Factory in the World
Authors: Turnbull Bob
Published: February 2008

It was Monday, June 8th, and immediately after the Bournemouth Conference. The weather was unchanged, dull and with rain not far away and I was pleased to board the plane for Finland; hopefully the long days at this time of year would give better weather. My hopes were soon realised and Helsinki looked bright and clear under the afternoon sun, the white Cathedral dominating the harbour skyline. The market by the South Harbour was crowded with shoppers and others just enjoying a stroll by the sea.
ISHM news
Authors: Setty M.S.
Published: February 2008

As announced in the May issue of Hybrid Circuits, ISHM‐Benelux is organising a one‐day conference on applications of hybrid circuit technology.
Flip Chip Solder Bonding for Microelectronic Applications
Authors: Pedder D.J.
Published: February 2008

The relentless drive towards greater complexity and interconnection density on silicon integrated circuit (SIC) devices is leading to a reappraisal of techniques for making electrical connections from the SIC to the next level of packaging. The techniques being examined include fine pitch Wire Bonding, Tape Automated Bonding (TAB) and Flip‐chip Solder Bonding. This latter technique forms the subject of this paper. The history of flip‐chip solder bonding technology is briefly reviewed and metallurgical, physical and mechanical aspects of the bonding process and of the resulting joints are discussed. The merits of the flip‐chip bonding process are indicated and applications examples presented. Particular attention is given to the fabrication of a novel pyroelectric‐SIC thermal imaging sensor using flip‐chip solder bonding.
Large Scale Interconnects for Aerospace Applications
Authors: Menozzi G.
Published: February 2008

This paper addresses three main technologies of large scale interconnects that have been evaluated at the Microelectronics Department of Crouzet Aerospace for chip and wire or LCCCs (Leadless Ceramic Chip Carriers). The P/I (Packaging and Interconnect) structures that will be discussed are either ceramic multilayer with MLTF multilayer thick film, and CMC (Cofired Multilayer Ceramic) or advanced PWBs. The paper will present the R&D that has been carried out on MLTF and advanced PWBs and the evaluation programme now in progress for CMC. Test results are given, technology status and next generation interconnects are described and some aerospace applications are presented.
Advances in Flux Technology for the Soldering of Surface Mounted Devices
Authors: Rubin W.
Published: February 2008

Recent developments in synthetic resin based non‐corrosive fluxes for soft soldering have coincided with completion of the work of the international flux standard committee. With the increasing usage of surface mounted components these special synthetic resin‐based, zero‐halide, low solids fluxes can be used to leave minimal residues after soldering, which without removal do not affect long‐term reliability of soldered assemblies. Similar chemistry has been applied to devise flux cored solders and solder pastes which also leave minimal, safe residues, thereby avoiding cleaning processes.
Resistance to Soldering Heat and Thermal Characteristics of Plastic SMDs
Authors: Cognetti C. , Stroppolo E. , Tiziani R.
Published: February 2008

This paper addresses the themes of resistance to soldering heat and heat dissipation as aspects of reliability in relation to surface mounted devices soldered on a plastic substrate by the most common industrial processes. Reliability data are presented for devices soldered by double wave, multiple wave, vapour phase and infra‐red processes and comments given on the reliability results. In terms of heat dissipation, using an internally developed test pattern and suitable test boards, a study was made of the influence of the substrate on thermal dissipation, thermal impedance, and new medium power SO and PLCC packages offering the possibility of cost‐effective power dissipation in the range of 1.5–2 W while still maintaining a standard outline.
Semiconductor Seal Testing
Authors: Gillespie T.
Published: February 2008

Increasing awareness of the consequences of device failures has resulted in increased reliance on Environmental Testing as an additional means of enhancing the integrity and reliability of a device. The key consideration is not the cost of the device itself, but the cost of subsequent failure, which can be as much as a hundred times greater. Seal tests are undertaken to ensure that moisture cannot get into the internal cavities of sealed ceramic, metal or glass packages. Seal security is vital to the long‐term reliability of all hermetically sealed devices. This paper outlines the techniques involved and the requirements of the MIL, BS and IEC specifications.