Impact of Oxide Charges on The Minority Carrier Response in MOS(p) Devices With Al2O3/SiO2 Gate Stacks under Strong Inversion Condition
Authors: Kao Chi-Yi , Kung Tai-Ming , Hwu Jenn-Gwo 
Published: August 2024

Admittance measurement, including capacitance and conductance, is very useful to analyze the electrical characteristics of metal-oxide-semiconductor (MOS) systems. These techniques offer insights into various device properties, including interface trap density and minority carrier lifetime in the substrate. It is essential to note that, apart from the gate area, the oxide region beyond the device could significantly influence measurement results [1]-[2]. In this work, a compact model proposed in [3] was used to clarify an unusual minority carrier response time observed in experimental data. The results proved the heightened sensitivity of device alternating current (AC) characteristics to oxide charges in the outer region. Additionally, the dependencies of oxide thickness and quality on the transition frequency (ωm) of devices were explored.

The MOS (Al/AlOx/SiO2/p-Si) structure illustrated in Fig. 1 was employed in this study. Aluminum oxide region is under the gate electrode, while silicon oxide (SiO2) covers the entire wafer. Table 1 summarizes samples (S1 to S5) with consistent aluminum oxide thickness but diverse SiO2 thickness. Fig 2. shows the process flow and the anodic oxidation (ANO) system. By tilting the wafer at a specific angle during ANO, a high-quality SiO2 layer with different thicknesses on a single wafer could be obtained. Fig 3(a) to (d) illustrate the capacitance-voltage (C-V) and conductance-voltage (G-V) characteristics of devices with varying SiO2 thicknesses. All devices exhibit low-frequency capacitance characteristics in strong inversion regions with thickness-dependent minority carrier response, particularly at 10kHz. Additionally, devices show different thicknesses depending on G-V characteristics at 1MHz and 10kHz. Fig 4(a) and (b) illustrate the Cinv/Cox ratio for varied oxide thicknesses and Gm/ω characteristics under strong inversion bias (VG = +3V). Gm means the measurement conductance. Following established research [3], peak Gm/ω magnitudes would occur at ωm. Table 2 reveals microsecond-range response times (τR) at ωm, considerably faster than conventional silicon minority carrier lifetimes (usually 1 ms to 100 ms). Moreover, decreasing oxide thickness shifts the ωm toward lower values.

To explain this observed phenomenon, the environment outside the devices should be taken into consideration. Fig 5(a) and (b) show the schematic diagram and AC signal model proposed in [1] and [2]. Oxide charges in the outer region would deplete majority carriers and invert the p-type silicon surface to an n-type inversion layer. As a result, the lateral depletion region (Cd, out) and conductive channel (Rs) are formed outside the device, which are functions of substrate doping concentration and the effective oxide charges. The detailed model derivation is discussed in [2]. For this reason, an AC signal applied on the gate would extend outside the device for about a millimeter to a micrometer, affecting measuring results. Based on the model, the effective charges in the SiO2 could be extracted by measuring results. The thicker oxide has more oxide charges, as shown in Fig 6(a). Fig 6(b) and (c) show the modeling results of the Cinv/Cox ratio versus different oxide thicknesses and the Gm/ω-ω plot, which are very close to the experimental results. By simplifying the conductance formula (Gm), Gm reveals an inverse proportional to lateral effective conductance (GLeff) at low frequency (e.g., 10 kHz) and a direct proportional at high frequency (e.g., 1 MHz). Thicker SiO2 devices possess more oxide charges, leading to a greater lateral coupling effect, resulting in a greater GLeff compared to thinner devices. This elucidates the observed variations in Gm-V characteristics at 1 MHz and 10 kHz. Figures 7(a) and (b) display TCAD-simulated C-V and ωm for devices with varying oxide charge densities, confirming that minor changes in oxide charges result in noticeable differences in minority carrier responses in the strong inversion region. Fig 8(a) and (b) show the TCAD simulated results for devices with low doping substrate. For low doping substrates, oxide charges play a much more important role under AC operation.

In summary, the study established a correlation between oxide charge densities and thicknesses. The origin of the faster minority carrier response and the peak shift in Gm/ω- ω plot were thoroughly explained and validated by TCAD simulation. Oxide charges were found to play a crucial role, especially in low-doping substrates, offering insights for advanced IC fabrication.

[1] E. H. Nicollian and A. Goetzberger, IEEE Transactions on Electron Devices, vol. 12, no. 3, pp. 108-117, 1965.

[2] K. C. Chen, K. W. Lin, S. W. Huang, J. Y. Lin, and J. G. Hwu, IEEE Journal of the Electron Devices Society, vol. 10, pp. 960-969, 2022.

[3] S. Monaghan et al., IEEE Transactions on Electron Devices, vol. 61, no. 12, pp. 4176-4185, 2014.

Figure 1