High Cleanliness and High Hydrophobic/Hydrophilic Contrast Done by Direct Wafer Bonding for Die-to-Wafer Self-Assembly
Authors: Montméat Pierre , Enot Thierry , Bond Alice , Thiolon Adele , Bourjot Emilie , Fournel Frank 
Published: February 2024

Die-to-wafer assembly is a promising technology for 3D-integration in terms of yield. However, it is difficult to combine high placement accuracy and high throughput with a pick and place process. To overcome these issues, self-assembly and collective transfer for die-to-wafer were proposed [1].

With the self-assembly technology, direct bonding is used for the assembly and the surface tension of liquid droplets drives the chips and precisely aligns them to predetermined assembly areas on carrier wafers. A good water containment on the bonding site is needed to ensure a precise alignment. It is controlled by two parameters: topographical and hydrophilic/hydrophobic contrast. A step of around 15 µm surrounding the bonding area plays the role of the topographical contrast. The hydrophilic/hydrophobic contrast is obtained by coating an hydrophobic organic compound around the hydrophilic bonding site. Collective transfer can be achieved when dies are simultaneously bonded onto a target wafer covered with bonding sites (see figure 1).

The preparation of the target wafer as well as dies is a major topic of interest. As shown in figure 2 the direct bonding site is often defined by lithographic means: step and hydrophobic coating [2]. Extremely cleaned surfaces are required to ensure a good bonding quality. As a consequence, all particles and organic traces must be perfectly removed during the resist stripping step. It is here challenging as the organic resist must be removed while preserving the organic hydrophobic material. Highly aggressive and efficient stripping solutions cannot be used to obtain very clean bonding surfaces and an alternative process had to be developed.

We propose an innovative process based on a temporary bonding protection of the bonding site for the hydrophobic coating. A typical flow is presented in figure 2. A standard photolithography and etching process is used to obtain steps at the edges of the bonding site. An efficient stripping based on plasma and wet cleaning yields a surface that is ready for bonding. This surface is bonded with another temporary wafer. The resulting stack is dipped in a solution of hydrophobic material and then dismounted.

As a demonstration, 40 target bonding sites were defined onto a 200 mm diameter silicon wafer. First, a 2µm thick oxide layer was deposited. Then, bonding sites were defined by photolithography and etching. The step height was 15 µm and bonding areas 8x8 mm². This wafer was bonded to a temporary carrier. The acoustic picture of the resulting stack is provided in figure 3a): all bonding sites were correctly bonded on the carrier. The stack was then dipped in a fluorinated polymer solution. After dismounting the temporary carrier, the water contact angle of the surface was measured: it was around 10° on the bonding site and 90° on the surrounding area. A SEM image confirmed the presence of the hydrophobic polymer on the surrounding area but also on the sidewalls of steps (figure 3b).

In the same way, 10x10 mm² dies with 8x8 mm² bonding sites were fabricated. A collective bonding between the target wafer and the 40 dies was performed: 10 µL droplets were deposited onto each bonding site. 70 % of dies were transferred onto the target wafer. The alignment performance was evaluated with dedicated marks on target and dies: 50 % of die were aligned with a precision below 1 µm. The stack withstood a 2h annealing at 400°C without any defect appearance. These results demonstrate the interest of the new process for the fabrication of high contrasted surfaces for self-assembly bonding while keeping a very high cleanliness of the hydrophilic bonding area.

The authors acknowledge financial support from INTEL Corporation, United States

[1] T. Fukushima, Proc. Int. Electron Dev. Meet., 2005, pp. 359–362.

[2] A. Bond , 2022 IEEE 72nd Electronic Components and Technology Conference (ECTC), San Diego, CA, USA, 2022, pp. 168-176.

Figure 1