bluuebunny/crossref_metadata_2025 huggingface dataset:
Detectability of Automotive Power MOSFET On-Resistance Failure at High Current Induced by Wafer Fab Process Excursion
Authors: Weber Yann , Goxe Julien , Castignolles Maris
Published: December 2020

This paper presents the meaningful consequence of a minor Wafer Fab process variability, generating on-resistance drift on low voltage vertical power N-MOSFETs dedicated to microhybrid automotive application. The originality of this paper concerns the necessity to use complementary failure analysis investigations needed to determine the origin of the failure without any possibilities to perform any fault localization. The results enabled implementation of corrections and improvement of test screening to protect customers.
The Physical Isolation of a Die in a Stacked-Die Configuration
Authors: Jang Vivian , Sias Ken
Published: December 2020

This paper will illustrate the procedures to physically isolate one die in a stacked-die configuration. This highly reliable, systematic method allows for failure analysis engineers of all levels to successfully isolate the die of interest for further investigation.
Reballing/Rebumping Ultra-Fine Pitch Packages Less Than 0.5 mm Pitch for FA
Authors: Wettermann Bob
Published: December 2020

As the pitch and package sizes of semiconductor devices have shrunk and their complexity has increased, the manual methods by which the packages can be re-bumped or reballed for failure analysis have not kept up with this miniaturization. There are some changes in the types of reballing preforms used in these manual methods along with solder excavation techniques required for packages with pitches as fine as 0.3mm. This paper will describe the shortcomings of the previous methods, explain the newer methods and materials and demonstrate their robustness through yield, mechanical solder joint strength and x-ray analysis.
Application of Fast Laser Deprocessing Techniques in Physical Failure Analysis on SRAM Memory of Advance Technology
Authors: Yap H.H. , Tan P.K. , Low G.R. , Dawood M.K. , Feng H. , Zhao Y.Z. , Zhou Y. , He R. , Tan H. , Huang Y.M. , Wang D.D. , Zhou Y. , Limin P.S. , James S. , Lam J. , Mai Z.H.
Published: December 2020

With technology scaling of semiconductor devices and further growth of the integrated circuit (IC) design and function complexity, it is necessary to increase the number of transistors in IC’s chip, layer stacks, and process steps. The last few metal layers of Back End Of Line (BEOL) are usually very thick metal lines (>4μm thickness) and protected with hard Silicon Dioxide (SiO2) material that is formed from (TetraEthyl OrthoSilicate) TEOS as Inter-Metal Dielectric (IMD). In order to perform physical failure analysis (PFA) on the logic or memory, the top thick metal layers must be removed. It is time-consuming to deprocess those thick metal and IMD layers using conventional PFA workflows. In this paper, the Fast Laser Deprocessing Technique (FLDT) is proposed to remove the BEOL thick and stubborn metal layers for memory PFA. The proposed FLDT is a cost-effective and quick way to deprocess a sample for defect identification in PFA.
Failure Analysis Methodology on Resistive Open Defects
Authors: Quah A.C.T. , Ang G.B. , Nagalingam D. , Chen C.Q. , Ng H.P. , Neo S.P. , Lam J. , Mai Z.H.
Published: December 2020

This paper describes the observation of photoemissions from saturated transistors along a connecting path with open defect in the logic array. By exploiting this characteristic phenomenon to distinguish open related issues, we described with 2 case studies using Photon Emission Microscopy, CAD navigation and layout tracing to identify the ‘open’ failure path. Further layout and EBAC analysis are then employed to effectively localize the failure site.
Delayering on Advanced Process Technologies Using FIB
Authors: Carleson Pete , Donnet David , Sidorov Oleg , Rue Chad
Published: December 2020

Good control over beam and chemistry conditions are required to enable uniform delayering of advanced process technologies in the FIB. The introduction of newer, thinner and more beam sensitive materials have made delayering more complicated. We shall introduce a new chemistry for device delayering and present results from both Ga and Xe ion beams showing its improvement over existing chemistries.
Failure Analysis Enhancement by Incorporating a Compact Scan Diagnosis System
Authors: Estores Rommel , Vercruysse Pascal , Villareal Karl , Barbian Eric , Sanchez Ralph , Ackerman Rich
Published: December 2020

The failure analysis community working on highly integrated mixed signal circuitry is entering an era where simultaneously System-On-Chip technologies, denser metallization schemes, on-chip dissipation techniques and intelligent packages are being introduced. These innovations bring a great deal of defect accessibility challenges to the failure analyst. To contend in this era while aiming for higher efficiency and effectiveness, the failure analysis environment must undergo a disruptive evolution. The success or failure of an analysis will be determined by the careful selection of tools, data and techniques in the applied analysis flow. A comprehensive approach is required where hardware, software, data analysis, traditional FA techniques and expertise are complementary combined [1]. This document demonstrates this through the incorporation of advanced scan diagnosis methods in the overall analysis flow for digital functionality failures and supporting the enhanced failure analysis methodology. For the testing and diagnosis of the presented cases, compact but powerful scan test FA Lab hardware with its diagnosis software was used [2]. It can therefore easily be combined with the traditional FA techniques to provide stimulus for dynamic fault localizations [3]. The system combines scan chain information, failure data and layout information into one viewing environment which provides real analysis power for the failure analyst. Comprehensive data analysis is performed to identify failing cells/nets, provide a better overview of the failure and the interactions to isolate the fault further to a smaller area, or to analyze subtle behavior patterns to find and rationalize possible faults that are otherwise not detected. Three sample cases will be discussed in this document to demonstrate specific strengths and advantages of this enhanced FA methodology.
Update on Draft SAE AS6171 Standard—Tools and Techniques for Detection and Mitigation of Counterfeit Electronics
Authors: Vanderlinde William E. , Sood Bhanu P.
Published: December 2020

The Society of Aerospace Engineers (SAE) AS6171 Aerospace Standard standardizes the test and inspection procedures, workmanship criteria, and minimum training and certification requirements to detect counterfeit electrical, electronic, and electromechanical parts. The standard comes in response to a significant and increasing volume of counterfeit electrical, electronic, and electromechanical parts entering the supply chain. This short manuscript and its accompanying talk update the audience on the risk based methodology for detecting potential counterfeiting related defects. The techniques that are discussed in AS6171 slash sheet include film radiography and filmless radiography such as digital radiography, real time radiography, and computed tomography. The analysis is performed on parts to verify that the internal package or die construction is consistent with an exemplar item. AS6171 will provide the counterfeit detection community with standardized test and inspection procedures, workmanship criteria, and minimum training and certification requirements to detect counterfeit electrical, electronic, and electromechanical parts.
Laser Stimulation Effect on FinFET and Case Study
Authors: Jin Kyeongju , Lee Sukho , Kim Keonil , Lee Yunwoo , Kim Yojoung
Published: December 2020

In the case of conventional planar FET, Dynamic Laser Stimulation (DLS) is a very effective method to isolate marginal failure. Depending on laser sources, DLS is divided by Soft Defect Localization (SDL) and Laser Assisted Device Alteration (LADA). SDL uses 1320nm wavelength laser source in order to induce localized heat. On the other hand, LADA uses 1064nm wavelength laser source to generate photo carriers. But for the FinFET the effect of laser stimulation is not clear yet. This paper introduces the effect of laser stimulation on FinFET transistors based on wavelength, the so called LADA and two-photon LADA. The experimental data show changes in Vth and Idsat with different character for a single FinFET transistor. A case study further explains this laser stimulation effect via scan chain LVcc marginal failure analysis localized with 1320nm CW laser stimulation and nano-probing analysis.
How to Locate Resistance VIA by Analysing Schematic Combined with EMMI Result on Integrated Circuit Failed at Cold Temperature
Authors: Wen Gaojie , Tian Li , Li Jinglong , Qi Changyan , Wang Dong
Published: December 2020

Due to the decreasing metal line size on complicated integrated circuit, non-destructive analysis strategy such as EMMI (Emission Microscope) is very significant to failure analysis, especially when special cold temperature failures are encountered. When combined with efficient schematic and layout analysis, the real defect can be localized without much microprobe work.
Non-Destructive Contamination Detection in Thick and Extremely Thin SOI Wafers Using Optical Second Harmonic Generation
Authors: Kryger M.C. , Changala J.P. , Alles M.L.
Published: December 2020

Non-destructive optical second harmonic generation (SHG) is shown to be an effective method for detecting interfacial surface and subsurface non-visual defects in commercial thick and extremely-thin (ET) SOI wafers. A method is demonstrated for removing contributions (noise) from layer thickness variations observed in thick SOI, increasing the sensitivity and enabling detection of trace surface metal contamination. Subsurface contamination, otherwise missed by the standard flow of non-destructive characterization methods, is shown to be detected by SHG.
Case Study—Doping Profile Analysis for 30 nm DRAM Devices Using SCM and SSRM
Authors: Chen Hsiu-Pin , Luo Jian-Shing , Sung Ching-Shan , Wei Chen-Kang , Chiang Kai-Lun , Yang Chia-Ming , Liao Hsueh-Chun , Suo Jahson , Lu Shifeng
Published: December 2020

This paper is to evaluate the doping profile analysis capability of Scanning Capacitance Microscope (SCM) and Scanning Spreading Resistance Microscope (SSRM) on 30nm Dynamic Random Access Memory (DRAM) devices and apply the SSRM technique on a real case to verify the junction depths of different doping recipes for device performance tuning. The results show SCM can be used on periphery devices in a 30nm DRAM due to they have larger feature size (>90nm). For array devices with minimum feature size (~30nm) in a 30nm DRAM, only SSRM is capable with sufficient spatial resolution and sensitivity to identify the structures and doping profiles. For the real case, SSRM analysis results clarified there is approximate 10nm difference on the junction depth between 2 different doping recipes of samples and the result is consistent with the Technology Computer Aided Design (TCAD) simulation data. In addition, both SCM and SSRM techniques showed the analysis quality does highly rely on the surface cleanness and flatness of samples.
FASTKIT—A Software Tool for Easy Design Visibility and Diagnostic Enhancement for Failure Analysis
Authors: Auvray Etienne , Armagnat Paul
Published: December 2020

The present work is relative to a new software suite that features design comprehension and analogic/logic tracing capability with ease of setup in FA laboratory environment. It also expands and correlates FA measure data to design functionality. With this visibility enhanced environment, we show that FA process can be performed more efficiently. Up to now, very few systems have been built with aim to cover advanced diagnosis setup and real-time navigation with synchronized simulation. We address a general FA software tool which purpose is to automate the design database setup and provide to FA engineer capability to launch reading of all design database including capability of generating new patterns compatible with analytical tools. Based on the flow, we propose a series of tools that will allow the FA engineer to work efficiently.
A Case Study—Improving FIB Passive Voltage Contrast Imaging for Deep N-Well Circuits
Authors: Mulder Randal
Published: December 2020

This paper presents a case study of a customer return that failed functional testing on the production tester. Investigation by applications and design engineering identified several analog circuit blocks where a possible failure mechanism could be located causing the functional failure mode seen at test. The identified circuit blocks all resided in deep n-well structures preventing traditional passive voltage contrast imaging (PVC) from being used to isolate the fault location. Neither functional probing nor active voltage contrast imaging were viable options to isolate the failure mechanism to a specific node. The analyst, having a good understanding of the principles of PVC and the difficulties associated with PVC imaging of deep n-well circuits, took advantage of a design feature in the device to restore the ability to perform passive voltage contrast imaging on these circuits. Using this enhanced PVC capability, two polysilicon capacitors with degraded oxide integrity were easily identified. This degraded oxide was verified to cause abnormal leakage to the substrate by means of nanoprobe analysis. Without identifying and taking advantage of a design feature not intended for failure analysis, locating these damage poly capacitors would have been extremely difficult because existing analysis techniques could only localize the failure to a number of circuit blocks. This paper presents a brief detailed over-view of PVC imaging, the issues with PVC imaging of deep n-well circuits, and an example of a previous attempt to overcome the deep n-well PVC problem. This review is then followed by the case study demonstrating the steps taken to restore PVC capability and concludes with recommendations for design for failure analysis (DFA).
Failure Analysis Methodology on Circular Patch Functional Failure Due to Device Parametric Drift
Authors: Quah A.C.T. , Chen C.Q. , Ang G.B , Nagalingam D. , Ng H.P. , Ng P.T. , Moon SeungJe , Teo Angela , Yip K.H. , Lam J. , Mai Z.H.
Published: December 2020

This paper describes the debug and analysis process of a challenging case study from wafer foundry which involved a circular patch functional leakage failure that was induced from device parametric drift due to thicker gate oxide with no detection signal from inline monitoring vehicles. It highlights the need for failure analyst to always be inquisitive and to deep dive into the failure symptoms to value-add the fab in discovering the root cause of the failure in challenging situation where information is limited.
Invisible Defect Root Cause Identification with Electrical and Chemical Analyses
Authors: Song Zhigang , Wang Yunyu , Pendyala Sweta
Published: December 2020

As semiconductor technology keeps scaling down, the conventional physical failure analysis processes have faced increasing challenges and encountered low success rate. It is not only because the defect causing a failure becomes tinier and tinier, but also because some of these defects themselves are invisible. Electrical nano-probing with narrowing down a defect to a single transistor has greatly increased the likeliness of finding a tiny defect in subsequent TEM (transmission Electron Microscope) analysis. However, there is still an increasing trend of encountering an invisible defect at most advanced technology nodes. This paper will present how to identify the root causes of three such invisible defects with the combination of electrical nano-probing and TEM chemical analysis.
Unusual Defects Generated by Wafer Sawing—An Update—Including Pick and Place Processing
Authors: Jacob Peter
Published: December 2020

At ESREF 2008, the paper “Unusual defects, generated by wafer sawing: Diagnosis, mechanisms and how to distinguish from related failures” had won the Best Paper Award. In the meantime, new experiences were collected, related to new methods as laser sawing and its specific ESD risks and additional failure mechanisms as backside damage, charging of foils, pad corrosion and sawing residue damages. This paper explains in detail these failure sources, including detailed explanations on root causes and physical mechanisms as well as important hints for failure analysts how to distinguish related failure signatures from those, which look similar but are of other origin.
Study of 1340 nm Continuous Laser Invasiveness on 28 nm Advanced Technologies
Authors: Penzes Maxime , Dudit Sylvain , Parrassin Thierry , Vallet Michel , Lewis Dean , Perdu Philippe
Published: December 2020

This paper presents a study about the invasiveness of 1340 nm continuous wave laser used for electrical failure analysis on 28 nm advanced technologies. It underlines the potential laser-induced degradation for deep submicron technologies that could jeopardize analysis results by modifying physical and chemical properties at substructure level. The impact of laser power on transistor morphology and electrical behavior is studied and the results of this study enable us to setup safe experimental conditions.
Innovative Laser Process for Gel Removal
Authors: Anderson Gregory Burt , Fordham Lance
Published: December 2020

High-power modules incorporating insulated gate bipolar transistors (IGBT) include a thick layer of dielectric insulating gel to prevent arcing. Chemical methods currently used to remove the gel are slow, taking up to 24 hours, while generating as much as a half-gallon of waste. High-pressure wet jets have also been used, but they cause significant damage to wire bonds. In this paper, we present a fast and efficient process for removing insulating gel from high-power modules. The method uses a CO2 laser to selectively open windows in the gel that are then filled with a few drops of solvent followed by a DI water rinse. The entire process takes less than an hour to prepare samples for inspection and analysis, while generating just 200ml of waste.
An Analysis of Random Telegraph Signal Noise in a Precise Analog Circuit
Authors: Wang Yuguo , Chatterjee Tathagata , Tian Weidong , Aggarwal Raj , Balster Scott , Cestra Gregory , Howard Steven , Barr Chris , Reyes Alexander
Published: December 2020

We analyzed the gain error issue and non-linearity issue of a precise Analog-to-Digital Converter (ADC) and found the root cause to be Random Telegraph Signal (RTS) noise in bipolar devices. The RTS noise produced nearly 1mV abrupt changes in a band-gap reference voltage, and affected ADC and other circuits where the reference voltage was used. We developed a new measurement method enabling us to detect RTS noise in bipolar with higher signal-to-noise ratio than traditional methods. We also developed an algorithm to extract RTS occurrence frequency and average magnitude. The RTS characterization capability has helped us invent a new bipolar structure and develop new processes to minimize RTS noise.
Development of Small Spot Thickness Capability on a Conventional Energy Dispersive X-Ray Fluorescence Spectrometer
Authors: Bogani Federica , Dobriyal Priyanka
Published: December 2020

The metal thickness of surface finish is an important consideration when plating on microelectronics. Metal finish thickness should comply with specification requirements to prevent serious reliability concerns. The thickness of metallic coatings is routinely determined by X-ray fluorescence (XRF) spectrometry. For conventional XRF instrumentation, typical focal spot sizes at the sample surface range in diameter from several hundred micrometers up to several millimeters. Micro- XRF focuses or collimates the X-ray beam to significantly smaller spot sizes, ranging from ~30 µm to 2 mm, thus obtaining a representative average of layer properties both at the surface and in-depth layers. This is a critical property for application in semiconductor industry where feature size is becoming progressively smaller. This work describes how a mid-range cost conventional XRF tool can be utilized for small spot size thickness measurement with the addition of a 0.25 mm diameter collimator.
Electrical Failures Due to Particle Induced Copper Wire Bond Corrosion
Authors: Kho W.F. , Chan Gary H.G.
Published: December 2020

Contamination by particles is one of the major causes of failures in integrated circuits. In some cases, particles may absorb moisture leading to electrochemical migration, dendrite growth, and electrical leakage and short failures. This work presents two case studies of particle induced corrosion of copper wire bond that resulted in an electrical failure. In the first case, adjacent pin resistive short failures were found to fail due to corrosion and electrochemical migration at wires that were in contact with calcium chloride particles. Analysis showed that the highly hygroscopic calcium chloride particles absorbed moisture and resulted in corrosion and electrochemical migration of the copper wires. For the second case, an electrical open failure after temperature cycle reliability test was found to be due to an organophosphorus particle being in contact with the wire.
Mechanism to Improve the Reliability of Cu Wire Bonding by Pd-Coating of the Wire
Authors: Qin Wentao , Anderson Tom , Chang George , Anderson Harold , Barrientos Denise
Published: December 2020

Coating of the Cu bond wire with Pd has been a rather widely accepted method in semiconductor packaging to improve the wire bonding reliability. Based on comparison of a Cu bond wire and a Pd-coated Cu bond wire on AlCu pads that had passed HAST, new insight into the mechanism of the reliability improvement is gained. Our analysis showed the dominant Cu-rich intermetallics (IMC) were Cu3Al2 for the Cu wire, and (CuPdx)Al for the Pd-coated wire. The results have verified the Cu-rich IMC being suppressed by the Pd-coating, which has been extensively reported in literature. Binary phase diagrams of Al, Cu, and Pd indicate that the addition of Pd elevates the melting point and bond strength of (CuPdx)Al compared with CuAl that formed with the bare Cu wire. The improvements are expected to decrease the kinetics of phase transformation toward the more Cu-rich IMC. With the suppression of the Cu-rich IMC, the corrosion resistance of the wire bonding is enhanced and the wire bonding reliability improved. We find that Ni behaves thermodynamically quite similar to Pd in the ternary system of Cu wire bonding, and therefore possesses the potential to improve the corrosion resistance.
Single Event Transient Acquisition and Mapping for Space Device Characterization
Authors: Pilia Roberta , Bascoul Guillaume , Sanchez Kevin , Mura Giovanna , Infante Fulvio
Published: December 2020

It is necessary for space applications to evaluate the sensitivity of electronic devices to radiations. It was demonstrated that radiations can cause different types of effects to the devices and possibly damage them [1][2]. The interest in the effect of Single Event Transient (SET) has recently risen because of the increased ability of parasitic signals to propagate through advanced circuit with gate lengths shorter than 0.65 nm and to reach memory elements (in this case they become Single Event Upset (SEUs)). Analog devices are especially susceptible to perturbations by such events which can induce severe consequences, from simple artifacts up to the permanent fail of the device. This kinds of phenomena are very difficult to detect and to acquire, because they are not periodical. Furthermore, they can vary a lot depending on different parameters such as device technology and biasing. The main obstacle for the analysis is due to the maximum frequency of these signals, which is unknown. It is consequently difficult to set a correct sample frequency for the acquisition system. In this document a methodology to evaluate SETs in analog devices is presented. This method allows to acquire automatically these events and to easily study the sensitivity of the device by analyzing a “SETs cartography”. The advantages are different: it allows to easily acquire and analyze the SETs in an automatic way; the obtained results allow the user to accurately characterize the device under test; and, finally, the costs due to the implementation of the tests are lower than a classical analysis performed by a particle accelerator.
Case Study—Lock-in Thermography Application in Failure Analysis of a System Level DC-DC μModule Regulator
Authors: Kumar Vikash , Karthikeyan Devraj
Published: December 2020

Fault localization is a common failure analysis process that is used to detect the anomaly on a faulty device. The Infrared Lock-In Thermography (LIT) is one of the localization techniques which can be used on the packaged chips for identifying the heat source which is a result of active damage. This paper extends the idea that the LIT analysis for fault localization is not only limited to the devices within the silicon die but it also highlights thermal failure indications of other components on the PCB (like capacitors, FETs etc on a system level DC-DC μmodule). The case studies presented demonstrate the effectiveness of using LIT in the Failure analysis process of a system level DC-DC μmodule regulator.
SRAM PFET and NFET Super FIN Characterization
Authors: Wei Yong , Baumann Frieder , Lucarini Stephen , Barth Karl , Song Zhigang , Katnani Ahmad
Published: December 2020

The State-of-the-Art FinFET technology has been widely adopted in the industry, typically at 14 nm and below technology nodes. As fin dimensions are pushed into the nanometer scale, process complexity is highly escalated, posing great challenges for physical failure analysis. Meanwhile, the accelerated cycles of learning for new technology nodes demand high accuracy and fast turnaround time to solve the material and interface issues pertaining to semiconductor processing or device failure. In this paper, we report a case study of fin related defect that caused device failure. Several analytical techniques, namely, Scanning Electron Microscopy (SEM), plan-view and cross-section Transmission Electron Microscopy (TEM) with Energy Dispersive X-ray spectroscopy (EDX), Electron Energy Loss Spectroscopy (EELS) and Z-contrast tomography were employed to characterize the defect and identify root-cause, leading to the resolution of this issue.
Further Inquiry into Xe Primary Ion Species for Circuit Edit Application
Authors: Ray Valery , Hadjikhani Ali , Favata Joseph , Ahmadi Seyedeh , Shahbazmohamadi Sina
Published: December 2020

Widespread adoption and significant developments in Focused Ion Beam technology has made FIB/SEM instrumentation a commonplace sample preparation tool. Fundamental limitations inherent to Ga ion species complicate usage of Ga+ FIB instruments for the modification of semiconductor devices on advanced technology nodes. Said limitations are fueling interest in exploring alternative primary species and ion beam technologies for circuit edit applications. Exploratory tests of etching typical semiconductor materials with Xe ion beams generated from two plasma ion sources confirmed advantages of Xe+ as a potential ion species for gas-assisted etching of semiconductor materials, but also revealed potential complications including, swelling of metal and Xe+ retention within the material arising from excessive Xe ion beam current density.
A Study on Error Corrected Code Failure-Induced Latent Defect in between High-k MIM Capacitors
Authors: Kim Jinseon , Kim Minsoo , Shin Minju , Nam Incheol , Kim Daesun , Hwang Hongsun , Rhee Sangjae , Cho Kangyong , Jang Seongjin
Published: December 2020

For fault management, various types of error-correcting codes (ECC) have been widely used for most computers and memory. From a memory perspective, the ECC technique is generally adopted for DRAM modules to correct data corruption among multiple chips, not in-chip level. Recently, increased soft single-bit failures have accelerated introduction of the ECC technique into DRAM components. For reliability, fault generation technique by high voltage at high temperature, also known as burn-in stress, has been widely used in the IC manufacturing process. In DRAM, burn-in stress is also useful to screen latent defects or to predict device lifetime. In this paper, we studied un-correctable errors which occurred due to various types of storage node bridge defects in ECC DRAM. 12 faulty cells among 1,000 cells are observed after burn-in stress. Retention time of each cell is measured with automatic test equipment under the various temperature conditions, and activation energy were extracted from measurement results. Results of activation energy show that there were two types of faults, one was metal-metal hard bridge (0.14eV) and the other was dielectric-dielectric soft bridge (0.35eV), in comparison with normal cells (0.53eV). Moreover, soft bridge was carefully analyzed with TEM and nanoprobing showing that activation energy analysis was well-matched.
Application of AFP Nanoprobing Light-Induced Photovoltaic Current in the Failure Analysis
Authors: Chen C.Q. , Ng P.T. , Ang G.B. , Rivai Francis , Ting S.L. , Teo Angela , Ng H.P. , Lam J. , Mai Z.H.
Published: December 2020

As semiconductor technology keeps scaling down, failure analysis and device characterizations become more and more challenging. Global fault isolation without detailed circuit information comprises the majority of foundry EFA cases. Certain suspected areas can be isolated, but further narrow-down of transistor and device performance is very important with regards to process monitoring and failure analysis. A nanoprobing methodology is widely applied in advanced failure analysis, especially during device level electrical characterization. It is useful to verify device performance and to prove the problematic structure electrically. But sometimes the EFA spot coverage is too big to do nanoprobing analysis. Then further narrow-down is quite critical to identify the suspected structure before nanoprobing is employed. That means there is a gap between global fault isolation and localized device analysis. Under these kinds of situation, PVC and AFP current image are offen options to identify the suspected structure, but they still have their limitation for many soft defect or marginal fails. As in this case, PVC and AFP current image failed to identify the defect in the spot range. To overcome the shortage of PVC and AFP current image analysis, laser was innovatively applied in our current image analysis in this paper. As is known to all, proper wavelength laser can induce the photovoltaic effect in the device. The photovoltaic effect induced photo current can bring with it some information of the device. If this kind of information was properly interpreted, it can give us some clue of the device performance.
Predictive Failure Analysis of Solder Joints with Simultaneous High Speed EBSD and EDS
Authors: Lindsay J. , Trimby P. , Goulden J. , McCracken S. , Andrews R.
Published: December 2020

The results presented here show how high-speed simultaneous EBSD and EDS can be used to characterize the essential microstructural parameters in SnPb solder joints with high resolution and precision. Analyses of both intact and failed solder joints have been carried out. Regions of strain localization that are not apparent from the Sn and Pb phase distribution are identified in the intact bond, providing key insights into the mechanism of potential bond failure. In addition, EBSD provides a wealth of quantitative detail such as the relationship between parent Sn grain orientations and Pb coarsening, the morphology and distribution of IMCs on a sub-micron scale and accurate grain size information for all phases within the joint. Such analyses enable a better understanding of the microstructural developments leading up to failure, opening up the possibility of improved accelerated thermal cycling (ATC) testing and better quality control.
Investigating Root Cause of a Bubble Formation in Spin on Hardmask
Authors: Dar Rebecca , Behnke Jason , Baumann Frieder , Shepherd Tim , Teo Kok Hin (Rick) , Zhao Wayne , Moore Joshua , Dumas Laurent
Published: December 2020

Through inline processing of a prospective Spin on Hardmask (SOH) material, bubble defects were observed randomly across a wafer. Several complementary FA techniques were utilized to characterize the bubble defects including SEM, TEM, and chemical analysis techniques. The root cause of defect formation was identified as a raw material imperfection in SOH, which led to excessive outgassing. Imperfections within the substrate formed nucleation sites for outgassing of SOH material forming bubbles, which allowed voids to propagate. These findings led to implementation of greater quality control methods by the raw material manufacturer.
A Case Study of High SRAM Low Power Mode Current
Authors: Asquith John , Biyer Frank , Erington Kent , Gomez Nelson , Heineke Stephen , Wu Carey , Ybarra Juan
Published: December 2020

Low power mode current is a very important parameter of most microcontrollers. A non-production prototype microcontroller had high current issues with certain SRAM modules which were produced using a new memory compiler. All devices were measuring 100’s μA of low power mode current which was an order of magnitude higher than the requirement. Many failure analysis (FA) techniques had to be used to determine the root cause: Optical Beam Induced Resistance Change (OBIRCh), photo emission microscopy (PEM), microprobing, and nanoprobe device characterization. Transistor models and measurements of probe structures from the effected lots both predicted that the device low power mode current would meet expectations; however, all first silicon samples had elevated low power mode current. A knowledge of low power design methodology was needed to ensure all issues were discovered.
Correction of Stress Release During Sample Preparation for TEM CBED Measurements
Authors: Gluch Jürgen , Gall Martin , Zschech Ehrenfried , Mühle Uwe , Narendraraj Chandran , Hrabovský Miloš , Morávek Tomáš
Published: December 2020

In the vicinity of a through silicon via (TSV) used in 3D chip integration, the effect of dedicated strain engineering to enhance the carrier mobility in the channel of metal oxide semiconductor field effect transistors (MOSFETs) is superposed by a strain caused by cooling down from high process temperatures to room temperature. This additional strain influences the transistor characteristics, and consequently the product performance. The measurement of strain with high spatial resolution requires TEM-based methods. In this paper, convergent beam electron diffraction (CBED) is used for strain measurement. The strain state is significantly changed during the preparation of the TEM lamellae. The exact sample geometry and accurate materials parameters were used in FE modelling and strain simulation based on a physical model. The strain in silicon at several distances from the TSV were determined experimentally using TEM-CBED and compared with numerical simulations. High-quality sample preparation is crucial for reliable and reproducible TEM-based strain data, i.e., it is a necessary precondition for strain release correction based on FE modelling and simulation.
Comparison of He+ and Ga+ Voltage Contrast in N-wells
Authors: Johnson Gregory M. , Ferranti David , Notte John , Lewis Brett , Park Chris H. , Lundquist Ted , Niu Baohua
Published: December 2020

The examination of partially deprocessed ICs for well imaging has been investigated. First it has been shown [1] that Ga+ FIB imaging can readily and strongly highlight the N-well / P-well boundary in an IC as shown again here. Second, a model which only considers secondary electron creation and scattering [2] is confirmed to be sufficient for understanding these imaging effects. Heavy Ga doping provides no marked change in PVC (passive voltage contrast). Then comparisons in the same field of view between optimized He+ and Ga+ imaging, has shown that He+ provides much greater PVC contrast when looking through deep oxide, and much better resolution on shallow surfaces. The quantitative model Stopping and Range of Ions in Matter (SRIM) [3] was consulted and confirmed these expectations for resolution and depth superiority of the He+ beam. According to the SRIM, there may even be less damage from the He+ beam. Yet these known effects of Ga+ damage has not prevented its widespread use in semiconductor FA and process monitoring. Thus, the use of GFIS (Gas field ion source) He+ beam for voltage contrast and junction imaging warrants further exploration.
Efficient Fault Isolation and Failure Analysis Methods to Root Cause Defects in Microprocessors
Authors: Faraby Hasan , Deborde Tristan , von Haartman Martin
Published: December 2020

This paper analyzes the through-put time and output of fault isolation and failure analysis (FI/FA) flows on state-of-the-art microprocessors. An average reduction in through-put time of 40% was demonstrated with a shortened FI/FA flow while still maintaining a high success rate. The direct FA/nano-probing flow which was utilized by up to around 90% of the fail cases omitted the optical fault isolation step and instead expanded the use of plasma FIB, nano-probing and electrical isolation techniques (such as diagnosis tools). The end result is shorter through-put time and higher FI/FA volume which is important in order to achieve a faster production ramp. In the paper two cases studies are presented to demonstrate the new efficient FI/FA techniques.
Utilizing Delta IDDQ to Screen Cell Specific Defects for High Quality and Reliability Applications
Authors: Barbian Eric , Sanico Niel , Thiefain Julien , Koestner Andy
Published: December 2020

High quality and reliability are paramount for automotive and other high grade commercial applications. The implementation of scan testing including stuck-at, transition, IDDQ, bridging and cell-aware patterns have all been targeted at reducing the number of defective parts being shipped. These techniques are not always sufficient to achieve sub defective parts per million (DPPM) quality levels. This paper presents a recurring failure mechanism that was encountered on an automotive device and the subsequent efforts to expand upon existing testing methodologies to effectively screen the defective devices using a delta IDDQ method with specific logic inputs and outputs. In effect, this new testing becomes a cell-aware delta IDDQ targeting one specific input condition that was implemented in production with limited test time overhead.
Reflections on COVID-19
Authors: Frederick Marla , Telliel Yunus Doğan , Mellquist Lehto Heather
Published: December 2020

COVID-19, Religious Markets, and the Black Church, Marla Frederick

Can You See the Big Picture? COVID-19 and Telescoping Truth, Yunus Doğan Telliel

Learning from Religious Diasporas in Pandemic Times, Heather Mellquist Lehto
Soziale Dilemmastrukturen in Theorie und Praxis: Möglichkeiten und Grenzen der Anwendung
Authors: Barrett Swaan
Published: December 2020

Soziale Dilemmastrukturen werden besonders in der Ökonomik verwendet, um den Konflikt zwischen eigenen und kollektiven Interessen sowie zugrundeliegende Strukturen zu modellieren. Anhand der Finanzkrise, der Bevölkerungsentwicklung und des Wachstums der Biobranche werden die Möglichkeiten und Grenzen des Modells sowie daraus folgende Handlungsempfehlungen untersucht.
Comparison of Different Data Mining Methods to Determine Disease Progression in Dissimilar Groups of Parkinson’s Patients
Authors: Przybyszewski Andrzej W. , Chudzik Artur , Szlufik Stanislaw , Habela Piotr , Koziorowski Dariusz M.
Published: December 2020

Parkinson’s disease (PD) is the second after Alzheimer’s most popular neurodegenerative disease (ND). Cures for both NDs are currently unavailable. OBJECTIVE: The purpose of our study was to predict the results of different PD patients’ treatments in order to find an optimal one. METHODS: We have compared rough sets (RS) and others, in short, machine learning (ML) models to describe and predict disease progression expressed as UPDRS values (Unified Parkinson’s Disease Rating Scale) in three groups of Parkinson’s patients: 23 BMT (Best Medical Treatment) patients on medication; 24 DBS patients on medication and on DBS therapy (Deep Brain Stimulation) after surgery performed during our study; and 15 POP (Postoperative) patients who had had surgery earlier (before the beginning of our research). Every PD patient had three visits approximately every six months. The first visit for DBS patients was before surgery. On the basis of the following condition attributes: disease duration, saccadic eye movement parameters, and neuropsychological tests: PDQ39 (Parkinson’s Disease Questionnaire - disease-specific health-related quality-of-life questionnaire), and Epworth Sleepiness Scale tests we have estimated UPDRS changes (as the decision attribute). RESULTS: By means of RS rules obtained for the first visit of BMT/DBS/POP patients, we have predicted UPDRS values in the following year (two visits) with global accuracy of 70% for both BMT visits; 56% for DBS, and 67%, 79% for POP second and third visits. The accuracy obtained by ML models was generally in the same range, but it was calculated separately for different sessions (MedOFF/MedON). We have used RS rules obtained in BMT patients to predict UPDRS of DBS patients; for the first session DBSW1: global accuracy was 64%, for the second DBSW2: 85% and the third DBSW3: 74% but only for DBS patients during stimulation-ON. ML models gave better accuracy for DBSW1/W2 session S1(MedOFF): 88%, but inferior results for session S3 (MedON): 58% and 54%. Both RS and ML could not predict UPDRS in DBS patients during stimulation-OFF visits because of differences in UPDRS. By using RS rules from BMT or DBS patients we could not predict UPDRS of POP group, but with certain limitations (only for MedON), we derived such predictions for the POP group from results of DBS patients by using ML models (60%). SIGNIFICANCE: Thanks to our RS and ML methods, we were able to predict Parkinson’s disease (PD) progression in dissimilar groups of patients with different treatments. It might lead, in the future, to the discovery of universal rules of PD progression and optimise the treatment.
Reasoning about Exceptions in Ontologies: from the Lexicographic Closure to the Skeptical Closure
Authors: Giordano Laura , Gliozzi Valentina
Published: December 2020

Reasoning about exceptions in ontologies is nowadays one of the challenges the description logics community is facing. The paper describes a preferential approach for dealing with exceptions in Description Logics, based on the rational closure. The rational closure has the merit of providing a simple and efficient approach for reasoning with exceptions, but it does not allow independent handling of the inheritance of different defeasible properties of concepts. In this work we outline a possible solution to this problem by introducing a weaker variant of the lexicographical closure, that we call skeptical closure, which requires to construct a single base. We develop a bi-preference semantics for defining a characterization of the skeptical closure.
Towards a Logic Programming Tool for Cancer Data Analysis
Authors: Tarzariol Alice , Zanazzo Eugenia , Dovier Agostino , Policriti Alberto
Published: December 2020

The main goal of this work is to propose a tool-chain capable of analyzing a data collection of temporally qualified (genetic) mutation profiles, i.e., a collection of DNA-sequences (genes) that present variations with respect to their “healthy” versions. We implemented a system consisting of a front-end, a reasoning core, and a post-processor: the first transforms the input data retrieved from medical databases into a set of logical facts, while the last displays the computation results as graphs. Concerning the reasoning core, we employed the Answer Set Programming paradigm, which is capable of deducing complex information from data. However, since the system is modular, this component can be replaced by any logic programming tool for different kinds of data analysis. Indeed, we tested the use of a probabilistic inductive logic programming core.
On Proving Parameterized Size Lower Bounds for Multilinear Algebraic Models
Authors: Ghosal Purnata , Raghavendra Rao B.V.
Published: December 2020

We consider the problem of obtaining parameterized lower bounds for the size of arithmetic circuits computing polynomials with the degree of the polynomial as the parameter. We consider the following special classes of multilinear algebraic branching programs:

1) Read Once Oblivious Branching Programs (ROABPs),

2) Strict interval branching programs,

3) Sum of read once formulas with restricted ordering.

We obtain parameterized lower bounds (i.e., nΩ( t( k)) lower bound for some function t of k) on the size of the above models computing a multilinear polynomial that can be computed by a depth four circuit of size g( k) n O(1) for some computable function g.

Further, we obtain a parameterized separation between ROABPs and read-2 ABPs. This is obtained by constructing a degree k polynomial that can be computed by a read-2 ABP of small size such that the rank of the partial derivative matrix under any partition of the variables is large.
Parameter evolution of the classifiers for disease diagnosis with offline data-driven hybrid systems
Authors: Nalluri Madhu Sudana Rao , K Kannan , Gao Xiao-Zhi , V Swaminathan , Roy Diptendu Sinha
Published: December 2020

Automatic disease diagnosis is, in essence, a classification problem where the classifier has to be trained based on patients’ datasets and not entirely on doctors’ expert knowledge. In this paper, we present the design of such data-driven disease classifiers and fine-tuning classifier performance by a multi-objective evolutionary algorithm. We have used sequential minimal optimization (SMO) classifier as the base classifier and three evolutionary algorithms namely Cat Swarm Optimization (CSO), Invasive Weed Optimization (IWO) and Eagle Search based Invasive Weed Optimization (ESIWO) to diagnose disease from datasets available. In that sense, our approach is an offline data-driven approach with 18 benchmark medical datasets, and the obtained results demonstrate the superiority of the proposed diagnoses in terms of multiple objectives such as classification Prediction accuracy, Sensitivity, and Specificity. Relevant statistical tests have been carried out to substantiate the cogence of the obtained results.
Improving multi-view facial expression recognition through two novel texture-based feature representations
Authors: Wang Xuejian , Fairhurst Michael C. , Canuto Anne M.P.
Published: December 2020

Although several automatic computer systems have been proposed to address facial expression recognition problems, the majority of them still fail to cope with some requirements of many practical application scenarios. In this paper, one of the most influential and common issues raised in practical application scenarios when applying automatic facial expression recognition system, head pose variation, is comprehensively explored and investigated. In order to do this, two novel texture feature representations are proposed for implementing multi-view facial expression recognition systems in practical environments. These representations combine the block-based techniques with Local Ternary Pattern-based features, providing a more informative and efficient feature representation of the facial images. In addition, an in-house multi-view facial expression database has been designed and collected to allow us to conduct a detailed research study of the effect of out-of-plane pose angles on the performance of a multi-view facial expression recognition system. Along with the proposed in-house dataset, the proposed system is tested on two well-known facial expression databases, CK+ and BU-3DFE datasets. The obtained results shows that the proposed system outperforms current state-of-the-art 2D facial expression systems in the presence of pose variations.