The Use Of Vector Processors In Reservoir Simulation
Authors: Killough John E. 
Published: December 2007

Tests of reservoir simulation models on the IBM 3838 array processor and CRAY-1 computer are described. The tests involved the use of a benchmark-type reservoir simulation model with a fixed set of data. The formulation of the model is described along with modifications which were made for the vector processors. Also described is the simulation of a realistic field-wide model of the Prudhoe Bay field. Comparisons are given between Prudhoe Bay field. Comparisons are given between the IBM 370/168, IBM 3033, IBM 3838 - IBM 370/168, and CRAY-1 computers. The characteristics of the IBM 3838 and CRAY-1 are briefly described. It is shown that vector processors can result in substantial improvements in computation time for the reservoir simulation problem.

Introduction

During the past few years computers have come into existence which allow efficient computations on vectors or arrays of numbers. Unfortunately, to date, there has been little comparison of computation times for the reservoir simulation model between these vector processors and the standard mode of operation on a sequential processor. The following paper compares the vector processor and the sequential processor on a reservoir model problem for two vector processors: the IBM 3838 problem for two vector processors: the IBM 3838 and the CRAY-1 computer.

These vector processors gain most of their speed advantage through the use of a piece of computer hardware known as a vector pipeline. Figure 1 shows a typical pipeline. Speed is gained in the pipeline by taking advantage of the fact that the arithmetic unit of a computer is really a sequence of steps. As shown in Figure 1, these steps in an add operation might be exponent subtract, alignment of operands, the actual addition, and finally, the post normalization. Rather than wait for all four of these operations to be performed to produce a single result, when operating performed to produce a single result, when operating on a long string of numbers, the vector pipeline keeps each segment busy. That is, after the exponent subtracts are performed on the first set of operands, these values are passed to the alignment step. At the same time two additional operands are passed into the exponent subtraction step. The process continues until the pipeline is full; i.e., process continues until the pipeline is full; i.e., each stage is processing two operands or a result. At this time, a result is produced in about one-fourth the time of a sequential operation on a single set of operands. Other gains in speed are obtained by "vectorizing" the fetching and storing of data from and to memory. In this way, a vector processor may produce results from six to eight processor may produce results from six to eight times as fast as the equivalent scalar operation.

Additional speed may be gained in the vector processor through the concept of "vector function processor through the concept of "vector function chaining". Figure 2 shows a conceptual diagram for this process. A first vector process is begun, for example an add. This can be followed immediately by a multiply of the result from the first pipeline if the additional operand is not dependent pipeline if the additional operand is not dependent on the result of the first add. Similarly, the second pipeline operation might be followed by an add. This type of process would occur, for example, in an arithmetic expression involving vector results. The answers for this case are obtained for relatively long vector lengths in less than one-twelfth of the typical scalar process time.

Some scalar processors attempt to exploit vector characteristics in the same fashion as the vector processors. The CDC 7600 has associated with it a vector set of instructions which allow limited pipelining to be performed. In addition, the IBM 370/168 and IBM 3033 have high speed cache memory associated with the arithmetic unit so that rather than a single word, a block of data is fetched from storage each time. In this way, for operations on contiguous vectors, additional references to memory are reduced.

IBM 3838 AND CRAY-1 CHARACTERISTICS