bluuebunny/crossref_metadata_2025 huggingface dataset:
Hydrosilylation of High Porosity Porous Silicon with 1-Hexene in Supercritical CO2 Fluid
Authors: Naoto Takura , Jin Lianhua , Kondoh Eiichi , Gelloz Bernard
Published: September 2020

Hydrosilylation of organic groups on hydrogen-terminated porous silicon enhances its stability and increasing the porosity of the porous silicon improves its luminescence efficiency. For as-formed thick porous silicon layers with high porosity, however, it is very difficult to preserve its fine structure during air-drying. Here, a process of both drying and hydrosilylation of highly porous silicon in ambient supercritical fluid was developed. 1-hexene was used for the hydrosilylation. The parameters of ambient temperature and processing time have been investigated for optimal process. The effects of the process were evaluated by means of Fourier transform infrared spectroscopy. Supercritical fluid hydrosilylation of porous silicon with thickness of 10 μm and porosity of 80% was achieved. Stable photoluminescence of processed porous silicon was also obtained.
Spacers to Improve Performance and Porosity of Graphene Based Polymer Electrolyte Fuel Cells
Authors: Suter Theo , Clancy Adam , Rubio Carrero Noelia , Heitzmann Marie , Guetaz Laure , Shaffer Milo , Howard Christopher A. , McMillan Paul F. , Brett Dan
Published: September 2020

Graphene has been suggested as a potential support material to replace commercial carbon black due to its carbon corrosion resistance. However, graphene-based electrodes typically perform poorly in MEA testing due to restacking of the graphitic sheets. In this study we investigate the introduction of carbon black and their effects on the porosity and current density of graphene-based supports.
Plasmonic Ag/N-doped Graphene Nanoflakes as Electrocatalyst for Oxygen Reduction Reaction Enhanced by Solar Energy
Authors: Wang Zhihuan , Chen Yingjie , Gong Chong , Sui Lina , Yu Liyan , Dong Lifeng
Published: September 2020

Plasmonic Ag nanoparticles have strong spectral absorption in the ultraviolet and visible light bands due to unique localized surface plasmon resonance effects. Meanwhile, nitrogen-doped graphene (NG) incorporates nitrogen (N) atoms into graphene skeleton through a hydrothermal process, thereby providing active oxygen reduction reaction (ORR) sites. Herein, plasmonic Ag nanoparticles decorated N-doped graphene (Ag/NG) is synthesized and utilized as ORR catalysts. The ORR performance of Ag/NG greatly exceeds that of pure NG. Its half-wave potential (0.86 V) exceeds that of commercial Pt/C (0.83 V). Under the AM 1.5G simulated sunlight, Ag/NG demonstrates photo-enhanced electrocatalytic performance with right shifting of onset potential and half-wave potential. In this case, the half-wave potential increases by 10 mV, and the current density also rises significantly. Therefore, the Ag/NG composite provides a potential strategy for the development of solar-enhanced electrocatalysts for fuel cells and metal-air batteries.
Underlying Mechanisms on Tunable Electronic Structures of Graphene Quantum Dots Doped with Nitrogen and Sulfur Heteroatoms
Authors: Guo Qian , Feng Jianguang , Dong Lifeng
Published: September 2020

Doping heteroatoms into graphene quantum dots (GQDs) is an efficient way to tune electronic structures. Herein, electronic mechanism of GQDs doped with N and S is studied by density functional theory (DFT). The formation energies, electronic structures, and electrostatic potentials of pristine and co-doped GQDs are calculated to reveal effects of different doping types on electronic properties. It is found that the introduction of sulfur-containing groups can enhance positive area around N and increase atomic charge density of C atoms connected to N, which indicates that heteroatom co-doped GQDs have improved electron transports. The introduction of S and oxidized S into graphitic and pyridine N structures influences energy difference between the highest occupied molecular orbital (HOMO) and the lowest occupied molecular orbital (LUMO). Therefore, this work will provide valuable information on understanding electronic properties of N/S co-doped GQDs for the applications in nanoelectronic devices.
Effects of Wet Ambient on Dry Oxidation Processes at 4H-SiC/SiO2 Interface: An Ab Initio Study
Authors: Shimizu Tsunashi , Akiyama Toru , Nakamura Kohji , Ito Tomonori , Kageshima Hiroyuki , Uematsu Masashi , Shiraishi Kenji
Published: September 2020

The reaction processes of O2 molecule with wet oxidant such as H2O molecule at the interface between 4H-SiC and SiO2 are investigated by performing ab initio calculations. On the Si-face, the formation of CO molecule from O2 molecule occurs without the reaction of H2O molecules. The calculated energy barrier for the CO formation from O2 molecule agrees with that of single dry oxidation, indicating that H2O molecule hardly contributes to oxidation reaction process at the Si-face interface. In contrast, both O2 and H2O molecules are easily incorporated into the C-face interface, resulting in the CO2 formation. The energy barrier for the reaction is lower than those of single dry and wet oxidations. Therefore, the coexistence of O2 and H2O molecules promotes the oxide growth at the C-face interface. These calculated results suggest that the activation energies of interfacial reaction processes on the C-face SiC crucially depend on wet ambient condition.
Consideration on SiO2/4H-SiC Band Alignment Modulation by NO Annealing
Authors: Kil Tae-Hyeon , Kita Koji
Published: September 2020

NO post-oxidation annealing (NO-POA), introducing nitrogen at the SiO2/4H-SiC interface, is an excellent method not only for the reduction of the interface trap density, but also for the improvement of the MOSFET performance. However, a significant negative shift of the threshold voltage of MOSFET is frequently observed after NO-POA, which can be a critical issue for the industrial application. Therefore, it is important to understand the SiO2/4H-SiC interface after nitridation from various perspectives. Here, we experimentally demonstrated that the shift of the flat-band voltage is directly related to the change of the SiO2/4H-SiC band alignment. We estimated the flat-band voltage without a fixed charge effect and observed the negative shift of flat-band voltage on (0001) & (11-20) 4H-SiC. Moreover, we observed the shift of the band alignment of various samples by F-N tunneling current measurement and XPS analyses. There was a relationship between the conduction band offset and NO-POA duration for both crystal orientations and we suggested a model with dipole layer formation as an origin. On (0001) & (11-20) 4H-SiC, due to the increase of the conduction band offset, flat-band voltage showed a negative shift but the leakage current level also decreased, which can be an advantage for the reliability property. These findings show new opportunities to modulate the band alignment between SiC and SiO2 just by substituting a foreign element for the atoms at the interface.
Ferroelectric HfO2 Capacitors for Varactor Application in GHz
Authors: Lin Yu Wei , Mizutani Kazuto , Hoshii Takuya , Wakabayashi Hitoshi , Tsutsui Kazuo , Tsao Yi-Fan , Huang Ting-Jui , Hsu Heng-Tung , Kakushima Kuniyuki
Published: September 2020

The capacitance extraction of ferroelectric HfO2 capacitors was characterized at a frequency of 1GHz. By applying a bias voltage in the non-switching region of the ferroelectric HfO2 films, a varactor operation was confirmed.
(Invited) Manipulating Carrier Polarization in Semiconductor Nanocrystals
Authors: Zhang Chenwei , Yin Penghui , Radovanovic Pavle V
Published: September 2020

We investigated the role of the synthesis method and post-synthesis processing on the plasmonic properties of antimony-doped SnO2 nanocrystals. The nanocrystal samples having variable doping concentrations were prepared by coprecipitation and solvothermal methods, and subsequently thermally annealed for different durations. We found that solvothermally-synthesized Sb-doped SnO2 nanocrystals exhibit strong localized surface plasmon resonance in the near-infrared region, which is distinctly absent in the nanocrystals synthesized by the coprecipitation method. Upon thermal annealing, the plasmon absorption emerges in the nanocrystals prepared by the coprecipitation method, and increases in intensity in solvothermally-synthesized nanocrystals. Using X-ray photoelectron spectroscopy, we correlated the plasmon intensity to the oxidation of Sb3+ to Sb5+. These results demonstrate that synthesis methodology and post-synthesis treatment can dramatically influence the plasmonic properties of aliovalently-doped semiconductor nanocrystals via dopant oxidation state, and can be effectively used to design semiconductor nanocrystals with targeted plasmonic properties.
Perovskite Oxides Tunable by Electromechanical and Electrothermal Couplings
Authors: Gopalakrishnan Pratheek , Sebastian Ann Rose , Ahn Ethan C
Published: September 2020

Perovskite oxide thin films is an attractive material group due to their unique multi-functionalities. To broaden the impact of perovskite oxides to practical electronic device applications, their electrical properties will need to be tunable by external means. In this work, we show that electrical conductivity of perovskite STO (SrTiO3) thin films can be largely tuned by mechanical stress (electromechanical coupling) and thermal annealing (electrothermal coupling). The conductive atomic force microscope setup was carefully calibrated to enable precise measurements of electrical response upon application of varying forces, resulting in a high electromechanical coupling sensitivity of up to ~1,000 Sm-1MPa-1. The thermal annealing study also suggests that electrical conductivity of STO is strongly affected by the ambient temperature due to the varying amount of oxygen vacancies.
Copper Oxide Passivation Effect on Electromigration Lifetime of Plasma Etched Copper Lines
Authors: Su Jia Quan , Kuo Yue
Published: September 2020

The degradation of the copper oxide passivated copper line prepared from a room temperature plasma-based etch process under the electromigration condition has been studied. The copper line surface was oxidized into the copper oxide layer in a parallel-plate plasma reactor operated under the plasma etching or reactive ion etching mode. The surface roughness of the oxide is contributed by the high ion bombardment energy. The lifetime of the sample was shortened by the addition of the oxide passivation layer. It was also decreased with the increase of the stress current density. The sample with the thin bulk copper layer is more resistant to the thermal stress than that with the thick bulk copper layer, which delayed the voids formation in the line breakage process.
Evaluation of Silicon Nitride Film Formed by Atomic Layer Deposition on the Silicon Substrate with Trench Structure Using Angle-Resolved Hard X-ray Photoelectron Spectroscopy
Authors: Nishihara Tapei , Yokogawa Ryo , Otsuki Yuji , Kagaya Munehito , Ogura Atsushi
Published: September 2020

We evaluated the silicon nitride (SiN) films fabricated by plasma enhanced atomic layer deposition (PEALD) on the trench Si substrate. The transmission electron microscopy (TEM) observation showed that the SiN film was conformally deposited along the trench. However, from the angle-resolved hard X-ray photoelectron spectroscopy (HAXPES) measurements, the chemical bonding states in the SiN film on the trench sidewall from top to the bottom were different. On the sidewall of the trench, we found that N deficiency was generated in the SiN film, resulting in the non-stoichiometric SiN film formation. The precursor energy might not be sufficient and deactivated in the deep trench. The stoichiometric SiN film was deposited on the sidewall of the deep trench by increasing the deposition temperature.
Effect of Microgroove Structures on the Fluid Dynamics and Film Conformality in Spatial Atomic Layer Deposition of Al2O3
Authors: Li Zoushuang , Li Xiaobo , Cao Kun , Chen Rong
Published: September 2020

A two-dimensional (2D) model coupling computational fluid dynamics (CFD) with chemical kinetics is built to investigate the hydrodynamics and film growth characteristics for Al2O3 deposited from trimethylaluminum (TMA) and water in a spatial ALD system with flat and microgroove substrates. Results show that a vortex flow appears at both sides of the microstructure corners. The vortices hinder the gas flow in the micro-gap, leading to weaker convective mass transfer of precursors to the microstructure corners. Compared to the front corner of the step towards the precursor injector, less precursor concentration is detected at the back corner of the step. The deposition rate at the back corner is always the lowest due to the lowest precursor concentration. A relative lower speed of the substrate can ensure the saturated adsorption of precursors on the substrates, thus improving the conformality of the film deposited on the microstructures.
Electrical Characteristics of Atomic Layer Deposited Y-Silicate Dielectrics
Authors: Ohta Atsuhiro , Song Jinhan , Hoshii Takuya , Wakabayashi Hitoshi , Tsutsui Kazuo , Kakushima Kuniyuki
Published: September 2020

Cyclic deposition of Y2O3/SiO2 stacked layer by atomic layer deposition (ALD) to form a Y-silicate layer has been examined. The formation of Y-O-Si bonding with a target composition of Y2Si2O7 has been confirmed after the deposition. Thanks to its high thermal stability, a low interface state density (Dit) of 2.3×1010 cm-2/eV for Y-silicate/Si capacitor has been achieved. Metal-insulator-metal (MIM) capacitor has revealed a breakdown field of 6.6 MV/cm without annealing. A dielectric constant (k-value) of 8.5 was obtained from capacitance measurement.
The Degradation of Characteristics in DRAM by ILD HDP Process Condition
Authors: KIM JI Hoon , Choi Byoung Deog
Published: September 2020

Due to the shrink following the innovative development of DRAM devices, products below 20nm are currently being developed. Reduction of capacitor leakage current and NBTI characteristic are important interests in development process. However, the deterioration of characteristics according to subsequent processes is confirmed without any cell structure or material changes. We studied the characteristics of DRAM devices according to the hydrogen concentration spreading from HDP CVD used as ILD. Due to hydrogen concentration Increased capacitor leakage current and deterioration of NBTI characteristics were identified. Through this result, we can propose HDP CVD oxide process conditions in product development considering each characteristic.
Influence of Vertical and Radial Distances of Nano-Resistors in SSI-LEDs on Light Intensity Distributions
Authors: Shukla Abhinav , Kuo Yue
Published: September 2020

Two- and three-dimensional light intensity distributions from nano-resistor based solid-state incandescent light emitting devices, made of MOS capacitors with a high-k gate dielectric deposited on the p-type Si substrate, has been simulated using physics-based analytical calculations. The inter-nano-resistor distance affected the resolvability of individual nano-resistor light sources. Formation of clusters of nano-resistors and the presence of few large-sized nano-resistors resulted in bright radiation spots observed at higher magnifications. Light from individual nano-resistors could not be resolved at lower magnifications. The device’s center region was brightest, with light intensity diminishing uniformly in the radially outwards direction.
Impact of an Amino-Alcohol Organic Molecule on SiO2 and Si Bonding Energy
Authors: Fournel Frank , Calvez Aziliz , Larrey Vincent , Eleouet Gaëlle , Morales Christophe , Rieutord François
Published: September 2020

Adherence is one of the main interested parameter characteristic of direct bonding. For silicon oxide and silicon bonding, different technics are known to increase the direct bonding energy after a low post bonding annealing. Plasma activation and mechanical polishing for instance can increase the adherence above 3 J/m² keeping a post bonding annealing temperature below 300°C. A new technic will be presented in this study. Indeed adding a specific organic molecule on the surfaces just before the bonding allow obtaining the same result.
Hetero-Integration of β-Ga2O3 and Diamond Substrates by Hydrophilic Bonding Technique
Authors: Matsumae Takashi , Kurashima Yuichi , Takagi Hideki , Umezawa Hitoshi , Tanaka Koji , Ito Toshimitsu , Watanabe Hideyuki , Higurashi Eiji
Published: September 2020

A β-Ga2O3 film was directly bonded on a diamond substrate at 250ºC under atmospheric conditions. Before bonding, the β-Ga2O3 surface was activated by oxygen plasma irradiation, while the diamond surface was cleaned with H2SO4/H2O2 and NH3/H2O2 mixtures. The β-Ga2O3anddiamond surfaces adhered to one another under atmospheric conditions. By annealing the contacted specimen at 250ºC, they formed atomic bonds without voids, cracks, or severe crystallinity damages. It is believed that the direct bonding of β-Ga2O3 and diamond can facilitate the ultra-wide bandgap power electronics.
(Invited) Parylene C Based Adhesive Bonding on 6” and 8” Wafer Level for the Realization of Highly Reliable and Fully Biocompatible Microsystems
Authors: Selbmann Franz , Baum Mario , Meinecke Christoph , Wiemer Maik , Otto Thomas , Joseph Yvonne
Published: September 2020

The ongoing miniaturization and implementation of new functionalities into micro-electro-mechanical systems (MEMS) demand the development and application of new wafer bonding and encapsulation technologies with a high performance. Requirements are low process temperatures, high mechanical strengths of the bonded interface, as well as the applicability on large wafer sizes. Within the presented study, the polymer Parylene C was used as an adhesive for the bonding of 6” and 8” wafers. Doing so, the material combinations of the wafers, the Parylene thicknesses and geometries as well as the bonding parameters were varied. The properties of the wafer compounds were characterized with various methods, including mechanical tests, infrared imaging, cross-sections, hermeticity tests and the investigation of the thermal reliability. Using the Parylene C bonding process, tensile strengths of up to 35 MPa, and shear strengths of up to 80 MPa were realized. The determined helium leakage rate was lower than 1 ∙ 10-7 mbar ∙ l/s and the thermal reliability was verified to be excellent.
Adhesive Wafer Bonding Using Ultra-Thin Spray-Coated BCB Layers
Authors: Rimböck Johanna , Gasiorowski Jacek , Pires Mariana , Zenger Tobias , Burggraf Jürgen , Dragoi Viorel
Published: September 2020

Permanent adhesive wafer bonding is a mature technology as it provides the advantages of a low thermal budget process and is less sensitive to the quality of the bonding surfaces. One of the most used materials for this process is Benzocyclobutene (BCB). Due to its usage the material was further developed for bonding applications. In this work we report the fabrication of ultrathin BCB bonding layers (down to 25 nm thickness) by means of spray coating. The advantages of such bonding layers are both technical (e.g. no substrates shift due to adhesive layer flow during bond process) or and economical (significantly lower material consumption compared to spin coating). The fabrication and characterization of such bonding layers is presented and bonding results are presented.
Ion Species Dependence on the Interfacial Properties of Silicon Homojunctions Bonded Using an Ion Bombardment Treatment
Authors: Liao Michael Evan , Huynh Kenny , Bai Tingyu , Flötgen Christoph , Goorsky Mark S.
Published: September 2020

Direct wafer bonded p-type (001) silicon homojunction structures were prepared with an ion bombardment surface treatment using either Ar or Kr ions prior to bonding in a high-vacuum direct wafer bonding system. The ion energies used spanned from a factor of 0.5 to 5 times of a baseline energy E0 for Ar and 0.5 to 2.5 times for Kr. The ion bombardment surface treatment induces a thin ~nm amorphous region at the Si|Si bonded interface. X-ray reflectivity measurements were performed on ion-bombarded single unbonded wafers. It was found that the Ar treated wafers showed a weak surface mass density dependence with ion energy, while wafers treated with Kr showed a strong ion energy dependence. While the Ar treatment reduces the surface density to ~80% of bulk Si density, the Kr treatment reduces the surface density to as low as ~70% of bulk Si density using an ion energy of 2.5⋅E0. Current-voltage measurements were also used to probe the electrical resistance across the amorphous interfacial region of the bonded structures prepared with Ar ions.
The Role of Wafer Edge in Wafer Bonding Technologies
Authors: Knechtel Roy , Schwarz Uwe , Dempwolf Sophia , Nevin Andy , Klingner Holger , Lindemann Gunnar , Schikowski Marc
Published: September 2020

Wafer bonding is an important process step in microsystem technologies for processing engineered substrates and for capping. Usually the work and literature are focused on the bonding of the main wafer area. However, in recent years MEMS technologies have become more complex, with more process steps after wafer bonding. Accordingly, the wafer edge is becoming more and more important, and must be engineered. Methods for realizing this are discussed in this paper.
III-V Thin-Film Solar Cells Bonded to Si Substrates via Metal Grids
Authors: Hishida Takashi , Liang Jianbo , Shigekawa Naoteru
Published: September 2020

Using surface-activated bonding technologies, we bond InGaP/GaAs double-junction (2J) solar-cell structures invertedly-grown on GaAs substrates to metal grids formed on conductive Si substrates. The metal grids are made of 170-nm SiO2 layers and 310-nm Ti/Au metal layers. 2J cells are fabricated by eliminating the GaAs substrates and forming emitter and base contacts. The emitter contacts are aligned to the metal grids. The fabricated 2J cells reveal a lower series resistance in comparison with cells directly bonded to Si substrates, which is likely to be due to a lower resistance across GaAs//metal grid junctions than that across GaAs//Si junctions. A higher open-circuit voltage and a larger internal quantum efficiency are also observed for the 2J cells on metal grids. These features as well as the oscillation in reflectance spectrum suggest that the 2J cells work as optically-isolated thin-film cells.
Nanostructural Investigation on GaAs//Indium Tin Oxide/Si Junctions for III-V-on-Si Hybrid Multijunction Cells
Authors: Hara Tomoya , Liang Jianbo , Araki Kenji , Kamioka Takefumi , Sodabanlu Hassanet , Watanabe Kentaroh , Sugiyama Masakazu , Shigekawa Naoteru
Published: September 2020

We investigate nanostructural properties of GaAs//indium tin oxide (ITO)/Si junctions fabricated by surface-activated bonding with emphasis on impacts of thermal process. Both of the Ga 2p3/2 and As 2p3/2 core-level spectra obtained by hard X-ray photoemission spectroscopy show that the GaAs layers are oxidized by annealing at 400℃. This finding is consistent with the formation of amorphous-like layers at 400℃ annealed GaAs//ITO interfaces. Concentration depth profiles of O, Ga, and As suggest that the oxidation markedly occurs at GaAs//ITO interfaces annealed at temperatures higher than 200℃, which is consistent with the dependence of resistance in GaAs//ITO/Si junctions on annealing temperature. These results suggest that annealing brings about the reaction between GaAs and ITO layers and causes the degradation of the electrical properties of GaAs//ITO interfaces. Low-temperature process technologies are essential so as to make a full use of ITO as intermediate layers in III-V-on-Si multijunction cells.
Silicon Direct Bonding for the European Space Agency's Next X-ray Observatory
Authors: Günther Ramses , Collon Max , Vacanti Giuseppe , Barrière Nicolas , Landgraf Boris , Vervest Mark , Okma Ben , Voruz Luc , Keek Laurens , Babic Ljubisa , Bayerle Alex , Thete Aniket , Girou David , Hauser Enrico , Serrano Gregorio Mendoza , Eenkhoorn Noë , van der Hoeven Roy , Chatbi Abdel , Verhoeckx Sjoerd , Visser Roel , Maks Denise , da Silva Ribeiro Paulo , Bavdaz Marcos , Wille Eric , Ferreira Ivo
Published: September 2020

Silicon direct bonding is a manufacturing process used in the fabrication of electronic, optical and mechanical microsystems. Chemical bonds are providing an intimate surface contact and strong structural stiffness that is, for this reason, also suitable for large assemblies. Based on the knowledge of the surface properties and of X-ray optics, we are making mirror imaging systems. The manufacturing process resorts to the highest-grade 12 inch silicon wafers with double-sided super polished and nearly perfect plan parallel surfaces. With readily available semiconductor manufacturing and lithographic tools, the wafers are processed into mirror plates with micrometer accuracy channel structures, yet maintaining the nanometer accurate figure of the silicon wafer. Multiple channeled X-ray mirrors shall subsequently be curved and stacked to form an optical component. We want to use such optical components for a ~3 m diameter segmented optical system that would be part of the Athena observatory.
(Invited) Hybrid Wafer Bonding – The Fusion of Low Temperature Dielectric and Metal Bonding Technologies
Authors: Farrens Sharon Nannette
Published: September 2020

There have typically been two pinnacle goals in wafer bonding. The first and ongoing goal is to use wafer bonding methods to engineer starting materials; to integrate silicon with any other material to enable hetero-device architectures. The second aspiration is to continually shrink device footprints by bonding layer upon layer of devices vertically. Low temperature wafer bonding combined with advances in CMP (chemical mechanical polishing), temporary bonding, and advanced metrology characterization tools are enabling researchers to achieve these dreams come true. In particular, hybrid bonding, which enables simultaneous bonding of dielectric and metallic regions at the bond interface has produced extremely high performance devices and miniaturization of display technologies. This talk will highlight the various requirements for hybrid bonding and critical specifications for implementing complex bonding methods.
Epitaxial Growth of Active Si on Top of SiGe Etch Stop Layer in View of 3D Device Integration
Authors: Loo Roger , Jourdain Anne , Rengo Gianluca , Porret Clement , Hikavyy Andriy Yakovitch , Liebens Maarten , Becker Lucas , Storck Peter , Beyer Gerald , Beyne Eric
Published: September 2020

We describe challenges of the epitaxial Si-cap / Si0.75Ge0.25 // Si-substrate growth process, in view of its application in 3D device integration schemes using Si0.75Ge0.25 as backside etch stop layer with a focus on high throughput epi processing without compromising material quality. While fully strained Si0.75Ge0.25 with a thickness >10 times larger than the theoretical thickness for layer relaxation can be grown, it is challenging to completely avoid misfit dislocations at the wafer edge during Si-capping, even for thinner Si0.75Ge0.25 layers. Extremely sensitive characterization methods are mandatory to detect the extremely low density of misfit dislocations at the wafer edge. Light scattering measurements are most reliable. The epitaxial Si-cap / Si0.75Ge0.25 // Si-substrate layer stacks are stable against post-epi thermal processing steps, typically applied before wafer to wafer bonding and Si-substrate and Si0.75Ge0.25 backside removal.
Fabrication of 3-Layer Stacked Pixel for Pixel-Parallel CMOS Image Sensors by Au/SiO2 Hybrid Bonding of SOI Wafers
Authors: Goto Masahide , Nakatani Naoki , Honda Yuki , Watabe Toshihisa , Nanba Masakazu , Iguchi Yoshinori , Saraya Takuya , Kobayashi Masaharu , Higurashi Eiji , Toshiyoshi Hiroshi , Hiramoto Toshiro
Published: September 2020

We report 3-layer stacked image sensor pixel designed for pixel-parallel complementary metal-oxide-semiconductor (CMOS) image sensors. Direct bonding of silicon-on-insulator (SOI) wafers with Au electrodes embedded in a SiO2 surface achieves high-density pixel-wise interconnection. By applying the bonding, backside electrode forming, and handle layer removing processes, we have obtained 3-layer stacked wafer without voids or separations. Measurement of prototype 3-layered pixel confirmed linear response of 16-bit digital signal output, demonstrating feasibility of multi-layer devices with functional diversification including circuits, sensors, and More-than-Moore type devices.
Ar/N2 Plasma Induced Metastable CuxNy for Cu-Cu Direct Bonding
Authors: Hu Liangxing , Goh Simon Chun Kiat , Tan Chuan Seng
Published: September 2020

Metal-metal bonding is a promising bonding technique in semiconductor processing. In this work, we report Ar/N2 plasma induced metastable CuxNy for Cu-Cu die-die direct bonding performed at room temperature in ambient environment. Surface characterizations (water contact angle, surface roughness, and XPS) are performed on the Cu surface both before and after plasma exposure. The results reveal that the Ar/N2 plasma induces a layer of CuxNy, and the surface of the Ar/N2 plasma activated Cu remains in an “activated” state, as shown by low contact angle, for up to 6 hours compared to that of the non-activated Cu. Subsequently, the plasma activated dies are bonded. The bonded interface is characterized by C-SAM and SEM, the bonding quality is assessed for mechanical bonding strength, hermeticity, and electrical conduction. The results support successful bonding with the desired properties. This reported bonding technology can be applied for high-throughput 3D integration and CMOS-MEMS packaging.
Layer Configurations for Al-Ge Eutectic Wafer Bonding
Authors: Visker Jakob , Peng Lan , Kang Shuo , Vereecke Bart , Haspeslagh Luc
Published: September 2020

Different layer configurations for Al-Ge eutectic bonding are investigated using SAM and X-SEM. These configurations are single layer Al and Ge, double layer layer Al on top of Ge, or double layer Ge on top of Al. The Ge on top of Al configuration leads to the best SAM results. The effect of native oxide presence on top or between the layers is investigated using X-SEM. The results indicate the presence of one or more interfaces for every layer configuration. The native oxide could prevent the eutectic from mixing across the bonding interface. In this regard, Al oxide seems the most problematic.
(Invited) Heterogeneous Integration and Co-design of Memristor and MOSFET for AI Application
Authors: Xi Yue , Gao Bin
Published: September 2020

Recent advances in AI bring great challenges on the computing hardware. Memristor based neuromorphic computing can improve the computing density and energy efficiency significantly. However, how to integrate memristive materials and design mixed circuit with advanced CMOS platform is a key challenge. In this presentation, I will talk about our recent progress on heterogeneous integration of memristor and MOSFET. Million-level one-transistor-one-resistor (1T1R) cells can be integrated on a chip. Then I will discuss the co-design technology for memristor/MOSFET mixed circuits. A general purpose neuromorphic computing chip was designed and fabricated to process deep neural networks. I will also introduce our new hybrid training method for eliminating the accuracy loss caused by device variations.
(Plenary) The Revival of Compound Semiconductors and How They Will Change the World in a 5G/6G Era
Authors: Collaert Nadine , Alian AliReza , Banerjee Aritra , Chauhan Vikas , ElKashlan Rana Y. , Hsu Brent , Ingels Mark , Khaled Ahmad , Kodandarama Komal Vondkar , Kunert Bernardette , Mols Yves , Peralagu Uthayasankaran , Putcha Vamsi , Rodriguez Raul , Sibaja-Hernandez Arturo , Simoen Eddy , Vais Abhitosh , Walke Amey , Witters Liesbeth , Yadav Sachin , Yu Hao , Zhao Ming , Wambacq Piet , Parvais Bertrand , Waldron Niamh
Published: September 2020

The world is more than ever relying on connectivity in our daily life as well as our professional life. With 5G being rolled out, the industry is looking already at the next generation of mobile communication to bring even higher speeds and more connections than previous generations. But with 5G we are at an inflection point where it is not only about higher data rates and more connections, but about connecting different kind of devices and the new ways humans and machines interact with each other. The higher frequencies, low latency and reliability requirements will put a lot of strain on the technologies to enable this. While CMOS is the preferred vehicle, to fulfill these demands compound semiconductors like GaN and InP might be the better options for particular functions of the radio architecture. This paper will address the progress toward upscaling these materials to a Si platform and to make them CMOS and 3D compatible to enable the final heterogeneous systems that will be needed for 5G and beyond.
Contact Resistivity of Highly Doped Si:P, Si:As, and Si:P:As Epi Layers for Source/Drain Epitaxy
Authors: Rosseel Erik , Porret Clement , Hikavyy Andriy Yakovitch , Loo Roger , Tirrito Matteo , Douhard Bastien , Richard Olivier , Horiguchi Naoto , Khazaka Rami
Published: September 2020

In this work we report on the contact resistivity of highly doped epitaxial Si:P, Si:As and Si:P:As layers grown on 300 mm Si (100) substrates. The contact resistivity was extracted using a Multi-Ring Circular Transmission Line Model for a Ti based contacting scheme. Both selective and non-selective epitaxy processes were used and the effect of a post-epitaxy millisecond laser anneal was studied. Excellent contact resistivities down to ~2E-9 Ohm.cm2 could be found at high doping levels. A clear correlation was observed between the resistivity/contact resistivity and activation levels obtained by micro-Hall measurements. Although As doping is not bringing substantially lower contact resistivities compared to P doping, we observe a small beneficial effect. As also remains an attractive dopant for extension liners because of its lower diffusion constant.
Investigation of Low Temperature Epitaxial SiGe:P in View of Source/Drain Application for 5nm Technology Node and Below
Authors: Hikavyy Andriy Yakovitch , Porret Clement , Vohra Anurag , Ayyad Mustafa , Douhard Bastien , Loo Roger
Published: September 2020

Properties of SiGe:P deposited with high order Si and Ge precursors at low temperature of 400oC, suitable for 5 nm and below technological nodes have been studied. An optimal PH3 flow leading to a maximal active P concentration was demonstrated for each studied Ge concentration (40-75%). The highest active P concentration of ~1 1020 cm-3 was obtained for SiGe:P layers with Ge content of 40% and below. Increase of Ge concentration above 40% caused gradual reduction of the maximal active P concentration down to the values reported for Ge:P deposited with digermane at temperatures close to investigated here. Higher than optimum PH3 flows lead to a significant reduction of active P concentration despite very high total P concentrations (up to ~1 1021 cm-3). Thermal annealing does not change properties of SiGe:P layers with low or optimal P concentrations. P activation of the layers deposited with the higher than optimum PH3 flows improves upon annealing, nevertheless it is never better than the maximum value obtained with the optimal flows. Such samples also showed a strong P accumulation at SiGe:P layer interfaces in the case of laser annealing and additional P and Ge diffusion after spike anneal. Finally, an optimized selective SiGe:P process was developed and demonstrated for the case of Ge fin FET devices.
(Plenary) Creating the Interface between the Universe and Data with Integrated Photonic Sensors
Authors: Miller Benjamin L.
Published: September 2020

Integrated photonics is a particularly attractive option for building broadly useful sensor platforms. Here, the light source, sensing mechanism, and detection system are all in the same plane. As such, these sensors are small and simple enough that they could be incorporated into a cell phone. For the past five years, we have worked in partnership with the American Institute for Manufacturing Integrated Photonics (AIM Photonics) to establish designs and manufacturing strategies for photonic chemical and biological sensors. AIM is a public-private partnership established to develop U.S. manufacturing capability in photonics.
(Invited) How Far Can We Push Conventional Silicon Technology and What are the Future Alternatives?
Authors: Saraswat Krishna C.
Published: September 2020

Silicon has dominated the microelectronics industry in the past. However, future Si technology is reaching practical and fundamental limits. To go beyond these limits novel devices and material like Ge, III-Vs, and carbon nanotubes (CNT) are being aggressively studied to continue progress in integrated electronics. Recently 2-dimensional (2D) transition metal dichalcogenide (TMD) materials have emerged as potential candidates for nanoscale devices. Heterogeneous integration of devices in these materials on a Si platform will allow continuity of Moore’s Law. The scaling paradigm is also threatened by interconnect limits. Many of these obstacles stem from the physical limitation of Cu-based electrical wires. Three-dimensional (3-D) integration will reduce average wire length and hence reduce power dissipation, signal latency, and increase bandwidth.
Growth and Characterizations of GeSn Films with High Sn Composition by Chemical Vapor Deposition (CVD) Using Ge2H6 and SnCl4 for Mid-IR Applications
Authors: Zhang Lin , Chen Qimiao , Wu Shaoteng , Son BongKwon , Lee Kwang Hong , Chong Gang Yih , Tan Chuan Seng
Published: September 2020

The epitaxial growth of GeSn alloys with Sn content varying from 4 to 11% using digermanium (Ge2H6) and tin chloride (SnCl4) as precursors in a modified Chemical Vapor Deposition (CVD) system under reduced pressure condition is reported. Characterization results consisting of atomic force microscope (AFM), secondary ion mass spectrometry (SIMS), X-ray diffraction (XRD), etching pits density (EPD) measurements, raman analysis, ellipsometry analysis and high-resolution transmission electron microscopy (HRTEM) are presented to examine the quality of the epitaxial GeSn films. High quality GeSn film with Sn content as high as 11% has been achieved and can be further optimized for various MIR applications.
(Invited) Integration of an Epitaxial-Base-Link HBT Device with fT = 300GHz, fmax 480GHz in 90nm CMOS
Authors: Manger Dirk , Boeck Josef , Aufinger Klaus , Boguth Sabine , Gruenberger Robert , Popp Thomas , Binder Boris , Hengst Claudia , Majied Soran , Markert Matthias , Pribil Andreas , Rothenhaeusser Steffen , Tschumakow Dmitri Alex , Dahl Claus , Bever Thomas
Published: September 2020

In this contribution we report the successful integration of a SiGe HBT module with fT = 300GHz, fmax = 480GHz in a 90nm BiCMOS technology platform. Building on previous studies by IHP and Infineon the Epitaxial-Base-Link process flow was further adapted for compatibility to the 90nm CMOS base technology.
High Performance SiGe HBT Performance Variability Learning by Utilizing Neural Networks and Technology Computer Aided Design
Authors: Aldridge Henry Lee , Johnson Jeffrey B , Krishnasamy Rajendran , Jain Vibhor , Mishra Rahul , Dongmo Pernell , Raghunathan Uppili , Pekarik John J
Published: September 2020

Improvements in uniformity of electrical device performance is often not taken into major consideration until a certain maturity level of a technology is reached. In this work, use of technology computer aided design (TCAD) and process compact models (PCM) developed from neural networks demonstrate their utility in process-parameter variation understanding in earlier stages of technology development. A third generation High Performance Silicon Germanium Heterojunction Bipolar Transistor (SiGe HBT) was modelled and simulated as the device of focus in this study.
(Invited) Epitaxial Growth of Ge/III-V Films and Hetero-Layer Lift-off for Ultra-Thin GeOI Fabrication
Authors: Maeda Tatsuro , Irisawa Toshifumi , Ishii Hiroyuki , Chang Wen Hsin
Published: September 2020

Ge have been considered as an alternative channel material to Si as well as a promising base material for optical components, adding new functions into current Si-LSI. It is necessary to form high quality Ge layers onto Si substrate for realization of Si/Ge monolithic 3D (M3D) devices. Combing high quality hetero-epitaxial growth of Ge/III-V semiconductors, low-temperature bonding, and an advanced lift-off technique, we have achieved Ge layer transfer on Si substrate, possessing excellent Ge crystallinity and electrical properties. The advanced HEtero-Layer-Lift-Off (HELLO) technique utilizing SiGe-based hetero-epitaxy and dozens digital etching (DDE) processes are demonstrated to realize high quality and ultra-thin Ge-on-insulator (GeOI) structures for ultimately scaled CMOS devices on Si platform.
Reactive Force-Field Molecular Dynamics Study of SiGe Thin Film Growth in Plasma Enhanced Chemical Vapor Deposition Processes
Authors: Uene Naoya , Mabuchi Takuya , Zaitsu Masaru , Yasuhara Shigeo , Tokumasu Takashi
Published: September 2020

The SiGe thin films, such as hydrogenated amorphous SiGe (a-SiGe:H) and hydrogenated microcrystalline SiGe (μc-SiGe:H), are known as a potential material. In order to form promising SiGe thin films using chemical vapor deposition, relationship between materials/process and structure/composition should be clarified at the atomic level. We analyzed the influence of the substrate temperature and the ratio of SiH3 and GeH3, which are considered to be the dominant gaseous species on the deposition, on the crystallinity and atomic content in SiGe thin films by reactive force-field molecular dynamics simulations. The crystallinity increases as the substrate temperature increases and reaches its minimum value when the ratio of SiH3 and GeH3 is approximately 0.5. The hydrogen content decreased as the substrate temperature increases, while silicon and germanium content tended to increase as substrate temperature increase. These results were in good agreement with relevant studies.
Epitaxy of Pseudomorphic GeSn Layers with Germane (GeH4) or Digermane (Ge2H6) as Ge Precursors and Tin Tetrachloride (SnCl4) as the Sn Precursor
Authors: Hartmann Jean-Michel , Frauenrath Marvin , Richy Jérôme
Published: September 2020

We have benchmarked germane and digermane for the growth of pseudomorphic GeSn layers on Ge Strain-relaxed Buffers, themselves on Si(001) substrates. For a fixed GeH4 partial pressure (1.28 Torr), the GeSn Growth Rate (GR) increased linearly with the SnCl4 flow at 349°C. That increase was sub-linear at 325°C. The Sn content was almost steady with the SnCl4 flow at 349°C. Meanwhile, it increased then decreased at 325°C. We otherwise had exponential increases, over the 301°C - 349°C range, of the GeSn GR with the temperature, with similar activation energies around 10 kcal mol.-1 for both chemistries. In contrast, the Sn content linearly decreased as the temperature increased, with a slope which was less for GeH4 than for Ge2H6 (- 1.0% / 10°C instead of - 1.7% / 10°C). Although the GeH4 flow was 4 times the Ge2H6 one and the chamber pressure 4 times higher (400 Torr versus 100 Torr), GeSn GR were almost the same for a given SnCl4 flow. Sn contents were by contrast significantly lower with GeH4 than with Ge2H6. Halving, for the same GeH4 flow, the SnCl4 flow resulted in GeSn GR 40% lower but slighly higher Sn contents, which was once again counterintuitive. GeSn layers were flat and of high crystalline quality with both chemistries. Finally, while the GeSn GR and Sn contents were rather uniform over the 200mm wafer surface with Ge2H6+SnCl4, the situation was definitely worse with GeH4+SnCl4. GR were then significantly higher at the wafer edges than close to the center.
(Invited) Strain Engineering of Si/Ge Heterostructures on Ge-on-Si Platform
Authors: Sawano Kentarou , Youya Wagatsuma , Alam Md. M , Omata Kaisei , Niikura Kenta , Shibata Shougo , Hoshi Yusuke , Yamada Michihiro , Hamaya Kohei
Published: September 2020

Strain engineering of Si/Ge heterostructures with high Ge contents is allowed on the Ge-on-Si platform since a high quality Ge-on-Si has been available owing to the two-step growth method. Detailed studies on initial stages of the partial strain relaxation of strained SiGe layers on Ge-on-Si and bulk-Ge substrates clearly indicate that the strained SiGe grown on the Ge-on-Si reveals lower critical thickness than that on the Ge substrate. On the contrary, it is shown that this reduced critical thickness on the Ge-on-Si can be significantly enhanced beyond that on the Ge substrate by means of the substrate patterning. Additionally, our recent studies including strained Ge-on-Insulator fabrication and its surface passivation toward high-efficient light emitting devices are overviewed.
Evaluation of Strain-Shift Coefficients for SiSn by Raman Spectroscopy
Authors: Yokogawa Ryo , Kurosawa Masashi , Ogura Atsushi
Published: September 2020

We report on the strain-shift coefficient of silicon tin (SiSn) alloys obtained by ultraviolet (UV) Raman spectroscopy. The values of the Raman peak shift of the Si-Si mode for the SiSn (Sn fraction: 0.5, 0.9, 1.8, 2.2, and 6.0%) thin films were found to increase with Sn fraction and it indicates that compressive strain is induced in the SiSn films. The strain-shift coefficient of the Si-Si mode obtained from linear fits to the measurement data (UV Raman spectroscopy and X-ray diffraction reciprocal space mapping) has a good agreement with the values of the strain-shift coefficients about strained Si and strained silicon germanium, and commercial high-purity Si reported by previous studies. The strain-shift coefficient determined by in this work contribute to realize strain measurements for the next-generation SiSn devices such as near-infrared optical and thermoelectric devices.
(Invited) Directly Silicon Nitride Waveguide Coupled Ge Photodiode for Non-SOI PIC and Epic Platforms
Authors: Lischke Stefan , Knoll Dieter , Mai Christian , Voigt Karsten , Hesse Anne , Georgieva Galina , Peczek Anna , Zimmermann Lars
Published: September 2020

A Ge photodiode, directly coupled to a silicon nitride waveguide, showing more than 67 GHz bandwidth is demonstrated. This paves the way for utterly new SiN waveguide platform based applications. By light feeding through SiN waveguides, the new photodiode can also be a key enabler for a bulk-Si based, monolithically integrated electronic-photonic integrated circuit platform. We show that the new devices, fabricated on bulk-Si, provide the same bandwidths as Si waveguide coupled SOI based reference Ge photodiodes. However, their O-band responsivity is 0.3 A/W, which is about three times lower compared to the SOI wave-guide coupled devices. We attribute this effect mainly to substrate leakage, being confirmed by simulations. We demonstrate that bulk-Si based diodes can be fabricated with high yield and low metrics tolerances.