bluuebunny/crossref_metadata_2025 huggingface dataset:
Design Space Exploration of High-Performance Parallel Architectures
Authors: Musoll Enric , Nemirovsky Mario
Published: December 2020

High-performance single-threaded processors achieve their performance goal partly by relying, among other architectural techniques, on speculation and large on-chip caches. The hardware to support these techniques is usually a large portion of the overall processor real state area, and therefore it consumes a significant amount of power that sometimes is not optimally used toward doing useful work. In this work, we study the intuitive fact that architectures with hardware support for threads are more power efficient than a more traditional single-threaded superscalar architecture. Toward this goal, we have created a model of the power, performance and area of several parallel architectures. This model shows that a parallel architecture can be designed so that (a) it requires less area and power (to reach the same performance), or (b) it achieves better power efficiency and less area (for the same power budget), or (c) it has higher performance and better power efficiency (for the same area constraint), when compared to a single-threaded superscalar architecture.
Parallelized Radix-4 Scalable Montgomery Multipliers
Authors: Pinckney Nathaniel , Harris David M.
Published: December 2020

This paper describes a parallelized radix-4 scalable Montgomery multiplier implementation. The design does not require hardware multipliers, and uses parallelized multiplication to shorten the critical path. By left-shifting the sources rather than right-shifting the result, the latency between processing elements is shortened from two cycles to nearly one. Multiplexers are used to select precomputed products. Carry-save adders propagate carry bits before words are discarded. The new design can perform 1024-bit modular exponentiation in 9.4 ms and 256-bit exponentiation in 0.38 ms using 4997 Virtex2 4-input lookup tables, while consuming 30% fewer LUTs than a previous parallelized radix-4 design. This is comparable to radix-2 for long multiplies and nearly twice as fast for short ones.
Table of Contents and Foreword
Authors: Martino João Antonio , Lubaszewski Marcelo
Published: December 2020

This issue of the Journal of Integrated Circuits and Systems (JICS) includes papers on analog design, design for yield, design for security and dynamically reconfigurable architectures. These papers have been selected from the presentations given at SBCCI2008 (21st Symposium on Integrated Circuits and Systems Design), which has been held in Gramado, Brazil in 2008. Among the contributions presented at SBCCI2008, only a few best rated by the reviewers were selected by the JICS Editorial Board and have been invited to submit an extended version. These papers have been submitted to the usual reviewing process with the help of external experts. We would like to thank the authors for their effort in preparing these high quality papers, as well as the reviewers for their help on paper selection, which guarantees the scientific level of this issue.We sincerely hope that JICS readers will enjoy these contributions.João Antonio Martino - JICS Editor-in-chief Marcelo Lubaszewski - JICS Co-Editor
Mobility Modeling in Advanced MOSFETs with Ultra-Thin Silicon Body under Stress
Authors: Sverdlov Viktor A. , Windbacher Thomas , Schanovsky Franz , Selberherr Siegfried
Published: December 2020

We use a two-band k·p model to describe the subband structure in strained silicon thin films. The model provides the dependence of the conductivity effective mass on strain and film thickness. The conductivity mass decreases along tensile stress in [110] direction applied to a (001) film. This conductivity mass decrease ensures the mobility enhancement in MOSFETs even with extremely thin silicon films. The two-band k·p model also describes the dependence of the non-parabolicity parameter on film thickness and strain. The influence of the subband structure modification on the mobility in advanced MOSFETs with strained ultra-thin silicon body is investigated. It is shown that an increase of subband non-parabolicity in thin films with strain reduces the mobility enhancement due to the conductivity mass modification, especially at higher strain values.
Waferlevel Vacuum Packaged Microscanners: A High Yield Fabrication Process for Mobile Applications
Authors: Oldsen Marten , Hofmann Ulrich , Janes Joachim , Quenzer Hans-Joachim , Wagner Bernd
Published: December 2020

Packaging of MEMS is an important expense factor within the production costs and, to ensure mass producibility, the packaging has to be performed on a waferlevel. While for inertial MEMS this is state of the art, it has not yet been reported for scanning micromirrors. Therefore, Fraunhofer ISIT has developed a process technology based on two 30 μm thick epitaxially deposited polysilicon layers for the manufacturing of waferlevel vacuum packaged MEMS scanning mirrors. It allows the fabrication of vertically stacked combdrives for out-of-plane mirror operation and a low damping environment for the reduction of needed driving signals. An anodically bonded structured glass wafer seals the devices at the front side, while an Au-Si eutectically bonded silicon wafer with an integrated 400 nm thick Ti getter layer is used to seal the devices from the backside. The measurement of the quality factor allows the estimation of the internal cavity pressure of sealed devices, which is in the range of 10-3 mbar.Waferlevel measurements showed that the fabrication process reaches a high mechanical yield of Ym = 95%. Vacuum packaged devices needed 6V driving voltage to reach a total optical scan angle of above 50°.
Preparation and Characterization of Electrodeposited Co/p-Si Schottky Diodes
Authors: Zandonay R. , Delatorre R. G. , Pasa A. A.
Published: December 2020

Schottky diodes were prepared by photoinduced electrodeposition of Co on p-Si, probing the influence of different concentrations of CoSO4 (26 and 104 mM) in the electrolyte on the electrical properties of the metal-semiconductor interface. Current density versus voltage (JxV) and capacitance versus voltage (CxV) measurements were performed in diodes with different Co thicknesses to obtain the barrier heights and ideality factors. Atomic force microscopy (AFM) and vibrating sample magnetometry (VSM) were additional techniques used to determine the surface morphology and the magnetic response. Devices with improved electrical properties were observed by increasing the thickness of the metal, i. e., saturation currents with values of about 0.1 mA.cm-2, ideality factors close to 1.19 and barrier heights of about 0.65 eV were determined.
Time-of-Flight Flow Microsensor using Free-Standing Microfilaments
Authors: Rodrigues Roberto Jacobe , Furlan Rogério
Published: December 2020

In this work we present the processing conditions and the characterization results of a time-of-flight (TOF) flow microsensor implemented using polysilicon microfilaments. Numerical simulation (ANSYS®/FLOTRAN®) and experimental results for analysis with air flow and nitrogen are compared considering different heater to sensor distances and flows. A good agreement was observed between experimental and simulated results. However, experimental TOF values resulted ever consistently higher than the simulated ones due to delays introduced by the circuitry and the data acquisition system and also in the thermal response of the microfilament. Analysis of the heater microfilament reveal that temperatures of the order of 100 °C (that is low enough to not affect the gas flow) can be obtained with a power dissipation of tens of mW. The time-of-flight measurements show that the proposed structure is suitable for the detection of low volumetric flows (tens of SCCM) and presents a response time of the order of milliseconds.
An Integrated Switch in a HV-SOI Wafer Technology, With a Novel Self-Protection Mechanism
Authors: Miguez Matías , Gak Joel , Arnaud Alfredo
Published: December 2020

An integrated switch to control electrical stimuli in implantable medical devices is presented. First a self-biased protection mechanism to avoid VGS reaching maximum rated value is presented. Then, using a HV-CMOS technology this technique is incorporated in a fully integrated switch, to control 0 to 16V, and 0 to 30 mA, pulses for implantable stimulators. Because of the low supply voltage VDD between 2 to 5V, and safety considerations in implantable devices, special level shifters, drivers, and a voltage multiplier, that drive a large 40000μm/3μm dual-in-series PMOS switch, were necessary for the circuit. The circuit was fabricated in a HV 0.6μm CMOS technology in SOI wafer for transistor isolation, and tested. Measurement results that closely fit the expected performance of the circuit are presented.
A Compact Low-Distortion Low-Power Instrumentation Amplifier
Authors: De Lima Jader A.
Published: December 2020

A CMOS instrumentation amplifier based on a simple topology that comprises a double-input Gm-stage and a low-distortion class-AB output stage is presented. Sub-threshold design techniques are applied to attain high figures of differential-gain and rejection parameters. Analyses of input-referred noise and CMRR are comprehensively carried out and their dependence on design parameters determined. The prototype was fabricated in standard n-well CMOS process. For 5V-rail-to-rail supply and bias current of 100nA, stand-by consumption is only 16μW. Low-frequency parameters are ADM=86dB, CMRR=89.3dB, PSRR+=87dB, PSRR-=74dB. For a 6.5pF-damping capacitor, ΦM=73º and GBW=47KHz. The amplifier exhibits a THD of –64.5dB @100Hz for a 1Vpp-output swing. Input-noise spectral density is 5.2μV/ Hz @1Hz and 1.9μV/ Hz @10Hz, which gives an equivalent input-noise of 37.6μV, over 1Hz-200Hz bandwidth. This circuit may be employed for low-frequency, low-distortion signal processing, advantageously replacing the conventional 3-opamp approach for instrumentation amplifiers.
PECVD Silicon Oxynitride as Insulator for MDMO-PPV Thin-Film Transistors
Authors: Cavallari Marco R. , Albertin Katia F. , Dos Santos Gerson , Ramos Carlos A. S. , Pereyra Inés , Fonseca Fernando J. , De Andrade Adnei M.
Published: December 2020

We demonstrate that PECVD SiOxNy with good dielectric properties can replace thermally grown SiO2 in Organic Thin-Film Transistors (OTFT) applications. It can be used on ITO-covered glass or even flexible substrates. Poly [2-methoxy-5-(3’,7’-dimethyloctyloxy)-1,4-phenylenevinylene] (MDMO-PPV) is used as the active layer, due to its wide range of applications such as bulk heterojunction solar cells, light-emitting diodes and light-emitting transistors.We show that charge carrier mobility can be at least two times higher for MDMO-PPV on silicon oxynitride than silicon dioxide, μh 1.1x10-4 cm2/Vs. MDMO-PPV spun from solvents such as chloroform and toluene provide comparable TFT performance on SiOxNy. Preliminary studies of devices with hexamethyldisilazane-treated SiO2 demonstrate that performance can be further improved by the choice of a proper surface treatment.
A Study of the Geometrical Correction Factor and the Membrane Thickness on the Sensitivity of the Transversal Piezoresistive Pressure Sensor
Authors: Coraucci G. O. , De Oliveira R. V. D. , Garcia V. , Fruett F.
Published: December 2020

The sensitivity of four-terminal devices like Hall and piezoresistive sensors is very dependent on its geometric parameters. This dependence is modeled by the Geometrical Correction Factor (G). The majority of these studies take very time-consumption analytical calculations for the analysis of G. In order to simplify this analysis, we present numerical analyses using FEM (Finite Element Method) for the most common geometrical forms of four-terminal devices. This result is general for any fourterminal-shaped sensors and can be used to optimize the sensor aspect ratio leading the maximization of G. In addition, FEM was also used to evaluate the membrane´s thickness influence over the sensor sensitivity by analyzing the in-plane mechanical stress behavior on the sensor active area. Experimental result of a new topology of pressure sensor is also presented, which maximizes G in comparison with conventional four-terminal devices and also improves its sensitivity. A special designed anisotropic wet etching system was used to post-process the sensor membrane. This anisotropic wet etching system allows the fabrication of well-defined membranes with thickness of 20 μm ± 3 μm and roughness as low as 90 nm rms.
Performance of Source Follower Buffers Implemented with Standard and Strained Triple-Gate nFinFETs
Authors: Pavanello Marcelo Antonio , Martino João Antonio , Simoen Eddy , Rooyackers Rita , Collaert Nadine , Claeys Cor
Published: December 2020

In this work the application of standard and strained triple-gate FinFETs in unity-gain source-follower configuration is compared. The analysis is performed by evaluating the buffer voltage gain with respect to the fin width and channel length as well as the total harmonic distortion. It is demonstrated that the application of strained material in narrow FinFETs, when the devices are operating in double-gate mode, can be beneficial for the performance of buffers in any channel length. On the other hand, for triple-gate FinFETs or quasi-planar ones the degradation of the output conductance overcomes the transconductance improvements from strained material and the performance of standard buffers is better than of strained ones. Narrow strained buffers also offer better harmonic distortion.
Efficient Interfacing of Partially Reconfigurable Instruction Set Extensions for Softcore CPUs on FPGAs
Authors: Koch Dirk , Beckhoff Christian , Torresen Jim
Published: December 2020

Swapping just small fractions of the configuration of an FPGA can be very beneficial in many applications. This is in particular useful for reconfiguring the instruction set of embedded soft core processors. In this paper, we will sketch that present design techniques include a substantial overhead for integrating reconfigurable parts into the rest of the system. This overhead can cost more logic resources than the actual module implementations. For removing this overhead, we propose a novel technique to constrain the communication resources between the static system and the partial regions.We will demonstrate for a reconfigurable soft core processor that instructions can be integrated into the system without causing any additional logic overhead for the communication. In addition, we reveal how such systems can be easily implemented with our tool ReCoBus-Builder. Furthermore, we will analyze the overhead in terms of reconfiguration time and present a metric helping to take design decisions.
Oscillation Amplitude Analysis of MOS Hartley Oscillator Using a General Model
Authors: Ardali Sadegh Raiessi , Samani Sajad Ghatreh , Arzanifar Babak
Published: December 2020

New analytical equations for amplitude analysis of MOS Hartley oscillator are presented. Using exact large-signal circuit analysis, analytical equations for estimating the amplitude of Hartley oscillator are derived that considers all operation regions of transistor; including saturation, triode and cutoff. The analysis is based on a reasonable estimation for the output waveform. The estimated waveform should satisfy the nonlinear differential equations describing the circuit. Using this novel point, we can simply find the unknown parameters of the waveform, especially amplitude. The validity of the resulted equations is verified through simulations using TSMC 0.18 μm CMOS process. The amplitude calculated from this approach has a very good agreement with simulation for a large range of circuit parameters.
Analog Performance of SOI nMuGFETs with Different TiN Gate Electrode Thickness and High-k Dielectrics
Authors: Galeti Milene , Rodrigues Michele , Collaert Nadine , Simoen Eddy , Claeys Cor , Martino João Antonio
Published: December 2020

This work presents an analysis of the analog performance of SOI MuGFET devices and the impact of different TiN metal gate electrode thickness.Thinner TiN metal gate allows achieving large gain and this effect can be attributed to the increased Early voltage values observed for thinner TiN metal gate. This VEA increase suggests an increase of the transversal electrical field for thin TiN metal gate (reduced gate oxide thickness) that is confirmed with the increment of the GIDL current.This impact on the voltage gain is maintained for short channel length.The impact of different gate dielectrics was also studied where high-k dielectric indicated a higher VT due to a VFB variation. Additionally, lower intrinsic voltage gain was observed for hafnium dielectric and this can be related to the lower Early voltage (VEA) present in this devices.
Formation of Oriented Fibers Using Injection of PEO Solutions inside Electric Fields Defined by Two Parallel Suspended Electrodes
Authors: Furlan Rogerio , Rosado Joel A. M. , Da Silva Ana Neilde Rodrigues
Published: December 2020

Formation of oriented fibers using injection of polyethylene oxide (PEO) solutions inside electric fields defined by two parallel suspended electrodes is investigated. Images of streams formed with the injection of a large amount of polymeric solution reveal good agreement with electric field distributions obtained with numerical simulation (COMSOL Multiphysics) when appropriate boundary conditions are defined. Oriented fibers with diameters in the range of hundreds of nanometers to micrometers result connected between electrodes (separated by several centimeters) and can be easily collected/transferred keeping their orientation. Fibers with this characteristic find applications in topics such as tissue and sensors engineering. Also, the fibers are flexible and can be shaped with the stylus of a profilometer.
A VLSI Design for the LTE Turbo Decoder
Authors: Souza Ilan Schnitman , Dos Reis V. T.
Published: December 2020

Due to the need of high performance, new wireless telecommunications standards such asWIMAX and LTE are using turbo-codes as a forward error correction (FEC) choice.This design targets either a self-contained IP (Intellectual Property) or integration into the physical layer project. This work presents all steps for the implementation of an LTE standard turbo decoder: from algorithm modeling in high level programming language to architecture using a sliding window approach seeking throughput needed, getting into physical implementation at TSMC 65nm. Each aspect of the specification and performance were analyzed in their proper stages.
New Motion Estimation Algorithms and its VLSI architectures for Real Time High Definition Video Coding
Authors: Sanchez Gustavo , Porto Marcelo , Noble Diego , Bampi Sergio , Agostini Luciano
Published: December 2020

This paper presents an efficient hardware design using the new Motion Estimation (ME) algorithms named: Multi-point Diamond Search (MPDS) and Dynamic Multi-Point Diamond Search (DMPDS). These algorithms are more efficient to avoid from local minima falls than traditional fast algorithms.This fact contributes to increase the quality of the motion vectors, especially in High Definition (HD) videos, were the number of local minima are considerable higher. Two versions of MPDS algorithm were proposed. The first one, focused on high performance, is capable to process videos QFHD at 30 frames per second when synthesized to Altera Stratix 4 and 90nm TSCM, with only 18mW. The second version is focused on quality enhancement and is capable to process HD 1080p videos in real time. The DMPDS architecture has been developed focusing on high performance and was synthesized to Altera stratix 4. This architecture is capable to process videos QFHD at 34 frames per second. In comparison to related works, our solutions obtained the highest processing rates, and a good trade-off among power consumption, area, memory bits and performance.
HdSC: A Fast and Preemptive Modeling for on Host HdS Development
Authors: Prado Bruno , Barros Edna , Figueredo Thiago , Aziz André
Published: December 2020

In modern embedded systems, the Hardware-dependent Software (HdS) plays a critical role due to its processor and platform dependency, such as device drivers and boot initialization. To support HdS development starting in an initial system design phase, fast and accurate preemptive processor models should be provided for simulating the software. These models should provide a register level interface to enable a compatible programming view on the host machine environment. This paper presents a strategy for processor modeling that enables HdS development, using the host machine tool chain. The proposed approach supports the specification of platform components, such as processor, software and devices accessed through the data bus and interruption interfaces. An adaptive technique for timing estimation is being proposed, which is very accurate and show a high simulation performance. Supporting the device driver development and interruption service routines, these two features can be implemented and simulated at an early system design phase and requiring no Instruction Set Simulator (ISS). This ISS model would be required only for performance and accuracy comparison purposes. Experimental results show that the virtual platform specified using this proposed approach can perform faster (up to 760x speed up) and high accurate (up to 12%) software simulation on native host environment.
Modeling of Thin-Film Lateral SOI PIN Diodes with an Alternative Multi-Branch Explicit Current Model
Authors: Lugo-Muñoz Denise , Muci Juan , Ortiz-Conde Adelmo , García-Sánchez Francisco J. , De Souza Michelly , Flandre Denis , Pavanello Marcelo Antonio
Published: December 2020

We propose the use of an alternative multi-exponential model to describe multiple conduction mechanisms in thin-film SOI PIN diodes with parasitic series resistance over a wide operating temperature range, from 90 to 390 K. This alternative multi-exponential model can be used for semiconductor junctions which exhibit multiple conduction mechanisms with series and shunt resistances. Using Thevenin’s theorem and the Lambert W function, the terminal current is expressed explicitly as a function of the terminal voltage. Its explicit nature allows higher computational efficiency and makes this model better suited for repetitive simulation applications than conventional implicit models. Additionally, direct analytic differentiation and integration are possible. This alternative model is used to describe the I-V characteristics of real SOI PIN diodes.
Impact of the Series Resistance in the I-V Characteristics of Junctionless Nanowire Transistors and its dependence on the Temperature
Authors: Doria Rodrigo T. , Trevisoli Renan D. , De Souza Michelly , Pavanello Marcelo Antonio
Published: December 2020

The effect of the source/drain parasitic resistance (RS) on the I-V characteristics of Junctionless Nanowire Transistors (JNTs) has been evaluated through experimental and simulated data. The impact of several parameters such as the temperature, the fin width, the total doping concentration, the source/drain length and the source/drain doping concentration on RS has been addressed. The source/drain parasitic resistance presented by JNTs was compared to the one presented by classical inversion mode (IM) triple gate devices, showing opposite behavior with the temperature variation in IM triple transistors and JNTs. In the latter, a reduction on RS is noted with the temperature increase, which is related to the incomplete ionization. This effect inhibits the presence of a Zero Temperature Coefficient (ZTC) operation bias in the Junctionless devices.
Fin Cross-Section Shape Influence on Short Channel Effects of MuGFETs
Authors: Buhler Rudolf T. , Giacomini Renato , Pavanello Marcelo Antonio , Martino João Antonio
Published: December 2020

Multiple-gate FETs is normally constructed on pre-etched silicon fins. These devices often present casual width variations along the silicon height; mostly caused by technological limitations of the fin definition process, due to non-ideal anisotropic etch. The resulting devices have, consequently, non-rectangular cross-sections, which can affect their electrical behavior. This work addresses the dependence of fin width non-uniformity on the occurrence of short-channel effects through comparative analysis, based on threedimensional numeric simulation of non-rectangular cross-section devices. The influence of the fin crosssection shape on electrical parameters showed to be dependent on channel length, becoming more sensible to the fin shape as the channel length is reduced, with better DC performance present on devices with bottom fin width smaller than top fin width due to the higher transconductance and lower output conductance, resulting on higher intrinsic voltage gain. For opposite fin shapes the total gate capacitance present higher values, beneficiating AC analog parameters, such as unit gain frequency.
Hardware Pipelining of Repetitive Patterns in Processor Instruction Traces
Authors: Bispo J. , Cardoso J. , Monteiro J.
Published: December 2020

Dynamic partitioning is a promising technique where computations are transparently moved from a Gene-

ral Purpose Processor (GPP) to a coprocessor during application execution. To be effective, the mapping

of computations to the coprocessor needs to consider aggressive optimizations. One of the mapping opti-

mizations is loop pipelining, a technique extensively studied and known to allow substantial performance

improvements. This paper describes a technique for pipelining Megablocks, a type of runtime loop deve-

loped for dynamic partitioning. The technique transforms the body of Mega-blocks into an acyclic dataflow

graph which can be fully pipe-lined and is based on the atomic execution of loop iterations. For a set of 9 ben-

chmarks without memory operations, we generated pipelined hardware versions of the loops and esti-mate

that the presented loop pipelining technique increases the average speedup of non-pipelined coprocessor

accelerated designs from 1.6× to 2.2×. For a larger set of 61 benchmarks which include memory operations,

we estimate through simulation a speedup increase from 2.5× to 5.6× with this technique.
Table of Contents and Foreword
Authors: Pavanello Marcelo Antonio , Moraes Fernando Gehm
Published: December 2020

In this issue of JICS some of the papers have been selected from the presented at SBMicro2012 (27th Symposium on Microelectronics Technology and Devices), which has been held in Brasília, Brazil, in 2012. Among the contributions presented at the s ymposium, only a few best rated were selected by the JICS Editorial Board and have been invited to submit an extended version to the Journal. These extended papers have passed through the usual reviewing process before acceptance. In addition to the best papers presented at the conference, spontaneous submissions passed through the usual reviewing process and have been accepted as regular papers. We would like to thank the authors for their effort in preparing these high quality papers, as well as the reviewers for their valuable contribution on paper evaluation and selection, which guarantees the scientific level of this issue. We sincerely hope that JICS readers will enjoy these contributions. We also would like to thank the Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq) for the financial support for this JICS Issue.Marcelo Antonio Pavanello - JICS Editor-in-chiefFernando Gehm Moraes - JICS Co-Editor
A Domain-Transformation Approach to Synthesize Read-Polarity-Once Boolean Functions
Authors: Callegaro Vinicius , Martins Mayler G. A. , Ribas Renato P. , Reis André I.
Published: December 2020

Efficient exact factoring algorithms are limited to read-once (RO) functions, where each variable appears exactly once at the final Boolean expression. However, these algorithms present two important constraints: (1) they do not consider incompletely specified Boolean functions (ISFs), and (2) they are not suitable for binate functions. To overcome the first drawback, an algorithm that finds RO expressions for ISF, whenever possible, is proposed. In respect to the second limitation, we propose a domain transformation that splits existing binate variables into two independent unate variables. Such a domain transformation leads to ISFs, which can be efficiently factored by applying the proposed algorithm. The combination of both contributions gives optimal results for a recently proposed broader class of Boolean functions called read-polarity-once (RPO) functions, where each polarity (positive and negative) of a variable appears at most once in the factored form. Experimental results carried out over ISCAS’85 benchmark circuits have shown that RPO functions are significantly more frequent than RO functions.
Table of Contents and Foreword
Authors: Pavanello Marcelo Antonio , Kastensmidt Fernanda
Published: December 2020

In this issue of JICS some of the papers have been selected from the presented at SBMicro2013 (28th Symposium on Microelectronics Technology and Devices), which has been held in Curitiba, Brazil, in 2013. Among the contributions presented at the Symposium, only a few best rated were selected by the JICS Editorial Board and have been invited to submit an extended version to the Journal. These extended papers have passed through the usual reviewing process before acceptance. In addition to the best papers presented at the conference, spontaneous submissions passed through the usual reviewing process and have been accepted as regular papers. We would like to thank the authors for their effort in preparing these high quality papers, as well as the reviewers for their valuable contribution on paper evaluation and selection, which guarantees the scientific level of this issue. We sincerely hope that JICS readers will enjoy these contributions.Marcelo Antonio Pavanello - JICS Editor-in-chiefFernanda Kastensmidt -  JICS Co-Editor
Pecadofobia e sua gênese
Authors: Leers Bernardino
Published: December 2020

Entre os fiéis mais chegados à prática eclesiástica há sinais de uma fobia de que “tudo é pecado”. De onde vem esta anomalia? Até uma leitura pessimista da Bíblia ajuda. Mas as raízes principais estão nos Livros Penitenciais e manuais pós-tridentinos da teologia moral, mais as traduções do latim que não respeitaram as mudanças de sentido de certos termos tradicionais e o rigorismo jansenista. Também a monopolização da “confissão ” tem absorvido a prática da reconciliação com pessoas, classes sociais, etnias e a natureza ambiental, mal tratada.
Cost benefit analysis for peer-to-peer mechanism in residential sector of a single buyer electricity market
Authors: PRANADİ Aloysius Damar , SETİAWAN Eko
Published: December 2020

Recently, feed-in-tariff (FIT) is no longer under government’s preference due to fiscal support limits and reluctance of utility to purchase RE-based electricity at higher price. Indeed, the absence of any incentives will significantly impact to renewable market growth. Therefore, net metering/billing implemented, but sometimes its price is unfairly offered in comparison with utility retail price. To seek more interesting model that can benefit to government utility and people, a so-called mechanism peer-to-peer (P2P) is proposed as alternative solution in this study. This study investigates an applicability of this new energy trading mechanism in vertically integrated unit electricity market (regulated market), by comparing this mechanism with the existing mechanism e.g. net metering/billing. The P2P was studied using a built-own optimization tool (in excel base) to determine its economic analysis, its market price and cost-benefit for utility and P2P participants. As a result, using P2P, each participant which install solar photovoltaic (solar PV) can fasten their payback period up to 2 years from its net metering payback, raise internal rate of return (IRR) by 2-3%, obtain 500 US$ net present value (NPV) for prosumer only (a consumer with electricity generator such as solar PV) and 3,000 US$ for prosumer with storage system in comparison with its analysis with existing net metering. Besides, P2P also brings monetized benefits for a single-buyer utility than its lost market. This study also show that P2P is institutionally feasible for regulated market with any restriction to sell electricity from non-utility entities.
Pattern of anti-malarial drugs and artemether combination therapy adherence in an institution based medical centre, Nigeria
Authors: Ujuamala Uloma Ezeani  , Penaere Theresa Osahon  , Michael Chukwudi Ezeani
Published: December 2020

The change in policy guidelines for treating uncomplicated malaria became necessary because the therapeutic efficacy of chloroquine and SP had deteriorated. Hence compliance is a necessity to enable effective check on malaria. This work was carried out to evaluate antimalaria drug prescription and to update its usage in line with WHO guideline on Artemeter Combination therapy in a university based medical center. We utilized descriptive, cross-sectional, retrospective study of antimalaria prescriptions purposely carried out among male and female outpatients with mean age of 22.4±2.8 at a University health facility. This comprised all outpatients prescriptions that contained at least one antimalarial drug filed from October 2018 to September 2019. Systematic sampling was used to select the prescriptions. Based on the total number of 1250 prescriptions containing at least one antimalarial drug, a sampling interval of 5 was calculated and simple balloting was used for the first pick. A total number of two hundred and fifty (250) prescriptions containing at least one antimalarial drug were selected for the study. Out of 250 antimalaria prescriptions, usage of ACT class of Artemeter lumefantrine, Artemeter Amodiaquine and Artemeter Piparaqiune were recorded at 45.6%, 10.4% and 9.6% respectively. Triple combination Artemeter lumefantrine and Sulphadoxine-Pyrimethamine was recorded at 20.4% while Sulphadoxine-Pyrimethamine was recorded at 4%. Combination of antimalarial drugs with antibiotics was recorded at 31.2%. This study showed compliance with National Antimalarial Treatment Guideline for the treatment of malaria infection as it regards the use of artemisinin-based combination therapy. The frequency usage of artemeter lumefantrine was proceeding among other ACTs. The frequency in co-prescription of antibiotics with anti-malaria should be guarded to comply with WHO recommendation.
Establishment of local geometric geoid model for Busoga, Uganda
Authors: Bruno Kyamulesire  , Sylvester Okiemute Eteje  , Paul Dare Oluyori
Published: December 2020

The importance of the local geoid model for the computation of accurate geoid heights, as well as orthometric heights used for engineering constructions, necessitated its establishment in areas, regions or countries. Consequently, this study establishes the local geometric geoid model of Busoga, Uganda, using the geometric method. A total of 26 points were used in the study, 20 points for the development of the model and 6 test points. GNSS observations were acquired with Trimble GNSS dual-frequency receivers and processed with Bernese (V5.2) and Spectra Precision Survey Office (v4.1) software to obtain the coordinates and ellipsoidal heights of the points. Differences between the existing orthometric and ellipsoidal heights were computed to obtain the geoid heights. The Least squares adjustment technique was applied to determine the fit, as well as the Bicubic and Multiquadratic models’ parameters. The Root Mean Squares Error (RMSE) index was used to compute the accuracy of the models. The geoid models were compared with their RMSE, as well as accuracy to determine which of them is more suitable for application in the study area. The comparison result shows that the Multiquadratic geoid model is more suitable for implementation in the study area. A Microsoft Excel program was developed for the application of the model in the study area.
Effect of medium size and compost dose on organic red lettuce (Lactuca sativa L. Var red rapids) cultivation in pots
Authors: Sugeng Triyono  , Fadli Afrizki Surya Aditama  , Elhamida Rezkia  , Dermiyati  , Jamalam Lumbanraja
Published: December 2020

Small-scale urban farming business of organic vegetables was emerging in some locations of Indonesia. The study aimed to observe the effect of medium size and organic compost dosage on the growth and yield of red lettuce (Lactuca sativa L. var red rapids). A pot experiment was arranged in a completely randomized design (CRD) with a 3 x 4 factorial treatment using 3 replicates. Treatment consists of two factors namely medium size and organic compost dosage. The media size consisted of three levels: 1kg (S1), 3kg (S2), and 5kg (S3). The dosage of organic compost consisted of 4 levels: 0% (D0), 10% (D1), 30% (D2), and 50% (D3). The study was conducted in a plastic house, using a clay texture of subsoil and organic compost made from a mixture of cattle manure, chicken manure, MSG industrial waste sludge, coconut husk dust, oil palm empty fruit bunches (EFB). Some growth and yield parameters including water consumption and water productivity were considered. Results showed that red rapid lettuce growth was depressed at 1kg and 3kg medium sizes and growing more freely at 5kg medium size. Three best yields of 75.3g, 65.7g, and 90.0g per plant were performed by the treatment combinations of 3kg medium size-10% compost dose, 3kg medium size-30% compost dose, and 5kg medium size-50% compost dose. The treatment combination of 3kg medium size-10% compost dose, however, could be considered as the most optimum treatment combination since it used the least amount of medium and compost although the plant experienced in restricted growth.
Company fundamentals and stock price movements: The role of crude oil prices – Evidence from Nigerian Stock Exchange (NSE)
Authors: Musa Tijjani Bashir
Published: December 2020

This study analyzed company fundamentals on how it relates and predict stock price movements and the extent of the role of oil prices in moderating the influence of these company fundamentals in stock price movements. The study covered the period of 2014 to 2018. The study is a panel study. A total of 132 companies were sampled from 196 companies listed on the Nigerian Stock Exchange (NSE) as of December 2018. Data were collected from a secondary source. Multiple linear regression models were used to analyze the data. The study found that a relationship exists between selected companies' fundamentals and stock prices, and oil prices moderate the relationship. But EPS and Working Capital have high predictive power on stock price movements but moderating with oil prices the influence reduces significantly. The study recommends among others that Managers of companies in Nigeria should formulate policies and exert effort geared towards improving company fundamentals in the event of oil prices increases.
The Meanings of Life and Value Priorities of the Post-Soviet Society in the Republic of Belarus
Authors: Danilov Alexander N.
Published: December 2020

The article discusses the meanings of life and value priorities of the post- Soviet society. The author argues that, at present, there are symptoms of a global ideological crisis in the world, that the West does not have its own vision of where and how to move on and has no understanding of the future. Unfortunately, most of the post-Soviet countries do not have such vision as well. In these conditions, there are mistrust, confusion, paradoxical manifestation of human consciousness. The main meanings that determine our life-world are: the desire of citizens for social justice and social security, the desire to figure out and understand the basic values of modern society, how honestly and equally the authorities act toward their fellow citizens, and to what extent they reflect their interests. The meanings of life, which are the answers to the challenges of the time, are embodied in the cultural code of each nation, state. The growth points of new values, which will become the basis for the future sustainable development of a new civilization, have yet to be discovered in the systemic transformative changes of the culture. In this process, the emergence of a new system of values that governs human life is inevitable. However, modern technology brings new troubles to humans. It has provided wide opportunities for informational violence and public consciousness manipulation. Nowadays, the scenario that is implemented in Western consumer societies claims to be the dominant scenario. Meanwhile, today there is no country in the world that is a role model, there is no ideal that others would like to borrow. Most post-Soviet states failed to advance their societies to more decent levels of economic development, to meet the challenges of the modern information age, and to provide the population with new high living standards. Therefore, in conditions of growing confrontation, we should realistically understand the world and be ready to implement changes that will ensure sustainable development of the state and society without losing our national identity.
Philosophy in Belarus: Historical Specificity – Modern Trends – National Context
Authors: Lazarevich Anatoly A.
Published: December 2020

The article considers the formation and development of philosophy in Belarus in the context of historical conditions and modern opportunities. Discussing the national context of the philosophical process, the author reveals the four aspects of the phenomenon of “national philosophy.” Firstly, there are national institutional and disciplinary structures, which are responsible for an organized scientific, methodological, research and educational activity, which at the level of the nation-state is formalized by certain institutions, system of professional education, norms of professional ethos, standards of behavior within the community and in the wider social environment. Secondly, in the light of philosophical culture, national philosophy is interpreted as a set of value and cognitive orientations passed down from generation to generation. Thirdly, national philosophy can be viewed in the aspect of the tradition of studying the philosophical thought of the nation in the context of its historical development. Fourthly, national philosophy appears in the aspect of the philosophical foundations of the national idea and national-cultural identity. The author examines the main stages of the development of the Belarusian philosophical culture, it is shown that the features of this culture were formed under the condition of a complex combination of the worldview and values of Latin civilization, Christianity, modern European science, rationalism of social projects of the Enlightenment, ideological and worldview attitudes of Western Russian culture, formalized Soviet philosophical disciplines. The article reviews the circle of theoretical, ideological, and practical problems that the modern philosophical process in Belarus faces, the author emphasizes the unfading value of philosophical knowledge as a source of heuristic means for finding effective local answers to global problems of cultural and civilizational development. The author argues that there are two conditions that make national philosophy possible: this is, first of all, a connection with the history of thought in the area of national genesis and also the expression of thought in a national language.
ELEMENTS OF NARRATIVE AND FUNCTION OF NARRATOR IN JUN CHIU’S CROP CIRCLES
Authors: Oktavia Dini , Rangkuti Rahmadsyah , Yusuf Nuhammad
Published: December 2020

The purposes of this study are to find out the elements of narrative and the function of narrator in Jun Chiu’s silent comic Crop Circles. This research applied qualitative design. The data of this study were in the form of 20 pictures taken from the silent comic. The data were collected through stages: finding out and determining, classifying and separating the pictures conveying illustration of a narrative. The analysis of the data was done qualitatively by using the theory of phase analysis by Miles, Huberman and Saldana covering condensation, display and verification.  The research results show that the elements of narrative found in Jun Chiu’s comic pictures Crop Circles narrative mood (transposed speech-indirect style); narrative instance (narrative voice: heterodiegetic narrator, time of narration: simultaneous narration; narrative perspective: external focalization), narrative levels (embedded narrative, metalepsis) and narrative time (order: analepsis, narrative speed: ellipsis, frequency of events: singulative narration). The narrator carried ideological function because the narrator illustrates the pictures to introduce public policy.
THE USE AND SYMBOLISM OF ANIMALS IN THE WONDERFUL WIZARD OF OZ
Authors: Kheirbek Taymaa Hussein , Ezzat Roza Awat
Published: December 2020

This paper is the result of a qualitative research that follows an animal-based interpretative theory. It sheds the light on the use and symbolism of animal characters in The Wonderful Wizard of Oz written by L. Frank Baum and published in 1900. It seems to be a modern fairy tale with an American setting and charming fantasy characters. It is an immensely popular text among children and adults, so it is considered a classic of children's literature. It also attempts to answer why and how Baum used animals; whether for their qualities or for the sake of creating characters opposite to their symbolism. Therefore, the role and function of animal characters are extensively discussed. The findings show how L. Frank Baum presents a distinguished world from a non-human perspective and at the same time he teaches morality, religion, and accepting diversity in nature in an exciting narrative full of adventures. These animal characters can serve as a symbolic role models for young readers.
ADVERB OF TIME IN ARABIC SIMPLE SENTENCE
Authors: Fauzi Muhammad Ivan , Nirmala Deli , Subiyanto Agus
Published: December 2020

This research aims to describe the pattern of Arabic simple sentences attached by adverb of time and the distribution of the adverb of time in Arabic simple sentences. The research data are in the form of a simple sentence, which contains adverb of time from a paper in the book Al-Arabiyah Baina Yadaik Volume 4a by Al-Fauzan, et al. (2014). The data collection was carried out using the observation method. The analysis of adverb of time in Arabic simple sentence was done by a tree diagram with the guidelines proposed by Chomsky (2002). The results showed that the adverb of time is inherent in verbs and was only found in the original verb and not a derivational verb. In addition, the sentence patterns of Arabic simple sentence attached by adverb of time consist of PS, SP, SPO, and PSO. The researchers also found the distribution of adverbs of time inside the predicate, behind the object, in front of the predicate, and behind the subject.