(Invited) Atomic Layer Deposition of HfO2 Using HF Etched Thermal and RTP SiO2 as Interfacial Layers
Authors: Han Lei , Chen Zhi David 
Published: February 2020

HfO2 has become the mainstream high-k dielectric material in semiconductor industry. This is because HfO2 has appealing properties such as high dielectric constant (~20), sufficient band offset from Si, good thermodynamic stability, etc. Atomic Layer Deposition (ALD) could grow HfO2 with high quality. –OH termination of Si is crucial for the chemical attachment of Hf precursor onto Si surface. Chemical oxide is widely used to provide interfacial layer, which is full of –OH group and highly hydrophilic (1). It has been reported that thermal SiO2 and SiO2 after Rapid Thermal Process (RTP) could not be used as interfacial layers because they are lack of –OH (1). In this research, we proved that after controllable etching in diluted HF solution, thermal and RTP SiO2 become highly hydrophilic on the surface, and could be used as interfacial layers for ALD HfO2 deposition. The electrical quality of HfO2is not degraded by these interfacial layers.

H-terminated Si surface was achieved by immersing p-type Si substrate into BOE (buffered oxide etch) solution. After BOE etching, ~22Å of SiO2 was thermally grown at 900°C in diluted O2 (O2:N2=1:5). Then the substrate was cut into 2 pieces, one piece went through RTP at 1070°C for 2 min in trace O2, and the thickness was increased by 5-6Å. After RTP, these 2 pieces were etched in diluted HF solution (3:1000), which provides slow and controllable SiO2 etching. The remaining thicknesses of the SiO2 layers were controlled to be 3.5-4.5Å, and they are highly hydrophilic. Using these hydrophilic SiO2 as interfacial layers, we deposited 21 cycles HfO2 using ALD at 300°C. The precursors were TDMAH and H2O.

MOS capacitors were fabricated using HfO2 grown on HF etched thermal and RTP SiO2. HfO2 grown on chemical oxide was used as a quality reference. In order to express clearly, we number the sample using chemical oxide as Sample 1, the one using HF-etched thermal SiO2 as Sample 2, and the one using HF-etched RTP SiO2 as Sample 3. Fig. 1 and 2 are the high frequency (100 KHz) Capacitance density-Voltage (C-V) curves of sample 2 and 3. The C-V curve of Sample 1 is shown in both figures as a reference. The deformation of C-V curves at high voltage range is caused by high tunneling current through ultrathin films (2). The physical thickness of HfO2 on these 3 samples were 3.06 nm, 3.07 nm and 3.06 nm. The EOT of these 3 samples were 0.98 nm, 0.99 nm and 1.07 nm. The remaining SiO2 on sample 3 is thicker, which could explain the thicker EOT. Figure 3 shows the Current density-Voltage (I-V) curves of the capacitors, and the gate leakage current at VFB+1V is marked in the figure. Sample 2 has comparable gate leakage current to Sample 1. Sample 3 has lower gate leakage current comparing to Sample 1, which could be attributed to slightly thicker interfacial layer.

In summary, diluted HF etching can create hydrophilic surfaces on thermal and RTP SiO2, which can be used as interfacial layers for deposition of HfO2. The electrical properties of the HfO2 grown on HF-etched thermal and RTP oxides are comparable to that grown on chemical oxide.