bluuebunny/crossref_metadata_2025 huggingface dataset:
(Invited) Theory of Silicon-Based Light Emitting
Authors: Luo Jun-Wei
Published: September 2020

Why silicon and germanium are both indirect band gap and most of group III-V and all group II-VI semiconductors are direct band gap is a long standing puzzle. In this talk, I will first present our recently developed unified theory to explain why diamond, Si, Ge, and Al-containing group III-V semiconductors have indirect band gap, and the remaining group III-V and II-VI semiconductors, except GaP, have direct band gap. We excluded Si QDs as a candidate for on-chip lasers. We also discovered that Si/Ge magic sequence superlattices exhibit orders more efficient at emission light than their existing counterpart records and approach more than 10% brightness of real direct gap materials, such as GaAs. We further propose to insert external atoms into interstitial sites of Ge to induce an effective tensile uniaxial strain on Ge toward direct band gap Ge. This scheme is highly compatible with CMOS fabrication process.
(Invited) On the Potential of Lateral BJTs and SiGe HBTs in Advanced CMOS Technologies
Authors: Suligoj Tomislav , Zilak Josip , Osrecki Zeljko , Koricic Marko
Published: September 2020

The potential of lateral bipolar transistors, based on Horizontal Current Bipolar Transistor (HCBT), in scaled CMOS technologies are examined by TCAD simulations. Thorough and consistent simulations show that SiGe HCBT can achieve fT
/fmax
of 358/490 GHz outperforming standard vertical-current HBT with fT
/fmax
of 348/423 GHz, assuming the same intrinsic transistor doping profile. By optimizing the extrinsic base shape and width, the characteristics of SiGe HCBT can be further improved. SiGe HCBTs in bulk silicon substrates result in better performance comparing to the transistors in SOI substrates.
X-Parameters Based Characterization and Compact Modeling of SiGe HBT Linearity
Authors: Niu G. , Zhang Anni , Li Yiao , Zhang Huaiyuan , Scholten Andries , Willemsen Marnix , Pijper Ralf , Tiemeijer L.F.
Published: September 2020

This paper presents an X-parameter based approach to characterizing and compact modeling of SiGe HBT linearity. Removing RF source distortion using X-parameter measurements significantly increases measurement accuracy in highly linear common-base SiGe HBTs. X-parameters simulated using Mextram 505.0 are compared with measurements for the first time. To a large extent, our model accurately captures nearly all the X-parameters for a large range of biasing emitter current and collector-base voltage.
On the Mechanisms of Linearity Peak Modeling in Common-Emitter SiGe HBTs Using Mextram 505
Authors: Ding Xuewei , Niu G. , Li Yiao , Zhang Huaiyuan , Scholten Andries , Willemsen Marnix
Published: September 2020

This paper presents detailed mechanisms of how improved intrinsic collector-base junction depletion capacitance (Ctc
) model in Mextram 505 improves OIP3 peak modeling in common-emitter SiGe HBTs. Harmonics of individual branch currents are examined using custom Verilog-A codes. Interestingly, the third order Ctc
charging current is found to be much lower than the third order main current (IN
), which dominatesthe third order collector current. Early effect is further excluded as the reason for improved third order current modeling. Circuit level propagation of nonlinear Ctc
current towards IN
is concluded to be the main mechanism by which IP3 peak behavior is improved in Mextram 505.
(Invited) Heteroepitaxy and Strain Engineering of Germanium-Silicon-Tin Ternary Alloy Semiconductor Thin Films for Energy Band Design
Authors: Nakatsuka Osamu , Shibayama Shigehisa , Kurosawa Masashi , Sakashita Mitsuo
Published: September 2020

Strain engineering of group-IV semiconductor thin film is a key for energy band design and engineering for electronic and optoelectronic applications. In this paper, we report our recent achievements for strain relaxation method of Ge1
−x−y
Si
x
Sn
y
ternary alloy semiconductor epitaxial layer on various substrates. Virtual Ge substrate effectively enhances the strain relaxation of Ge1
−x−y
Si
x
Sn
y
layer and also improves the surface morphology and uniformity after the strain relaxation. Ion implantation into Ge substrate is also effective to enhance the strain relaxation and achieves a large in-plane lattice constant as a buffer layer for the growth of strain-relaxed Ge1
−x
Sn
x
epitaxial layer with a Sn content as high as 10%.
Crystal Growth of Epitaxial 3C-SiC Thin Film on Si Substrate by Chemical Vapor Deposition using Single Precursor of Vinylsilane
Authors: Doi Takuma , Hashimoto Kentaro , Takeuchi Wakana , Nakatsuka Osamu
Published: September 2020

We have examined the formation of 3C SiC thin films on Si substrates by chemical vapor deposition (CVD) method using vinysilane as a single precursor. The epitaxial 3C-SiC film was successfully grown on Si(111) substrate at a lower temperature of 1000 °C. In addition, in-situ phosphorus doping for polycrystalline 3C-SiC was achieved using tri-ethyl-phosphorus as a dopant source. The active dopant concentration as high as 8.2×1019 cm−3 and the resistivity as low as 1.9×10−2 Ωcm was obtained. This resistivity value is comparable to the epitaxial 3C-SiC film formed on Si substrate ever reported at the same dopant concentration region. The fact that resistivity as low as single crystalline films can be obtained at a low temperature of 900°C promises that CVD-grown 3C-SiC films using a single precursor of vinylsilane is a suitable material for a wide range of applications.
Threading Dislocation Reduction of Ge by Introducing a SiGe/Ge Superlattice
Authors: Yamamoto Yuji , Corley Cedric , Schubert Markus Andreas , Zöllner Marvin , Tillack Bernd
Published: September 2020

The influence of introducing a SiGe / Ge superlattice (SL) between Ge layers and Si substrate for the sake of the reduction of the threading dislocation density (TDD) without additional annealing is investigated. In the case of 2.8 μm thick Ge directly grown on Si, the TDD at the surface is 7.6×10-8 cm-2. A slight TDD reduction is observed by introducing a Si0.2Ge0.8 / Ge SL between the Si substrate and the Ge layer. By inserting 5, 10 and 20 cycles of Si0.2Ge0.8 / Ge, the TDD is reduced to 7.1×10-8, 5.9×10,-8 and 5.3×10-8 cm-2, respectively. The lateral lattice parameters of these SLs are ~5.656Å, which is a smaller value compared to that of bulk Ge, indicating plastic relaxation by misfit dislocation (MD) formation. Further TDD reduction is realized with increasing Si concentration in the SiGe / Ge SL without changing the cycle of the SL. However, surface roughening due to pit formation occurs if the Si concentration in the SL is higher than 50% because of increased strain at the interfaces between SiGe and Ge. With increasing SiGe and Ge thickness ratio in the SL layer and maintaining periodicity and cycles, the TDD is reduced to 2.8×10-8 cm-2 without degrading the surface roughness. This improvement is related to a relaxation of the SiGe/Ge SL by plastic deformation.
Epitaxial Ge-on-Nothing Virtual Substrates for 3D Device Stacking Technologies
Authors: Loo Roger , Porret Clement , Han Han , Depauw Valerie
Published: September 2020

We introduce a fabrication scheme for strain-relaxed Ge, epitaxially grown on a Si-on-Nothing (SiON) template formed from macro-porous Si. The SiON template is fabricated on regular Si substrates using conventional lithography, dry-etching and annealing routines. The material properties of the virtual Ge substrate grown on this detachable template are identical to those obtained for Ge grown on bulk Si. Strain-relaxed, suspended, and detachable Ge-on-Nothing (GeON) was fabricated using a similar fabrication scheme except for the epitaxial growth of Ge on Si, which was performed before the patterning of the substrate. For GeON, the extracted excess carrier lifetime using time-resolved photoluminescence (32 ns) was > 4 times higher than the values measured for Ge grown on bulk Si with a similar thickness of the Ge layer. Both templates can be considered as starting material for layer transfer and 3D device stacking technologies provided that successful detachment from the parent substrate can be demonstrated.
Ultra-High Boron Doping of Si and Ge for Nanoelectronics and Photonics
Authors: Hartmann Jean-Michel , Frauenrath Marvin , Richy Jérôme , Veillerot Marc
Published: September 2020

Si:B or Ge:B layers can used to fabricate devices such as p-type metal oxide semiconductor transistors, photo-detectors, light emitting diodes and so on. We have explored here the in-situ boron-doping of Si and Ge with Si2H6 + B2H6 and Ge2H6 + B2H6. Such chemistries enable Si or Ge epitaxy at temperatures definitely lower than with mainstream precursors such as SiH4 or GeH4. Growth temperatures and pressures in our 200mm Reduced Pressure - Chemical Vapor Deposition tool were 550°C, 20 Torr (Si) and 350°C, 100 Torr (Ge). X-ray Diffraction was used to convert the tensile strain in Si:B or Ge:B layers into substitutional B concentrations, while Secondary Ions Mass Spectrometry gave us the atomic B concentration. As far as Si:B was concerned, a huge growth rate increase (from 9.5 up to 39.8 nm min.-1) was evidenced when adding relatively small amounts of B2H6 to Si2H6. Ultra-high substitutional and atomic boron contents were obtained in those Si:B layers (at most: 2.7x1020 and 1.1x1021 atoms cm-3). For higher B2H6 flows, films became poly-crystalline. A similar growth rate increase (from 5.8 up to 20.8 nm min.-1) and really high substitutional B concentrations (at most: 4.8x1020 atoms cm-3) were otherwise obtained for Ge:B. Such concentrations were several times higher than with conventional chemistries.
(Invited) Low-Temperature Growth of Strained Germanium Quantum Wells for High Mobility Applications
Authors: Bedell Stephen W. , Hart Sean , Bangsaruntip Sarunya , Durfee Curtis , Ott John A. , Hopstaken M , Carroll Malcolm S. , Gumann Pat
Published: September 2020

The extremely high hole mobilities attainable in strained germanium quantum wells (QW) provide a unique pathway to develop novel devices in the emerging field of quantum electronics. A major challenge associated with the growth of Ge QW structures using the industrial standard reduced-pressure chemical vapor deposition (RP-CVD) technique is the incorporation of unintentional impurities in the growing film. We will show that a compromise exists between the growth conditions that minimize the various impurities (mainly O and Si) and the abruptness of the QW. The purity of the incoming gas plays a central role in this compromise and will be discussed.
(Invited) Activation and Deactivation in Ultra-Highly Doped n-Type Epitaxy for nMOS Applications
Authors: Ye Zhiyuan , Chen Miao-Chun , Chang Flora , Wu Chen-Ying , Li Xuebin , Dube Abhishek , Liu Patricia , Chopra Saurabh , Chu Schubert
Published: September 2020

Since ultra-highly doped, highly tensile strained Si:P epitaxy was reported about 10 years ago, it quickly replaced Si:CP and become key processes for advanced nodes. With greater than 3E21 doping level, these films exhibit significant tensile stress and low resistivity, both enhanced the nMOS performance. As the technology scales, contact resistance is becoming a major factor for device performance, even higher activation level is desired. In this paper, the mechanisms for high doping level and tensile strain are briefly reviewed and discussed. Despite epitaxially grown, these films showed similar thermal equilibrium behavior as implant-annealed samples and could be predicted with well established model. Diffusion and strain analysis shed some lights on the processes involved in the carrier activation and deactivation. Formation of group V - vacancy complex, V4V, or Si3P4-like, structure is key to understand the behavior, especially dopant diffusion and interaction with vacancy. Unlike Si:As, Si:P showed different behavior with different anneal and deposition approaches that might indicating a much more complicate deactivation path. And strong surface influence of P diffusion might present a challenge for contact engineering.
(Invited) Stress Simulations of Fins, Wires, and Nanosheets
Authors: Eneman Geert , Veloso Anabela , Favia Paola , Hikavyy Andriy Yakovitch , Porret Clement , Arimura Hiroaki , De Keersgieter An , Pourtois Geoffrey , Loo Roger , Spessot Alessio , Matagne Philippe , Ryckaert J. , Horiguchi Naoto
Published: September 2020

Stress simulations are presented for fins, nanowires and nanosheets with 5nm-technology dimensions. About 50-70% higher channel stress is reported in nanowires than in fins. The stress is found to depend strongly on the original fin/wire length, the position of the device along the structure, and the position of the wire (top, middle or bottom in the case of three wires). Scaling of gate length enhances channel stress, while decreasing poly and fin/wire pitch reduces it. Scaling from the 8nm- to the 3nm-node decreases nanowire stress by about 35%. Stress in nanosheets is lower than in wires, partially owing to their smaller source/drain epi-to-channel volume ratio. In case of imperfect source/drain epi stressors, the channel stress can completely vanish or reverse, in particular for the case the epi growth fronts coming from neighboring gates do not join perfectly.
(Invited) Engineering Strain, Defects, and Electronic Properties of (110)-Oriented Strained Si
Authors: Arimoto Keisuke , Yamanaka Junji , Hara Kosuke O , Sawano Kentarou , Usami Noritaka , Nakagawa Kiyokazu
Published: September 2020

Strain engineering of group IV semiconductors has been extensively investigated with an aim to produce high mobility platform for high performance electronic devices. The lattice strain significantly affects the carrier mobility via modulation of the energy band structure and its effect on the crystalline defect formation. The lattice structure of the strained crystal is determined by the amount of the strain and the boundary condition. In this study, the morphological aspects and the electronic properties of the (110)-oriented strained Si/SiGe/Si heterostructures grown by molecular beam epitaxy (MBE) have been studied. Potential of this material system as a high hole mobility semiconductor platform is discussed. It has been found that highly anisotropic lattice strain and defect configuration can be realized in this heterostructure and that this anisotropic feature plays important roles in the enhancement of the hole mobility.
(Invited) Monolithic Ge Integration on the 3 µm SOI Platform for 40 GHz Photodiodes
Authors: Aalto Timo , Vehmas Tapani , Kapulainen Markku , Heimala Päivi , Delrosso Giovanni , Sun Fei , Gao Feng
Published: September 2020

Ge photodiodes were integrated on the 3 µm SOI platform, where the 3 µm thick Si waveguides offer ultra-low propagation losses (~0.1 dB/cm), ultra-dense integration (μm-scale bends), small polarization dependency (down-to-zero birefringence) and the ability to tolerate relatively high optical powers (>1W). A horizontal Ge PIN photodiode was monolithically integrated on the 3 µm SOI platform. It reached a 3 dB cutoff frequency of 40 GHz and 1.0 A/W responsivity at -1 V bias and 1.55 µm wavelength. Germanium was selectively grown into cavities in the 3 µm SOI layer and the Ge waveguide detector was patterned with the same hard mask with the Si waveguides to achieve waveguide self-alignment. The development of 40 GHz PDs was an important step in improving the feasibility of the 3 µm SOI platform in high-bandwidth applications.
Capacitance-Voltage Measurements on MBE-Grown Ge-SixGe1-x-ySny Heterojunction pn-Diodes for Material Characterisation
Authors: Schwarz Daniel , Funk Hannes Simon , Guguieva Kateryna , Oehme Michael , Schulze Joerg
Published: September 2020

The ternary alloy semiconductor SixGe1-x-ySny presents itself as promising approach towards the monolithic integrated laser light source on the Si platform. SixGe1-x-ySny offers notable properties like the direct bandgap transition at high Sn concentrations and the decoupling of its bandgap and lattice constant. In this paper, we present the growth, fabrication, and electrical characterisation of lattice-matched Ge- SixGe1-x-ySny hetero-junction devices with a Sn concentration up to 12.5 %. The X-ray diffraction analysis of the layers is used to verify the fulfillment of the lattice-matching of the SixGe1-x-ySny growth on Ge. The required crystal quality for working pn-heterojunctions is achieved. The usage of the capacitance-voltage intercept method allowed us the determination of the built-in voltage of the fabricated heterojunction in dependence of the SixGe1-x-ySny composition.
(Invited) Nickel and Nickel-Platinum Silicide for BiCMOS Devices
Authors: Wolansky Dirk , Blaschke Jean-Paul , Drews Jürgen , Grabolla Thomas , Heinemann Bernd , Lenke Thomas , Rücker Holger , Schubert Markus Andreas , Schulze Sebastian , Stoll Heinz-Peter , Zöllner Marvin , Richter Uwe , Deyo Dan
Published: September 2020

The world’s fastest SiGe HBT was presented by Heinemann et al. at IEDM 2016, which was achieved among other measures by NiSi application. The BiCMOS integration of such HBTs requires a careful NiSi adjustment with respect to MOSFET leakage currents. The goal of this paper is to find out a NiSi or NiPtSi process, which results in low RS to increase fmax without degradation of MOSFET leakage currents. An fmax rise is demonstrated by a reduction of NiSi or NiPtSi RS to 4 Ω. A further RS lowering to 1.6 Ω with a corresponding fmax increase was achieved by NiSi layers formed by two-step 300/450°C anneals, which generate elevated MOSFET leakage currents. They can be inhibited for NiSi formed by 200/450°C anneals at the expense of elevated RS. NiPtSi significantly suppresses silicide pipes to the MOSFET channel even for 300/450°C anneals and is a promising choice for upcoming BiCMOS technologies.
Si-Passivated Ge Gate Stacks with Low Interface State and Oxide Trap Densities Using Thulium Silicate
Authors: Zurauskaite Laura , Abedin Ahmad , Hellström Per-Erik , Östling Mikael
Published: September 2020

Ultra-thin epitaxially grown Si layers have been used for Ge surface passivation in CMOS devices utilizing standard silicon SiO2/HfO2 gate stack. In this work, we propose a high-k TmSiO interfacial layer, which has shown excellent performance on Si, instead of the chemical SiO2. We successfully transfer a TmSiO/Tm2O3/HfO2 gate stack from silicon to Si-passivated Ge devices, yielding interface state density of 3·1011 eV-1cm-2, which is comparable to GeOx passivation. Moreover, Si-capped Ge gates with TmSiO interfacial layer achieve significant improvement in oxide trap density compared to GeOx passivation, exhibiting a potential for superior reliability. We further investigate the robustness of Si layer growth process and show that small (±3˚C) variations of growth temperature can be detrimental to the interface state density of the gate stacks.
Sub-nm Near-Surface Activation Profiling for Highly Doped Si and Ge Using Differential Hall Effect Metrology (DHEM)
Authors: Joshi Abhijeet , Basol Bulent M
Published: September 2020

We present Differential Hall Effect Metrology (DHEM) data for very highly phosphorus-doped (~1x1021cm-3) epitaxial Si thin films grown on counter doped Si substrates. Carrier concentration and mobility depth profiles obtained by DHEM showed process conditions suitable for the highest dopant activation and established certain trends for the variation of mobility through the layers. Data was also collected from n-doped Ge epi layers. Reduction of dopant activation in a sample capped by alumina during processing was found to be due to compensating effect of Al diffusing into the film during annealing. Presented data demonstrates the value of DHEM technique for characterization of near-surface dopant activation, especially in low resistance ohmic contact development efforts.
(Invited) GaN Optoelectronic Devices Based on Local Strain Engineering
Authors: Ku Peicheng
Published: September 2020

Local strain engineering and its applications to gallium nitride based optoelectronic devices are reviewed. The strain in gallium nitride heterostructures can be locally controlled via nanostructures and enables a new degree of freedom for the device design. The optical properties including emission wavelength, intensity, polarization can be geometrically tuned by varying the dimensions and shapes of the nanostructure cross sections. The physics, fabrication, optical properties, and challenges of gallium nitride nanostructures are discussed. Device applications are described including single photon sources, multi-wavelength light-emitting diodes, photodetectors for compressive sensing, and tactile sensors.
Underlayer Selection to Improve the Performance of Polycrystalline Ge Thin Film Transistors
Authors: Imajo Toshifumi , Moto Kenta , Yamamoto Keisuke , Suemasu Takashi , Nakashima Hiroshi , Toko Kaoru
Published: September 2020

We fabricated accumulation-mode metal source/drain p-channel thin film transistors using solid-phase crystallized Ge with different thickness formed on glass substrate. By thinning the Ge layer with the largest grain size (3.7 μm), the channel region got fully-depleted, and the TFT exhibited both high on/off current ratio (~102) and field effect mobility (170 cm2 V-1 s-1). We prepared interfacial layers (GeO2 and Al2O3) between Ge and the substrate to achieve a high Hall hole mobility with a thin film, which is the key for improving TFT characteristics. As a result, inserting Al2O3 underlayer improved the electrical properties of thin Ge (50 nm) layers.
Electron Field Emission from Multiply-Stacked Si Quantum Dots Structures with Graphene Top-Electrode
Authors: Niibayashi Tomofumi , Takemoto Tatsuya , Makihara Katsunori , Ohta Akio , Ikeda Mitsuhisa , Miyazaki Seiichi
Published: September 2020

We have fabricated a diode with a multiple stacked Si-QDs structure and a single layer graphene top electrode, and studied their electron field emission properties. Electron emission current from the diode was observed by the application of forward biases of 6.0 V and over, which is ~1.0 V lower than that from a diode with a Au top electrode. In addition, we found that electron emission efficiency was increased by a factor of ~ 100 by replacing the top electrode from Au to graphene. This result is explained by the reduction of electron scattering at the top electrode. The results lead to the development of high efficiency planar-type electron emission devices.
(Invited) Probing Semiconductor Heterostructures from the Atomic to the Micrometer Scale
Authors: Koelling Sebastian , Assali Simone , Atalla Mahmoud , Kumar Aashish , Attiaoui Anis , Lodari Mario , Sammak Amir , Scappucci Giordano , Moutanabbir Oussama
Published: September 2020

Atom Probe Tomography (APT) has significantly advanced our ability to characterize buried interfaces and to map the three-dimensional distribution of atomic constituents like dopants in modern day electronic nano-devices. This precise mapping of the chemical composition and buried interfaces is also highly sought-after in the implementation and optimization of a variety of emerging photonic devices with dimensions of up to several micrometers as opposed to the few ten nanometers of modern day transistors. Herein, we show that APT is poised to contribute to the development of these devices by adapting the Focused Ion beam based preparation of APT specimen, typically used for preparing semiconductor samples. Using in-situ grown nanowires as sacrificial masks during specimen preparation, we demonstrate APT analyses of micrometer-sized volumes of semiconductor heterostructures.
Evaluation of Phonon Dispersion Relation for Bulk Silicon Germanium by Inelastic X-ray Scattering
Authors: Yokogawa Ryo , Takeuchi Haruki , Arai Yasutomo , Yonenaga Ichiro , Uchiyama Hiroshi , Ogura Atsushi
Published: September 2020

We report on phonon dispersion curves of bulk silicon germanium (Si1-x
Ge
x
) alloy with the x value of 0.16, 0.32, 0.45, and 0.72 obtained by inelastic x-ray scattering (IXS) with synchrotron radiation. All phonon dispersion relations of optical (Ge-Ge, Si-Ge, Si-Si modes) and acoustic modes were observed along the Γ-X ([00q]) direction obtained by energy positions of IXS spectra. The phonon dispersion curves of bulk Si1-x
Ge
x
showed behaviors similar to those of pure Si and Ge. We also confirmed Ge fraction dependence of acoustic modes and revealed that the acoustic phonon energies are located between those of pure Si and Ge. From the above, it has been suggested that low thermal conductivity of SiGe alloy may contribute to phonon lifetime rather than group velocity.
Evaluation of Temperature and Germanium Concentration Dependence of EXAFS Oscillations in Si-Rich Silicon Germanium Thin Films
Authors: Yoshioka Kazutoshi , Yokogawa Ryo , Koharada Masato , Takeuchi Haruki , Ogasawara Gai , Hirosawa Ichiro , Watanabe Takeshi , Ogura Atsushi
Published: September 2020

We measured the influence of the germanium (Ge) nearest neighbor atom on the lattice vibration of silicon germanium (SiGe) thin films on silicon substrate, which is expected as a material for next-generation electronic and thermoelectric devices, by x-ray absorption fine structure measurement. The amount of changes in the Debye-Waller factor (Δσ
2) of each sample were estimated from the obtained extended x-ray absorption fine structure spectra, and it was experimentally clarified that the lattice vibration of the SiGe films were different from that of Ge. On the other hand, it is considered that the lattice vibration of the SiGe films were suppressed by the compressive strain, since Δσ
2 have hardly changed with the Ge concentration. The Einstein temperature estimated from Δσ
2 decreased with increasing Ge concentration, suggesting that the thermal conductivity of SiGe film can be controlled by Ge concentration.
Evaluation of Thermal Expansion Coefficient in Ge1-x
Sn
x
Nanowire Using Reciprocal Space Mapping
Authors: Ogasawara Gai , Yokogawa Ryo , Hirosawa Ichiro , Yoshioka Kazutoshi , Takahashi Yuki , Suda Kohei , Ogura Atsushi
Published: September 2020

We evaluated the thermal expansion coefficients in germanium tin (Ge1
-

x
Sn
x
) nanowire and blanket (un-patterned) film formed on Ge (001) substrate by X-ray diffraction measurement with synchrotron radiation. It was found that the thermal expansion coefficients of Ge0.968Sn0.032 are different in directions between parallel and normal to Ge substrate surface. Effect on anisotropy of lattice parameters on the anisotropic thermal expansion coefficient of Ge0.968Sn0.032 is also clarified, and the largest anisotropy was observed in blanket film.
Characterization of Magnetic-Field Dependent Electron Transport of Fe3Si Nanodots by Using a Magnetic AFM Probe
Authors: Wu Jialin , Zhang Hai , Furuhata Hiroshi , Makihara Katsunori , Ikeda Mitsuhisa , Ohta Akio , Miyazaki Seiichi
Published: September 2020

We successfully fabricated Fe3Si-nanodots (NDs) on ultrathin SiO2 and evaluated their electron transport characteristics under magnetic field application by using atomic force microscopy (AFM) with a CoPtCr-coated cantilever. High density Fe3Si-NDs with an areal density as high as ~1011 cm-2 were formed on thermally grown SiO2 layer by exposing ultrathin Fe film on pre-grown Si-NDs to a remote hydrogen plasma without external heating. From local electron transport properties measured by the magnetic AFM tip, a clear change in resistance depending on the relative magnetization direction of Fe3Si-NDs with respect to the CoPtCr-coated AFM tip was confirmed at room temperature.
Crystallization of Ge Thin Films on Sapphire(0001) by Thermal Annealing
Authors: Sugawa Hibiki , Ohta Akio , Kobayashi Masato , Taoka Noriyuki , Ikeda Mitsuhisa , Makihara Katsunori , Miyazaki Seiichi
Published: September 2020

We have investigated an impact of thermal annealing in N2 ambience on crystallization of a Ge thin layer with a thickness below 10 nm formed on Sapphire substrate. A SiO2/Ge/Sapphire(0001) structure was prepared by RF sputtering of a Ge thin layer and ALD of a SiO2 capping layer. From the Raman scattering spectroscopy and AFM analyses of the SiO2/Ge/Sapphire(0001) structure before and after the annealing at the temperature in the range from 600°C to 900°C, crystallization of the Ge thin layer and change in the surface morphology has been discussed. And, two-step annealing was found to be effective to grow the Ge crystal layer with keeping surface flatness.
Impact of Passivation System on Device Performance and Proton Radiation Hardness in GaN-Based MIS-HEMTs
Authors: Chang Sung-Jae , Jung Hyun-Wook , Cho Kyu Jun , Kang Soo Cheol , NOH Youn Sub , Lee Sang-Heung , Kim Seong-il , Kim Hae Cheon , Ahn Hokyun , Lim Jong-Won
Published: September 2020

The impact of the passivation system on the device performance has been studied in GaN-based MIS-HEMTs using SiN/Al2O3 bi-layered passivation. The deposition of SiN and Al2O3 passivation layer induced the compressive and tensile stress on GaN channel layer, respectively. Through the Al2O3 deposition on top of SiN layer, the mechanical stress and device characteristics were modulated. The device properties such as carrier mobility and concentration at the hetero-interface were ameliorated when the slight tensile stress was applied on the GaN channel compared to the compressive stress. The proton radiation hardness corresponding to the passivation system was also researched. The SiN/Al2O3 passivation system exhibited stronger immunity to the proton radiation than that of SiN passivation due to the superior dielectric quality of Al2O3. These results highlight that the SiN/Al2O3 bi-layered passivation is promising technique for the optimization of the device performance and improvement of proton radiation hardness in GaN-based MIS-HEMTs.
Observation of an Unidentified Phonon Peak in SiGe Alloys and Superlattices Using Molecular Dynamics Simulation
Authors: Chung Sylvia Yuk Yee , Tomita Motohiro , Yokogawa Ryo , Ogura Atsushi , Watanabe Takanobu
Published: September 2020

Molecular dynamics was applied to a variety of SiGe alloys and superlattice structures in order to investigate the production of an unidentified phonon mode. The mode in question, observed in the resulting phonon dispersion relations, was produced around 2.5 – 5 THz. The corresponding spectral energy density data for the SiGe alloys produced varying intensities around this region, with a higher intensity tending towards lower thermal conductivity values. The unidentified mode was produced by the alloy and the non-periodic superlattice structures, whereas in the case of the periodic superlattices, the mode is less conspicuous. Regarding the SiGe compound, the mode was not produced. It is concluded that the atomic disorder within the alloys and non-periodic superlattices induce a stronger intensity of the unidentified mode.
The Structural Evolution of Dot-Core GaN Substrates with Annealing Under Growth-Like Conditions
Authors: Liao Michael Evan , Huynh Kenny , Wang Yekan , Allerman Andrew A. , Goorsky Mark S.
Published: September 2020

Monochromatic X-ray topography was employed to study the structural evolution of c-plane dot-core GaN substrates with annealing under growth-like conditions at 1050°C for 10 hours. The measurements were performed at the 1-BM beamline of the Advanced Photon Source, Argonne National Laboratory using the (11_24) GaN asymmetric reflection to generate single exposure images (images exposed at a specific ω angular position along the X-ray rocking curve) as well as rocked images (a composite image exposed at many positions along the rocking curve). The anneal was found to flatten the lattice curvature both globally across the entire substrate as well as locally across and in between the individual cores. The radius of lattice curvature across the substrate changed from 17 ± 1 m to 27 ± 2 m after the anneal. The reduction in lattice curvature is indicative of a benefit of annealing on the structural characteristics of dot-core GaN substrates.
Synchrotron X-ray Topography Characterization of Commercial GaN Substrates for Power Electronic Applications
Authors: Liu Yafei , Hu Shanshan , Peng Hongyu , Ailihumaer Tuerxun , Raghothamachar Balaji , Dudley Michael
Published: September 2020

Commercial GaN substrates from different vendors were characterized by synchrotron X-ray topography (XRT) as well as high resolution X-ray diffraction (HRXRD) to evaluate their defect and strain distributions. Synchrotron monochromatic beam X-ray topographs reveal the various dislocation types and their distribution in the GaN materials grown by different methods. By correlating the dislocation contrast with ray-tracing simulation results, the Burgers vectors of dislocations were successfully determined. The ammonothermal-grown GaN material using native seed show the highest quality with low dislocation densities. Patterned HVPE GaN wafers have heterogeneous distribution of dislocations with large areas of low threading dislocation densities. Regular HVPE GaN substrate and ammonothermal GaN grown on an HVPE GaN seed show a very high level of strain, and the dislocation densities are much higher than ammonothermal and patterned HVPE samples.
(Invited) Ruggedness of SiC and GaN Power Transistors in Switching Based Tests
Authors: Zhang Ruizhe , Kozak Joseph , Liu Jingcun , Zhang Yuhao
Published: September 2020

Currently, a spectrum of reliability tests are being performed by both device manufacturers and end users. Many of these qualification tests are operated within the device safe-operating-area (SOA), however, the devices often undergo dynamic events in many converter applications that can exceed the SOA boundaries. This paper presents our recent work on quantifying the out-of-SOA robustness of GaN power high-electron-mobility transistors (HEMTs) and SiC power MOSFETs by switching based tests. The unclamped inductive switching stresses are applied to p-gate GaN HEMTs to evaluate their surge-energy and overvoltage robustness. The continuous, hard-switching, turn-off stresses are applied to SiC MOSFETs to evaluate their overvoltage switching robustness. Both experiments demonstrate the robustness of SiC and GaN devices under out-of-SOA switching events, and the physics of degradation and failure are understood.
(Invited) A Path Toward Vertical GaN Superjunction Devices
Authors: Khachariya Dolar , Szymanski Dennis , Reddy Pramod , Kohn Erhard , Sitar Zlatko , Collazo Ramon , Pavlidis Spyridon
Published: September 2020

GaN devices offer exciting competition to incumbent technologies to meet the growing demand for high power electronic devices. The wide bandgap of GaN makes it possible to achieve higher breakdown voltages and reduced on-resistances compared to traditional Si in unipolar devices, as predicted by the classical Baliga figure of merit (BFOM). However, unipolar performance limits can be circumvented using the superjunction (SJ), which has been demonstrated experimentally in both Si and SiC. Due to the current difficulties with selective area doping in GaN, experimental reports of vertical GaN SJs are lacking. In response, we propose the use of the lateral polar junction (LPJ), which is unique to III-Nitrides, to create next-generation vertical GaN SJ devices. We develop a model that provides first order design equations for such a device, and validate it using TCAD simulations of a 1.2 kV diode. A proposed manufacturing approach for LPJ-based GaN SJ is provided.
III-Nitride Based Narrow Band Far-UVC LEDs for Airborne and Surface Disinfection
Authors: Bui HA Quoc Thang , Velpula Ravi Teja , Jain Barsha , Nguyen Hieu Pham Trung
Published: September 2020

Narrow-band far-ultraviolet C (λ = 200-230 nm) light-emitting diodes (far-UVC LEDs) are strongly detrimental to airborne pathogen like bacteria and viruses while minimally invasive to human health so they can be used as a disinfectant to suppress the outbreak of infectious diseases with minimum safety concerns. Herein, we investigate a design of AlGaN/AlN nanowire structure in combination with a bandpass filter for a narrow band far-UVC LED at 222 nm center wavelength. The LED achieves an ultra-narrow full width at half maximum (FWHM) of ~12 nm after introducing a metal-dielectric Fabry-Perot optical bandpass interference filter with three periods of Al/MgF2/Al layers. The electrical and optical properties of the nanowire LEDs show the high performances with an internal quantum efficiency (IQE) up to 80% and the maximum power exceeding 10 mW at a current injection of 60 mA. This narrow-band far-UVC LED is a promising candidate for airborne and surface disinfection in occupied spaces to prevent the spread of contagious diseases.
(Invited) Heterogeneous Integration of Silicon CMOS Electronics and Compound Semiconductor Electronics for Miniature RF Photonic Transceivers
Authors: Nordquist Christopher D , Skogen Erik , Fortuna Seth , Hollowell Andrew E , Hemmady Caroline , Saugen Justine , Forbes Travis , Wood Michael G , Jordan Matthew , McClain Jaime , Lepkowski Stefan , Alford Charles , Peake Gregory , Pomerene Andrew , Long Christopher M , Serkland Darwin , Dean Kenneth A
Published: September 2020

Heterogeneous Integration (HI) may enable optoelectronic transceivers for short-range and long-range radio frequency (RF) photonic interconnect using wavelength-division multiplexing (WDM) to aggregate RF signals, provide galvanic isolation, and reduce crosstalk and interference. Integration of silicon Complementary Metal-Oxide-Semiconductor (CMOS) electronics with InGaAsP compound semiconductor photonics provides the potential for high-performance microsystems that combine complex electronic functions with optoelectronic capabilities from rich bandgap engineering opportunities, and intimate integration allows short interconnects for lower power and latency. The dominant pure-play foundry model plus the differences in materials and processes between these technologies dictate separate fabrication of the devices followed by integration of individual die, presenting unique challenges in die preparation, metallization, and bumping, especially as interconnect densities increase. In this paper, we will describe progress towards realizing an S-band WDM RF photonic link combining 180 nm silicon CMOS electronics with InGaAsP integrated optoelectronics, using HI processes and approaches that scale into microwave and millimeter-wave frequencies.
Characterization of Hazy Morphology on AlInP/GaAs Epitaxial Wafers Grown by Organometallic Vapor Phase Epitaxy
Authors: Peng Hongyu , Ailihumaer Tuerxun , Liu Yafei , Raghothamachar Balaji , Dudley Michael
Published: September 2020

6-inch AlInP/GaAs epitaxial wafers grown by organometallic vapor phase epitaxy (OMVPE) technique are being developed for light emitting diodes (LEDs) applications. Defects such as dislocations and inclusions have been characterized by synchrotron X-ray topography. Burgers vector and line direction of the dislocations were determined by ray-tracing simulation. Moreover, epilayer surface of the samples grown under higher pressure reveals a hazy morphology, which is rougher compared to regular clear regions. Synchrotron X-ray topographs of the hazy regions showed blurred contrast, indicating disordered lattice arrangement. Internal structure of the hazy regions was studied by reciprocal space mapping (RSM), where weakened and broadened peaks around the clear epilayer peak were observed using 004 reflection, indicating continuously varying strain and tilt between the hazy region and the clear region.
Analysis of Dislocations in PVT-Grown 6H-SiC through Grazing-Incidence X-Ray Topographic Images and Ray-Tracing Simulation
Authors: Cheng Qianyu , Ailihumaer Tuerxun , Peng Hongyu , Liu Yafei , Raghothamachar Balaji , Dudley Michael
Published: September 2020

The superior electronic and physical properties of silicon carbide (SiC) enabled successful applications in electronic and optoelectronic applications. Therefore, understanding the nature and behavior of different dislocations is of great significance towards crystal quality enhancement and device degradation prevention. In this study, synchrotron monochromatic beam X-ray topography (SMBXT) analysis was carried out on a PVT-grown 6H-SiC wafer for recording its grazing-incidence images of all six different 1 1 2‾12 reflections. The distribution of TSDs, TEDs, TMDs and BPDs has been observed on topographic images, and characterized through correlation with ray-tracing simulation. The conjunction of topographic and simulated images in this study has successfully accomplished a direct Burgers vectors determination approach for each type of dislocations, which can provide crucial information for quality improvement of crystal.
(Invited) Hot Carrier Phenomena in Oxide Thin-Film Transistors
Authors: Tanaka Jun , Fujii Mami N. , Miyanaga Ryoko , Takahashi Takanori , Uraoka Yukiharu , Takechi Kazushige , Tanabe Hiroshi
Published: September 2020

We observed hot carrier-induced photon emissions in oxide TFTs with structures of BCE-type and TG-type for the first time in addition to ESL-type. In this paper, the effects of these TFT structures on the hot carrier phenomena are described using TFT characteristics, photon-emission analysis, and TCAD simulation. We observed the degradation of TFT characteristics in BCE-type and TG-type, which was similar to that in Si-based devices, along with the photon emission. In contrast, for the ESL-type, we found the behavior depending on the drain–ESL overlap length. When this overlap length was under 1µm, photon emission and no significant shift of TFT characteristics were observed; however, when it was 3µm, no photon emission and a significant shift of TFT characteristics were observed. Based on the potential distributions near the drain obtained by the TCAD simulation, we propose the degradation mechanism of ESL-type depending on the drain–ESL overlap length.
Characteristics and Applications of CAAC-IGZO FET with Gate Length of 13nm
Authors: Suzuki Akio , Yuichi Yanagisawa , Mizukami Shota , Tsuda Kazuki , Ito Minato , Ohshima Kazuaki , Matsumoto Noriko , Yakubo Yuto , Miyata Shoki , Okuno Naoki , Kunitake Hitoshi , Sasagawa Shinya , Ikeda Takayuki , Yamazaki Shunpei
Published: September 2020

A field-effect transistor (FET) with a gate length of 13 nm having a c-axis aligned crystalline In-Ga-Zn oxide (CAAC-IGZO) channel was fabricated. The CAAC-IGZO FET has an off-state leakage current of 200 yA/μm, a cutoff frequency of 60GHz, and a maximum oscillation frequency of 16GHz. A CAAC-IGZO FET, though it is a small transistor, withstands voltages up to approximately 2.5 V. It also has stable current characteristics with less temperature dependence than Si devices. We have constructed an equivalent-circuit model of the CAAC-IGZO FET and designed an RF amplifier to show CAAC-IGZO FET's applicability to the GHz-range RF circuitry.
(Invited) UV and Gate Stress Induced Defects in Amorphous Indium Gallium Zinc Oxide Thin Film Transistors and Self-Repair
Authors: Jiang Jingxin , Kuo Yue
Published: September 2020

Defects were generated in the amorphous indium gallium zinc oxide thin film transistor under combined ultraviolet light illumination and gate bias stress conditions, which showed as the positive shift of the threshold voltage and the increase of the threshold swing. When exposed to the ultraviolent light without or with the positive gate voltage bias, positively charged defects were quickly generated and saturated at the gate dielectric interface. Majority of these defects were self-repaired at room temperature under air exposure within 5 minutes. On the other hand, under the ultraviolent exposure and negative gate voltage bias condition, two types of defects were generated, i.e., those loosely trapped at the interface and those deeply trapped in the bulk of the gate dielectric layer. At room temperature, the former were quickly self-repaired and the latter were slowly self-repaired. All defects were removed when annealed at 200°C. The understanding of the defect generation and removal mechanism is important for practical applications of this type of oxide thin film transistor.
(Invited) Device Scalability of InGaZnO TFTs for Next-Generation Displays
Authors: Oh Saeroonter , Kim Su Hyun , Kim Mingoo , Yu Sang Min , Choi Youngjoon , Park Joon Seok , Lim Jun Hyung
Published: September 2020

Device scaling of thin-film transistors has only recently gained attention, as the need has grown for shorter channel lengths in hybrid integration applications as well as a performance enhancer in future displays. In this study, we study the device scalability of short-channel top-gate oxide TFTs down to 1 mm, with particular focus on the carrier profile at the channel edges. We propose a carrier profile extraction method by utilizing comprehensive simulation fitting of the effective channel length, threshold voltage roll-off to the measured and extracted values. We find that the effective channel length plays an important role at short-channel lengths, and the scalability can be improved by adjusting the process-dependent carrier concentration profile.
(Invited) Highly Stable Self-Aligned Top-Gate Indium Gallium Zinc Oxide Thin-Film Transistors for High-Resolution OLED TV and Mobile Displays
Authors: Kim Jung Bae , Tsai Yun-chu (Pipi) , Lim Rodney , Wang Zhiyuan , Hao Mei , Wang Sheng-Wen (Gordon) , Park Jung Woo , Zhao Lai , Bender Marcus , Yim Dong Kil , Choi Soo Young
Published: September 2020

Highly stable self-aligned coplanar top-gate InGaZnO (IGZO) thin-film transistors (TFTs) with excellent threshold voltage (Vth) uniformity are developed by optimizing gate insulator film properties and controlling oxygen/hydrogen diffusion into IGZO channel. The TFTs do not show notable negative Vth shift and Vth non-uniformity from channel length 10 µm down to 3 µm. The TFTs also show no notable Vth shift during a humidity test in a chamber at 85°C/85% after deposition of passivation layers or even after 1-µm-thick thin-film encapsulation (TFE) SiNx layer on the top of the passivation layer due to the high quality/low hydrogen 2nd SiNx passivation layer deposited on the top of 1st SiOx passivation layer.
Interpretation of Donor Activation in Boron and Argon Implanted Self-Aligned Bottom-Gate IGZO TFTs
Authors: Kabir Muhammad Salahuddin , Chowdhury Rahnuma Rifat , Manley Robert G. , Hirschman Karl D.
Published: September 2020

This work provides an interpretation of donor activation in self-aligned bottom-gate (SA-BG) Indium-Gallium-Zinc Oxide (IGZO) TFTs with ion-implantation of boron (11B+) and argon (40Ar+) species as the source/drain treatment. Device fabrication strategies that switched the order of ion implantation and passivation annealing processes were investigated. Hypotheses in the mechanisms involved with donor activation have been developed from observed similarities and differences in the electrical operation of SA-BG TFTs fabricated using both implant-last and anneal-last approaches. Results suggest a defect-induced mechanism is responsible for donor behavior associated with argon implantation, whereas donor behavior associated with boron is attributed to the formation of an electrically active donor species involving chemical bonding. A detailed discussion on developed arguments arrived at through analysis of TFT electrical characteristics is presented. Materials analysis in support of the interpretation and associated arguments is in progress.