bluuebunny/crossref_metadata_2025 huggingface dataset:
Improvement of Dielectric Performance of a Prototype AlN High Temperature Chip-level Package
Authors: Chen Liang-Yu
Published: October 2015

Aluminum nitride (AlN) has been proposed as a packaging substrate material for reliable high temperature electronics operating in a wide temperature range. However, it was discovered in a recent study that the dielectric properties of some commercial polycrystalline AlN materials change quite significantly with temperature at high temperatures. These material properties resulted in undesired large and temperature-dependent parasitic parameters for a prototype chip-level package based on an AlN substrate with the yttrium oxide dopant. This paper reports a method using a coating layer of a commercial thick-film glass on the AlN substrate surface to significantly reduce both the parasitic capacitances and parasitic conductances between neighboring inputs/outputs (I/Os) of a prototype AlN chip-level package. The parasitic parameters of 8-I/Os low power chip-level packages with the insulating glass coating were characterized at frequencies from 120 Hz to 1 MHz between room temperature and 500°C. These results were compared with the parameters of AlN packages without the glass coating. The results indicate that the parasitic capacitances and conductances between I/Os of the improved prototype AlN packages are significantly reduced and stable at high temperatures. The method using a glass coating provides a feasible way to mitigate the temperature dependence of dielectric properties of AlN and further utilize AlN as a reliable packaging substrate material for high temperature applications.
High Temperature Silicon-on-Insulator Gate Driver for SiC-FET Power Modules
Authors: Mayorga J. Valle , Gutshall C. , Phan K. , Escorcia I. , Mantooth H. A. , Reese B. , Schupbach M. , Lostetter A.
Published: October 2015

SiC power semiconductors have the capability of greatly outperforming Si-based power devices. Faster switching and smaller on-state losses coupled with higher voltage blocking and temperature capabilities, make SiC a very attractive semiconductor for high performance, high power density power modules. However, the temperature capabilities and increased power density are fully utilized only when the gate driver is placed next to the SiC devices. This requires the gate driver to successfully operate under these extreme conditions with reduced or no heat sinking requirements, allowing the full realization of a high efficiency, high power density SiC power module. In addition, since SiC devices are usually connected in a half or full bridge configuration, the gate driver should provide electrical isolation between the high and low voltage sections of the driver itself. This paper presents a 225 degrees Celsius operable, Silicon-On-Insulator (SOI) high voltage isolated gate driver IC for SiC devices. The IC was designed and fabricated in a 1 μm, partially depleted, CMOS process. The presented gate driver consists of a primary and a secondary side which are electrically isolated by the use of a transformer. The gate driver IC has been tested at a switching frequency of 200 kHz at 225 degrees Celsius while exhibiting a dv/dt noise immunity of at least 45 kV/μs.
High Temperature Silicon Carbide CMOS Integrated Circuits
Authors: Thompson R.F. , Clark D.T. , Murphy A.E. , Ramsay E.P , Smith D.A , Young R.A.R. , Cormack J.D. , McGonigal J. , Fletcher J. , Zhu C. , Finney S. , Martin L.C. , Horsfall A.B.
Published: October 2015

The wide band-gap of Silicon Carbide makes it a material suitable for IC's [1] operating up to 450°C. The maximum operating temperature achieved will depend on the transistor technology selected, interconnect metallisation and device packaging. This paper describes transistor and circuit results achieved in SiC CMOS technology, where the major issue addressed is the gate dielectric performance.

N and p-channel MOSFET structures have been demonstrated operating at temperatures up to 400°C Test circuits including simple logic cells, ring oscillators, operational amplifiers and gate drive circuits have been fabricated and the characteristics of ring oscillators are presented here. Floating capacitor structures have also been fabricated for use in future analogue and mixed signal circuits.

This technology will be initially applied in applications including signal conditioning for sensors and control of SiC based power switching devices, where the high temperature capability will match that of the SiC power devices which are now becoming commercially available.
Optimizing the performance of the Au-Si system for high temperature die attach applications
Authors: Sousa M.F. , Riches S. , Johnston C. , Grant P.S.
Published: October 2015

The operation of electronic packages under exceptionally harsh environments presents a significant challenge for the microelectronics industry, for example, in down-hole, well-logging and turbo-machinery applications. High temperature Au based solders are one potential candidate for die attachment for harsh environments and is already used in limited cases. For Au-Si die bonding, some of the Si is provided by diffusion from the Si die itself. Therefore, the interfacial reaction between the Si and Au-Si thin foil solder preform is a key factor in the control of the die bonding process. Unfortunately, during the die bonding process, defects such as voids, delaminations, and impurities are not unusual. These defects are caused by the assembly process, chemical impurities, soldering reactions, and thermal stresses. Understanding these defects is critical for the reliable performance of the devices after bonding. In this paper, optimization of the Au-Si eutectic die bonding has been performed and near 100% bonded area confirmed by scanning acoustic microscopy achieved consistently. Die attach reliability was investigated by thermal shock and thermal cycling treatments, after which the bonded area showed some signs of degradation. Shear strength testing and microstructural analysis were also carried out. Die bond optimisation gave a significant improvement in both bonded area and reliability.
A Fully Functional Extreme Environment SiC Wireless Temperature Sensing System
Authors: Yang Jie , Fraley John R , Western Bryon , Schupbach Roberto M.
Published: October 2015

Researchers at Arkansas Power Electronics International, Inc. (APEI, Inc.) have designed and developed a patent pending Silicon Carbide (SiC) wireless temperature sensing system that is capable of operation under extreme temperature and mechanical loads, such as inside a gas turbine engine. High operating temperatures and centrifugal forces in the tens of thousands within the region of the gas turbine engine where the circuits are to be located, exceed the capability of Silicon-on-Insulator (SOI) integrated circuits. The system is designed to be non-intrusively embedded within the turbine engine to provide real-time health monitoring of critical turbine engine components.

The SiC based wireless temperature sensing system is designed in conjunction with a high temperature thermocouple to acquire the temperature information on turbine blades or other components inside turbine engine. It has been verified through high temperature laboratory testing, up to the desired temperature level. The combination of this extreme temperature wireless telemetry technology and integrated harsh environment sensors will allow for specific in-situ maintenance of power generation and aircraft turbines during field operation. This combination can also be applied to many other industries that require extreme environment monitoring and maintenance, one example would be nuclear reactors. This form of preventative maintenance may help to reduce maintenance cost, increase operational safety, and prevent possible catastrophic failures.
STROMBOLI®: a new platform for Isolated DC-DC Converters with reliable operation from −55°C up to 225°C
Authors: Delatte Pierre , Saib Aimad , Vanzieleghem Etienne , Doucet Jean-Christophe
Published: October 2015

This paper presents a new high-temperature isolated DC-DC converter platform called STROMBOLI®. It also discusses how this converter can be associated with the various solutions proposed by CISSOID for Point-of-Load (POL) regulators that can be either linear or switched mode. STROMBOLI® has been optimized to efficiently convert input voltages up to 350V into multiple output voltages up to +/−25V. As an example, in a +/−12V symmetrical output configuration, standard STROMBOLI® can deliver 25W with efficiencies up to 70% at 225°C. The galvanic isolation between input and outputs is at least 10MΩ at 500V. As the main objective of this development was to provide designers with a solution highly flexible, scalable, and easily adaptable to their specific requirements, we selected well-known and robust flyback architecture. Efficiency has been optimized thanks to synchronous rectification. However it can be replaced by a standard rectification in order to reduce the bill-of-material (BOM). A magnetic feedback provides the output voltage temperature stability and the load regulation. STROMBOLI® also includes an Under-Voltage-Lockout (UVLO) function and the pulse-by-pulse current sensing provides intrinsic output current limitation in case of overload or short-circuits. STROMBOLI® is a state-of-the-art, turnkey reference design suitable for 225°C reliable operation and is part of high temperature DC-DC converters VOLCANO family.
SiC Lateral Diodes for ESD Protection of High Temperature Integrated Circuits
Authors: Ghandi Reza , Chen Cheng-Po (Paul) , Kashyap Avinash S. , Andarawis Emad
Published: October 2015

Lateral diode based electrostatic discharge (ESD) protection for silicon-on-insulator (SOI) circuits suffer from high leakage currents at elevated temperatures. This may degrade the performance of SOI based integrated circuits and can also limit the life of the system. Wide bandgap materials such as silicon carbide (SiC) can potentially mitigate this problem because of their low intrinsic carrier concentrations. In this study, lateral SiC diodes have been fabricated and evaluated at high temperatures for ESD protection. The leakage level of SiC lateral diodes with an active area of 700 μm2 is shown to be as low as 1 pA at 200 °C and 25 pA at 300 °C. Furthermore, based on circuit simulations, the number of lateral SiC diodes required to protect against an ESD event (human body model) at 2kV was determined to be 20 devices. Under reverse bias conditions (at 20V), these diodes would have a total leakage current of 20 pA at room temperature and 500 pA at 300 °C. .
Experimental reliability studies and SPICE simulation for EEPROM at temperatures up to 450 °C
Authors: Kelberer A. , Dreiner S. , Grella K. , Dittrich D. , Kappert H. , Vogt H. , Paschen U.
Published: October 2015

The paper presents reliability studies of single polysilicon EEPROM cells at temperatures from 50 °C to 450 °C. The technically challenging measurements at elevated temperatures above 250 °C have been carried out for accelerated reliability studies. Furthermore, a SPICE macro model has been extended to the wide temperature range to describe the retention and endurance performance of the memory cell and to enable a better insight into the physics involved.
Enabling Bulk Silicon CMOS Technology for Integration, Reliability, and Extended Lifetime at High Temperature
Authors: Lowther Rex , Gifford David , Morris Wesley , Jensen Jim , Peterson Scott , Atkinson Kevin
Published: October 2015

Silicon Space Technology has developed a commercial bulk CMOS process technology, HardSIL™, which allows optimization of performance, power, and lifetime at high temperatures. A method for preventing latchup, originally developed for use in the space radiation environment, is presently applied to terrestrial high-temperature environments. With the possibility of latchup eliminated in scaled CMOS technology nodes, further designs specific for high-temperature environments have proceeded well. This novel technology has been applied to our 18Mb synchronous burst SBRAM and our ARM® Cortex® M0 microcontroller, and in two CMOS processes at the 130nm technology node (Texas Instruments and GLOBALFOUNDRIES). Extensive temperature testing on these parts demonstrates that bulk silicon CMOS technology has a practical temperature limit of 250°C or higher.

Both the microcontroller and the SBRAM have been tested with clock rates up to 70MHz and at temperatures up to 260°C. Both parts have performed without error and without latchup under these conditions, and with low operating current and low leakage current. For example, the 130 million-transistor 18Mb SBRAM has average core leakage current of 580mA at 250°C and core voltage of 1.5V with test lots and simulations showing further reduction in leakage in the next, terrestrial version of this part. In addition, the 18Mb SBRAM is undergoing an endurance test at 250°C, presently at the 2500 hour milestone. Operation at temperatures beyond the present limit of the testing equipment (260°C) appears possible from extrapolation of current data.

Integration levels of greater than 8 million gates on a bulk CMOS device would allow multi-core processors with large on-chip secondary caches. Additional DSP engines or other compute engines can be accommodated for processing high resolution three dimensional images in real time. This would provide substantial distributed processing in drilling or jet engine control. These system-on-chip (SOC) integration levels can substantially reduce mechanical failures in a subsystem by reducing the number of wire bonds from greater than 1000 connections to less than 100 connections. Integration of mixed-signal A/Ds and D/As as well as on-chip power management provides a path to further reduction in mechanical connections in a sub-system.
The Design and Characterization of an 8-bit ADC for 250°C Operation
Authors: Reed Lynn , Hoenig John , Reddy Vema
Published: October 2015

Many high temperature applications require the measurement of analog voltages. This usually requires the integration of an ADC into the design. While the temperature degradation in performance of digital circuits is well known, the effects of temperature on analog circuitry are much harder to predict. Analog design is often an iterative process in which the characterization knowledge of a fabricated design is used to improve the next iteration of the design. This paper presents the results of the most recent iteration.

This paper describes how the design of an existing 8-bit ADC was optimized for the SOI process. It also presents the characterization of the ADC at various temperatures up to 250°C and shows the effects of increased leakage on the ADC parameters of linearity, accuracy, and conversion speed.

The ADC discussed is a successive approximation design which uses a resistive DAC. The design was modified to take advantage of the resistive characteristics inherent in the SOI process. Specifically, the DAC resistors were formed using N-type diffusion because of their superior matching as compared to using poly. The analog circuitry in the DAC switching and in the comparator required carefully choosing where to use “A” type versus “H” type transistor geometries to prevent inadvertent SCR failures. The ADC design also included a serial interface circuit that facilitates measurements within an oven by minimizing the number of connections required for operation.

The measurements were taken using a 12-bit DAC to generate the analog input voltages to the 8-bit ADC under test. The ADC digital output was compared to the digital input to the DAC. All 4096 measurement points were taken at each voltage and temperature step. The results of these measurements were post-processed to extract the characterization data.

There is a discussion of the results, the effects of leakage on those results, and how these effects might be overcome to produce more accurate ADC circuits in the future.
Bonding strength of Cu/Cu joints using micro-sized Ag particle paste for high-temperature application
Authors: Nishikawa H. , Liu X. , Wang X. , Fujita A. , Kamada N. , Saito M.
Published: October 2015

High-temperature joining is a key technology for electronic component assembly and other high-temperature applications. Recently, focusing on the sintering behavior of metal particles, the joining process using a nanoparticle paste has been proposed as an alternative to establish a new joining technology for high-temperature applications. In this study, a feasibility study was conducted to determine whether chestnut-burr-like microscale Ag particles can be used for joint material, and the shear strength of the Cu-to-Cu joints was investigated. Then, the interfacial microstructure of the joints using the microscale particle paste was examined. As a result, joining using microscale Ag particles was successfully achieved and the shear strength of more than 20 MPa was obtained under nitrogen atmosphere.
Novel PCM-based coating for thermal management of high temperature electronic assemblies
Authors: Novikov A. , Strehse C. , Lexow D. , Nowottnick M.
Published: October 2015

The electronic components are exposed nowadays increasingly higher temperatures. On one site the power density is increasing and on the other site the electronic appliances are used in more and more harsh environments with high temperature loads. In worst case the combination of both can quickly lead to exceeding the critical temperature resulting in damage and total failure. There are a lot of investigations to increase the robustness of certain elements, like semiconductor and packaging materials, interconnections and PCB. Another approach for increasing the reliability of power electronic modules is the development of sophisticated thermal management system. Traditional cooling methods are coming up to their limits in high integrated electronic modules. A possible solution is the use of latent heat storage materials (PCM - phase change materials), which can be fully integrated into a compliant selective coating of critical electronic components [1], [2]. During phase change process the temperature peaks can be effectively smoothed by adsorbing and releasing the heat. This results directly in increasing of number of cycles until end of life.
High Temperature Dielectric Properties of Polyimide/Boron Nitride Nanocomposites: Nanoparticle Size and Filler Content Effects
Authors: Saysouk F. , Diaham S. , Locatelli M.-L.
Published: October 2015

An interesting way to improve high temperature polyimides (PI) electrical properties by filling it with boron nitride nanoparticles (BN) is proposed in this study. The filler content (from 0 to 60 vol.%) and the average diameter size (35 nm and 120 nm) of these nanoparticles have been varied. The preparation of the patented PI/BN nanocomposite films was performed following an optimized process in order to obtain a good dispersion of the nanoparticles in the films. The nanocomposite films were electrically characterized in the range 200–350 °C. In the case where the nanoparticles had the smallest size, the DC conductivity and leakage currents decreased from 4 to 6 orders of magnitude when the PI/BN films were compared to the neat PI films. The improvement of this property was obtained by a small amount of nanoparticles (1.6 vol.%). Results also show an increase in the dielectric strength of 1 MV/cm for a filler content of 42 vol.%. In the case where the nanoparticles had a larger size, a small improvement was seen on the DC conductivity and leakage currents. In contrast, the breakdown field was lower than the one of the neat PI, due to aggregate formation within the films.
High Temperature Protection against Unwanted Species within Hermetic Packaging
Authors: Williams Jennifer , Matthey Johnson
Published: October 2015

The need for electronic applications to be able to withstand high temperatures has become more prevalent in recent years. With drilling in the oil and gas industry getting deeper, the operating temperatures are getting higher, with typical geothermal gradients of 25 °C/km.

Temperatures up to 250 °C are often seen by drilling operations, which is putting a greater strain on the electronics and associated packaging. Standard methods of cooling are not viable for these harsh environments, so new technology is required to negate the effects of the extreme temperatures. As well as the use of high temperature stable electronic components, High Temperature Getters are required to remove gaseous contaminants from electronic housings to negate the associated deleterious effect on performance.

The contaminating species to be removed are commonly H2O, CO2, and H2, and sometimes short chain organic molecules. Conventional getter materials can remove damaging species at temperatures up to about 80 °C. New technology is however required to eliminate these species at temperatures up to 250 °C, where existing getter formulations would certainly fail.

Johnson Matthey has developed a range of getters that can remove multiple contaminants at both ambient and elevated temperatures. The first product in the series, HTA 1 can remove water and carbon dioxide. Addition of a metal oxide component in HTA 2 facilitates hydrogen removal at elevated temperatures, with capacities in excess of 70 cm3/g achieved. HTA 3 can adsorb unwanted organic contaminants in addition to removing water and carbon dioxide. HTA 4 is a combined getter capable of eliminating all of the aforementioned contaminant species.

These products, combined with the unique, precision engineered Hi-Rel encapsulation (Figure 1) allow getters to be supplied pre-activated, without the end user needing to apply a thermal treatment prior to use. The product can be fitted into any hermetic device to extend the lifetime, thus decreasing the number of failures within electronic assemblies, improving system reliability and preventing operations being shut down as frequently.
Solid Electrolytic Capacitors Designed for High Temperature Applications
Authors: Hahn Randy , Tempel Kristin
Published: October 2015

For decades the maximum recommended operating temperature of solid electrolytic capacitors was 125°C. Responding to needs in the automotive and downhole drilling industries passive component manufacturers developed surface mount tantalum capacitors rated at 150°C in 2002–2003. Since that time the industry has introduced high temperature capable tantalum capacitors generally in 25°C increments roughly every four years. Today multiple manufacturers have products rated at 230°C poised for market release. The tantalum anode, tantalum pentoxide dielectric and manganese dioxide primary cathode material stand up well to these temperatures, although some optimization of the design and manufacturing process for these materials have been required. The primary challenges encountered when developing solid electrolytic capacitors with high temperature capabilities are associated with the carbon, silver and epoxy encapsulant materials used in conventional surface mount tantalum capacitors. Capacitor manufacturers have taken different paths to overcome these challenges. We have developed a metallized plating process to avoid issues associated with silver paints utilized in conventional Ta capacitors. We have worked with suppliers, or developed in house capabilities, to manufacture the other materials required to withstand the rigors of high temperature applications. This paper will discuss these challenges and provide reliability test data on a recently developed tantalum surface mount series capable of continuous operation at 230°C.
More than Drivers in Motor Drives: Closing the Loop
Authors: Picun Gonzalo , El-Falahi Khalil , Pautrel Christophe , Duse Yoann , Joubert Nicolas , Anotta Anaud , Lemoyne Georget , Ribeyron Simon , Guille Olivier , Thepaut Gregory , Laplace Fabien
Published: October 2015

This paper presents the problematic associated to the design of a complete motor drive, exposing all available and missing blocks at this moment. We proceed by dividing the power drive into basic functions – control, different power supplies, isolated communication, controller interfacing, current monitoring – and we present for each of these functions an implementation example. Implementation examples shown are based on high-temperature X-REL parts such as XTR26020 Isolated Intelligent Gate Driver, XTR40010 Isolated Two Channel Transceiver, XTR30010 PWM Controller, XTR70010 and XTR70020 Low-dropout Linear Regulators and XTR50010 Bidirectional Multichannel Level Translator. A drive solution based on the XTR26020, presented for the first time in this paper, is explained and compared against previous art. Main characteristics of the new linear regulator XTR70020 are presented, showing the best-in-class dropout voltage, which outperforms the closest competitor by a factor of three. For all parts featured, tests results at an ambient temperature up to 230°C (even higher in some cases) are presented.
High Temperature Anisotropic Magnetoresistive (AMR) Sensors
Authors: Pant Bharat B. , Withanawasam Lucky , Bohlinger Mike , Larson Mark , Ohme Bruce W.
Published: October 2015

Magnetic field sensors are employed in down-hole oil, gas, and geothermal well-drilling applications for azimuth sensing, orientation/rotation sensing, and magnetic anomaly detection. Key requirements of these applications include high measurement accuracy in the near-DC frequency regime, high-operating temperatures, high mechanical shock and vibration, and severe size constraints. Silicon manufacturing processes enable the development of rugged components with small size compatible with assembly processes used for adjacent electronics in hermetically sealed hybrid and/or ceramic packages.

Silicon-based magnetic sensors include Anistotropic Magnetoresistive (AMR), Giant Magnetoresistive (GMR) and Tunnelling Magnetoresistive (TMR) sensors. Commercially available GMR and TMR sensors generally cannot be operated much above 150°C. While GMR and TMR have enabled great areal density growth for magnetic recording industry over the past two decades, AMR sensors provide high accuracy measurements in the near-DC regime above 150°C. This is in part due to simplicity of their construction, but also due to their low noise characteristics at low frequencies compared to GMR and TMR. This paper will describe the extension of Honeywell's low noise AMR sensors into high temperature regime up to 225°C.

Sensors being reported have room temperature bridge resistance of ~700 Ω, open loop sensitivity of ~2.5 mV/V-Gauss, with a temperature coefficient of sensitivity of −2500 ppm/°C. The low-frequency minimum detectable field monotonically increases with increasing temperature. At room temperature it is ~2.2 μG/√Hz@1 Hz and reaches a value of ~26μG/√Hz@1 Hz at 225°C. Signal and noise density both increase with increasing sensor bias voltage such that low-frequency signal-to-noise ratio does not vary in the bias voltage range of 2.5 V to 10V.

These sensors have also been configured in a closed loop format using low noise electronics. Measurements of closed loop transfer function in the range of ±0.8 Gauss were made. The sensor was placed in a thermal chamber while the feedback electronics were placed outside at room temperature. The linearity of the transfer function is quite excellent; deviation from linearity increases monotonically with increasing temperature reaching < 0.002% of full scale or 29 μGauss at 225°C. Closed loop operation of a typical sensor shows 1-σ measurement variability of 21 μGauss at 220°C. By a combination of averaging and closed loop operation an input step from 0 to 75 μGauss is replicated at the output to within 0.1 μG at 225°C.
Precision Analog Signal Conditioning Semiconductors for Operation in Very High Temperature Environments
Authors: Arkin Michael , Watson Jeff , Siu Michael , Cusack Michael
Published: October 2015

When designing signal chains for systems exposed to high temperature environments, analog signal processing ICs are needed to enable precision sensor measurements. However, as ambient operating temperatures increase beyond the typical extended-industrial +125°C limit, the performance characteristics of analog semiconductors are strongly impacted by the effects of temperature on circuit design, packaging, and the underlying fabrication process. In this paper we introduce two new precision analog components, an operational amplifier and voltage reference, rated for very high temperature operation. We then discuss the steps taken to ensure their performance at high temperature is robust and can be maintained over a limited lifetime. Finally, we demonstrate these devices utilized in an example application: a constant current source for temperature sensor signal conditioning.
A High Temperature, Frequency Output Silicon Temperature Sensor
Authors: Rose Shane , Hahn Mark
Published: October 2015

Precision high temperature sensors often require temperature compensation. Quartzdyne pressure transducers use a temperature sensitive quartz crystal for compensation. In an effort to shrink transducer packaging, and increase reliability; a prototype frequency output temperature sensor was designed using a 0.8um silicon bulk CMOS process.

The 250°C operational sensor is based on a PTAT current generator. The design uses high temperature design techniques that were proven reliable in prior Quartzdyne ASIC's. The output frequency is 34kHz at 30°C, with a sensitivity of 100Hz/°C and achievable accuracy of ±0.3°C from 25°C to 200°C. This paper will review the sensor's characteristics, including the output linearity, hysteresis, accelerated aging and temperature cycling to demonstrate the performance and long term reliability and repeatability of the sensor.
DIP Test Socket Characterization for 300°C
Authors: Shaddock David , Yin Liang , Shen Zhenzhen , Zhou Zhangming , Johnson R. Wayne
Published: October 2015

Demonstrating functional reliability testing of high temperature electronic devices for long lifetime at 300°C requires electrical test fixtures with even better reliability. Advances in complexity of SiC devices and the need for increased accelerated tests motivate the need for a reliable test fixture at high temperature. The design, fabrication and testing of a prototype test board using commercially available materials shows stability beyond 2000 hours. The approach uses an alumina circuit board with thick film conductors interconnecting an array of BeNi contacts to surface pads. The pads are connected to high temperature wires using spring loaded contacts so that the circuit board may be removed.
Reliability of wire-bonded electronic devices in combined high temperature and vibrational environments
Authors: Mirgkizoudi M. , Liu C. , Conway P. , Riches S.
Published: October 2015

High temperature electronic systems need to operate in extreme conditions that exceed the current levels specified by the military and aerospace standards. In high temperature and wide operating temperature applications, electronics can suffer from failure modes caused by a combination of environmental and operational loadings such as temperature, vibration, humidity, pressure, external stresses, etc. This work reports the findings and observations of the investigation of the combined effects of thermal and vibrational environments on wire-bonded interconnections used in high temperature electronic components. The work is focused on combined testing at temperatures up to 250°C and vibration loading with the sine frequency swept cycles ranging from 5Hz to 2000Hz and acceleration up to 20g rms. Analysis is focusing on the wire bond connections which has shown an increasing occurrence of wire deformation at a test temperature of 250°C whilst being subjected to vibration, particularly for wires with large loop shapes. Wire bonded samples have been evaluated through visual inspection, electrical characterization and ball shear tests to identify failure mechanisms.
Lead-free Solder Attach for 200°C Applications
Authors: Shen Zhenzhen , Fang Kun , Hamilton Mike , Johnson R. Wayne , Snipes Erica , Bozack Michael
Published: October 2015

Conventional SAC lead-free solders have a melting point of 217°C to 227°C, limiting their suitability for applications at 200°C. AgBiXTM solder has potential for 200°C applications because of its ~260°C solidus temperature. BiAgX paste has been used to assemble SiC test die to ceramic substrates with direct bond copper (DBC), reactive brazed CuMo, thick film Au, thick film PtAu, thick film PdAg and thick film Ag. Surface mount chip resistors have also been attached to thick film metallized substrates. The assembly process and initial shear strength test results are presented. Assemblies have also been subjected to thermal testing: thermal cycling (−55°C to +195°C) and high temperature (200°C) storage. The shear strength of these assemblies after thermal testing are presented and compared to initial results.
Performance and Reliability Characterization of 1200 V Silicon Carbide Power MOSFETs at High Temperatures
Authors: Kaplar R. J. , Hughart D. R. , Atcitty S. , Flicker J. D. , DasGupta S. , Marinella M. J.
Published: October 2015

Commercially available, 1200 V SiC power MOSFETs have been characterized under bias-temperature stress conditions. Two generations of devices from a single manufacturer were tested. For the first-generation MOSFETs, both plastic- and metal-packaged devices were evaluated, whereas for the second-generation MOSFETs, only plastic-packaged devices were tested. Threshold voltage was observed to decrease with increasing temperature in the absence of gate bias stress, as expected. Drain leakage current increased with increasing temperature above the rated temperature of 125°C for first-generation plastic-packaged parts, with the leakage ~10× higher for the plastic-packaged parts compared to the metal-packaged parts. A negative gate voltage was shown to reduce drain leakage current for the metal-packaged parts only, suggesting a parasitic leakage path associated with the plastic packaging. The threshold voltage shift ΔVT was minimal for T < 125°C. ΔVT increased with increasing temperature above 125°C, and was larger for negative gate voltage bias stress, suggesting that the oxide is more sensitive to trapping of holes than trapping of electrons. ΔVT was insensitive to the type of package. The second-generation SiC MOSFET showed significantly less susceptibility to bias temperature stress, especially for negative gate voltage, indicating improvement in device design and/or processing in the second-generation MOSFET. Switching gate stress showed complex behavior, with a rapid initial shift in VT followed by a much slower shift. Initial testing indicates a strong dependence on duty cycle and possible influence of self-heating. More detailed study of reliability under switching conditions is needed.
Reliability of SiC Digital Telemetry Circuits on AlN Substrate
Authors: Ghandi Reza , Chen Cheng-Po , Yin Liang , Saia Rich , Johnson Tammy , Sandvik Peter , Fang Kun , Johnson R. Wayne
Published: October 2015

In this work, two silicon carbide based integrated circuits (frequency counter and timing generator) have been designed and fabricated as building blocks of a digital telemetry module for the purpose of sensing and transmitting pressure measurements from a geothermal well at temperatures up to 300°C. The frequency counter consists of one 4-bit counter, one 4-bit shift register, and one buffer. The timing generator contains an 8-bit counter, a D-flipflop, and some dedicated logic gates to generate timing pulses for the two channel frequency counter. These dies were flip-chip bonded to patterned gold thin-film aluminum nitride substrate circuit boards and tested for functionality in a lab oven at 300°C and prove to operate continuously for more than 1000 hours. Also the boards were subjected to random vibration at 20G RMS and also mechanical shock at 215G at 300°C and remained operational after 8 hours of vibration and 1000 shocks.
High Shear Speed Characteristics of Sub-100 μm Low Alpha SAC105 Solder Bump Directly Fabricated on Cu Filled Through Si Via for 3D Integration
Authors: Jung Do Hyun , Agarwal Shalu , Kumar Santosh , Jung Jae Pil
Published: October 2015

Soft errors in microelectronics devices, responsible for the malfunction of electronic systems, have become a hot issue for miniaturized and high-density packaging like three-dimensional (3D) packaging. Low alpha solder generates very few α-radiation-caused errors and malfunction in electronic devices compared with regular solder. It can improve performance and reliability of through-Si-via (TSV) packaging, prompting the need to adopt low alpha solder for bumping in TSV packaging. TSV technology has emerged as a popular choice for 3D packaging and chip stacking. In this study, the bonding properties of low alpha solder on Cu-filled TSV were investigated. TSVs were fabricated in a Si wafer by deep reactiveion etching, and Cu was filled in the via by electroplating using the periodic pulse-reverse current waveform. Cu filling in the via was achieved in 4 h without any defects at a cathodic current density of −8 mA/cm2. The LC-3 class of a low alpha solder ball (alpha emission < 0.05 cph/cm2) having a composition of Sn-1.0 wt.% Ag-0.5 wt.% Cu (SAC105) and a diameter of 80 μm was reflowed on the Cu-filled TSV to form the solder bump. High-speed shear test was performed on the bumped low alpha solder ball to assess the shear strength and to investigate the fracture mode. The shear strength of the low alpha solder bump showed a maximum value of 369.63 mN at 1.0 m/s shearing speed and 17.6 μm tip height. The fraction of brittle fracture increased with increasing shearing speed.
Characterization of Substrate Materials For End-Use Environment Classification
Authors: Ahmad Syed Sajid , Shankaran Arun , Haring Fred , Vignes Justin , Scholz Bernd , Reinholz Aaron
Published: October 2015

With the expansion of the use of sensors in everyday life, especially in medical and security fields, it has become pertinent that a substrate be chosen which is not only compatible with the sensor functionality and its manufacturing flow but also with the use environment of the sensor.

Roll-to-roll manufacturability is also an important consideration along with the quality, reliability and cost of the end product. Material advances have provided a wide variety of choices which need to be studied and understood for competitive applications.

In this study, a sample of the results of the evaluation of selected substrate materials are presented. This effort helps provide a reference database and comparison to choose a material for a particular application and application environment.
Ferro-Electrically Enhanced Proximity Communication.
Authors: Shubin Ivan , Cunningham John E. , Popovic Darko , Thacker Hiren , Zheng Xuezhe , Luo Ying , Mitchell Jim , Raj Kannan , Krishnamoorthy Ashok V. , Zamek Steve , Chen Winnie , Majumdar Arka
Published: October 2015

Capacitively-coupled communication between chips, commonly known as PxC, represents a new class of I-O signaling that offers substantially improved off-chip bandwidth density. However, this form of communication presents a challenge from a packaging perspective, since tight chip alignment tolerances are required to maintain high signal fidelity and avoid cross coupling between neighboring channels. To mitigate the packaging constraints, capacitive coupling between the communication pads can be enhanced with materials that have high dielectric coefficients. Here, ferroelectrics hold promise over contemporary low- and high-k dielectrics, however their processing conditions need to be better understood and the compatibility with CMOS circuitry has to be established during integration with a back end of the line process module. In this paper we present experimental results on microfabrication modules for various families of ferroelectrics when monolithically deposited on Silicon. Additionally, we report their associated dielectric properties as extracted by measured capacitance enhancements in our fabricated devices. In this work Strontium Titanate and Barium Strontium Titanate films are sputter deposited on platinum atop Silicon. Capacitive measurements were accomplished by microfabricating electrodes atop these structures in geometries that are size and shape dependant. Dielectric coefficients as high as 400 times that of air are measured.
Solid-State Formation of Intermetallic Compounds in Co-Sb Couple Nanowires
Authors: Jeon Seong Gi , Song Jae Yong , Shin Ho Sun , Yu Jin
Published: October 2015

Nanointerconnection technologies have attracted much attention for the future electrical interconnection in electronic packaging. Nanowire interconnection needs to form the intermetallic compounds (IMCs) between the nanowires, in order to effectively reduce the contact resistances. In this study, the couple nanowires of Co and Sb elements were selected to investigate the IMC formation in one dimensional confinement. The Co and Sb nanowires were electrochemically deposited into the anodic aluminum oxide templates, in sequence, which had the pore diameters of about 30 and 60 nm, respectively. Results show that the CoSb phase is formed between Co nanowire and Sb nanowire after heat-treatment at 773 K. The IMC formation was ascribed to the dominant diffusion of Sb atoms toward the Co nanowire. The fast diffusion of Sb atoms toward the Co nanowire resulted in the formation of Kirkendall voids between the IMC and Sb nanowires.
Next Generation High Dk, Low Df Organic Laminate for RF Modules and High Frequency Applications
Authors: Liu Fuhan , Sridharan Vivek , Bandyopadhyay Tapobrata , Sundaram Venky , Tummala Rao , Kojima Kiyoshige , Shiga Naomi , Jimbo Toshihiko
Published: October 2015

In this paper, we present a novel high density high performance ultra-thin organic laminate, X-R-1, with low cost standard PCB fabrication processes for RF and high frequency applications. The X-R-1 substrate, developed at Zeon Corporation is a new generation halogen-free high dielectric constant (Dk) and low loss tangent (Df) dielectric laminate material. Its dielectric constant is 6.5–6.7 in the range of 1–20GHz, similar to typical LTCC substrates but larger than most organic materials such as LCP, PTFE and Epoxy based materials. Its dielectric loss tangent is 0.003, similar to that of LTCC, LCP and PTFE but much lower than epoxy based materials. The thicknesses of the core used in this study are 50um. The clad copper on both sides is a 12um thick profile-free copper foil which provides extremely smooth surface. Microminiaturization of RF devices can be achieved by the combination of high Dk and ultra-thin substrate. The combination of low Df and smooth surface leads to RF and high frequency signals having minimum propagation loss. The material is suitable for mechanical and laser through hole drilling and fully compatible with the low cost standard PCB facilities and processes. Because of the smooth surface, 25um very fine copper lines and spaces were achieved by wet etching process. Copper filled through holes with 40um diameter drilled by CO2 laser have been demonstrated. Panel size of 6″×6″ test vehicles with RF filters and transmission lines was fabricated and measured. Test data on the filters at 2.4GHz and 5GHz has been presented in this paper. This high Dk and low Df laminate with standard PCB processes provides a low cost organic platform for RF and high frequency circuit applications.
A New Coreless Substrate Technology
Authors: Appelt Bernd K. , Huang Alex S.F. , Su Bruce , Lai Yi-Shao
Published: October 2015

Coreless substrate technology has been viewed as the holy grail of organic substrates for a long time. The benefit of this substrate concept is to reach the same level of wireability as in multi-layer ceramic substrates at lower cost and better electrical performance. Most approaches to date were based on materials like ABF or other resin systems with little reinforcement which resulted in substrates which were very prone to warping before die assembly and even more so after die attach. Here, the approach is to pattern plate the circuit pattern on a temporary carrier. In a second step, studs are plated for the future via interconnections. In a third step, prepreg is laminated over the prior structures. If a copper foil is included in the lamination step then the studs are accessed with etching openings in the copper foil and cleaning the top of the pillars to allow a plated connection in a pattern plating process. By repeating the appropriate steps of above on this substructure, a multi-layer coreless substrate can be built. The strength is equivalent to PBGA type substrates of equivalent thickness.
Immersion Silver as Universal Surface Finish for COB Technology
Authors: Goehre J. , Schneider-Ramelow M. , Becker K.-F. , Hutter M.
Published: October 2015

Immersion Ag is currently being discussed as an innovative alternative to Ni/Au and Ni/Pd/Au metallization for PCBs in COB technology. Its advantages over conventional metallizations include its non-toxicity, due to the absence of Ni, and significantly lower costs, as Au and Pd are not required. Immersion Ag is also easily processed in die attach or SMD processes using adhesives or solder and is compatible with wire bonding. The first generations of immersion Ag in the 1990s were handicapped by a lack of storage capability. The Ag quickly reacted with oxygen and sulfur in the surrounding atmosphere and, after only a few hours of storage, high quality wire bonding was no longer viable. The current generation of immersion Ag was primarily developed to ensure long-term processability for solder technology. However, its suitability for wire bonding and other COB processes, such as glob topping, after periods of storage in non-inert atmospheres had not yet been verified.

This paper addresses this issue, presenting the results of wire bonding tests in initial state and after periods of storage in inert and non-inert atmosphere, as well as after die attach processes using adhesives and solder. In addition, the suitability of immersion Ag for die attach with adhesives and solder, as well as processability for glob-top encapsulation, was investigated. Finally, the results from reliability tests on open and encapsulated samples are presented. The results show that wire bonding on immersion Ag yields bonds of high initial quality and superior reliability even after storage in non-inert atmosphere for several months prior to wire bonding. The same was true of samples that had been exposed to soldering or gluing processes. In addition, immersion Ag performed exceptionally well in other COB processes, confirming its suitability as a universal surface finish for COB technology.
Practical Implementation of Frequency Monitoring for Widely Tunable Bandpass Filters
Authors: Sigmarsson Hjalti H. , Binkerd Evan , Maas Jeff , Lee Juseop , Peroulis Dimitrios , Chappell William J.
Published: October 2015

In the present work, a practical method to integrate sensing mechanisms into widely tunable evanescent-mode cavity resonators for tracking the center frequency is introduced. This mechanism allows for in-situ monitoring and outputs a signal that can be used to generate a closed loop feedback that can be used to lock in the center frequency of the resonator. The major benefit of this mechanism is that the performance of a resonator is not sacrificed since the higher order differential mode used for monitoring is orthogonal to the fundamental mode of the resonator. The resonator is created inside a standard printed circuit board using 3-dimensional laser patterning to allow the existence of the differential mode. An example resonator is fabricated to demonstrate the concept and tuned from 3.62 to 6.85 GHz. The differential mode was monitored to be at a frequency 1.8 times higher than the common mode. The unloaded quality factor of the resonator is extracted from measurements to verify that the sensing mechanism does not induce any additional losses. Continuous feedback is a crucial step towards a robust fielded widely tunable filter.