description: Proceedings of a November 2000 workshop, with papers in sections on advances in high-level test, validation and test for microprocessor designs, hardware/software co-validation, formal verification techniques and applications, issues in high-level design validation, formal verification techniques, and advances in simulation-based verification. Specific topics include hardware/software co-debugging for reconfigurable computing, statistical behavior of branch coverage in testing behavioral VHDL models, system level testability analysis using Petri nets, and data flow based cache prediction using local simulation. Lacks a subject index. Annotation c. Book News, Inc., Portland, OR (booknews.com)
language: English
title: IEEE International High-Level Design, Validation, and Test Workshop: 8-10 November 2000 Berkeley, California
titlecomplete: IEEE International High-Level Design, Validation, and Test Workshop: 8-10 November 2000 Berkeley, California
publisher: IEEE