num_pages: 320
description: Here is a practical and useful guide to VHDL synthesis. The purpose of this book is to explain the transformations that occur during the synthesis process from a VHDL model to a netlist. Constructs that are supported for synthesis are clearly explained with many examples with their synthesized netlists.
language: English
title: A VHDL Synthesis Primer
titlecomplete: A VHDL Synthesis Primer
publisher: Star Galaxy Pub