num_pages: 357
description: Contains 31 papers from the December 2000 symposium that present emerging research in high-performance processor microarchitecture, embedded microarchitecture, and compiler optimization. The major areas of discussion are memory hierarchy, superscalar architecture, compilation, accelerator architecture, low-power design, and dynamic translation and multithreading. Some of the topics are predictor-directed stream buffers, modulo scheduling for a fully-distributed clustered VLIW architecture, dynamic cache compression for cache energy reduction, and increasing the size of atomic instruction blocks using control flow assertions. No subject index. Annotation c. Book News, Inc., Portland, OR (booknews.com)
language: English
title: 33rd Annual Ieee/Acm International Symposium on Microarchitecture, Micro-33 2000: 10-13 December 2000 Monterey, California, USA
titlecomplete: 33rd Annual Ieee/Acm International Symposium on Microarchitecture, Micro-33 2000: 10-13 December 2000 Monterey, California, USA
publisher: IEEE