Patent GB-1517313-A (GB)
Title: Character generators
IPC: G09G1/16
Filed: 1975-06-03
Abstract: 1517313 Cathode-ray tube displays SPERRY RAND CORP 3 June 1975 [3 June 1974] 23887/75 Heading H4T [Also in Division G5] The invention is concerned with improving the legibility of dot-matrix character displays without increasing the capacity of the memory, e.g. a Read- Only Memory (ROM), employed to generate the binary signals (i.e. "1" or "0") required to produce the characters (e.g. on a cathode-ray display tube or a plasma display panel). A 5 x 7 dot matrix is considered the 35 binary signals, as "1"s or "0"s as determined by the character to be displayed, being supplied by a 35 word ROM. Each dot position in the matrix is "displayed" as a group of four adjacent dot positions so that the 5 x 7 matrix has the form of a 10 x 14 matrix. In the latter matrix each group of four dots which corresponds to an "illuminated" (i.e. a "1") dot in the 5 x 7 matrix is illuminated and additionally a selected one of the dots in each group of four dots which corresponds to a dot position in the 5 Î 7 matrix which is not illuminated is illuminated the selection being according to predetermined rules for which an algorithm is derived. Fig. 2, shows a 5 X 7 dot matrix having certain dot positions "illuminated" to form the character "S" and Fig. 3 shows the transformation of this matrix into a 10 Î 14 dot matrix in which, in addition to illumination of each group of four dots which correspond to an illuminated dot position in the 5 Î 7 matrix selected ones of the dots in each group of four dot positions in the 10 Î 14 matrix which do not correspond to an illuminated dot in the 5 Î 7 matrix are additionally illuminated such as the signal dot in the four dot groups designated 00, 04, 11, 13,-60, 64. According to a first set of rules for which a basic "smoothing" algorithm is derived, in addition to illumination of all the dots of each group of four dots corresponding to an illuminated dot in the 5 x 7 matrix, in any group of four adjacent dot positions corresponding to a position without an illuminated dot in the 5 Î 7 matrix an illuminated dot is produced only if, in the 5 x 7 matrix, there are illuminated dots in two adjacent positions and no illuminated dot in the diagonally adjacent position. This is shown in Fig. 3 by the illumination of all of the four dot positions in each group e.g. dots a, b, e, d in the groups 01, 02 corresponding to an illuminated dot in Fig. 2 and by the illumination of dots d and a in respect groups 00 and 11 corresponding to the absence of illuminated dots in diagonally adjacent dot positions in Fig. 3. An example of the improvement which this method of display produces is shown in Fig. 6 in which the character "C" is shown on a 10 x 14 matrix with 5 Î 7 resolution and with the improvement produced by the "smoothing" described above. Some characters, however, can be further improved by a change in the basic algorithm. Thus, the ampersand character "&" of Fig. 7a shown on a 10 Î 14 matrix with 5 x 7 resolution is improved by application of the basic algorithm as shown in Fig. 7b. This however results in too many additional illuminated dots and further improvement is effected by the application of a modified smoothing which reduces the number of such additional illuminated dots. This is defined by a second rule (for which a modified algorithm is derived) according to which the first rules are subject to the rule that in any group of four adjacent dot positions in the 10 x 14 matrix which correspond to an unilluminated dot position in the 5 Î 7 matrix not more than one of four adjacent dot positions is to be illuminated such position to be determined by the application of a priority rule according to subjective assessment as to which results in the best improvement. It is stated that the appearances of most characters is either improved or unaffected by applying the modified smoothing. However, for a particular character that would degrade a disable signal is utilized to prevent the application of the modified smoothing. Arrangements for carrying out the invention including block circuit and flow diagrams (not shown) are described.