Patent GB-1163161-A (GB)
Title: Digital Computer Arithmetic Unit.
Inventor: WILLIAMS COLIN CHARLES
IPC: G06F7/40
Filed: 1967-05-02
Abstract: 1,163,161. Arithmetic circuitry. FEEDBACK Ltd. 26 April, 1968 [2 May, 1967], No. 20177/67. Heading G4A. A parallel binary adder comprises bit adders each fed from an input and from an accumulator circuit and feeding the accumulator circuit via storage means, the accumulator circuit contents being displayed. General: addition.-In Fig. 3, a 4-bit input set up on manual switches 83-80 (top of Figure) is added to the contents of accumulator relays AC/4, AB/4, AA/4, A/4 in bit adders, each of which provides a sum bit to a respective capacitor 123-120 and a carry bit to a respective carry relay CD/3, CC/3, CB/3, CA/3. Each bit adder comprises a network of contacts of the corresponding accumulator relay and the carry relay of the next lower bit position, e.g. the leftmost bit adder comprises contacts AC1- AC3, CC1-CC3, except that the carry into the lowest bit position comes from a "carry" relay C/3 not used during ordinary addition. A 3-relay control circuit (not shown) performs a cycle every time a "single-shot" button is pressed or continuously if an "auto" switch is closed. Each cycle of the control circuit opens and closes relay contacts P4, P5, S5, R4-R1 to clear the accumulator relays AC/4, AB/4, AA/4, A/4, and then discharge the capacitors 123-120 through the accumulator relays to store the sum on the capacitors in the accumulator relays. The contents of the accumulator relays are displayed on lamps 97-94 and those of the capacitors on lamps 93-90. Overflow of the accumulator relays is prevented since any addition operation which would produce overflow energizes the highest order carry relay CD/1 and this prevents further operation of the control circuit. Subtraction.-This is done by twos-complement addition, an add-subtract switch 12 with contacts SW1-SW8 &c. being reversed from the position shown when the subtrahend is set up on the switches 83-80, the required low order 1 being supplied by "carry" relay C/3 now energized. In the case of subtraction, deenorgization of relay CD/1 prevents further operation of the control circuit. Multiplication.-This is done by repeated addition, setting up the multiplicand on switches 83-80 and pressing the "single-shot" button a number of times equal to the multiplier. Alternatively, a relay-operated binary counter can be preset with the complement of the multiplier and incremented by one for each cycle of the control circuit, the "auto" switch having been closed. When capacity is reached, the counter prevents further operation of the control circuit. Division.-This is done by repeated subtraction of the divisor (on switches 83-80) from the dividend (in the accumulator relays). When the remainder in the accumulator relays is less than the divisor, relay CD/1 is deenergized and further operation of the control circuit is prevented. Alternatively, the binary counter can be reset to zero then incremented for each cycle of the control circuit, the "auto" switch of which is closed, until relay CD/1 stops the control circuit when the count of the counter, displayed on lamps, is the quotient.