Patent GB-1175846-A (GB)
Title: Telephone Switching Networks
Inventor: MILEWSKI ANDRZEJ
IPC: H04Q3/00
Filed: 1966-12-21
Abstract: 1,175,846. Automatic exchange systems. INTERNATIONAL BUSINESS MACHINES CORP. 21 Dec., 1966 [4 Jan., 1966], No. 57197/66. Heading H4K. In a PBX having a multistage switching network, some of the outlets of the matrices in an intermediate stage are linked by local junctors which are used for "own-exchange" calls. The other outlets from the intermediate stage are linked via further stages to incoming and outgoing trunks. There is only one path between any inlet or outlet of the network and a particular matrix in the intermediate stage. Links, matrics, inlets and outlets are identified by a system of co-ordinates and the co-ordinates of the two matrices connected to a local junctor are numerically related. Path finding is effected by means of a magnetic core "memory map". The natures of the crosspoints, registers and marker are not specified. Trunking.-Fig. 1.-The network comprises five stages of which the first consists of four groups each of eight, 16 x 12 matrices; the second consists of twelve groups each of four, 8 x 4 matrices; the third consists of the same twelve groups each of four, 4 x 3 matrices; the fourth consists again of the same twelve groups each of one, 4 x 4 matrix; while the fifth stage comprises four, 12 x 12 matrices. The rotation adopted consists for each matrix of a two co-ordinate number I, J viz. the first matrix in the fourth group of the first stage is identified as 3, 0. The outlets A of this matrix are connected to inlets J of second stage matrices identified by A, I. Thus considering the last outlet (A = 11) from matrix I = 3, J = 0 in the first stage, this outlet is connected to the J<SP>th</SP>, i.e. 0 or first inlet of the matrix A = 11, I = 3 of the second stage. The B<SP>th</SP> outlet from any of the A, I matrices is connected to the I<SP>th</SP> inlet of the third stage matrices A, B. One outlet from each A, B matrix is connected to one outlet of the adjacent matrix A + 1, B via a local junctor (details not given). For matrices such as 11, 0 in the last group, the one outlet 0, 0 is connected to the "adjacent" matrix, e.g. 0, 0 in the first group. The third outlet from an A, B matrix is connected to the B<SP>th</SP> inlet of a matrix A in the fourth stage whose L<SP>th</SP> outlet is in turn connected to the A<SP>th</SP> inlet of the L<SP>th</SP> matrix in the fifth stage. This method of trunking is depicted more clearly in, Fig. 3, which also shows the connecting path between a calling subscriber K and a called subscriber K<SP>1</SP>. Setting up a call.-A scanning system (not shown) detects calling lines and allots the necessary digit receivers. The identities, of the first stage matrices I, J and I<SP>1</SP>, J<SP>1</SP> to which the calling and called parties are connected, are inserted in binary stores (21-24 of, Fig. 4, not shown) while other stores (25-27) are set to the values A = 0; A + 1 = 1 and B = 0. Path seeking then proceeds in three phases P 1 , P 2 , P 3  During time slots T 1 , T 2  of phase P1 the identities of links IJA and IJ<SP>1</SP> (A + 1), [see. Fig. 3) are successively read-out from binary stores and inserted in a memory (28 Fig. 4). The free-busy conditions of these links are determined with the help of a memory map. If either is busy, the memory is cleared, the new values A = 1; A + 1 = 2 and B = 0 are inserted in the binary stores and the stores are then readout as before into the memory. If the values A=11;A+1=0 0 are reached without finding a free pair of links, the stores are cleared and busy tone is reverted. However if a free pair are located, phase P2 is allowed to commence, during T1 and T2 of which the availability of links AIB and (A + 1) I<SP>1</SP>B are checked in a similar manner. If a free link pair are not found after B has successively taken the values 0, 1, 2, phase 1 is returned to with A and A + 1 incremented by 1. Assuming that eventually a second/third stage link pair are found free, then phase P3 commences. The condition of the junctor indicated by the stored values of A and B is checked. If it is busy, phase P2 is recommenced with B incremented by 1. If and when a free junctor is found, the stored values of I, J, I<SP>1</SP>, J<SP>1</SP>, A, A + 1 and B together with the identities K-and K<SP>1</SP> of the calling and called parties are passed to a marker which operates the relevant crosspoints, ringing and supervision being controlled from the junctor. Memory map. (Fig. 8, not shown).-Each link and junctor threads a unique square-loop magnetic core whose state depends on the busy/ free condition of the associated link or junctor. The cores are also threaded co-ordinate fashion by wires extending from decoders connected to the memory and also by a readout wire. The latter produces an output signal during a small part of each time slot T1, T2, provided that the particular core being interrogated denotes a free link or junctor.