baber/WOPTO huggingface dataset:
Patent JP-H03279882-A (JP)
Title: Semiconductor integrated circuit
Inventor: SAITO HIROAKI
IPC: G01R31/28
Filed: 1990-03-29
Abstract: PURPOSE:To reduce input signals at the time of a burn-in test by connecting pull-up circuits and a pull-down circuit to an input circuit, an output circuit, and an input/output circuit symmetrically, and properly performing ON-OFF control over circuit elements. CONSTITUTION:The pull-up circuits 24... and pull-down circuits 24-2 are connected to the input circuit 24, output circuit 25, and input/output circuit 26 symmetrically and the control signal of a control signal source 27 which is applied to those circuits 24-1... and circuit 24-2 contains a waveform other than a direct current. The circuits 24-1... and 24-2 are turned on and off with the signal from the signal source 27 normally at the same time. Consequently, the signal line potential is controlled optionally through the operation of the pull-up circuits and pull-down circuit which are connected symmetrically to the signal lines to an internal circuit 20. When the circuit 20 is put in normal operation, the pull-up circuits and pull-down circuit are turned off at the same time, but when the burn-in test is conducted, they are turned on and off individually.
Patent JP-H09272054-A (JP)
Title: Wafer holding structure for polishing device and semiconductor device
Inventor: HIRASAWA SHIGEKI
IPC: B24B37/04
Filed: 1996-04-04
Abstract: PROBLEM TO BE SOLVED: To uniformly polish a total surface of a semiconductor wafer, by mounting the semiconductor wafer in a holding plate by interposing a thin elastic sheet, also setting elastic strength of the elastic sheet in a part into contact with a peripheral part of the semiconductor wafer smaller than in the other part. SOLUTION: A polishing pad 2 is fixed onto a disk-shaped flat surface plate 1, a semiconductor wafer 3 is mounted in a holding plate 5 by interposing a packing pad 6 to that a polised surface 4 is brought into contact with the polishing pad 2. The packing pad 6 is formed of thin elastic material, to be fixed to the holding plate 5 by a bonding agent. The holding plate 5 and the semiconductor wafer 3 are rotated while swiveling on the surface plate 1, the surface plate is also rotated, so as to polish the polished surface 4 of the wafer 3 while the polished surface is moved while being rubbed by a surface of the polishing pad 2. Here, in a peripheral part of the packing pad 6, many small holes 12 are drilled, are ratio of the hole is increased in the peripheral part.
Patent JP-S577926-A (JP)
Title: Manufacture of semiconductor device
Inventor: WADA KUNIHIKO
IPC: H01L29/786
Filed: 1980-06-18
Abstract: PURPOSE:To form a highly integrated semiconductor device wherein many insulators and semiconductors are layered by forming polycrystal Si or amorphous Si on an insulating film formed on a substrate, and crystallizing said Si by laser annealing. CONSTITUTION:The surface of a polycrystal Si substrate 1 is thermally oxidized and an SiO2 film 2 is formed. Then, amorphous Si is deposited on the SiO2 film 2, and single crystal is obtained by applying laser annealing on a specified part. Thereafter, the amorphous part 1 is converted into an oxide film by thermal oxidization, and the most of the single-crystallized part is formed as a single crystal Si region 3'. In this method, the insulating films and the laser-annealed and single-crystallized semiconductor films are alternately layered, a semiconductor element is formed on said semiconductor film, and the highly integrated semiconductor device can be formed.
Patent JP-H01254014-A (JP)
Title: Power amplifier
Inventor: ICHITSUBO IKURO
IPC: H03F3/24
Filed: 1988-04-04
Abstract: PURPOSE:To reduce a peak current, to increase the fundamental wave output impedance and to improve the power addition rate by connecting an output impedance circuit across three-terminal semiconductor element groups connected in series. CONSTITUTION:The source of a 1st three-terminal semiconductor element (FET) 20 is connected to ground and a bias terminal 27 is connected to the gate via a high frequency input terminal 25 and a high frequency (RF) blocking resistor 26. A voltage -VP near a pinch-off voltage is applied to the bias terminal 27. The drain of the FET 20 is connected to the source of the 2nd FET 28, the drain is connected to a DC power terminal 21 via an RF choke 22 and connected to ground via an output impedance circuit 23 and a load 24. The gate of the FET 28 is connected to ground via a resistor 301 and to a power line via a resistor 302. Thus, the peak current is reduced, the fundamental wave output impedance is increased and the power addition efficiency is improved.
Patent JP-S63249120-A (JP)
Title: Polygon mirror
Inventor: TAKEYASU HATSUICHI
IPC: G02B26/12
Filed: 1987-04-03
Abstract: PURPOSE:To prevent generation of a sink mark etc., so that accuracy can be maintained even if molding conditions somewhat change, by forming a flange whose size is large than the circumscribed circle of the planar shape of a polygon in the vicinity of one of the upper and lower ends of the polygon in a state where the flange is united with the polygon to one body. CONSTITUTION:A mirror section 2 is formed in a short hexagonal prism, with its planar shape being a regular hexagon, and the six side faces of the mirror section 2 are formed to mirror surfaces 2A of prescribed profile irregularity. A flange 3, whose diameter is larger than the circumscribed circle of the planar shape (hexagon) of the mirror section 2, has a discoidal shape and is formed on one end side of the mirror section 2 in such a way that the flange 3 is united with the mirror section 2 to one body. When the flange 3 is constituted as plural gates from the runner at the central part of the fitting hole 4 of the mirror section 2, the distances from the gate to the outer peripheries of the flanges 3 can be made equal to each other. Therefore, an almost uniform wall thickness can be realized and incidence of sinks can be prevented not only the mirror surfaces 2A, but also the other section. Thus moldability is sharply improved.
Patent JP-S559164-A (JP)
Title: Impeller type flow meter
Inventor: ONODA HAJIME
IPC: G01F1/075
Filed: 1978-07-07
Abstract: PURPOSE: To reduce the weight of an impeller in water, decrease frictional resistance and measure very small quantities of flow, by providing a cylindrical magnet, which constitutes a magnet coupling, on the main shaft of an impeller and providing a hollow part inside it.  
     CONSTITUTION: Water-insulating wall 10 closes the opening at the upper part of impeller case 5, and in its center part is provided projection 11, which projects into indicator case 9. In the ceter of this is provided depression 12 inside impeller case 5. To this projection 11 is fitted magnetic body 14 constituting magnet coupling 13. These components coordinate with indicator 8. Bearing 15 is provided at the bottom of depression 12 and pivot shaft 16 is provided at the bottom of impeller case 5 opposite the depression. By this, it is possible to reduce the weight of the impeller in water, reduce frictional resistance and measure very small quantities of flow. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-S62238562-A (JP)
Title: Developing process method for photosensitive lithographic printing plate by which stability of developing process is improved
Inventor: KIYONO MINORU
IPC: G03F7/30
Filed: 1986-04-09
Abstract: PURPOSE:To enable always stable developing process of many sheets of PS plates by heating a photosensitive lithographic printing plate in the mid-way of or prior to development. CONSTITUTION:The photosensitive lithographic printing plate is heated in the mid-way of or prior to the development in a method for subjecting the photosensitive lithographic printing plate to image exposing then to the developing process by using an automatic developing machine. A method for bringing the PS plate into contact with a heating medium during conveyance can be used as the means for heating the PS plate. The heating of the PS plate is preferably so executed that the PS plate is maintained at the temp. (preferably in the + or -1 deg.C range of the developing temp.) as near as possible the temp. of the developing soln. to be processed on the surface of the PS plate, i.e., intended developing temp. The temp. of the heated PS plate is preferably normally in 30-80 deg. range. The uniformity of the development result in the case of making the developing process of many sheets of the PS plates by using the automatic developing machine is thereby improved.
Patent JP-S59207521-A (JP)
Inventor: SAKAGUCHI SEIZOU
IPC: H01H33/42
Filed: 1983-05-10
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S57195725-A (JP)
Title: Preparation of soft molding polyurethane foam
Inventor: MATSUNAGA MINORU
IPC: C08G18/48
Filed: 1981-05-29
Abstract: PURPOSE: To prepare the titled foam of a good moldability, by using a specified polyether polyol of an alkanepolyol series and a polyoxypropylenepolyol, having 3 or more functional groups, of an alkanepolyol series, and casting into a mold kept at a high temperature.  
     CONSTITUTION: The titled foam is prepared by allowing to react a mixed polyol and an isocyanate, casting into a mold die kept at 50° or higher, curing, and separating the die, wherein the polyol consists of (A) 20W80wt% polyether polyol of a primary hydroxyl containing alkanepolyol having 3 or more functional groups, an oxypropylene chain in the middle of the molecule and 5W30wt% oxyethylene chain at molecular terminals and (B) 80W20wt% polyoxypropylenepolyol of an alkanepolyol having 3 or more functional groups. Preferable examples of component A are pentaerythritol and its mixture with other polyols. 
     COPYRIGHT: (C)1982,JPO&Japio
Patent JP-H09242215-A (JP)
Title: Fire-proof cover structure
Inventor: TANAKA YUJI
IPC: E04B1/94
Filed: 1996-03-12
Abstract: PROBLEM TO BE SOLVED: To prevent a foamy fire-proof paint film layer from hanging-down in the rise of tempersture by forming a cover material layer on the surface of the foamy fire-proof paint film layer to maintain the covering condition until the foamy fire-proof layer paint film layer is foamed and form a cover material layer which does not hinder the foaming. SOLUTION: A cover material layer which maintains the covering condition until a foamy fire-proof paint film layer is foamed and does not hinder the foaming is formed on the surface of the foamy fire-proof paint film formed on the surface of a steel skeleton post or beam. Thus, since the foamy fire-proof paint film layer softened before the foaming is supportively sandwhiched between the cover material layer and the surface of a steel skeleton post or the like, the paint film is prevented from the hanging-down caused by its own weight. The foamy fire-proof paint film layer prevented from the hanging-down by the cover material layer is foamed in its own position to form a perforated adiabatic layer with uniform thickness, so that sufficient fire-proof performance is provided.
Patent JP-H10230074-A (JP)
Title: Video game device
Inventor: HIJIYA TOSHIHARU
Filed: 1997-02-18
Abstract: PROBLEM TO BE SOLVED: To extremely effectively attract many more audience to a game by improving the way of attraction display. SOLUTION: In this video game device, an operation lever or the like 6 is operated while viewing game contents displayed at a CRT 3. On an LED display 4 provided separately from the CRT 3, the attraction display is performed. The attraction display includes display contents corresponding to the progress of the game contents to be a main. For instance, at the time of delivering a special technique to the CRT 3 as the game contents by the operation of the operation lever or the like 6, the name of the technique is displayed on the LED display 4 as attraction contents.
Patent JP-S62241633-A (JP)
Title: Linear feed mechanism
Inventor: HIROSE KAZUYA
IPC: B23Q5/40
Filed: 1986-04-11
Abstract: PURPOSE:To enable the prevention of a partial load fluctuation even if a feed screw has curvature, by connecting a female screw member to a feed member via a bent link so formed as to be freely rotatable about the axial line of a feed direction. CONSTITUTION:When a feed screw 5 has been turned, a female screw member 6 moves along the feed screw 5 and drives a table 1 via a bent link 9. Therefore, the table 1 gives a linear motion along a straight guide track 2, thereby giving a suitable feed. Consequently, as the female screw member 6 moves along the feed screw 5, slight mis-alignment in parallelism between the straight guide track 2 and the feed screw 5, and the slight bend of the feed screw 5 are absorbed by the slight turning of primary and secondary links 11 and 12, thereby preventing a load fluctuation and the irregularity of feed precision.
Patent JP-H01255222-A (JP)
Title: Ttl aligner
Inventor: MATSUMOTO MITSUO
IPC: G03F7/20
Filed: 1988-04-05
Abstract: PURPOSE:To perform high-speed, highly accurate alignment and to obtain an error signal for aligning positions regardless of the attenuating amount of detected light, by using two aligning light beams having difference in frequencies, and obtaining a position error signal through a transmitting type diffraction grating, a reflection type diffraction grating, photodetectors and a phase comparator. CONSTITUTION:Optical paths are symmetrical for mirror surfaces with respect to an optical axis 2. The frequencies of aligning lights A and B are different by an optical heterodyne frequency. The lights A and B are inputted into second transmitting type diffraction gratings 15 and 16 on an original reticle plate 14. The images of the first transmitted diffracted lights are formed on a reflecting type diffraction grating 27 on a wafer 18. The first reflected diffracted lights are guided in the perpendicular direction with respect to the optical axis 2 through a mirror 19. The lights are detected with a second photodetector 20. Meanwhile, parts of the aligning lights A and D are guided into the perpendicular direction with respect to the optical axis 2 through half mirrors 7 and 9. The lights are detected with a first photodetector 10. The output signals from both photodetectors 10 and 20 are inputted into a phase comparator 23. A position error signal phi which is proportional to the error between positions of the original reticle plate 14 and the wafer 18 can be outputted.
Patent JP-H05288191-A (JP)
Title: Refrigerating system compressor with dry gas seal
Inventor: TANAKA YOICHI
IPC: F04D29/056
Filed: 1992-04-06
Abstract: PURPOSE:To dispense with leading buffer gas from discharge gas or another source by leading a thrust balance line connecting a discharge line to a suction line into a part near a blowing side dry seal. CONSTITUTION:The temperature of gas entering from a suction nozzle 2 is -100 deg.C in the case of ethylene and -40 deg.C in the case of propylene. On the other hand, gas coming out of a final discharge nozzle 3 is boosted so as to have the temperature of 60-80 deg.C. A part of the final discharge gas flows into a balance chamber 5 through a balance labyrinth 4 and then into the suction nozzle 2 through a thrust balance line 6. This balance line 6 is formed in such a way as to blow right at the side of a dry gas seal 1 so as to prevent the temperature of the seal 1 from becoming low. A ring 7 or a labyrinth of a large gap is provided between the blowing side dry gas seal 1 and a first stage impeller 8 so as to prevent the suction side from being exposed to low temperature. Accordingly, there is no need to reduce the pressure of discharge gas and blow it as buffer gas.
Patent JP-S61242063-A (JP)
Title: Manufacture of complementary type mis transistor
Inventor: KUDO NOBORU
IPC: H01L27/092
Filed: 1985-04-19
Abstract: PURPOSE:To prevent the lowering of yield due to a disconnection at a stepped section in an Al wiring by simultaneously conducting SiO2 etching before ion implantation for forming a source-drain for an NMOS even in a PMOS section without being limited to a MOS section. CONSTITUTION:SiO2 is grown on a poly Si gate 8 through heat treatment. When boron fore shaping source-drain 7 for a PMOS is implanted successively, boron is hardly intruded into the poly Si gate 8, and is projected sufficiently into an Si substrate 1. A gate oxide film on the source-drain is etched in an extent that the oxide film is removed by using an Hf group etching liquid. A PMOS section is masked with a resist 10, and ions are implanted to form NMOS source-drain 11.
Patent JP-S62239136-A (JP)
Title: Remote controller
Inventor: TAMURA SHUICHI
IPC: G03B17/38
Filed: 1986-04-11
Abstract: PURPOSE:To simplify circuit constitution by preventing generation of an operation signal at the time of simultaneous operation of light receiving means of light except infrared rays and a light receiving means of infrared rays to prevent the erroneous operation. CONSTITUTION:When a reception switch SW is turned on for the purpose of starting remote control photographing, an infrared light emitting element 5 starts pulse light emission. since an infrared-ray cut filter 25 is arranged on the front of a photodetector 8 of a receiver 6, the infrared pulse light is made incident on only a photodetector 7. The signal light made incident on the photodetector 7 is converted photoelectrically and is inputted to an RS-FF 19 through an operational amplifier 11 and a waveform shaping circuit 17, and the output of a terminal the inverse of Q of the FF 19 is inverted to the low level. Then, signals (a) and (b) are outputted from a binary counter 23 to the camera side. If a strobe light is emitted near the camera, the strobe light is made incident on the photodetector 7, and its infrared rays are made incident on the photodetector 8. Since the output of the photodetector 8 is outputted to a reset input terminal R of the FF 19, the output of the FF 19 is not inverted to the low level.
Patent JP-H10285069-A (JP)
Title: Terminal equipment
Inventor: IMASHIYOU YOSHIHIRO
IPC: H04B1/3822
Filed: 1997-04-02
Abstract: PROBLEM TO BE SOLVED: To provide a terminal equipment of a mobile radio system which is unified with a nameplate or ID card by pasting an adhesive seal where the nameplate or ID card is described on the surface of a easing. SOLUTION: A terminal equipment 10 contains a liquid crystal display 11 which shows the characters, numeric characters, etc., and also displays the messages, etc. Meanwhile, the description items of an ID card are printed on an adhesive seal 12 together with a pasted face photo 13. Furthermore, the seal 12 has such a size that is just suitable to be being pasted on a single side of the equipment 10 and also has a transparent window 14 to prevent the display 11 from being covered when the seal 12 is pasted. A transparent seal or a cut opening is available as the window 14. Thus, the equipment 10 can serve as an ID card, etc., with no deterioration of its function and accordingly a user can decrease the number of cards to be carried with him.
Patent JP-H05299840-A (JP)
Title: Manufacture of ceramic multilayer printed board
Inventor: INASAKA JUN
IPC: H05K3/46
Filed: 1992-04-06
Abstract: PURPOSE:To prevent positional shift of through hole after lamination when a ceramic multilayer wiring board is manufactured according to green sheet method. CONSTITUTION:A ceramic green sheet 1 is sandwiched by a carrier film 2 and an organic resin film 3 and then subjected to processing thus minimizing dimensional fluctuation of the ceramic green sheet during process and obtaining a ceramic multilayer wiring board free from lamination shift.
Patent JP-S61241722-A (JP)
Title: System for stereoscopic display
Inventor: SHINTANI MIKIO
IPC: G02B30/25
Filed: 1985-04-19
Abstract: PURPOSE:To obtain a fully colored three-dimentional picture which can be seen by a great number of people with polarizing spectacles only, by displaying two pictures having binocular parallaxes with different polarization characteristics under a spatially divided condition. CONSTITUTION:Each of display element 10a for right-eye picture and display element 10b for left-eye picture is composed of a polarizing element and display element, which are united in one body. A linear polarizing plate 13 provided to the display element 10a for right-eye picture and another linear polarizing plate 13 provided to the other display element 10b are set in such a way that their polarizing axes can become parallel with each other. In this case, a display element driving circuit 8 drives the display element 10a for right-eye picture only and displays a fully colored picture for right eye on a displaying surface, and another display element driving circuit 9 drives the display element 10b for left-eye picture only and displays a fully colored picture for left eye on the displaying surface. Therefore, the fully colored pictures for right and left eyes are simultaneously displayed on the displaying surface under a spatially divided condition.
Patent JP-H03283360-A (JP)
Title: Power generating device
Inventor: IRINO MITSUHIRO
IPC: H01M8/12
Filed: 1990-03-30
Abstract: PURPOSE:To obtain a power generating device with a good sealing property by partitioning an exhaust gas chamber, fuel cell storage chamber, a fuel duct below the storage chamber, and a residual oxidizing gas duct with airtight bulkheads, and arranging a loading means on multiple fuel cells stored in the fuel duct. CONSTITUTION:An exhaust gas chamber 1, a fuel cell storage chamber 4, a fuel duct 19 below the storage chamber 4, and a residual gas duct 8 are partitioned with airtight bulkheads 7, and the fuel gas accumulated in the woolly heat insulating material 17 of the fuel cell storage chamber 4 is prevented from leaking into the exhaust gas chamber 1 and the residual oxidizing gas duct 8. A load 16 is arranged above fuel cells 5, thus face pressure is applied to sealing gaskets of the fuel cells 5. The sealing property between the fuel cells 5 and the periphery of the fuel duct 19 storing the fuel cells 5 can be satisfactorily held.
Patent JP-S5610230-A (JP)
Title: Optical sound spectroscopic analyzer
Inventor: HONMA NORIAKI
IPC: G01N29/00
Filed: 1979-07-04
Abstract: PURPOSE:To carry out analysis in a stable condition by a method wherein a semiconductor is used for light source, the driving power is modulated to modulate luminous intensity, and an electric signal synchronized with a phase of a modulation signal of the driving power and generated by a sample optical sound effect is recorded. CONSTITUTION:A light radiated from a light source 1 is modulated by modulating a driving power of the light source 1 with a signal of a modulating frequency oscillator 16. A modulated light from the light source 1 is applied to a sample in an optical sound cell 6 through a condensing lens 5. An optical sound effect arising on the sample is detected on a microphone in the optical sound cell and outputted as an electric signal. The electric output is amplified through a preamplifier 7, locked in through a lock-in amplifier 8, a phase detection is carried out between it and a modulation frequency of the light source oscillated from the frequency oscillator 16, an electric signal synchronized with the modulation frequency of the light source is outputted into a recorder 9, and thus an optical sound spectrum of the measured sample is recorded.