baber/WOPTO huggingface dataset:
Patent TW-351704-B (TW)
Title: Static printing apparatus
Inventor: TRIMBORN CHRISTIAN
IPC: B41F9/00
Filed: 1997-09-19
Granted: 1999-02-01
Abstract: A static printing apparatus consist of a flash detector (15), comprises: a stranded wire detecting means(17) which detects the outside applied high voltage and the DC elements contained in a plurality of floating electrodes of the stranded wire; a signal comparator and preparation means(18), which will assort the strand wire signal provided by the stranded wire detecting means into a direct phase first signal S1 and a second signal S2 which is latter than the first signal S1 and export them; a signal comparator (19) which will compare the first signal S1 and the second signal S2 to compute their potential difference and compare it with the predetermined value b for creating the flash detecting signal.
Patent TW-363196-B (TW)
Title: Thermistor chips and methods of making same
Inventor: KAWASE MASAHIKO
IPC: H01C1/14
Filed: 1997-09-26
Granted: 1999-07-01
Abstract: A thermistor chip is made by first forming first metal layers with a three-layer structure at both end parts of a thermistor element and then forming second metal layers with a three-layer structure on the first metal layers so as to have edge parts that are formed directly in contact with a surface area of the thermistor element and will reduce its normal temperature resistance value. The first and second metal layers are each of a three-layer structure with a lower layer made of a metal with resistance against soldering hear, a middle layer made of a metal with both wettability to solder and resistance against soldering heat, and an upper layer made of a metal having wettability to solder.
Patent TW-349265-B (TW)
Title: Method to produce a memory-cell arrangement
Inventor: WILLER JOSEF DR
IPC: H01L21/8246
Filed: 1997-11-14
Granted: 1999-01-01
Abstract: A method to produce a memory-cell arrangement, which is characterized in that: a cell array is formed on the main face (4) of a semiconductor substrate (1), which has memory cells disposed in each row and each column, in which a first memory cell storing a first logical value has an MOS-transistor perpendicular to the main face (4), a second memory cell storing a second logic value has no MOS-transistor; the semiconductor substrate (1), at least in a region of the cell array, requires to be doped by a first conductive material; a plurality of strip trenches (5) are formed essentially extending in parallel in the direction of each column; strip doping regions (7) are separately formed on the bottom of the trenches (5) and the main face (4) between adjacent trenches (5), the doping regions (7) being doped with a second conductive material opposite to the first conductive type; a trench filler (9) consisting of a first insulation material is filled in the trenches (5); memory cells are separately formed on the corresponding edges of the trenches.
Patent TW-390044-B (TW)
Title: GaAsP epitaxial wafer and its manufacture
Inventor: WATANABE MASATAKA
IPC: H01L21/205
Filed: 1997-12-17
Granted: 2000-05-11
Abstract: The present invention provides a GaAsP eptiaxial wafer and a method thereof by which a light emitting diode with high initial luminance and less deterioration of luminance can be produced. This wafer 10 is provided with a constant nitrogen concentration layer 6 made of GaAs1-xPx (0.45<x<1) which is formed by doping a layer with constant stoichiometric x with nitrogen. In this case the layer 6 has the upper and lowed limit concentrations of nitrogen as follows; the upper limit concentration of nitrogen: N=(6.25x-1.125) x 1018cm<-3>, and the lower limit concentration of nitrogen: N=(5x-1.5) x 1018cm<-3>.
Patent TW-349005-B (TW)
Title: A method and apparatus for discharging a food material
Inventor: ONOGUCHI KAZUYOSHI
IPC: B65D88/68
Filed: 1997-12-23
Granted: 1999-01-01
Abstract: A method and apparatus for discharging a food material, in which a plurality of supply rollers provided with grooves or ridges on their surfaces are circularly disposed to form a funnel-shaped space, into which space the food material is charged; the food material is subjected to a circumferential force by the rotating supply rollers and is steadily fed downward, without slipping. Further, an apparatus for discharging a food material is provided, in which a supply pipe with a scraper is disposed under a food-material-supply section. The scraper is positioned adjacent the inner wall of the supply pipe or positioned such that the scraper slidably contacts the inner wall of the supply pipe, to thereby peel off the food material adhering to the inner wall, so as to stably feed the food material downward.
Patent TW-382038-B (TW)
Title: Electric lock
Inventor: HINGSTON NEIL RICHARD
IPC: E05B49/02
Filed: 1997-12-24
Granted: 2000-02-11
Abstract: An electric lock is provided. The lock is reconfigurable between power-lock and power-to-unlock configurations. The lock may operate with a supply voltage which may vary over a given range and is capable of automatically sensing changes of voltage within this range and compensating for the different voltages.
Patent TW-383436-B (TW)
Title: Improved leadframe structure with preplated leads and process for manufacturing the same
Inventor: BUCCI GUISEPPE D
IPC: H01L23/495
Filed: 1998-01-21
Granted: 2000-03-01
Abstract: An improved leadframe structure, process of manufacturing the same, and improved IC package and packaging process using the same are provided. The leadframe includes a plurality of leads having inner portions located within an IC encapsulation area and outer portions extending outside the encapsulation area into contact with the outside environment. A plating mask cooperates with a polymer structure having a preselected configuration to form a substantially fluid-tight gasket to facilitate selective preplating of the outer portions of the leads of the leadframe prior to beginning the IC packaging process. Since the polymer structure is electrically insulative, concerns regarding of the plating mask misalignment of the are minimized.
Patent TW-369714-B (TW)
Title: Electrical contact to buried SOI structures
Inventor: RUTTEN MATTHEW J
IPC: H01L23/52
Filed: 1998-03-16
Granted: 1999-09-11
Abstract: Electrically conductive studs are employed to interconnect bulk active devices and SOI devices in a semiconductor device. Also provided is a method for fabricating such devices.
Patent TW-399292-B (TW)
Title: Method for manufacturing metal via
Inventor: YE WEN-GUAN
IPC: H01L21/76
Filed: 1998-04-20
Granted: 2000-07-21
Abstract: A method for manufacturing metal via is disclosed, which forms a metal layer on a substrate having the device structure. An inter-metal dielectrics is formed on the metal layer, and covers the metal layer. Then, the dielectrics is defined to form an unlanded via, thereby exposing the metal layer. Next, a selective deposition of tungsten is performed to fill tungsten into the unlanded via, so as to form a tungsten plug, thereby completing the dielectrics via process.
Patent TW-440964-B (TW)
Title: Process for manufacturing semiconductor integrated circuit device including treatment of gas used in the process
Inventor: TANABE YOSHIKAZU
IPC: B01D53/86
Filed: 1998-04-29
Granted: 2001-06-16
Abstract: This invention provides a technique for safely eliminating the hydrogen in an exhaust gas discharged from a gas-phase treating apparatus in a gas-phase treating process of a semiconductor wafer using hydrogen. The profile at the end portions of the side walls of gate electrodes of a poly-metal structure is improved by forming the gate electrodes over a semiconductor wafer IA having a gate oxide film. And provide the semiconductor wafer 1A with a hydrogen gas containing a low concentration of water, as generated from hydrogen and oxygen by catalytic action, to oxidize the principal face of the semiconductor wafer 1A selectively. After this, the hydrogen in the exhaust gas, as discharged from an oxidizing furnace, is completely converted into water due to causing it to react with oxygen by a catalytic method.
Patent TW-381399-B (TW)
Title: A method and system for providing a seamless omniview image from fisheye images
Inventor: TOONG SEE-WAN
IPC: G06T3/00
Filed: 1998-06-11
Granted: 2000-02-01
Abstract: A method and system for providing a normal perspective corrected image from a set of fisheye images. Three fisheye images which are 120 degrees apart are obtained using a fisheye lens with 180 degree steradian. Each of the fisheye images is transformed into angular images. The three angular images are combined with 60 degrees of overlap to form a single combined angular image having 360 degree field-of-view. The relative intensities of the pixels in the overlapping region are adjusted. The final combined angular image is then transformed into a perspective corrected image which can be used for viewing.
Patent TW-382170-B (TW)
Title: Method and apparatus for echo suppression
Inventor: GNOSSPELIUS JOHAN
IPC: H04B3/20
Filed: 1998-07-29
Granted: 2000-02-11
Abstract: The present invention relates to a cost-effective way of minimizing an echo arising in the PSTN network in a connection at least partially connected through a digital network, with minimum processor capacity required but still maintaining a high quality. The object of the present invention is to minimize, in a cost effective way, the echo while minimizing the processing requirements. The above problem of minimizing an echo arising in an analogue part of a connection is solved by switching to prevent the sound from passing from the analogue to the digital side.
Patent TW-423116-B (TW)
Title: Circuit-arrangement with at least four transistors and its production method
Inventor: SCHULZ THOMAS
IPC: G11C16/04
Filed: 1998-08-03
Granted: 2001-02-21
Abstract: Two of four vertical transistors are complementary to other two transistors. Each two of the transistors are arranged in the same height. Some layer-structures (St1, St2, St3, St4) are constructed, said layer-structures include respectively at least a channel-layer and a source/drain-area of one of said transistors. All layer-structures (St1, St2, St3, St4) can be generated from a layer-sequence with only four layers. In order to prevent the leak current due to parasitic bipolar transistor, said layer-structure (St1, St2, St3, St4) can be very thinly realized by means of some spacer-formed masks. Electrical connection between portions of said four transistors can be carried out through the layers of said layer-sequence. The contact to output-voltage terminal can be carried out through a step, which is constructed from two layers of said layer-sequence.
Patent TW-520345-B (TW)
Title: Precipitated silica
Inventor: SIRAY MUSTAFA
IPC: C01B33/193
Filed: 1998-12-09
Granted: 2003-02-11
Abstract: The precipitated silica has the following physico-chemical parameters: BET surface area (DIN 66131) in m<SP>2</SP>/g 400-600; DBP index (DIN 53601) in g/100 g 300-360; compacted density (DIN 53194) in g/l 70-140; Grindometer value (ISO 1524) in μm 15-50; Size distribution index I < 1.0 measured with a Malvern instrument size distribution index I=(d90-d10)/2d50 It is prepared by milling a precipitated silica in accordance with DE-A 31 44 299 in a classifier mill or a fluidized bed counter-flow mill. A polyethylene wax emulsion may be added before the milling procedure. The precipitated silica then has the following physico-chemical parameters: BET surface area (DIN 66131) in m<SP>2</SP>/g 351-600; DBP index (DIN 53601) as a % 300-360; carbon content as a % 1-8; compacted density (DIN 53194) in g/l 70-140; Grindometer value (ISO 1524) in μm 15-50; size distribution index I < 1.0. The precipitated silicas may be used as matting agents in lacquer systems.
Patent TW-432798-B (TW)
Title: High gain pulse generator circuit for clocking
Inventor: MILSHTEIN MARK S
IPC: H03K5/00
Filed: 1998-12-30
Granted: 2001-05-01
Abstract: A pulse generating circuit includes a first pulse generating circuit for generating a first output pulse, and a second pulse generating circuit for outputting a second output pulse. Each pulse generating circuit comprises a stack of two n-channel transistors and a reset circuit. The reset circuit includes two p-channel transistors and two inverters and is provided for automatically resetting the pulse generating circuits. The second pulse generating circuit includes a delay element for introducing an additional gate delay in the generation of the second output pulse. The additional gate delay introduces an asymmetry in the output pulses which offsets or cancels a previously introduced asymmetry of an input clock signal to generate an output clock signal having a constant period.
Patent TW-419669-B (TW)
Title: Semiconductor memory device
Inventor: OGURA TAKESHI
IPC: G11C7/14
Filed: 1999-03-10
Granted: 2001-01-21
Abstract: A semiconductor memory device operable at a power source voltage in a wide range and capable of stably detecting data includes a potential detector for detecting a potential of a dummy bit line having a parasitic capacitance corresponding to a parasitic capacitance of bit lines and a plurality of second precharge circuits provided correspondingly to the respective bit lines, for precharging the respective bit lines in response to a precharge signal and terminating the precharge operation in response to an output of the potential detector.
Patent TW-421752-B (TW)
Title: Terminal pin connector and easy-operation terminal
Inventor: YE MING-SHIAN
IPC: G06F3/00
Filed: 1999-03-19
Granted: 2001-02-11
Abstract: The present terminal pin connector comprises a data processing unit, a network controller for the connection with the servers through the network, and several data transmitting/receiving units. Each server may be connected with several terminal pin connectors and each terminal pin connector may be connected with several servers. But, each data transmitting/receiving unit can only be connected with an easy-operation terminal. The easy-operation terminal is a special device that does not include any central processing unit and is used for the connection with the output devices, such as monitor and printer, and the input devices, such as keyboard, mouse, and optical pen. The data processing unit of the terminal pin connector is used for executing a terminal simulation program so as to manage the network controller and the data transmitting/receiving units and simulate an independent terminal on each easy-operation terminal.
Patent TW-444072-B (TW)
Title: Method of depositing separately passivation layer
Inventor: WANG YING-LANG
IPC: C30B25/06
Filed: 1999-05-03
Granted: 2001-07-01
Abstract: The present invention discloses a method of depositing a passivation layer by multi-steps, which can be applied to the manufacture of a semiconductor integrated-circuit. On a semiconductor substrate having metal lines formed thereon, a dielectric layer is deposited as a passivation layer by high-density plasma chemical vapor deposition (HDPCVD). Before the temperature of the dielectric layer raises beyond the temperature which metal lines can endure, the deposition process is stopped. A cooling gas is subsequently introduced to the opposite surface of the semiconductor substrate to reduce the temperature on the surface of the semiconductor substrate, then a second HDPCVD process is implemented to complete the formation of the passivation layer at a different deposition rate.
Patent TW-417254-B (TW)
Title: Semiconductor device and its manufacture method
Inventor: OTSUKI KAZUTAKA
IPC: H01L27/112
Filed: 1999-06-16
Granted: 2001-01-01
Abstract: The object of the present invention is provided to restrain code ions from spreading in a lateral direction so as to easily enhance the integration of a semiconductor device such as a masked ROM. A memory cell is formed of a single MOS transistor, wherein an ion implantation stop film 7 is formed outside the channel region of the MOS transistor. And code ions are implanted into the channel region of a prescribed MOS transistor by the use of an ion implantation mask having the ion implantation stop film 7 to set the MOS transistor at a prescribed threshold value. At this point, a device pattern at the lower part of a memory cell or above-mentioned diffusion layers is self-aligned to above-mentioned ion implantation stop layer.
Patent TW-416098-B (TW)
Title: Method for monitoring the local out-of-focus of a semiconductor wafer in real time
Inventor: CHEN HUNG-JR
IPC: H01L21/027
Filed: 1999-06-25
Granted: 2000-12-21
Abstract: There is disclosed a method for monitoring the local out-of-focus of a semiconductor wafer in real time. A photolithography process is performed to a plurality of semiconductor wafer. Each semiconductor wafer has a plurality of exposure regions. When performing the photolithography process to each semiconductor wafer, each exposure region is processed by one exposure procedure. The real-time method for monitoring the local out-of-focus comprises : adjusting the horizontal angle of each semiconductor wafer, each exposure region of every semiconductor wafer having a rotating angle such that each semiconductor wafer can be horizontally placed; determining the maximum and minimum rotating angles of all exposure regions of each semiconductor wafer; determining a first averaged value of the maximum rotating angles and a second averaged value of the minimum rotating angles for a plurality of semiconductor wafers; and determining the difference between the first averaged value and the maximum rotating angle of the semiconductor wafer, and between the second averaged value and the minimum rotating angle of the semiconductor wafer, wherein the unit of the maximum rotating angle, the minimum rotating angle, the first averaged value and the second averaged value is uard. When the difference is larger than two hundred times of the line width (in micro-meter) in the integrated circuit on the semiconductor wafer, the semiconductor wafer is confirmed to be out of focus in the photolithography process.
Patent TW-408013-B (TW)
Title: Disposable article having proactive sensor
Inventor: ROE DONALD CARROLL
IPC: A61F13/15
Filed: 1999-12-01
Granted: 2000-10-11
Abstract: A disposable article having a sensor that predicts an impending event such as an elimination of bodily waste. The article may also include an actuator that performs a responsive function when the sensor predicts the impending event, such as signaling the wearer or a caregiver of the impending event.
Patent TW-445235-B (TW)
Title: Position detector for fluid cylinder
Inventor: NAGAI KATSUMI
IPC: B66F9/24
Filed: 1999-08-03
Granted: 2001-07-11
Abstract: A position detector includes a fluid cylinder (20) having a piston (26). An ultrasonic transceiver (31) is provided at one end of the piston (26) outside of the moving range of the piston (26). In response to electrical signals, the ultrasonic transceiver (31) transmits ultrasonic waves to a reflection surface of the piston (26). The transceiver (31) receives the ultrasonic waves reflected by the piston (26) and then generates electrical signals representing the reflected waves. A sensor detects that the piston (26) is at a predetermined position, at which the distance to the transceiver (31) is known. A CPU (45) supplies electrical signals to the ultrasonic transceiver (31) to produce ultrasonic waves and receives electrical signals representing the reflected waves from the ultrasonic transceiver (31). The CPU (45) then computes a piston (26) position value, which is a function of the travel time from when an ultrasonic wave is transmitted to when the reflected wave is received and the speed of the waves. The CPU (45) determines the speed of the waves when the piston (26) is detected to be at the reference position. The CPU (45) then computes the current position of the piston (26) based on the speed of the waves and on a current reading of the travel time.
Patent TW-476906-B (TW)
Title: A pointing stick having integral control circuitry
Inventor: VANDENBOOM ROBERT M
IPC: G06F3/038
Filed: 1999-08-19
Granted: 2002-02-21
Abstract: A device for generating conditioned electrical signals in response to forces applied to the device. The device includes an actuator with a substrate and a shaft having several strain sensitive resistors mounted on the shaft. The resistors generate an electrical signal representative of force applied to the shaft. The actuator is mounted on a printed circuit board. The printed circuit board has a signal conditioning means, mounted to the printed circuit board, for conditioning the electrical signal. The signal conditioning means operates to receive the electrical signal as an input an provides a conditioned signal as an output. The printed circuit board and actuator is mounted to a keyboard base.
Patent TW-497052-B (TW)
Title: Method for quickly establishing application systems of different languages
Inventor: CHIOU CHIUAN-CHENG
IPC: G06F17/30
Filed: 1999-10-19
Granted: 2002-08-01
Abstract: The present invention relates to a method for quickly establishing application systems of different languages, and more particularly to a method for establishing an application system having the same language family with the operating system based on the language family of the current operating system and via the link with the language resource dynamic linked library. The method first uses a hook function of a general system with the same function as the object application system to obtain the language code of the operating system on which the current general system depends to be linked with a resource dynamic linked library with different language resources. The language resource library corresponding to the language code in the resource dynamic linked library is set as the system resource of the current application system. Accordingly, an application system with the same language family as the current operating system is established, so as to eliminate the inconvenience in occupying space and re-editing when performing conversion between different families of application systems with the conventional skill.
Patent TW-515846-B (TW)
Title: High purity gallium for producing compound semiconductor and a process for producing the same
Inventor: YAMAMURA TAKEHARU
IPC: C30B29/02
Filed: 1999-10-29
Granted: 2003-01-01
Abstract: A method for separating impurities from a gallium material containing impurities, which comprises blending the gallium material in a liquid state in a container, proceeding gradually from the surface of the inner wall toward center portion of the container, in a manner such that a cylinder-like interface is formed by gradually reducing its diameter, and separating the liquid phase remained in the central portion from a coagulated phase before total coagulation of the whole material in the container; further, using the gallium separated from liquid phase and repeating the above-described procedure if necessary. A gallium product having a purity suitable for preparation of a compound semiconductor can be obtained according to the analysis of the concentrations of impurities in said Ga material.
Patent TW-460861-B (TW)
Title: Recording medium for storing start position information for each zone and method for managing date using the information
Inventor: KO JUNG-WAN
IPC: G11B/
Filed: 1999-12-10
Granted: 2001-10-21
Abstract: A recording medium for storing start position information for each zone and a method for managing data using the information are disclosed. In a disc having a plurality of zones which form a group, and a spare area which is allocated at the start portion or the end portion of the group for replacing defects when start logical sector numbers of each zone are changed by slipping replacement during initialization or reinitialization, the information is stored in the defect management area to thereby increase the compatibility of the medium. In particular, by the method for managing data using information stored in a defect management area, generation of errors is prevented in reading or writing due to the change of a physical position of a real-recorded file which are caused by wrong calculation of the start logical sector numbers for each zone.