baber/WOPTO huggingface dataset:
Patent TW-I223159-B (TW)
Title: Data transmission method using I2C bus as interface and electronic system thereof
Inventor: LI RUNG-JENG
IPC: G06F13/40
Filed: 2003-03-11
Granted: 2004-11-01
Abstract: An electronic system using the Inter-integrated circuit (I2C) bus as interface comprises an I2C bus; multiple slave devices coupled to the I2C bus and providing an identical I2C address; a master control device coupled to the I2C bus for receiving and transmitting information; and a selector coupled to the I2C bus and the master control device, and providing multiple output terminals to couple with the multiple slave devices and selecting one of the multiple slave devices in cooperation with the master control device for data transmission.
Patent TW-584866-B (TW)
Title: Backlight setting method of needle-type meter
Inventor: LUO RUEI-YANG
IPC: G12B11/04
Filed: 2003-03-14
Granted: 2004-04-21
Abstract: A kind of backlight setting method of needle-type meter is disclosed in the present invention, in which the backlight of meter can be circularly changed through the combination of electronic control loop with microprocessor. In the invention, the control button disposed outside the instrument meter is provided for the user to press the button to select the favorite backlight color when changing color for the backlight of needle-type meter. By using the program design of microprocessor, the light emitting devices are provided for the user to change the main color source to obtain color variation through the asynchronous mixing color principle, so as to satisfy the favorite and required backlight of needle-type meter for the user.
Patent TW-591702-B (TW)
Title: A method for transforming amorphous silicon substrate to poly-silicon substrate
Inventor: CHANG MAO-YI
IPC: H01L21/268
Filed: 2003-05-12
Granted: 2004-06-11
Abstract: A method for transforming amorphous silicon substrate to poly-silicon substrate is disclosed. The method includes: providing an amorphous silicon substrate and doping inert atoms to the substrate; and performing a heat process by heating the surface of the amorphous silicon substrate.
Patent TW-I285438-B (TW)
Title: Improved LED structure for enhancing heat conduction and luminosity
Inventor: CHEN TSUNG-SHIN
IPC: H01L33/00
Filed: 2003-06-13
Granted: 2007-08-11
Abstract: An improved LED structure for enhancing heat conduction and luminosity is provided. It is mainly constructed by an integrally-formed support unit. The unit consists of a central part that is used to fix the chip cup, cathode part that has at least two supports connecting each other, at least a conduction line that connects the chip and anode part. Its features are: The support unit has at least a non-straight cutting for splitting the cathode and anode. Two opposite vertical cut planes are generated between the cathode and anode parts. A chamber is set in the central part to form a first layer cup, and a wall that upwardly inclines and extends. A concave part is formed on the said first cup bottom to make a second cup for carrying at least a light-emitting chip. The light-focusing effect of the LED is enhanced.
Patent TW-I269718-B (TW)
Title: Thermally sensitive recording medium
Inventor: NATSUI JUNPEI
IPC: B41M5/26
Filed: 2003-06-26
Granted: 2007-01-01
Abstract: The present invention provides a thermally sensitive recording medium which exhibits high recording sensitivity, high heat resistance of non-image areas, and excellent storage stability of images. To achieve the objective, a thermal recording layer contains a sensitizer consisting of at least one compound represented by the general formula (1) and a stabilizer consisting of at least one member selected from among 3-{[(phenylamino)carbonyl]amino}benzenesulfonamide of the formula (2), the urea-urethane compound of the formula (3), and copolymers of glycidyl methacrylate and vinyl monomers (having average molecular weights of 9000 to 11000, epoxy equivalents of 300 to 600, and melting points of 110 DEG C or below). Compounds represented by the general formula (4) are preferably used as the developer. (1) (2) (3) (4) [wherein R1 is hydrogen, halogeno, alkyl, or alkoxyl; and R2 is alkyl having 1 to 4 carbon atoms, alkoxyl, phenyl, or hydrogen.]
Patent TW-I222119-B (TW)
Title: Gate structure and MOS including the gate and method of fabricating the same
Inventor: CHEN CHIA-LIN
IPC: H01L21/28
Filed: 2003-07-29
Granted: 2004-10-11
Abstract: A gate structure includes a substrate, a gate dielectric layer above the substrate, a first gate conductor layer above the gate dielectric layer, which is a randomly oriented fine grain structure, and a second gate conductor layer above the first gate conductor layer, which is a columnar oriented fine grand structure. An MOS structure including the gate and method of fabricating the same is also disclosed.
Patent TW-I243250-B (TW)
Title: Chip carrier for testing electric performance of passive components and method for testing the same
Inventor: CHEN YEN-CHUN
IPC: G01R31/26
Filed: 2003-08-05
Granted: 2005-11-11
Abstract: A chip carrier for testing the electric performance of passive components thereon and a method for fabricating the same are provided. The chip carrier includes a core layer provided with a plurality of conductive traces on a die attachment surface of the core layer; the conductive traces include at least a first conductive trace having a first contact and a second contact for connecting a passive component, two ends of the first conductive trace are respectively connected to a first finger on one surface and to a first ball pad on the other surface of the chip carrier, and the first contact and the first finger are located on the same side of the passive component. The conductive traces further include at least a second conductive trace having two ends respectively connected to the first contact of the first conductive trace and to a second ball pad, formed on the margin area outside the package line of the chip carrier. The second ball pad is located on the surface of chip carrier where the first solder ball is formed. A solder mask is coated on the core layer to cover the plurality of conductive traces and formed a plurality of apertures to expose at least the first contact, second contact, the first finger and the first and second ball pads.
Patent TW-I231100-B (TW)
Title: Active snubber for synchronous rectifier
Inventor: XIONG YA-HONG
IPC: H02M3/335
Filed: 2003-09-23
Granted: 2005-04-11
Abstract: The invention relates to an active snubber for synchronous rectifier. The active snubber is coupled across a synchronous rectifier having a first synchronous MOSFET and a second synchronous MOSFET coupled to a transformer in a power converter. The active snubber includes a series-coupled active switch and first snubber capacitor which is coupled between a drain terminal and a source terminal of the first synchronous MOSFET, a gate driver operative to keep the active switch conducting a specified period of time during a non-conduction interval of the first synchronous MOSFET. The gate driver is composed of an auxiliary winding, a capacitor, and a resistor, wherein the auxiliary winding and the capacitor are connected in series and then coupled across the resistor in parallel, which is coupled between a gate and a source of the active switch.
Patent TW-I230451-B (TW)
Title: Solder ball leveling method and fixture
Inventor: LIN RUNG-HUEI
IPC: H01L23/488
Filed: 2003-10-09
Granted: 2005-04-01
Abstract: A solder ball leveling method and a fixture are provided. A leveling apparatus and a fixture are used to level a plural number of solder balls arranged on an electronic device, in which the leveling apparatus possesses a first face capable of leveling the solder balls having contact with and the fixture can securely attach the electronic device onto a second face of the fixture, in which the first face and the second face of the leveling apparatus have a predetermined distance. The method comprises following steps: securely clamping the electronic device onto the fixture; moving the fixture and the leveling apparatus relatively close to each other and performing the leveling operation to the solder balls with the leveling apparatus so that the solder balls are leveled to a predetermined distance.
Patent TW-I256716-B (TW)
Title: Line skeleton of a source metal layer in power MOS
Inventor: HUANG LIN-CHUNG
IPC: H01L23/48
Filed: 2003-10-30
Granted: 2006-06-11
Abstract: A line skeleton of a power MOS includes at least two isolated source metal layer, a gate bus and a gate bonding pad. By separating one continuous source metal layer into at least two isolated source metal layer and connecting useful source metal layers to the same source bonding region, the die yield can be increased in order to upgrade the total product yield.
Patent TW-I230013-B (TW)
Title: System and method for processing memory with YCbCr 4:2:0 planar video data format
Inventor: GU JAMES JIN-MING
IPC: G09G5/02
Filed: 2003-11-11
Granted: 2005-03-21
Abstract: A system and method for processing YCbCr video data stored in a paged memory with reduced page breaks. A method is disclosed for retrieving YCbCr planar video data in 4:2:0 format from paged memory. A page of the paged memory containing Y data is accessed; Y data corresponding to M pixels of video data is then retrieved, where M is a value greater than or equal to two. The retrieved Y data is then stored in a shift register. Similar steps are taken to access, retrieve and store Cb and Cr data. Within the shift register, the Y, Cb, and Cr data is stored as sets of planar video data. The Y, Cb, and Cr data is retrieved from the shift register as a series of pixel data for generating pixels on a video display unit.
Patent TW-I263117-B (TW)
Title: Negative type photosensitive resin composition containing a phenol-biphenylene resin
Inventor: ARAO KEI
IPC: G03F7/032
Filed: 2004-01-29
Granted: 2006-10-01
Abstract: Negative type photosensitive resin compositions are provided. Such negative photosensitive resin compositions contain a novolac resin and a phenol-biphenylene resin as well as an epoxy compound. These resin compositions habe excellent heat-impact resistance for the hardened resin material.
Patent TW-I243255-B (TW)
Title: Indoor location estimation method and system using scramble sample strategy
Inventor: KUO SHENG-PO
IPC: G01S5/02
Filed: 2004-02-13
Granted: 2005-11-11
Abstract: The present invention provides an indoor location estimation method and system using scramble sample strategy, wherein plural access points are arranged at different locations of the indoor space, and a mobile node is capable of detecting the signal strength of each access point. A signal accumulation step accumulates multiple signal strength vectors, each representing the signal strength of all access points at a specific time detected by the mobile node. A signal scramble step scrambles all the signal strength vectors to generate multiple scrambled signal strength vectors. A location estimation step generates multiple location information corresponding to the multiple scrambled signal strength vectors. A location selector step selects an optimal one from the multiple location information for output as a predicted location.
Patent TW-I288939-B (TW)
Title: Line filter
Inventor: MIZUTANI NOBORU
IPC: H01F27/28
Filed: 2004-02-24
Granted: 2007-10-21
Abstract: The purpose of the present invention is to provide a line filter which has a common mode choke coil structure and is provided with the characteristics capable of limiting the leakage flux to the minimum, having stability in magnetic efficiency, and restraining normal mode noises. The line filter is equipped with a closed magnetic circuit core of square shape, in which bobbins with the wound coils are mounted on one magnetic leg portion of the magnetic circuit core; and the other magnetic leg portion opposite to one magnetic leg portion is arranged on the peripheral side of the coils. In addition, the U-shaped center core is inserted between the bobbins so as to separate them from each other; and furthermore a core cover with the shape of ""U"" rotated 90 DEG clockwise is fixed so as to cover three sides including the other magnetic leg portion and the side magnetic leg portions other than the magnetic leg portion of the closed magnetic circuit core.
Patent TW-I312173-B (TW)
Title: Ultraviolet irradiating method and an apparatus using the same
Inventor: OKAWA YUJI
IPC: H01L21/301
Filed: 2004-03-10
Granted: 2009-07-11
Abstract: An ultraviolet irradiating apparatus for emitting ultraviolet light toward a work piece. The work piece, e.g. a semiconductor wafer, is held by a ring-shaped frame through an ultraviolet sensitive adhesive tape applied to the back surface of the wafer. The apparatus includes an ultraviolet irradiating section having a regulating member disposed in a lower position of a support base. The regulating member is provided to limit a downward displacement of the wafer.
Patent TW-I255859-B (TW)
Title: Non-heat treated connecting rod and method of manufacturing the same
Inventor: HASEGAWA TATSUYA
IPC: F16C7/02
Filed: 2004-03-16
Granted: 2006-06-01
Abstract: A non-heat treated connecting rod which comprises, by mass %, C: 0.25-0.35%, Si: 0.50-0.70%, Mn: 0.60-0.90%, P: 0.040-0.070%, S: 0.040-0.130%, Cr: 0.10-0.20%, V: 0.15-0.20%, Ti: 0.15-0.20% and N: 0.002-0.020%, and the balance Fe and impurities, with chemical compositions being less than 0.80 in the value of C+(Si/10)+(Mn/5)+(5Cr/22)+1.65V-(5S/7) using the symbol of the element as its content, the microstructure of the Big end of the said connecting rod being ferrite-pearlite, all-region hardness of the said big end being 255 to 320 in Vickers hardness, the ferrite-region hardness in the said ferrite-pearlite of the Big end being 250 or more in Vickers hardness and the ratio of the said ferrite-region hardness to the said all-region hardness of the said Big end being 0.80 or more, is excellent in machinability, fracture splitting ability, and fatigue resistance, although no Pb at all is added. Therefore, this non-heat treated connecting rod can be utilized as a low cost type connecting rod in automobile engines or the like.
Patent TW-I257540-B (TW)
Title: Hierarchical clock gating circuit and method
Inventor: SHELOR CHARLES F
IPC: G06F1/04
Filed: 2004-03-25
Granted: 2006-07-01
Abstract: A power saving hierarchical clock gating circuit includes a first level clock gate, a plurality of second level clock gates connected to the first level clock gate, and a plurality of third level clock gates for selectively providing a clock signal to a functional block. Each third level clock gate is connected between a second level clock gate and a register, or other low level device, of the functional block for selectively providing the clock signal to the register. Accordingly, the clock signal is conveyed from the first level clock gate through a second level and a third level clock gate to a register when the corresponding first, second, and third level clock gates are activated by associated decision logic.
Patent TW-I273471-B (TW)
Title: Input method and input device
Inventor: GOTO KOICHI
IPC: H04N21/485
Filed: 2004-06-09
Granted: 2007-02-11
Abstract: The touch panel 47 of the present invention is composed of a display/sensor unit 51a that is slightly larger than the display screen of a LCD device 46 and a sensor unit 51b which is projected to the outside from one side, for example, from one side on the right. A finger 52 of the user is touched to a selection item such as desired button, icon, or the like on the display/sensor unit 51a and vertically moved on the sensor unit 51b. A selection display 53 constructed by a plurality of buttons is displayed along the side of the right side of the display screen by the LCD device 46. A button beside the finger 52 is highlighted and when the finger 52 is released, the highlighted button is selected. If there are no buttons adjacent to the finger 52, the button is not highlighted. Even if the finger 52 is released, the state is not changed. When finger 52 is moved to the display/sensor unit 51a, the selection display 53 disappears.
Patent TW-I237938-B (TW)
Title: Securing device for receiving a controller of the heat-dissipating device
Inventor: LIU CHENG-CHIEH
IPC: H02K11/00
Filed: 2003-08-06
Granted: 2005-08-11
Abstract: The present invention provides a securing device for receiving therein a controller used to drive and control the operation of a heat-dissipating device and detect the phases of magnetic poles of the motor while operating. The securing device includes a body with a retaining slot to be fixed onto a base of the frame, or a cover of the stator of the heat-dissipating device. Not only can such a design reduce the required component number, the manufacturing cost and the assembling time, but also can prevent the complicated circuit design.
Patent TW-I248156-B (TW)
Title: Cleaning and drying apparatus for substrate holder chuck and method thereof
Inventor: OHTSUKA HIROMI
IPC: B08B3/02
Filed: 2004-07-28
Granted: 2006-01-21
Abstract: The present invention provides a cleaning and drying apparatus for a substrate holder chuck equipped with a holding members 31 (32, 33) having a plurality of holding grooves 31a for holding a plurality of wafers W respectively. The apparatus includes: a dual-fluid-supplying nozzle 50 for spraying N2-gas and deionized water to the holding grooves 31a of the holding member 31 of the chuck 30; a cleaning-liquid-supplying nozzle 60 for spraying deionized water to a side face 31b of the holding member 31; and an air-pressure cylinder 300 for causing the relative movement between the dual-fluid-supplying nozzle 50/the cleaning-liquid-supplying nozzle 60 and the holding member 31 of the chuck 30, along the longitudinal direction of the holding member 31 and horizontally. Due to driving of the air cylinder 300, the dual-fluid-supplying nozzle 50 is constructed so as to spray N2-gas and deionized water to the holding grooves 31a of the holding member 31 in advance of the cleaning-liquid nozzle 60. Accordingly, it is possible to shorten a cleaning-and-drying time for the substrate holder chuck and also possible to improve a throughput of the whole apparatus.
Patent TW-I251890-B (TW)
Title: Wafer structure, chip structure and bumping process
Inventor: WU SHYH-ING
IPC: H01L21/60
Filed: 2004-11-05
Granted: 2006-03-21
Abstract: A wafer structure including a plurality of chips, a first passivation layer, a plurality of buffer pads, a second passivation layer and a plurality of bumps is provided. Each of the chips has an active surface. A plurality of bonding pads is disposed on the active surfaces. The first passivation layer is disposed on the active surfaces of the chips. The first passivation layer has a plurality of first opens. One of the bonding pads is appeared in one of the first opens. The buffer pads are disposed in the first opens and part of the first passivation layer that surrounds the first opens. The buffer pads are electrically connected to the bonding pads. The second passivation layer is disposed on the first passivation layer. The second passivation layer has a plurality of second opens. One of the buffer pads is appeared in one of the second opens. The bumps are disposed in the second opens and electrically connected to the buffer pads.
Patent TW-I263884-B (TW)
Title: Memory card access in a battery operated device
Inventor: YOSHIDA HIDEO
IPC: G06F1/28
Filed: 2004-11-11
Granted: 2006-10-11
Abstract: The present invention relates to an apparatus, such as a digital camera, in which a battery is removably loaded and a memory card is detachably inserted so that the apparatus is supplied with power from the battery and performs processing including writing data on the memory card. The invention ensures that data write inhibit operation on the memory card is performed before the memory card is removed. A memory card slot for inserting the memory card is provided inside a battery lid to be accessible by opening the battery lid. A circuit detects separation of a battery contact plate from the battery due to opening of the battery lid and turns the memory card to a write protect state.
Patent TW-I259702-B (TW)
Title: An intelligent message integrated system
Inventor: CHANG CHIN-YUAN
IPC: H04M11/06
Filed: 2004-12-02
Granted: 2006-08-01
Abstract: The present invention relates to an intelligent message integrated system, which integrate the PSTN with Internet which are the two biggest networks. The system which combines the functions of e-mails, facsimiles, video conferences, computer telephone system, voice recognition and text-to-speech system can provide the users of the enterprise to utilize the inner network explorer of the enterprise to enter the intelligent message integrated system for setting all kinds of data and parameters of persons or systems. As the result, through the corresponding cooperation of modules and the unity of the operating panel, users can use all kinds of communicating services to send the message by handling the operating panel without being aware of the sort of the used service to let the message be sent more conveniently through the two biggest networks.
Patent TW-I319357-B (TW)
Title: Biaxial oriented white polypropylene film for thermal transfer recording and accepting sheet for thermal transfer recording made of the same
Inventor: TANAKA SHIGERU
IPC: B32B27/32
Filed: 2004-12-24
Granted: 2010-01-11
Abstract: [Problem to be Solved]  To provide a biaxially oriented white film for thermal transfer recording which has low specific gravity required as a thermal transfer film, high whiteness and cushion factor, and is excellent in crease resistance, and has a high-level compatibility between high sensitivity and productivity when used as a substrate of a receiving sheet, and a receiving sheet for thermal transfer recording using the same.  [Means for Solving the Problem]  (1) A biaxially oriented white polypropylene film for thermal transfer recording  characterized in that  it is a film comprising of polypropylene resin of which ²-crystal ratio is 30% or more and melting temperature is 140 to 172°C, which has a substantially non-nucleus voids, a void ratio of 30 to 80% and a sum of strengths of longitudinal direction and of transverse direction of the film at 2% elongation (F2 value) being in the range of 10 to 70 MPa and a surface glossiness being in the range of 10 to 145 % (the first configuration). 
(2) A biaxially oriented white polypropylene film for thermal transfer recording  characterized in that  a skin layer (B layer) of which surface glossiness is 10 to 145 % is laminated to at least one side of a core layer (A layer) of polypropylene resin of which ²-crystal ratio is 30% or more, melting temperature is 140 to 172°C, which has a substantially non-nucleus voids, a void ratio of 30 to 80%, and a sum of the strengths of longitudinal direction and of transverse direction of the film at 2% elongation (F2 value) being in the range of 10 to 70 MPa (the second configuration). 
(3) A biaxially oriented white polypropylene film for thermal transfer recording in which a skin layer (B layer) of which surface glossiness is in the range of 10 - 145 % is laminated to at least one side of a core layer (A layer)  characterized in that  a sum of strengths of longitudinal direction and of transverse direction of the film at 2% elongation (F2 value) is in the range of 30 to 100 MPa and that the film has ²-crystal activity (the third configuration). 
(4) A biaxially oriented white polypropylene film for thermal transfer recording which is a film in which a skin layer (B layer) having a half-crystallization time of 60 seconds or less and a surface glossiness of 30 to 145 % is laminated at least on one side of a core layer (A layer) which consists of polypropylene resin having a substantially non-nucleus void,  characterized in that  it is a film of a specific gravity of 0.3 to 0.7 and has ²-crystal activity (the fourth configuration).