Patent GB-1300492-A (GB)
Title: A scanning signal generator
Inventor: HORI HIROO
IPC: H04N3/15
Filed: 1971-05-24
Abstract: 1300492 Counters; shift registers TOKYO SHIBAURA ELECTRIC CO Ltd 24 May 1971 [22 May 1970] 16667/71 Headings G4A and G4C [Also in Divisions H1 H3 and H4] Semi-conductor scanning generator for a train of scanning pulse signals for solid state pick up and receiving plates in TV transmission and reception, and for flying spot scanners, comprises (Fig. 2) a collector region 1 of one conductivity type, e.g. N type Si overlain by a second base region 2 of opposed type, e.g. P type Si, and a first base region 3 of the one conductivity type. Further emitter regions 4 1 to 4 3n of opposed type are diffused into the upper surface of region 3, and have anodes 5 1 to 5 3n of e.g. Al vapour deposited on the respective regions; the latter being serially spaced at pitch L less than the carrier diffusion distance through the Si layer. Outside the series a gate electrode 6 of Au is deposited on region 3, and a cathode of Au is deposited on the outer face of region 1. Resistors R 1  to R 3n  having output terminals Q 1  to Q 3n , Q<SP>1</SP> 1  to Q<SP>1</SP> 3n  are serially connected to the anodes 5 1  to 5 3n  and also in sequence R 1 , R 4 , R 7 , R 3n-2  to terminal P 1 , R 2 , R 5 , R 8 , R 3n-1  to P 2 , and R 3 , R 6 , R 9 , R 3n  to P 3  ; while gate 6 is connected to terminal G. In operation, each 4th element fires in succession a PNPN silicon controlled rectifier switching element with region 4 positively energized and region 1 regatively energized, and in Fig. 3 the elementary current is plotted against applied voltage as curve 8; V B  denoting breakdown voltage when gate G is de-energized and V 0  the breakdown voltage when G is negatively energized. Terminals P1, P2, P3 are energized with 3-phase pulse trains V 1 , V 2 , V3 (Fig. 4) in sequence V 11 , V 21 , V 31 ; V 12 , V 22 , V 32 ; &c. while the gate G is energized with a pulse train V g  wherein pulses g 1 , g 2 , g 3  &c. are negative to pulses V 11 , V 21 , V 22  etc.; the latter being of voltage V A less than breakdown voltage V B  but exceeding breakdown voltage V 0 . Initially, gate terminal G receives pulse g 1  and terminal P 1 , the pulse V 11 ; so that the section comprising region 4<SP>1</SP> is highly conducting to develop pulse Q 11  of train V 1  across terminals Q 1 , Q<SP>1</SP> 1 . Simultaneous pulses on the sections comprising regions 4 4 , 4 7 , 4 3n-2  are obstructed by the non-conductive sections, but on firing of the section comprising region 4, the holes of region 2 and electrons of region 3 of the first section diffuse into the regions 2 and 3 of the second section; rendering them respectively positive and negative. On energization of terminal P 2  with pulse V 21 , the section comprising region 4 2  conducts so that pulse Q 21  is developed across resistor R 2 . Similarly, in pulse V 31  the section comprising. region 4 3  conducts to develop pulse Q 31  across resistor R 3  and so on, so that sequential supply of pulses V 12 , V 22 , V 32  on terminals P 1 , P 2 , P 3  develops a train of pulses Q 41  ... Q 3n1  and on the latter pulse a further pulse g 2  is applied to gate 6, and the process continues sequentially. Scanning speed is varied according to the width of pulses V 1 , V 2 , V 3  and the N and P regions may be interchanged, while the semi-conductor may be of GeAs or GaAs. Pulses are derivable in the form of light emanations from the PNPN sections on firing, and light emitting diodes may replace the series resistors (Fig. 5, not shown) to generate scanning photopulses. Alternatively, the N firing sections may be divided into (n + 1) groups supplied with (n + 1) phase pulses, or they may be supplied in direct sequence with N phase pulses. The firing sections may be divided into successive groups, each of which has a gate electrode on a region adjacent each group jointly connected to terminal G, while corresponding regions of the firing sections are connected to respective pulse input terminals over associated anodes and load resistors; the input terminals being fed with 4-phase pulses to permit groups of scanning pulses to be derived with synchronism of corresponding pulses (Figs. 6, 7, not shown).