baber/WOPTO huggingface dataset:
Patent TW-550816-B (TW)
Title: Semiconductor device and manufacturing method thereof
Inventor: WATANABE HIROSHI
IPC: H01L21/8247
Filed: 2001-10-09
Granted: 2003-09-01
Abstract: This invention provides a semiconductor device and a manufacturing method thereof, characteristically comprising a first transistor including a first gate formed on a semiconductor substrate, a first diffusion layer of a low impurity concentration formed on the surface of the semiconductor substrate in a manner to surround the first gate, a first diffusion layer of a high impurity concentration formed on the surface of the semiconductor substrate in a manner to surround the first diffusion layer having a low impurity concentration, and a first gate side wall formed to surround the first gate; and a second transistor including a second gate formed on the semiconductor substrate, a second diffusion layer of a low impurity concentration formed on the surface of the semiconductor substrate in a manner to surround the second gate, a second diffusion layer of a high impurity concentration formed on the surface of the semiconductor substrate in a manner to surround the second diffusion layer having a low impurity concentration, and a second gate side wall formed to surround the second gate and having a thickness equal to that of the first gate side wall of the first transistor; wherein the size of the second diffusion layer formed on the surface of the semiconductor substrate and having a low impurity concentration, which extends from the second gate to reach the second diffusion layer having a high impurity concentration, is larger than the size of the first diffusion layer formed on the surface of the semiconductor substrate and having a low impurity concentration, which extends from the second gate to reach the first diffusion layer having a high impurity concentration.
Patent TW-558424-B (TW)
Title: Shoe construction
Inventor: CLARK DOUGLAS E
IPC: A43B13/38
Filed: 2001-12-21
Granted: 2003-10-21
Abstract: A shoe has a bottom including an expansion mechanism for expanding the bottom laterally underlying the metatarsals. An upper is carried by the bottom. A chassis is carried by the bottom for underlying the foot. In one embodiment, the expansion mechanism of the bottom includes a base portion and an expansion portion, the base portion having a plurality of slots extending generally longitudinally in the mid-foot region defining the expansion portion, the expansion portion formed of a material allowing lateral expansion of the bottom. In one embodiment, the upper has an expanding and contracting mechanism for expanding and contracting the upper therein stabilizing holding the foot as the foot moves. In one embodiment, the expanding and contracting mechanism is an elastic omega seam interposed between two pieces of leather at a seam wherein the omega opens and closes. In one embodiment, the chassis has at least three tailored zones, a heel zone underlying the heel of the foot, a metatarsal zone underlying the metatarsals, and a toe zone underlying the toes of the foot. In one embodiment, the chassis has an additional tailored zone, an arch zone underlying the arch of the foot.
Patent TW-530386-B (TW)
Title: Method of fabricating a MOS transistor with low gate depletion
Inventor: CHANG KUO-HUA
IPC: H01L21/8239
Filed: 2002-01-11
Granted: 2003-05-01
Abstract: A method of fabricating a metal-oxide semiconductor (MOS) transistor with low gate depletion and high gate drivability in nitride read only memory (NROM). This method creates a MOS transistor by forming a gate including a silicon oxide layer, an amorphous silicon layer, and a silicon germanium layer. A nickel layer is formed on the top surface of the gate. A rapid thermal annealing process causes the nickel layer and the silicon germanium layer to react and form a nickel silicide layer. This process will lessen the effect of gate depletion, since the formation of nickel silicide consumes relatively few silicon atoms, and the rapid thermal annealing process diffuses germanium atoms from the silicon germanium layer into the amorphous silicon layer and increases the concentration of dopant in the gate.
Patent TW-533500-B (TW)
Title: Integrated optoelectronic device and method for making same
Inventor: KUNKEE ELIZABETH T
IPC: G02B6/43
Filed: 2002-01-28
Granted: 2003-05-21
Abstract: An integrated optoelectronic device (1) includes a substrate(4), at least one optoelectronic component (2) provided on the substrate (4), and a waveguide (9a ... 9n) provided on the substrate (4) and optically connected to the at least one optoelectronic component (2). The waveguide (9a ... 9n) is made of a sol-gel glass. A method for making the integrated optoelectronic device (1) includes the steps of providing a substrate (4), providing at least one optoelectronic component (2) on the substrate (4), and providing at least one sol-gel glass waveguide (9a ... 9n) on the substrate (4) and optically connected to the at least one optoelectronic component (2).
Patent TW-I243405-B (TW)
Title: Lithographic projection apparatus and method of manufacturing a device
Inventor: MULKENS JOHANNES CATHARINUS HU
IPC: G03F7/20
Filed: 2002-02-08
Granted: 2005-11-11
Abstract: A lithographic projection apparatus is provided with a sensor for detecting luminescence radiation produced in the projection lens system by the passage of the projection beam. The luminescence radiation is indicative of the dose delivered to the substrate, and can be detected close to the substrate to avoid errors due to transmission variations in the optical path from the radiation source to the substrate.
Patent TW-535198-B (TW)
Title: Membrane for vacuum suction of wafer
Inventor: CHEN TSZ-SHIN
IPC: B24B37/30
Filed: 2002-02-15
Granted: 2003-06-01
Abstract: A membrane for vacuum suction of a wafer is suitable for a polishing head and is equipped with a sheet-like body and a plurality of tiny particles distributed on the surface of the sheet-like body. The distribution of the particles matches with the voids on the suction plate of the polishing head and the particles are only distributed on the locations relative to the voids. The use of the particles located on the surface of the sheet-like body can reduce the suction force between the membrane and the wafer, thereby reducing the probability of error in unloading the wafer.
Patent TW-541235-B (TW)
Title: Method of manufacturing prepreg
Inventor: KAJI YOSHIYUKI
IPC: B23K26/00
Filed: 2002-05-21
Granted: 2003-07-11
Abstract: A prepreg cutting method is provided that cuts prepreg without applying any processing, such as heating, to that part of prepreg other than the place to be cut. When prepreg formed by impregnating a base material with a resin and left to semi-harden is to be cut into a specified dimension, the surface of the prepreg is irradiated with a laser beam so that the resin of the irradiated portion is softened while the laser beam irradiating position is shifted on the prepreg, and the softened resin part is cut by a cutting blade. Because the cutting blade cuts the prepreg portion where the resin has softened, resin dust will not scatter.
Patent TW-569092-B (TW)
Title: Page buffer of a flash memory
Inventor: LIN YEN-TAI
IPC: G11C16/10
Filed: 2002-05-23
Granted: 2004-01-01
Abstract: A page buffer of a flash memory has a power supply, a latch circuit, and a plurality of switches. At first, control the switches for resetting a first terminal and a second terminal of the latch circuit to a respective predetermined voltage. If a memory cell is not to be programmed, the voltage levels of the first terminal and the second terminal keep unchanged when the power supply outputs a programming voltage. If the memory cell is to be programmed, the voltage levels of the first terminal and the second terminal are changed when the power supply outputs the programming voltage. Each of the first terminal and the second terminal will regain the predetermined voltage after the memory cell is completely programmed to store a predetermined binary digit.
Patent TW-554486-B (TW)
Title: Method of designing semiconductor device and semiconductor device
Inventor: WACHI YUJI
IPC: G06F17/50
Filed: 2002-06-11
Granted: 2003-09-21
Abstract: Provided is a method of designing a semiconductor device in which power supply voltages can be applied individually and clock jitter is suppressed to avoid lowering of logic operation rate. Specifically, plural power supply lines (WL1) electrically connected to power supply bumps (BP1, BP2) are disposed in parallel to the lateral array of the power supply bumps (BP1, BP2), and power supply lines (WL2) of the lower layer which are electrically connected to the power supply lines (WL1) are disposed in parallel to each other so as to be orthogonal to the power supply lines (WL1) when viewed from above. Power supply voltages (V1, V2) are assigned to two power supply lines (WL1) that are nearest neighbors across an array of the power supply bumps (BP1), and power supply voltages (G1, G2) are assigned to two power supply lines (WL1) that are nearest neighbors across an array of the power supply bumps (BP2). The power supply lines (WL2) are disposed in parallel to each other so as to be orthogonal to the power supply lines (WL1) when viewed from above.
Patent TW-548206-B (TW)
Title: Indicator of motor-assisted bicycle
Inventor: AKIBA RYUJI
IPC: G01R31/36
Filed: 2002-06-18
Granted: 2003-08-21
Abstract: An indicator of motor-assisted bicycle is provided for displaying the situations such as acceleration, regeneration charge, etc., to a driver. The indicator (28), as mounted on a part of the handle of the motor-assisted bicycle, comprises a button (28a), mode indicating lamps (28b) for indicating the conditions of assisting motor, namely, the standard (STD) mode, ECO mode and S-ECO mode, a bar diagram (28c), and a type-showing portion (28d) for showing the types of REGENERATING/DRIVEING/BATTERY. With the assisting motor being switched to ECO mode, for example, the three lamps corresponding to the ECO mode will flash in few seconds. Further, in the type of generating (or driving) during processing, the type-showing portion (28d) clearly shows REGENERATING CDRIVING), and the bar diagram (28c) shows the degree of regeneration charge (acce1eration). Upon the button (28a) being pressed, the type-showing portion (28d) clearly shows BATTERY, and the residual of the battery is shown on the bar diagram (28c).
Patent TW-I274416-B (TW)
Title: Integrated circuit with reduced coupling noise
Inventor: KARASUDANI MUNEHIRO
IPC: H01L27/092
Filed: 2002-07-22
Granted: 2007-02-21
Abstract: In order for circuit blocks 1 to 3 composed by the CMOS process, and analog lines 5-1, 5-2, and 5-3 connected thereto not to overlap on the layout, the analog lines 5-1 and 5-2 are wired so that such lines roundabout the layout of the AM/FM common circuit block 3. Through this, the distance of the signal line within the AM/FM common circuit block 3 and the analog lines 5-1 and 5-2 can become as long as possible, the signal line within the AM/FM common circuit block 3 and the analog lines 5-1 and 5-2 would not be coupled via parasitic capacity, and mutual interference occurring between the signal line and the analog lines 5-1 and 5-2 can be suppressed. In another aspect, a semiconductor integrated circuit with a CMOS structure includes an analog circuit and a feedback loop, wherein an analog signal line for the feedback loop is wired outside a layout of the analog circuit.
Patent TW-574547-B (TW)
Title: Transflective liquid crystal device and electronic apparatus using the same
Inventor: OZAWA KINYA
IPC: G02F1/1335
Filed: 2002-09-24
Granted: 2004-02-01
Abstract: The present invention provides a transflective liquid crystal device and electronic apparatus using the same. It provides a constitution by which high-definition display can be performed even when the orientation of liquid crystal is mis-aligned at the boundaries of transmissive display regions and reflective display regions in a multi-gap type liquid crystal device and an electronic apparatus using the same. To solve the problem, a liquid crystal device 1 includes a transparent first substrate 10 having first transparent electrodes 11 on the surface thereof, a transparent second substrate 20 having second transparent electrodes 21, and a liquid crystal layer 50. Pixel regions 3 have a light-reflecting layer 4 defining the reflective display regions 31 and the transmissive display regions 32. A thickness-adjusting layer 6 having opening 61 defining the transmissive display regions 32 is formed on the light-reflecting layer 4. The thickness-adjusting layer 6 forms slopes 60 at the boundaries between the reflective display regions 31 and the transmissive display regions 32. The top edges 65 of the slopes are aligned flatly with the edges 45 of the light-reflecting layer 4.
Patent TW-579427-B (TW)
Title: Method for obtaining material optical constants by using ellipsometer system
Inventor: KE CHIH-MING
IPC: G01N21/00
Filed: 2002-09-30
Granted: 2004-03-11
Abstract: A method for obtaining material optical constants by using ellipsometer system is disclosed. The method is first to use a first ellipsometer means specialized in measuring and computing a thickness for accurately obtaining a reliable thickness t of a material layer, and then to use the thickness obtained as a known thickness value to input to at least one second ellipsometer means for obtaining the material layer's index of refraction n and extinction coefficient k, thereby accurately obtaining the material layer's optical constants n, k and t.
Patent TW-594724-B (TW)
Title: Semiconductor data processing device and IC card
Inventor: TAKAHASHI MASATOSHI
IPC: G11C16/16
Filed: 2002-10-02
Granted: 2004-06-21
Abstract: The semiconductor data processing device for this application has a first nonvolatile memory (21), which perform the data erasing by the first data length, a second nonvolatile memory (22), which perform the data erasing by the second data length, and the central processing unit (2), and is capable of inputting or outputting encrypted data from/to the outside of the semiconductor data processing device. The first nonvolatile memory is used for storing the encryption key for encrypting data. The second nonvolatile memory is used for storing the program for executing by the central processing unit. Because of the first nonvolatile memory for storing the encryption key and the second nonvolatile memory for storing the program are divided, and because of the data length of erasing of the first nonvolatile memory is different from the data length of erasing of the second nonvolatile memory, the semiconductor data processing device can be efficient at the erasing the stored information before written the program and at the erasing the stored information when the writing of the encryption key etc for using the processing by the central processing unit.
Patent TW-571156-B (TW)
Title: Surface-emitting device and liquid crystal display device
Inventor: OHIZUMI MITSUO
IPC: G02B6/00
Filed: 2002-10-22
Granted: 2004-01-11
Abstract: A front light includes a light guide panel, a light guide bar placed along an end face of the light guide panel, and light-emitting elements placed at both ends of the light guide bar. A cover member including a reflecting-surface covering portion for covering an end on the reflecting-surface side of the light guide panel, a light-guide covering portion for covering the light guide bar, and an emergent-surface covering portion for covering an end on the emergent-surface side of the light guide panel is mounted so as to cover at least the light guide bar and the ends of the light guide panel. The reflecting-surface covering portion protrudes longer in the light guide direction than the emergent-surface covering portion.
Patent TW-571468-B (TW)
Title: Connection support fitted with a retaining collar
Inventor: LE GALLIC HERVE
IPC: H01R13/646
Filed: 2002-10-25
Granted: 2004-01-11
Abstract: Connection support (1) comprising an insulator housing (2) inside which a coaxial connector (7) is provided. The coaxial connector comprises a plug-shaped load contact (8) and a ground contact (9). The load contact is placed inside a cavity (3) of the housing. The ground contact is on an inner rim (12) of this cavity. The connection support comprises a retaining collar (16) to cooperate with an outer rim of a matching connector that can be inserted into the cavity. This outer rim corresponds to the same rim with which the ground contact cooperates. This retaining collar preferably has the an open annular shape.
Patent TW-591969-B (TW)
Title: Manufacturing method of light-storage type electroluminescent sheet
Inventor: YE YAU-TZUNG
IPC: H05B33/10
Filed: 2002-10-28
Granted: 2004-06-11
Abstract: The present invention provides a manufacturing method of light-storage type electroluminescent sheet, which is characterized in: adding light-storage powder into the light-emitting layer of the electroluminescent sheet, or sandwiching the other light-storage layer outside the light-emitting layer. The basic structure of the electroluminescent sheet comprises a transparent substrate, a front (transparent) electrode layer, a light-emitting layer, a dielectric layer, a back electrode layer and a passivation layer. Since the material of the light-emitting layer is doped with light-storage powder or sandwiches the other light-storage layer, the electroluminescent sheet can be excited by receiving sun light, general illumination light source or even electroluminescent sheet with appropriate range of wavelength (can be the light emitted by the electroluminescent sheet itself), so as to store energy. In addition to preserve the electroluminescent function of a general electroluminescent sheet, it can also emit residual light continuously without power supplying, so as to achieve the purpose of saving energy and emergency indication for the function of display. On the other hand, the light-storage type electroluminescent sheet can also have the option of selecting the electroluminescent material. Through the auxiliary modulation of DC/AC inverter or AC frequency converter to utilize the blue-shift of the emitted light generated by high-frequency driving, the energy-absorbing effect of the light-storage powder material can be enhanced with a better wavelength-matching light source. Thus, the effect of self-excitation and cascade phosphorescence can be achieved without being irradiated by sun light or a general light source.
Patent TW-582155-B (TW)
Title: Bi-directional and reverse directional resource reservation setup protocol
Inventor: SHAHEEN KAMEL M
IPC: H04L47/724
Filed: 2002-11-01
Granted: 2004-04-01
Abstract: The invention relates to establishing a wireless packet session between at least two users. At least one of the users is a wireless user. A first of the at least two users send a reservation setup protocol (RSVP) PATH message to a second user of the two users. The RSVP PATH message includes information for reserving resources for transmissions from only the first user to the second user; or from the first user to the second user and the second user to the first user, or only for transmissions from the second user to the first user. In response to receiving the RSVP PATH message, the second user transmits a RSVP reservation (RESV) message to the first user. Transmissions occur using the reserved resources.
Patent TW-I234786-B (TW)
Title: Memory device with high charging voltage bit lines
Inventor: CHEN CHIENG-CHUNG
IPC: G11C7/12
Filed: 2002-12-09
Granted: 2005-06-21
Abstract: A memory device with high charging voltage bit lines comprises memory cells, sense amplifiers, and high charging voltage bit line circuits. The memory cell stores data and electrically couples with a pair of bit lines. The sense amplifier has a pair of sense nodes. The pair of sense nodes electrically couple with the pair of bit lines and sense the voltage differential across the sense nodes during active cycle. The high charging voltage bit line circuit provides a charging voltage higher than a high logic voltage for charging the memory cell.
Patent TW-I229794-B (TW)
Title: Memory controller with AC power reduction through non-return-to-idle of address and control signals
Inventor: WILCOX JEFFREY R
IPC: G11C8/18
Filed: 2003-01-07
Granted: 2005-03-21
Abstract: A memory controller and method for a memory device avoids returning the state of address and/or preselected control lines to idle when the chip select signal is de-asserted. The preselected control signals are selected from the control signals sent to the memory device that are ignored by the memory device when the chip select signal is de-asserted. By not returning to idle, power dissipation caused by toggling of signal lines is reduced.
Patent TW-I259852-B (TW)
Title: Gold plating solution and gold plating method
Inventor: MIZUTANI FUMIKAZU
IPC: C25D3/54
Filed: 2003-03-12
Granted: 2006-08-11
Abstract: A gold plating solution comprising iodide ions, gold iodide complex ions and a non-aqueous solvent, which is less toxic and stable, while having a performance comparable to a cyanide type gold plating solution. The present invention further provides a gold plating solution comprising iodide ions, gold iodide complex ions, a non-aqueous solvent and a water-soluble polymer, which is less toxic and stable, while having a performance comparable to a cyanide type gold plating solution and which is capable of forming a gold plating film in which gold crystal particle sizes are very fine and grain boundaries are dense. The present invention further provides a gold plating method employing such a gold plating solution.
Patent TW-I224489-B (TW)
Title: Method and apparatus for fabricating a device, and the device and an electronic equipment
Inventor: HASEI HIRONORI
IPC: H05K3/10
Filed: 2003-03-12
Granted: 2004-11-21
Abstract: The subject of the present invention is to provide an apparatus for fabricating a device, in which a high operation efficiency is maintained in a drying treatment for a multilayer-interconnection device. The solution is to have an apparatus S for fabricating a device comprising: an inkjet unit 10 that can dispose a liquid material on a substrate P, and a preparatory dryer 80 to blow a gas heated at a predetermined temperature to the substrate P.
Patent TW-I227960-B (TW)
Title: Motor driving device, driving method and portable terminal
Inventor: SUZUKI MASAHIRO
IPC: H02P6/18
Filed: 2003-04-18
Granted: 2005-02-11
Abstract: The invention provides a motor driving device, driving method and portable terminal, in which terminal voltage values of terminals 21 to 23 are detected by terminal voltage detecting parts 141 to 143 which are held by holding circuits 151 to 153 or 154 to 156. Differences are made between the detected terminal voltage values by differential circuits 171 to 173 and the last detected terminal voltage values held by the holding circuits 151 to 153 or 154 to 156. The difference voltage value is compared with a reference voltage value for deciding a rated frequency by comparison circuits 175 to 177. The synchronous reference voltage value of a reference voltage source 111 is controlled by a control circuit 178 based on each compared result of the comparison circuits 175, 176 and 177. The frequency of a synchronous reference signal which is a basic operating time unit at synchronous driving is corrected, and a mover of a brushless motor 10 is placed in a stable synchronous drive condition before it is out of step from the synchronous driving condition.
Patent TW-594173-B (TW)
Title: Liquid crystal display module
Inventor: SWEI SHOW-LING
IPC: G02F1/133
Filed: 2003-05-28
Granted: 2004-06-21
Abstract: A liquid crystal display (LCD) module includes a LCD panel, a plasma panel (PP) disposed under the LCD panel, and an insulating chamber positioned between the LCD panel and the plasma panel. The plasma panel has a first substrate, a second substrate, a plurality of electrodes, a dielectric layer, a phosphorescent layer and a discharge space.