baber/WOPTO huggingface dataset:
Patent JP-S5392562-A (JP)
Title: Method of and apparatus for removing matters attaching to submarine structu re
Inventor: YAHIRO TERUO
IPC: B08B3/02
Filed: 1977-01-24
Abstract: PURPOSE: To remove efficiently matters attaching to a submarine structure and carry away the matters removed from submarine. 
     COPYRIGHT: (C)1978,JPO&Japio
Patent JP-S62164805-A (JP)
Title: Rotary electrode for producing ti or ti alloy powder
Inventor: SUEMITSU TOSHIHISA
IPC: B22F9/14
Filed: 1986-01-14
Abstract: PURPOSE:To provide efficiently a rotary electrode by a simple process by filling Ti powder into a cylindrical Ti shell and compressing it so as to leave voids at a specified rate. CONSTITUTION:A cylindrical Ti or Ti alloy shell 2 is placed in a metallic die 1 and the lower part 3 of a press forming tool is put in the shell 2. Ti or Ti alloy powder 4 is filled into the shell 2 and compressed with the upper part 5 of the press forming tool so as to leave voids at <=35% rate. The powder 4 and the shell 2 are integrated one body by the compression. The shell 2 is then taken out and the upper and lower unnecessary parts 2a are cut off to form a rotary electrode. A flange 6 for connecting a motor is fitted to the electrode. Other rotary electrode may be joined as required by welding or other method.
Patent JP-S5391521-A (JP)
Title: Detector for convergence chromatic aberration
Inventor: KAWAGUCHI IKUO
IPC: H04N17/04
Filed: 1977-01-24
Abstract: PURPOSE: To measure the vertical and horizontal chromatic aberrations of a cross hatch pattern quantitively by switching two black-and-white ITV cameras. 
     COPYRIGHT: (C)1978,JPO&Japio
Patent JP-H10313242-A (JP)
Title: Driver for inductive load
Inventor: NAGATA JUNICHI
IPC: H03K17/695
Filed: 1998-01-14
Abstract: PROBLEM TO BE SOLVED: To reduce the loss in the driver for an inductive load whose clamp voltage is selected and to realize the driver with a simple circuit configuration. SOLUTION: In the driver where a power feeding control FET 20 is provided to a feeding path from a DC power supply BT to a load L and a clamp circuit 24 that clamps a part between terminals Tb and Tc to a prescribed voltage is provided between a drain and a source of the FET, a current path consisting of a FET 30 and a diode D30 is provided in parallel with the load L in order to select a clamp voltage. In order to activate the FET 30 without using a booster circuit, a diode D32 is connected to the gate and when the FET 30 is conductive, a current is supplied to charge the parasitic capacitance sets C1, C2 with a drive signal from a drive circuit 32. As a result, even when the FET 20 is nonconductive and a level of the terminal Tb rises, the gate level of the FET 30 rises to keep the conductive state of the FET 30.  Moreover, in the case of inactivating the FET 30, the charge in the parasitic capacitance sets C1, C2 is discharged via a discharging circuit 34.
Patent JP-S62164156-A (JP)
Title: Project administration simulator for generating unexpected status
Inventor: KURIYAMA TAKEO
IPC: G06F19/00
Filed: 1986-01-14
Abstract: PURPOSE:To grasp the progress status and the result of a project in advance by generating a typical unexpected status generating often actually on the way of simulation in an opportunity corresponding to each unexpected status. CONSTITUTION:A work simulation part 15 reads out a bit of work schedule information set in a work schedule table 27 by a work schedule read out part 16. Next, a work digestion rate calculation part 17 calculates a work digestion rate by every personnel with a work quantity for a scheduled work, and a bit of information regarding the productivity of a personnel characteristic. A digestion write part 18 makes reflect a calculated result on a work experience table 28. In the simulation, the work productivity of the personnel is handled by every personnel based on the characteristic of each personnel by the bit of information set in a personnel characteristic table 25, not by the average numeral of the whole personnels. Therefore, an individual difference is reflected on a work experience, and the simulation approaching the execution of an actual project can be realized.
Patent JP-H08185695-A (JP)
Title: Semiconductor storage, its operating method and its manufacturing method
Inventor: MATSUO RYUICHI
IPC: H01L27/105
Filed: 1995-01-18
Abstract: PURPOSE: To provide a semiconductor storage whose access speed is as fast as that of of an SRAM and whose capacity is as large as that of a DRAM. CONSTITUTION: An SRAM memory cell array SA in which SRAM memory cells SMC are arranged in a matrix shape and a DRAM memory cell array DA in which DRAM memory cells DMC are arranged in a matrix shape are provided in this storage. Word lines WL1 to WLn in these memory cell arrays SA, DA are made common.
Patent JP-S63175593-A (JP)
Title: Color decoder
Inventor: BABA TATSURO
IPC: H04N9/793
Filed: 1987-01-16
Abstract: PURPOSE:To prevent undesired coloring surely in regenerating a black/white VTR signal or the like by discriminating the black/white and color signals depending on the presence of a color burst signal and using a luminance signal as R.G.B outputs directly in case of the black/white signal while not using the R.G.B signal obtained from a matrix circuit. CONSTITUTION:A burst signal detection means 17 detecting the presence of the color burst signal in an inputted video signal and a changeover circuit 11 outputting by switching the luminance signal as the R.G.B output in place of the R.G.B output in place of the R.G.B output from a matrix circuit 8 when no burst signal is detected, are provided. When a black/white VTR regenerating signal is inputted as an input to a color decoder, since the burst signal detector 17 detects no burst signal, its output goes to a low level. Thus, the output of a switching circuit 11 is a luminance signal Y'. Thus, the RGB output signal uniform in time phase and voltage level is obtained and the coloring is prevented.
Patent JP-H09200401-A (JP)
Title: Digital copying machine
Inventor: MORI HIROSHI
IPC: G03G15/36
Filed: 1996-01-17
Abstract: PROBLEM TO BE SOLVED: To improve the usability and operability when an interruption copying function is used. SOLUTION: A main controller as an interruption copying control means decides whether or not there is a document standing by at the document read stand-by position of an ADF(automatic document feeder) (S1003) when an interruption key is pressed during control over an interruption process and when there is the document which stands by, the image of the document is read out and saved in a specific memory (S1004); and interruption copying operation is started.
Patent JP-H04238400-A (JP)
Title: High-speed voice data generation part
Inventor: RIN DEFUA
IPC: G10L13/00
Filed: 1991-01-23
Abstract: PURPOSE:To calculate voice data at a high speed so that a real-time process can easily be realized when voice data is generated. CONSTITUTION:A time pulse supply device 600 generates the timer required to generate the voice data. This is sampled by a sampling part 550 and inputted to a voice data generation part 500. The voice data generation part 500 calculates voice data at the time outputted by the sampling part 550 by using a specific function for an inputted character string. An interpolative calculation part 650 finds voice data by interpolation for other sampled times and outputs all the voice data corresponding to the specific time.
Patent JP-H04238520-A (JP)
Title: Data input processor
Inventor: ARISHIMA JIYUNICHI
IPC: G06F3/023
Filed: 1991-01-23
Abstract: PURPOSE:To offer a data input processor which is good in operability in respect of the character input control of a numerical value input area, etc., in an interaction box in the data input processor. CONSTITUTION:This data processor is provided with a storage means 7, a display means 3, a display control means, a coordinate data input means 1, an input means 2, a first correction control means to substitute an inputted numerical value for the displayed numerical value of a default value in a state that a cursor is in the numerical value input area, and a second correction control means capable of eliminating all the inputted numerical values by pushing a specified key one time.
Patent JP-S56105361-A (JP)
Title: Record player
Inventor: OOSAWA MITSUO
IPC: G11B19/22
Filed: 1980-01-22
Abstract: PURPOSE:To read the label and so on of the record disc in the normal state, by detecting the rotation angle position of the turntable and by operating the brake to stop the table in the target position. CONSTITUTION:Table 3 is provided with code patterns 10a-10d which indicate the rotation angle position of turntable 3 for player main body 1 with the absolute address, and player main body 1 is provided with code reader 13. Address data read at the rotation start time of table 3 is stored in memory means 16 temporarily, and coincidence between address data from reader 13 and address data from memory means 16 is detected at the stop operation time of table 3 by data comparator 17, and brake means 18 is operated by this coincidence detection signal to stop table 3.
Patent JP-S61164307-A (JP)
Title: Feedforward amplifier
Inventor: YAJIMA NOBORU
IPC: H03F1/32
Filed: 1985-01-17
Abstract: PURPOSE:To obtain a signal with very small distortion by providing an automatic gain adjusting circuit to an error injection loop and adjusting automatically the gain so that the difference between pilot signals extracted from the output side of a delay circuit of the error injection loop and the output of an error amplifier is suppressed. CONSTITUTION:A pilot signal is superimposed on an input signal and a band stop filter 10 stopping the pilot signal is provided to a path (b) of an error detection loop. Further, the path (d) of error injection loop is provided with an automatic gain adjusting circuit 14, a hybrid circuit 13 and a band stop filter 11 stopping a pilot signal, and a path (c) of error injection loop is provided with a hybrid circuit 12. The pilot signal is extracted by control circuits 15, 16 comprising a band pass filter passing the pilot signal, an AC amplifier, a rectifier circuit and a DC amplifier at hybrid circuits 12, 13, the signal is inputted to an operational amplifier 17, where the difference between the absolute values in extracted and an automatic gain adjusting circuit 14 applied automatic adjustment so as to eliminate the difference.
Patent JP-H09196644-A (JP)
Title: Surface inspection apparatus
Inventor: MIZUNO MASANOSUKE
IPC: G01B11/30
Filed: 1996-01-18
Abstract: PROBLEM TO BE SOLVED: To provide a surface inspection apparatus whose optical performance is increased and whose production costs can be lowered by a method wherein the degree of freedom of an optical design is enhanced. SOLUTION: Light which is emitted from a first light source 1A is concentrated in a pinhole 2 so as to advance to a condensing lens 3. Then, the surface of a sample 4 is irradiated with the light via a semitransparent mirror 5. Reflected light from the surface of the sample 4 is condensed in the conjugate position F of the pinhole 2. An aperture diaphragm 7 is arranged and installed at the position F. Light which is passed through the aperture diaphragm 7 is passed through an image formation lens 8 so as to be projected on a photographing face 10. The conjugate position of the pinhole 2 can be designed freely, and the aperture diaphragm 7 can be arranged in the position. In addition, second light sources 1B, 1C obliquely illuminate the surface of the sample 4.  Consequently, its light and shade is reversed on the photogarphing face 10 as compared with the case of the first light source 1A.
Patent JP-S61164562-A (JP)
Inventor: TANI NOBUTAKA
IPC: A61M1/36
Filed: 1985-01-16
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H07211743-A (JP)
Title: Tape carrier package type semiconductor packaging structure
Inventor: ENOKIDO YUTAKA
IPC: H01L21/60
Filed: 1994-01-25
Abstract: PURPOSE:To package a semiconductor bare chip of a vertical structure by a tape carrier package system without reducing the intrinsic characteristics of a tape carrier package. CONSTITUTION:A semiconductor bare chip 4 is arranged in a device hole 3 formed in an insulative base film tape 1 having a flexibility, leads 2, which are connected in a continuity with electrodes arranged on the surface of this chip 4 and consist of a conductive material, are born by the surface part on one side of the surface parts of the tape 1 and outer lead holes 9 are provided in one side part 8 on the periphery of the hole 3 formed in the tape 1. A rear lead 10, which has one end part 10a positioned on the holes 9 and is made of a conductive material, is born by this side part 8 and the lead 10 is connected in a continuity with a rear electrode on the chip 4 by reverse folding-back the side part 8.
Patent JP-H03211432-A (JP)
Title: Stress measuring method for thin film
Inventor: RAKESHIYU KUMAARU
IPC: G01L1/00
Filed: 1990-01-17
Abstract: PURPOSE:To simplify measuring operation by arranging a sample between opposite capacitor plates, applying a specific voltage to one capacitor plate, and detecting voltage variation caused by vibration induced in the sample by the other capacitor plate. CONSTITUTION:The thin film sample 20 is fitted to a sample holder 2 and placed between the two capacitor plates 1A and 1B. One capacitor plate 1A is applied with the specific AC voltage from an oscillator 4 and the voltage from a voltage power source 3 to generate an electrostatic force, thereby inducing the vibration of the sample 20. A capacitor 5 connected to the other capacitor plate 1B is applied with the voltage from a constant voltage power source 7 through a resistance 6 and fine and linear voltage variation is caused between the capacitor plate 1B and sample 20 by the vibration of the sample 20. This voltage variation is amplified 8 and recorded on a recorder 9 and the resonance frequency is measured to calculate the mean stress of the sample 20.
Patent JP-S55100922-A (JP)
Title: Production of thick steel plate with high toughness
Inventor: NAKAMURA MASAAKI
IPC: C21D6/00
Filed: 1979-01-22
Abstract: PURPOSE:To impart uniform mechanical property to the whole steel plate by a method wherein immediately after hot rolling, thick steel plate of Ni-alloy steel or low alloy steel is quenched to an optimum quenching temperature, the shape of the steel plate is corrected by a leveler, and the quenched steel is tempered. CONSTITUTION:Ni-alloy steel or low alloy steel containing a small amount of Cr, Mo, Ni, V etc. is hot-rolled by a finishing mill 1 into thick steel plate, and the temperature of the steel is detected at the outlet of the mill 1 by a temperature detector 6. Water pressure and water volume are controlled by the detected signal. The steel plate is fed to a cooling controlling equipment 3 which is sprinkled with water. In the equipment 3, the steel plate is quenched to a temperature of from Ar3 transformation temperature to 950 deg.C. The steel plate is fed to a leveler 4 where the shape of the steel plate is corrected, and then fed to a water-cooling equipment 2. The lowering of the temperature of the back end part of the steel plate to a quenching temperature is prevented by the heat insulating cover 5 of the equipment 2. In the water cooling equipment 2, the whole part of the steel plate is uniformly quenched at an optimum quenching temperature. Then conventional tempering treatment is carried out to give uniform mechanical property to the whole steel plate.
Patent JP-H09200522-A (JP)
Title: Device and method for processing image
Inventor: TAKEUCHI AKIHIKO
IPC: G01N25/18
Filed: 1996-01-18
Abstract: PROBLEM TO BE SOLVED: To stabilise the intensity of light for forming an image. SOLUTION: Input image data 32 are converted to a modulated signal 33 by a modulation circuit 22 and inputted to a laser driving circuit 5, and a laser diode 6 is driven. The intensity of light emitted by the laser diode 6 is monitored by a monitor circuit 29. A correction circuit 25 finds the quantity of integrated light by integrating the output of the monitor circuit 29 and performs integrated light quantity control based on that quantity of integrated light. Namely, the gain of a D/A converter 23 and the offset of a triangular wave generated by a triangular wave generating circuit 24 are set.
Patent JP-2000224982-A (JP)
Title: Bacillus natto not producing short-chain branched fatty acid
Inventor: TAKEMURA HIROSHI
IPC: A23L11/00
Filed: 1999-01-13
Abstract: PROBLEM TO BE SOLVED: To obtain a new Bacillus natto not producing short-chained branched fatty acids, having decreased or deleted function of leucine dehydrogenase gene, etc., capable of providing high-quality fermented soybeans, comprising a Bacillus natto for producing fermented soybeans having decreased musty smell or no musty smell at all. SOLUTION: This new Bacillus natto [e.g. Bacillus subtilis B2 (FERM BP-6605)] has decreased or deleted function of leucine dehydrogenase gene and/or branched keto acid dehydrogenase gene being a short-chain branched fatty acid producing enzyme gene, decreased or eliminated short-chain branched fatty acid production and a decreased musty smell or no musty smell at all. The Bacillus natto is useful for producing high-quality fermented soybeans having a decreased musty smell or no musty smell at all. The Bacillus natto is obtained by varying the objective gene to decrease or delete its function by a screening method for selecting a Bacillus natto decreased or deleted in the function of the objective gene from a natural world, a chemical variation method or method for using γ-ray or ultraviolet rays.
Patent JP-S60150650-A (JP)
Title: Manufacture of semiconductor device
Inventor: KOMORI JIYUNKO
IPC: H01L21/768
Filed: 1984-01-17
Abstract: PURPOSE:To establish a reliable electric connection between wiring layers and to flatten the region planned for a through-hole in the upper wiring layer by a method wherein a first and second wiring layers are formed to connect to the planned through-hole. CONSTITUTION:A first wiring layer 3 is selectively built on an Si oxide film 2 covering an Si semiconductor substrate 1. The wiring layer 3 is completely covered by a connecting wiring layer 8 and a resist film 9 is patterned in a region 6 planned for a through-hole. A process follows wherein the resist film 9 serves as a mask, whereby the connecting wiring layer 8 is subjected to selective etching. An interlayer insulating film 5 is formed, with the connecting wiring layer 8 remaining exposed in the region 6 planned for a through-hole in the first wiring layer 3. Next, a second wiring layer 4 is formed after the resist film 9 is completely removed, for example by the lift-off method, together with a part of the interlayer insulating film 5 located on the resist film 9, thereby establishing an electric connection by the connecting wiring layer 8 between the second wiring layer 4 and first wiring layer 3.
Patent JP-S54100934-A (JP)
Title: Ultrasonic one side molten metal plating apparatus
Inventor: MATSUMOTO KUNIHARU
IPC: C23C2/00
Filed: 1978-01-26
Abstract: PURPOSE:In a one side molten metal plating apparatus, in order to facilitate long run continuous one-side plating, a plating chamber type sealing case is installed removably from molten metal bath, so that when replacing oscillating tip, sealing case can be easily removed. CONSTITUTION:A steel plate strip is introduced into the plating chamber 3, advances by the rollers 9 and 10, keeping in parallel and close position to molten metal bath 4 and goes out from the chamber 3. The molten metal bath 4 is maintained at a specified temperature by heaters 11 installled inside insulators 12. The strip is plated by touching with metal surface raised partially by the action of ultrasonic vibration tip 7. When the tip surface is worn and replacement is raquired, the lift 13 lowers the metal bath 5 to separate it form the sealing case 6 which functions as plating chamber. Then a replacement metal bath containing another tip 7 is moved to connect with the sealing case. In this way, downtime for tip replacement is reduced to decrease fault products during replacement, thus contributing long run one side plating.
Patent JP-H03212864-A (JP)
Title: Magnetic reproducing device
Inventor: FUKAMI TADASHI
IPC: G11B20/10
Filed: 1990-01-16
Abstract: PURPOSE:To enable reverse reproducing with simple constitution by processing bit inversion of a reproducing frame address data at the time of the reverse reproducing or normal reproducing. CONSTITUTION:The device is provided with a demodulation means 40 for demodulating a regenerative signal SRF and extracting the reproducing frame address data FAD, an inversion means 42 for inverting the reproducing frame address data FAD in bit and outputting it at the time of the normal reproducing or reverse reproducing and a reference frame address data generating means 46 for generating a reference frame data FREF which will increase or decrease circulatively in a prescribed period, and so forth. Then, a capstan motor 32 is driven in order to make the data FAD coincide with the data FREF based on a comparison result between the reproducing frame address data FFD which has been reproduced or bit-inverted and the reference address data FREF. By this method, the reverse reproducing can be performed with simple constitution.
Patent JP-S60150441-A (JP)
Title: Engine stopping device in mechanical governor
Inventor: IZUKI SEIJI
IPC: F02D1/04
Filed: 1984-01-17
Abstract: PURPOSE:To aim at making a mechanical governor compact, by rotatably attaching a manual lever and an electrically operated lever, independently from each other, to a stop lever shaft in a mechanical governor. CONSTITUTION:A manual lever 19 and an electrically operated lever 18 connected to a solenoid are rotatably attached, independently from each other, to a stop lever shaft 2 arranged in a mechanical governor for reciprocating a control rack 11 to regulate the injection amount of fuel. A part of the inner end section of the stop lever shaft 2 is fabricated into a semi-circular cross-sectioned shape so that it may about against the flank part of a governor lever 8. With this arrangement having only one shaft the mechanical governor may be made compact.
Patent JP-H06215155-A (JP)
Title: Image generator
Inventor: ISHIDA SHOHEI
IPC: G06T15/80
Filed: 1993-01-19
Abstract: PURPOSE:To provide the image generator for generating images at high speed by searching a first crossing object in the case of the beam chase of respective picture elements by projecting an object onto a projective plane, increasing the density of picture elements to perform the beam chase near the edge of the object on the projective plane or decreasing the density at the other position while using projection information provided in the case of projection. CONSTITUTION:A projection processing part 201 successively projects polygons constituting the object onto the projective plane, the plane number of the first polygon on the operator's side at each picture element is stored in a plane number memory 203, the depth value of the first polygon on the operator's side is stored in a depth value memory 202, and a picture element selector 204 selects the fine picture elements near the boundary of the object and selects the coarse picture elements in the other area. Concerning the selected picture elements, a luminance calculation part 205 investigates the first crossing element by using the values in the plane number memory and the depth value memory and afterwards, the normal beam chase is performed. Since an interpolation part 206 calculates the luminance value of the non-calculated picture elements by using interpolation, the images can be generated at high speed.
Patent JP-S60150751-A (JP)
Inventor: KOBAYASHI ICHIROU
IPC: A61H39/06
Filed: 1984-01-17
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。