Patent GB-1011567-A (GB)
Title: Improvements in apparatus for modifying the time duration of audio waveforms
IPC: H04B1/66
Filed: 1962-12-28
Abstract: 1,011,567. Time compression and expansion of electrical signals. INTERNATIONAL BUSINESS MACHINES CORPORATION. Dec. 28, 1962 [Dec. 29, 1961], No. 48749/62. Heading H4R. An arrangement for time compressing or expanding a waveform in which wave patterns are repeated, means are provided for detecting the beginning and end of such a pattern and also for storing a sequence of such patterns in an input register (16). An output register (24) is then fed with a pattern from the input register (16) a number of times depending on the length of the signal so stored, this length being compared at the end of each storage with the length of the signal in register 16 which has so far been processed, the storing being terminated when the ratio of the lengths of the two stored signals reaches a predetermined ratio. The next stored pattern is then treated in the same way and so on until the time available for transmission of the complete sequence of patterns is exhausted. The pattern period (pitch period) is determined as shown in Fig. 2 by forming a " window " W1 + W2 around the approximate end of the period and then determining therein the first zero crossing following a maximum value. Many of the registers mentioned in the succeeding description occur in Figures not shown. Storage of speech signals.-On operation of key 80, flip-flop 88 changes over and when the speech energy exceeds a threshold value flip-flop 68 changes over to set flip-flop 70. This allows 1À2 Mc/s. pulses to be fed to binary counter 58 which feeds a converter 56 to generate a rising voltage, which is fed to the circuit 54 which compares this voltage with the speech voltage. When equality is established flip-flop 70 is returned so that the counter registers the instantaneous speech amplitude. Counter 62 emits a pulse at 18 kc. repetition frequency and the next pulse therefrom reads out the counter 58 to a buffer memory MBR (16), not shown, and steps the address memory MAR-1 of the store 16 preparatory to registration of the next sample which is taken in a similar manner. The speech is also fed to a high pass filter 136 followed by a rectifier and low-pass filter 140 feeding a detector 142 which emits a pulse for every upward zero crossing it receives. The number of these pulses occurring in 25 seconds are registered in counter 158 feeding a series of gates 235 producing outputs on leads 248 . . . 254 according as the frequency lies in the ranges 64-127 c/s., 128-159 c/s., 160-191 c/s., 192- 252 c/s. These leads are arranged in gates 266 and 268 to insert numbers 42, 32, 29, 26 and 72, 54, 47, 41 in registers M and N, respectively. These numbers represent the widths W1 and W1+W2, respectively pertaining to the search window W 1  + W 2 , Fig. 2, in which accurate termination of the pitch period is to be determined. The output of the counter 158 is also divided into 4500 (= 18000Î0À25) to give the approximate number of samples occurring during one pitch period and this number is fed into a register P. The store 16 is provided with three auxiliary stores A, B, C, the first of which stores the address of the first registration in the store, the next stores the next free address and the third is used to store the first address of speech in formation to be processed. A circuit for determining the degree of compression is provided. This may be specified either as a time ratio or as a time duration (specified as a number of samples) in which the signal is to be transmitted. Conversion means are provided these being fed by the value B-A (representing the number of samples stored) whereby the ratio is stored in a register H and a register G is fed with the sum of the above time duration and the address in MAR-2 of the outgoing store 16 to give the value of the last address (plus one) to be used in the store 24 for outgoing transmission. Store MAR-1 is now reset to the beginning of its sample (received from A) and the address thereon is added to P to give the approximate end address of the pitch period. The value of M is then subtracted to give the address of the beginning of the search window and this is inserted in MAR-1. The equipment for determining the next downward zero crossing in the search window comprises a counter, a register Q and two comparator circuits MBR<32 and MBR>Q. Initially number 32 is inserted into register Q and MBR is read out starting at the beginning of the search window. When MBR>Q a flip flop is set and the MBR value is substituted in Q. When the samples pass their maximum then MBR<Q and no more substitutions take place. When eventually MBR>32, with the flip-flop still up, a signal is emitted which gates the next address in MAR-1 into a register D. The flip-flop is now restored to terminate the searching operation. Arrangements are provided to insert initially the address of the beginning of the window in register D, so that if no zero crossing is recorded during the search window this address is used. The counter which counts the MRB samples has its output compared with the window width stored in N and when these are equal, i.e. when the scan over the window is completed a comparator emits a signal to insert D-A in register K. This signal represents the total length of the period (e.g. b-a, c-a or d-a, Fig. 2) of the original signal which is to be processed up to this time. Compilation of signal to be transmitted.- A store MBR (24) is used for this purpose and has associated therewith an address register MAR-2 and two registers E and F the former of which is kept equal to the address in MAR-2 and the latter holds the initial address of the signal to be transmitted. At the beginning of a transfer cycle a register J stores the value E-F/K. If J<H then address C is inserted in MAR-1 and read out of MBR(16) into MBR(24) until MAR1=D, i.e. the end of the pitch period. MAR2 is then fed to register E and a new value E-F/K is fed to J. If J<H then the process is repeated until J = H. Thus the information in the first pitch period is repeatedly fed into MBR(24) until the desired expansion rates has been achieved for this pitch period. The next address after the first pitch period is now taken from REGD and REGP is added and then M is subtracted. This determines the beginning of the window in the next pitch period which is to be examined. Operations continue for the second pitch period in the same manner culminating in a further insertion into MBR(24) of an expanded signal for this period, and so on. In the case of compression, it may be that initially J>H in which case no insertions are made, but the next pitch period is examined and so on until K builds up sufficiently to make J<H. Reverting to the expansion case when eventually J = H it may still be that the allotted duration has not been filled in MBR(24). So, when MAR-1 reaches the value stored in register B on this occasion the number stored in H is changed to its maximum value so that J now tests <H. This permits further insertions of the last pitch period data from MBR(16) to MBR(24) until MAR-2 = G after which the insertions cease as the full transmission period has now been catered for. Read-out.-The address in register F which is the starting address of the information to be read out of MBR(24) is fed to MAR-2 and the memory is set to the " read " condition. 18 kc. stepping and read-out pulses are now applied to MAR-2 and MBR(24) to read out MBR(24) to a digital-analogue converter whose output is then passed to a suitable utilization device. Read-out terminates when MAR-2 = G.