baber/WOPTO huggingface dataset:
Patent JP-S61243859-A (JP)
Title: Surface-fortifying resin for resin mold
Inventor: MIURA HIROSHI
IPC: C08L101/00
Filed: 1985-06-24
Abstract: PURPOSE:To provide the titled resin for a resin mold which has excellent mechanical strength and resistance to wear, compression and heat as well as durability comparable to that of a metal mold, etc., by incorporating aramid fiber in the form of short fiber such as chopped fiber or pulp in a thermosetting resin. CONSTITUTION:0.5-1% aramid fiber which is cut into chopped fiber of 6-12cm in length or highly fibrillated into pulp having an average length of 2mm is incorporated into a soln. of a condensed thermosetting resin such as epoxy resin, polyester resin or urethane resin at room them. to obtain a surface- fortifying resin. The surface of a matrix 2 fixed on the base plate 1a of a core-box 1 and the inner wall surface of the core-box 1 are coated with the surface-fortifying resin in a predetermined thickness to form a surface-fortifying layer 3. A resin soln. contg. metallic powder or glass chop mixed therewith is applied to the surface of the layer to form an intermediate layer 4. A sand core 5 and said fortifying layer 3 are integrally bonded to each other through said layer 4, and the upper surface is leveled by a leveling resin layer 6. After curing, the core-box 1 is removed and the matrix 2 is taken off to obtain a resin mold 10.
Patent JP-S6032763-A (JP)
Title: Novel 11-oxoprostanoic acid derivative and its use
Inventor: NAKAMOTO YASUMASA
IPC: C07C401/00
Filed: 1983-07-29
Abstract: NEW MATERIAL:A compound shown by the formula I (M is H, or lower alkyl; R is straight-chain, branched-chain, 5-9C cyclic alkyl, etc.; X is -CH=CH-, or -CH2CH2-; wavy line is alpha or beta steric configuration bond), its salt or ester. EXAMPLE:(5Z, 13E)9,15-Dihydroxy-10,10,16-trimethyl-11-oxo-prosta-5,13-dien-1-oic acid. USE:An antitumor agent. PREPARATION:A compound shown by the formula II as a starting raw material is converted into a compound shown by the formula III (B is OH-protecting group), reacted with a compound shown by the formula IV, a dimethoxymethyl group at the 3-position is converted into a formyl group, and the compound is reacted with a compound shown by the formula V, to give a compound shown by the formula VI. The compound shown by the formula VI is reduced, OH groups except at the 4-position are protected, the protecting group at the 4-position and the ester residue M are eliminated, the compound is oxidized at the 4- position, the protecting groups except the 4-position are eliminated to give a compound shown by the formula I wherein M=H, and it is further esterified to give a compound wherein M is lower alkyl.
Patent JP-H10312349-A (JP)
Title: Network connecting device
Inventor: YOSHIDA ATSUSHI
IPC: G06F13/00
Filed: 1997-05-12
Abstract: PROBLEM TO BE SOLVED: To make efficient access to a best provider device by writing the address of a provider device obtained from a router on a public line in a data storage part and transferring a domain name server request from a terminal device on a LAN to the provider device on the public line. SOLUTION: When a terminal device on the LAN sends a domain name solution request out, the domain name solution request is transferred to a DNS (domain name server) 9 on the internal LAN and if the name can not be solved there, a connection with the public line is made to request the address of the DNS server of an external router R. Here, a domain name solution request part 33 detects the address of the DNS server on the public line instead of the terminal device, and the obtained DNS server address is registered in a DNS server address storage part 32 through a DNS answer confirmation part 35 and an address data write part 34. Then a domain name solution request from a terminal device is transferred to the DNS server (provided device) on the public line.
Patent JP-H07310939-A (JP)
Title: Negative or positive pressure suppressing heat insulation ventilating opening for hermetic residence
Inventor: FUKUCHI NAGAYOSHI
IPC: F24F7/04
Filed: 1994-05-16
Abstract: PURPOSE:To normally perform the heat insulation effect and to suppress a negative or positive pressure by ventilation despite the type of a cause only at the time of generating the pressure by forming elastic sponges having permeability and heat insulation effect in multilayers to provide it in a ventilating opening. CONSTITUTION:An external hood 5 is provided with a fire-resisting shutter. An inner decorative grill 4 is provided. Elastic sponges 3 are mounted in multilayers at an interval of 20mm or less in a ventilating opening frame 2 which scarcely transfers heat through a wall 1, and its gap is formed with an air layer 6. A reinforcing skeleton is introduced into the layer 6 to cope with an increase in size. Many through-holes which do not cross are opened at the sponges 3 to impart the same effect as that of the multilayers thereto. Further, the sponges 3 are made of fibrous materials, and mounted by digging grooves in the frame 2 or slightly increasing it larger than the frame 2 and forcing it into the grooves.
Patent JP-H09216416-A (JP)
Title: Self-scanning luminescent element array and driving method thereof
Inventor: KUSUDA YUKIHISA
IPC: H01L29/74
Filed: 1996-05-31
Abstract: PROBLEM TO BE SOLVED: To obviate the need of a driving IC by incorporating a self-scanning function into a luminescent element array. SOLUTION: Luminescent thyristors T(-2) -T(+2) are arranged in a row. Three transfer clock lines (ϕ1 , ϕ2 , and ϕ3 ) are connected to anode electrodes of luminescent simple elements at intervals of three elements. The luminescent thyristor has such a characteristic that its turn-on voltage drops when the luminescent thyristor senses a light. When the luminescent thyristors are arranged so that the luminescence from one element enters another one, the turn-on voltages of the elements, that are located near the illuminating elements or arranged so that they are well exposed to light, drop. The illuminating state can, therefore, be transferred by selecting voltages to the clock lines.
Patent JP-H033338-A (JP)
Title: Field effect semiconductor device
Inventor: IMANISHI KENJI
IPC: H01L21/338
Filed: 1989-05-31
Abstract: PURPOSE:To obtain an InAlAs/InGaAs based field effect semiconductor device of small leak current by forming a Schottky gate electrode on a leak current restraining layer, and making the composition of said layer InyAl1-yAs where the value of (y) is in a specified range. CONSTITUTION:On a semiinsulative InP substrate 1, a plurality of InAlAs/ InGaAs based epitaxial layers 2-5 containing an active layer 3 are formed; thereon a non-doped leak current restraining layer 6 is formed; a pair of source/ drain electrode 8 is connected with the active layer 3; a Schottky gate electrode 9 is formed on an intermediate leak current restraining layer 6, whose composition is InyAl1-yAs, 0.37<=y<=0.43. For example, on a semiinsulative InP substrate 1, the following are formed; a non-doped In0.52Al0.48As buffer layer 2, a non- doped In0.53Ga0.47As active layer 3, a non-doped InxAl1-xAs spacer layer 4, an Si-doped InxAl1-xAs electron supplying layer 5, a non-doped InyAl1-yAs leak current restraining layer 6, a contact layer, etc.
Patent JP-S5761644-A (JP)
Title: Cover glass having diamond coating layer and its preparation
Inventor: KAWACHI AKIHIKO
IPC: C23C14/06
Filed: 1980-10-02
Abstract: PURPOSE: To prepare the titled glass having extremely hard surface and usable for a long period forming little scratch, by evaporating carbon while irradiating the cover glass with inert gas ion in vacuum.  
     CONSTITUTION: The substance to be evaporated is placed on the evaporation source 3 and evaporated in vacuum toward the substrate by the energy irradiation from an electron beam source, laser beam source, or an inert gas ion beam source such as Ar gas. The evaporation source 3 is provided with a number of fine diamond particles or a graphite block. Simultaneous with the arrival of the evaporated substance to the substrate, the substrate is irradiated with inert gas ion beam such as He, Ne, Ar, Xe, etc., emitted from the inert gas ion source 4. By this procedure, a diamond thin film is deposited on the surface of the substrate, i.e. a cover glass, held with the substrate holder 2. 
     COPYRIGHT: (C)1982,JPO&Japio
Patent JP-H10330351-A (JP)
Title: Production of thioanisole
Inventor: SHIGETA HIRONORI
IPC: B01J21/04
Filed: 1997-05-28
Abstract: PROBLEM TO BE SOLVED: To provide a method for obtaining thioanisole of high purity in a simpler process in the method for producing the thioanisole from thiophenol and methanol in a gas phase reaction. SOLUTION: Thiophenol and methanol vaporized at a vaporization unit 1 are reacted in a reactor 2 in the vapor phase in the presence of a catalyst, and the reaction product is condensed at a condenser 3. The unreacted thiophenol included in the oil layer separated from the condenser 3 is treated with an alkali metal hydroxide or an aqueous solution thereof at an alkali- treating unit 4 to remove the unreacted thiophenol as an alkali salt in the method for producing thioanisole.
Patent JP-2000331843-A (JP)
Title: Switching regulator transformer
Inventor: HONMA TORU
IPC: H01F27/32
Filed: 1999-05-19
Abstract: PROBLEM TO BE SOLVED: To provide a transformer whose manufacturing process can be simplified and automated and which can be mounted keeping it high in density meeting safety standards which require a certain creepage or a spatial distance without using an extended flange. SOLUTION: This switching regulator transformer is equipped with an upper bobbin 2 with a cylinder 20 wound with either a primary winding 4 or a secondary winding 5 and a lower bobbin 1 with a cylinder 8 wound with the other winding. Terminal pads 3a and 3b are provided to the lower bobbin 1 in one piece. The lower bobbin 1 is provided with a thick-walled part 11. The upper flange 9 of the lower bobbin 1, the winding 4 wound on the cylinder 8 of the lower bobbin 1, and the thick-walled part 11 are covered with the cylindrical cover 23 of the upper bobbin 2 to combine the upper and lower bobbin, 1 and 2, together. The terminal 5b of the winding 5 wound on the cylinder 20 of the upper bobbin 2 and the terminal 4b of the winding 4 wound on the cylinder 8 of the lower bobbin 1 are each connected to terminals 15 and 16 fixed to the terminal pads 3a and 3b.
Patent JP-H08329489-A (JP)
Title: Focusing control circuit
Inventor: NAKAJIMA AKIRA
IPC: G11B7/085
Filed: 1995-06-05
Abstract: PURPOSE: To reduce the power consumption of a device by generating a PWM (pulse width modulation) driving signal once during several periods of PWM. CONSTITUTION: This focusing control circuit adopts a PWM method, a counter 15 enables intermittent drive by dividing a sample pulse and a counter 17 decides a PWM frame length by counting a number of clocks. A comparator 18 compares the output signal from the counter 17 with an input data clock 11 and a selector 16 changes over the operating mode of the counter 17 at the time of focus searching and focusing servo operation. A polarity changeover circuit 19 changes over the direction of current flowing through a load according to the polarity of input data 14. Consequently, a minute current mode allowing a current to flow through a load is formed by generating an output pulse complied with input data only once in several times without outputting a driving pulse for every PWM frame and the reduction of power consumption of the device is enabled.
Patent JP-S5839060-A (JP)
Title: Semiconductor device
Inventor: IWASAKI MASAMI
IPC: H01L21/331
Filed: 1981-09-02
Abstract: PURPOSE:To prevent the damage of an emitter shortcircuiting part due to concentration of reverse recovery current flowing through a parasitic diode by forming an emitter electrode commonly connected to a plurality of emitter electrodes without connecting to the shortcircuiting part of emitter and base by utilizing a sheet resistor of an emitter layer. CONSTITUTION:Since a resistor 63 between the emitter and the base of a transistor 61 utilizes the sheet resistor of a P type layer 43 and a resistor 64 between the base and the emitter of a transistor 62 utilizes the sheet resistor of an N<+> type layer 484 since an emitter electrode 53 is not pressure connected through a buffer plate 52 to base and emitter shortcircuiting aluminum wire layer 51. In the state that a parasitic diode d between the layer 43 and an N<-> type layer 42, N<+> type layer 41 and resistors 65, 64 are connected in series between the collector and the emitter of the transistor 62, between the collector and the emitter is reversely biased, even if the diode d is forwardly biased, a reverse recovery current can be limited by the resistor 65.
Patent JP-S6029866-A (JP)
Title: Transaction device
Inventor: OOKOGA YOUICHI
Filed: 1983-07-28
Abstract: PURPOSE:To speed up adjustment service by selecting a unused printer from two sets of gate circuits and inputting the output of a bar code reader, and counting it up and printing the counted value. CONSTITUTION:A checker L inputs the name and quantity of articles purchased by a customer A through the bar code reader 2. Those data are inputted to a control part 1, and a unit-price and the article name are read out of a table to be displayed 5, and also sent to a printer 6 or 7 through a gate part 13 or 18 in an open state. A cashier M performs transaction adjustment with the customer A on the basis of output information on the display part 5 and printer 6 or 7. While the customer A is in transaction at a position (g), the checker L reads purchase information on the next customer B through the bar code reader 2, and an unused printer is selected through the gates 13 and 18 by the control part 11 to input the information; and the cashier M enter transaction adjustment successively. Thus, a wait time is shortened and the operation rate of the device is improved.
Patent JP-H036338-A (JP)
Title: Manufacture of composite material
Inventor: ISHIZUKA SATORU
IPC: C22C47/00
Filed: 1989-05-31
Abstract: PURPOSE:To reduce the quantity of reinforcing fiber or the like and to increase the strength in a desired place by forming a recessed part or a blank space on a formed body of an inorganic material and infiltrating the grains dispersed in matrix metal into the recessed part or the blank space. CONSTITUTION:A recessed part 10a or a blank space is formed on the surface of a formed body 1 formed by short fiber, long fiber or the like of an inorganic material. The formed body 1 is heated and is set into a die 2. The dispersion molten metal 9 of nonmetallic or high m.p. metallic grains (such as SiC grains 8) in which Al alloy or the like is regulated as matrix metal is poured into the die 2. Pressure is applied by a pressuring punch 4 to infiltrate the molten metal 9 into the formed body 1. In the stage of pressurizing, the matrix metal is infiltrated into the fiber in the formed body 1 and the grains 8 are infiltrated into the recessed part 10a or the blank space, by which a composite place can be formed.
Patent JP-S63302297-A (JP)
Title: Heat exchange system
Inventor: KITAGAWA KATSUTO
IPC: F28D19/02
Filed: 1987-06-03
Abstract: PURPOSE:To obtain a simple and inexpensive heat exchange system by a method wherein porous and/or hollow ceramic powder with heat resistance, round shape, and satisfactory fluidity is used as a heat exchanging medium and the said medium is moved from one thermal atmosphere to the other one. CONSTITUTION:Heat exchanging medium is shaped round in order to improve its fluidity and its bulk specific gravity is desirable to be nearly equal to 0.7 or less and nearly to 0.05 or more and is porous and heat resisting ceramic in which air bubbles exist independently. To carry out heat exchanging, a part of a transfer tube forming a closed loop is put in a high temp. atmosphere and the other part is placed in a low temp. atmosphere and then it is only necessary to flow the said powder in the transfer tube by air blasting, gravity, or vibration. When the powder passes through the high temp. part, it absorbs heat and when it passes through the low temp. part, it releases its heat.
Patent JP-S5840404-A (JP)
Inventor: ENOMOTO HIROYASU
IPC: F23L15/00
Filed: 1981-09-04
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S5841386-A (JP)
Inventor: SHINOHARA KAORU
IPC: G21C7/08
Filed: 1981-09-04
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S6027641-A (JP)
Inventor: AIGAMI YOSHIKI
IPC: C05F3/00
Filed: 1983-07-26
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S5564517-A (JP)
Title: Remedy for skin disease caused by tricophyton
Inventor: SHIMODA TADASHI
IPC: A61K9/08
Filed: 1978-11-09
Abstract: PURPOSE: Title remedy that is composed of a solution of polycarbonate resin as the base.  
     CONSTITUTION: A remedy for skin diseases caused by tricophyton that contains a solution of a polycarbonate resin in 1,2-trichloroethane. Said solution is applied to the disease part continuously for 3 daysW1 week to show remarkable effectiveness. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-H082470-A (JP)
Title: Front wheel caliper brake supporting structure for motorcycle
Inventor: AEBA MANABU
IPC: B62L1/00
Filed: 1994-06-21
Abstract: PURPOSE:To support a caliper brake in a front wheel while dispensing with preparation of plural kinds of parts according to a change in a diameter of a brake disc or the front wheel. CONSTITUTION:A bracket 12 supporting a caliper body 9 of a caliper brake 10 is fixed in an axle holder 7, in which the lower end of a lower part cylinder body 51 is connected and an axle 6 of a front wheel WF is supported freely rotationally, and a ring-shaped caliper holder 111, to which the lower part cylinder body 51 is fitted slidably.
Patent JP-H033445-A (JP)
Title: Network system dependent upon retry interval control
Inventor: ETO MASAICHI
IPC: H04L12/40
Filed: 1989-05-30
Abstract: PURPOSE:To improve the transfer efficiency by providing a work station WS, which receives a control frame, with the function which analyzes contents of the control frame to extend or shorten the interval of retry. CONSTITUTION:This system includes an input part 11 to which numbers and priority levels of WSs 1A to IC and the control frame to be reported are inputted, a storage part 12 where data inputted from an input part 11 is stored, a measuring part 13 which measures the load factor on the network, and a transmission part 14 which transmits the control frame to WSs 1. Further, a controller 10 including a control part 15 which informs the transmission part 14 of the destination and the control frame by judgement based on data gathered by the measuring part 13 and stored input data is placed on the network. The control frame received from the controller 10 is analyzed in each of WSs 1A to 1C to extend the interval of retry. Thus, though collision occurs because of confusion on lines and the number of times of retry is increased to degrade the efficiency of the system, the interval of retry is controlled to reduce the collision, and confusion on lines is reduced to improve the efficiency of the system.
Patent JP-H034618-A (JP)
Title: Clock frequency division circuit
Inventor: IMAEDA YOSHITERU
IPC: H03K23/66
Filed: 1989-05-31
Abstract: PURPOSE:To execute optionally even and odd number frequency division by one clock frequency dividing circuit by feeding back an output clock of a 1/2 frequency divider to other input terminal of an exclusive OR gate at odd number frequency division and giving one pulse to an n-counter. CONSTITUTION:When a signal 1 selecting odd number frequency division is inputted to an AND gate 4, an output clock of a 1/2 frequency divider 3 is fed back to other input terminal of the exclusive OR gate 1 through the AND gate 4. Then the exclusive OR gate 1 outputs a pulse with very narrow width depending on a slight time difference between the input clock and the fed-back output clock. Then one pulse is increased in one period of the output clock, resulting in obtaining an odd number of pulses. Thus, an n-counter 2 counts the pulse for each n-pulse to output the clock and the 1/2 frequency divider 3 applies 1/2 frequency division to the clock to attain odd number of frequency division.
Patent JP-H01307291-A (JP)
Title: Manufacture of substrate mounting circuit using independent resistor
Inventor: NAKAHORI TERUCHIYO
IPC: H05K1/16
Filed: 1988-06-06
Abstract: PURPOSE:To improve yield at a time when a circuit is constituted by forming a printed wiring pattern to an insulating substrate, shaping a resistor to a separate insulating substrate in parallel with the pattern, extracting the resistor having a value adapted to a resistor mounting section and setting up the resistor to said printed pattern wiring section. CONSTITUTION:Printed wiring patterns 12, 13 are formed to an insulating substrate 11 in a process A. On the other hand, resistors 22 are shaped to a separate insulating substrate 21 through a thick-film or thin-film technique in a process B in parallel with the process A, and the resistors 22 having a value adapted to the resistor mounting sections of the printed pattern wirings are extracted. The resistors 22 are fitted to the printed pattern wiring sections acquired in said process A in a process C. A fixing method by adhesives and solder melting is utilized as the mounting method of the resistors 22, and a film resistor in accurate thickness is shaped onto the surface of the substrate 21 through the thin-film technique or the thick-film technique as a method in which the resistors 22 required are obtained. Accordingly, the value of the resistors can be acquired precisely, yield can be improved and the time required for trimming can be shortened.
Patent JP-S5928568-A (JP)
Title: Dry plating method
Inventor: OOTSUKA AKIRA
IPC: C23C14/22
Filed: 1982-08-09
Abstract: PURPOSE:To obtain a ceramic thin layer free from a pinhole, by a dry plating method wherein the surface of a metal, ceramic or an org. substance is plated with ceramic in a gaseous phase according to a continuous two-stage coating process consisting of an ion plating method and a vacuum vapor deposition method. CONSTITUTION:In applying the thin layer coating of ceramic to the surface of a metal, ceramic or an org. substance in a gaseous phase, ceramic is coated at first by an ion plating method. Ionization at this time is performed by an electron beam irradiating method, a DC electric field method and a high frequency exciting method and the thickness of the coating thin layer is adjusted to 0.1- 0.5mum. In the next step, ionization is interrupted and coating is subsequently carried out continuously by a vacuum vapor deposition method. The film thickness at this time is adjusted to about 1.7mum.
Patent JP-H086276-A (JP)
Title: Electrophotographic image forming method
Inventor: ETO YOSHIHIKO
IPC: G03G21/08
Filed: 1994-06-21
Abstract: PURPOSE:To provide a photoreceptor which has a spectrally high sensitivity up to a long wavelength region, is free from image defects, offers high image quality, is free from photofatigue, does not degrade electrostatic charge potential in spite of iterative use, does not induce a rise of white paper potential and is highly durable and an image forming method using the same. CONSTITUTION:This photoreceptor is constituted by providing the surface of a conductive base with a photosensitive layer contg. perylene pigments which are expressed by at least formula I or formula II and have the following crystal types, as a charge generating material: The Bragg angle 2theta of the X-ray diffraction spectra for Cu-Ka rays have peaks at 63+ or -0.2 deg., 12.4+ or -0.2+ or -, 25.3+ or -0.2 and 27.1+ or -0.2 and have the max. peak intensity at 12.4+ or -0.2 deg. in addition, the half- value width of the peaks is >=0.65 deg. and the Bragg angle does not have the distinct peak at 11.5+ or -0.2 deg.. This image forming method is an electrophotographic image forming method which forms an electrostatic latent image by exposing on such photoreceptor after applying a uniform electrostatic charge thereon and has a destaticizing stage using a diode having a light emission wavelength 600 to 800nm for the purpose of destaticization.