Patent GB-728652-A (GB)
Title: Improvements in or relating to electronic register translators
Inventor: BENSON DAVID LIVINGSTONE
IPC: G06F17/00
Filed: 1950-03-22
Abstract: 728,652. Automatic exchange systems. POSTMASTER GENERAL. March 15, 1951 [March 22, 1950], No. 7224/50. Class 40 (4). A common translator is made accessible to each of a number of registers in turn through the operation of a ring counter which tests the registers one by one for calling condition, each register thus having access to the translator for the time necessary to secure a translation. In a modification, two registers may have overlapping access to the translator. In a further modification, to guard against errors in translation, two or three translators may be used together. The invention is illustrated schematically in Fig. 1. A number of cold-cathode counters, such as are described in Specification 728,651, are used for storing digits, a denary counter comprising eleven tubes, the first of which is conducting when the counter is empty. A common translator serves a number of registers one by one, responding to a calling register by receiving the code digits and the ordinal number of the translational digit or other information required, signalling the required information to the sender and dismissing the register. Register. The code digits are entered into counters 1, 2, 3 while a sequence control counter 4 controls the request for ordinal translation digits or other information from the translator. When the register requires information, counter 4 has its normal tube extinguished and one of the other tubes corresponding to the data required conducting, so as to mark one of a number of wires represented by 31 connected to element 25 which marks pulse gate 23. Pulse generator and ring counter. A pulse generator 21 in the translator feeds a pulse distributing element 22 Which provides a constantly recurring series of four pulses spaced in time, one on each of wires 43-46. The fourth pulse, on wire 46, steps a ring counter 20, which marks the registers one by one. The first pulse, on wire 43, is applied to the pulse gates 23 of every register, only that gate 23 which is marked by ring counter 20 opening to pass the pulse over wire 41 to elements 5-8. Transfer of digits to translator. The counters 1-4 mark corresponding tubes in elements 5-8 so that a pulse on wire 41 fires these tubes, pulses being relayed to corresponding tubes in blocks 9-12. Selection of translation. The second pulse, on wire 44, is fed to block 13 representing ten 'pulse gates, each controlled by the corresponding tube in block 9, the pulse thus appearing on one of ten wires 33 indicative of the first code digit. Blocks 10 and 11 each mark one of ten wires 34, 35. Block 14 represents one of a thousand individual code point switches, each associated with a particular 3-digit code and that switch, which is marked by blocks 10, 11 and receives a pulse from block 13, operates to relay the pulse to one of a number of translation tubes 15, one tube being provided for each translation and associated information. To effect economy, if one tube 15 is appropriate to more code point switches than the others, those switches associated with this tube are omitted and the tube is replaced by an element 26 which simulates the tube if no other tube conducts. The selected tube 15 or 26 marks the associated wire 36 and block 12 marks a wire 37 according to which translation digit or other information is required. Block 16 represents a number of translation point switches, one of which is selected by the coincidence of markings on wires 36, 37 and responds to the third pulse, on wire 45, the pulse being relayed by cross-connection to block 17, which represents a number of translation value memory tubes, one for each digit or other signal which may have to be provided. For economy, if one tube is used more than the others, a further tube 27 may replace it, conducting when none of the other tubes conduct provided one of the tubes in block 12 is conducting. Transfer of translation to register. The selected translation memory tube 17 or 27 over its associated wire 38 opens the associated one of thirteen switches represented by 18 in every register. The fourth pulse of the series, on wire 46, goes to the pulse gate 24 of every register, but only that gate 24 marked by the ring counter 20 is open. Accordingly the pulse on wire 46 passes this gate 24 and is relayed by one of the thirteen transfer switches 18. If the translation relates to a digit, this pulse passes over one of ten wires 39 to the sender counter 19, which causes the register to send the digit. If the translation relates to sequence information, the impulse passes over one of three wires 48 to the counter 4 which selects the appropriate operation. The fourth pulse also steps the ring counter 20 to connect with another register. Before the first pulse of the next series, all coldcathode tubes in the common translator are extinguished. Modifications. The selection of the transational information may be varied in detail (Figs. 3a-3d, not shown). If all code point switches associated with one first code digit are connected to the same memory tube, these switches may be omitted except for one which responds to the first digit only. Similarly one code point switch may be arranged to respond to the first two digits only. Simultaneous service to two registers. The registers may be divided into two groups A and B, served by separate allotters 53, 54, Fig. 4. The distributer provides timed pulses P1-P4 which are supplied to the pulse points in the manner shown, operations on the two registers being separated in time by two pulses. Additional elements 50, 51, 52 are provided to pass information forward from block 12 at the times required in the later stages of translation. The H.T. supply is switched off and then on again just before each piece of apparatus receives a signal from the preceding apparatus. Use of two translators. Two translators may be used simultaneously to trap an incorrect translation. The translators present the translation values together to the transfer switch block 18, Fig. 1, the called diode in 18 firing only if a signal is received from both. Three translators may be used, in which case the diode responds to signals from two of them, thus discounting an erroneous signal. The double system can be reverted to use a single translator by connecting the wires 38 of the unused translator to an appropriate source of potential. Disagreement between translators can be arranged to operate a counter or alarm system.