baber/WOPTO huggingface dataset:
Patent JP-H02124031-A (JP)
Title: Selection controlling apparatus for thresher
Inventor: SATO SHIGEO
IPC: A01F12/48
Filed: 1988-11-01
Abstract: PURPOSE:To simplify the construction of the above apparatus by setting a target spacing of a chaff sieve with a setting means and switching the indication of the culm state based on the judgment whether the above set value is larger than the set value of the opened side or not. CONSTITUTION:A chaff opening of a chaff sieve 21 is controlled by a control potentiometer. A controlling apparatus discriminates whether the controlled opening is larger than a preset value near the maximum value of the opened side or not. When the controlled value is larger than the preset value, the selection state is automatically switched to the wet-culm treating state. When the controlled value is smaller than the preset value, the selection state is automatically controlled according to the speed of the combine corresponding to the quantity of the treating crops.
Patent JP-S61156078-A (JP)
Title: Control system of flash fixing device
Inventor: SETO FUMIAKI
IPC: G03G15/20
Filed: 1984-12-27
Abstract: PURPOSE:To prevent plural flash fixing devices from the overlap of the maxi mum currents by forming a flash control part for controlling the charging timing of the plural flash fixing devices to shift the charging timings of these flash fixing devices. CONSTITUTION:A printing control part is connected to a host CPU to control all of an information transfer cycle, a storage cycle, a transfer cycle, and a fixing cycle. On the fixing cycle, a printing control part 8 controls the flash fixing device 7 so as to synchronize with a charging timing signal CH1 outputted from a flash control device 11. The flush control device 11 is constituted of a kind of a timing control circuit to apply charging timing signals of which timing is differently shifted to respective printers LP1-LP3. When the charging timing signal CH1 is applied, the printing control part 8 applies a charging signal to a charging part 70 only when the charging timing signal is turned on and a charging current Ic is obtained from an input current I1 to the charg ing part 70 to charge a capacitor C1.
Patent JP-2001100112-A (JP)
Title: Image pickup element assembling device for endoscope
Inventor: TAKAHASHI KAZUAKI
IPC: G02B23/24
Filed: 1999-09-30
Abstract: PROBLEM TO BE SOLVED: To accelerate the reduction in diameter by efficiently arranging signal lines in the space on the outer peripheral side within the front end of an endoscope even when circuit boards are arranged on the outer peripheral side. SOLUTION: Two sheets of the upper and lower circuit boards 11 and 12 are arranged above and below a CCD 1 and the lead wires 2 of the CCD 1 are connected to front surface side terminal pads Kc of these circuit boards 11 and 12. The rear side is provided with plural rows of terminal pads Kd for connecting the signal lines 14. The number in the endoscope axis direction 100 of the terminal pads Kd is set so as to be larger as the spacings D between the circuit boards 11 and 12 and the arcuate inside wall of a cylindrical supporting body 16 are greater. The circuit boards 11 and 12 are arranged by bending the circuit boards approximately 90 deg. after the connection of the CCD 1. As a result, the effective utilization of the inside wall side spacing of the supporting body 16 is made possible. The terminal pads may be formed with inclination.
Patent JP-H02237765-A (JP)
Title: Clamping device for tool,in particu lar griding wheel
Inventor: RUDORUFU BUEEBAA
IPC: B24B45/00
Filed: 1989-10-27
Abstract: PURPOSE: To simply change a tool by connecting a hydraulic medium chamber of a clamp bush to a hydraulic medium supplying hole through which a spindle is inserted, and blocking the hole by a clamp screw capable of being freely backed off to a pressure relief position. CONSTITUTION: Pressure medium (grease) is filled in a hole 9 through a filling hole 10, and a clamp piston 13 is pressed against a clamp screw 11. The pressure medium is supplied to a chamber 6 through a lateral hole 8, and a wall part 7 of a clamp bush 5 is elastically deformed outward in the radial direction. Therefore, a holder 32 mounted on the clamp bush 5 is positioned together with a tool 33 on the clamp bush 5 and clamped in the radial direction. When the holder 32 and the tool 33 are detached, the clamp screw 11 is backed off to a pressure relief position and loosened. Therefore, the clamp piston 13 is slide in the hole 9, pressure of the pressure medium is reduced, deformation of the wall part 7 of the clamp bush 5 is removed, and the holder 32 and the tool 33 are detached from the clamp bush 5.
Patent JP-S63132042-A (JP)
Inventor: IWAKURA MITSUHARU
IPC: B32B15/08
Filed: 1986-11-25
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H01120545-A (JP)
Title: Electromagnetic driving diaphragm device
Inventor: NOZUE HITOSHI
IPC: G03B9/02
Filed: 1987-11-04
Abstract: PURPOSE:To generate a great torque in spite of a rotor with a small diameter by cylindrically forming the rotor of a motor driving a diaphragm blades and bendingly forming a drive coil and permanent magnets in parallel with the cylindrical surface of the rotor. CONSTITUTION:A main body 3 is a double cylinder structure possessing a cylindrical center part and an outside cylindrical part 3b coaxial with the center part. The double cylindrical rotor 4 made of magnetic material is inserted into an annular space formed between the center part 3a and cylindrical part 3b of the main body 3, and it is loaded rotatably. The cylindrically bended permanent magnets 9 and 10 are fixed to the outer periphery of the inside cylindrical part 4a of the rotor 4. Pin holes 4c-4e for pivotally supporting diaphragm blades 6-8 are formed on the forward plate part of the rotor 4, and pivotally supporting pins 6a-8a protrudingly made on the vanes 6-8 are inserted into the holes 4c-4e. Although the rotor has a small diameter, it can comprises the motor generating a great torque, thereby scaling down the device.
Patent JP-H09119954-A (JP)
Title: Microwave radiometer
Inventor: SAGARA TAKEHIKO
IPC: G01R29/08
Filed: 1995-10-26
Abstract: PROBLEM TO BE SOLVED: To prevent saturation of output by providing a DC amplifier additionally with an offset voltage generation circuit and inserting a variable magnification amplifier between the DC amplifier and an integrator in order to control the magnification and offset with a signal from the ground when the output signal begins to saturate thereby compensating the variation of gain and offset. SOLUTION: Output voltage Vo from (the integrator 12 of) the radiometer and the voltage Vo' after temperature variation are expressed by a formula I (Gt, Ot; total gain and total offset, Gt', Ot'; total gain and total offset after temperature variation, To; observed temperature). When the output voltages Vh, Vc from the integrator 12 are calculated at the time of observation of high and low temperature calibration sources when a variable magnification amplifier 13 and an offset voltage generation circuit 14 are provided and substituted, formula II is obtained (Gval; variable magnification, Voff: variable offset voltage, G3; gain of DC amplifier). When the voltage Va, Vb is saturated, magnification Gval and voltage Voff are set to satisfy formula III by sending a command from the ground and controlling the amplifier and the circuit.
Patent JP-H1199093-A (JP)
Title: Auxiliary tool for scrubbing
Inventor: FUJIWARA FUMIYO
IPC: A47L13/16
Filed: 1997-09-29
Abstract: PROBLEM TO BE SOLVED: To widely and cleanly scrub a screen door, etc., every nook and corner while protecting it without the twisting of a duster, a towel, etc., during scrubbing and the exerting of pressurizing force larger than required one. SOLUTION: An auxiliary tool 1 for scrubbing 1 is formed by a pair of plate bodies 1A and 1B which is freely opened and closed through an opening angle θ regulated to be acute and wound with wet duster, a towel Q, etc. A brush 4 is planted on the whole surface of the respective outer peripheries of the bodies 1A and 1B. Thin parts 7 having thickness equivalent to that of the duster/towel Q toward the side of an open edge tip through a level difference part 5 from thick parts 6 are formed on the mutual inner surface of both of the bodies 1A and 1B, and an inserting and holding clearance part P is formed to fold both tip end parts of the duster/towel Q, which are wound around both the bodies 1A and 1B in the closing state of both of the bodies 1A and 1B so that the inside of both of the bodies 1A and 1B are turned in and clamped tensely.  Many projections 8 for stopping the slippage of the duster/towel Q are arranged on the opposed inner surfaces of the parts 7. Both of the bodies 1A and 1B are pivotaly attached through a hinge part 2 and restoring regulating springs 3 for constantly energizing both of the bodies 1A and 1B in a closing direction from an opened state are wound around the hinge part 2.
Patent JP-H04155816-A (JP)
Title: Manufacture of semiconductor device
Inventor: NITTAMI KENJI
IPC: H01L21/302
Filed: 1990-10-19
Abstract: PURPOSE:To control resist pattern in a highly precise manner by a method wherein the resist of lower layer is removed by O2 plasma, an oxide layer is formed on an etching film, and it is used as a mask. CONSTITUTION:An SiO2 film 1 and a polysilicon film 2 are formed on a semiconductor substrate, a resist 3 is applied thereon, and an Si-containing resist 4 is applied on the resist 3 as the upper layer resist. Then, the upper layer resist 4 is exposed to light, a developing treatment is conducted, an aperture 5 is formed, and an O2-plasma etching treatment is conducted. To be more precise, the etchant of O2, plasma enters the aperture part 5 only, the lower layer resist 3 is etched, and when the etching makes progress as far as to the surface of the polysilicon film 2, an oxide layer 6 is formed. Then, the resists 3 and 4 are removed by the chemical solution such as a sulfated solution, and the unnecessary polysilicon layer 2 is removed by dry etching using the oxide layer 6 as a mask. Lastly, the oxide layer 6 is removed by conducting a selective dry etching using the gas such as fluorocarbon and the like, and a microscopic pattern such as a polysilicon gate or a wiring and the like is formed.
Patent JP-2000088702-A (JP)
Title: Method for evaluating image forming performance
Inventor: MOROHOSHI HIROSHI
IPC: G01B9/00
Filed: 1998-09-14
Abstract: PROBLEM TO BE SOLVED: To permit the highly accurate measurement of marks by changing the focus of an optical member in which measurement marks each with a predetermined amount of difference in level are provided on a substrate within the depth of focus of an image forming optical system, detecting signals based on the measurement marks, and measuring the displacement of the optical member in location. SOLUTION: In a wafer 1, the second mark 3 for superposition (resist pattern) is formed on the first mark 2 for superposition (silicon etching wafer). The amount of difference in level of the marks 2 and 3 is 1/8 and 3/8 of the center wavelength λc of illumination wavelengths used in an alignment optical system, respectively. A pencil of rays from a halogen lamp 5 illuminates the marks 2 and 3 via a fiber 7, an illumination system 8, a mirror 4, a polarization beam splitter 9, a λ/4 plate 10, and an objective lens 11. The reflected light from the marks 2 and 3 is subjected to photoelectric conversion at a CCD camera 14 via the lens 11 to the beam splitter 9, a relay lens 12, and an erector 13, and the images of the marks 2 and 3 are subjected to image processing at a computer 15 to detect their relative locational relationship.
Patent JP-2001096599-A (JP)
Title: Thermoplastic polyester resin foam and method for production thereof
Inventor: ISHIDA SHINJI
IPC: B29C47/00
Filed: 1999-09-30
Abstract: PROBLEM TO BE SOLVED: To provide a thermoplastic polyester resin foam improved in the irregularity of density, a foam size or thickness and uniform in quality such as strength or the like and a method for producing the same. SOLUTION: A thermoplastic polyester resin containing an isophthalic acid component in a ratio of 0.1-10 wt.% is subjected to extrusion foam molding while melted and kneaded along with a foaming agent under pressure in an extruder.
Patent JP-H01153728-A (JP)
Title: Production of polyarylene sulfide
Inventor: ERUNSUTOOURURITSUHI DORUFU
IPC: C08G75/02
Filed: 1988-11-07
Abstract: PURPOSE: To obtain polyarylene sulfides suitable for the automotive materials and the like by condensation without using any solvents by reacting halogenated arylthiosilanes in the presence of a specified catalyst and interphase moving catalyst.  
     CONSTITUTION: Halogenated arylthiosilanes of the formula, wherein Hal is a halogen atom; Ar is monocyclic- or a fused polycyclic 6-24C aromatic group with two bonds; R is a 1-4C alkyl group, such as 4-chlorophenyl-trimethylsylil thioether is reacted in the presence of 0.01-1% by weight (hereinafter referred to as %) of catalyst such as alkali metal halides and/or alkali earth metal halides, and 0.01-% of the interphase catalyst, at a temperature of 150-400°C to eliminate halogenated trialkyl silane or halogenated (tris)cycloalkylsilane. 
     COPYRIGHT: (C)1989,JPO
Patent JP-S62137823-A (JP)
Title: Annealing method for compound semiconductor substrate
Inventor: TAKANO HIROZO
IPC: H01L21/265
Filed: 1985-12-11
Abstract: PURPOSE:To keep stoichiometry of a semi-isulating GaAs substrate stable, in a high-temperature annealing processes of the semi-insulating GaAs substrate, in which an ion-implanted layer is formed, by forming an insulating film includ ing Ga and As at high concentrations as an anneal protecting film, on the ion implanted layer. CONSTITUTION:An ion implanted layer 2 is formed on the main surface of a semi-insulating GaAs substrate 1. On this ion implanted layer 2, an SiO2 film 3, in which Ga atoms 4 and As atoms 5 are homogeneously included at high concentrations, are deposited and formed as an anneal protecting film. Under this state, annealing is performed. Even if high-temperature annealing is performed after the formation of said SiO2 film on the ion implanted layer 2 of the semi-insulating substrate 1, the diffusing phenomena of the Ga atoms 4 and the As atoms 5 into the SiO2 film 3 from the inside of the ion implanted layer 2 can be effectively controlled, when the Ga concentration and the As concentration in the film 3 exceed solid solution limit. Thus the formation of Ga voids and As voids in the ion implanted layer can be avoided and the stoichiometry can be kept stable.
Patent JP-H11115638-A (JP)
Title: Pocket structure for instrument panel
Inventor: SUGAWARA MAMORU
IPC: E05B83/30
Filed: 1997-10-14
Abstract: PROBLEM TO BE SOLVED: To provide a pocket structure eliminating an adjustment for positioning a striker fixing a pocket body in a cover pocket. SOLUTION: In a pocket structure to be mounted to an instrument panel 7, the pocket provided with a cover pocket 1 to be fixed to the instrument panel 7 side, and with a pocket body 2 which is supported by the lower periphery of the opening part of the cover pocket 1 by a pin 3 in such a way as to be freely revolved, a striker 4 maintaining the pocket body 2 in a closed condition is provided for the upper part of the cover pocket 1, a locking mechanism 5 to be engaged with the striker 4 is provided for the upper part of the pocket body 2, the pocket main body 2 is so formed as to be positioned to a positioning surface formed at the upper periphery of the cover pocket 1 under its closed condition so as to let it abut against the positioning surface,  and the striker 4 is formed into a structure in which it is fixed to the cover pocket 1 from the upper outer direction of the cover pocket 1 under a condition that the pocket body 2 is closed and the striker 4 is locked.
Patent JP-H10106473-A (JP)
Title: Scanning electron microscope device with secondary electron multiplying mechanism
Inventor: TANNO NAOHIRO
IPC: H01J37/244
Filed: 1996-09-30
Abstract: PROBLEM TO BE SOLVED: To provide an image signal having a large signal-noise ratio without raising the acceleration voltage of a probe electron beam and an electron flow value, and ensure the high definition and resolving power of an electron microscope image. SOLUTION: Secondary electrons released and dispersed depending on the irregularities of the surface of a sample and the material thereof, are collected and accelerated with a primary electron probe 4 irradiated from an electron gun 1. Also, the secondary electrons are directly multiplied. The secondary electrons are, then, converted to electric signals via an anode electrode and pertinent signal components are selectively extracted. Also, the secondary electrons are made to collide with a fluorescent screen, so as to obtain a fluorescent intensity distribution analogous to the intensity distribution of the secondary electrons. Then, only a high luminance part at the center of the fluorescent intensity distribution is extracted. Furthermore, the fluorescent intensity distribution is converted in a photoelectric way.  Output signals available through the conversion are amplified and processed for conversion to picture element signals. In addition, the signals are recorded and accumulated. A similar process is implemented at every scan of the sample using the primary electron probe 4. At the same time, the electron microscope image of the sample is displayed by the picture element signals. A microcomputer 21 is provided for controlling the operations at all stages.
Patent JP-2000111946-A (JP)
Title: Active matrix substrate and its manufacture, and liquid crystal device
Inventor: KOBASHI YUTAKA
IPC: G02F1/136
Filed: 1998-10-01
Abstract: PROBLEM TO BE SOLVED: To prevent short circuit between TFTs(thin film transistors) formed on a substrate without increasing the number of steps. SOLUTION: In respective impurity doping steps for forming plural TFTs 10C on an active matrix substrate, peripheries of regions for forming TFTs 10C and specified regions between adjacent TFTs 10C are covered with resist masks RM11-RM14. Consequently, if an excessive semiconductor thin film 20D (20E, 20F) remains in the case an island shaped semiconductor thin film 20C is formed, an interspace between two source-drain regions 12C in TFT 10C is insulated and separated with an intrinsic semiconductor thin film 20F. In a remaining semiconductor thin film 20E, which combines two TFTs 10C formed on adjacent two pixels, the interspace becomes an intrinsic region 20J separating elements without any doped impurities.
Patent JP-2001099707-A (JP)
Title: Infrared detecting device
Inventor: FUJIMURA TOSHIO
IPC: G01V8/12
Filed: 1999-09-30
Abstract: PROBLEM TO BE SOLVED: To provide an infrared detecting device capable of facilitating frequency adjustment of a band-pass filter characteristic of a voltage amplification circuit, capable of executing high-gain voltage amplification without generating output saturation, and capable of being integrated. SOLUTION: This infrared detecting device having a pyroelectric element 1, an I/V conversion circuit 2 for converting a current signal outputted from the pyroelectric element 1 into a voltage signal, and a voltage amplification circuit 3 for amplifying the voltage signal outputted from the I/V conversion circuit 2 with a prescribed frequency band, and for outputting a detection signal, has such a characteristic that the voltage amplification circuit 3 is composed by connection of a plurality of steps of primary filters and composed of a switched capacitor filter in which a resistance of the primary filter is used as a switched capacitor.
Patent JP-H1099121-A (JP)
Title: Carrying case of telephone or the like
Inventor: WATANABE YAICHI
IPC: H04M1/11
Filed: 1996-09-30
Abstract: PROBLEM TO BE SOLVED: To house many kinds of telephones or the like different in size, etc., by fixing a telephone or the like in a bag body by inserting/fastening a girth belt into/to the back face side of the bag body through belt inserters. SOLUTION: A telephone or the like is put in from a bag port 13 of a bag body 10, and it is adjusted to a height of the telephone or the like, and an upper part of the bag body 10 and a flap 14 are bent, and when a hook tape 141 of the flap 14 is joined to a loop tape 111 of a body part 11, the bag port 13 can be sealed. Next, a girth belt 20 is inserted into a pair of belt inserters 12 of the bag body 10, and when a girth of the human body is fastened, the bag body 10 can be fixed to an optional body position in the vicinity of a waist part of the human body. Since the body part 11 of the bag body 10 is also fastened with its intermediate part as the center, the telephone housed in the bag body 10 can be fixed in the bag body 10 regardless of largeness/smallness of the size of a breadth and a thickness. When the telephone or the like is put back, even if an intermediate part is strongly fastened in a periphery of the body part 11 of the bag body 10, since an upper part and a lower part are loosely fastened, it can be easily put back.
Patent JP-S62141304-A (JP)
Inventor: NAKAUCHI SUSUMU
IPC: F16B41/00
Filed: 1985-12-13
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H04153854-A (JP)
Title: Semiconductor integrated circuit
Inventor: KISHIBE KOJI
IPC: G06F13/42
Filed: 1990-10-18
Abstract: PURPOSE:To put the semiconductor integrated circuit in operation at nearly the same high speed with a precharging circuit which has no holding circuit by providing a circuit which generates a signal having delay only when a clock for precharging rises and providing a holding circuit which has a latch for positive feedback controlled with the signal. CONSTITUTION:A precharging line L1 and a power source are connected through a precharging transistor T1 and a clock K1 is connected to the gate of the precharging transistor T1. The precharging line L1 is connected to the input of an inverter G11, whose output is connected to a clocked inverter G12, whose output is connected to the precharging line. The output X1 of a delay circuit D1 is connected to the control gate of the G12 and the clock is connected to the input of the D1. Then the delay time of analog delay is set shorter than the time of malfunction due to a holding omission and longer than the time required for discharging. Consequently, the semiconductor integrated circuit operates at nearly the same fast speed with the precharging circuit having no holding circuit.
Patent JP-H06107778-A (JP)
Title: Terminal-modified polyarylate and its production
Inventor: INUI YUKIKO
IPC: C08G63/19
Filed: 1992-09-25
Abstract: PURPOSE:To obtain the subject polyarylate excellent compatibility, flowability in hot state, mechanical strength and Izod impact strength and useful as a plasticizer for polyamide, etc., by using a specific molecular weight modifier. CONSTITUTION:The objective terminal-modified polyarylate is produced from a dihydric phenol component such as bisphenol A and an aromatic dicarboxylic acid component such as terephthalic acid by using preferably 2-50mol (based on 100mol of the dihydric phenol compound) of a compound of formula (R<1> is single bond or 1-10C alkylene; R<2> is 1-12C trivalent aliphatic hydrocarbon group; Z is amino, hydroxyl or acid halide residue) (e.g. 3-amino-alpha-pyrrolidone) as a molecular weight modifier.