Patent GB-1007915-A (GB)
Title: Improvements in signal detection circuits
IPC: G06V10/28
Filed: 1964-05-04
Abstract: 1,007,915. Measuring pulse characteristics. INTERNATIONAL BUSINESS MACHINES CORPORATION. May 4, 1964 [May 3, 1963], No. 18364/64. Heading G1U. [Also in Division H3] In a circuit for producing an output pulse at a predetermined point or points in the leading and/ or trailing edge of an input pulse, and suitable for use in measuring rise time of pulse duration, the input pulse is applied to the base of a first transistor and through an attenuator to the base of a second transistor whereby the attenuated pulse causes a capacitor in the common emitter circuits of the transistors to be charged by the second transistor to a predetermined fraction of the input pulse and the first transistor thereafter becomes conductive when an edge of the input signal applied to the first transistor passes the predetermined fraction of the input pulse. In Fig. 1 the input pulse applied at 1 passes through a threshold circuit 10, 11,12 to the base of transistor 5 and through a potentiometer 2 to the base of transistor 4. The leading edge of the pulse causes transistor 4 to conduct and to charge to a voltage which is a fraction of the input pulse as determined by the potentiometer. Transistor 5 remains non-conducting until the voltage of the input pulse at the trailing edge falls below the voltage across capacitor 6 whereupon an output pulse is produced at V8, the pulse being terminated when capacitor 6 discharges to the threshold level set by potentiometer 13. The threshold circuit prevents conduction for small noise pulses and circuit 3 removes the negative going portion of any input pulse. Potentiometer 2 is preferably set at the half amplitude point where the slope of the input pulse is greatest. An alternative circuit, Fig. 4, produces a pulse during the leading edge of a delay input pulse. This input pulse is fed from terminal 31 through an emitter follower 42 and a potentiometer 32 to transistor 34 and also through a delay line and emitter follower 43 to transistor 35. As before capacitor 36 charges to the fraction of the input pulse amplitude determined by potentiometer 32. The delayed input pulse reaches this amplitude at a later time whereupon transistor 35 conducts to produce an output pulse from inverter 39. This may be the output pulse of the circuit (Fig. 3 not shown). This pulse is also fed back to a transistor 37 so as rapidly to discharge capacitor 36 and thus render transistor 35 more quickly conducting. In order to provide a threshold beneath which the circuit will not operate the pulse from the potentiometer 32 is also fed to a transistor 44 to charge a capacitor 46 in a similar manner to 36. In addition the voltage across capacitor 36 is fed to a transistor 45 through a threshold circuit 47 to cause transistor 45 to conduct when the voltage across capacitor 36 falls below that across 46 and this occurs when capacitor 36 is discharged through 37 namely during the leading edge of the delayed pulse. The conduction of transistor 45 produces a pulse which is amplified at 58 and the threshold circuit 47 prevents conduction for small amplitude noise pulses. When the input pulses may be of opposite polarity they may be applied to the input circuit through an additional circuit which inverts the negative going pulses (Fig. 6 not shown). To measure the rise time of the input pulse two circuits may be used producing respectively output pulses at the 25% and 75% levels of the pulse and the width may be measured by using circuits which produce pulses at the 50% levels of the leading and trailing edges respectively. Alternatively the input pulse may be differentiated to produce pulses at the leading and trailing edges and the two circuits may detect the 50% points of these pulses.