Patent GB-1204535-A (GB)
Title: Improvements in or relating to signal encoding systems
IPC: H04N1/413
Filed: 1967-11-16
Abstract: 1,204,535. Facsimile communication band-width reduction. SOUTHERN PACIFIC TRANSPORTATION CO. 16 Nov., 1967 [16 Nov., 1966], No. 52259/67. Heading H4F. Digital signals are examined during a sampling interval and an analogue signal is generated which in terms of its amplitude represents both the signals and the time of a transition between signals if one occurs during the interval. The invention is described as applied to a facsimile system in which binary, black-and-white signals are examined during a sampling interval corresponding to two elemental picture intervals and translated into a signal varying in amplitude according to the code indicated in Fig. 1(b) where amplitude 0 denotes all white throughout the interval, amplitude 5 denotes all black, an amplitude in the range +1 to +5 denotes a final black signal with a white-to-black transition at a time indicated by the amplitude, and an amplitude in the range - 1 to - 5 denotes a final white signal with a black-to-white transition at a time indicated by the amplitude. An alternative code is described with reference to Fig. 1(a)-not shown. The signal is examined by the arrangement shown in Fig. 2 in which the binary signal is applied to trigger back and forth a bi-stable circuit 18 to generate a signal V for black and a signal V for white. Gate circuits 12 and 20 which are inhibited by one-shot circuits 30 and 34 prevent triggering at intervals less than elemental picture intervals. Leading edge pulse differentiator 24, 26, 28 provides a signal V<SP>1</SP> coincident with a black-to-white transition, whilst a similar differentiator 32 provides a signal V<SP>1</SP> coincident with a white-to-black transition. A bi-stable circuit 40 is reset by a pulse R at the commencement of the sampling interval and may be set by either signal V<SP>1</SP> or V<SP>1</SP> through OR gate 42 whereby there is provided a signal C denoting no transition during the interval or a signal C denoting a transition. The analogue signal is generated by the arrangement shown in Fig. 3 where a logic system comprising AND gates 50, 58 and 66 receives signals as indicated from Fig. 2 and controls the triggering of bi-stable circuits 44, 46 and 48 by clock pulses T (which occur at the end of the sampling interval) via gates 52, 56, 60, 64 and 72. Circuit 44 produces a signal W in response to all white condition during the sampling interval, circuit 46 produces a signal W-B in response to a final black signal preceded by a white-toblack transition, and circuit 48 produces a signal B in response to an all-black condition. Amplifiers 74, 76 and 78 respond to the signals to produce currents of relative value, respectively, +1, + 6 and + 7. A ramp generator is triggered by pulses R and produces a waveform varying from - 1 to - 5 during the sampling interval. The waveform is applied to a sample- and-hold circuit 82 which is controlled by signals V<SP>1</SP>, V<SP>1</SP> and R applied through OR gate 84. By this means, there is produced a signal of value - 1 in response to signal R when no transition occurs, and a signal of amplitude in the range - 1 to - 5, depending on the time of a transition, in response to signal V<SP>1</SP> or V<SP>1</SP>. A further sample-and-hold circuit 86 holds and transmits the produced signal in response to clock pulses T. The output signal is then combined with the output of amplifiers 74, 76 and 78 (if such an output is produced) to provide a final signal through amplifiers 88 for transmission which is compounded according to the code indicated in Fig. 1(b). At a receiver, Fig. 4, the signal is decoded to regenerate the original binary signal by an arrangement of transistor trigger pairs 104, 105; 106, 107 and 108, 109 which are biased with the right-hand stages conducting with respective bias levels of - 5, - 1 and + 5. The incoming analogue signal is combined with a ramp voltage from generator 96 which varies from 0 to +4 4 throughout the sampling interval, and the combined signal is applied in common to the lefthand transistor stages. The trigger pairs control the output terminal 122 through diodes 120 and 126. As a consequence of the chosen bias levels, the circuit has an input-output amplitude response characteristic as shown in Fig. 5, where the lower output level corresponds to white and the upper level to black. Incoming white and black signals of level 0 and + 5, respectively (see Fig. 1(b)), despite the addition of the 0 to + 4 ramp variation, result correctly in continuous white and black output levels. However, signals in the ranges + 1 to +5 5 and - 1 to - 5, corresponding respectively to white-toblack and black-to-white transitions, are swept by the ramp voltage through the + 5 and, - 1 bias points at which transitions are produced in the output. Since a bias level is reached at a time during the ramp variation determined by the amplitude of the incoming signal, the circuit generates signals corresponding to the original binary signal with transitions correctly located in time. Where the transitions occur during a sampling interval, the signal transmitted by the system contains information about the time of the last transition. It is, however, possible to deduce the existence of an earlier transition and insert it in the regenerated signal. For example, a signal including a white-to-black transition, which follows a signal in the preceding sampling interval which is either all black or terminates in black, must also include a black-to-white transition. In a similar manner a presence of an earlier white-to-black transition may be deduced in a signal including a black-to-white transition which follows a signal which is either all white or terminates in white. In Fig. 4 the insertion of the further transitions is effected by ramp generators 134 and 136 which vary the bias levels of transistors 105 and 107. Gates 128 and 132 are controlled by the output of the circuit at terminal 128 and pulses R at the commencement of each sampling interval. Generator 134 is triggered when the preceding signal terminates in black, and generator 136 when the preceding signal terminates in white.