baber/WOPTO huggingface dataset:
Patent TW-425518-B (TW)
Title: Automatic wiring training evaluation system
Inventor: LU SHU-TAI
IPC: G06F17/00
Filed: 1999-06-10
Granted: 2001-03-11
Abstract: The present invention relates to an automatic wiring training evaluation system consisting of a personal computer and several wiring training modules and may be operated in either automatic evaluation mode or training mode. Each of the wiring training models consists of an Intel-8255 parallel input/output (PIO) chip, a real apparatus, a false apparatus, a switching relay, a decoder, a warning circuit, an auxiliary relay, and an encoder. When the system is set to automatic evaluation mode, in order to improve evaluation efficiency and reduce human errors, the personal computer can immediately differentiate the modules into correct wiring modules and incorrect wiring modules at the end of each wiring training. When the system is set to training mode, in order to help the teacher know the training effects, each wiring training module can be connected by the false apparatus during wiring to progressively perform real-time monitoring on the wiring correctness and the personal computer can monitor the condition of all wiring training modules simultaneously. If any error wiring is detected, the wiring training module will immediately indicate a warning by means of lights or sounds. The system can also show the monitoring results of all wiring training modules on the personal computer monitor.
Patent TW-439391-B (TW)
Title: Organic EL device
Inventor: ARAI MICHIO
IPC: H05B33/14
Filed: 1999-06-25
Granted: 2001-06-07
Abstract: The organic EL device of the present invention has merits which organic materials and inorganic material have, and which can achieve the purpose of high efficiency, long life, and which can be produced at low cost. To accomplish this goal, it comprises a couple of a hole injection electrode 2 and an electron injection electrode 6, an organic layer 4 provided between the electrodes 2, 6, concerning a light-emitting function, and said organic layer 4 includes a light-emitting layer containing a conjugated polymer, and a high resistive inorganic hole injection layer 3 provided between the organic layer 4 and the hole injection electrode 2, including a conductive path for blocking electrons and for transporting holes.
Patent TW-469460-B (TW)
Title: Dip switch with wire contacts
Inventor: ZDANYS JOHN JR
IPC: H01H15/06
Filed: 1999-08-18
Granted: 2001-12-21
Abstract: A dual in line switch apparatus selects between several switch positions. Specifically there is a housing that contains slides. The slides have a slide groove on each end and a slide grip portion. A wire contact is attached to each slide. A first and second row of terminals is molded in the housing. The first and second row of terminals rest above the bottom of the housing and are spaced apart to define a slot between the rows of terminals. The wire contacts are located between the terminals and the slide. The wire contacts operate, as the slide is moved, to make and break electrical connections between the terminals. The wire contact has an integrally formed pair of upright portions and a wire detent. The terminal has a detent cavity. The upright portion fits into and is retained by the slide groove. The wire detent, the detent cavity and the slot provide a positive mechanical stop for each of the switch positions.
Patent TW-434121-B (TW)
Title: Fastener-driving tool having wear guard defining fastener-guiding surface
Inventor: SMOLINSKI DARIUSZ
IPC: B25C1/00
Filed: 1999-10-12
Granted: 2001-05-16
Abstract: A powder actuated fastener setting tool including a receiver for receiving a portion of a barrel reciprocatable therein between extended and retracted positions, and a substantially enclosed exhaust baffle disposed between the receiver and a muzzle of the barrel when the barrel is in the retracted position for baffling exhaust discharged from the tool during operation thereof. The tool also includes a spring member disposed between a cap fixedly coupled axially to a muzzle of the barrel and the receiver for biasing the barrel in the extended position, and means far removing exhaust residue from the powder actuated tool during operation thereof.
Patent TW-448489-B (TW)
Title: Method of manufacturing a semiconductor device in a silicon body, a surface of said silicon body being provided with an alignment grating and an at least partly recessed oxide pattern
Inventor: MULLER CHRISTIAAN JOHAN
IPC: H01L21/027
Filed: 1999-10-29
Granted: 2001-08-01
Abstract: In the known process for manufacturing a semiconductor device, in particular an integrated circuit, in a silicon body, a surface of said silicon body is provided with an alignment grating formed in accordance with a pattern of strips of adjacent elevations and valleys, and with a partially recessed oxide pattern at the location of a semiconductor device by subsequently providing the surface of the silicon body with a masking layer of anti-oxidation material having apertures at the location of the semiconductor device and subjecting the silicon body to an oxidation treatment. The process is simplified considerably by applying the alignment pattern (7) simultaneously with the partially recessed oxide pattern (12) of the semiconductor device (5). For this purpose, the masking layer of anti-oxidation material is applied at the location of the alignment pattern which consists of first wide strips, which are totally free of recessed oxide, and second wide strips, which are each formed by a sub-pattern of relatively narrow strips of anti-oxidation material alternating with relatively narrow apertures, which are smaller than the apertures at the location of the semiconductor device. During the subsequent oxidation treatment, each of the second wide strips is provided with a segmented, partially recessed oxide pattern (14) with a profiled surface. The relatively narrow apertures have a width such that the partially recessed oxide pattern (14) at the location of the alignment pattern (7) is thinner than the partially recessed oxide pattern (12) simultaneously formed at the location of the semiconductor device (5).
Patent TW-472411-B (TW)
Title: Safe device for closed battery and closed battery using said device
Inventor: KAWAMURA HIROAKI
IPC: H01M10/052
Filed: 1999-11-18
Granted: 2002-01-11
Abstract: The present invention provides a safety device for a closed battery capable of preventing a rupture due to a rapid internal pressure rise at over-charging and short-circuiting and being produced inexpensively. A positive electrode lid (16) attached to one end of an outer covering can (11) comprises a pressure receiving plate (18) forming the innermost lid and connected to the positive electrode (13) of a main electrode unit (12) via a positive electrode lead (17), a shielding plate (20) forming a middle lid and electrically connected to the pressure receiving plate (18) via a center contact part (19), and a sealing plate (21) forming the outermost lid and electrically connected to the shielding plate (20). The center contact part (19) is formed of a projection (28) having a first flat contact surface (27) of the pressure receiving plate (18) and a second flat contact surface (29) of the shielding plate (20), and a plurality of annular grooves (31, 33) are alternately provided around the second flat contact surface (29) so as to face each other at 180 DEG intervals. The annular grooves (31, 33) are covered with a metal foil (34) to form valve membranes (35, 36).
Patent TW-454116-B (TW)
Title: Integrated circuit
Inventor: YOSHIDA MEGUMI
IPC: H03K17/22
Filed: 2000-01-18
Granted: 2001-09-11
Abstract: In case that the power source voltage rises fast, the reset signal is set in the low level when the power source is supplied, so that the PMOS transistor T1 is switched ON and the node N1 is shifted to the high level. Because the node N1 is connected to the earth line VSS through the NMOS transistor T2, the NMOS transistor T2 is switched ON when the power source voltage reaches the predetermined value. Thus, by giving a small resistance value to the resistor R1, the node N1 can shift from the high level to the low level without delay, whereby the nodes N2 and N3 are set to the high level, thereby setting the reset signal to the high level. In addition, while the reset signal stays in the high level, the PMOS transistor T1 is switched OFF to cut the current. Consequently, it has become possible to provide an integrated circuit which can save the standby current consumption and at the same time output the reset signal properly in response to the power source voltage at any rising rate.
Patent TW-412620-B (TW)
Title: Linear slide rail with spacer
Inventor: CHIU YUEH-LING
IPC: F16C33/37
Filed: 2000-03-03
Granted: 2000-11-21
Abstract: This invention relates to a linear slide rail with spacer which uses the design of spacer occupying smaller effective space to replace the space ball used in the traditional technology, and has a spacer located between the two adjacent balls of linear rail to separate two adjacent balls to prevent friction and collision of two adjacent balls, so as to greatly reduce the noise and vibration. Furthermore, because the spacer is designed to be column like body and the two end surfaces of the column are designed to be concave curved surfaces to match up the shape of the ball, the spacing distance between two adjacent balls is greatly reduced. Therefore, the effective number of ball is greatly increased when the linear slide rail using spacer, so as to increase the strength of the linear slide rail.
Patent TW-500956-B (TW)
Title: Scanning circuit
Inventor: SATO TETSUSHI
IPC: G09G3/36
Filed: 2000-05-01
Granted: 2002-09-01
Abstract: The subject of the present invention is to provide a kind of scanning circuit capable of stabilizing an operation by enlarging an operation margin relative to a phase shift of a clock signal. The invented scanning circuit relates to the one equipped with a bidirectional shift resister, wherein the operations of transfer gate in a transfer portion and a feedback circuit are controlled by four-phase clocks. A delay circuit 101 for delaying control clocks A, B supplied to the transfer gate 103 of the transfer portion relative to the control clocks C, D supplied to the feedback circuit 104 is installed.
Patent TW-526207-B (TW)
Title: Method of polymerization
Inventor: MCCONVILLE DAVID H
IPC: C08F2/18
Filed: 2000-05-15
Granted: 2003-04-01
Abstract: This invention relates to a composition of matter represented by the formula below, and to a polymerization process comprising combining an olefin in the gas or slurry phase with an activator, a support and a compound represented by the following formula: wherein M is a group 3 to 14 metal, each X is independently an anionic leaving group, n is the oxidation state of M, m is the formal charge of the YZL ligand, Y is a group 15 element, Z is a group 15 element, L is a group 15 or 16 element, R1 and R2 are independently a C1 to C20 hydrocarbon group, a heteroatom containing group, silicon, germanium, tin, lead, phosphorus, a halogen, R1 and R2 may also be interconnected to each other, R3 is absent, or is hydrogen, a group 14 atom containing group, a halogen, a heteroatom containing group, R4 and R5 are independently an aryl group, a substituted aryl group, a cyclic alkyl group, a substituted cyclic alkyl group, or multiple ring system, R6 and R7 are independently absent or hydrogen, halogen, a heteroatom or a hydrocarbyl group, or a heteroatom containing group.
Patent TW-I265929-B (TW)
Title: Triazinyl derivatives for inhibiting the production of IL-12
Inventor: ONO MITSUNORI
IPC: A61P43/00
Filed: 2000-09-18
Granted: 2006-11-11
Abstract: The invention relates to a compound of formula (I) which can inhibit the production of IL-12. Also disclosed is a method of inhibiting IL-12 production by administering to a patient in need thereof an effective amount of a compound of formula (I).
Patent TW-536705-B (TW)
Title: Circuit and method of a pre-erase/erase flash memory array
Inventor: CHEN KOU-SU
IPC: G11C16/34
Filed: 2000-06-23
Granted: 2003-06-11
Abstract: A pre-erase/incremented erase mechanism is employed to reduce excessive tunnel oxide fields in flash memory cells. A variable conditioning signal removes charge from ""fast"" bits in the array, so that they are configured to have threshold voltages closer to an ideal initial state in preparation for an erase cycle. In this manner, the voltage thresholds are tightened and equalized, so that over-erasure problems associated with Fowler-Nordheim tunneling erase operations are substantially reduced, and endurance cycles for the array are maximized. The invention can be used in a device in the field, or as part of a design process for a flash memory cell to evaluate device performance.
Patent TW-451537-B (TW)
Title: System and method for high-speed laser detection of ultrasound
Inventor: DRAKE THOMAS E JR
IPC: H01S3/137
Filed: 2000-06-23
Granted: 2001-08-21
Abstract: A system and method for laser light amplification provides amplification of a laser light beam emitted from a laser light source as low-amplification seed laser light signal. The low-amplification seed laser light signal is transmitted to an amplification component. The amplification component amplifies the low-amplification seed laser light signal by stimulating emissions of the population inversion provided by a pumping diode to generate an amplified laser light signal. The system and method further directs the amplified laser light signal to an output destination. The result of the present invention is a system and method of operation providing higher pulse rates, improved pointing stability, and optionally variable pulse rates for a variety of uses, including for non-destructive laser ultrasonic testing of materials.
Patent TW-503279-B (TW)
Title: Process for the production of elastic bands for the clothing industry
Inventor: SCHUSTER INGEBORG
IPC: D06H7/12
Filed: 2000-07-06
Granted: 2002-09-21
Abstract: The invention relates to a method for the production of elastic bands for utilization in the clothing industry from a web of fabric, especially a web of non-woven fabric, having at least partially synthetic fibers or filaments. According to the above-mentioned method, one or more industrially manufactured webs (1, 2; 16) are folded together and connected to one another by their open edges (3, 4; 5, 6; 18, 19) thereby forming a tube (11). The wall (21) of the tube (11) is cut diagonally so that a new and more elastic webs of fabric (22) that can be cut into bands (25) along longitudinal direction (26) are formed.
Patent TW-475308-B (TW)
Title: Electric connection box
Inventor: SAKAMOTO MASAMI
IPC: H01R9/24
Filed: 2000-07-24
Granted: 2002-02-01
Abstract: An electric connection box in which connection to a wire harness is made by a plurality of sub-wire harnesses composing the wire harness includes: a power supply section; a plurality of sub-wire harness connection plates which are laminated on the power supply section; and a connector section in which a plurality of through connection conductors are inserted into the sub-wire harness connection plates so as to be electrically connected to the electric wires and connected to terminal sections of the power supply section so that a feed circuit is formed.
Patent TW-490645-B (TW)
Title: Alternate display content controller
Inventor: NASON D DAVID
IPC: G09G1/16
Filed: 2000-07-27
Granted: 2002-06-11
Abstract: An alternate display content controller provides a technique for controlling a video display separately from and in addition to the content displayed on the operating system monitor. Where the display is a computer monitor, the alternate display content controller interacts with the computer utility operating system and hardware drivers to control allocation of display space and create and control one or more parallel graphical user interfaces adjacent the operating system desktop. An alternate display content controller may be incorporated in either hardware or software. As software, an alternate display content controller may be an application running on the computer operating system, or may include an operating system kernel of varying complexity ranging from dependent on the utility operating system for hardware system services to a parallel system independent of the utility operating system and capable of supporting dedicated applications. The alternate display content controller may also include content and operating software delivered over the internet or any other LAN. The alternate display content controller may also be included in a television decoder/settop box to permit two or more parallel graphical user interfaces to be displayed simultaneously.
Patent TW-I236376-B (TW)
Title: Topical organic ectoparasiticidal compositions
Inventor: KASSEBAUM JAMES WEB
IPC: A61K47/12
Filed: 2000-08-11
Granted: 2005-07-21
Abstract: This invention provides topical ectoparasiticidal formulations comprising an ectoparasiticide, preferably a pyrethroid or a spinosyn, a spreading agent that is a (C3-C6) branched alkyl (C10-C20) alkanoate, preferably isopropyl myristate, and optionally a miscibilizing agent compatible with organic solvent systems, and methods of controlling an ectoparasite infestation on certain animals comprising topically applying such formulations to the animal.
Patent TW-487878-B (TW)
Title: Method and apparatus for path-based code coverage analysis
Inventor: SAFFORD KEVIN DAVID
IPC: G06F9/44
Filed: 2000-08-24
Granted: 2002-05-21
Abstract: A method (100) and apparatus (500) for path-based computer code coverage analysis are disclosed. The method (100) determines (110, 310) a set of possible paths through a piece of source code (540). The method (100) also identifies (120, 420) one or more paths of actual operation through the source code (540), based on either simulation or execution of the piece of source code (540). Finally, the method (100) compares (130) the one or more paths of actual operation to the set of possible paths. The apparatus (500) comprises a path enumerator module (510), a path extractor module (520) and a comparator (530) connected to the two modules (510, 520). The path enumerator module (510) reads a segment of source code (540) and outputs a list of possible paths (550) through the segment of source code (540). The path extractor module (520) reads one or more trace files (560) produced from operation of the segment of code (540) and produces one or more respective operational paths (580) through the segment of source code (540). The comparator (530) compares the operational paths (580) to the possible paths (550). Corresponding computer software embedded on a computer readable medium is also disclosed.
Patent TW-541447-B (TW)
Title: Editor device and recording medium for storing an editor program
Inventor: MUNEMOTO KENICHI
IPC: G05B19/048
Filed: 2000-08-29
Granted: 2003-07-11
Abstract: The present invention provides an editor device and a recording medium for storing an editor program, for preventing the repetitive input operability for data as in the conventional editor device, and effectively using the database, and easily realizing the data sharing with the external system. The programmable controller 2 controls the control procedures (user program) of the operations for the I/O machine (4), and uses the ladder editor (32a) for the production on the ladder window. In order for the programmable display (1) to display the screen of the status of the I/O machine (4) (user screen), using the screen editor (32b) to produce on the screen production window. For example, when dragging and dropping the symbols onto the screen production window in the ladder graph on the ladder window adjacent to the screen production window, the attribute data associated with the symbols, including the name and address of the I/O machine (4); copying the ladder file (33a) for the registry of the user program to the screen file (33b) for the registry of the user screen; and, displaying the icon corresponding to the attribute data in the screen production window. Thus, it is not necessary to have the common database for registering the attribute data.
Patent TW-538381-B (TW)
Title: Method and circuits for associating a norm to each component of an input pattern presented to a neural network
Inventor: IMBERT DE TREMIOLLES GHISLAIN
IPC: G06N3/063
Filed: 2000-09-11
Granted: 2003-06-21
Abstract: The method and circuits of the present invention aim to associate a norm to each component of an input pattern presented to an input space mapping algorithm based artificial neural network (ANN) during the distance evaluation process. The set of norms, referred to as the ""component"" norms is memorized in specific memorization means in the ANN. In a first embodiment, the ANN is provided with a global memory, common for all the neurons of the ANN, that memorizes all the component norms. For each component of the input pattern, all the neurons perform the elementary (or partial) distance calculation with the corresponding prototype components stored therein during the distance evaluation process using the associated component norm. The distance elementary calculations are then combined using a ""distance"" norm to determine the final distance between the input pattern and the prototypes stored in the neurons. In another embodiment, the set of component norms is memorized in the neurons themselves in the prototype memorization means, so that the global memory is no longer physically necessary. This implementation allows to significantly optimize the consumed silicon area when the ANN is integrated in a silicon chip.
Patent TW-559685-B (TW)
Title: Thin film transistor and fabrication method of the same
Inventor: KATOH TSUYOSHI
IPC: H01L29/423
Filed: 2000-11-14
Granted: 2003-11-01
Abstract: A voltage of a front channel 42 (gate side wiring) of a thin film transistor is made equal to a voltage of a back channel 44 (liquid crystal alignment side) thereof by electrically connecting a gate electrode 2 and a back channel electrode 82 through a gate contact hole 10 to a semiconductor layer 4 constituting the thin film transistor. The thin film transistor is fabricated through four patterning steps by simultaneously etching the semiconductor layer and a transparent electrode by using a photo resist on the front channel.
Patent TW-488195-B (TW)
Title: Precision analyzing method of the drilled hole on printed circuit board
Inventor: WANG GUANG-SHIA
IPC: H05K3/04
Filed: 2000-11-21
Granted: 2002-05-21
Abstract: The present invention provides a precision analyzing method of the drilled hole on printed circuit board, which comprises the following steps: firstly, input the measured data and theoretical data of the drilled hole on printed circuit board, and calculate the related statistical data such as mean value, deviation, standard deviation, capability of accuracy, capability of precision and CpK, etc. Using the measured data and theoretical data; as for demonstration, select the statistical data in their belonged range according to the selection option of hole-drilling knife diameter and the selection option of region, and express it by the vectorial diagram, distribution diagram and archery target diagram, so as to provide a clear analyzing diagram for demonstrating the distribution of drilled hole on the printed circuit board and its deviation and direction of deviation effectively.