baber/WOPTO huggingface dataset:
Patent JP-H02146021-A (JP)
Title: Production of directional coupler type optical switch
Inventor: KOMATSU YOSHIRO
IPC: G02F1/313
Filed: 1988-06-29
Abstract: PURPOSE:To provide the element which is lower in voltage and is less in electric power consumption by implanting ions to increase the resistance of a 2nd clad layer into a 2nd clad layer between two light guides in proximity to each other of the directional coupler. CONSTITUTION:A p<+>-GaAs cap layer 105 and a p-AlGaAs clad layer 104 are etched with a patterned photoresist 120 as a mask and are etched down to the intermediate part of the clad layer 104; thereafter, the patterns 120 are removed. The H<+> ions are then implanted into the remaining clad layer 104 with striped p side metallic electrodes 106a, b as a mask. The implanting energy and does quantity are so selected that the implanted ions do not arrive at the p<->GaAs guide layer 103 and the resistance sufficient for practicable use is obtd. at the time of implantation of the H<+> ions. H<+> implanted regions 105 exist in the parts, exclusive of rib parts, in the p-AlGaAs clad layer 104. The low voltage driving is possible in this way and the electric power consumption is reduced.
Patent JP-H0830435-A (JP)
Title: Priority encoder
Inventor: ISHII YASUHIRO
IPC: G06F7/74
Filed: 1994-07-15
Abstract: PURPOSE:To attain high-speed operation by shortening a discharge time. CONSTITUTION:A carry line 2 consists of series-connected MOSFETs N15-NO. The MOSFETs P15-NO precharge respective nodes 3-15 to 3-0 on receiving a precharge signal/PR. When input signals /D15-/DO turning ON the MOSFETs between one end of the carry line 2 on the high-order bit side and an intermediate node 3-8 are supplied in high-order bit priority specification mode, a control circuit 5a discharges the intermediate node 3-8 separately from the carry line 2. When input signals /D15-/DO turning ON the MOSFETs between one end of the carry line 2 on the low-order bit side and the intermediate node 3-8 are supplied in low-order bit priority specification mode, a control circuit 5b discharges the intermediate node 3-8 separately from the carry line 2.
Patent JP-H06343938-A (JP)
Title: Adhering substance cleaning method and apparatus therefor
Inventor: SHINOZUKA SHUHEI
IPC: H01L21/304
Filed: 1993-06-08
Abstract: PURPOSE:To effectively remove adhered substances which adhere to the surface of an object to be cleaned even if the object has uneven surfacial shape. CONSTITUTION:Adhered substances which adhere to an object to be cleaned 2 are removed by installing a UV rays lamp 5 in a cleaning part 3 in which an object to be cleaned 2 is put, supplying a gas containing ozone for cleaning to the cleaning part 3, and radiating the UV rays radiated from the UV rays lamp 5 to the necessary surface such as the back side 15, the bottom face 16, etc., of the object to be cleaned 2 by an optical fiber 12.
Patent JP-2000353195-A (JP)
Title: Work aiding system
Inventor: MASAE NOBUYUKI
IPC: G06Q50/00
Filed: 1999-06-10
Abstract: PROBLEM TO BE SOLVED: To obtain a work aiding system capable of quickly selecting a substitutive worker directly through the system itself when a worker existing in a working site can not execute succeeding work by some reasons. SOLUTION: In the work aiding system consisting of one or more terminal equipments 1, a work management server 2 provided with a file server 9 storing data concerned with work such as working data and a working schedule, a 2nd control part 10 and a 2nd communication part 11 and plural portable terminals 3(1) to 3(N) and connecting plural portable terminals 3(1) to 3(N) to the 2nd communication part 11, the server 2 finds out data concerned with work which are suited to a work aiding request from a file server 9 at the time of receiving a work aiding request from a 1st worker through a portable terminal, selects a 2nd worker capable of aiding the work from the found data, inquires whether the 2nd worker can aid the work or not, and when the 2nd worker approves the aid of work, transmits the working data to the portable terminal.
Patent JP-H11346208-A (JP)
Title: Noise eliminating device, noise eliminating method and record medium
Inventor: OYA TAKASHI
IPC: H04L7/00
Filed: 1998-05-29
Abstract: PROBLEM TO BE SOLVED: To obtain an output signal from which noise is eliminated by detecting a stable period of input data and applying processing only to the data in the stable period. SOLUTION: Received parallel data are directly fed to an EXNOR 3-n ((n)is an optional natural number) and given to delay blocks 1-n and 2-n, where the data are delayed and then the delayed data are also fed to the EXNOR 3-n. The EXNOR 3-n applies exclusive OR to the parallel data to detect whether or not the data at a point (an) are coincident with the data at a point (cn). An AND 4 executes OR arithmetic operation for detection results, detects whether or not the parallel data are all coincident, and this detected result is fed to a decoder 5. The decoder 5 conducts decode processing only when all the parallel data are coincident based on the detection result of the AND 4.
Patent JP-S6054963-A (JP)
Inventor: NIWA HIROSHI
IPC: C04B35/632
Filed: 1983-09-07
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S5788023-A (JP)
Title: Removing method for phosphorus, sulfur and silicon in refining slag containing alkali metallic compound
Inventor: YAMASHITA YUU
IPC: C01D7/00
Filed: 1980-11-25
Abstract: PURPOSE: To efficiently conduct the titled removal and to recover a high quality alkali metal by adding quick lime or the like to a soln. extracted from refining slag contg. an alkali metallic compound to make P, S and Si difficultly soluble and by filtering them off.  
     CONSTITUTION: Slag produced when molten iron is refined with an alkali metallic compound is crushed, and the crushed slag (a) is fed to an extraction vessel 1, where extraction is carried out with a satd. soln. of sodium hydrogencarbonat (b) and a refluxing soln. (c) which is part of a filtrate separated from a filter 3. At this time, a synthetic gas (d) contg. CO 2 , O 2  and N 2  is blown to adjust the pH. A slurry prepared by the extraction is fed from the vessel 1 to a vessel 4 for removing P, S and Si, quick lime or slaked lime is added as a removing agent (e), and a similar gas (d) is blown to adjust the pH. Thus, P, S and Si in the slag (a) are made difficultly or slightly soluble and filtered off which the filter 3 together with undissolved residue, and a high quality extracted soln. is recovered. 
     COPYRIGHT: (C)1982,JPO&Japio
Patent JP-H065727-A (JP)
Title: Package for containing semiconductor element
Inventor: ITO YOSHIAKI
IPC: H01L23/10
Filed: 1992-06-23
Abstract: PURPOSE:To normally and stably operate a semiconductor element for a long period by completing hermetical seal of the element and effectively preventing the element from becoming a high temperature. CONSTITUTION:A package for containing a semiconductor element 3 airtightly contains the element 3 therein by interposing outer lead terminals 7 between an insulating base 1 and a cover 3 and connecting the base 1 to the cover 2 and the terminals 7 with glass members 5, 6. Here, the base 1 and the cover 2 are formed of an aluminum nitride sintered material, and the members 5, 6 are formed of glass which contains glass content containing 20.0 to 50.0wt.% of lead oxide, 3.0 to 13.0wt.% of aluminum oxide, 1.0 to 5.0wt.% of silicon oxide, 3.0 to 13.0wt.% of boron oxide, 30.0 to 50.0wt.% of willemite as filler, and 10.0 to 30.0wt.% of lead titanate series compound.
Patent JP-H0720593-A (JP)
Title: Silver halide photographic sensitive material
Inventor: YAMASHITA YASUSHI
IPC: G03C1/30
Filed: 1993-07-02
Abstract: PURPOSE:To provide a silver halide photosensitive material having excellent drying property and fixing property. CONSTITUTION:In the silver halide photographic sensitive material having at least one silver halide emulsion layer on a supporting body, a hydrophilic colloid layer contains >=50wt.% gelatine having 6-8 isoelectric point. Further, the film curing rate (melting time) is >=50min.
Patent JP-S5788384-A (JP)
Title: Assigning device for specific date in weekly program timer
Inventor: NISHIWAKI YORIO
IPC: G04G15/00
Filed: 1980-11-22
Abstract: PURPOSE:To change time announcement set programs by providing interchangeability to the time set program falling under the specific date when it is between Sunday-Saturday and the time announcement set program of the other date. CONSTITUTION:The days of the week falling on holidays are set by a digital switch 11. The outputs of a day of the week counter 10 and a digital switch 11 are compared 12, and when they coincide, a flip-flop 13 is set. By the output of the flip-flop 13, monostable multivibrators 14, 16-20 are triggered successively, and a timer 1 is so set by a switching circuit 22 as to execute the time announcement set program of Sundays. The flip-flop 23 is reset by the 1-minutes signal from the timer 1 in one minute after there are no more outputs of the comparator 12, and the ordinary time announcement set program is executed since the time when it is 12 o'clock 01 minute AM.
Patent JP-S6326972-A (JP)
Title: Wire holder
Inventor: UDO ZAIDERU
IPC: H01R43/01
Filed: 1987-07-01
Abstract: A wire holding device (5) for locating wires in an electrical connector (3), comprising at least one passageway (25) into which a connection wire (43) to be held can be moved essentially normally of its length through an outwardly enlarging entrance slot (33) toward a closed end (39) of the passageway (25). A first barb (35) adapted to be resiliently urged aside by a wire (43) upon the introduction thereof extends from a sidewall of the passageway adjacent the entrance slot. A second barb (37) extends from the sidewall opposite the first barb (35) and is adapted to be resiliently urged aside by the wire (43) upon the introduction thereof, the free end of the second barb (37), together with the closed end (39) of the passageway partitioning off a partial passageway.
Patent JP-S6225475-A (JP)
Title: Electrostrictive effect element and manufacture thereof
Inventor: YOSHIDA KAZUNORI
IPC: H01L41/083
Filed: 1985-07-25
Abstract: PURPOSE:To facilitate a manufacture of an electrostrictive effect element by forming an insulating layer in the same surface as an inner electrode layer in case of alternately laminating an electrostrictive material layer and an inner electrode layer to eliminate an insulating material of the side perpendicular to the inner electrode surface after laminating. CONSTITUTION:An inner electrode layer 32 of Pt is formed on an electrostrictive layer 31 which mainly contains Pb(Mg1/3Nb2/3)O. Part of the layer 32 is cut in parallel to form by printing insulators 33a, 33b of ZrO2. Then, the insulators 33a, 33b are alternately disposed reversely at every other step on the layer 31, and the layer 31, and the layer 32 is laminated. After a thermal pressing, it is sintered at 1,250 deg.C, cut at the prescribed position, Pt paste is coated on the exposed parts of the insulators 33a, 33b, dried to form conductive layers 34a, 34b, similar conductive layers 35, 36 are formed on the upper and lower surfaces of the laminate and connected with the layer 34. When a voltage is applied between external terminals 50 and 51, a voltage is applied to the inner electrode layer through the electrodes 35, 36.
Patent JP-H04362636-A (JP)
Title: Silver halide color photographic sensitive material
Inventor: BANDO SHINSUKE
IPC: G03C1/485
Filed: 1991-06-11
Abstract: PURPOSE:To provide a color reversal photographic sensitive material having high sensitivity, a considrable rise of the sensitivity by high speed development and excellent graininess. CONSTITUTION:The silver halide color photographic sensitive material has at least two silver halide emulsion layers having the practically same color sensitivity and different sensitivities on the base, contains surface-fogged and/or internally fogged silver halide particles in one of the silver halide emulsion layers having lower sensitivity and has a nonphotosensitive middle layer contg. gelatin between the silver halide emulsion layers in an adjacent state.
Patent JP-H05337721-A (JP)
Title: End mill
Inventor: SASAKI KAZUYOSHI
IPC: B23C5/10
Filed: 1992-06-01
Abstract: PURPOSE:To secure an end mill which is suitable for high speed cutting and rapid feed cutting by setting a rake angle of a peripheral cutting edge in the axial perpendicular section of a cutting part down to more than -30 deg. and less than 0 deg., respectively, while setting a helix angle to a range of 45-60 deg., and as for the form of an end mill at bottom view, setting the rake angle to more than -30 deg. and less than 0 deg., respectively, and installing flat width there. CONSTITUTION:In an end mill formed with plural cutting edge with each twist on the circumference of a tool body, a rake angle of a peripheral cutting edge in the axial perpendicular section of a cutting part is set down to more than --30% and less than 0 deg., respectively, while a helix angle theta a is set to a range of 45-60 deg., and as for the form of an end mill at bottom view, another rake angle thetab' is more than -30% and less than 0 deg., respectively, and then flat width (w) is installed. In addition, in order to improve the discharge of chips, depth of a chip pocket is set to 5-15% of a mill diameter, if desirable, further this flat width is set to 2-3mm. With this constitution, high speed cutting, rapid feed cutting and chip controllability are all heightened.
Patent JP-H10338123-A (JP)
Title: Braking device for rolling stock
Inventor: KITAGAWA YOSHIHIRO
IPC: B61H13/00
Filed: 1997-06-06
Abstract: PROBLEM TO BE SOLVED: To provide a braking device that does not impede the operation of an electric car nor impair safety even in case of a failure occurring to a control part. SOLUTION: In case of a failure occurring to the control part 12 of a brake operating device 1 during power running or coasting of an electric car, a brake command pressure signal is maintained by a constant current output part 15 provided separately from a normal output part 13. A brake release state is therefore maintained, and when a normal brake command is outputted afterwards, the output of the constant current output part 15 is turned off to apply an emergency brake.
Patent JP-S5952875-A (JP)
Title: Gate turn off thyristor
Inventor: YAMAGAMI KOUZOU
IPC: H01L29/744
Filed: 1982-09-20
Abstract: PURPOSE:To obtain the gate turn off thyristor having a high degree of turn-off efficiency and a short turn-off time by a method wherein the thickness of the second part of the NE layer, whereon a cathode metalized electrode for leading out an external electrode, is formed thinner than that of the first part of the pectinated NE layer whereon an effective cathode metalized electrode is formed. CONSTITUTION:The thickness X2 of the NE layer 104a located below a cathode me talized electrode 107b, which is used for lead connection for electrode lead out to outside, is formed thinner than the X1 of the NE layer 104 located below an effective cathode metalized electrode 107a, and a thyristor structure in which a current is hardly conducted in the cathode region other than the effective cathode electrode 107a is formed. In the gate turn off thyristor, as the NE layer 104a is thinly formed, the ratio of the electrode density of the NE layer 104a on the junction J3 having the thickness X2 and the hole density is made smaller even when a short-circuit layer is formed on the NE layer 104a by the metalized electrode layer 107b through the pin hole and the defect located in an insulating film 110, thereby enabling to constitute a hardly conductive thyristor part as compared with the thyristor part located below the effective cathode metalized electrode part 107a. Accordingly, this gate turn off thyristor has the structure wherein a current is hardly conducted and an OFF state is easily obtained through a short-circuit part 107c.
Patent JP-H1115983-A (JP)
Title: Plotting processor
Inventor: HAYASHI KAZUTAKA
IPC: G06T11/00
Filed: 1997-06-23
Abstract: PROBLEM TO BE SOLVED: To provide a plotting processor capable of operating more high-speed parallel processing by dynamically changing a processing area to be executed by plural plotting processing according to different reference values. SOLUTION: A division reference managing means 70 has a division reference value for deciding the processing area of plotting data to be assigned to plural processing means which executes the processing of the plotting data. The division reference managing means 70 has plural different reference values, and uses the different reference values according to the level of the progress of the processing, and for example, selects a reference value for making a division area small, and deciding a processing area in the last stage of the processing. Thus, even when plural plotting objects are present in an area assigned to the last stage of the processing, the processing can be prevented from being biased to a specific processing means, and a high speed plotting processing can be attained.
Patent JP-S6324323-A (JP)
Title: Image display device
Inventor: KOMATSU KENICHI
IPC: G06F3/153
Filed: 1986-07-16
Abstract: PURPOSE:To improve S/N of a still image, and to execute an image display having a high quality by superposing a noise on an image data read out of a display memory extending over plural times, and displaying it. CONSTITUTION:A subtraction processing between images in image memories 1, 2 is executed by a subtracter 3, and the result of subtraction is written in a display memory 4. Subsequently, when a freeze signal is inputted from a switch 9, the updating of the stored contents of the memory is discontinued, and the same image is read out repeatedly from the memory 4. This read-out image data is supplied to a superposing means 5, and a noise is superposed. Next, the image data on which noises are superposed is sent out to a display 8 through a window level converter 6, and a D/A converter 7, and a still image display is executed.
Patent JP-S5688345-A (JP)
Title: Semiconductor device
Inventor: SANO YUUJI
IPC: H01L23/495
Filed: 1979-12-21
Abstract: PURPOSE:To simplify the connecting work of the semiconductor device by inserting the end of the outer lead wire of the upper semicouductor device into the hole of the outer lead wire base, superposing them and connecting them. CONSTITUTION:A hole 17 is opened at the base of the outer lead wire 13, and the end of the outer lead wire of other semiconductor device is inserted into the hole 17. That is, when the end 15A of the lead wire 13A of the upper semiconductor device 10A is press-fitted into the hole 17 of the lead wire 13 of the lower semiconductor device 10, the end 15A of the lead wire can be elastically brought into contact with the inner surface of the lead wire 13 and can also be connected thereto, and thus soldering can be omitted. In case of soldering or welding, the work can become easy.
Patent JP-H0829259-A (JP)
Title: Lightness measuring apparatus
Inventor: NAKAGAWA ATSUKIMI
IPC: G01J3/52
Filed: 1994-07-18
Abstract: PURPOSE:To obtain a lightness measuring apparatus by which an illuminance measurement is performed simply, with good reproducibility and with high accuracy by a method wherein a plurality of standard color charts whose Munsell values are known are installed integrally with a lens body on the passage route of reflected light and the standard color charts together with an object to be measured are ifradiated with light from a light source. CONSTITUTION:In a video microscope 30, an object 10 to be measured is irradiated with light 12 from a light source 14 at the inside, and a beam of reflected light 16 is collected by a lens body 18 for the video microscope 30. At this time, respective standard color charts 24a to 24c are irradiated with the light 12 from the light source 14, and a beam of reflected light 16a is reflected inside the lens body 18 so as to be collected. The collected beams of reflected light 16, 16a are simultaneously incident on an imaging camera 20, and the imaging camera 20 converts the beams of reflected light 16, 16a into an image signal. The converted image signal is stored in a video storage system 32 so as to be taken into a microcomputer 28. The microcomputer 28 computes the Munsell value of the object 10, to be measured, on the basis of Munsell values of the standard color charts 24a to 24c, and the lightness of the object to be measured is found.
Patent JP-S5688750-A (JP)
Title: Production of boiled japanese radish
Inventor: NAKASHIMA ZENJI
IPC: A23B7/10
Filed: 1979-12-21
Abstract: PURPOSE: Japanese radish is treated with a hot acetic acid solution and a calcium salt solution, tightly sealed and heat treated to produce boild Japanese radish that is used as a ingredient for Japanese hotchpotch or the like.  
     CONSTITUTION: Japanese radish washed with water is, as it is or cut into appropriate sizes, immersed in almost the same volume of 0.1W0.5% hot acetic acid solution at 95W97°C for about 30sec and washed with water. The immersed radish is cut into appropritely sized pieces, which are immersed in a 0.025W0.065% calcium salt solution such as calcium lactate or chloride for 30W60min to effect blanching. Then, dipped radish is washed with water, included in a tightly sealable vessel and adjusted in pH to 4.3W5.2 by addition of a solution containing phosphoric acid. The vessel is tightly sealed and sterilized by heating at 105W110°C under pressure for a short time. 
     COPYRIGHT: (C)1981,JPO&Japio
Patent JP-S649643-A (JP)
Title: Substrate on which transfer bump be formed
Inventor: KAWAKITA TETSUO
IPC: H01L21/60
Filed: 1987-07-02
Abstract: PURPOSE:To form a bump which can be transferred easily by a method wherein a wiring operation is conducted using the same conductive film so that all the formed conductive films become conductive, and these conductive films are formed in structure in which all of them are buried in the surface of an insulated substrate. CONSTITUTION:A glass substrate 1, on which an ITO film 3 is buried in a pattern, is formed in such a manner that all of the parts corresponding to the electrode of a semiconductor element are conductive. Then, all the sections other than the part corresponded to the electrode of the semiconductor element on the ITO film 3 is covered by a resist 3. Using the substrate formed as above, a bump 4 is formed only on the part corresponded to the electrode of the semiconductor element only on the part corresponded to the electrode of the semiconductor element by electrolytic plating. As a result, cracks and pinholes are not generated on the mask for plating on the stepping of the insulating substrate 1 and the ITO film 3, and the adhesion of plating on the unnecessary part can be prevented. All the current applied can be used for formation of a bump by the prevention of plating on the unnecessary part as above-mentioned. As a result, the current density when the plating is conducted can be controlled easily, the bump is easily exforiated from the bump-forming substrate. In other words, the bump which is easily transferred to the side of a lead can be formed easily.