Patent SG-11201907570Q-A (SG)
Title: Power multiplexing with an active load
Inventor: Pant Harshat
IPC: H02J1/08
Filed: 2018-02-07
Abstract: • Head Switch 128 Load Power Rail (PRL) 7 -106 Load N —E Voltage .. (VL) , 116 Voltage Controller 122 PMIC 124 • Voltages I Power Distribution • Network n • 1Q Second ▪ Voltage .., : (V2) 114 First t . Voltage (V1) n First Power Rail (PR1) 7 -102 Second Power Rail (PR2) 7 -104 Power-Mux Tile 110-1 Power-Mux Tile 110-2 Power-Mux Tile 110-3 Circuit Load Intrinsic Capacitance 118 108 100— ) FIG. 1 (12) INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY (PCT) (19) World Intellectual Property Organization International Bureau (43) International Publication Date 04 October 2018 (04.10.2018) WIPO I PCT IiiimmounnonolomonololimuliflovoimIE (10) International Publication Number WO 2018/182855 Al (51) International Patent Classification: HO2J 1/08 (2006.01) HO2J 1/10 (2006.01) (21) International Application Number: PCT/US2018/017281 (22) International Filing Date: 07 February 2018 (07.02.2018) (25) Filing Language: English (26) Publication Language: English (30) Priority Data: 15/471,692 28 March 2017 (28.03.2017) US (71) Applicant: QUALCOMM INCORPORATED [US/US]; 5775 Morehouse Drive, QUALCOMM Incorporated, AT- TN: International IP Administration, San Diego, California 92121-1714 (US). (72) Inventors: PANT, Harshat; 5775 Morehouse Drive, c/ o Qualcomm Incorporated, San Diego, California 92121 (US). JAIN, Rajeev; 5775 Morehouse Drive, c/o Qual- comm Incorporated, San Diego, California 92121 (US). SHAHROKHINIA, Sassan; 5775 Morehouse Drive, c/ o Qualcomm Incorporated, San Diego, California 92121 (US). HO, Lam; 5775 Morehouse Drive, c/o Qulacomm In- corporated, San Diego, California 92121 (US). (74) Agent: SAUNDERS, Keith W.; 291 E. Shore Drive, Suite 200, Boise, Idaho 83616 (US). (81) Designated States (unless otherwise indicated, for every kind of national protection available): AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, — (54) Title: POWER MULTIPLEXING WITH AN ACTIVE LOAD 00 00 00 O O (57) : An integrated circuit is disclosed for power multiplexing with an active load. In an example aspect, the integrated circuit includes a first power rail, a second power rail, a load power rail, multiple power-multiplexer tiles, and power-multiplexer control circuitry. The first power rail is at a first voltage, and the second power rail is at a second voltage. The multiple power-multiplexer tiles are coupled in series in a chained arrangement and jointly perform a power-multiplexing operation responsive to a power-rail switching signal. Each power multiplexer tile switches between coupling the load power rail to the first power rail and the second power rail. The power-multiplexer control circuitry is coupled to the first and second power rails and includes a comparator to produce a relative voltage signal based on the first and second voltages. The power-multiplexer control circuitry generates the power-rail switching signal based on the relative voltage signal. [Continued on next page] WO 2018/182855 Al MIDEDIM11110111101111101111111111111111010111N110111110111111111111 SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW. (84) Designated States (unless otherwise indicated, for every kind of regional protection available): ARIPO (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW), Eurasian (AM, AZ, BY, KG, KZ, RU, TJ, TM), European (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR), OAPI (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG). Declarations under Rule 4.17: as to applicant's entitlement to apply for and be granted a patent (Rule 4.17(11)) as to the applicant's entitlement to claim the priority of the earlier application (Rule 4.17(iii)) Published: — with international search report (Art. 21(3))