baber/WOPTO huggingface dataset:
Patent JP-2002281769-A (JP)
Title: Ultrasonic motor drive control apparatus
Inventor: KATO TETSUAKI
IPC: H02N2/00
Filed: 2002-01-09
Abstract: PROBLEM TO BE SOLVED: To provide an ultrasonic motor drive control apparatus that can quickly activate and stably drive an ultrasonic motor even if a resonance frequency is varied. SOLUTION: The ultrasonic motor drive control apparatus has the ultrasonic motor, a driving control means for activating the ultrasonic motor by changing a drive frequency in the ultrasonic motor from an initial one, an operation means for calculating initial drive frequency data based on the drive frequency when the rotation of the ultrasonic motor is started, and a setting means for setting the initial drive frequency when the ultrasonic motor is to be activated next time based on the calculated initial driving frequency data.
Patent JP-2003203062-A (JP)
Title: Shared memory control method for real time processing, and program for executing the same
Inventor: KUNO TAKUMI
IPC: G06F15/17
Filed: 2002-01-09
Abstract: <P>PROBLEM TO BE SOLVED: To control a shared memory to minimize a waiting time in accompany with reading the data by estimating the time lag between a write-side data and a read-side data.  <P>SOLUTION: A single data write processing modules writes the real time data in a shared memory, and its contents are read out by a plurality of data readout processing modules through a communication network. A write-side shared memory control module adjusts a value of monotone increase variable to perform the exclusive control and the version control of the write real time data. The read-side shared memory control module comprises a shared data copying memory having at least three memory areas. A shared data copying memory update control means assigns the memory areas rewritten by a read-side communication network interface on the basis of a value of the monotone increase variable read out through the communication network. A shared data copying memory reference control means assigns the memory areas referred by the data read processing module.  <P>COPYRIGHT: (C)2003,JPO
Patent JP-2003208587-A (JP)
Title: Noncontact ic package
Inventor: OOUME SATOSHI
IPC: B42D15/10
Filed: 2002-01-11
Abstract: <P>PROBLEM TO BE SOLVED: To provide a coil antenna stably without causing a drop in coil winding work efficiency, a separation of a coil and the like, and provide an IC chip package that uses the coil antenna.  <P>SOLUTION: The noncontact IC package incorporates electronic parts including an IC chip and the coil antenna. At least as a part of that portion of a core member 3 wound with an antenna wire 5 which is in contact with the antenna wire, a middle sheet 3c has an adhesive property to the antenna wire 5 to fix the antenna wire, so that the coil winding is stabilized.  <P>COPYRIGHT: (C)2003,JPO
Patent JP-2003207630-A (JP)
Title: Elliptically polarizing plate and liquid crystal display device using the same
Inventor: KAWASAKI HIROSHI
IPC: G02B5/30
Filed: 2002-01-11
Abstract: <P>PROBLEM TO BE SOLVED: To provide an elliptically polarizing plate which widens a viewing angle (in particular a viewing angle toward a downward direction) without increasing thickness of a liquid crystal panel, realizes a liquid crystal display device scarcely generating lowering of contrast caused by viewing angle variation, gray scale reversal or black and white reversal and hue variation and further is excellent in durability (maintaining a polarization degree of a polarizing element).  <P>SOLUTION: In the elliptically polarizing plate provided with an optically compensating sheet consisting of an optically anisotropic layer formed of a transparent supporting body and a liquid crystalline compound, the polarizing element and a light scattering layer, moisture permeability of the optically compensating sheet is in the range of 100-1,000 g/m<SP>2</SP>/24 hr and the light scattering layer is a layer comprising a translucent resin in which a translucent diffusing agent with a refractive index different from that of the resin is dispersed.  <P>COPYRIGHT: (C)2003,JPO
Patent JP-2003204953-A (JP)
Title: Gait pattern classification display
Inventor: SUDO KYOKO
IPC: A61B5/11
Filed: 2002-01-16
Abstract: <P>PROBLEM TO BE SOLVED: To make an examinee get an image of his peculiar way of walking.  <P>SOLUTION: A pair of a gait pattern showing a walking pattern and a gait parameter is stored in a database 17. By comparing a gait parameter of an examinee based on an actual measurement with the gait parameter in the database, a gait pattern close to an actual gait pattern of the examinee is retrieved from the database and a graphic of the gait pattern is displayed. On the occasion of gait guidance, when a parameter that can intentionally be converted is inputted as a gait parameter, it is reflected on the graphic display, and a graphic is displayed on the basis of a corrected gait pattern.  <P>COPYRIGHT: (C)2003,JPO
Patent JP-2003205870-A (JP)
Title: Floor structure for automobile
Inventor: HAMADA YUKIHIRO
IPC: B60K17/24
Filed: 2002-01-16
Abstract: <P>PROBLEM TO BE SOLVED: To provide a floor structure for an automobile capable of reducing a cost, reducing weight, and preventing easy bending of a center bearing mount bracket even when a load is inputted from the side such as in side impact.  <P>SOLUTION: A center bearing 13 is held by the center bearing mount bracket 14, and arrangement position of the center bearing mount bracket 14 in a fore and aft direction and support position of third cross members 5 and 6 in the fore and aft direction are substantially matched.  <P>COPYRIGHT: (C)2003,JPO
Patent JP-2003215175-A (JP)
Title: Circuit for detecting current
Inventor: YAMANAKA YUJI
IPC: G01R19/165
Filed: 2002-01-17
Abstract: <P>PROBLEM TO BE SOLVED: To provide a current detecting circuit that has a simple circuit constitution, and can remarkably be reduced in the number of circuit elements.  <P>SOLUTION: This circuit has third and fourth transistors Q9, Q10 operated to bring the ratio of a collector current flowing in the first transistor Q7 based on an input terminal side potential in a detecting resistor RLS to a collector current flowing in the second transistor Q8 based on an output terminal side potential in the detecting resistor RLS into a prescribed ratio, the sixth transistor Q12 for making a collector current based on a collector current of the fifth transistor Q11 for supplying a collector current of the fourth transistor Q9 flow, and the seventh transistor Q13 for changing a current detection output by switching between ON and OFF when a collector current of the sixth transistor Q12 exceeds a prescribed value. A current flowing in the detecting resistor RLS is accurately detected thereby, and the circuit constitution is remarkably simplified thereby to be able to reduce the number of the circuit elements.  <P>COPYRIGHT: (C)2003,JPO
Patent JP-2003216688-A (JP)
Title: Existing building assessment and evaluation method, and reuse building assessment check sheet
Inventor: YAMAZAKI MASATO
IPC: G06Q50/10
Filed: 2002-01-17
Abstract: <P>PROBLEM TO BE SOLVED: To reuse an existing building.  <P>SOLUTION: In an existing building evaluation method in which an existing building is assessed to evaluate if the building is reusable, the existing building evaluated reusable is carried to a production factory, and remodeled and repaired so as to be re-built as a new building, and the existing building evaluated non-reusable is demolished, the superannuation level as the present situation of the existing building is assessed while confirming the superannuation level at site irrespective of the actual age and the dwelling specification. The preset parts are assessed by a bad-mark system, and the existing building is evaluated according to the total assessed point into multiple stages so that the building is reusable when the superannuation level is 'zero', reusable when the superannuation level is 'low', reusable when the superannuation level is 'medium', and non-reusable when the superannuation level is 'high'.  <P>COPYRIGHT: (C)2003,JPO
Patent JP-2003218699-A (JP)
Title: Switching signal generator, and switching power source and digital amplifier equipped with the same
Inventor: MITAMURA ATSUSHI
IPC: H03M3/04
Filed: 2002-01-18
Abstract: <P>PROBLEM TO BE SOLVED: To provide a switching signal generator which has its output noise peak decreased and its quantization error reduced and generates an excellent switching signal whose output contains no dither signal.  <P>SOLUTION: The switching signal generator which converts an input signal into a binary switching signal according to a clock is provided with a signal generator 12. A dither signal is added to the input signal and the resulting signal is inputted to the signal generator 12. A clock signal whose frequency varies with the amplitude of the dither signal is inputted to the signal generator 12 so that the dither of the addition signal and the dither of the clock signal cancel each other. Thus, in the switching signal generator, the two dithers mutually cancel their components to generate no noise peak.  <P>COPYRIGHT: (C)2003,JPO
Patent JP-2003214508-A (JP)
Title: Belt tension adjusting device
Inventor: HAYASHI TAKUMI
IPC: C08L27/12
Filed: 2002-01-18
Abstract: <P>PROBLEM TO BE SOLVED: To provide a belt tension adjusting device which has a sliding surface with a small amount of abrasion, supports a fulcrum shaft without causing seizure even if the sliding surface thereof becomes high in temperature by an engine heat, and also has a long service life by adopting a plain bearing with high fretting abrasion resistance.  <P>SOLUTION: In this belt tension adjusting device, a pulley arm 4 is rotatably attached to a fixed fulcrum shaft 1 via a slide bearing 3, a tension pulley 7 for engaging a belt is attached to one end of the pulley arm, a piston rod 9 of a damper 8 is brought into contact with the other end of the pulley arm, and the tension pulley 7 is pressed against the belt with the depressing force of the piston rod. The slide bearing 3 of the supporting shaft is constituted of a lubricating layer including a sliding surface including aromatic series polyamide pulp and fluororesin.  <P>COPYRIGHT: (C)2003,JPO
Patent JP-2003212354-A (JP)
Title: Unloader
Inventor: KANDA YOSHIMITSU
IPC: B65G69/18
Filed: 2002-01-21
Abstract: <P>PROBLEM TO BE SOLVED: To enhance a dust collection effect by effectively restraining dust scattering.  <P>SOLUTION: The unloader 1 comprises a hopper 10 for taking and storing inside thereof coal, lime, quarz sand, wheat and the like from an inlet part to discharge them. In this unloader, gas is sucked from the inside of the hopper 10 by a gas suction means to form an air flow flowing toward inside from the inlet part of the hopper. A flow passage of the gas is restricted at the inlet part or the inside of the hopper by a restriction part 12, and back flow of the dust from a downstream side is thereby prevented from scattering the dust from the inlet part of the hopper 10 to a outside.  <P>COPYRIGHT: (C)2003,JPO
Patent JP-2003216599-A (JP)
Title: Scaling method for paired comparison and n number amount deciding method
Inventor: NOGUCHI TAKASHI
IPC: G06F17/18
Filed: 2002-01-22
Abstract: <P>PROBLEM TO BE SOLVED: To make a rank by an inter-sample distance obtained by a paired comparison coincide with a rank by a stimulus value, and to determine the number of examinees of a paired comparison evaluation without depending on a specified statistical hypothesis.  <P>SOLUTION: The paired comparison evaluation is performed for each pair of samples in a plurality of samples by referring to each inter-sample distance by a plurality of examinees. An inter-sample rank is determined so that all the upper triangle components of a matrix having the inter-sample distances as components may be positive and all the lower triangle components are negative. The adjacent inter-sample distances are successively added to scale the samples. By depending on whether or not the inter-sample rank can be uniquely fixed so that all the upper triangle components of the matrix may be positive and all the lower triangle components may be negative, whether the number N of the examinees is sufficiently secured or whether the N of the examinees is still insufficient is decided.  <P>COPYRIGHT: (C)2003,JPO
Patent JP-2003016719-A (JP)
Title: Carriage ejection mechanism and carriage locking mechanism
Inventor: KIDO KUNIO
IPC: G11B17/04
Filed: 2002-01-22
Abstract: PROBLEM TO BE SOLVED: To confirm all disks at a time. SOLUTION: The carriage ejection mechanism is provided with a drawer 4 which reciprocates between a stock position 1 and an ejection position 2, and a plurality of carriages 6 for placing disks 5 housed in the drawer 4 the carriages 6 are ejected in the state where they are successively shifted in a staircase pattern with the ejection operation of the drawer 4.
Patent JP-2003216016-A (JP)
Title: Device for aiding evaluation of operation training
Inventor: YAGUCHI KATSUJI
IPC: G09B9/00
Filed: 2002-01-23
Abstract: <P>PROBLEM TO BE SOLVED: To provide an operation training evaluation aiding device capable of correctly evaluating trainee's operation contents independently of a training event during operation training using a simulator.  <P>SOLUTION: An operation evaluation device inputs the operation data of the simulator for simulating a plant and the process data of the plant simulated by the simulator and extracts an operation error on the basis of an operation evaluation knowledge database. A set time calculation device previously calculates the set value of evaluation time of evaluation logic using operation time in operation evaluation knowledge as an evaluation reference on the basis of training data or model training data stored in a simulator data storage part and stores the set time in a set time database. An evaluation time setting device sets up the evaluation time set value stored in the set time database in the evaluation logic using the operation time in the operation evaluation knowledge as the evaluation reference.  <P>COPYRIGHT: (C)2003,JPO
Patent JP-2003214413-A (JP)
Title: Lock pin, manufacturing method for lock pin and sealing structure using lock pin
Inventor: GOTO HIRONORI
IPC: F16B19/02
Filed: 2002-01-23
Abstract: <P>PROBLEM TO BE SOLVED: To easily and quickly perform a sealing work by only a simple, small and light structure, to surely discover a malfeasant door opening by leaving traces of the door opening clearly to inhibit repairing of the traces and to perform a right door opening work without destroying and cutting a case for storing a control board of a game machine, etc., as a sealing means for the case.  <P>SOLUTION: This lock pin 10 is provided with a head part 11 having a groove 11a to which a distal end of a tool is engaged, a shaft part 12 continuous integrally with the head part 11, a square angular pin part 13 continuous integrally with the shaft part 12, a tapered twisting and cutting part 12a formed on the shaft part 12, and a capsule incorporated from the shaft part 12 over the twisting and cutting part 12a and the angular pin part 13. By fastening the head part 11 by the tool in a state of the angular pin part 13 non-rotatably held and fitted by the case, etc., the twisting and cutting part 12a is twisted and cut, the incorporated capsule is cut, and paint within the capsule is made to flow.  <P>COPYRIGHT: (C)2003,JPO
Patent JP-2002334071-A (JP)
Title: Text compression intelligent as language
Inventor: CORSTON-OLIVER SIMON H
IPC: G06F40/00
Filed: 2002-01-28
Abstract: PROBLEM TO BE SOLVED: To provide text compression of an intelligent type in terms of language. SOLUTION: A text processor processes a text in a message. The processor generates a plurality of compression types of message constitutional elements. The processor obtains language outputs indicating language constitutional elements in the text by executing the language analysis of the text. Then the processor generates a plurality of compression types allowed to be used for compressing the text. These compression types are generated on the basis of the language outputs.
Patent JP-2003223220-A (JP)
Title: Electromagnetic suspension apparatus
Inventor: AKAMI YUSUKE
IPC: G05B23/02
Filed: 2002-01-31
Abstract: <P>PROBLEM TO BE SOLVED: To provide an electromagnetic suspension apparatus capable of developing a damping force with a motor, when it is impossible to control the electromagnetic suspension apparatus due to cable disconnection or the like (when there is no control).  <P>SOLUTION: When a disconnection of a power cable 81 is detected, a relay control signal is turned off to close a first and second relays 65, 66, and short- circuit a U-phase coil, V-phase coil and W-phase coil via the first and second relays 65, 66. Consequently, when a suspension unit strokes, the motor 3 arranged in the suspension unit operates as a generator, and the resistance of the magnitude being substantially proportional to a stroke speed, that is the damping force, is developed.  <P>COPYRIGHT: (C)2003,JPO
Patent JP-2003228480-A (JP)
Title: Interface device for image display device of pachinko game machine
Inventor: SHITANI TAKESHI
IPC: G06F13/36
Filed: 2002-02-01
Abstract: <P>PROBLEM TO BE SOLVED: To provide an interface device for an display device of a pachinko game machine in which data is transferred in high-speed using a low-speed CPU and various images can be drawn thereby.  <P>SOLUTION: An interface device 3 interfaces a CPU 4 with a circuit for a display 7 having a data bus width larger than the data bus width of this CPU. The interface device 3 comprises; an address register 10 to designate a write address A1 to write data on the circuit for the display 7 from the CPU; a write register 20 to store a write data D1 temporarily to write the data on the address for the circuit for the display 7 designated by the address register 10; a write signal generation part 12 to generate a write signal 11 for directing a write instruction to write data D1 to the circuit for the display 7 when the data D1 is written into the write register 20; and an address increment part 13 to increment an address value inside the address register 10 when the write data D1 is written on the circuit for the display.  <P>COPYRIGHT: (C)2003,JPO
Patent JP-2003225857-A (JP)
Title: Retainer for matter to be polished and method for manufacturing the same
Inventor: SHIBATA KAZUHIKO
IPC: B24B37/27
Filed: 2002-02-01
Abstract: <P>PROBLEM TO BE SOLVED: To appropriately polish a matter to be polished and improve functionality easily and at low cost by controlling damage to the matter to be polished and the creation of impurities such as glass powder while securing the sufficient strength of a holder for the matter to be polished.  <P>SOLUTION: The retainer 10 for the matter to be polished is composed of a retainer main body 12 and a surface layer 12 coating the surface of the retainer main body 12. The retainer main body 12 is provided with a retaining part 18 having a retaining hole 18A to retain the matter to be polished, a core material 16 on which the retaining part 18 is attached, and a gear 20 attached on the outer circumference of the core material 16. The retaining part 18, the gear 20 and the surface layer 14 are made of materials different from that of the core material. The retaining part 18 and the gear 20 are made of organic fiber laminated materials formed by laminating polyester fiber base materials having resin impregnated and organic fiber base materials such as Aramid fiber. The surface layer 14 is made of a resin or organic fiber laminated material formed by laminating organic fiber base material having resin impregnated. The core material 16 is made of a metal material or glass fiber laminated material formed by laminating a glass fiber base material having resin impregnated.  <P>COPYRIGHT: (C)2003,JPO
Patent JP-2003229568-A (JP)
Title: Manufacturing method for semiconductor device and semiconductor device
Inventor: HORIUCHI KATSUTADA
IPC: H01L21/268
Filed: 2002-02-04
Abstract: <P>PROBLEM TO BE SOLVED: To improve reliability in a semiconductor device having a field effect transistor of a source and drain structure of a shallow junction.  <P>SOLUTION: In lowering the resistance of a diffusion layer 9a for the source and drain of the shallow junction by selectively fusing and recrystallizing a part of an amorphous layer 10a, formed during ion implantation for forming the diffusion layer 9a for the source and drain, by laser beam irradiation, in order to prevent defects such as a short circuit at the superimposing part of a fusion area and a gate electrode, by forming a first gate side wall insulating film 8 on the side face of the gate electrode and then performing the ion implantation, the amorphous layer 10a is not superimposed on the gate electrode and the amorphous layer 10a is fused and recrystallized without causing the short circuit defect.  <P>COPYRIGHT: (C)2003,JPO
Patent JP-2003232825-A (JP)
Title: Detection method of insulation state of non-grounded power source, and insulation detection device using detection method
Inventor: TANIGUCHI MASASHI
IPC: G01R27/18
Filed: 2002-02-06
Abstract: <P>PROBLEM TO BE SOLVED: To provide a detection method of the insulation state of a non- grounded power source capable of reducing the capacity of a data table used for determining a ground resistance value.  <P>SOLUTION: In this detection method of the insulation state of the non- grounded power source, an address for referring to the data table of an insulation resistance value is calculated based on the number of data on the data table where data of a voltage value of a direct-current power source, a voltage value between both terminals of a capacitor when connecting the capacitor in series between the power source and a ground potential part during a time set beforehand, and the insulation resistance value of the power source to the ground potential part, and the insulation resistance value of the power source to the ground potential part is determined from the calculated address. Hereby, the ground resistance value RL can be determined by a single data table without requiring use of a plurality of data tables such as a threshold data table and a ground resistance value data table as before, to thereby reduce the capacity of the data table used for determining the ground resistance value.  <P>COPYRIGHT: (C)2003,JPO
Patent JP-2003234642-A (JP)
Title: Tuning circuit and receiver
Inventor: SANO TAKASHI
IPC: G04G5/00
Filed: 2002-02-07
Abstract: <P>PROBLEM TO BE SOLVED: To reduce a circuit scale of a tuning circuit and to provide the turning circuit and a receiver for realizing stable tuning.  <P>SOLUTION: To a parallel circuit of a coil L and a capacitor C60, a serial circuit of a capacitor C40, an N type FET 20, and a capacitor Cc is connected between terminals 1-2, and by controlling the ON/OFF of the one N type FET 20, a tuning frequency is switched. Since the source and drain voltages of the N type FET 20 are applied to almost the same potential through resistors Rs and Rd, a capacitance of parasitic capacitance Cds is fixed. Also, since a resistor Rg is connected to the gate of the N type FET 20, signals do not flow from the capacitors C40 and Csg or the capacitors Cc and Cdg to a terminal G in terms of AC and the loss of output signals is prevented.  <P>COPYRIGHT: (C)2003,JPO