Patent GB-1494225-A (GB)
Title: Pulse regenerator and clock extraction system
IPC: H04L7/033
Filed: 1975-01-17
Abstract: 1494225 Data transmission; clock pulse extraction circuits PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd 17 Jan 1975 [21 Jan 1974] 2134/75 Heading H4P In a data transmission system having a number of regenerative repeaters located in a transmission path and a receiver, each being provided with a pulse regenerator and clock extraction circuit combined with a frequency selective circuit, to reduce phase jitter of recovered clock signals the frequency selective circuit has a normalized phase transfer function whose absolute value as a function of frequency is substantially constant from frequency zero to a first corner frequency, monotonously decreases from the first corner frequency to second corner frequency, is again substantially constant from the second corner frequency to a third corner frequency, and again decreases monotonously for frequencies which are higher than the third corner frequency. The phase transfer function gives the relationship between the spectra of phase jitter of clock frequency at input and output of the frequency selective circuit. A transmitter 2 issues through an amplifier 5 polar pulses to a coaxial cable 1 which are gated by clock generator 4. Regenerative repeaters 6 &c. also receiver 8 each include an amplifier 10 and equalizer 11 for equalizing amplitude and phase characteristics of the preceding cable section before passing into regenerator 12 to shape the pulses and adjust timing. A clock extraction circuit 13 has a unit 15 for obtaining a component at clock frequency and shaping circuit 16 to provide clock pulses to regenerator 12. Equalizer 11 is generally adjusted so that the transmission channel satisfies the first Nyquist criteria i.e. no inter symbol interference at nominal regeneration instants and co-operating with a correction network 17 to satisfy the second Nyquist criteria i.e. no inter symbol interference other than that of two successive symbols which should occur half way between two successive regeneration instants, output from which is applied to a non- linear circuit 18 for generating short duration pulses midway between two successive clock instants when signals exceed a threshold value, constituted by a bipolar slicer 19 followed by a differentiating network 20 and full wave rectifier 21. The frequency doubling action of 18 produces an output at which a component or clock frequency is present which is filtered out by a selective circuit 14 and supplied through a 90 degree phase shift 22 to a shaper 23. If equalizer 11 can be adjusted so that the transmission channel itself satisfies the second criteria, network 17 may be omitted. In an alternative arrangement (Fig. 3, not shown), the equalizer comprises two sections (24, 25) the first providing substantially flat amplitude and delay characteristics which are then modified in the second to satisfy the first criteria. Circuit 15 is connected to a tapped point and includes a filter (26) band pass tuned to half clock frequency having symmetrical characteristics about this value. Output is squared in a non-linear circuit (18) producing a signal of frequency equal to clock frequency whose amplitude may change but phase does not. The clock frequency component is filtered at (14) and clock pulses are derived from shaping circuit (23). Fig. 4 (also not shown) shows a modification of Fig. 3 utilizing a phase locked loop carrying a voltage controlled oscillator of frequency substantially equal to clock frequency and controlled by a phase detector (28) through a filter (29). As the phase difference between input signals of detector (28) is 90 degrees, component (22) of Fig. 3 may be omitted. A low loop gain is allowable if a stable i.e. crystal controlled oscillator is used. Fig. 4 may be further modified as illustrated in Fig. 8 (not shown). Fig. 10 (not shown) shows another modification similar to Fig. 4 incorporating a phase modulator (32) fed through a second order filter (33) in which case a filter (29) of the form shown in Fig. 11 (not shown) may be used. Such arrangement (i.e. Fig. 10) may have a much larger frequency variation between rest and clock frequency due to high loop gain hence an LC oscillator may be used in place of crystal stabilization with the other arrangements described. A more refined filter is given in Fig. 14 (not shown) comprising a first order network (34), a high gain amplifier (35) and a second first order network (36). Transfer function equations are given in the Specification in respect of the arrangements described. It is stated that arrangements as described may include up to 25 repeaters which will give the same performance as prior art systems having four repeaters utilizing resonant arrangements as frequency selective circuits; also to achieve greatest possible reduction of phase jitter the third corner frequency f3 should be much larger than the first corner frequency f1 and the second comer frequency f2 closer to f1 than to f3. Code converters may be used in the repeaters which convert an incoming pulse pattern into an outgoing pattern different from all preceding repeaters.