baber/WOPTO huggingface dataset:
Patent JP-H0644605-A (JP)
Title: Optical pickup
Inventor: KAWAOMO HISASHI
IPC: G11B7/135
Filed: 1992-07-23
Abstract: PURPOSE:To reduce a crosstalk to the regenerative signal by arranging light shielding zones corresponding to the bit string of an adjacent track. CONSTITUTION:An optical disk 5 is irradiated by a laser beam through an objective lens 4, and the reflected light is made incident on a photodetector 7 passing through a beam splitter 3 and a focusing lens 6, then the bit string information of the disk is reproduced. The light shielding zones 8 with spaces of the light shielding zones corresponding to the bit string of the adjacent track are arranged between the beam splitter 3 and the lens 6, then a Fourier transforming image according to the adjacent bit string of the reproduced bit string is blocked. The crosstalk to the regenerative signal is thereby reduced.
Patent JP-S6459474-A (JP)
Title: Thick line drawing system
Inventor: IGARASHI TSUYOSHI
IPC: G06T11/20
Filed: 1987-08-31
Abstract: PURPOSE:To prevent an already drawn point from disappearing with double write by discriminating whether a drawing object point on the next thick line overlaps the already drawn preceding thick line or not and determining whether the drawing object point should be written in a frame memory or not based on the discrimination result. CONSTITUTION:When X, Y coordinate values of a point (d) are outputted from a straight line generator DDA, a signal C goes to logical '0' because this Y coordinate value is smaller than the Y coordinate value of a point (a). The signal C from a comparator 56 is supplied to an OR gate 57 together with a signal S3 from a decoder 55. In case of S3=0, the signal C from the comparator 56 is outputted as a write enable signal WE to the frame memory as it is. Consequently, when X, Y coordinate values of the point (d) are outputted from the generator DDA at the time of drawing a thick line 20, drawing of the point (d) is inhibited because of C=0. Thus, double write is prevented, and the written point (d) is prevented from disappearing at the time of drawing a thick line 10 even if the frame memory is in the XOR mode.
Patent JP-2001039196-A (JP)
Title: Assist grip of automobile
Inventor: OMORI HIROSHI
IPC: B60N3/02
Filed: 1999-07-30
Abstract: PROBLEM TO BE SOLVED: To provide an assist grip of an automobile having a shock mitigating function without requiring any additional parts to a fitting bolt. SOLUTION: In this assist grip, a fitting part 11 formed on an end part of a grip part is formed into a tubular shape with a seat part 12 of closed surface shape on a tip, a bolt 5 is inserted in a bolt inserting hole 12a in the seat part 12, and screwed in a roof side rail inner 3 with its head 5a seated on the seat part 12. A distance is provided between a base end 11a of the fitting part 11 and a head 5a so that the fitting part 11 is buckled to show a cushioning effect to the collision of a head part 18 of an occupant against the head 5a.
Patent JP-H0660493-A (JP)
Title: Magnetic recording and reproducing device
Inventor: SAKATANI TOMOHIKO
IPC: G11B15/467
Filed: 1992-08-14
Abstract: PURPOSE:To shorten a pull-in time of a phase of a capstan motor with simple constitution, while to keep it constant. CONSTITUTION:A FG signal, a CTL signal and a head switching signal are supplied to a capstan motor control circuit 11, a control output of the capstan motor control circuit 11 is inputted to a capstan motor 2. An operation signal from an operation switch 15 is supplied to a stop control circuit 13 and a starting control circuit 14, and a stop signal of the stop control circuit 13 and a starting signal of the starting control circuit 14 are supplied to the capstan motor control circuit 11. The CTL signal and the head switching signal are respectively supplied to the stop control circuit 13 and the starting control circuit 14. A count control signal outputted from the stop control circuit 13 is supplied to a counter 5, and data of operation time of a time data making circuit 12 is inputted to the starting control circuit 14.
Patent JP-H0660315-A (JP)
Title: Production of magnetic head
Inventor: NATSUI AKINAGA
IPC: G11B5/127
Filed: 1992-08-14
Abstract: PURPOSE:To provide the magnetic head which efficiently records and reproduces high-frequency signals of a high-grade VTR, digital VTR, etc. CONSTITUTION:Conductive films 3 are disposed on at least one side of a magnetic head provided with magnetic metallic films 2 on nonmagnetic substrates 1 and current is passed to the conductive films 3 to radially generate magnetic fields around a winding window 6 within the film plane of the magnetic metallic films 2, by which a heat treatment is executed. As a result, the axis of easy magnetization is radially provided around the winding window 6 within the film plane of the magnetic metallic films 2 and the most of the magnetic paths of the magnetic head is capable of effectively utilizing the characteristics of the axis direction of difficult magnetization. Recording and reproducing are thus executed with high efficiency even at high frequencies.
Patent JP-H0550554-A (JP)
Title: Composite vibration-dampening material and its manufacture
Inventor: SAKAMOTO SEIJI
IPC: B32B37/24
Filed: 1991-08-28
Abstract: PURPOSE:To obtain the vibration-dampening material excellent in workability, while the peeling between metallic sheets and an intermediate resin layer is less apt to occur by a method in which the intermediate resin layer has a certain distribution of the gel molecular fraction of the resin is thickness-direction, and the gel molecular fraction of the inner layer of the intermediate resin layer is kept lower than that of the outer layer thereof. CONSTITUTION:An extruded film or a cast film is laminated between the metallic sheets coated with curing catalyst, and the films are mutually stuck by a heating roll or a heating press or they are continuously laminated by a cooling roll or a cooling press. Thus, composite vibration-dampening material is obtained. The vircoelastic resin as an intermediate resin-layer is champed between the metallic sheets, and since the gel molecular fraction of the outer layer of the intermediate resin layer is kept higher than that of the inner layer, the vibration-dampening material may resist the high shearing stress at press working, bending working or draw working, and the peeling between the metallic sheets and the intermediate resin layer hardly occurs.
Patent JP-S59107292-A (JP)
Inventor: KUROKI TERUHIRO
IPC: G21C11/06
Filed: 1982-12-13
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S6462530-A (JP)
Title: Closet device
Inventor: FUJITA KAZUAKI
IPC: E03D9/05
Filed: 1987-08-31
Abstract: PURPOSE: To facilitate maintenance by providing a deodorization unit comprising a ventilation fan, a motor, a deodorant, an air channel or the like, and a detection means of the quantity of wind passing through the deodorant, and making indication to an indication means as the quantity of wind is detected as being below the constant quantity of wind. CONSTITUTION: There are provided on a deodorization device mounted on a water closet with a deodorant suction port 2, an air channel 3 with a deodorant 4, an air quantity detection damper 5, a fan 6, and a motor 7. The damper 5 is journal supported on the air channel to be formed rotatably by wind force. When the deodorization device is in nonoperation, or has reduced wind force by clogging, the damper 5 lowers and a shielding plate works to interrupt a signal for a microcomputer process that is indicated on an indication means 13 set near an operation part. This shows the time of cleaning and maintenance appropriately.
Patent JP-H0265436-A (JP)
Title: Signal fault detection circuit
Inventor: KATO TAKEO
IPC: H04L25/02
Filed: 1988-08-31
Abstract: PURPOSE:To detect an input of a fault signal having a shorter period than a period of a pulse to be detected by sending an output pulse with a width of n-multiple and sending an interruption output when the fixed 1st or 2nd level output is inputted. CONSTITUTION:An interruption detection means 2 sends an output pulse with a period being a multiple of (n) with respect to a period of a pulse to be detected when a leading point of an input pulse is detected and the output pulse is interrupted if the leading point cannot be detected again and an alarm is sent. Then the pulse having a shorter period than the period of the pulse to be detected, that is, a fault signal is inputted, the output of the fixed 1st level is sent from a signal fault detection means 3 to the interruption detection means 2. Thus, the interruption detection means cannot detect a leading point and sends an alarm.
Patent JP-H0265153-A (JP)
Title: Semiconductor device
Inventor: OSAKA SHUICHI
IPC: H01L21/78
Filed: 1988-08-30
Abstract: PURPOSE:To set the width of a dicing line narrowly by making a mark region exist extendedly inside a semiconductor element adjacent to a dicing line, and providing a target mark and an electrode for characteristics evaluation in this region. CONSTITUTION:A mark region 9 is made to exist inside a semiconductor element 1 adjacent to a dicing line 4, and a target marks 5 and 6 and an electrode 8 for characteristics evaluation are provided in this region. According to this constitution, the dicing line 4 can be set narrowly regardless of the dimensions of the target marks 5 and 6 or the electrode 8 for characteristics evaluation, accordingly a wafer can be utilized effectively, and the interval between the dicing lines can be made constant, therefore automatization of the dicing also becomes possible.
Patent JP-S60108896-A (JP)
Inventor: KIMURA SHINTA
IPC: G10L15/12
Filed: 1983-11-18
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S59102776-A (JP)
Inventor: IWATA TETSUO
IPC: B66B5/02
Filed: 1983-11-18
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0382138-A (JP)
Title: Manufacture of semiconductor device
Inventor: UMETANI MASATO
IPC: H01L21/76
Filed: 1989-08-25
Abstract: PURPOSE:To make possible the simplification of the manufacturing process of a semiconductor device and to contrive a reduction in the manufacturing cost of the device by a method wherein after an insulating film is formed at a desired position on a semiconductor substrate, an epitaxial layer and a polycrystalline silicon layer are formed and after the surface of the substrate is polished and flattened, another semiconductor substrate is adhered to the semiconductor substrate. CONSTITUTION:A composite film consisting of a pad oxide film 12 and a nitride film 13 is first formed on a region part, which is used as a power element formation part, on the main surface on one side of a semiconductor substrate 11. Then, an N-type epitaxial layer 15 is formed on a part, which is not covered with a selective oxide film layer 14, of the surface of the substrate 11 by a CVD method. At this time, a polycrystalline silicon layer 16 is simultaneously formed on the surface of the layer 14. Then, the layers 15 and 16, which are located at the part of an A-A1 line in the (d) of the first diagram, are polished by 5mum or thereabouts and a completely flattened mirror surface 17 with roughnesses of 10Angstrom  or lower on its surface is formed. Then, the side of the rear of the first N-type semiconductor substrate 11 is adhered to the side of the surface of a second N-type semiconductor substrate 18.
Patent JP-2001039632-A (JP)
Title: Winding reel for chain
Inventor: MIO KATSUHIKO
IPC: B65H75/20
Filed: 1999-07-30
Abstract: PROBLEM TO BE SOLVED: To provide a winding reel which can be stacked during storage and transportation of empty reels and make it convenient to carry and use. SOLUTION: This reel 10 is formed out of a hollow reel core part 12 and the flange parts 14, 16 of both ends thereof. The reel core part 12 is formed by extending four reel core wire pieces 18 substantially in an axial direction. The first flange part 14 consists of first flange wire pieces 20 respectively- extending from one end of the reel core wire pieces 18 in a plane perpendicular to its axis outwardly in a radial direction and coupling wire pieces 22 coupling the front ends of the first flange wire pieces to each other. The second flange part consists of second flange wire pieces 24 extending from the other end of the reel core wire piece 18 in a plane perpendicular to its axis outwardly in a radial direction and third flange wire pieces 26 extending from the other end in a plane perpendicular to its axis inwardly in a radial direction.  The third flange wire pieces 26 are jointed to each other at the radially inner side than the reel core part 12, thereby reinforcing the other end of the reel core part 12.
Patent JP-2000048495-A (JP)
Title: Synchronizing signal detector and read device in magnetic tape device
Inventor: KAIZAWA TOSHIHARU
IPC: G11B20/14
Filed: 1998-07-31
Abstract: PROBLEM TO BE SOLVED: To provide a synchronizing signal detector in a magnetic tape device with which a synchronizing signal is accurately detected and eventually the existence or non-existence of an error correcting code is accurately judged although a prescribed error correcting code is recorded on a magnetic tape or not. SOLUTION: The synchronizing signal detector is provided with an EC 3 detection circuit 3 which judges that when the error correcting code is recorded on the magnetic tape, the first error correcting code exists, and when the error correcting code is not recorded on the magnetic tape, a bit pattern of reproduced information at a first position, where the synchronizing signal should exist, coincides with the bit pattern of the synchronizing signal, and that when the bit pattern of the reproduced information in a second position, where the first synchronizing signal after the first error correcting code should exist if the error correcting code is recorded on the magnetic tape, does not coincide with the bit pattern of the synchronizing signal,  the error correcting code is not recorded on the magnetic tape and the reproduced information in the first position is a correct synchronizing signal at the time of forward reading.
Patent JP-H0964902-A (JP)
Title: Hub equipment
Inventor: IDA TOMOYUKI
IPC: H04L12/44
Filed: 1995-08-25
Abstract: PROBLEM TO BE SOLVED: To control congestion of a LAN at the side of CSMA/CD when congestion takes place in the LAN at the side of ATM in the hub equipment interconnecting the LAN at the side of the ATM and the LAN at the side of the CSMA/CD. SOLUTION: The hub equipment is provided with an ATM side reception control circuit 110 controlling the reception from a LAN 200 at the ATM side, an ATM side transmission control circuit 120 controlling the transmission to the LAN 200 at the ATM side, a congestion control circuit 130 controlling the congestion of the LAN 200 at the ATM side based on the congestion in the LAN 200 at the ATM side, and a CSMA/CD side transmission reception control circuit 140 controlling the reception from a LAN 300 at the CSMA/CD side or the transmission to the LAN 300 at the CSMA/CD side and controlling the congestion of the LAN 300 at the CSMA/CD side.
Patent JP-H0965298-A (JP)
Title: Transmitter for isdb and its receiver
Inventor: KONDO TETSUJIRO
IPC: H04N19/189
Filed: 1995-08-25
Abstract: PROBLEM TO BE SOLVED: To provide a receiver realizing a simulated practice device by utilizing a broadcast signal. SOLUTION: The ISDB receiver 40 that receives an ISDB broadcast signal obtained by digitizing various main information such as video, audio and data with additional information such as control information and applying packet and multiplex processing to the resulting information is provided with an ISDB tuner 46, plural decoding sections 52, 60-68 decoding the main information, the video information and the control information of plural channels, plural memory means 70-76, a screen 1 and a control section 90. The control section receives outputs from a 2-dimensional or 3-dimensional sensor and channel selection with respect to a displayed video image and a read address from the memory means are controlled based on the sensor output and the video image is progressed in relation to the sensor output.  The video channel switching and memory read control are conducted by an output of the sensor provided in a surf board, etc.
Patent JP-S6277666-A (JP)
Title: Buffer circuit
Inventor: OHASHI KAZUYA
IPC: G06F13/38
Filed: 1985-09-30
Abstract: PURPOSE:To vary the number of data which are transferred at a time within the range of a set value by counting the free state of a data buffer and the number of times of data transfer. CONSTITUTION:When data is transferred from a memory 1 to the data buffer 2, a buffer free signal 9 is transmitted to a buffer transfer control part 3. The buffer transfer control part 3 sends a data request signal 11 to the memory 1. The memory 1 sends the data to a bus 6 and also sends a data transfer signal 12 to the buffer transfer control part 3 and a transfer number counting part 4 at the same time. The transfer counting part 4 compares the set value of a transfer number setting part 5 with the number of times of transfer and the buffer transfer control part 3 continues to request data until a coincidence is obtained.
Patent JP-S59109097-A (JP)
Inventor: KUMAGAI NAOTAKE
IPC: G10L15/00
Filed: 1982-12-14
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S59110375-A (JP)
Title: Power source
Inventor: NAKANO KATSUAKI
IPC: G03B15/05
Filed: 1982-12-14
Abstract: PURPOSE:To prevent the damage of a power source and a load without abnormally high output even in a no-feedback state by providing in a power source unit an open state detecting circuit for reducing the output as compared with the normal time when a load feedback amount regulator becomes an open state. CONSTITUTION:An open state detecting circuit 8 is added in a power source unit, and composed of a transistor TR82 connected at the collector to the output terminal of an error amplifier 51 of a controller 5 and at the emitter to a common line, and a Zener diode ZD83 connected between the base of the TR82 and the terminal of the output setting variable resistor 6 side of a resistor 81. The sum of the Zener voltage of the ZD83 and the ON voltage between the base and the emitter of the TR82 is set to a value larger than the maximum voltage value of the terminal (b) in the regulating range of the resistor 6 and smaller than the reference voltage Vref, thereby reducing the output of the controller 5 to lower the output of the power source.
Patent JP-S6196453-A (JP)
Title: Inspecting instrument
Inventor: YAMADA NAOTO
IPC: G01N29/24
Filed: 1984-10-17
Abstract: PURPOSE:To enable to perform the prescribed inspection without moving the center point where ultrasonic wave is made incident even in case of the material to be inspected being inclined by making an ultrasonic probe being rocked on the sector made by one part of the circle having the center point where ultrasonic wave is made incident at its center. CONSTITUTION:An ultrasonic probe 2, holder 3 and shoe 4 can perform a rocking motion around the center point where ultrasonic wave is made incident, since both 1st sector 9 and 2nd sector are made by one part of the circle having the center point where ultrasonic wave is made incident at its center. In case, therefore an inspection is performed by deciding the center point A where ultrasonic wave is made incident at the place L from the left end of the material 1 to be inspected, the center point A where ultrasonic wave is made incident of the ultrasonic probe 2 is not moved even in the condition of the material 1 to be inspected being inclined around the center point A where ultrasonic wave is made incident but existed at the place L from the left end of the material 1 to be inspected and the inspection can be performed.
Patent JP-H0530980-A (JP)
Title: Copolymer and production thereof
Inventor: SHIOTANI TAKENAGA
IPC: C12N1/20
Filed: 1991-08-03
Abstract: PURPOSE:To produce a new copolymer capable of being decomposed by the action of a depolymerase, etc., under natural environments by culturing a microorganism belonging to the Pseudomonas in the presence of a 14-22C long chain fatty acid, etc., as a carbon source, while restricting other nutrient sources except the carbon source. CONSTITUTION:A microorganism (preferably Pseudomonas.fluorescence FA-031) belonging to the genus Pseudomonas and multiplied under a rich nutritious condition is cultured in the presence of a triglyceride produced from a 14-22C long chain fatty acid, a lower alkyl alcohol ester thereof and a 14-22C long chain fatty acid (e.g. oleic acid or linolic acid) as a carbon source and in the presence of restricted amounts of other nutrient sources excluding the carbon source at a pH of 6-8 at 25-35 deg.C in an air-bubbling amount of 0.5-2vvm for a culturing time of 24-48hrs to synthesize the objective copolymer having units of the formula (Y is 1-13C hydrocarbon group which may contain 1-4 double bonds).
Patent JP-H0964303-A (JP)
Title: Manufacture of semiconductor integrated circuit device
Inventor: AOKI HIDEO
IPC: H01L21/8242
Filed: 1995-08-25
Abstract: PROBLEM TO BE SOLVED: To reduce the number of manufacturing processes of a DRAM having a memory cell of a capacitor-over-bit-line structure, and reduce the difference in aspect ratios of a contact hole formed in a region of the memory cell and a contact hole formed in a region of a peripheral circuit. SOLUTION: Wirings 20, 21 of a first layer of a peripheral circuit and an upper electrode 19 of a capacitive element for storing information of a memory cell are simultaneously formed by using wiring material of the same layer. A wiring 27 of a second layer of the peripheral circuit and a wiring 25 on the upper electrode 19 are simultaneously formed by using wiring material of the same layer.
Patent JP-H03137877-A (JP)
Title: Binary information recording and reproducing system
Inventor: SHIMEKI TAIJI
IPC: G11B20/14
Filed: 1989-08-24
Abstract: PURPOSE:To easily reproduce a clock by diminishing the max. interval of state inverting intervals and making a recording and reproducing signal band a narrow band. CONSTITUTION:An original data T1 impressed upon an input terminal 1 is synchronized with an original clock pulse T3 to be impressed upon an input terminal 2 and inputted to a 12-bit serial input / parallel output shift register 4. Conversion of modulation algorithm is realized by such a way that the original data of continuous 4 pieces of 4 bits is inputted as an address of a ROM 5, and a code of 8 bits of the address is outputted in accordance with the modulation algorithm. 12 bits of an output of the register 4 is inputted to the ROM 5 by timing in word synchronization T4, and the 8-bit code appears in the output according to the modulation algorithm, and is inputted as a conversion code by timing in the synchronization T4 to an 8-bit parallel input / serial output shift register 6. A serial output of the register 6 is inputted to an NRZI modulation circuit 7 to output a modulated waveform T7. By this method, the clock reproducing, etc., at the time of reproducing can easily be performed.
Patent JP-2000058387-A (JP)
Title: Electric double-layer capacitor
Inventor: OYA MASAKO
IPC: H01G11/84
Filed: 1998-07-31
Abstract: PROBLEM TO BE SOLVED: To realize an electric double-layer capacitor which has high productivity and reliability by positively sealing a separator, polarizable electrodes and an electrolytic solution into a gasket. SOLUTION: An electric double-layer capacitor comprises basic cells 6a in which a separator 4, a pair of polarized electrodes 1a and an electrolytic solution 3 are accommodated inside a gasket 5a. An opening in one surface of the gasket 5a is sealed with a sheet-like current collector 2a. An opening in the other surface of the gasket 5a is sealed with a current collector 2b. The current collector 2b comprises two stacked current collector sheets 10a, which are the same as that for the current collector 2a. The current collectors 2b are provided at the outermost side of a laminated cell body 9a comprising two stacked basic cells 6a. There is hardly a possibility that cracks or breaks occur on both of the two current collectors 10a, and the leakage of the electrolytic solution 3 in the basic cell 6a is prevented.