Patent GB-842107-A (GB)
Title: Signal memory or delay device
IPC: H03K19/162
Filed: 1956-11-26
Abstract: 842,107. Parametrically excited resonators. NIPPON TELEGRAPH & TELEPHONE PUBLIC CORPORATION, TAKAHASI, H., and GOTO, E. Nov. 26, 1956 [Nov. 25, 1955], No. 36103/56. Class 40 (9). [Also in Group XIX] The condenser 11 in the tuned circuit of a parametrically-excited resonator has a barium titanate dielectric and is coupled to a metallic wire 12 which is used as a delay line. A binary signal of phase 1 or 0 is inserted at terminals 5 during a pulse excitation at frequency 2f on terminals 4. The parametric oscillations of frequency f and of appropriate phase are transmitted as mechanical oscillations over the delay line which is so adjusted in length that after reflection, the signal is re-inserted in the parametron during a subsequent excitation pulse. The signal circulates in the delay line and is regenerated once per cycle. A number of signals may be stored in the same delay line. A single wire may be threaded through a number of barium titanate elements to produce a number of outputs with different delays. In this arrangement the ends of the wires are tapered to avoid reflection. A magnetostrictive element may be used to couple the tuned circuit to the delay line. A parametron of three values is described. In the applications described, the parametrons are excited periodically in three overlapping phases I, II, III, Fig. 3. Parametrons are represented symbolically by circles, - and + signs indicating AND and OR gates. Fig. 4b is the symbolic equivalent of Fig. 4a. In the arrangement shown in Fig. 10, binary pulse signals at input terminal 15 are written into the delay line if control pulses of phase 1 are simultaneously applied to terminal 17. Parametron 13 responds to the signals as it receives the same signal pulses on two of the three main input leads. Control pulses of phase 0 on terminal 18 stop the transmission of signal pulses from parametron 13 to the output terminal 16. For reading out, control pulses of phase 0 on terminal 17 cause signal pulses on terminal 15 to be repeated as pairs of pulses of opposite phase by parametrons 21, 25. Parametron 13 then responds to pulses from the line 12, in spite of half-strength pulses that are applied simultaneously to terminal 29 to ensure that 13 gives a phase 0 output when there is no signal from line 12. Control pulses of phase 1 on terminal 18 enable parametron 26 to pass the signals from 13 to the output terminal 16. If signal pulses are fed to terminal 15 once in every six excitation cycles, a phase 1 control pulse is fed to terminal 17 in the corresponding cycles and phase 0 is fed to 17 in the intervening cycles, as shown in Fig. 11 (a). The excitation pulses of phase III are shown in Fig. 11 (c). If signals f, g ... j, Fig. 11 (d) are fed to terminal 15 at intervals of six cycles and if the delay in line 2 is five cycles the signal pulses are stored and compressed in time, as shown in Fig. 11 (e). Fig. 11 (b) shows the half-strength-pulses applied to terminal 29. Control circuits.-A circuit for feeding the control terminals 17 and 29 comprises a number of parametrons and two saturable transformers 30, 32, Fig. 12. Parametrons 34, 36 constantly generate phase 1 and phase 0 signals in period I. For writing, transformer 30 is unsaturated and transformer 32 is saturated only in the periods between the application of signal pulses to terminal 15, Fig. 10, saturation being produced by direct current pulses on terminals 33. The double lines between 30, 35 and 32, 37 indicate signals of double strength. A signal from a terminal 15 may be offered to a number of delay lines 12, 12<SP>1</SP>, &c., Fig. 17, and will be accepted by a delay line marked by desaturation of the appropriate transformer 30 in a matrix. Normally, all the transformers 30, 30<SP>1</SP>, &c. are saturated by currents in conductors 43, 43<SP>1</SP>, &c., 44, 44<SP>1</SP>, &c. When the currents in 43, 44 are cut off, the signal is accepted by delay line 12. Parametron of three values, Fig. 21.-The resonant circuit of a parametron comprising cores 1, 2 includes a winding 52 on a saturable core with a control winding 17<SP>1</SP>. The core may be saturated or de-saturated by a winding connected to control terminals 17<SP>1</SP> to change the characteristic frequency of the tuned circuit and thereby to stop the parametric oscillations.