Patent GB-845801-A (GB)
Title: High speed data conversion and handling
IPC: H03K17/54
Filed: 1958-04-15
Abstract: 845,801. Multiplexing arrangements and analogue - to - digital converters. NORTH AMERICAN AVIATION Inc. April 15, 1958 [April 17, 1957], No. 11926/58. Class 40(1). A system adapted to receive a number of analogue quantities, each in a different channel and record digital equivalents on magnetic tape comprises the combination of a multiplexer, including, in each input channel, a semiconductor switching device designed so as to be substantially independent of temperature effects, an analogue to digital converter, a record tape handling unit and a master timer for synchronizing the multiplexer, converter and the tape handler. General.-The multiplexer 15, Fig. 2, receives the analogue values on a number of lines 25 and applies them in turn through an amplifier to a clamp 16. The voltages applied to the clamp are instantaneous values derived by sampling the constantlyvarying voltages transmitted on lines 25. The clamp maintains the sample voltage for a period sufficient to enable the converter 18 to translate it into a digital equivalent. The master timer 21 produces synchronizing pulses in turn on twelve terminals, pulses passing over lines 26, 27, 28, 29, 30 to coordinate the operations of the multiplexer 15, converter 18, the tape handler 23 and a scanning monitor 22. The recorder 24 records on the tape in eight channels, the arrangement being as shown in Fig. 3. Each conversion is represented on the tape by words of eighteen digits occupying three adjacent rows. The top two tracks contain timing marks 34 and key marks 33, one for each word. The conversion value is given in ten digits, six in row 32 and four in row 35. The remaining digits 36, 37 of row 35 and those of row 38 identify the channel from which the analogue signal came. The Multiplexer.-In Fig. 6 is shown a multiplexer for only four channels 681, 682, 683, 684 which are to be connected in turn to output terminal 685. Connections are made from each of these channels through diodes 673-676 which normally block the negative analogue signals. Anodes of triodes 649-652, connected to the input lines, are rendered conducting in turn by connections from a ring of triggers 695-698 receiving pulses from one of the output terminals of the master timer 21. The diodes are thereby unblocked in turn to apply the analogue signals from each input channel to the output terminal 685 for transmission to the clamp circuit. The diodes are silicon semiconductors as described in Specification 845,802, using such an operating current that they are independent of temperature. The ring of triggers 695-698 is used to derive channel identification data by combination through a network of resistances 710-714 to three cathode followers 703-705. The outputs from these are passed via amplifiers 706-708 to terminals 231-232. On the tape there are recorded eight identification digits I-VII identifying up to 256 input channels. The circuit shown in Fig. 6 would be modified accordingly by the provision of groups of eight cathode followers and amplifiers, Voltage clamp.-The analogue signals from the multiplexer are applied in turn to the diode clamp shown in Fig. 5, on input terminal 632. Four diodes 614, 615, 616, 617 are bridge-connected so that current can flow from positive terminal 621 through terminals 618 and 619 to negative terminal 622. Triodes 608, 609 are connected so as to by-pass respectively the diodes and resistor 624 and the diodes and resistor 623. The grids are connected to control terminal 627 through condensers 628, 629 and a negative pulse is applied in each cycle of the timer 21. The input terminal 632 is connected to the diodes at 634 and corresponding terminal 635, to grid of cathode follower 612 connected in cascade with a second cathode follower 611 between the positive and negative lines. When there is no signal on control terminal 627 the triodes 608, 609 conduct heavily so that terminal 618 is well negative of terminal 619, the diodes are cut off and a charge on condenser 643 is isolated. This charge controls the output of the cathode follower 611, 612 at terminal 642. When the negative pulse arrives on terminal 627 triodes 608, 609 cut off and the diode array is in series with the resistors 623, 624 between positive and negative lines. The diodes conduct and the voltages at the junctions 634, 635, in the absence of an input signal, are determined by the resistors 623, 624. An input analogue signal on terminal 634 modifies the voltage at 635, thereby changing the charge on condenser 643 and, accordingly, the output signal on 642. After the pulse of terminal 627 the charge is retained (for 100 microseconds) on condenser 643, giving time for the conversion to be made. Analogue-to-digital converter.-The output signal from the clamping circuit is applied on terminal 126 of the converter, Fig. 10, in which it is compared with successively increasing standard voltages so as to generate a binary equivalent in the form of a ten-bit word. Timing pulses from master timer 21, appearing in sequence on terminals T2-T12, pass via shapers PS.2-PS.12 to set triggers 41-50. The pulse on terminal T1 is connected to reset all triggers at the beginning of a conversion. Each trigger may also be reset by coinciding pulses from the adjacent pulse-shaper and on line 77 from trigger 78 set by the error amplifier 127. The reset output from each trigger passes via a cathode follower 81-90 and a condenser 103 to the grid of a triode 116-125. The anodes are connected to diodes 105-114 and to a positive supply 131 through resistors. The cathodes of the triodes are connected to a negative terminal 132. A series of summing resistors 115 are connected between the anodes of the triodes 116-125 and the latter is earthed at 143. The voltages appearing on the anodes of the triodes 116-125 when cut off, draw currents through the sections of the summing resistors 115 and the arrangement is such that each section produces half the voltage of the previous section. If the total voltage produced with all triodes cut off, is 10.23 volts then 5.12 volts appear on tapping 144, when all are cut off except triode 116, 2.61 volts on tapping 145 when all are cut off except triode 117 and so on. The first pulse T1 resets all triggers, causing all triodes to conduct, all anodes being thereby connected to the negative terminal 132, zero voltage is produced at the output 152. The triggers 41-50 are now set in turn by the pulses on terminals T2-T12, the first pulse T2 causes triode 116 to conduct, and applies the largest step of 5.12 volts to the output terminal 152. This voltage is produced by current passing through the diode 114 and the whole resistor 115 to earth from the now positive anode of triode 116. Subsequent triodes on becoming conductive cause more current to pass through subsequent sections of the resistor to earth, thereby increasing the voltage at terminal 152. The first standard voltage produced, i.e. 5.12 volts, is compared with the analogue signal on terminal 126. If the analogue is greater than the standard no signal is produced on line 77 so that the next timing pulse T3 sets trigger 42 and, by causing triode 117 to conduct, adds 2.56 volts to make a new standard voltage of 7.68 volts. If the analogue had been less than 5.12 an output on line 77 would have been produced to open gate 51 and allow the pulse T3 on line 91 to reset trigger 41 as it sets trigger 42, thereby causing triode 116 to conduct again and remove the 5.12 voltage. The process is repeated for each trigger and associated triode in turn, a trigger which produces an excess standard voltage being reset as the next trigger is set. The condition of triggers 41-50 after the conversion gives a binary equivalent. Immediately the conversion is complete a delayed T12 pulse gates these values into another set of ten triggers in transcriber 19 serving as a buffer store. The channel identification number is likewise passed from triggers 695-698 &c., Fig. 6, of the multiplexer, to a further eight triggers of the buffer store. These eighteen digits are gated out of the buffer store in three blocks of six at T1, T5 and T9 pulse time for recording on the tape in successive rows, as shown in Fig. 3. Clock pulses 34 are recorded in each row of the first track by connecting the corresponding head to timer terminals T1, T5 and T9 and the key pulses 33 are recorded in each third row to indicate the beginning of each word by connecting the head with terminal T9. The scanning monitor 22 provides a visual display of the digital information derived in the converter. Alternatively connections may be made from the recording heads through a selector switch to an oscilloscope which provides a visual monitoring of the recorded information. Play-back.-Reading heads read each track on the tape 13, Fig. 13, the operation of the play-back equipment being controlled completely by the timing pulses 33, 34, in the top two tracks of the tape. The signals are amplified in package 401 and transferred on lines 405 to a tape recorder and on lines 397 to a "redundancy generator." Re-recording is controlled by a " time filter 403 which counts the eighteen-bit words as represented by the key signals in the second track passed over line 406, 423 and is preset by switches to control the starting and stopping of re-recording. It thereby governs the interval of the recording which is transferred to the tape. The redundancy generator 402 generates a parity check mark to ensure that there shall always be an odd number of bits across the channels of tapes in recorders 153, 154. Block generator 404 controlled by timing pulses on line 407 and by the start and stop signals from the time filter alternately turns on and off each of the tape recorders 153, 154 to supply odd data blocks to the one and even blocks to the other. Each block consists of seven bits, six from the reading of tape 13 and the seventh is the parity che