baber/WOPTO huggingface dataset:
Patent TW-472383-B (TW)
Title: Low-power start-up circuit for reference voltage generator
Inventor: JOU YUNG-FA
IPC: H01L27/10
Filed: 1999-06-25
Granted: 2002-01-11
Abstract: A kind of low-power start-up circuit for reference voltage generator comprises a noise suppression apparatus and a control apparatus. The noise suppression apparatus and the control apparatus are composed of one first-type transistor and at least one second-type transistor. The noise suppression apparatus is used to lower the noise effects of low-power start-up circuit so as to make the outputted reference voltage of the reference voltage generator stable when noise is generated. When the reference voltage reaches the required level, the transistor of the control apparatus is closed to break the current loop such that the low-power start-up circuit does not work and no static state current flows through the low-power start-up circuit. The invented low-power start-up circuit for the reference voltage generator consumes less power, and can be controlled without the requirement of extra control circuit.
Patent TW-442727-B (TW)
Title: High performance PCI with backward compatibility
Inventor: BEUKEMA BRUCE LEROY
IPC: G06F13/40
Filed: 1999-07-01
Granted: 2001-06-23
Abstract: A peripheral interconnect for a computer system comprising a bridge, a peripheral bus, and a peripheral device, wherein at least one of these components is adapted to selectively operate in either a high performance mode or a low performance mode, the high performance mode using a first operating speed and a first protocol, and the low performance mode using a second operating speed which is lower than said first operating speed, and a second protocol which is different from the first protocol. The disclosed embodiment provides a high performance mode with a 100 MHz speed and a protocol that disallows pacing, and a low performance mode that uses a 66 MHz or 33 MHz speed and a standard PCI protocol that allows pacing. The high performance operating speed can be twice the low performance operating speed, by doubling the clock frequency and clocking data on only one clock edge, or by clocking data on both a rising edge and a falling edge of a clock signal while operating at the lower clock frequency. High performance adapters can provide split transaction capability, with a high performance bridge having the ability to support split transactions or alias split transactions to delayed transactions. Backward compatibility may also be provided for optional features such as hot-pluggability.
Patent TW-436637-B (TW)
Title: Particle beam current monitoring technique
Inventor: RICHARDS STEVEN L F
IPC: G01T1/29
Filed: 1999-07-26
Granted: 2001-05-28
Abstract: A method of monitoring particle beam current in an ion implanter in which the ion beam is analyzed to separate it into a separate sub-beam for each ion charge state. At least one sub-beam, having a charge state different from the desired charge state, is intercepted, and the current of the intercepted sub-beam is measured. This current is useful as an estimate of the current of the desired sub-beam which is used for the implantation.
Patent TW-418503-B (TW)
Title: Method for producing contact of semiconductor chip
Inventor: CHUNG CHIA-CHI
IPC: H01L21/768
Filed: 1999-08-27
Granted: 2001-01-11
Abstract: The present invention relates to a method for producing a contact on a semiconductor chip. The surface of the semiconductor chip comprises a substrate. The method comprises: sequentially forming an oxynitride (SiOxNy) layer and a predominant silicon oxide layer on the substrate; spin-coating a photoresist layer on the predominant silicon oxide layer; using a predetermined pattern to expose the photoresist layer in which the oxynitride layer is used to reduce the photo reflectivity of the semiconductor chip; performing a photolithography process to remove the photoresist layer of the exposed region in order to form a hole communicating to the surface of the predominant silicon oxide layer on the photoresist layer; performing a first etching process to vertically and downwardly removing the predominant silicon oxide layer beneath the hole until reaching the surface of the oxynitride layer; performing a second etching process to remove the oxynitride layer beneath the hole; and completely removing the photoresist layer.
Patent TW-402552-B (TW)
Title: Method for adjusting the polishing time of the chemical mechanical polishing process
Inventor: LIN JIUN-YI
IPC: B24B7/24
Filed: 1999-08-30
Granted: 2000-08-21
Abstract: This invention discloses a method adjusting the polishing time of the chemical mechanical polishing process by using an improved polishing time model and having the minimum deviation by iterative adjustment. The improved polishing time model used in this invention needs to consider the major calculation items that will affect the polishing time such as the non-planar surface and machinery wear-out. Every relevant item is correspondent to a weighted parameter. On the other hand, the method for reaching the minimum deviation by the iterative adjustment disclosed in this invention is to polish at least one wafer and measure its polishing speed in a series of chemical mechanical polishing process of a plurality of wafers with equivalent structures, and then compare the polished result with the expected result. Adjust the weighted parameter of each relevant item in the improved polishing time model of based on the difference of the compared result and obtain the required polishing time for the chemical mechanical polishing process. Then repeatedly proceed the foregoing calculations for the polishing time, the polished wafer, the difference between the actual polishing result and the expected result, and the process for adjusting the weighted parameter of each relevant item to adjust the polishing time and obtains the appropriate weighted parameter for each relevant item, and accomplishes the expected polishing time.
Patent TW-445492-B (TW)
Title: Cold cathode fluorescent lamp and display
Inventor: GE SHICHAO
IPC: H01J61/00
Filed: 1999-10-11
Granted: 2001-07-11
Abstract: A light transmitting container is used to house a cold cathode fluorescent lamp (CCFL) to reduce heat loss and to increase the luminous efficiency of the lamp. An electrical connector configuration is connected to an electrode of the lamp and adapted to be electrically and mechanically connected to a conventional electrical socket. A driver circuit in the container converts 50 or 60 HZ power to the high frequency power suitable for operating the CCFL. At least one of the electrodes of the CCFL is outside of the container to facilitate heat dissipation. A CCFL having an elongated tube portion and enlarged portions for housing larger electrodes is proposed to enhance the longevity and brightness of the CCFL. Larger electrodes are used to generate more electrons in the CCFL, thereby generating more light. Larger electrodes also reduces the temperature of the tube material of the CCFL to enhance the lifetime of the device.
Patent TW-558870-B (TW)
Title: A semiconductor integrated circuit device
Inventor: TANZAWA TORU
IPC: G11C11/407
Filed: 1999-11-16
Granted: 2003-10-21
Abstract: The present invention provides a level offset circuit, which can eliminate the deterioration of operational speed of the switch even with the reduced power voltage, and can operate even when the power voltage is reduced to the threshold voltage. The device includes: a P-channel transistor QP1 with the drain for applying the boosting potential VPP; a P-channel transistor QP2, wherein the boosting potential VPP is applied on the drain, and the source is connected with the drain of the transistor QP1, and the drain is connected with the gate of the transistor QP1; and, an N-channel transistor QNI1, wherein the drain is connected with the drain of the transistor QP1; the output of the inverter I1 is inputted to the gate; the input of the inverter 12 for inverting the output of the inverter I1 is inputted to the source; and, the threshold voltage is at the zero-Volt level.
Patent TW-452696-B (TW)
Title: Method for arbitrating multiple memory access requests in a unified memory architecture via a non unified memory controller
Inventor: SU REN-BIN
IPC: G06F13/18
Filed: 1999-11-30
Granted: 2001-09-01
Abstract: In a memory controller system, a method for granting a system memory by a memory request arbitrator to a request among a plurality of pending memory access requests is provided. The plurality of the memory access requests includes Rfrsh_Hreq, Crt_Hreq, group AB, Crt_Lreq and Rfrsh_Lreq and are respectively asserted by a host control circuitry and/or a graphical control circuitry which are implemented and integrated on a single monolithic semiconductor chip. The host control circuitry and the graphical control circuitry shares the system memory and the memory request arbitrator includes a refresh queue and the graphics control circuitry includes a CRT FIFO. The method prioritizes the plurality of the memory access requests in order of Rfrsh_Hreq > Crt_Hreq > group AB > Crt_Lreq > Rfrsh_Lreq. The Rfrsh_Hreq is memory refresh request signal of first type whenever the refresh queue being full, the Crt_Hreq is memory access signal of a first type for fueling the CRT FIFO with display data, the group AB are memory access request signals of a second type output either from the graphical control circuitry or the host control circuitry, the Crt_Lreq is memory access signal of a third type for fueling the CRT FIFO with display data, the Rfrsh_Lreq is memory refresh request signal of second type whenever the refresh queue being non-empty.
Patent TW-445349-B (TW)
Title: Drain pump
Inventor: NINOMIYA TATSUSHI
IPC: F04D1/14
Filed: 1999-12-15
Granted: 2001-07-11
Abstract: A drain pump 10 comprises a housing 20 of a pump body, and a rotary vane 30 placed inside the housing 20. A penetrating hole 24 is formed to the center of a lid 22 mounted to the upper portion of the housing 20, and a shaft 32 of the rotary vane 30 penetrates through the hole 24 and protrudes to the upper portion of the lid 22. A rotor 54 is equipped inside a bracket 52 of a motor 50, which rotates a driving shaft 60 of the motor. The driving shaft 60 is supported through bearings 70 and 80 to the motor bracket 52. The driving shaft 60 of the motor protrudes from the motor bracket 52, and is press-fitted to the hole 34 with a bottom formed to the shaft 32 of the rotary vane 30, so as to drive the rotary vane 30. The collar 100 comprises a cylindrical portion 105 and a disk-shaped flange 110, wherein the flange 110 positioned above the penetrating hole 24 prevents a deflector disk from moving upwards. The flange 110 also prevents the drain water leaking out from the hole 24 of the lid 22 from splashing on the motor. A lubricant oil collect area is formed between the upper surface 120 of the cylindrical portion 105 and the bearing 80.
Patent TW-524881-B (TW)
Title: An organocuprous compound and a process for depositing a copper film on a substrate
Inventor: RHEE SHI-WOO
IPC: C23C16/18
Filed: 1999-12-15
Granted: 2003-03-21
Abstract: An organocuprous compound of formula (I) of the present invention can be conveniently used in a low-temperature CVD process for the mass production of a contaminant-free copper film having good thermal stability, wherein: R1, R2 and R3 are each independently a C1-8 alkyl, C1-8 alkoxy, aryl or aryloxy group, R4 and R5 are each independently hydrogen, fluorine, a CnF2n+1 or CnH2n+1 group, n being an integer in the range of 1 to 6, R6 is hydrogen, fluorine or C1-4 alkyl group, and m is 1 or 2, when m is 1, C=C represents C≡C, and when m is 2, C=C represents C=C.
Patent TW-463130-B (TW)
Title: Access control device and access method
Inventor: INOUE TAKAO
IPC: G06F13/16
Filed: 2000-01-21
Granted: 2001-11-11
Abstract: The access control device is disclosed, it comprises of: several access ports (1, 2, 3) for storing the information about the access from CPU (16) for every access; bank controller (5), for controlling the using status of the several access ports (1, 2, 3), and send the using status to the CPU (16). The CPU (16) writes the information about the access into the un-used port of the several access ports (1, 2, 3) according the using status provided by the bank controller (5). The access control device thus provided has the function of never accessing to the error address, the load of the CPU process can be reduced, and the complex recording of the firmware is unnecessary.
Patent TW-490585-B (TW)
Title: Method of fabricating liquid crystal display device, and liquid crystal display device
Inventor: SAITO YOSHIMASA
IPC: G02F1/1337
Filed: 2000-01-25
Granted: 2002-06-11
Abstract: Exposure to polarized UV rays in liquid crystal display device fabrication realizes well-controlled liquid crystal orientation and stable and uniform pre-tilt angle expression in the devices fabricated. A UV-reactive film for liquid crystal orientation is formed on at least one transparent substrate for a liquid crystal cell, then polarized UV rays are applied to the film on the substrate that is aligned parallel to a reference plane, for controlled liquid crystal orientation, and the substrate having thereon the exposed film is rotated on the reference plane and is thereafter again exposed to polarized UV rays for pre-tilt angle expression.
Patent TW-461224-B (TW)
Title: Panel-shaped loudspeaker
Inventor: D HOOGH GUIDO ODILON MAURITS
IPC: H04R1/02
Filed: 2000-02-03
Granted: 2001-10-21
Abstract: Panel-shaped loudspeaker comprising a panel (1) and an exciter coupled to the panel. The panel is provided with two parallel extending thin walls (1a, 1b) which are interconnected by means of a structure of thin strip-shaped partitions (1c) situated between the walls. The longitudinal axes of all partitions extend parallel to each other and give the panel an anisotropic bending stiffness. The material of the walls and the partitions, used in the panel, has an internal damping which is at least 2.5% of the critical damping of the relevant material, used in the panel.
Patent TW-449777-B (TW)
Title: Systems and methods for controlling local environment
Inventor: BABIKIAN DIKRAN S
IPC: F24F5/00
Filed: 2000-02-10
Granted: 2001-08-11
Abstract: The present invention provides systems and methods of controlling local environment. In one embodiment, incoming air enters a contactor such the direct contact cooler-condenser (DCCC) where the air contacts water distributed on the contact media. After passing through the DCCC, the air is saturated at a temperature equal or close to that of the water. Depending on the state of the incoming air, in the DCCC will be humidified or dehumidified to yield saturated air at the desired humidity ratio. In one embodiment, a blower draws air through the DCCC and blows into the heater. The heater heats the air to the desired dry-bulb temperature. Before exiting, the air may pass through a filter.
Patent TW-441026-B (TW)
Title: Improved bond-pad with pad edge strengthening structure and single achoring structure
Inventor: CHEN CHIN-JONG
IPC: H01L21/768
Filed: 2000-04-18
Granted: 2001-06-16
Abstract: A bond pad structure for use in wire bonding applications during the packaging of semiconductor devices with reduced bond pad lift-off problem. The bond pad structure contains: (a) a metal bond pad formed in an open window area surrounded by an edge portion of a dielectric layer; and (b) at least one dendritic sub-structure formed in the edge portion of the dielectric layer. Alternatively, the bond pad structure includes; (a) a laminated structure containing a metal bond pad layer, a dielectric layer, and an underlying layer formed on a wafer surface; and (b) a single anchoring structure formed in said dielectric layer connecting said metal bond pad layer and said underlying layer. The single anchoring structure contains a plurality of line segments that are interconnected so as to form said single anchoring structure. The bond pad structure contains only a single anchoring structure, which can have the geometry of an open or closed ring with whiskers, a coil, an open or closed square-waved ring, a tree structure, a grid-line structure, a meandering structure, a serpentine structure, a spiral structure, or a labyrinth. Furthermore, an array of dendritic sub-structures can be provided extending from an outer edge of the anchoring structure to further improve stability. The dendritic sub-structure serves two main purposes. First, it creates an augmented contact area, and thus enhanced adhesive force, for the bond pad due to the newly created vertically extending contact surface between the metal bond pad layer and the dielectric layer in the dendritic sub-structure. Second, the dendritic sub-structure creates a discontinuity in the edge portion of the dielectric layer which can effectively intercept and thus stop the growth of cracks after they are formed.
Patent TW-464833-B (TW)
Title: Method of and apparatus for rendering image, recording medium, and program
Inventor: AOKI SACHIYO
IPC: A63F13/55
Filed: 2000-06-05
Granted: 2001-11-21
Abstract: A plurality of texture images of a single object as viewed from various viewpoints are generated and successively rendered in a texture area of an image memory. When a plurality of identical objects are to be rendered, a normal rendering process is performed on objects to be plotted in detail, or a texture image is selected from the generated texture images to render objects to be plotted simply, according to a predetermined decision criterion by a selective plotting means (212) of an image plotting means (204). Thereafter, a group of objects rendered in an image memory (34) are displayed on a display unit (16) by an image display processing means (216).
Patent TW-477015-B (TW)
Title: A process for fabricating oxides
Inventor: CHEN YUANNING
IPC: H01L29/51
Filed: 2000-06-29
Granted: 2002-02-21
Abstract: A process for forming an oxide layer includes forming a first oxide portion over a substrate at a temperature below a threshold temperature. A second oxide portion is formed under the first oxide portion at a temperature above the threshold temperature. The substrate is illustratively oxidizable silicon and the threshold temperature is the viscoelastic temperature of silicon dioxide.
Patent TW-462071-B (TW)
Title: Plasma display panel structure with high open ratio
Inventor: HUANG JIH-FON
IPC: H01J11/12
Filed: 2000-09-06
Granted: 2001-11-01
Abstract: There is disclosed a plasma display panel structure with high open ratio, whose phosphor layer is perpendicularly across the address electrode, and the rib is perpendicularly across the address electrode. By the way of cutting the transparent electrode, the present invention can resolve the problem of crossing interference. Furthermore, the cost of driving circuit can be reduced by increasing the number of address electrodes to simplify the driving method. The present invention can achieve the purpose of increasing the open ratio to raise the brightness of the plasma display panel.
Patent TW-I225877-B (TW)
Title: Resin composition having an improved low temperature impact resistance
Inventor: ARITA HIROAKI
IPC: C08J5/00
Filed: 2000-10-25
Granted: 2005-01-01
Abstract: The invented resin composition includes a polyether/polyamide segmented copolymer as a thermoplastic elastomer and, with reference to 100 weight parts of the thermoplastic elastomer, 0.1 to 10 weight parts of a glycol or its derivative. The glycol is a compound represented by the following formula (1): R<1> O(A<1> -O)l(A<2> -O)m(A<3> -O)nR<2> (1): (where each of R<1 > and R<2> represent a hydrogen atom; each of A<1>, A<2> and A<3>is, identical to or different from one another, an alkylene group having 2 to 4 carbon atoms; each of l, m and n is, identical to or different from one another, an integer of 0 or more, and l+m+n > 0) can be used. This resin composition can substantially improve the impact resistance at low temperatures while maintaining the tensile properties, flexural properties and heat resistance properties.
Patent TW-I281578-B (TW)
Title: Discotic-type twist-film compensated single-domain or two-domain twisted nematic liquid crystal displays
Inventor: LU MIN-HUA
IPC: G02F1/133
Filed: 2000-10-30
Granted: 2007-05-21
Abstract: A twist discotic-type liquid-crystal or liquid-crystalline film with negative birefringence is as a compensation film for either single-domain or two-domain liquid crystal display cells to achieve better view-angle characteristics, less color-shift as a function of applied voltage, and faster response times than uncompensated 90 DEG-twist single-domain or two-domain cells.
Patent TW-480591-B (TW)
Title: Manufacture method of quantum dot infrared sensor
Inventor: LIN SHR-YAN
IPC: H01L31/0304
Filed: 2001-01-15
Granted: 2002-03-21
Abstract: This invention provides a manufacture method of quantum dot infrared sensor, which uses molecular beam epitaxial technique to manufacture InAs quantum dot infrared sensor on GaAs substrate with material like AlGaAs, GaAs and InAs. The method contains the following steps: growing a first n type GaAs layer as a buffer layer on an undoped GaAs substrate; forming a first undoped high energy gap AlGaAs layer as a barrier layer; growing a quantum dot structure layer at high temperature; and growing a second n type GaAs as the surface bonding layer.
Patent TW-517501-B (TW)
Title: Quality based image compression
Inventor: THYAGARAJAN KADAYAM S
IPC: H04N19/176
Filed: 2001-03-20
Granted: 2003-01-11
Abstract: A system and method for quality-based image compression utilizing adaptively sized blocks and sub-blocks of discrete cosine transform coefficient data and a quality based quantization scale factor is claimed. A block size assignment element in an encoder element selects the block or sub-block of an input block of pixel data to be processed. Blocks with variances larger than a threshold are subdivided, while blocks with variances smaller than a threshold are not subdivided. A transform element transforms the pixel values of the selected blocks into the frequency domain. The frequency domain values are quantized either on a block by block basis or a frame by frame basis utilizing a scale factor that correlates with the quality of the image. The data is then serialized and coded in preparation for transmission.
Patent TW-I235491-B (TW)
Title: Integrated circuit
Inventor: RAMDANI JAMAL
IPC: H01L29/26
Filed: 2001-02-09
Granted: 2005-07-01
Abstract: High quality epitaxial layers of compound semiconductor materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline compound semiconductor layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. Integrated circuits incorporating these structures may be manufactured.
Patent TW-575551-B (TW)
Title: Process for the cleavage of alkyl tert-alkyl ethers into isoolefins and alkanols over acid catalysts
Inventor: SAKUTH MICHAEL DR
IPC: C07C29/10
Filed: 2001-02-13
Granted: 2004-02-11
Abstract: A method for the cleavage of alkyl tertiary-alkyl ethers (I) to the corresponding iso-olefins and alkanols by acid-catalysed reactive distillation, in which the distillation system comprises, in ascending order, a bottom zone (S), at least one distillation zone (D) and a reaction zone (R), into which the ether (I) is fed as an azeotrope with the alkanol.