baber/WOPTO huggingface dataset:
Patent TW-571551-B (TW)
Title: Detachable mobile phone
Inventor: OSHIMA KAZUYOSHI
IPC: H04W88/02
Filed: 2001-06-14
Granted: 2004-01-11
Abstract: Form open part 24 at the second connection part 22 over the second internal portion 2A, extending from connection hole 23 to second external portion 2B and ending at outside of second connection part 22. The open part 24 is set up the dimension and shape so that the embedded part 32a of hinge pin can pass the open part 24 to enter connection hole 23. Form enclosed part 25 of enclosed open part 24 on the second external part 2B. Form protrusion 26 entering the open part 24. The front face of the protrusion 26 is nearly in touch with the embedded part 32a.
Patent TW-497235-B (TW)
Title: Circuit board having center-directional package lands and ball grid array package using the circuit board
Inventor: KIM HYUNG-SEOP
IPC: H05K1/11
Filed: 2001-06-21
Granted: 2002-08-01
Abstract: A circuit board and a BGA package having improved reliability of a solder joint are disclosed. The circuit board has a chip mounting surface in which wiring patterns are formed and a solder ball mounting surface in which a plurality of solder balls are mounted and electrically interconnected to the wiring patterns. The circuit board comprises a plurality of ball lands each directly connected to the respective one of the solder balls; solder ball opening area defined by a solder ball mask generally deposited on the solder ball mounting surface and exposing the ball land from the solder ball mask; a plurality of pattern connecting means each connected to corresponding one of the ball lands; and conductive wiring patterns linked together with the pattern connecting means and electrically interconnected to the solder balls. The plurality of pattern connecting means are arranged toward a center point of the solder ball mounting surface.
Patent TW-476110-B (TW)
Title: Method to prevent the decrease of threshold voltage of metal oxide semiconductor from shallow trench isolation
Inventor: YE LING-YAN
IPC: H01L21/76
Filed: 2001-06-26
Granted: 2002-02-11
Abstract: This invention provides a method to prevent the decrease of threshold voltage of metal oxide semiconductor from shallow trench isolation. A plural number of shallow trench isolation are formed on a substrate to separate a plural number of first active areas and second active areas, in which the first active area is in the core circuit and the second active area is in the periphery circuit. A first ion implantation process is then carried out on the first active area and the second active area to form a plural number of well doped areas in the substrate of the first active area and the second active area, respectively. A second ion implantation process is further carried out on the periphery of the second active area and the first active area to form a second channel doped area and to adequately increase ion concentration at the periphery of the first active area, respectively. Finally, A third ion implantation process is performed on the first active area to form a first channel doped area on the first active area.
Patent TW-593060-B (TW)
Title: Bicycle sprocket with chain support projections
Inventor: TETSUKA TOSHIO
IPC: B62M9/124
Filed: 2001-06-29
Granted: 2004-06-21
Abstract: A sprocket assembly is provided for a bicycle having a large sprocket and a small sprocket. The large sprocket includes one or more chain support projections formed on the side surface opposed to the small sprocket. Each projection includes a contact portion defining a contact surface for contacting, without meshing, a lower end of a chain shifted from the small sprocket to the large sprocket. The projections are arranged on the large sprocket with a size and shape that allows the projections to pass between outer links prior to the gear-changing operation. The chain support projections are arranged for causing the contact surface to contact the chain engaging the small sprocket and pick up the chain radially outwardly of the large sprocket during a chain shift from the small sprocket to the large sprocket.
Patent TW-504743-B (TW)
Title: III-V nitride semiconductor laser device
Inventor: SONOBE MASAYUKI
IPC: H01S5/30
Filed: 2001-09-19
Granted: 2002-10-01
Abstract: A III-V nitride semiconductor laser device demonstrates an excellent emission characteristic without an increase in production cost. The refractive index of a p-side optical guiding layer is larger than that of an n-side guide layer.
Patent TW-508471-B (TW)
Title: Digital module for camera to obtain digital image
Inventor: TANG DE-MING
IPC: G03B17/48
Filed: 2001-09-28
Granted: 2002-11-01
Abstract: The present invention provides a kind of digital module, which can be installed inside a camera using a conventional film, to provide the image taking function. The digital module comprises an image processing apparatus formed in a plate shape and including an image converting apparatus, a storage apparatus and a control circuit. The image converting apparatus is disposed at the focused image forming position of the image-taking lens of the camera, to sense and convert the image obtained from the image-taking lens into an electronic signal. This electronic signal is stored in a storage apparatus to be a digital image data. The control circuit is used to control the operations of the image converting apparatus and the storage apparatus. The digital module is suitable for a camera with special functions. The camera having special functions comprises a conventional camera, a connecting portion, and a control system. The connecting portion provides the electrical connection with the digital module, and the control system is used for controlling the operation of the camera and the digital module.
Patent TW-539758-B (TW)
Title: A metallic sheet for ITO sputtering mask used in TFT-LCD and method for manufacturing the same
Inventor: WU YUAN-PENG
IPC: C23C14/54
Filed: 2001-10-05
Granted: 2003-07-01
Abstract: This invention relates to a metallic sheet, which is photo-etched as a mask for ITO sputtering, used in TFT-LCD. When it is too rough, it will scratch the glass, however, when too shining, the hands of the robot could not grasp it firmly and cause sliping and interruptting the automatic production line. This problem is solved by using a pair of rollers with two different surface roughness at the last step in a cold rolled line. The sheet consequently have two different surface roughness.
Patent TW-562737-B (TW)
Title: Method of manufacturing ceramic multi-layer substrate, and unbaked composite laminated body
Inventor: SAITOH YOSHIFUMI
IPC: C04B35/638
Filed: 2001-11-14
Granted: 2003-11-21
Abstract: A method of producing a ceramic multilayer substrate comprises the steps of: (a) producing a green composite laminate 11 containing the first and second shrink-suppressing layers formed on one main surface 13 and the other main surface 14, respectively, of a green multilayer mother substrate 12 comprising a plurality of ceramic green layers 17; (b) forming first grooves 16 extending from the side 13 of the first shrink-suppressing layer to pass through the first shrink-suppressing layer 13 and reach a part of the multilayer mother substrate 12; (c) firing the composite laminate 11; (d) removing the first and second shrink-suppressing layers 13 and 14 and taking out the sintered multilayer mother substrate 11; and (e) dividing the multilayer mother substrate 12 along the grooves 16, and taking out a plurality of the ceramic multilayer substrates. Thereby, the shrink in the plane direction during firing can be suppressed. Thus, a ceramic multilayer substrate having a high dimensional accuracy and a high reliability can be produced with a high production efficiency.
Patent TW-521042-B (TW)
Title: Ink jet recording apparatus
Inventor: FUJII KATSUYUKI
IPC: B41J2/18
Filed: 2001-11-15
Granted: 2003-02-21
Abstract: An ink supply device and a maintenance device are provided in a housing of an ink jet recording apparatus. These devices are disposed at one end of the housing in a direction in which a carriage is moved. The ink supply device supplies ink to a sub-ink tank through the side surface of the sub-ink tank. The maintenance device maintains ink jet recording heads at the bottom of the heads. A main ink tank and a tank for discharged ink are provided at the one end of the housing in the direction in which the carriage is moved. To replace the main ink tank or the tank for discharged ink, a front panel of the housing is opened. Trays are stacked at a lower portion of the housing. Each tray is drawn in the same direction as the direction in which the carriage is moved.
Patent TW-590970-B (TW)
Title: System for controlling warehousing/delivery and stocks in flat warehouse
Inventor: IINO NOBUHIRO
IPC: G05D1/02
Filed: 2001-11-29
Granted: 2004-06-11
Abstract: The object of the present invention is to provide a system for controlling warehousing/delivery and stocks in a flat warehouse, which can be easily introduced without reconstructing an existing building. The solution of the present invention is a system for controlling warehousing/delivery and stocks in a flat warehouse, preferably a freezing/refrigerating flat warehouse, which is characterized by automatically updating information on the warehousing/delivery and the stocks based on position confirming information of pallets carried on a forklift truck. The position confirming information is the one obtained by confirming the position of the pallet carried on the forklift truck with a transmitter carried on the forklift truck (on a mast) and a plurality of receivers arranged in the warehouse. The system for controlling warehousing/delivery and stocks in flat warehouse is characterized by comprising a computer for controlling warehousing; a computer for controlling the forklift truck; a physical distribution computer, means for confirming the position of the forklift truck by a forklift truck control computer connected to the transmitter carried on the forklift truck and the receivers arranged on the warehouse; and communication means for exchanging information between the forklift truck and the physical distribution computer. Incoming and outgoing articles data/picking data are received from CPU and performance data are returned thereto.
Patent TW-I243984-B (TW)
Title: Method and system for providing power fault tolerance in a network of chained computer system
Inventor: BANDHOLZ JUSTIN POTOK
IPC: G06F1/26
Filed: 2001-12-12
Granted: 2005-11-21
Abstract: A method and system for providing computer system for use in a network having a plurality of computer systems linked in a chain is disclosed. The method and system include providing a power supply, at least one input and at least one output for the computer system. The at least one input is for receiving power from a first portion of the plurality of computer systems and for providing power from the power supply to the first portion of the plurality of computer systems. The at least one output is for providing power from the power supply to a second portion of the plurality of computer systems and for receiving power from the second portion of the plurality of computer systems. In one aspect, the first portion of the plurality computer systems includes an upstream computer system and the second portion of the plurality computer systems includes a downstream computer system. In this aspect, the method and system also includes providing an input power control circuit and reverse current protection circuits for the computer system. The input power control circuit is coupled with the at least one input and is for controlling power provided to the computer system such that power is input to the computer system when the power supply does not function.
Patent TW-513853-B (TW)
Title: Limiter circuit
Inventor: MIYAGI HIROSHI
IPC: H03F3/191
Filed: 2001-12-21
Granted: 2002-12-11
Abstract: It is object to provide a limiter circuit capable of obtaining high gain. A limiter circuit included in FM receiver comprises, for examples, seven-stages amplifiers 11 through 17, and a BPF 18 inserted between them at nearly center. Each of the amplifiers 11 through 17 operates as a differential amplifier, and has gain of about 13dB. The BPF 18 passes a band component broader than a band of a signal intend to amplify as the limiter circuit. A 1/f noise can be reduced by removing a low-level component of a signal amplified by the four amplifiers 11 through 14. A thermal noise can be reduced by removing a high-level component of the signal amplified by the four amplifiers 11 through 14. Therefore, each of the amplifiers 15 through 17 connected at the BPF 18 subsequently is not saturated with a noise component.
Patent TW-594493-B (TW)
Title: New processor mode for limiting the operation of guest software running on a virtual machine supported by a virtual machine monitor
Inventor: NEIGER GILBERT
IPC: G06F9/455
Filed: 2001-12-24
Granted: 2004-06-21
Abstract: In one embodiment, a processor mode is provided for guest software. The processor mode enables the guest software to operate at a privilege level intended by the guest software. When the guest software attempts to perform an operation restricted by processor mode, the processor mode is exited to transfer control of the operation to a virtual-machine monitor, which runs outside this processor mode.
Patent TW-I250521-B (TW)
Title: Optical recording method and optical recording medium
Inventor: NOBUKUNI NATSUKO
IPC: G11B7/2433
Filed: 2000-05-12
Granted: 2006-03-01
Abstract: An optical recording method for recording mark length-modulated information on a recording medium by using a plurality of recording mark lengths. The optical recording method comprises the steps of: when a time length of one recording mark is denoted nT (T is a reference clock period equal to or less than 25 ns, and n is a natural number equal to or more than 2), (i) dividing the time length of the recording mark nT into eta1T, alpha1T, beta1T, alpha2T, beta2T, ..., alphaiT, betaiT, ..., alphamT, betamT, eta2T, in that order (m is a pulse division number; Sigmai(alphai + betai) + eta1 + eta2=n; alphai (1 <= i <= m) is a real number > 0; betai (1 <= i <= m-1) is a real number > 0; betam is a real number >= 0; and eta1 is a real number of -2 <= eta1 <= 2 and eta2 is a real number of -2 <= eta2 <= 2); radiating recording light with a recording power Pwi in a time duration of alphaiT (1 <= i <= m), and radiating recording light with a bias power Pbi in a time duration of betaiT (1 <= i <= m), the bias power being Pbi < Pwi and Pbi < Pwi+1; and (ii) changing m, alphai, betai, eta1, eta2, Pwi and Pbi according to n of the time length nT of the recording mark; wherein the pulse division number m is 2 or more for the time duration of at least one recording mark and meets n/m >= 1.25 for the time length of all the recording marks.
Patent TW-538528-B (TW)
Title: Electronic component incorporating an integrated circuit and a planar microcapacitor
Inventor: GIRARDIE LIONEL
IPC: C23C16/44
Filed: 2002-03-04
Granted: 2003-06-21
Abstract: Electronic component incorporating an integrated circuit made in a substrate (1) and a planar capacitor, characterized in that the capacitor is made on top of a metallization plane of the component, this metallization plane forming a first electrode (2) of the capacitor, and in that the capacitor comprises: a first oxygen diffusion barrier layer (5) deposited on top of the metallization plane (2); a stack (6) of several different oxide layers, each layer having a thickness less than 100 nanometres, the stack being deposited on top of the first barrier layer (5); a second oxygen diffusion barrier layer (7) deposited on top of the stack of oxide layers (6); a metal electrode (20) present on top of the second barrier layer (7).
Patent TW-578156-B (TW)
Title: Dual cell reading and writing technique
Inventor: CERNEA RAUL-ADRIAN
IPC: G11C16/26
Filed: 2002-05-28
Granted: 2004-03-01
Abstract: The cells of a memory cell array are programmed in a pair wise manner. The pairs are separated by at least one memory cell, reducing the possibility of interference between the pairs during programming. The memory cells are programmed individually by applying a relatively high voltage to one of the bit lines of each cell regardless whether the cells are to be programmed or not, while applying a lower voltage to the second bit lines, depending on whether the cells are to be programmed or not. This programming voltage assignment enhances the speed of programming. Furthermore, the pair wise programming scheme applies the necessary high voltages only half as often as in previous schemes to program all the cells of the array, increasing the lifetime of the memory system.
Patent TW-558872-B (TW)
Title: Delay-locked loop device and method for generating clock signal
Inventor: HO HENG-CHEN
IPC: H03L7/081
Filed: 2002-09-03
Granted: 2003-10-21
Abstract: A delay-locked loop (DLL) device and a method for generating a clock signal are disclosed. A plurality of output clock signals having difference phases are generated in response to a reference clock signal. The delay-locked loop device includes a controlled delay circuit, a phase detector and a control circuit. The method includes steps of receiving a reference clock signal; performing a phase-delaying operation on the reference clock signal by the controlled delay circuit to output a plurality of clock signals having difference phases; outputting an adjusting signal by the control circuit in response to the phase relationship between the reference clock signal and each of the output clock signals; and differentially delaying the output clock signals having difference phases by the controlled delaying circuit in response to respective adjusting signals.
Patent TW-571420-B (TW)
Title: Stack semiconductor chip package and lead frame suitable for such a stack package
Inventor: SONG YOUNG-HEE
IPC: H01L25/18
Filed: 2002-11-22
Granted: 2004-01-11
Abstract: A stack package has a lead frame and first and second stacked chips. The lead frame comprises first and second lead groups respectively corresponding to the first and second chips and a plurality of external connection terminals for electrically interconnecting the first and second chips to an external device. Each of the first and second chips has its own common and independent electrode pads, and each of the first and second lead groups has its own common and independent leads. The common leads and the common electrode pads are for address and control signals to and from the first and second chips, and the independent leads and the independent electrode pads are for data input and output to and from the first and second chips. The common leads of the first lead group and the common leads of the second lead group are commonly interconnected to be connected to an identical external connection terminal of the plurality of external connection terminals, and the independent leads of the first lead group and the independent leads of the second lead group are connected to different external connection terminal. The first and second chips are disposed symmetrically with respect to the common leads and face each other with their backsides. The stack package can be implemented by using two memory devices and two lead frames of LOC type and can increase two times the memory capacity and bit structure.
Patent TW-I231835-B (TW)
Title: A construction method of adding-soil cement piles
Inventor: ONODERA HIDETAKA
IPC: E02D5/46
Filed: 2002-11-22
Granted: 2005-05-01
Abstract: This invention provides a construction method of adding-soil cement piles able to construct precisely and quickly without making any earth waste, including following procedures: (1) positioning of cone 1; (2) excavation of a part of the designed construction depth of the adding soil cement pile in the first excavation section; (3) pouring hardening material 5 and stirring it with soil while excavating of the remained depth in the second excavation section; (4) pouring hardening material and stirring as well as excavating in the first excavated part in the third excavating section.
Patent TW-571385-B (TW)
Title: Manufacturing method of semiconductor device
Inventor: TAKAI RYOUHEI
IPC: H01L21/762
Filed: 2002-12-24
Granted: 2004-01-11
Abstract: Thermal oxide film and silicon nitride film are successively formed on a surface of silicon substrate. An opening is formed by conventional photolithography and etching. Field oxide film is formed by selective oxidation in the surface of the silicon substrate exposed at the bottom of the opening. When the measurement of the film thickness T of the silicon nitride film differs from its initially set value, the exposure dose in the photolithography for formation of the opening is changed from its initially set amount in accordance with a difference between the measurement and the initially set value of the film thickness, to change the resulting width of the opening from its initially set value. The length of the bird's beak is thus controlled, and the field oxide film is formed with a dimension as initially designed.
Patent TW-I246487-B (TW)
Title: Transmission for vehicle
Inventor: MATSUMOTO SHINYA
IPC: F16H3/091
Filed: 2003-01-28
Granted: 2006-01-01
Abstract: To provide a transmission for a vehicle which can be applied to a shift mechanism where a shaft itself is revolved, which has simple configuration and in which axial miniaturization is enabled. A transmission for a vehicle in which plural transmission shafts 63, 65, 67 each of which supports plural transmission gears in a row are arranged in parallel so that mutually corresponding transmission gears are engaged and transmission gears revolved in synchronization with the hollow shaft 630 (670) are selectively switched every transmission shaft is provided with a clutch mechanism provided between the hollow shaft 630 (670) and each transmission gear 632, 633, 634 for fitting the hollow shaft and each transmission gear or releasing the fitting and a clutch actuator 631 (671) housed in the hollow shaft 630 (670), and the clutch mechanism selectively fits any transmission gear to the hollow shaft according to the axial position of the clutch actuator 631 (671).
Patent TW-I254922-B (TW)
Title: Disk cartridge
Inventor: EUM JAE-YONG
IPC: G11B11/00
Filed: 2003-02-07
Granted: 2006-05-11
Abstract: A disk cartridge includes a lower case having an opening hold formed therein, an upper case, installed at the lower case to be capable of being open and shut while pivoting, for accommodating a disk together with the lower case, a shutter, installed at the lower case to be capable of sliding, for opening and shutting the opening hole, a close covering member having an inclined surface installed at the shutter to be capable of sliding, the close covering member closely contacting a non-information area at an inner circumference of the disk when the shutter is closed and being separated from the non-information area at an inner circumference of the disk when the shutter is open. Thus, when the shutter is closed, intrusion of dust is prevented so that the possibility of the information area of the disk being contaminated is lowered. Also, since the disk is fixed between the upper and lower cases, while the disk is carried, noise and damage can be reduced.