baber/WOPTO huggingface dataset:
Patent JP-H03193005-A (JP)
Title: Floor part ascending/descending type bed being able to extend the floor part
Inventor: KOYANAGI MASATO
IPC: A47C20/10
Filed: 1989-12-22
Abstract: PURPOSE:To extend the length of a floor part so that an undulation by turning, ascending and descending of the floor part and horizontal ascending and descending can be executed by supporting a screw shaft type flexible working rod for driving to allow the floor part to ascend and descend in a bed frame, and connecting a screw shaft of a flexible working rod and a driving shaft of a crank handle through a flexible connecting rod which can execute a rotational transfer. CONSTITUTION:A floor part extension frame member 5 is moved to a foot side end part member 2 side of a bed frame 1 and an engaging projection 20 is engaged to an engaging hole by energization of a spring 23. Subsequently, a footboard 16 is fixed in a state that it approaches the foot side end part member 2. An extension floor plate 24 is supported by a supporting link 26. A crank handle 8 is drawn out by sliding of a first driving pipe 9 and a first connecting rod 12 and a driving shaft 9 is rotated, a screw shaft is driven to rotate, and the floor part ascends and descends. Next, a first connecting rod 12 and a second driving pipe 14 are moved, and in a state that a flexible connecting rod 11 is extended, a transfer of torque is executed. Thereafter, the floor part extension frame member 5 is moved to a prescribed position. The laid-down extension floor plate 24 is supported on the same plane as other floor plate 27, and the floor part is extended.
Patent JP-H02177131-A (JP)
Title: Method and device for erasing/recording of optical recording medium
Inventor: ONO EIJI
IPC: G11B7/30
Filed: 1988-12-28
Abstract: PURPOSE:To sufficiently execute an erasion and to facilitate a tracking control of a laser spot by allowing an erasion use light beam to precede by one round or more obliquely in the forward direction against the advance direction of a recording use light beam, radiating it in a larger defocus state than the spot diameter of the recording use light beam and erasing an old signal. CONSTITUTION:A bit 4 in which an old signal on a guide groove 1 is erased by an erasion spot 3, an optical disk being an optical recording medium makes one rotation, and thereafter, a bit 5 in which a new signal is recorded is formed by a recording spot 2. The erasion spot precedes by one round or more from the recording spot and radiated in a defocus state, a focusing control and a tracking control are applied to only the recording spot, and the vicinity on the guide groove is irradiated with the erasion spot, while holding a relative position against the recording spot. Therefore, light sources of the recording spot and the erasion spot are integrated into the same optical head. In such a way, a control system can be operated easily, and also, a large erasion rate and a high signal-to-noise ratio are obtained.
Patent JP-H03192443-A (JP)
Title: Cache memory controller
Inventor: YOSHIDA TADAHIRO
IPC: G06F12/08
Filed: 1989-12-21
Abstract: PURPOSE:To start an arithmetic processing by an arithmetic processor without erroneous by writing an area, which is started from an arbitrary address desig nated by a host computer, to a cache memory when the host computer writes initial data and processing procedures to the main memory of each arithmetic processor. CONSTITUTION:A host computer 1 writes the initial data and the processing procedures to main memories 41 - 4n provided in respective arithmetic processors 21 - 2n. In such a case, the host computer 1 dispatches an address for the respec tive arithmetic processors 2-1-2n to start processing to cache memory controllers 51 - 5n. According to the applied address, the cache memory controllers 51 - 5n write contents shown by the address to cache memories 31 - 3n. Thus, since the initial data and the first processing procedure are written into the cache memory without fail, the arithmetic can be executed without erroneous cache when each arithmetic processor starts the arithmetic processing.
Patent JP-H06182981-A (JP)
Title: Ink jet recording apparatus
Inventor: YANO KENTARO
IPC: B41J2/05
Filed: 1992-12-15
Abstract: PURPOSE:To realize high speed recording and a high image grade by preventing the emission inferiority of a pre dotting nozzle being the bad effect of an alternate dotting while realizing the shortening of the max. retraction quantity of refilling being an alternate dotting effect and the increase effect of a refilling speed. CONSTITUTION:When emission driving alternately emitting ink from odd number nozzles and even number nozzles among many nozzles of a recording head is performed, the relation of a predotting and a post dotting is altered.
Patent JP-H05166935-A (JP)
Title: Semiconductor device and manufacture thereof
Inventor: MATSUDA TAKAYUKI
IPC: B23K26/00
Filed: 1991-12-18
Abstract: PURPOSE:To enable a fuse to be cut off by laser irradiation at a low output level by a method wherein an aperture part is formed at least in a part of an insulating film on a fuse of a redundant circuit. CONSTITUTION:During the etching step of an aperture part for bonding contact of an aluminum electrode 9 on a fuse of a semiconductor storage device, the film thickness of an insulating film on a fuse 4 for a redundant circuit formed on the lowermost layer wiring is specified to be 1800-1000nm by the etching step for 50-200% longer than the specific time for the etching step of a surface protective film 30 so that the laser output may be decreased from 0.8-1.0 microjoule to 0.3-0.4 microjoule. Through these procedures, any damages causing to a silicon substrate 5 and an adjacent wiring can be avoided.
Patent JP-H01173728-A (JP)
Title: Semiconductor device and manufacture thereof
Inventor: MINAMI KENJI
IPC: H01L21/822
Filed: 1987-12-28
Abstract: PURPOSE:To arrest the damaging effect of BMDs for manufacturing a semiconductor device in high reliability by a method wherein regions containing no BMDS are formed around semiconductor elements reaching a high concentration layer below a low concentration layer. CONSTITUTION:Within an epitaxial layer substrate comprising a high concentration layer 1 and a low concentration layer 2, bulk micro defects BMDs 3 are formed in the layer 1 by heat treatment. Next, after forming field oxide films 6 and a gate oxide film 5, trenches 11 reaching the layer 1 are cut. Later, the BMDs 3 around the trenches 11 are externally diffused from the inner walls of the trenches 11 to form the regions 12 containing no BMDs 3. Then, the gate oxide films 5 are provided on the inner walls of the trenches 11 to form polysilicon films 5 forming trench capacitors inside the trenches 11. Through these procedures, the damaging effect of BMDs 3 can be arrested to manufacture a semiconductor in high reliability and productivity.
Patent JP-H08248453-A (JP)
Title: In-line reproducing apparatus for reproduction of soliton light signal by synchronous modulation to soliton
Inventor: EMANIYUERU DESUURUBIRU
IPC: H04B10/18
Filed: 1995-12-22
Abstract: PROBLEM TO BE SOLVED: To provide a regenerating device which is capable of regenerating a soliton light signal in-line in an optical fiber link and high in reliability. SOLUTION: A soliton light' signal to be regenerated reaches through an input optical fiber F1. A tapping optical coupler C3 takes a part of a light signal, and a clock signal is taken from the light signal by a clock recovery means CLK. After that, the clock recovery means CLK adds a light clock signal to the control input terminal of NOLM(non-linear light loop mirror) through a coupler C2. A soliton signal always has the same wavelength λs . It is desirable to make the wavelength λh of a clock signal a little different from the wavelength λs of a soliton signal so that a clock signal can be removed by an output terminal of the device by a band-pass filter BPC taking the wavelength λs of a soliton as the central wavelength of the passing band.  A soliton signal is transmitted along the input optical fiber F1 until it reaches the input port 1 of the coupler C1 of NOLM.
Patent JP-H11167498-A (JP)
Title: Data processor
Inventor: MATSUMOTO TOSHIO
IPC: G06F11/14
Filed: 1997-12-05
Abstract: PROBLEM TO BE SOLVED: To provide a highly reliable data processor with excellent failure resistance so as to realize a failsoft by surely operating while suppressing the degeneration of a function even at the time of occurrence of a failure caused by a bug in a program to be executed by a data processor. SOLUTION: Normal operation firmware 40A and firmware for degeneration operation at the time of a failure 40B expressed in mutually different coding are housed in ROM 30A and 30B respectively. The firmware 40B is provided only with a required function being a part of the function of the firmware 40A. At first the firmware 40A is executed, but when a failure occurs, a switching means 32 switches to the execution of the firmware 40B read from ROM 30B. As the firmwares 40A and 40B do not share a bug with each other, the failure is removed.
Patent JP-H05140004-A (JP)
Title: Production of ethyl-substituted biphenyl compounds
Inventor: SHIMIZU ISOO
IPC: C07C15/14
Filed: 1991-11-26
Abstract: PURPOSE:To profitably obtain a 4-ethyl-4'-alkyl biphenyl useful as a raw material for heat-resistant high molecular materials from an industrially inexpensive polyethyltoluene mixture in a high selectivity and in a high production efficiency. CONSTITUTION:Biphenyl and/or a 4-alkylbiphenyl, e.g. 4-ethylbiphenyl or 4- methylbiphenyl, are reacted with a benzene compound or substituted benzene compound having at least one ethyl group in the presence of fluorosulfonic acid and/or a perfluoroalkane sulfonic acid catalyst of the formula (n is an integer of 1-8, preferably 1 or 6) preferably at a temperature of 0-250 deg.C to obtain 4,4'-diethylbiphenyl or 4-ethyl-4'-alkylbiphenyl in a better selectivity than by conventional catalysts. Further, since the method gives the objective compound in a high selectivity, the subject compound can readily be separated by a simple method such as a distillation method.
Patent JP-H04201253-A (JP)
Title: Printing cylinder replacing unit in printing press
Inventor: MARUTA KAZUO
IPC: B41F9/18
Filed: 1990-11-29
Abstract: PURPOSE:To replace a printing cylinder without cutting paper by separating the upper frame supporting the shaft of a first printing cylinder and the lower frame supporting the end part of the shaft of a second printing cylinder up and down and providing no driving gear on the side of the second side part. CONSTITUTION:In the detachment work of a replacing unit 2, at first, an arm 22 is revolved rearwardly to retract the second intermediate gear 25 to a position rearwardly separated from a blanket cylinder driving gear 39 and the first side part frame 32. A support disc 40 is revolved to separate an impression cylinder 30 downwardly from a blanket cylinder 29. The fixing of the replacing unit 2 and a printing press is released to move the replacing unit 2 to the right to draw out the same from the printing press 1. By this constitution, paper 42 passes through the gap between the upper and lower frames 34,35 of a left side part from the nip between the blanket cylinder 29 and the impression cylinder 30 to be detached from the replacing unit 2.
Patent JP-2000165039-A (JP)
Title: Manufacturing printed wiring board
Inventor: MIURA MICHIAKI
IPC: H05K3/46
Filed: 1998-11-26
Abstract: PROBLEM TO BE SOLVED: To reduce the positional deviations of an inner layer circuit pattern and an outer layer circuit pattern by correcting the positional deviation of the circuit pattern from a recognition mark and forming vias or circuit pattern on an outer conductor layer. SOLUTION: A metal foil layer of a metal lined board having laminated inner layer insulation layers 11 and inner layer conductor layers 12 is etched to form a circuit pattern and recognition marks 4, thus forming a core base 5, an outer layer insulation layer 13 and an outer layer conductor layer 14 are formed on the core base 5, a recognizer reads the recognizing marks 4 and recognizes the deviation of the inner layer conductor layer 12 from the location of the marks 4, as a correction reference position, mask windows are formed in the outer conductor layer 13 according to the correction reference position, the outer insulation layer 13 exposed through the mask windows is removed by a laser beam to form vias, the inner conductor layers 12 and the outer conductor layer 14 are electrically connected through the vias,  and the outer conductor layer 14 is etched by the subtractive method to form a circuit pattern.
Patent JP-H01179869-A (JP)
Title: Heat pump type refrigerating plant having ice making evaporator
Inventor: SAKON YUZO
IPC: F24F5/00
Filed: 1987-12-29
Abstract: PURPOSE:To resolve such problems as cooling medium deficiency at the time of switching the operation mode and a rupture of container by providing a liquid cooling medium line which has a shutoff valve between a low pressure liquid pipe which functions as cooling medium inlet to an ice making evaporator and the suction side of a compressor. CONSTITUTION:Four-way operation of heating, cooling, ice making, and simultaneous heating while making ice is possible in the present machine. When the operation is switched from the ice making mode or the simultaneous heating/ice making mode in which an ice making evaporator 9 is used to the heating or cooling mode which does not require the evaporator 9, the low pressure liquid medium collects in a portion from a low pressure liquid pipe 90 to an outer pipe 91. However, since such stagnant liquid cooling medium can be quickly recovered into the suction side of a compressor 1 through a liquid cooling medium recovery line 21 by opening a shutoff valve 11, the problem of the cooling medium deficiency at the time of the operation startup for heating or cooling after the operation mode was switched can be resolved. Further, because the evaporation in the outer pipe 91 is immediately stopped, the problem of rupture of the inner pipe 92 due to the volume expansion because of the ice growth can be resolved.
Patent JP-H06189122-A (JP)
Title: Method for conforming color or printed matter with the same of printer output material
Inventor: ISOZUMI HIROSHI
IPC: B41J5/30
Filed: 1992-12-16
Abstract: PURPOSE:To match the color of the printed matter of digital color data with that of a color printer output material by generating a large number of color samples extending over a whole color reproducing range, and conforming the color sample with the color of the color printer output material. CONSTITUTION:A color matching device equipped with a look-up table, an extractor, and a computing element is housed in the inside of a computer 2 or a color printer 3. A material to be printed is specified via film 6 for plate making generated from an image inputted from a scanner 1 or the digital color data directly inputted to the computer 2. Thence, plural color samples for data reproducible extending over the whole reproducing range in offset process print are generated so as to set the solid density and a dot gain in a specific range by using regulated printed matter and printing ink. Thereby, color matching between the printed matter 9 and a printer output material can be obtained.
Patent JP-H05177855-A (JP)
Title: Method for forming glaze layer on heating element forming substrate and thermal head substrate
Inventor: SHIRAISHI KAZUMASA
IPC: B41J2/335
Filed: 1991-11-26
Abstract: PURPOSE:To thickly form a glaze layer on a heating element forming substrate inclusive of the recessed part of the substrate so as to accurately obtain the thickness of the glaze layer immediately under a heating element row and to provide a thermal head substrate. CONSTITUTION:When a glaze layer is formed on a heating element forming substrate 3 having unevenness, a glaze layer 2a is formed on the protruding part of the substrate 3 by printing and a glaze layer 2b is formed on the recessed parts thereof by spraying. A thermal head substrate has the protruding part 3a formed on the heating element forming substrate 3, the glaze layer 2a formed on the top part of the protruding part 3a, the flat part 3b other than the top part of the protruding part 3a of the substrate 3 and the glaze layer 2b formed on the planar part 3b and wall surface parts 3c other than the protruding part 3a of the substrate 3 by spraying and a heating element row 1 is formed on the top part of the protruding part 3a.
Patent JP-2000162900-A (JP)
Title: Image-forming device
Inventor: UCHIDA TOSHIYUKI
IPC: G03G15/16
Filed: 1998-11-26
Abstract: PROBLEM TO BE SOLVED: To make overall body of a device miniaturized and cost reduced by minimizing the number of components. SOLUTION: This image-forming device is provided with a transfer unit 5 transferring a visual image formed on a photoreceptor 1 to transfer paper P in a state of being held in contact with the photoreceptor 1, and resist rollers pair 8 making the transfer paper P possible to be temporarily stopped before transferring the visual image on the transfer paper P, and to be transported again in exact timing for matching with the visual image formed on the photoreceptor 1. Meanwhile, the device is composed so as to make the one hand of drive roller 12 between the resist rollers pair 8 to concurrently serve as a roller for drive the transfer belt 9 of the transfer unit 5.
Patent JP-H10134577-A (JP)
Title: Dynamic ram
Inventor: KOYAMA YOSHIHISA
IPC: G11C11/409
Filed: 1997-12-08
Abstract: PROBLEM TO BE SOLVED: To stabilize an operation by a method wherein level compensation circuits are respectively connected to complementary data lines which are divided into two sides with sensing amplifiers at the center and a current compensating a precharge level is supplied to the complementary data line whose word line is in a non-selected state through switching gate MOS-FET's. SOLUTION: A memory array is divided into a pair of memory arrays MARY-L and MARY-R which are provided on the left and right sides of common sensing amplifiers SA in a data line direction. If the word line of the left memory array MARY-L is selected, transfer gate MOS-FET's Q5-Q8 are turned on by a timing signal ϕL and the sensing amplifiers SA are connected to the data line of the left memory array MARY-L. If the word line of the left memory array MARY-L is not selected, a voltage Vcc/2 which is formed by voltage dividing resistors R1 and R2 is supplied through switching gate MOS-FET's Q1-Q4 which are controlled by a timing signal barϕL'.
Patent JP-H08181263-A (JP)
Title: Manufacture of lead frame and mold device used for this
Inventor: YOSHIFUJI TATSUO
IPC: H01L23/50
Filed: 1994-12-22
Abstract: PURPOSE: To provide a lead frame excellent in heat efficiency at the time of performing wire bonding, performing reform without leaving internal residual stress, by pushing up the tip of an inner lead from the rear side of the tip of the inner lead, and reforming the tilt in the direction of die cutting caused at the tip of the inner lead. CONSTITUTION: A lead frame 12 is manufactured, which is provided with a semiconductor circuit element mount, inner leads arranged to surround the mount, and outer leads extended from them each in a required shape, and is used, being reversed when assembling a semiconductor device. In that case, after performing shape processing for forming each part in a required shape of a lead frame, the tip 13 of the inner lead is pushed up from the rear of the tip 13 of the inner lead so as to reform the tilt in the direction of die cutting caused in the tip 13 of the inner lead. For example, the tilt of the tip 13 of the inner lead caused in the direction of die cutting is reformed into the same plane as other member or into a warp condition by pushing up the tip 13 of the inner lead with a projection 15 for reform provided at a lower mold.
Patent JP-H09177222-A (JP)
Title: Floor structure of building
Inventor: NAKAO KAZUHIRO
IPC: E04B5/02
Filed: 1995-12-25
Abstract: PROBLEM TO BE SOLVED: To relieve the floor impact sounds and vibrations transmitted to the under-story through the floor satisfactorily by installing a floor equipped with a vibration absorbing material, joist, and sub-floor material on a basic floor structure formed by attaching structural boards to a floor joist. SOLUTION: A basic floor A of a building constructed by the framing construction method is formed by attaching structural boards 2, 2 onto a floor joist 1. On this basic floor A, a floor B is installed which is to relieve the floor impact sounds and vibrations transmitted to the under-story. This floor B is equipped with a vibration absorbing material 5 in a plate form which is small, elastically deformable, and installed on that part of the structural board 2 as mating with the floor joist 1, joist 6 placed on it, and sub-floor material 7 in a plate form installed on the joist 6. To maintain the condition that the vibration absorbing material 5 and joist 6 are laid one over the other, it is desirable that a thin band 3 is wound round and fastened to the basic floor A by nail, screw, or anchor.
Patent JP-H07203336-A (JP)
Title: Projection unit and projection type display device using same
Inventor: MORI SHIGERU
IPC: H04N5/74
Filed: 1993-12-28
Abstract: PURPOSE:To inexpensively provide a projection unit having high reliability and safeness capable of resisting workability for assembling or adjustment and use for a long period and a projection type display device using the unit. CONSTITUTION:The projection unit is constituted of a coupler 10, a display device (projection tube) 20, a lens element 30, a lens fixing member 40, packing members 50a, 50b, an optical transparent liquid 60, a projection tube pressing member 70, and a lens barrel 80. A light shielding part 44 for shielding light rays harmful to the formation of a projected picture with high contract out of light rays projected from the display device and passing the lens element 30 is arranged between the collar part 3a of the element 30 and the member 40. An outer wall 13 for preventing the liquid 60 leaked from the coupler 10 from being dispersed to the external is buldged out the outside of the peripheral wall 11a of the coupler 10 over the whole periphery. In addition, plural catches 42 to be engaged with the lens barrel 80 so as to be pressed to the coupler side are formed on the member 40.
Patent JP-H06163032-A (JP)
Title: Nonaqueous electrolyte lithium battery
Inventor: TSUKAMOTO HISASHI
IPC: H01M10/052
Filed: 1992-11-24
Abstract: PURPOSE:To heighten electrode filling density, and improve battery energy density by adding a binding agent to mixture formed by mixing meso phase globule carbon powder in graphite powder, and forming a negative electrode plate after it is applied to an electrode base body. CONSTITUTION:Polyvinyliden fluoride solution is added to mixture formed by mixing meso phase globule carbon powder in graphite powder, and it is agitated, and N-methyl pyrolidon is added to adjust viscosity, and it is agitated, and negative electrode paste is formed. After this negative electrode paste is applied to an electrode base body composed of an iron punched plate to which nickel metal plating is applied, and it is dried, and a negative electrode plate is formed. As for the paste formed by mixing a binding agent in the graphite powder, the viscosity is low, and when the meso phase globule carbon powder is mixed in this, the paste viscosity is improved, and thick painting of the negative electrode plate becomes possible. As for the meso phase golbule carbon powder, a lithium storing and releasing quantity is large, so that electrode filling density is improved. Thereby, battery energy density is heightened, and reliability is improved.