Patent GB-991197-A (GB)
Title: Electrical pulse generating circuit
IPC: H03K3/315
Filed: 1962-08-10
Abstract: 991,197. Semi-conductor gating, monostable and bi-stable circuits; cathode-ray tube circuits. TEKTRONIX Inc. Aug. 10, 1962 [Aug. 15, 1961; June 11, 1962], No. 30708/62. Headings H3T and H4T. In a circuit for controlling the flow of current through a gated circuit the gate is switched from one state to the other bv the output from a bi-stable circuit, and a control device is provided which resets the bistable circuit and gate to their initial condition after a predetermined time. As described, Fig. 1, positive going input pulses are fed via a transistor amplifying stage 34 to switch the bi-stable tunnel diode circuit 12 to its low voltage state. The change in potential across diode 12 cuts-off the gating transistor 10, allowing the current from the constant current valve 18 to flow to the rampforming capacitors 75, 76 or other capacitors selected by the switch 86. The ramp voltage produced goes progressively more negative at a constant rate and applies a forward bias to a comparator transistor 92 when the amplitude of the ramp exceeds the negative reference voltage applied to the base from a staircase generator 94. The resulting negative going potential at the collector of transistor 92 switches a tunnel diode 14 arranged in a monostable state circuit, producing a pulse which is transmitted to a third tunnel diode 122 also connected as a monostable state circuit, producing a single pulse which is amplified by transistor 144 to provide an output pulse for triggering the production of a sampling pulse, and also for triggering the staircase generator to add another increment to the staircase voltage to cause a further delay of the next pulse produced at the comparator output. The output from tunnel diode 14 is also fed via diode 16 to reset tunnel diode 12 and gate transistor 10 to their initial conditions ready for the next input pulse. In order to ensure diode 122 produces only one pulse for each of those from diode 14 a compensating inductor 112 is induced in its cathode when using slower ramp voltages. In a modification, Fig. 3 (not shown), such spurious pulses are prevented by replacing the monostable circuit comprising diode 14 by a bistable circuit which is reset by the trailing edge of the pulse from the monostable circuit comprising diode 122, the coupling 118, 120 to this circuit being replaced by a backward diode. A diode is also connected from the anode of valve 15 to the base of transistor 92 to protect transistor 10. The circuit described forms part of a sampling oscilloscope, Fig. 2, in which a train of pulses to be sampled are fed to a trigger pulse generator 46 which triggers the circuit 8 described above to produce a sampling pulse which gates open the sampling circuit 158 to allow a sample of the waveform to be applied to the vertical deflection plates. At the same time, the staircase generator, which is fed to the comparator to control the time at which the sampling pulse is produced, is applied to the horizontal deflection plates. Due to the fact that the staircase voltage applied to the comparator 92 increases in amplitude with each trigger pulse, the amplitude of the portion of the ramp voltage necessary to make transistor 92 conduct must also be progressively greater for successive ramp voltage pulses, so that successive sampling pulses are progressively delayed with respect to the successive input waveforms. These progressively delayed output trigger pulses allow the sampling of progressively later portions of successive input signal waveforms, so that each sample represented by a dot on the screen of the CRT reproduces a different portion of each successive waveform in the signal.