baber/WOPTO huggingface dataset:
Patent TW-424219-B (TW)
Title: Enhanced texture map data fetching circuit and method
Inventor: WANG VINCENT W
IPC: G06T15/10
Filed: 1997-12-20
Granted: 2001-03-01
Abstract: A circuit and method for increasing the processing efficiency of texture map data requests within a 3D subunit of a computer controlled graphics display system. The 3D graphics display subsystem includes a polygon engine, a texture map engine and a pixel pipeline. The texture map engine contains a texture map data access (TDA) circuit having a cache controller with a computer readable cache memory for containing recently used texture maps stored in (u,v) coordinate space. The cache controller is limited in handling only n cache miss operations simultaneously. In one embodiment, n is 1. The TDA circuit also contains a texture map address (TMA) FIFO memory unit for storing texture map addresses associated with texture data requests that hit or missed in the cache memory unit. Since the cache controller handles up to n misses, the texture engine stalls when the (n+1)<th> unprocessed texture request miss is encountered. Therefore, the TMA FIFO at any time contains at most n miss addresses therein. Processing efficiency is increased when a miss is encountered but the TMA FIFO contains unprocessed hit addresses. At this time, simultaneously with the cache controller fetching the texture data for the missed address, it can also advantageously: (1) supply data from the cache memory for the previously encountered and stored hit addresses; and (2) accept new hit addresses into the TMA FIFO thereby  effectively avoiding a texture engine stall. This is quite unlike the prior art systems which process no hit addresses upon a texture miss but rather stall the texture engine.
Patent TW-369755-B (TW)
Title: Recording device with communication functions
Inventor: KONTANI MASAKI
IPC: H04N1/387
Filed: 1998-02-10
Granted: 1999-09-11
Abstract: The present invention relates to a recording device with fax and other communication functions. It is capable of, when provided for recording image data, selecting a recording paper of a proper size for the image data, so as to keep the recording paper with minimum blank space or number of sheets. It has a function of turning the incoming copy with image data in 90 degrees before recording it on a card paper and selecting the use of card papers of a plurality of sizes. When recording said copy, before turning the card paper for recording of a copy and turning the copy into the recording paper, of a selected size. On the selected card paper, recording the copy b turning or not turning it.
Patent TW-369602-B (TW)
Title: Current sensor
Inventor: ISHIDA TOSHIO
IPC: G01R15/20
Filed: 1998-03-23
Granted: 1999-09-11
Abstract: A current detector is disclosed. The current sensor comprises a conductor where current to be measured flows, a convex portion provided on a part of the conductor, a galvanomagnetic element provided vertical with the direction of the current flowing through the convex portion under and inside thereof, and a magnetic slice for fixing and integrating these conductor, convex portion, and galvanomagnetic element with each other.
Patent TW-411256-B (TW)
Title: Girdle
Inventor: HORIE SHOJI
IPC: A41B9/04
Filed: 1998-05-22
Granted: 2000-11-11
Abstract: The present invention is to provide a girdle which not only moderately tightens the abdominal portion, brings hips up without giving tightness and pain to a user and manipulates body shape, but also provides elasticity in accordance with movements of the user. Said girdle is comprised of a front piece wherein an applied piece of cloth with elasticity is sewn in the middle portion thereof and a piece of almost one-way elastic cloth showing lengthwise elasticity is sewn on the both right and left sides of said applied piece of cloth, and a back piece wherein a piece of almost one-way elastic cloth showing lengthwise elasticity is sewn on an applied portion of gluteal vallecula.
Patent TW-434327-B (TW)
Title: Resin covered aluminum alloy sheet for can lid
Inventor: SHIMIZU KEIICHI
IPC: C25D11/18
Filed: 1998-06-03
Granted: 2001-05-16
Abstract: To provide resin covered aluminum alloy sheet having excellent adhesion after forming and corrosion resistance of the covered resin film and can lid manufactured by using the resin covered aluminum alloy sheet. Silane-treatment is given to aluminum alloy sheet by using silane coupling agent, and the resin is laminated on it. Or phosphate-chromate-treatment, zirconium treatment, or anodic oxidation is given to aluminum alloy sheet, then silane-treatment is given to the above-treated surface, and further resin is laminated on them.
Patent TW-439154-B (TW)
Title: Manufacturing method of field effect transistor having an anti-punchthrough implant channel
Inventor: CHEN JIN-LAI
IPC: H01L21/335
Filed: 1998-10-08
Granted: 2001-06-07
Abstract: There is provided a manufacturing method of field effect transistor having an anti-punchthrough implant channel, which comprises: forming an isolation structure on the substrate; covering a mask layer on the substrate; patterning the substrate to be formed with the gate, spacer and part source/drain for forming an opening; next, performing a ion implantation step to form an anti-punchthrough implant channel in the substrate; after removing the mask layer, forming a gate in the opening; and performing a light doping drain step to form the source/drain. This method is able to decrease the contact area between the anti-punchthrough implant channel and the source/drain, thereby decreasing the junction capacitance and further increasing the operating speed of the field effect transistor.
Patent TW-396687-B (TW)
Title: Tuneable add/drop multiplexer
Inventor: AUGUSTSSON TORSTEN
IPC: H04B10/27
Filed: 1998-11-17
Granted: 2000-07-01
Abstract: The present invention relates to a tuneable add/drop demultiplexer. The add/ drop mulyiplexer includes at least one NxN MMI-waveguide (10), where N>=3, at least N-number of Michelson waveguides (31, 32, 33 and 34), at least one Bragg grating (62, 64 and 66) per Michelson waveguide (31, 32, 33 and 34) and at least one phase control element (51, 53, 55 and 57) in at least N-1 number of Michelson waveguides (31, 32, 33 and 34). The michelson waveguides (31, 32, 33 and 34) include said phase control elements (51, 53, 55 and 57) and said Bragg gratings (62, 64 and 66) and are couples to at least one MMI-waveguide (10). Each Michelson waveguide (31, 32, 33 and 34) can be provided with a broadband reflection section (70). The invention also relates to a method for tuneable add/drop multiplexing, the use of a wavelength selective switch as a tuneable add/drop multiplexer and the use of a tuneable add/drop multiplexer as a wavelength selective switch.
Patent TW-493133-B (TW)
Title: Debugging method for irregularity of keyboard input system
Inventor: TSAI JIUN-NAN
IPC: G06F3/02
Filed: 1999-01-27
Granted: 2002-07-01
Abstract: An debugging method for irregularity of keyboard input system, which uses the intercept method to obtain the input data at the keyboard controller in connection with the system scanning codes and the character codes obtained from the keyboard servicing processing procedures, and the testing results under different testing conditions, for determining the portions occurring the errors with the most possibility when occurring the irregular keyboard scanning codes.
Patent TW-421951-B (TW)
Title: Method and apparatus for transferring identifier information in a telecommunications system
Inventor: LARSSON PETER
IPC: H04W92/10
Filed: 1999-03-17
Granted: 2001-02-11
Abstract: In a wireless telecommunications network, transporting identification information, such as access point identifier (AP ID) and wireless terminal identifier (WT ID) information, in each uplink and each downlink protocol data unit (PDU) being transmitted between a sender and a receiver, without increasing bandwidth requirements. This is accomplished by modifying each PDU as a function of a first identification vector, prior to transmission, wherein the first identification vector reflects, for example, the AP ID and the corresponding WT ID. At the receiver, the PDU is re-modified as a function of a second identification vector, wherein the second identification vector reflects an expected AP ID and WT ID. If the receiver is the intended recipient of the PDU, the first and second identification vectors will be the same, and the process of re-modifying the PDU merely serves to restore the original value of the PDU. The receiver can detect whether the original value of the PDU has been restored through a data integrity check, for example, one which employs a cyclic redundancy code (CRC). The result can then be used to determine whether the receiver is, in fact, the intended receiver, and whether the receiver should decode the PDU or discard it.
Patent TW-392037-B (TW)
Title: Heat exchanger
Inventor: FUKAMACHI MASATOSHI
IPC: F01P11/10
Filed: 1999-03-23
Granted: 2000-06-01
Abstract: A heat exchanger is connected directly or through connecting members to a water-cooled internal combustion engine. The heat exchanger comprises a heat radiating unit comprising a plurality of round cooling water tubes of a circular cross section and plate-shaped heat radiating fins fixed to and longitudinally arranged on the cooling water tubes at intervals, and a pair of  tanks disposed n the opposite sides of the heat radiating unit, respectively, and joined to the opposite ends of the plurality of cooling water tubes.
Patent TW-434361-B (TW)
Title: Protection device of cylinder lock
Inventor: HASHIMOTO AKIHIRO
IPC: E05B29/08
Filed: 1999-04-07
Granted: 2001-05-16
Abstract: The protection device of cylinder lock consists of a cylinder lock, a stop cap, a magnetic lock, a lit key, and a magnetic key. The protection mechanism is to move the stop cap to close position then keep it there by the magnetic lock to close the keyhole and prevent any intentional damage. And to disclose the keyhole by two steps: (1) to unlock the magnetic lock by magnetic key; (2) to move the stop cap to open position. This protection device is especially useful for motorcycle.
Patent TW-473568-B (TW)
Title: Compressed batt having reduced false loft and reduced false support
Inventor: WO KONG KWOK
IPC: D04H1/42
Filed: 1999-05-25
Granted: 2002-01-21
Abstract: A batt, which may be used for a mattress, a seat cushion or a ground pad for a sleeping bag, is compressed so that it has reduced false loft and reduced false support, and is therefore more durable for consumer use. The batt is compressed so that, when subjected to use for an average life cycle (usually six years), it has a thickness reduction of less than 15% and a reduction of load-at-half-height of less than 40%.
Patent TW-516273-B (TW)
Title: Multiple PLL for data recovery
Inventor: HUANG JEN-JR
IPC: H03L7/08
Filed: 1999-05-21
Granted: 2003-01-01
Abstract: The invention provide a multiple PLL for a dead zone capable of reducing clock jitter and tolerating bigger data random jitter by virtue of a multi-phase voltage control oscillator to generate various multi-phase clock signal to test the variation edge of data signal and generate and output multiple sets of control signals (upk/dnk) accordingly, making the variation between phase errorθe and voltage Vd of the multiple PLL adjustable to close to linear relationship. As such, the multiple PLL provides no dead zone therefore to be able to lower clock jitter and tolerate bigger data random jitter.
Patent TW-480419-B (TW)
Title: Method and apparatus for storing reference codes in a writing instrument and for retrieving information identified by the reference codes
Inventor: BUCKLEY JOHN E
IPC: G06F3/0354
Filed: 1999-09-02
Granted: 2002-03-21
Abstract: An interactive data transfer system and method is provided. In embodiments of the invention, the data transfer system includes a computing device, and a data well for interfacing with an elongate instrument, the elongate instrument having a data transfer end with a data transfer tip. The data well has a housing with an opening for receiving the data transfer tip of the elongate instrument. The data well also has a communications port operatively coupled to the computing device to provide data to the computing device, and the data well has a data communication device contained in the housing for interfacing with the data transfer tip when the data transfer end of the elongate instrument is received in the opening. The computing device is programmed to receive data from the data well. The received data includes data indicative of least one address on a global communications network. The computer device is also programmed, upon receipt of the at least one address, to launch an application to retrieve information related to the at least one address from the global communications network and transmit such information to the computing device.
Patent TW-546754-B (TW)
Title: On-the-fly automatic defect classification for substrates using signal attributes
Inventor: RAVID EREZ
IPC: G01N21/956
Filed: 1999-07-16
Granted: 2003-08-11
Abstract: A system for on-the-fly automatic defect classification (ADC) in a scanned wafer. The system includes a light source illuminating the scanned wafer so as to generate an illuminating spot incident on the wafer. Sensor collecting light scattered from the spot by the at least two spaced apart detectors, and processor analyzing the collected light so as to detect defects in the wafer and classifying the defects into distinct defect types.
Patent TW-435032-B (TW)
Title: Wireless coupling of standardized networks and non-standardized nodes
Inventor: SATO TAKASHI
IPC: H04L29/06
Filed: 1999-08-04
Granted: 2001-05-16
Abstract: A method and apparatus are provided for establishing wireless communications between multiple standardized information networks and non-standardized information devices. Communicating networks may operate in accordance with the same or different standards. For each network, virtual proxy nodes are formed which represent each of the other communicating networks and each of the non-standardized information devices.
Patent TW-441124-B (TW)
Title: Electrostatic discharge protection device for semiconductor integrated circuit, method for producing the same, and electrostatic discharge protection circuit using the same
Inventor: KAWAZOE HIDECHIKA
IPC: H01L29/74
Filed: 1999-08-25
Granted: 2001-06-16
Abstract: An electrostatic discharge protection device according to the present invention is provided at an input or an output of a semiconductor integrated circuit for protecting an internal circuit of the semiconductor integrated circuit from an electrostatic surge flowing into or out of the semiconductor integrated circuit. The electrostatic discharge protection device includes: a thyristor; and a trigger diode for triggering the thyristor with a low voltage. The trigger diode includes: an n-type cathode high impurity concentration region; a p-type anode high impurity concentration region; and an insulator section for electrically insulating a silicide layer formed on a surface of the n-type cathode high impurity concentration region from another silicide layer formed on a surface of the p-type anode high impurity concentration region.
Patent TW-418319-B (TW)
Title: A device for measuring forces generated by a balance error of a rotor
Inventor: GOEBEL EICKHART
IPC: G01M1/16
Filed: 1999-09-01
Granted: 2001-01-11
Abstract: A device for measuring forces that are generated by an unbalance of a rotor 1, in particular a motor vehicle wheel, with a measuring shaft 2 mounted rotating on its axis 23, to which the rotor 1 for measuring is attached, and a mounting 3-displaying a force sensor 4,5-of the measuring shaft 2 on a stationary frame 6 wherein the mounting 3 has an intermediate frame 7 against which the measuring shaft 2 is supported via a first force sensor 4 and at least one virtual mounting position 24 and the intermediate frame 7 is supported on the stationary frame 6 via a further force sensor 5. In this way, reduced force dynamics compared to conventional machines with floating mounting.
Patent TW-419723-B (TW)
Title: Method of fabricating the capacitor array and its peripheral trench mask
Inventor: LIAU WEN-SHIANG
IPC: G03F1/00
Filed: 1999-10-12
Granted: 2001-01-21
Abstract: A method of fabricating the cylindrical or elliptical capacitor array and its peripheral trench mask, comprising: first design the pattern of the cylindrical or elliptical capacitor array by CAD (computer aided design) software; and then use CAD software to form the pattern of peripheral trench, wherein the pattern of the peripheral trench is the same as that of the cylindrical or elliptical capacitor array; and it also includes a plurality of connection patterns for connection. Finally use the pattern of the cylindrical or elliptical capacitor array and peripheral trench to fabricate the mask.
Patent TW-440515-B (TW)
Title: Method for inspecting molded article and injection molding machine provided with inspection device thereof
Inventor: SEKI MITSUNORI
IPC: G01M11/08
Filed: 1999-11-09
Granted: 2001-06-16
Abstract: Conventional stress inspection device is of a large size and requires placement over a tabletop, and are thus inconvenient in applications at a narrow and complicated processing site. Further, the measures of manually holding polarizing plates and using final products to cover up light are unsteady. Not only is the lighting dimmed so as to prevent from observing the entirety of the final products, but the holding force or temperature of the hand may also effect the inspection outcomes. In the invention, a residual stress in a molded article 14 is inspected by a method wherein a displaying instrument 7 is wholly made to a displaying screen with high brightness by setting by means of a control device 16 and the molded article 14 placed between two polarizing plates 15, 15 wherein polarized lights intersect at right angles each other is observed by using the screen as a light source. In addition, guides 10 and 10 storing the polarizing plates 15 or the polarizing plates 15 and the molded articles 14 are provided around the front face of the displaying instrument 7.
Patent TW-430975-B (TW)
Title: Electrostatic discharge protection circuit without gate over-biased effect
Inventor: KER MING-DOU
IPC: H01L23/60
Filed: 1999-11-29
Granted: 2001-04-21
Abstract: The present invention provides an electrostatic discharge protection circuit without gate over-biased effect. The electrostatic discharge protection circuit is coupled with a bonding pad and a power port. The electrostatic discharge protection circuit comprises an ESD detection circuit coupled with the bonding pad for detecting the voltage on the bonding pad and outputting a trigger voltage; and, a ESD protection MOS having a gate coupled with the ESD detection circuit for releasing the electrostatic discharge stress of the bonding pad while receiving the trigger voltage. The gate voltage of the electrostatic discharge protection MOS is clamped by a voltage clamp circuit to prevent the electrostatic discharge protection MOS from generating surface channel to cause the electrostatic discharge current flowing through the surface channel and to damage the electrostatic discharge protection MOS.
Patent TW-441019-B (TW)
Title: Manufacturing method of copper damascene
Inventor: LIN BI-TIAU
IPC: H01L21/768
Filed: 2000-02-23
Granted: 2001-06-16
Abstract: There is provided a manufacturing method of copper damascene, which only forms copper seed layer in the damascene trench, but not on the outside of the damascene trench. In stacking the copper, there is crystalline copper with a good lattice arrangement stacked on the position with copper seed, and there is a smaller amount of amorphous copper formed on the position without copper seed. The hardness of the amorphous copper is smaller than that of the crystalline copper. Therefore, it is able to use a chemical mechanical polishing with a lower pressure and general slurry to remove the amorphous copper outside, and the crystalline copper is used to form the copper damascene having a planar surface.
Patent TW-521323-B (TW)
Title: Semiconductor device and the manufacturing method thereof
Inventor: FUKIAGE NORIAKI
IPC: H01L23/532
Filed: 2000-03-17
Granted: 2003-02-21
Abstract: The object of the present invention is to provide a diffusion preventing film capable of inhibiting diffusion of Cu into an insulator film when Cu is used as a wiring material. This object is attained by forming the diffusion preventing film from a crystalline WCN film. The WCN film, when subjected to X-ray diffraction, shows peaks at a first position between 36 DEG to 38 DEG and at a second position between 42 DEG to 44 DEG. The half-width of the peak at the first position is 3.2 DEG or less, and the half-width of the peak at the second position is 2.6 DEG or less. Since the WCN film has satisfactory coverage, it can form a thick barrier film in a concave with a high aspect ratio (length/width).
Patent TW-469436-B (TW)
Title: Semiconductor memory device
Inventor: EDO SACHIKO
IPC: G11C7/10
Filed: 2000-04-05
Granted: 2001-12-21
Abstract: The purpose of the present invention is to provide a semiconductor memory device for simultaneously reading data of a plurality of bits from its memory cell region and outputting only arbitrary data selected to an external environment in accordance with the high speed data output period. According to the present invention, each bit of data read simultaneously from the memory cell array MSA is amplified to the logic level by the data amplifier DA0 to DA7. At this time, by reading the mask signal RM0 to RM7 to control the action of each data amplifier, only the preset bits arbitrarily selected are amplified and outputted as usual, the amplified output can be fixed on an L level by the other bits, and it is converted into serial data by the parallel connected conversion circuit P-Se and P-So, then it is sequentially outputted synchronously with the multiplexer MUX and the rising and falling edges of the basic clock CLK and applied to the NMOS transistor NTR of the open circuit drain output circuit. Thereby, the output other than the preset bits of the output solder pad PA is maintained at Hi-Z.
Patent TW-463202-B (TW)
Title: A fluorescent lamp and methods for making electrode assemblies for fluorescent lamps
Inventor: HUTCHERSON R KENNETH
IPC: H01J61/067
Filed: 2000-06-27
Granted: 2001-11-11
Abstract: A fluorescent lamp comprises a glass tubular body defining a discharge space, and first and second electrode assemblies mounted in the discharge space in opposition to each other, each of the electrode assemblies comprising a first electrode and a second electrode. Each of the first electrodes comprises a metal lead wire with an electron-emitting material disposed on a free end thereof, and each of the second electrodes comprises a cup-shaped tube coaxially surrounding one of the first electrodes and the electron-emitting material disposed on the first electrode. The second electrode tube and the electron emitting material therein form an annular gap therebetween.
Patent TW-I262180-B (TW)
Title: Synthetic intermediate for benzoimidazole compound and preparation thereof
Inventor: KISHI NAOYUKI
IPC: C07D277/00
Filed: 2000-06-27
Granted: 2006-09-21
Abstract: Synthetic intermediate for benzoimidazole compound or its salt which possesses excellent action to reduce blood-glucose and preparation thereof are provided. A preparation for preparing benzoimidazole compound (I) which is characterized by condensing amine derivative (III) with carboxylic acid derivative (II) as formula, (wherein, R1 is C1-C6 alkyl group or C1-C6 alkoxy group, etc, R2 is C1-C6 alkyl group, R3 is hydrogen atom or protective group) into compound (IV), and closing the ring in the presence of acid.