Patent GB-1314618-A (GB)
Title: Key controlled electronic security system
IPC: G07C9/00
Filed: 1970-12-18
Abstract: 1314618 Locks R B PHINIZY 18 Dec 1970 [31 Dec 1969] 60114/70 Heading E2A [Also in Division G4] A key actuated electronic security system includes a pair of keys each having a plurality of electrical paths in a binary code, combination of closed and open paths, first means for receiving said first one of said keys and providing electrical interconnection with individual ones of the paths of said first key; second means for receiving the second one of said keys and providing electrical interconnection with individual ones of the paths of said second key; voltage supplying means connected to said key receiving means, means connected to said receiving means for electrically compassing respective ones of the paths of said keys and operative to deliver an output signal when there is a predetermined relationship between said respective ones of the paths of said keys and means responsive to said output signal for indicating said predetermined relationship between said ones of the paths of said keys. A first system is shown in Fig. 1 the two keys being K1 and K2 and the key receiving means being receptacle 23 for the key K1 and 27 for the key K2; in each key the open circuit paths 13b, 13m, 13q, 13r 13s for the key K1 and 19a, 19n, 19p, 19r for the key K2 are continuous with a conductor 15 and 21 respectively whereas the closed paths 13a, 12n, 13p for the key K1 and 19b, 19m, 19q for the key K2 are separated by a gap from the conductors 15 and 21; the paths are complementary in the two keys, thus path 13a of key K1 is closed whereas the corresponding path 19a of key K2 is open. The receptacles have contacts for engaging each of the paths, 25a to 25s of receptacle 23, and 29a to 29r of receptacle 27; contact 25s is connected to a potential of +V volts provided by a power supply circuit 51 and contact 25q is connected to both a driver circuit 47 (details of which are given in the Specification) for a latch bolt and an alarm relay 57; when the key Kl is inserted into the receptacle 23 the contact 25s is connected to the contact 25q so that the voltage +V is applied to the driver circuit and to the alarm relay, the arrangement ensuring that the alarm will sound if an incorrect key is inserted into the receptacle 23; in such situation the driver circuit will not release the latch bolt since an inhibit circuit 43 (details of which are given in the Specification) which normally holds the driver circuit inoperative continues to hold it inoperative. The alarm circuit is disabled when a correct key is inserted into the receptacle 23 as described below. The remaining contacts 25a to 25q of the receptacle 23 are connected via isolation diodes 55a to 55q to the input 35a to 35q of a NAND gate 33; the inputs of the NAND gate are also connected to the contacts 29a, 29q of the receptacle 27 the remaining contact 29r of the receptacle 27 being connected to a voltage source 53 which applies a voltage of ¢V to it; the arrangement is such that the contact 25a or the receptacle 23 and the contact 29a of the receptacle 27 are connected to the same input 35a of the NAND gate 33 and so on. Thus if the correct complementary keys are in the two receptacles each input of the NAND gate is driven high either by the voltage +V from the power source 51 via the key K1 and the contacts of receptacle 23 or by a voltage ¢V from the power source 53 via the key K2 and the contacts of receptacle 27 and this causes the output of the NAND gate to go low; however an incorrect key in the receptacle 23 will leave one or more of the inputs of the NAND gate 33 low so that its output remains high. The output of the NAND gate is connected to one input of an OR gate 39 and via amplifier 41 to the inhibit circuit 43; if the output of the NAND gate 33 is high the output of the OR gate 39 will also be high and the inhibit circuit 43 will prevent operation of the driver circuit and thus of the solenoid 49. The OR gate 39 has a second input connected to a threshold detector 59 which if the voltage applied to contact 29r of receptacle 27 exceeds ¢V applies a high signal to OR gate 39 so that the output of the OR gate is held high so that the inhibit circuit 43 remains operative to prevent release of the latoh bolt; the voltage of contact 29r can be higher than ¢V if a voltage of +V is applied across all of the contacts of receptacle 23 because of the interconnection of the two receptacles and without the threshold detector this would cause the output of the OR gate 39 to go low since under these conditions the output of the NAND gate 33 goes low; one of the contacts of the receptacle 23 is also connected to a voltage detector 61; the circuit is such that if the potential on the particular contact connected to the voltage detector is either zero or +V volts normal operation of NAND gate 33 is permitted, however if a potential of ¢V is applied to the particular contact in an attempt to pick the lock, the voltage detector holds the NAND gate 33 non- conductive via lead L4 causing the output from the NAND gate to be high which inhibits operation of the latch bolt. Contact 25a, which when the key K1 is inserted into receptacle 23, engages the closed path 13a so that no voltage is applied to the contact 25a can be connected via diode 65 to another input of the OR gate 39 this would cause the output of the OR gate 39 to remain high and so inhibit operation of the driver circuit and cause the alarm circuit to operate if an incorrect key is inserted into the receptacle 23 which connects the conductor 15 and hence the voltage +V to the contact 25a; any of the other contacts of the receptacle 23 which engage non-continuous paths of the key can be used for this purpose. A modification of the system is described in which the key K1 has a capacitor connected between the two parts of one of the closed paths and provided the circuit is fed with rectified AC without removing the ripple component, the ripple component of the power supply will pass through the capacitor and be rectified by the appropriate protection diode connected to the particular contact and will be applied as a direct voltage to the appropriate input of the NAND gate 33; when this arrangement is used the complementary path in the key K2 must be a closed path without a capacitor. An alternative circuit is described (Fig. 4, not shown) in which the two keys have identical closed and open paths except that the users key has two more closed paths than the other key, a plurality of Exclusive-OR gates connected to a NOR gate replace the NAND gate 33 of the first embodiment to allow for this difference but the operation is otherwise similar. The circuit can be modified to one in which there is a complementary relationship between the paths of the keys by providing invertors between the outputs of the Exclusive OR gates and the input of the NOR gate; alternatively Exclusive NOR gates could be substituted for the Exclusive OR gates. Figs. 6 and 7 show a system in which there are a plurality of remote stations 201a, 201b, 201m &c. and the central station 209; each of the remote stations has a key receptacle 203 and the central station has a number of key receptacles 211a, 211b &c. corresponding to the number of remote stations, each key receptacle being associated with a single remote station only and the corresponding pairs of these being different from all the other pairs and having a complementary relationship as described for the Fig. 1 embodiment. The central station and the remote stations are interconnected by a single cable 207 which includes a plurality of individual conductors. In the central station is a free running multivibrator which supplies a train of clock pulses to an interrogate code generator 227 this consists of a ring-counter which provides as many codes as there are remote stations, a different code for each station, and the ring counter running cyclically through the codes and changing from one code to the next for every clock pulse. The codes are applied via a set of conductors 219 in the cable 207 to the remote stations, each station having a decoder 233 which every time it receives its particular code applies a voltage via a conductor 235 to contact 237a of the receptacle and provided the key is in the receptacle the voltage is applied via the paths of the key to other contacts of the receptacle depending upon the coding of the key and via a conductor 221b, c &c. back to the central station; the conductors 221b, c &c. are connected via isolation diodes to the receptacles in the central station and provided the correct key is in the socket at the remote station in view of the complementary relationship of the two keys no voltage will be applied to the common conductor of the key for that station in the central station; each receptacle in the central station in addition to the contacts connected to the lines 221b, c &c. has a contact which is connected to one input and an AND gate, in the case of receptacle 245m this is contact 245mn, and the corresponding AND gate is 247m; hence there is no voltage on the common conductor of the key in receptacle 211m and no voltage is applied via the contact 245mn to one input of the AND gate 247m which thus is held low and consequently the output of the AND gate will be low despite the fact that its other input is connected to a decoder 229 which in turn is connected to the interrogate code generator; since the remote station can only apply code signals to the receptacle when the appropriate code has been received the decoder 229 in the central station which receives the same code at the same time will apply a high signal to the second input of the AND gate 247m. The AND gates 247a, b, m &c. are connected by a common conductor to one input of a NOR gate 251, a second input of which is provided by a closed circuit 255 the purpose of which will be described later; the output or the NOR gate 251 will be high so long as neither