Patent GB-828332-A (GB)
Title: Improvements in phase responsive bistable devices
Inventor: STEAGALL WILLIAM FRANCIS
IPC: H03K3/45
Filed: 1956-10-01
Abstract: 828,332. Magnetic amplifiers. SPERRY RAND CORPORATION. Oct. 1, 1956, No. 29872/56. Class 40 (9). A circuit which includes a saturable magnetic core produces output pulses during the 1st, 5th, 9th, &c. half-cycles of an A.C. power supply and, in response to an input pulse in one of the 2nd, 6th, 10th, &c. half-cycles, produces the output pulses during the 3rd, 7th, 11th, &c. half-cycles, a further input pulse in one of the 4th, 8th, 12th, &c. half-cycles causing the production of output pulses to revert to the 1st, 5th, 9th, &c. half-cycles. To achieve the above objective the invention utilizes as components the saturable core circuits of Figs. 2 and 4, which show complementing and non- complementing magnetic amplifiers. Referring to Figs. 2 and 3, power pulses of amplitude V are applied to terminal 23 to supply a winding 21 during positive half-cycles and to unblock a rectifier D4 during negative half-cycles. Positive input pulses are applied to winding 22 during negative half-cycles of the power supply. In the absence of an input pulse the core 20 is driven to a first state of saturation and winding 21 has low impedance to positive power pulses which produce output voltage pulses across resistor RL. When a control pulse is applied to winding 22 the core is driven to the other saturated state and the subsequent positive power pulse through winding 21 switches the core back without producing an output pulse as winding 21 has high impedance. Output pulses will be produced unless inhibited by an input pulse thus giving rise to the term complementing magnetic amplifier. Sneak outputs across RL which could be produced when core 20 is switched by power pulses are suppressed by means of resistor R1 which passes current from a diode D5 to a negative source - V equal and opposite to the sneak current. Figs. 4 and 5 show a non-complementing magnetic amplifier in which power pulses are applied to terminal 43 and input pulses may be applied to terminal 45 during negative halfcycles of the power supply. In the absence of an input pulse a positive power pulse switches core 40 and no output is produced across a resistor RL due to high impedance of winding 41, sneak output being suppressed by current from diode D7 over resistor R3 to a negative source - V. During the following negative half-cycle of the power supply, current from source - V through resistor R4, winding 41, and diode D7, automatically switches the core back. The following positive half-cycle of the power supply again switches the core and again no output is produced. If, however, an input pulse is applied to winding 42 during a negative half-cycle of the power supply a flux is produced to oppose the resetting flux from source- V and the core is not switched. The following positive half-cycle of the power supply in consequence finds a low impedance in winding 41 and produces an output across resistor RL. Output pulses are therefore produced only following the application of an input pulse and the arrangement is termed a non-complementing magnetic amplifier. The signal winding 42 is biased by a voltage E which is equal and opposite to the voltage induced in the winding when winding 41 switches the core. Figs. 8 and 9 illustrate a circuit according to the invention in which a complementing magnetic amplifier AC produces an output during negative half-cycles of the power supply #1P when no input pulse is applied to terminal 64. The output of AC is fed back over a buffer B and a circuit 62 which delays the output by one halfcycle and provides an input to inhibit the output of AC in the following positive half-cycle of the power supply. In the next following positive half-cycle, however, as no signal has been fed back, an output appears from AC. Pulses are therefore produced in alternate negative half-cycles but an input pulse on terminal 64 to simulate a delay circuit output despite the fact that AC gives no output will suppress the output from AC during the immediate following positive half-cycle and cause an output during the next subsequent positive half-cycle, thereby initiating output pulses in anti-phase to those previously produced. A further input on terminal 64 to simulate the output of delay circuit 62 resets the circuit to produce output pulses of the original phase. In Figs. 6 and 7 a circuit in accordance with the invention uses a non- complementing magnetic amplifier ANC with a power supply #1P and in which clock pulses are applied to a terminal 53 over an inhibitive gate G and a buffer B. Input to the amplifier may also be applied to a terminal 55 over a buffer B. The output of the amplifier is fed back to the gate G over a delay 51 of one halfcycle of the power supply. If during a negative half-cycle of the power supply the gate G is open and amplifier ANC to set by a clock pulse so that in the following positive half-cycle an output is produced and fed back to close the gate G to the next clock pulse one half-cycle later. With gate G closed no input is delivered to the amplifier and no output is produced in the following half-cycle and the gate is open to the subsequent clock pulse. The amplifier therefore produces an output during alternate negative half-cycles of the power supply. If an input is applied to terminal 55 to coincide with an output from delay circuit 51 the amplifier is set to produce an output independently of the gate G so that subsequent output pulses from the amplifier occur in anti-phase to those previously produced. A further pulse on terminal 55 coincident with a delay circuit output restores the output pulses of the amplifier to their original phase. The delay circuits of Figs. 6 and 8 may be passive or active. In particular the delay circuits may comprise a second complementing or non-complementing magnetic amplifier with a power supply in anti-phase to that of AC of Fig. 8, or of ANC of Fig. 6 (see Figs. 12 to 17, not shown). The output of the delay circuit may be combined with the phase bi-stable output to double the length of each pulse. A rationalized form of the invention is shown in Fig. 20 and comprises cores A and B, the power windings 96, 98 of which are connected at one end to pulse sources #1P, #2P in anti-phase and alternating between earth and a voltage of 2E. The other ends of the power windings are normally held at voltages of + E but if the pulse sources drop to earth while the windings have low impedance the output terminals A<1>, B<1> drop to earth also. Clock pulses of voltage - E and in phase with source #1P are applied to input winding 97 of core A and are blocked by the feedback provided from the output of winding 98 on core B when this has its normal output. of +E. The output A<1> of winding 96 of core A is applied as an input to winding 99 on core B. Supposing that core A is saturated so that winding 96 has low impedance to an earth halfcycle of source #1P, then an earth pulse appears at A<1> and no input is applied to core B. As core B was switched by an earth pulse of #2P previously the next earth pulse of #2P finds low impedance in winding 98 and an earth pulse appears at B<1>. With earth at B<1> winding 97 of core A is open to a clock pulse which switches core A so that the next earth pulse from #1P finds high impedance in winding 96 and the potential at A<1> remains at +E providing an input to winding 99 on core B to switch the core. The next earth pulse from #2P finds high impedance in winding 98 so that the output on B<1> remains at +E and blocks the input of a clock pulse to winding 97 of core A. An earth pulse therefore appears at A<1> in response to the next earth pulse from #1P followed by an earth pulse on B<1> which permits the passage of a reset clock pulse to core A. Thus alternate earth pulses of #1P, #2P appear at A<1> and B<1>. By inhibiting the winding 99 of core B with an input at terminal 100 to prevent core B being reset by the output of +E on A<1> two consecutive earth pulses of #2P produce earth at B<1> so that two consecutive clock pulses are applied to core A whereafter the cores interact as before except that the alternate earth pulses of #1P or #2P which were previously suppressed now appear at A<1>, B<1> and vice versa.