baber/WOPTO huggingface dataset:
Patent JP-S56164570-A (JP)
Title: Semiconductor memory unit
Inventor: ITOU MORITOMO
IPC: H01L27/04
Filed: 1980-05-21
Abstract: PURPOSE:To enlarge density, to make operation to extremely speedy and to enable to elongate refresh time of the smeiconductor memory unit by a metod wherein the depth of junctions of a source and a drain of an FET for the circumferential circuit of an MOS dynamic RAM is made larger than the depth of juncton of a cell FET. CONSTITUTION:A field film 2 is provided on a P type substrate 1 to delimit element regions 13, 14 of the circumferential circuit part and the cell part, and a gate film 15 and a polycrystalline Si layer 16 are formed. Opening parts 17 are provided in the layer 16, and the N<+> type sources 18 and drains 19 are formed shallowly (about 0.3mum) by ion implantation. The cell part is masked with a resist 21, and ion implantation is performed again at the circumferential circuit part to form the source 18', the drain 19' of the FET for the circumferential circuit part deeply (about 0.6mum). A PSG film 22, Al electrodes and wirings are formed in succession to manufacture the MOS RAM. Accordingly having the condition to make the breadth of gates as the same, the effective channel length of the FET for the circumferendtial circuit part can be made as short to enhance speed, while the effective channel length of the FET for the cell can be made longer to reduce a leak current, and the refresh time can be elongated.
Patent JP-S60212027-A (JP)
Title: Overvoltage protecting circuit of transistor
Inventor: HAYASHI SHIGEO
IPC: H02H7/20
Filed: 1984-04-06
Abstract: PURPOSE:To attain simple circuit constitution, less power loss and resistance to high frequency switching by connecting an electrostatic induction transistor (TR) in parallel with a bipolar TR as a TR to be protected. CONSTITUTION:The electrostatic induction type TR(SIT) has a characteristic that a drain-source voltage VDS is hardly changed even when a drain current IDS is changed when a gate-source voltage VSG is constant. That is, the SIT acts as a constant voltage possible for changing the conduction start voltage by changing the gate-source voltage VSG. Thus, the collector-emitter voltage VCE of a TR1 is suppressed to a value below a breakdown voltage of the said TR at all times by setting the TR1 to the conduction start voltage possible for protecting the TR1, and since the conduction start voltage of the SIT is changed continuously, the optimum protection voltage suited to the rating and circuit constant of the TR1 is selected.
Patent JP-S60211628-A (JP)
Title: Magnetic recording medium
Inventor: YASHIRO TSUTOMU
IPC: C09D5/23
Filed: 1984-04-06
Abstract: PURPOSE:To obtain a magnetic recording medium having excellent electromagnetic transducing characteristics at short-wavelength and long-wavelength areas, by using magnetic particles of a compound which have a prescribed mean particle diameter and mean particle thickness and belong to the hexagonal system. CONSTITUTION:The magnetic recording medium of this invention is formed by using magnetic particles of a compound belonging to the hexagonal system, such as hexagonally crystalline ferrite, etc., with the magnetic particles having a mean particle diameter of <=0.2mum and a mean particle thickness which satisfies a relation D/t<=5. This magnetic recording medium has excellent electromagnetic transducing characteristics at short-wavelength and long-wavelength areas.
Patent JP-S56162715-A (JP)
Title: Magnetic and optical element
Inventor: KAMATA OSAMU
IPC: C09K3/00
Filed: 1980-05-20
Abstract: PURPOSE:To obtain a magnetic and optical element having Faraday rotation ability made almost uniform over a wide temp. range by forming a mixed crystal with Y3Fe5O12 having Faraday rotation ability shown by a positive temp. coefft. and rare earth element-iron-garnet Gd3Fe5O12 having Faraday rotation ability shown by a negative temp. coefft. in a specified ratio. CONSTITUTION:A rare earth element-iron garnet mixed crystal represented by general formula (Y1-xGdx)3Fe5O12 (where 0.1<=x<=0.45) and having <=about 2.7% coefft. of Faraday rotation over the wide temp. range of -50-100 deg.C is formed with Y3Fe5O12 and Gd3Fe5O12. Bi is substituted for part of Re of rare earth element-iron-garnet represented by general formula Re3Fe5O2 to form a mixed crystal (Y1-(y+z)GdyBiz)betaFe5O12 having Faraday rotation ability increased by one digit, and by adjusting the values (y) and (z) to 0.3<=y<=0.42 and 0.15<=z<= 0.3, the saturation magnetization is reduced. A magnetic and optical element 3 is made of said mixed crystal. Thus, an optical isolator composed of polarizing prisms 1, 2, the element 3 and a permanent magnet 4 is obtd.
Patent JP-S54159359-A (JP)
Title: Mig arc welding method
Inventor: SATOU AKIRA
IPC: B23K9/16
Filed: 1978-06-07
Abstract: PURPOSE: To make large the amount of the deposited metal, and to execute the MIG arc welding with a good shape of penetration and a small rate of dilution, by feeding the arbitrary filler wire into the molten metal in which the molten particle of the welding wire is forced to cause the spray transfer.  
     CONSTITUTION: The electrode wire 1 contacts with the work 3 to be welded, the arc 4 is generated, and the welding is executed. While the welding work, when the spray transfer is caused in a small molten particle, the filler wire 5 is always fed into the molten metal 9 formed by the arc. According to this method, the generation of the spatter is prevented, the amount of the deposited metal is increased, and the shape of penetration is rounded. By this method, a great effect is given to the overlay welding and the joint welding. 
     COPYRIGHT: (C)1979,JPO&Japio
Patent JP-S54159367-A (JP)
Title: Reducing roll
Inventor: ERA MASAYUKI
IPC: B21B27/00
Filed: 1978-06-07
Abstract: PURPOSE:To uniformize the life of dullness and to extend the life of dullness, by executing the sub-zero treatment for the roll being dulled depending on the electric spark forming method. CONSTITUTION:The heat affected layer, due to the electric spark forming, on the electric spark formed surface of the cold reducing roll, is divided into three layers. The correlation of the hardness to the depth from the surface, is illustrated for respective layer. The regeneratively quenched layer of the high hard second layer plays an important part for extending the life of dullness; on the other hand, the first layer, which easily deforms and has a low wear resistance because of its low hardness and a large amount of residual austenite, is shortening the life of dullness. Accordingly, the electric spark forming is required to be executed under the condition to make this first layer to be as samll as possible; however, the first layer can not be made zero. As a result, this first layer is processed by, for instance, the sub-zero treatment at -150 deg.C directly after the electric spark forming, to transfer the austenite into martensite. Hereby, the life of dullness is extended to about twice.
Patent JP-S60211976-A (JP)
Title: Manufacture of semiconductor device
Inventor: MORI KAZUTAKA
IPC: H01L29/73
Filed: 1984-04-06
Abstract: PURPOSE:To accelerate the operational speed of transistor while improving the density of bipolar integrated circuit by a method wherein an oxide film for separating elements is selectively formed and then another oxide for separating peripheral active region of element is etched to expose side walls of silicon and after forming a base region, an emitter region is formed. CONSTITUTION:An N<+> buried layer 2 and a P<+> type diffused layer 3 as a channel stopper are formed on a semiconductor substrate 1 such as P type silicon and then an N type epitaxial layer 4 and a separating oxide film 5 are formed on the layer 3. After removing photoresist 9 and forming a polycrystalline silicon layer 11 doped with P type impurity such as boron at high concentration by CVD process, the layer 11 is anisotropically dry-etched utilizing a photoresist 12. After removing the photoresist 12, the layer 11 is thermooxidized. When any needless polysilicon is removed by photoetching process forming a polysilicon electrode 15 as an emitter to be heattreated, an emitter region 8 composed of an N type diffused layer may be formed by diffusion from the polysilicon electrode 15.
Patent JP-H05276598-A (JP)
Title: Acoustic reproducing device
IPC: B60R11/02
Filed: 1992-03-26
Abstract: PURPOSE:To realize the uniform transmission characteristic independently of a listening position automatically in the case of a monaural signal without causing distortion in the transmission characteristic due to phase interference between left and right signals when an input audio signal is a complete stereo signal. CONSTITUTION:An Lch signal L and an Rch signal R from an audio signal input means 1 are inputted to a signal processing section 11 and a discrimination means 21 and the signal processing section 11 applies signal processing to the input audio signal to realize the uniform voice articulation even when a listening position differs. Moreover, the discrimination means 21 discriminates analyzes the correlation of the input audio signals at a prescribed time interval to discriminate the stereo signal component and the monaural signal component of the input audio signal based on the result and the ratio of addition between the input audio signal and an output signal from the signal processing section 11 is controlled by adders 22, 23 based on the result of discrimination and the sum signal is respectively reproduced from speakers 7, 10.
Patent JP-S56164338-A (JP)
Title: Dry image forming material
Inventor: SHIGA TETSUO
IPC: G03C1/498
Filed: 1980-05-23
Abstract: PURPOSE: To provide high sensitivity to a post activation type dry image forming material, to increase the shelf stability of a raw film in a light place, and to enable additional recording by adding ≥1 kinds of compounds selected from specified 4 kinds of compounds.  
     CONSTITUTION: This material contains ≥1 kinds of compounds selected from compounds represented by formulae IWIV [where ech of Z and Z' is S or Se, Y is H or CH 3 , R is H or Cl and M is H, HN(C 2 H 5 ) 3  or Na] together the silver salt of ≥16C long chain fatty acid (component a), phenols acting as a silver ion reducing agent (b), silver halide contg. ≥30mol% AgI or a component forming the silver halide (c), an oxidizing agent oxidizing free silver (d), a photoreactive halogen oxidizing agent such as a divalent mercury compound (e) and a binder such as polyvinyl butyral (f). The material is heated (activated) prior to exposure, and it is imagewise exposed and heat developed. Thus, using said 4 kinds of spectral sensitizers a superior image is formed only by dry processing. 
     COPYRIGHT: (C)1981,JPO&Japio
Patent JP-S59197187-A (JP)
Inventor: FUEEDO ERUTON UIRIAMUSU
IPC: H01S5/06
Filed: 1984-04-06
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H01239920-A (JP)
Title: Semiconductor crystal growth
Inventor: SAKUMA YOSHIKI
IPC: H01L21/205
Filed: 1988-03-22
Abstract: PURPOSE:To facilitate the deposition of a single atom layer securely by performing epitaxial growth at a treatment temperature lower than a temperature at which organic metal composed of metal with a low vapor pressure is thermally decomposed in a vapor phase. CONSTITUTION:Organic metal composed of metal such as Ga or In and alkyl groups is employed. N2 is used as carrier gas for it. AsH3 or PH3 is used as the material of As or P with H2 as carrier gas. As the metal such as Ga or In has a low vapor pressure, epitaxial growth is performed while a treatment temperature is maintained lower than a temperature at which the organic metal is thermally decomposed in a vapor phase. With this constitution, the organic metal can reach a substrate without being thermally decomposed in an N2 atmosphere and is coupled with As or P in the surface of the substrate to deposit metal atoms. If one layer is deposited, the decomposition of the organic metal is not continued thereafter and a self layer control effect is created. Then AsH3 or PH3 is introduced to build up an As or P layer. The vapor pressure of As or P is high and a self layer control effect is created. Therefore, a single atom layer can be deposited securely.
Patent JP-S59193651-A (JP)
Title: Packet transmitter
Inventor: ARIYASU MASAKAZU
IPC: H04L12/00
Filed: 1983-04-18
Abstract: PURPOSE:To decrease the number of times of ineffective packet exchange by providing a check bit area corresponding to each node to a received packet, writing a check bit at each passing of each node and deciding the state of the check bit area. CONSTITUTION:The received packet is inputted to a write control section WCT and written in packet areas PC1-PCn of a memory MEM by referencing statement areas ST1-STn. Further, a check bit deciding section JG1 decides whether or not the packet passes through the own device in the past and when it is decides that the packet passes through, the packet is ablished. On the other hand, when it is decided that the packet does not pass through the deciding section JG1, an address deciding section JG2 decides whether the packet is directed to the own device or the other device and transmits the packet to a receiving pocessing section REC or a transmission section SEN respectively.
Patent JP-H04280128-A (JP)
Title: Frame aligner circuit
Inventor: OMURA KAZUHIKO
IPC: H04J3/00
Filed: 1991-03-07
Abstract: PURPOSE:To prevent outrunning of read with respect to write even in the case of lots of kinds of line speeds and to eliminate the need for an inhibit area width changeover circuit. CONSTITUTION:The circuit is provided with a write control section 14 which allows write to three buffer memories 11, 12, 13 sequentially and implements write control so as to write inputted data sequentially, a read control section 15 which allows read from three the buffer memories 11, 12, 13 sequentially and implements read control so as to read inputted data sequentially, an inhibit area generating section 16 generating a read inhibit area as to a prescribed buffer memory based on the write enable timing generated by the write control section 14, and a read inhibit detection section 17 detecting the read inhibit based on the inhibit area signal from the inhibit area generating section 16, and the read control section 15 shifts the read enable timing of the three buffer memories so that no read is implemented from a prescribed buffer memory when the read control section 15 receives a read inhibit detection signal from the read inhibit detection section 17.
Patent JP-H10271248-A (JP)
Title: Image forming device
Inventor: HASHIMOTO YASUNARI
IPC: G06F3/0487
Filed: 1997-03-21
Abstract: PROBLEM TO BE SOLVED: To easily call and set a desired image forming mode. SOLUTION: Image forming modes for image forming operations in an image forming means D are stored in a storage means E together with execution times of these image forming operations by a storage control means F, and a list display control means G displays plural image forming modes and execution times of image forming operations, which are stored in the storage means E, on a display means A as a list to report them to a user. When the part of a desired image forming mode out of these image forming modes is touched by the user thereafter, a touch position detection means B detects this touch position, and the image forming mode in the touch position is selectively called from the storage means E by a mode call means H and is set to a mode setting means C.
Patent JP-H115935-A (JP)
Title: Aqueous recording liquid composition
Inventor: IDOKAWA HIROYUKI
IPC: C09D11/00
Filed: 1998-03-18
Abstract: PROBLEM TO BE SOLVED: To obtain an aq. recording liquid compsn. that is excellent in stability and gives characters and picture images excellent in long-term durability to light and water, by incorporating, into an aq. medium, a pigment and a water-soluble resin obtd. by the copolymn. of a monomer mixture contg. styrene and a sulfonated vinyl monomer and having a specified wt. average mol.wt. in a specified ratio of the pigment to the resin and by adjusting the surface tension to a specified value. SOLUTION: A pigment (pref. a carbon black) and a water-soluble resin, which is obtd. by the copolymn. of a monomer mixture contg. styrene pref. in an amt. of 10-70 mol.% and a sulfonated vinyl monomer (e.g. sodium p- styrenesulfonate) pref. in an amt. of 10-90 mol.% and has a wt. average mol.wt. of 50,000 or lower in a wt. ratio of the pigment to the resin of (1:1)-(10:1) are incorporated into an aq. medium contg. water and a water-soluble org. solvent (e.g. propylene glycol). The surface tension of the compsn. is adjusted to 48-72 dyn/cm.
Patent JP-H01240292-A (JP)
Title: Output signal transmission method for limit switch
Inventor: KURIYAMA HIROSHI
IPC: B25J19/06
Filed: 1988-03-23
Abstract: PURPOSE:To enable a limit signal to be transmitted in a reduced number of cables by making a change into a code which is in accordance with the combination of the output signal conditions of respective limit switches and conducting sending out to cables whose number is the same with that of the bits of this code, and afterward, decoding these output signal conditions at the receipt of the code having been transmitted via cables. CONSTITUTION:In case of a limit signal having been outputted from a limit switch 1, respective output signal conditions 'PCM' of respective limit switches 1-3 become 'HLL'. As a result, at a coder 4, the output level of its OR gate 5 becomes 'H' and at the same time, the output level of an OR gate 6 becomes 'L'. Accordingly, the encoder 4 sends out codes 'HL' to respective cables 7, 8. Meanwhile, at a decoder 9, when these codes 'HL' are inputted, the output PL alone of an AND gate 10 becomes an H level, and thus, codes 'HLL' that show a limit has been detected by means of the limit switch 1 are sent to a manipulator controller main body 13.
Patent JP-S54159154-A (JP)
Title: Latch circuit
Inventor: KOIKE HIDEJI
IPC: H03K3/356
Filed: 1978-06-07
Abstract: PURPOSE:To enable to store the data stably, by using the D type MOS transistor for the part of the feedback transfer gate and by connecting the gate to the output terminal of feedback inverter. CONSTITUTION:In the latch circuit using the MOS transistors TrQ1 to Q6 and constituted with the main inverter 1, feedback inverter 2, data input transfer gate 3 and feedback transfer gate 4, as the gate 4, D type MOS TrQ6 is used and the gate is connected to the output terminal of the inverter 2. Further, when G1(gate 3) =0 and the point A is 1 and point B is 0, or the point A is 0 and point B is 1, curretnt flows through TrQ6 to TrQ4 or through TrQ6 from TrQ3 respectively, but since the saturation current of TrQ6 is greater than the leakage current of TrQ5, if the saturation current of TrQ3 is greater than the leakage current of TrQ6, the point B holds the potential.
Patent JP-S60212130-A (JP)
Inventor: WADA MASAMI
IPC: A47J43/04
Filed: 1984-04-05
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H05273775-A (JP)
Title: Electrophotographic sensitive body
IPC: G03G5/06
Filed: 1992-03-26
Abstract: PURPOSE:To provide a photosensitive body having high sensitivity and no temp. dependence of sensitivity by using a photosensitive material containing a speci fied titanyl phthalocyanine crystal on a conductive supporting body. CONSTITUTION:This photosensitive body contains a specified titanyl phthalocyanine crystal on a conductive supporting body. This titanyl phthalocyanine crystal is an adduct of titanyl phthalocyanine and 2,3-butane diol. It is preferable that the crystal is an adduct of titanyl phthalocyanine and 2,3-butane diol and shows peaks in the X-ray diffraction for CuKalpha at least at 9.5 and 26.3 degree of Bragg angle (2theta+ or -0.2). More preferably, the crystal is an adduct of 2,3-butane diol and shows peaks at least at 8.4, 9.5, 12.2, 15.2, 19.0, 23.8, and 26.3 degree.
Patent JP-S59197587-A (JP)
Title: Copper plating bath
Inventor: SAWADA EIJI
IPC: C25D3/38
Filed: 1983-04-20
Abstract: PURPOSE:To develop a copper plating bath excellent in close adhesiveness and uniform electrodeposition property without using a noxious cyan compound, by containing a specific amount of alkali citrate or, further, disodium ethylenediamine-tetraacetate in a copper sulfate bath being a base bath. CONSTITUTION:As a copper plating bath, an aqueous composition containing 5- 40g/l of copper sulfate and 50-600g/l of alkali cirtrate. When there is such possibility that the capacity of the plating bath is lowered because of the formation of copper hydroxide with the rising in the temp. of the plating bath, disodium ethylenediamine-tetraacetate (EDTA) is added to the plating bath having the aboe mentioned composition in an amount of 10-150g/l to prevent the formation of copper hydroxide. A copper plating bath excellent in close adhesiveness and uniform electrodeposition property is obtained without using copper cyanide or alkali cyanide as is conventional.
Patent JP-H09254821-A (JP)
Title: Vehicular pedal support construction
Inventor: KATO YOSHIHISA
IPC: B60R21/09
Filed: 1996-03-25
Abstract: PROBLEM TO BE SOLVED: To positively evacuate a pedal to the vehicular front when engergy is inputted in the vehicular front with regard to a suitable vehicular pedal support construction for supporting the vehicular pedal arranged in the foot space in a driver's seat. SOLUTION: A bracket side sliding part 38 having a inclined angle θ is provided on the upper end of a pedal bracket 22. The bracket sliding part 38 is provided with a slit 38a. A body side sliding part 41 is fixed to an inner panel reinforcement 43. An inclined surface 42, which has an inclined angle θand abuts on the bracket side sliding part 38, is formed on the body side sliding part 41. The vehicular front side end of the inclined surface 42 and the slit 38a are fixed together by a bolt 40. The break away direction of the pedal bracket 22 from the bolt 40 is materially conformed to the bracket side sliding part 38 and the inclined angle θ of the inclined surface 42.
Patent JP-H09258412-A (JP)
Title: Automatic developing machine
Inventor: YOSHIZAWA SEIICHI
IPC: G03D3/06
Filed: 1996-03-25
Abstract: PROBLEM TO BE SOLVED: To supply water remaining in a water supply tank to a processing vessel in the case that water supply to the water supply tank is stopped. SOLUTION: After the supply of water is performed when a tap is opened, water quantity is automatically recovered in the water supply tank and the state filled with water is detected by a sensor at the inside of the water supply tank again (S100). Thus, the supplying water to the processing vessel is repeatedly performed. In the case that the tap is closed at night and an holidays or the like, the recovery of the water quantity at the inside of the water supply tank after the water supply is not performed. Then, the quantity supplied to the processing vessel is integrated (S110) from the point of time when the sensor does not detect the state filled with water, so that the supply is continued until an integrated total reaches the full capacity of the water supply tank.
Patent JP-H07278406-A (JP)
Title: Polyacetal resin composition
Inventor: TAKAYAMA KATSUTOMO
IPC: C08L59/00
Filed: 1994-04-06
Abstract: PURPOSE:To obtain a resin composition improved in mold release by mixing a polyacetal resin with a specified amount of an alkyl-substituted diphenyl ether represented by a specified formula. CONSTITUTION:Polyacetal resin in an amount of 100 pts.wt. is mixed with 0.1-5 pts.wt. alkyl-substituted diphenyl ether represented by formula I [wherein Rs are 12C or higher linear alkyl groups or branched alkyl groups represented by formula II (wherein (m) >0, (n) >0; and m+n>=11) which are introduced into part or all of positions 2 to 6 and positions 2' to 6', groups of a saturated aliphatic ester or groups of a saturated aliphatic ether] and optionally specified amounts of an antioxidant, an antistatic agent, a filler, a surfactant, a thermoplastic resin, etc. The resultant mixture is melt-kneaded with a twin-screw extruder or the like to uniformly disperse the respective components and pelletized to obtain the objective composition excellent in mold release.