baber/WOPTO huggingface dataset:
Patent JP-2000252984-A (JP)
Title: Monitoring system for quantity of router transmission and reception data
Inventor: KUDO KOJI
IPC: H04L12/70
Filed: 1999-02-26
Abstract: PROBLEM TO BE SOLVED: To reduce the running cost of a monitoring system by producing a warning if a packet flows in a specific time band out of the transmission/ reception data of a router which are collected by a network monitoring device. SOLUTION: A calculator 12 functions as a network monitoring device on a network. A network manager inputs a time band when all calculators 11-13 stop their operations on the network and also a warning method. Then it's judged whether or not the main monitoring processing is valid, and no processing is carried out to monitor the flow-out of an unnecessary packet as long as the main monitoring processing is not valid. The collected transmission/reception data of the router are read at every fixed time. It is decided whether or not a packet included in a previously set time band is confirmed among those read transmission/reception data of the router. If the packet is confirmed, a warning method is decided. Then a warning screen is displayed and also an alarm is sounded when an instantaneous notification is required.
Patent JP-S55141588-A (JP)
Title: Zinc electroplating method
Inventor: TSUCHIYA KIYOSHI
IPC: C25D3/22
Filed: 1979-04-24
Abstract: PURPOSE: To improve the plated surface property and to improve the adhesion of coating, by the addition of a compound of Sr or Ba to a zinc sulfate bath soln., by passing the bath soln. through a filter in order to remove suspended solid matter, then by returning the soln. to the plating bath.  
     CONSTITUTION: An agent composed of one or more members of Sr or Ba compounds, for example, Sr(OH) 2 , is added to zinc electroplating bath contg. sulfuric acid so as to remove the influence of the impurities contained in the plating bath. Slightly soluble SrSO 4 , or BaSO 4  is formed during the procedure, hence a portion or whole of the plating bath soln. is passed through a filter, thereby removing the suspended solid matter, then the bath soln. is returned to the bath once again. Zinc plating is conducted with the concn. of the solid matter contained in the bath maintained at 50W1,000ppm by the treatment described above. The treatment keeps the excellent after-treatment effect of such as adhesion of coating of plated steel sheet etc. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-H09247713-A (JP)
Title: Stereoscopic video display device
Inventor: TATENO TETSUYA
IPC: H04N15/00
Filed: 1996-03-07
Abstract: PROBLEM TO BE SOLVED: To provide a stereoscopic video display device in which a correct stereoscopic video image is observed at an erected view area without moving the position of the head of a viewer. SOLUTION: The display device is configured by a longitudinal stripe lenticular sheet 5 or the like in front of flat display panel(FDP) 4 such as a PDP and displaying left eye video image and a right eye video image alternately onto the FDP 4 in a longitudinal stripe. In this case, the FDP 4 is made up of three RGB cells whose one picture element is arranged in a longitudinal stripe structure and the display device is provided with a position input means 6 inputting the signal denoting horizontal movement of the position of the head of a person viewing a stereoscopic video image, a display timing signal generating circuit 7 generating a video display timing signal to be displayed based on the horizontal movement signal from the position input means 6, as RGB shift circuit 8 shifting each color component of RGB horizontally based on the display timing signal, and a horizontal video image inverting circuit 9 to view a stereoscopic video image at an erected view area at all times.
Patent JP-S63217969-A (JP)
Title: Power source circuit
Inventor: MASUDA NOBORU
IPC: H02M1/08
Filed: 1987-03-03
Abstract: PURPOSE:To reduce the heat generation of a resistor by so conducting as to produce a partial waveform between a zero potential and a predetermined potential during its period. CONSTITUTION:A load 26 is connected through a triac 27 to both terminals of a commercial power source 1, and controlled to be driven by a photodetector 22 of a photocoupler connected through a rectifier 25. A full-wave rectifier 2 is connected to both the terminals of the power source 1 to full-wave rectify it to supply it to a stepdown circuit 11 of first stage. A sensor block 17 and a light emitting unit 18 and a light emitting diode 20 for forming a photocoupler are energized through a stabilizer 14 from the circuit 11. Thus, in the circuit 11, the output of the rectifier 2 is applied to first, second transistors 5, 6, and when the transistor 5 is conducted, the transistor 6 is interrupted. Accordingly, it is so energized to stabilize the output as to output a partial waveform between a zero potential and a predetermined potential.
Patent JP-H02230595-A (JP)
Title: Semiconductor integrated circuit device
Inventor: SATO KATSUYUKI
IPC: G11C11/401
Filed: 1989-03-03
Abstract: PURPOSE:To attain large capacity by providing a memory cell of a first type, comparing tag data outputted from a memory according to first information with second information, and outputting data replying to a comparison result from a memory cell of second type. CONSTITUTION:Directory memories 30-33 are comprised of the memory cells of the first type, for example, fast bipolar type memory cells, and data memories 50-53 are comprised of the memory cells of second type, for example, dynamic type memory cells with a few number of elements. Sets are selected from the memories 30-33 one by one by a set address signal, and the tag data a d0-a d3 are supplied to a comparator 4, and is compared with a converted address tag 2, and when coincidence is obtained, hit signals C0-C3 are outputted. Meanwhile, the sets are selected from the memories 50-53 one by one by the set address signal, and data d d0-d d3 are supplied to a selector 6, and the data instructed by the hit signals C0-C3 are selected and outputted. Thereby, the large capacity can be attained.
Patent JP-H07234262-A (JP)
Title: Method and device for washing ic socket
Inventor: IKEDA SHIGEO
IPC: G01R1/073
Filed: 1994-02-22
Abstract: PURPOSE:To enhance the accuracy with which an IC is measured for evaluation and to reduce the manufacturing cost of a semiconductor device by washing an IC socket used in the measurements of the IC for evaluation, before the IC is measured for evaluation the next time. CONSTITUTION:A carrier 5 is first immersed in a solder-removing fluid in a solder removal tank 41. Thereby a good conduction can be maintained between an IC socket and an IC, so as to enhance the reliability for the measurement and evaluation of the IC. Further, the life of the IC socket is extended, resulting in the reduced manufacturing cost of a semiconductor device. Next, the carrier 5 is immersed in pure water in a pure water tank 42. Then the carrier is immersed in a solvent in a washing tank 432. Finally, the carrier 5 is conveyed into a load/unload tank 44. An IC socket washing device 4 controls the operation of a drive means 50 by means of a control unit 60 and can automaticaly wash the IC socket.
Patent JP-S62207868-A (JP)
Title: Formation of thin metallic film
Inventor: KUDO TOMIO
IPC: C23C16/50
Filed: 1986-03-07
Abstract: PURPOSE:To simply obtain a high purity thin film of a group VIII metal by feeding an organometallic compound satisfying prescribed conditions as starting material to a part near a substrate heated to a prescribed temp. and by applying heat, plasma or light. CONSTITUTION:A solid organometallic compound contg. one or more kinds of group VIII metals and one or more kinds of 1-4C ligands, e.g., tris(acetylacetonato)rhodium, bis(acetylacetonato)palladium or bis-(cyclopentadienyl) palladium is prepd. The compound is vaporized at <=300 deg.C under <=10<-1>Torr pressure and one or more among heat, plasma and light are applied to the resulting vapor to form a thin metallic film on the surface of a substrate heated to <=300 deg.C.
Patent JP-2000251127-A (JP)
Title: Cash processor and operation permission approving method
Inventor: NAKAMURA TOSHIO
IPC: G07D9/00
Filed: 1999-02-26
Abstract: PROBLEM TO BE SOLVED: To perform appropriate approval by enabling various approving methods corresponding to cash processing operations. SOLUTION: When an operator (operator) of a cash processor inserts an operator card, the MPU 140 of a teller machine 1a (1b) decides whether approval is needed on the basis of magnetic information read from the operator card and an operation selected by the operator, retrieves/decides an approval condition by referring to an approval condition table in accordance with an operation concerned when an approval is needed, shows the approval condition on a liquid crystal displaying 145, reads magnetic information from an operator card inserted by an approver corresponding to the approval condition shown on the display 145 and controls a selected operation when the read magnetic information meets the approval condition.
Patent JP-S55141382-A (JP)
Title: Arc stud welding method of stainless steel made bolt to pure copper and low alloy copper made base metal
Inventor: MORIKAWA MASAKI
IPC: B23K9/20
Filed: 1979-04-23
Abstract: PURPOSE: To secure sufficient bonding strength between a stainless steel made bolt and a pure copper or low alloy copper made base plate by arc-stud-welding said bolt to said base plate under the specific conditions.  
     CONSTITUTION: The arc stud welding is done under the conditions wherein the diameter Dmm of a stainless steel made bolt 2 is made twice or less the thickness t mm of a pure copper or low alloy copper made base plate 1, welding time T is made 0.5sec or less and the welding current I ampere is made within the range satisfying 28≤(I T)/D≤30. When these conditions are kept, the heat-affected zone 4 are confined within the base plate 1 and will not expand to the back side. Even in tensile test, the base plate ruptures at the boundary between the weld metal 3 and heat-affected zone 4, resulting in so-called tensile break. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-S59177404-A (JP)
Inventor: YOSHIKAWA SADAO
IPC: E01D11/02
Filed: 1983-03-28
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-2000246005-A (JP)
Title: Method for regenerating waste oil
Inventor: KAWAMURA MASUHIKO
IPC: C10M175/00
Filed: 1999-02-26
Abstract: PROBLEM TO BE SOLVED: To remove fine contaminates at a low cost and satisfactorily regenerate waste oil such as spent automotive engine oil by impregnating the network of a three-dimensional network structure to be formed of an oil gelling agent, with the waste oil to gelatinize it and pressing this oil gel. SOLUTION: An oil gelling agent is a chemical compound which forms a three-dimensional network structure in oil and sets (gelatinize) the oil. For example, a 12-hydroxystearic acid, dibenzylinden sorbitol, an amino acid gelling agent or the like can be used as the oil gelling agent. For the spent oil, spent automotive engine oil, spent transmission oil, spent gear oil or the like is used. The oil gelling agent is impregnated with the waste oil and this impregnation is heated and cooled to be gelatinized. Further, this oil gel is pressed into a regenerated oil. In this case, oil molecules are separated from the network structure under the pressing effect but a fine solid foreign matter or a fine deteriorated oil material contained in the spent oil is captured by the network structure and is left over. Consequently, it is possible to obtain a low viscosity and transparent regenerated oil.
Patent JP-H01225164-A (JP)
Title: Manufacture of insulated gate mosfet
Inventor: SEKI YASUKAZU
IPC: H01L29/78
Filed: 1988-03-03
Abstract: PURPOSE:To reduce the number of manufacturing steps, and to improve the forming positional accuracy of a semiconductor layer by forming an N<+> type source layer in a self-alignment without using a photomask. CONSTITUTION:In the case of forming an N<+> type source layer 5, a window is opened by selectively etching except a polysilicon layer 7a at its center on a polysilicon layer 7 to become a gate without using a mask, an impurity is ion implanted with the layer 7 having the window as a mask to first form a P-type base layer 3, an impurity is again ion implanted from the window to form the N<+> type source layer 5. Since the layer 5 is formed in a self- alignment without using a mask, processing accuracy is improved, and its manu facturing efficiency can be additionally enhanced.
Patent JP-S62208131-A (JP)
Title: Electronic computer
Inventor: IIZUKA YUTAKA
IPC: G06F9/44
Filed: 1986-03-10
Abstract: PURPOSE:To improve the execution speed of small talk 80 by distinction a small integer from a pointer and referencing an object table by leased hardware. CONSTITUTION:Data are written from an ALU 110 to a pointer register 201 through a bus Y 107. The LSB of the written data is outputted to a bus N 103 to control the execution sequence of a microprogram. In case the writing of an object address in the object table, data outputted from the ALU 110 to the bus 107 are written in an address memory 202. In case the writing of an object reference count, the data on the bus 107 are written in a reference count memory 205 and an object flag is written from the bus 107 in a flag memory 208.
Patent JP-H03252155-A (JP)
Title: Semiconductor package
Inventor: NAKANO SUMIO
IPC: H01L23/04
Filed: 1990-02-28
Abstract: PURPOSE:To obtain high-dissipation and high-reliability packages excellent from view points of quality and manufacture cost with no need of expensive corrosionproof Au plating to heat sink material and with little residual stress after bonding by bonding a ceramic substrate and a heat sink with low-melting point glass. CONSTITUTION:A semiconductor package constituted by bonding a heat sink 11 and a ceramic substrate 10 comprises a bond of the ceramic substrate 10 equipped with conductor wirings 4 and plating 3 that coats the exposed part of the conductor wirings 4 and the heat sink 11 equipped with one or more kinds of plating 6 of Ni, Co or Cr with low-melting point glass 7. For example, the ceramic substrate 10 is fitted with conductor wirings 4 of W-metallize, etc., in ceramic 1 and plated with Ni-and Au-plating 3 in the exposed inside surface of the conductor wiring 4 and in the surface of pins 9 by a posttreatment. This ceramic substrate 10 and the heat sink 11 are coated with a low-melting point glass 7 such as lead glass borosilicate at a necessary zone, and then bonded by heating up to about 450 deg.C.
Patent JP-H11247840-A (JP)
Title: Hinge device
Inventor: HIGANO SAKAE
IPC: H04N5/225
Filed: 1998-03-03
Abstract: PROBLEM TO BE SOLVED: To provide a hinge to hold a liquid crystal unit such as a video camera free to store, develop and rotate. SOLUTION: This device is furnished with an opening and closing friction torque generating means to press fit an opening and closing shaft 11 of a slightly larger diameter than a diameter of a winding spring in a single winding spring part 16 applied with a winding direction from both of reciprocal directions and added with an opening and closing angle regulation device, a rotational friction torque generating means structured to tighten a corrugated plate type spring and a retaining ring to generate friction torque of an axis of rotation 12, a means added with a projection for rotational stop and a projection for click and a mechanism to carry out rotational regulation by fitting a rotational regulation shaft having a parallel surface on a paralleled contact surface set on a part of the winding spring press fitted on the opening and closing shaft.  The device generates uniform friction torque at either position of both of the shafts of the opening and closing shaft and the axis of rotation 12.
Patent JP-S56147543-A (JP)
Title: Remote process input and output controller for computer
Inventor: MOROTOMI HISASHI
IPC: H04L12/423
Filed: 1980-04-17
Abstract: PURPOSE:To extend the data input time and to reduce the number of bits of one frame, by forming the dummy bit between the time slot for addressing of frame format on the common bus and the input/output data time slot. CONSTITUTION:The computer 1 and a plurality of process input/output terminal devices 3 in remote location are connected in loop with the frame format on the common bus. In this case, among the addressing time slot 7 to transmit the address for identification of the process input/output terminal device 3, output data from the computer 1 to each terminal device 3, and input/output data time slot 17 making the transmission of input data from each terminal device 3 to the computer 1 in the same frame, the dummy bit 19 in several bits is provided.
Patent JP-S58170376-A (JP)
Title: Power source
Inventor: AOIKE MINAKI
IPC: H05B41/24
Filed: 1982-03-29
Abstract: PURPOSE:To inexpensively construct the structure of a power source by operating a condenser provided not to form a no-current zone of a load such as a lamp as a surge voltage absorber. CONSTITUTION:Transistors 7, 8 alternately receive negative and positive biases via induced voltage of a coil 43, while high frequency voltage is induced at the secondary coil 42 of a transformer 4 by the resonance of the primary coil 41 and a condenser 5, thereby firing a discharge lamp 15. A condenser 16 is provided not to produce a no-current zone of the lamp 15. When surge voltage is introduced from the power source side, a thyristor 21 is conducted through a Zener diode 24. A surge voltage which is introduced from the power source side by the conduction of the thyristor 21 is absorbed by the condenser 16.
Patent JP-H06268283-A (JP)
Title: Filter of spin of carrier and method for measuring magnetization distribution using same
Inventor: NOMOTO KAZUMASA
IPC: G01R33/10
Filed: 1993-03-11
Abstract: PURPOSE:To microscopically search the surface state without influencing the magnetization of a sample surface by providing a filter with selectivity of carrier spin and using it for example as the probe of spin polarization STM. CONSTITUTION:A magnetic body potential well layer 1 (11, 12, and 13) has at least one structure sandwiched by barrier layers 2 (21, 22, 23, and 24) and then at least one edge part 11 or 12 is formed by a non-magnetic conductor.
Patent JP-S53136198-A (JP)
Title: Nuclear fusion system
Inventor: NISHI MASATSUGU
IPC: G21B1/17
Filed: 1977-05-04
Abstract: PURPOSE: To enable to equip a liner larger than conventional type in reducing eddy current generated in liner by use of wave plate for liner located limitation container. 
     COPYRIGHT: (C)1978,JPO&Japio
Patent JP-H11251140-A (JP)
Title: Magnetostatic wave element
Inventor: IKARI MASANORI
IPC: H01F10/28
Filed: 1998-03-03
Abstract: PROBLEM TO BE SOLVED: To provide a reflection type magnetostatic wave element which is excellent in temperature characteristics in 1-1.35 GHz band where dynamic characteristics is improved than 400 MHz band. SOLUTION: A garnet magnetic thin film for a magnetostatic wave element, a transducer 4 for exciting the magnetic thin film with magnetostatic wave, and a bias magnetic field are provided. Here, the magnetic thin film is formed on a Gd3 Ga5 O12 substrate 1 off-angled by 1-5 deg. from a surface (110) by liquid- phase epitaxial method, and with an angle between the longitudinal direction of the transducer 4 and the vertical direction relative to <001> direction of the magnetic thin film's crystal being θ1 , while an angle between the vertical direction relative to the longitudinal direction of the transducer 4 and a magnetic field application direction of a bias magnetic field being θ2 , a range is 0 deg.<=|θ1 |+|θ2 |<=15 deg.  (where, θ1 and θ2 represent clockwise as positive while counter- clockwise as negative), with operation frequency band 1-1.35 GHz.
Patent JP-H07262846-A (JP)
Title: Mounting unit for lighting protection insulator
Inventor: MURASE TOMOYASU
IPC: H01T4/14
Filed: 1994-03-22
Abstract: PURPOSE:To provide a mounting unit for a lighting protection insulator, which can be simply mounted on/demounted from an angle material the vertical end face of which is faced downward, concurrently can enhance its strength, and furthermore can easily cope with the angle material even if the applied dimension of the angle material is changed. CONSTITUTION:A reinforcing plate 13 which is oppositely in contact with the vertical rib 12a of an angle material 12 is provided for the lower surface of a base 11 to be rested on the horizontal rib 12a of the angle material 12. A hole to which a bolt 18 fastening a fastening fitting 17 at the base 11 side is made an oblong 11b. A J bolt 14 which is hooked so as to be fixed to the lower end section of the vertical rib 12b of the angle 12 is disposed in a base 11 area at the tip end side from the fastening fitting 17.
Patent JP-S57165270-A (JP)
Title: Manufacture of multineedle electrostatic recordng electrode
Inventor: NANBA MASAHIRO
IPC: B41J2/395
Filed: 1981-04-03
Abstract: PURPOSE:To perform a reliable position, by a method wherein a cast-molding material is cured by pressing and holding a recording electrode part, in which a plural number of recording electrode wires aligned in parallel are positioned between the nip formed by insulating plates at both sides, and auxiliary electrodes, operation in synchronism with the recording electrode, by means of an electrode holding device made of an elastic elementary material such as rubber. CONSTITUTION:A holding recess 13, which holds a recording electrode through insertion of the recording electrode in a longitudinal direction of an electrode holding device, and holding apertures 14, 14... for holding auxiliary electrodes 9 are formed in the electrode holding device 12 made of an elastic elementary material such as rubber. The holding apertures 14 hold the auxiliary electrodes by fitting the electrode 9 with fitting projections 10 and by pressing the electrode 9 through the elastic force of the holding device 12. In the electrode holding device 12, the recording electrode part 4 is held by the holding recess 13, and the auxiliary electrodes 9 are held by the holding aperture 14. The recording electrode 4 and the auxiliary electrodes 9 are housed in an casting mold 15 in a manner that they are held by the electrode holding device 12, and after a cast-molding material is solidified, it is cured, the mold is disassembled.
Patent JP-H11251057-A (JP)
Title: Manufacture of organic electroluminescence element and manufacturing device therefor
Inventor: SERA YOSHIO
IPC: H05B33/14
Filed: 1998-03-03
Abstract: PROBLEM TO BE SOLVED: To prevent the occurrence of a short circuit with the same mask by making the distance between a substrate and an insertion plate forming a pattern when one electrode is formed smaller than the distance between the substrate and the insertion plate when a thin film layer including an organic electroluminescence region pinched between a first electrode and a second electrode is formed. SOLUTION: A glass substrate of 100 mm square coated with ITO on the whole face is etched to obtain an ITO stripe pattern having the average line width of 2.000 mm, the interval of 0.5 mm, and the number of lines of 30. A deposition metal mask 2 (plate thickness 50 μm, hole size 2. 000 mm square, hole interval 0. 5 mm, and number of holes 30) aligned with holes in a line is arranged on this glass substrate 1 at the gap D1 (G2) of 50 μm and the deposition source-substrate distance of 50 cm to form an organic thin film layer, then a second electrode is formed at the gap D2 (G1) of 20 μn. The patterns of a first electrode and the second electrode are smaller in size than the organic thin film layer, and no short circuit occurs.