Patent GB-940840-A (GB)
Title: Apparatus for controlling the frequency of an oscillation generator
IPC: H04L7/033
Filed: 1960-02-18
Abstract: 940,840. Frequency control. PATELHOLD PATENTVERWERTUNGS- & ELEKTRO HOLDING A.G. Feb. 18, 1960 [Feb. 18, 1959; March 26, 1959], No. 5860/60. Heading H3A. Apparatus controlling the frequency of an oscillation generator including a variable scale counter normally counting input oscillations, cyclically on a predetermined scale and to give an output signal for each counting cycle, with means for altering the scale of count in response to more than a predetermined change in the frequency of occurrence of the output signals in such sense as to reduce the extent of the change; the arrangement being such that the counter operates on the predetermined scale when the generator frequency lies within a predetermined frequency range, and operates on a reduced or increased scale when the generator frequency lies below or above the predetermined range. In Fig. 1 a frequency standard G 1  and a source of transmitted frequency G 2  supply oscillations e 1 , e 2  to electronic counters z 1 , z 2  emitting pulse trains u 1 , u 2  such that a pulse is generated once per - n 0  cycles of the input frequency where n 0  is a definite number. The pulse trains are applied to a phase discriminator P, which may comprise a bistable sweep circuit brought into one stable position by each pulse of u 1  and into the other by each pulse u 2  (Fig. 2), producing a pulse sequence v 0  wherein the ratio of the positive to the negative excursions represents the phase difference # between u 1  and u 2 . After filtration at F, a mean direct voltage v is applied to regulate the frequency of G 2  into coincidence with G 1 . Pulse train v 0  is also applied to a threshold circuit B wherein the lengths of the positive and negative going sections T 1 , T 2  of v o  are integrated and compared with preset direct voltage to produce signals V 1  and V 2  when the phase difference # passes beyond limits # min. and # max. respectively, which are applied to counters z 1 , z 2  to reduce the counting factor n 0  of the appropriate counter by returning the same prematurely to zero and emitting a pulse at the same time, so that the frequencies of pulse trains u 1 , u 2  approach each other arid the phase difference therebetween is prevented from exceeding a predetermined range. Thus, e.g., if frequency e 2  of G 2  decreases so that the phase difference # exceeds # max., the voltage V 2  restores counter z 2  prematurely to zero and emits a pulse to P after a smaller number of cycles than n 0 , so that pulse frequencies u 1 ;, u 2  approach each other and the phase difference is reduced. In a modification (Fig. 3) the oscillations e 1 , e 2  from G 1 , G 2  are passed through normally open, gates T 1 , T 2  to counters z 1 , z 2  whose output pulses u 1 , u 2  are compared in phase discriminator P to produce a pulse regulating voltage v 0  filtered to a direct voltage v controlling the frequency of G 2 . Pulse signals u 1 , u 2  are differentiated to u<SP>1</SP> 1 , u<SP>1</SP> 2  and applied respectively with u 2 , u 1  to comparators k 1 , k 2 . If the phase difference # increases due to a fall in the frequency of e 2 , pulses u 1 , u 2  eventually overlap (Fig. 4) and coincidence occurs between the positive peaks of u<SP>1</SP> 1  and the u 1  pulses so that k 1  operates to close gate T 1  to interrupt the count of G 1  and delay the next pulse from counter Z 1 , whereby n 0  is increased and the phase difference between u 1  and u 2  is prevented from increasing further. Similarly, a sufficient variation of phase difference in the opposite sense causes eventual coincidence of u 1  and the positive differentiated pulse from u 2  to close gate T 2  interrupt the count of G 2  and delay the next pulse from z 2  to increase n 0  and limit the phase difference as before. Further modifications are described (Figs. 5, 7, not shown).