baber/WOPTO huggingface dataset:
Patent TW-384534-B (TW)
Title: Resin molded type semiconductor device and a method of manufacturing the same
Inventor: MORISHITA YOSHIHIKO
IPC: H01L23/28
Filed: 1998-06-18
Granted: 2000-03-11
Abstract: A resin molded type semiconductor device has: a semiconductor chip (12) which is mounted on a die pad portion (11) of a lead frame (9); thin metal wires (14) which connect terminals of the semiconductor chip (12) to inner lead portions (13) of the lead frame (9), and a sealing resin (15); and the lead frame (9) is subjected to an upsetting process so that a supporting portion (11) is located at a position higher than the inner lead portions (13). Since the sealing resin of a thickness corresponding to the step difference of the upsetting exists below the supporting portion, the adhesiveness between the lead frame and the sealing resin can be improved, and high reliability and thinning are realized. Since at least one groove portion is disposed in the surface of each of the inner lead portions (13), the anchoring effect to the sealing resin (15) is enhanced, and stress acting on a lead portion of a product, and stress to the thin metal wires (14) can be relaxed, and leads and the thin metal wires can be prevented from peeling off.
Patent TW-358875-B (TW)
Title: Multi-pass spectrometer
Inventor: ERSHOV ALEXANDER I
IPC: G01J3/12
Filed: 1998-07-28
Granted: 1999-05-21
Abstract: A multi-pass spectrometer for measurement of light intensity at different wavelengths, including: (a) a light beam expander for generation of an expanded light from said light sources; (b) a disperser; (c) a corrector for correction of the light source for generation of parallel light beams for lighting the disperser; (d) a perspective/reflective photo device disposed in transverse of the parallel light beam, for generation at least part of reflective light off the disperser; (e) a spectrometer for measurement in many spaces intensity of the light reflected from the disperser.
Patent TW-473810-B (TW)
Title: Semiconductor element forming process having a step of separating film structure from substrate
Inventor: SAMESHIMA TOSHIYUKI
IPC: H01L21/306
Filed: 1998-09-11
Granted: 2002-01-21
Abstract: The present invention is aimed at providing a process of forming a transistor of excellent properties and its circuit on a substrate of a low heat resistance in simple steps at a low treatment temperature and with high precision. According to an aspect of the invention, there is provided a process of forming a semiconductor device, comprising the steps of forming a separation layer on a support substrate 10, forming, on the separation layer 20, a film structure 30 consisting of a single layer or plural layers, and separating the film structure from the support substrate by removing the separation layer. According to another aspect of the invention, there is provided a process of transferring a film structure which consists of a single layer or plural layers, comprising the steps of forming a separation layer on a first substrate, forming, on the separation layer, a film structure which consists of a single layer or plural layers, adhering a second substrate 40 to the film structure, and separating the first substrate from the film structure.
Patent TW-466369-B (TW)
Title: Display device, large substrate for such display device, and method for making the display device
Inventor: HIRAI KYOKO
IPC: G02F1/136
Filed: 1998-09-22
Granted: 2001-12-01
Abstract: In the present invention, an electrical shielding line (10) formed of Cr of the bottom electrode layer of the TFT device is disposed at the rim portion of the substrate (2). In the early step of the producing the substrate, the precaution procedure to prevent the static charge has been taken, so the devices on the substrate are protected from the static charge damage even if the static charge is generated in the following engineering. The electrical shielding line (10) is used as the base stand of the wiring (53). Accordingly, the deterioration of the electrostatic characteristic in the manufacturing process can be prevented in the LCD integrated with the driver, and the yield rate of manufacturing the product can be increased.
Patent TW-432187-B (TW)
Title: Safety device for a gas appliance
Inventor: UMEMURA KANICHI
IPC: F24C3/12
Filed: 1998-09-25
Granted: 2001-05-01
Abstract: The present safety device where when a body earth terminal is fixed to a base of a bobbin on which a coil of the fixed iron core is wound, the body ground terminal is fixed with an angular difference of at least 90 DEG or more between protrusion directions of a winding start terminal and a winding end terminal. Furthermore, the base plane X-X' of the bobbin is served to be a horizontal plane, and a Y-Y' line is normal to the horizontal plane, the ground terminal projects towards a direction forming an acute angle in relation to the Y-Y' line.
Patent TW-522019-B (TW)
Title: Skin care compounds and their uses thereof
Inventor: ROSE SETH D
IPC: A61K8/46
Filed: 1998-11-18
Granted: 2003-03-01
Abstract: The present invention relates to compounds that are two-part molecules, and compositions containing such compounds, in which one part is designed to become covalently bonded to the skin (bonding agent) and the other part (a characteristic use agent) is designed to impart some characteristic use, such as emolliency, moisturizing effect, anti-acne, anti-wrinkle, anti-pain, antimicrobial, antifungal, antiviral, anti-irritation, skin-tanning and skin lightening effects, extended protection of the skin (e.g., from ultraviolet light, by incorporation of a sunscreen component; from toxic and/or irritating substances; from insects and skin parasites, by incorporation of insecticides and/or insect repellants; from free radicals or other agents, as in aging, by incorporation of antioxidants), or dyeing of hair, skin nails, wool or fur. The covalently bonded part may also be useful to impart skin strengthening effect (e.g., from shear force) or as wound healing agents.
Patent TW-388174-B (TW)
Title: Method for driving interleaved subfield with improved profile of display image
Inventor: HUANG R-FENG
IPC: G09G3/296
Filed: 1998-11-20
Granted: 2000-04-21
Abstract: A method for driving the interleaved subfield with an improved profile of display image, essentially comprises even-oddly separating or sequentially alternating the weight of image signals, which comprises using a processing circuit of alternating subfield image signal to accomplish the separation or alternation of the subfield signal. The method is applicable on the display technique of a plasma display (PDP), and can effectively improve the quality of image display, and reduce the occurrence of sudden brightening or darkening or a distortion on the image profile on the image generated by the plasma display.
Patent TW-408381-B (TW)
Title: Thin film resistor process
Inventor: LI JIA-SHENG
IPC: H01L21/28
Filed: 1999-01-15
Granted: 2000-10-11
Abstract: A manufacture process of thin film resistor is provided. This process could incorporate with the process of self-aligned silicide, so that the thin film resistor could be manufactured by utilizing sub-micron technology. Besides, this invention comprises a step to form one barrier layer on the thin film resistor to protect the thin film resistor from the damage caused by ion bumping and high temperature. The barrier layer could be the oxide layer, the barrier metal formed in the process, or metal.
Patent TW-387855-B (TW)
Title: Reciprocating device on blades
Inventor: KAWARABASHI TSUKASA
IPC: B65H54/28
Filed: 1999-02-04
Granted: 2000-04-21
Abstract: To provide reciprocating device on blades that can reliably prevent yarn carried by a rotating blades past a turning post upon a yarn cut from being wound around a rotating body on which the rotating blades is mounted, the present invention provides a reciprocating device on blades comprising a yarn guide 1 having surface 1a for forming a traverse track, two rotating blades 2 disposed at upper and lower positions in the yarn travelling direction and rotating in opposite directions along the yarn guide 1 to transfer the yarn Y2 to each other at a turning point of the traverse track, and a cover member 51 provided around a rotating body 25 on which the upper rotating blade 2 is mounted.
Patent TW-400393-B (TW)
Title: The metalization process of utilizing the sacrifice layer to avoid the damage of the etch stopping layer
Inventor: LIOU CHUNG-SHI
IPC: C23C30/00
Filed: 1999-02-12
Granted: 2000-08-01
Abstract: This invention discloses a method of metalization process, its main characteristic is to utilize the sacrifice layer to avoid the damage of the etch stopping layer in the process of buffing. Such method includes: (a) to provide a semiconductor substrate covered a dielectrics; (b) to form an etch stopping layer and a sacrifice layer in order on the dielectrics; (c) define the forming contact window or the dielectrics window; (d) to deposite a barrier and a metal layer in order; (e) proceed chemical mechanic polish to form the electrically conductive plug; and (f) proceed the buffing procedure to deprive the above-mentioned sacrifice layer and to keep the etch stooping layer complete, for the subsequent usage of the defining intraconnection groove.
Patent TW-417335-B (TW)
Title: Electrical connector having apring contact with double contact projections as a contact region with contact pad of an external electronic component
Inventor: TAKAHASHI TAKUYA
IPC: H01R13/24
Filed: 1999-04-15
Granted: 2001-01-01
Abstract: A spring contact 10 has a pair of round contact projections 11 and 12 symmetrically formed at both sides of a peak of a bending top thereof. The spring contact is fixed to an insulator 20 at a central portion thereof and has a second contact region 13 at a lower end thereof. The spring contact is located in a natural condition where no external force is applied. In this condition, the round contact projection 11 is located at a position  remotest from the surface of the insulator. When an electronic part approaches perpendicularly to the surface of the insulator, a contact pad of the electronic part at first touches one of the round contact projections 11 and finally touches the other of the round contact projections 12 after the spring contact is deformed and displaced to a deformed position. At this time, the wiping displacement d of the spring contact in the direction perpendicular to the connecting direction of this connector is extremely small.
Patent TW-451158-B (TW)
Title: Substrate which is made from paper and is provided with an integrated circuit
Inventor: KRUL JOHANNES
IPC: B42D15/10
Filed: 1999-04-26
Granted: 2001-08-21
Abstract: The invention relates to a substrate which is made from paper and is provided with at least one integrated circuit which is produced from a semiconductive organic polymer. A semiconductive organic polymer of this nature, when used as the base material for the integrated circuit, leads to the possibility of directly producing the substrate in the required thickness, to the need for support layers and/or protective layers being eliminated, and to the possibility of reducing the cost price of the substrate compared to substrates which comprise an integrated circuit of the silicon type.
Patent TW-491839-B (TW)
Title: Method of purifying carbazole ester precursors of 6-chloro-Α-methyl-carbazole-2-acetic acid
Inventor: HAMMEN PHILIP DIETRICH
IPC: C07D209/86
Filed: 1999-06-10
Granted: 2002-06-21
Abstract: A process of purifying a (6-chloro-2-carbazolyl)methyl-malonic acid di(C1-C6 alkyl) ester of formula (I): wherein Ra and Rb must be the same and are selected from the group consisting of C1-C6 alkyl; comprises phase separating one or more impurities from said carbazole ester at least once wherein the solvent used to carry out said phase separation is acetic acid. In a preferred embodiment said acetic acid is glacial acetic acid which is maintained at a temperature of from about 30 DEG to about 110 DEG C and said carbazole ester is obtained in a purity of at least 99.90% by weight, so that the amount of impurities present therein is 0.10% or less by weight. In a more preferred embodiment of said process, said temperature is from about 50 DEG to about 70 DEG C, and said phase separation is carried out only once.
Patent TW-490427-B (TW)
Title: Cap with cleaning functions and method for making the same, method for cleaning opening of container
Inventor: HIDETOSHI HAYASHI
IPC: B65D41/04
Filed: 1999-07-01
Granted: 2002-06-11
Abstract: A cap can prevent the problem of difficulty in opening the cap due to its containing liquid when the containing liquid is adhered to the outside of the opening of the container. The cap with cleaning functions comprises a top plate 2 and a side wall 3 hanging down along the edge thereof, in which a plurality of cuts 13 are formed on the side wall 3 along the periphery.
Patent TW-426924-B (TW)
Title: Land-side mounting of components to an integrated circuit package
Inventor: BURTON EDWARD ALLYN
IPC: H05K1/18
Filed: 1999-07-20
Granted: 2001-03-21
Abstract: A method and apparatus is presented to allow one or more electrical components to be coupled to the land-side of an integrated circuit package coupled to a circuit board. In a first embodiment, a void is provided in the circuit board, and a peripheral area of the integrated circuit package is coupled to a peripheral area around the void. This provides space for the insertion of components in the land-side of the integrated circuit package. In a second embodiment, a spacer is provided coupled to the peripheral area of the integrated circuit package to allow the insertion of components into the land-side of the package and above the circuit board. With these embodiments of the present invention, components, such as decoupling capacitors can be coupled closer to the die (e.g., a processor die) of the package thus reducing parasitic inductance.
Patent TW-I233630-B (TW)
Title: Method for fabricating semiconductor device
Inventor: SUGAHARA GAKU
IPC: H01L21/318
Filed: 1999-09-14
Granted: 2005-06-01
Abstract: A process control is performed for fabricating both a wafer for a device including a Ge-containing semiconductor film and a wafer for a device, for example, including no Ge-containing semiconductor film on a common fabrication line. When the wafer including the Ge-containing semiconductor film is to be subjected to high-temperature treatment at 700 DEG C or more in the state of the Ge-containing semiconductor film being substantially exposed, the Ge-containing semiconductor film is covered with a cap layer made of Si or the like before the high-temperature treatment. The cap layer may be formed on the common fabrication line. However, if the formation of the cap layer itself involves high temperature of 700 DEG C or more, it is performed on a fabrication line separated from the common fabrication line. Alternatively, the cap layer may be formed on a fabrication line separated from the common fabrication line and the high-temperature treatment at 700 DEG C or more may also be performed on a separated fabrication line. Otherwise, it suffices to only perform the high-temperature treatment at 700 DEG C or more on a separated line.
Patent TW-429534-B (TW)
Title: Manufacturing method for borderless via of semiconductor device
Inventor: LIOU JIA-CHENG
IPC: H01L21/60
Filed: 1999-10-18
Granted: 2001-04-11
Abstract: A manufacturing method for borderless via of semiconductor device is disclosed. The method first sequentially forms the metal layer, BPSG and the first photoresist pattern on a dielectric; next, uses the first photoresist pattern as the etching mast to etch the BPSG as the BPSG plug; then, forms the second photoresist pattern on the metal layer for partly covering the first photoresist pattern and the metal layer; uses the first photoresist pattern, the second photoresist pattern and the BPSG plug as the etching mask to etch the metal layer as the metal lead; then, removes the first photoresist pattern and the second photoresist pattern; forms inter-metal dielectric at the peripheral of the metal lead; removes the BPSG plug to leave the opening in the inter-metal dielectric; then, forms substantially conformed barrier and tungsten metal layer in the opening to fill up the opening.
Patent TW-538413-B (TW)
Title: Semiconductor memory device
Inventor: CHIDA TETSUYA
IPC: G06F12/16
Filed: 1999-11-23
Granted: 2003-06-21
Abstract: A semiconductor memory device which can quickly and certainly read out block valid/invalid information is provided. This semiconductor memory device includes a memory cell array having memory cells arranged in rows and columns, and a valid/invalid information storage unit which stores valid/invalid information of the respective memory cells. The valid/invalid information storage unit is disposed outside the memory cell array.
Patent TW-429602-B (TW)
Title: Structure of high voltage device and the fabricating method
Inventor: YANG SHENG-SHIUNG
IPC: H01L27/08
Filed: 1999-12-17
Granted: 2001-04-11
Abstract: This invention is about a high voltage device structure. The structure includes the second conduction type silicon epitaxy layer that is located on the first conduction type substrate and has a recessed structure. The first well region of the second conduction type is located on the recess side of the silicon epitaxy layer. The second well region of the first conduction type is located on the other side of the recess of silicon epitaxy layer. The third well region of the second conduction type is located in the first well region. Shallow trench isolation is located in the second well region and the fourth well region of the second conduction type is located in the second well region that is under the shallow trench isolation. Gate is located in the recess on top of substrate and covers part of the first well region, the third well region and the shallow trench isolation. Source region of the first conduction type is located in the third well region of the gate side. Drain region of the first conduction type is located in the second well region of the shallow trench isolation that is not covered by gate. Doped region of the second conduction type is located in the silicon epitaxy layer and substrate under the source region.
Patent TW-434160-B (TW)
Title: Steering wheel
Inventor: SUGIYAMA TOSHIYUKI
IPC: B62D1/04
Filed: 2000-03-09
Granted: 2001-05-16
Abstract: A steering wheel which has a core, a cover covering at least a part of the core, a mount member mounted on the cover and a finisher mounted on the mount member. The mount member is fixed to the cover, and the finisher is fixed to the cover through the mount member. The finisher is engaged with the mount member. The core, the cover, the mount member and the finisher in combination form a grip of the steering wheel. The cover is lower in hardness than the core. The mount member is higher in hardness than the cover. The mount member is formed through an insert molding method.
Patent TW-434395-B (TW)
Title: Heat exchanger
Inventor: UEHARA HARUO
IPC: F28F1/04
Filed: 2000-04-25
Granted: 2001-05-16
Abstract: Tubular heat transferring members are disposed in a shell. A kind of fluid passes through the heat transferring members, while the other kind of fluid flows around the heat transferring members in the direction perpendicular to the flowing direction of the former fluid, to make a heat exchange between these fluids through the heat transferring members. No packing member is needed to ease restriction in pressure applied to the fluid, improving the heat exchange efficiency. There is no occurrence of leakage, improving reliability. The opposite end portions of the heat transferring members serve as an inlet to the inside of the heat transferring members and an outlet therefrom and there is no opening formed in the intermediate portion of the heat transferring members without wasting material in a blanking process for the heat transferring members, thus providing an economic effect.
Patent TW-505719-B (TW)
Title: Sewing machine with dust removing device
Inventor: INOUE TADANORI
IPC: D05B73/00
Filed: 2000-05-09
Granted: 2002-10-11
Abstract: This invention relates to a sewing machine with a dust removing device preventing trouble such as faulty sewing caused when dust including waste thread and waste cloth is collected under a throat plate, in performing, for example, interlock stitch sewing by an overlock sewing machine. Specifically, an upward air introducing path is provided, through which the cooling airflow generated by a cooling fan actuated during sewing operation is fed to an air introducing path for oil cooling underneath a lubricating oil storage part, and, through which the cooling airflow passing through the air introducing path for oil cooling is blown up from the underside of a frame to a needle location of the throat plate, in order to blow up the dust. An opening of one end of a suction pipe for collecting dust attached to the frame is disposed sidewise above the throat plate. The self-cleaning action obtained by effectively utilizing the airflow from the cooling fan for cooling lubricating oil, enables to prevent trouble such as faulty sewing due to the collected dust, and prevent dust from widely scattering around the upside of the throat plate, thereby to maintain working environment hygienic.
Patent TW-474856-B (TW)
Title: Vitrified bond tool and method of manufacturing the same
Inventor: ISHIZAKI JUNJI
IPC: B24D18/00
Filed: 2000-07-14
Granted: 2002-02-01
Abstract: A vitrified bond tool including: (a) a support body: (b) a vitrified bond layer which is formed on a working surface of the support body; and (c) a plurality of abrasive grains which are held by the vitrified bond layer so as to be fixed relative to the working surface of the support body and which are spaced apart from each other with spacing between the adjacent ones of the abrasive grains. This vitrified bond tool is advantageously manufactured according to a method including the steps of (i) forming a pattern layer which includes a vitrified bond, in a predetermined pattern on the working surface of the support body; (ii) sprinkling the abrasive grains over the pattern layer before the pattern layer is dried; and (iii) firing the pattern layer and the abrasive grains which are bonded to the pattern layer and are arranged in the predetermined pattern on the working surface of the support body.
Patent TW-498467-B (TW)
Title: Manufacture method of integrated circuit bonding pad
Inventor: LUO JI-JIN
IPC: H01L21/60
Filed: 2000-07-20
Granted: 2002-08-11
Abstract: This invention provides a manufacture method of integrated circuit bonding pad. Firstly, an integrated circuit structure is formed on a substrate and a dielectric layer is formed on top of the integrated circuit structure. Subsequently, a metal layer, a sacrificial layer and a rugged polysilicon layer are formed in order on the dielectric layer, in which the crystallites of the rugged polysilicon layer are distributed on the sacrificial layer in a dispersion fashion. Then, the rugged polysilicon layer is used as a mask to etch the sacrificial layer and the metal layer, in which the metal layer is to be etched to a certain depth. Finally, a plural number of bonding pads are formed by patterning the metal layer after sequentially removing the rugged polysilicon layer and the sacrificial layer.