baber/WOPTO huggingface dataset:
Patent TW-523695-B (TW)
Title: Method for upgrading on-line system
Inventor: LI YUE-CHIN
Filed: 2001-04-13
Granted: 2003-03-11
Abstract: The invention provides an on-line system upgrading method that upgrades an on-line system with a first version (old version) to an on-line system with a second version (new version), which comprises the following procedures: (1) the upgrade server activates the upgrade service module; (2) the upgrade server informs the on-line system with first version to perform upgrade preparation; (3) if the on-line system with first version confirms the current state as safe upgrade idle state, the on-line system with the first version commands an event register module to save the events to be processed by the on-line system and to save the vanishing information upon stopping the operation of the on-line system with the first version in a storage device; and the safe upgrade idle state indicates that the idle state period of the on-line system with the first version is more than the time required to upgrade the on-line system with the first version to the on-line system with the second version; (4) the notification module of upgrade service in the on-line system with the first version can start upgrading; (5) the upgrade service module activates the on-line system with the second version as an upgrade activation state; (6) the upgrade service module activates the on-line system with the second version as an upgrade activation state; (6) the on-line system with the second version retrieves the vanishing data upon stopping operation of on-line system with the first version saved in the storage device; (7) the on-line system with the second version retrieves all the events saved in the event register module to be processed by the on-line system for event processing.
Patent TW-522740-B (TW)
Title: Statistical multiplexer and remultiplexer that accommodates changes in structure of group of pictures
Inventor: WANG LIMIN
IPC: H04N7/50
Filed: 2001-04-20
Granted: 2003-03-01
Abstract: A system for rate control during transcoding and encoding of digital video data in a multi-program transmission environment accommodates changes in the GOP structure of any of the programs, e.g., due to a commercial insertion or the like. A hierarchical bit allocation scheme is used, where bits are allocated on a super group of pictures (GOP) level, i.e., a grouping of multiple GOPs, a super frame level, and an individual frame level. The bit allocation for the super GOP and each picture is adjusted when a change in the structure of a group of pictures (GOP) is detected for any of the pre-compressed programs. The super GOP length may also be adjusted if required to maintain an integer number of GOPs therein. A change in the GOP structure is detected based on a change in the GOP length or sub_GOP length (distance between P pictures). For pre-compressed data, initial GOP lengths and sub_GOP lengths can be assumed and adjusted as required based on actual measurements. For a current I or P picture, the sub_GOP length is calculated based on temporal references of the current picture and a previous I or P picture. For a current B picture, the same calculation is used, plus one picture.
Patent TW-580829-B (TW)
Title: Real size display system
Inventor: NAH KEUN-SHIK
IPC: H04N5/225
Filed: 2001-05-07
Granted: 2004-03-21
Abstract: Disclosed is a real size display system comprising a real size display system comprising a photographing unit for photographing an image of a subject, and outputting first image information which includes measured information of the subject; a flat panel display unit for outputting information of installed dot size; and an image converter for receiving the first image information, converting the first image information based on the dot size information received from the flat panel display unit, and outputting second image information, which is linked to the flat panel display unit, to the flat panel display unit.
Patent TW-567399-B (TW)
Title: Novel lactone compounds having alicyclic structure and their manufacturing method
Inventor: KINSHO TAKESHI
IPC: C07D307/33
Filed: 2001-06-01
Granted: 2003-12-21
Abstract: This invention discloses a lactone compounds represented by the following formula (1), in which R1 is H or C1-6 alkyl, R2 is H or an acyl or C1-15 alkoxycarbonyl group which may be substituted with halogen atoms, Z is a divalent C1-15 organic group which forms a lactone ring with the carbonyloxy group, k is 0 or 1, and m is an integer from 0 to 5. The resist composition formulated using the polymer resulting from polymerization of the inventive lactone compound lends itself to micropatterning with electron beams or deep-UV rays since it is sensitive to high-energy radiation and has excellent sensitivity, resolution, and etching resistance. Especially because of the minimized absorption at the exposure wavelength of an ArF or KrF excimer laser and firm adhesion to the substrate, a finely defined pattern having sidewalls perpendicular to the substrate can easily be formed. The resist composition is thus suitable as micropatterning material for VLSI fabrication.
Patent TW-583512-B (TW)
Title: Lithographic manufacturing process, lithographic projection apparatus, and device manufactured thereby
Inventor: FINDERS JOZEF MARIA
IPC: G03F7/20
Filed: 2001-06-05
Granted: 2004-04-11
Abstract: A lithographic manufacturing process is disclosed in which a first information on a first lithographic transfer function of a first lithographic projection apparatus is obtained. The information is compared with a second information on a second lithographic transfer function of a second lithographic projection apparatus, for reference. The difference between the first and second information is calculated. Then the change of machine settings for the first lithographic projection apparatus, needed to minimize the difference, is calculated and applied to the first lithographic projection apparatus, such that the match between the first and second lithographic projection apparatus of any pitch-dependency of feature errors is improved.
Patent TW-508464-B (TW)
Title: Mems device having multiple DWDM filters
Inventor: BJORKLUND GARY C
IPC: G02B6/34
Filed: 2001-08-29
Granted: 2002-11-01
Abstract: An optical signal processing method and a device which can serve as a signal multiplexer or demultiplexer can be tuned in discrete increments. This device has a movable filter assembly having a number of filters, with each filter having a surface which reflects a particular wavelength of light and passes other wavelengths of light. This defines two wavelength-dependent signal paths. Light reflecting from a reflective surface of the filter passes along one signal path which includes an input waveguide and a first output waveguide. Light transmitted through the filter travels along another signal path which includes the input waveguide and a second output waveguide. The filter can be contained in a trench separating the input and second output waveguides, and can be moved in the trench to alter the optical properties of the two signal paths.
Patent TW-508881-B (TW)
Title: Mode translating waveguide adapter for a quasi-optic grid array
Inventor: CHEUNG CHUN-TUNG
IPC: H01Q15/24
Filed: 2001-06-13
Granted: 2002-11-01
Abstract: The present invention discloses a simple adapter that transitions between a standard rectangular waveguide environment and the quasi-plane wave (quasi-TEM mode) environment of an active grid array assembly. The device may serve as a mode expanding waveguide feed or as a mode contracting waveguide collector.
Patent TW-530450-B (TW)
Title: Switching power supply having an improved power factor by voltage feedback
Inventor: YASUMURA MASAYUKI
IPC: H02M1/00
Filed: 2001-07-11
Granted: 2003-05-01
Abstract: A switching power supply circuit formed by providing a complex resonance type converter with a power factor improving circuit feeds back a voltage resonance pulse voltage generated in a primary-side voltage resonance converter to fast recovery type diodes via a tertiary winding or the tertiary winding and a series resonant capacitor by magnetic coupling to thereby improve a power factor to 0.9, and achieves an improvement in AC/DC conversion efficiency and a reduction in a ripple component of a direct-current output voltage by voltage doubler rectifier operation. Also, a first rectifier circuit and a second rectifier circuit shunt the current to be stored in a smoothing means, so that a range of zero volt switching operation is not narrowed even when the power factor is improved.
Patent TW-508277-B (TW)
Title: Method for recycling platinum metals from waste catalyst of waste car
Inventor: YANG JIN-JUNG
IPC: B09B3/00
Filed: 2001-07-19
Granted: 2002-11-01
Abstract: The present invention relates to a method for recycling platinum metals from a waste catalyst of a waste car by a wet metallurgical metal replacement and ultrasonic assisted solvent extraction. A waste catalyst carrier or support of a waste car, after pulverization, is recycled by extraction by the following procedure: (1) using a royal water immersion method to dissolve platinum from the waste catalyst into liquid phase; (2) using a zinc powder replacement method to reduce the platinum metals and the basic metal in the immersion solution of royal water to form a precipitation; adding an acid to dissolve the precipitation of the basic metal and an excessive amount of the zinc powder, thereby concentrating the platinum; (3) using royal water to dissolve the platinum precipitation and removing the nitric acid and hydrochloric acid, respectively, and using hydrochloric acid solution to dissolve the mixture; and (4) using a solvent extraction to separate and purify the platinum metals from the platinum-rich solution in the hydrochloric acid medium, and using an ultrasonic oscillation to assist the solvent extraction and reverse-extraction.
Patent TW-561346-B (TW)
Title: Multiple removable non-volatile memory cards serially communicating with a host
Inventor: CEDAR YORAM
IPC: G06F12/00
Filed: 2001-08-16
Granted: 2003-11-11
Abstract: Two or more very small encapsulated electronic circuit cards to which data are read and written are removably inserted into two or more sockets of a host system that is wired to the sockets. According to one aspect of the disclosure, command and response signals are normally communicated between the host and the cards by a single circuit commonly connected between the host and all of the sockets but during initialization of the system a unique relative card address is confirmed to have been written into each card inserted into the sockets by connecting the command and status circuit to each socket one at a time in sequence. This is a fast and relatively simple way of setting card addresses upon initialization of such a system. According to a second aspect of the disclosure, the host adapts to transferring data between it and different cards of the system over at least two different number of the data lines commonly connected between the host and all of one or more sockets, each card permanently storing a host readable indication of the number of parallel data lines the card is capable of using. This allows increasing the rate of data transfer when the need justifies an increased card circuit complexity. According to a third aspect of the disclosure, a serial stream of data is sent over a number of data lines from one to many by alternately connecting bits of the stream to a particular number of individual lines.
Patent TW-515012-B (TW)
Title: Plasma-processing apparatus, plasma-processing method, and chip mounted method
Inventor: FURUKAWA RYOTA
IPC: H01L21/00
Filed: 2001-09-07
Granted: 2002-12-21
Abstract: A plasma-processing apparatus providing a resin mold domed enough to allow no bonding wires to be exposed is presented. The plasma-processing apparatus cleans a board including a chip mounted thereon and a disposing area for a pad formed around the chip. The apparatus includes a chamber for accommodating the board; an electrode mounted to the chamber for generating plasma in the chamber with a voltage applied thereto, a table for supporting the board in the chamber, and a masking member which is provided above the board. The masking member has an opening for exposing the chip and the disposing area to the plasma.
Patent TW-536855-B (TW)
Title: RF connector and the manufacturing method thereof
Inventor: WU RUNG-FA
IPC: H01R43/00
Filed: 2001-12-26
Granted: 2003-06-11
Abstract: A RF connector is disclosed, which comprises a first plate material having metal housing, a second plate material having a center terminal and an insulation main body integrated in one formation, wherein the center terminal comprises a contact part. The manufacturing method of the connector comprises the following steps: firstly, punching the metal housing and center terminal on the first and second plate materials, disposing the first plate material at the proper position of the second plate material, in which the metal housing of the first plate material corresponds to the center terminal of the second plate material, moving the first and second plate material synchronously, so that the contact part of the center terminal is disposed inside the metal housing; and finally forming the insulation main body integrally to hold the center terminal and the metal housing.
Patent TW-550517-B (TW)
Title: Image pre-processing method for improving correction rate of face detection
Inventor: HUANG YA-SHIUAN
IPC: G06K9/00
Filed: 2002-01-11
Granted: 2003-09-01
Abstract: The present invention is an image pre-processing method for improving correction rate of face detection, which can enhance the contrast between the dark pixels and the periphery bright pixels of the input image, and increase the brightness difference between dark pixels and bright pixels. Thus, even in the condition for the image with non-uniform brightness, the method can make the eyes on the face more obvious, and the following algorithm for detecting the face with eyes on the face can rapidly and correctly detect the face.
Patent TW-526128-B (TW)
Title: Method and structure for automatically forming fins and connectors
Inventor: HUANG MENG-JENG
IPC: B26F1/00
Filed: 2002-01-15
Granted: 2003-04-01
Abstract: Disclosed is a method and structure for automatically forming fins and connectors, comprising the steps of: feeding a material strip into a pressing machine by means of a feeding roller, the pressing machine including a continuous stamping mold; advancing the material strip along a bottom mold of the stamping mold by means of a guiding device for punching, forming peripheries, expansion, drawing and bending edges of the material strip by a top mold; cutting the material strip by means of the top mold after each cycle; trimming end edges by means of pressing blocks while pressing formed sheet-like fins into the connector with the trimming step simultaneously; stacking the sheet-like fins along with the pressing block above the connector by means of a stepping device, the connector being arranged to a feeding apparatus for feeding the connector into a positioning device in order to automatically refilling the connector after stacking the fins.
Patent TW-580611-B (TW)
Title: A time recording device and a time recording method employing a semiconductor element
Inventor: PALM HERBERT
IPC: G07F1/00
Filed: 2002-02-20
Granted: 2004-03-21
Abstract: A time recording device employs a floating gate cell, wherein an ON layer structure or an ONO layer structure is provided between floating gate and control gate. A charge injection unit is provided to inject charges into the floating gate electrode and into the nitride layer of the ON structure or the ONO structure by applying a voltage or voltage pulses to the control gate electrode, a centre of concentration of the charges injected into the nitride layer being located at the interface between oxide layer and nitride layer of the layer sequence. The time recording device also includes a unit for recording a time which has elapsed since charge injection on the basis of changes in the transmission behaviour of the channel region caused by a shift in the centre of concentration of the charges in the nitride layer away from the interface.
Patent TW-565914-B (TW)
Title: Method of production of circuit board, semiconductor device, and plating system
Inventor: MASHINO NAOHIRO
IPC: H01L23/32
Filed: 2002-05-16
Granted: 2003-12-11
Abstract: A method of production of a circuit board able to prevent peeling of a conductive layer during polishing of the conductive layer including the steps of forming at least holes in one surface of a substrate; forming a plating power supply layer on the one surface of the substrate, the other surface, the sides, and inner surfaces of the holes; forming a metal layer formed on the one surface of the substrate, the other surface, and the sides and burying the holes by electroplating through the plating power supply layer; and polishing the metal layer to form interconnect patterns comprised of the metal layer buried in the holes.
Patent TW-589639-B (TW)
Title: Device for applying a liquid layer to a disk-shaped record carrier
Inventor: TEN THIJE JORIS JOHAN
IPC: B05C11/08
Filed: 2002-05-24
Granted: 2004-06-01
Abstract: A device for applying a liquid layer to a disk-shaped record carrier, which device is provided with a holder rotatable about a center line, for operatively supporting the record carrier, a first annular discharge channel extending around the center line, and a second discharge channel extending around the first annular discharge channel. The annular discharge channels situated under the holder are provided with a first and a second axially extending outer wall, respectively, which outer walls extend axially beyond the holder. At least the second outer wall is provided with a deflecting wall directed towards the center line, while the deflecting wall connected with the second outer wall extends radially over the first outer wall, with an annular gap situated between the first outer wall and the deflecting wall.
Patent TW-I223729-B (TW)
Title: Improved segment electrophoretic displays and methods for their manufacture
Inventor: HOU JACK
IPC: G02F1/167
Filed: 2002-06-03
Granted: 2004-11-11
Abstract: The present invention relates to novel patterned embossing and patterned filling methods. Both methods are simple, reliable and cost effective ways for manufacturing the segment of signage electrophoretic displays. The displays prepared by the present invention requires only one patterned electrode layer. The undesired visible line traces are eliminated and the manufacture of the present displays does not involve the costly precision registration step used in the previously known assembly processes dealing with two patterned electrodes. Moreover, the electrophoretic fluid is present only in the patterned and switchable area of the display. This not only significantly reduces the material cost, but also improves the overall display quality by reducing defects and non-uniformity.
Patent TW-588016-B (TW)
Title: Process for obtaining bulk mono-crystalline gallium nitride
Inventor: DWILINSKI ROBERT
IPC: C30B29/38
Filed: 2002-06-06
Granted: 2004-05-21
Abstract: A bulk monocrystalline gallium nitride is obtained by using a supercritical ammonia. A supercritical solvent containing ions of an alkali metal is formed in an autoclave, then a monocrystalline gallium nitride formed by Flux method is dissolved as a feedstock in the autoclave to form a supercritical solution and simultaneously or separately recrystallizing gallium nitride on the surface of a seed.
Patent TW-I236665-B (TW)
Title: Optical disk apparatus
Inventor: WADA YASUHIRO
IPC: G11B19/04
Filed: 2002-06-17
Granted: 2005-07-21
Abstract: An optical disk apparatus, which decreases probability of impossibility of correcting an error in reading, is provided, where the error results from deviation of a writing-resuming position in resumption of writing. When an amount of data in a buffer becomes not more than a given amount of data, a buffer-underrun-detecting-circuit judges that the data are in a buffer-underrun-condition. According to the judgement, a writing-interrupting-and-resuming-circuit detects an end position of the last pit for writing, and the position is stored in a time-information-memory, and the optical disk apparatus becomes in a pause condition of writing. When the buffer-underrun-condition is avoided, the optical disk apparatus releases the pause condition of writing, and reads the position of interruption of writing from the time-information-memory, and then synchronizes data written on an optical disk and the data for writing. After that, writing is resumed with a given interval formed between the data written and the data for writing.
Patent TW-554147-B (TW)
Title: Water lock tap
Inventor: TSUTSUI HIDETAKA
IPC: E03C1/042
Filed: 2002-06-25
Granted: 2003-09-21
Abstract: A water lock tap can be attached to a pedestal from above a washstand or the like. The water lock tap comprises a pedestal, which is secured to an attachment object such as a washstand, a pipe attachment member for attaching a water supply pipe to the bottom of the pedestal, and a neck, which is secured to the pedestal; the pedestal comprises a mesh structure for securing the neck to the outer periphery of the pedestal, and having a ring-like blade section which clips into an attachment hole, provided in the attachment object, and a cylindrical moving member which is suspended from the ring-like blade section and has a plurality of protruding members, which are pressed toward the outside when a cylindrical member having a screw notch in its outer periphery is screwed into a cylindrical space having a screw notch in its inner periphery, the cylindrical member having a slightly smaller diameter than the cylindrical space; the pipe attachment member comprises a screw notch section which functions as the cylindrical member, a flange section which connects to the screw notch section and is accommodated in the ring-like blade section in the pedestal, and a join section which is connected to the water supply pipe.
Patent TW-540159-B (TW)
Title: Manufacturing method of flash memory source line
Inventor: LIN CHI-HUI
IPC: H01L21/8247
Filed: 2002-07-09
Granted: 2003-07-01
Abstract: A manufacturing method of flash memory source line is provided, which comprises first sequentially forming a first insulation layer, a first conduction layer and a second insulation layer on a substrate, and then patterning the second insulation layer to make an opening upon the substrate to expose the first conduction layer; second forming first spacers on the bottom fraction of the first opening and then forming second spacers on the top fraction of the first opening and the first spacers to construct a T-shape cross section opening; third removing the exposed first conduction layer in the opening and then forming third spacers on the sidewalls of the first and second spacers; and finally forming source in the substrate of the opening and filling up a second conduction layer to make T-shape source line and its electrical connection.
Patent TW-569018-B (TW)
Title: A rework operation method for saving integrated circuit device
Inventor: WANG JEN-FANG
IPC: G01R31/26
Filed: 2002-07-16
Granted: 2004-01-01
Abstract: A kind of rework operation method for saving integrated circuit device is revealed in the present invention. In the invention, the integrated circuit (IC) device is packaged in a ball grid array (BGA) manner and contains the followings: (a) conducting an initial test step to sieve out the damaged and malfunctioned IC device; (b) baking the targeted IC devices at a predetermined temperature for the predetermined time period; (c) removing at least one solder ball of IC device; and (d) placing solder ball again at the portion of the IC device where the solder ball has been removed.