baber/WOPTO huggingface dataset:
Patent JP-S6126945-A (JP)
Title: Objective lens driver for optical information recording and reproducing device
Inventor: KOKADO HIROSHI
IPC: G11B7/09
Filed: 1984-07-16
Abstract: PURPOSE:To facilitate the winding of two coils and to attain the simple and assured control of the distance between both coils and two magnets, by using an objective lens holder that can move in both focusing and tracking directions as well as said two coils and two magnets. CONSTITUTION:When two track coils 105 are energized, coincidence is obtained between the directions where both coils 105 receive the force since two magnets 107 are set so that they have the same polarity at the side of an objective lens 1. Thus an objective lens holder 101 is driven toward the track direction T. When a focus coil 106 is energized, coincidence is obtained between the directions of the force received from magnets 107. Thus the holder 101 is driven in the focusing direction. The coil 105 is wound around a bobbin 104 and fixed to the holder 101. Thus no disconnection is caused since the coil 106 is wound orthogonally round the outer circumference of the holder 101. Furthermore the gap distance between the magnet and the coil can be controlled simply and accurately. This can decrease the number of manufacturing processes and improve the productivity of the titled objective lens driver.
Patent JP-S5848122-A (JP)
Title: Current limiting circuit
Inventor: OKADA KUNIAKI
IPC: H02H9/02
Filed: 1981-09-18
Abstract: PURPOSE:To suppress the maximum value of a charging current low by connecting a transistor (TR) circuit, connecting with a bias circuit including a CR parallel connection between the base and emitter, in parallel to at least one FET circuit having the source and gate short-circuited. CONSTITUTION:The current limiting circuit 5 consists of a field effect transistor (FET) circuit 5a interposed in series in the current supply path from a voltage source 1 to a load 2, and a TR circuit 5b connected in parallel to the FET circuit 5a. The n type FET51 constituting the FET circuit 5a, while having the source S and gate G short-circuited, is connected at the source S to the side of the load 2, and also connected at the drain D to the side of the voltage source 1. In the TR circuit 5b, the bias circuit consisting of a capacitor 53 and a resistance 54 connected in parallel is connected between the emitter E and base B of a PNP-type TR52, which is connected to the voltage source 1 at the emitter E, to the load 2 at the collector C, and to an earth line at the base B through a resistance 55.
Patent JP-S6045528-A (JP)
Title: Improver for ischemic cerebral disease
Inventor: OGUCHI YOSHIHARU
IPC: A61P7/00
Filed: 1983-08-11
Abstract: PURPOSE:An extremely safe improver for ischemic cerebral diseases useful for ischemic diseases followed by cerebral infarct caused by cerebral thrombosis or arterioschlerosis, comprising protein polysaccharide derived from Basidiomyces belonging to the genus Coriolus versiclor as a main component. CONSTITUTION:An improver for ischemic cerebral diseases comprising protein polysaccharide, an extract of a mycelium culture obtained by cultivating Basidomyces belonging to the genus Coriolus versicolor or its fruit body with hot water or an alkali solution as an active ingredient. The protein polysaccharide (e.g., krestin) contains 18-38wt% protein, has 5,000-300,000 molecular weight (ultracentrifugation method), its saccharide part is beta-D-glucan, constituent amino acids of protein are aspartic acid, leucine, etc., and it shows properties of solubility in water, etc. Oral administration is preferable, and a dose is 10-1,000mg/day/ kg, preferably 20-600mg/day/kg.
Patent JP-H0311828-A (JP)
Title: Parity signal insertion circuit
Inventor: SHIMIZU HIROSHI
IPC: H04L25/497
Filed: 1989-06-08
Abstract: PURPOSE:To make the circuit constitution small by providing a parity insertion circuit to a sender side precoder. CONSTITUTION:An OR gate 41 inserting a parity signal is provided on a sender side precoder comprising of an exclusive OR circuit 1 receiving an input signal and an its own N-bit delay signal and generating exclusive OR. The gate 41 divides a transmission code into N-set (N>=1) phases at an interval of N-bit and gives an even parity bit to each of N-set signal series. Then '0' or '1' is given to a delay circuit 2 at the time location of the insertion of the parity bit of each of the N-set of signal series and the signal of the circuit 1 is fed as it is to the circuit 2 at other time location. Thus, the exclusive OR processing used in the precoder and the exclusive OR processing generating the parity sum are realized by the same circuit to make the circuit small in the scale.
Patent JP-2000333738-A (JP)
Title: Table
Inventor: TAKASHIMA SHIGEYUKI
IPC: A47B7/00
Filed: 1999-05-26
Abstract: PROBLEM TO BE SOLVED: To provide a table, both panel and option members of which can be supported on legs and can be handle integrally with a table, in a table in which a top plate supported on a pair of right and left legs are arranged at least at edges to be used along a previously set top plate module. SOLUTION: In a table T, a top plate 1 following the specification of a top plate module M, a panel P1 and an option member O can be arranged properly by arranging the rear end 32 of a leg 3 along the side edges and edges opposite to edges to be used of he top plate module M, and forming a panel mounting portion to mount the panel P1 on the rear side of the rear end 32 of the leg 3 along the edges opposite to the used edge of the top plate module M, and an option member mounting portion to support an option member O above the rear end 32 is disposed on the rear end 32.
Patent JP-S627580-A (JP)
Title: Carriage controller for printer
Inventor: HORI MASAAKI
IPC: H02P8/36
Filed: 1985-07-04
Abstract: PURPOSE:To restrict a temperature rise in a stepping motor in a printer to a range within a predetermined value, by delaying the timing of starting printing by predetermined period of time at an end of reciprocation of a carriage. CONSTITUTION:When the carriage comes to an end of a printing line, a CPU 14 receives a signal V2 obtained by analog-to-digital conversion of an output voltage V1 of a power source device 3, and compares it with a threshold voltage Vth. When the driving voltage V2 is higher than the threshold voltage Vth, a map stored in a ROM 15 is retrived, and a delay time Td necessary for the driving voltage V2 is obtained. The delay time is set to be longer as the driving voltage V2 is higher. After the lapse of the delay time, Td, driving of the motor 5 is started, thereby starting printing. When the driving voltage becomes higher than the threshold value, the start of the driving of the motor 5 is thus delayed by a period of time corresponding to the difference, and accordingly, the motor is permitted to cool, and the temperature rise in the motor can be restricted.
Patent JP-S5848507-A (JP)
Title: Modulator
Inventor: WAKE NAOHISA
IPC: H03C3/00
Filed: 1981-09-18
Abstract: PURPOSE:To avoid the interference between FSK and FM modulations, by switching the outputs of low pass filters of two PLLs which have one voltage- controlled oscillator (VCO) in common and consist of an FSK modulation loop and an FM modulation loop. CONSTITUTION:An FSK modulation loop consists of a VCO1, a reference signal oscillator 2, a mixer 3 frequency-converting the output of the VCO1 with the output of the oscillator 2, a variable frequency divider 4, a reference frequency divider 5, a phase detector 6 and a low-pass filter 7. An FM modulation loop consists of a fixed frequency divider 8, a reference frequency divider 9, a phase detector 10 and a low-pass filter 11. A changeover device 12 switches the FSK and the FM modulation loop. The output of the VCO1 is frequency-divided at an output frequency divider 13, spurious components are eliminated at a band pass filter 14 and transmitted to a terminal 18 to obtain an FSK or FM modulation wave.
Patent JP-S5936357-A (JP)
Title: Magnetic recording and reproducing device
Inventor: HASHIMOTO KOUSUKE
IPC: G11B15/44
Filed: 1982-08-23
Abstract: PURPOSE:To stabilize the operation of a magnetic recording/reproducing device, by driving a capstan and a reel driving disk by a motor and driving with friction the reel driving disk with a slip torque in a record/reproduction mode and with a synchronous torque in a fast forward/rewind mode respectively. CONSTITUTION:The slip torque of a motor is extracted by the 1st pulley 12 with forward revolutions of the motor in a record/reproduction mode, and a reel driving disk 22b of the take-up side is revolved toward an arrow E. While the synchronous torque of the motor is extracted by a pulley 8, and a capstan 4 is revolved toward an arrow F. Then a pinch roll 27 moves away from the capstan 34 in a fast forward/rewind mode, and a cam follower 45 hits an expanded part 46a of a cam 46. Thus a roll 42 touches pulleys 12 and 41 at a time. Therefore the synchronous torque is extracted from the pulley 12, and the 1st belt 37 hits a rotor 38b via the 2nd pulley 36. Thus a satisfactory take-up torque is obtained. In such a way, a stable operation is possible for a magnetic recording/reproducing device.
Patent JP-H08338351-A (JP)
Title: Capacitor discharge type ignition device for internal combustion engine
Inventor: KINOSHITA ATSUFUMI
IPC: F02P3/08
Filed: 1995-06-14
Abstract: PURPOSE: To provide the capacitor discharge type ignition device which can obtain a reference signal providing a reference position for the measurement of an ignition position without producing excessive voltage for a capacitor when an engine is in operation at high speed, with no signal generator provided. CONSTITUTION: A capacitor C1 is charged by both the positive and half cycle output of an exciter coil 104 and the output of a DC converter circuit 6 boosting the voltage of a battery 4, and a spark plug is ignited by letting the electric charge of the capacitor C1 be discharged by way of a thyristor Th1. When a detected value for the negative and half cycle output voltage of the exciter coil agrees with a reference voltage, a transistor Tr8 is energized so as to allow a reference signal to be generated. An ignition position operated by a microcomputer 3 is measured from the generation position of the reference signal, and an ignition signal is given to the thyristor Th1 at a measured ignition position so as to allow a spark plug to be ignited.
Patent JP-H10335962-A (JP)
Title: Piezoelectric parts and manufacture of the same
Inventor: TANAKA YASUHIRO
IPC: H03H9/05
Filed: 1997-06-05
Abstract: PROBLEM TO BE SOLVED: To obtain piezoelectric parts provided with holding terminals which are little affected by damping and can surely stably hold a piezoelectric resonator. SOLUTION: Relating to piezoelectric parts 1, a piezoelectric resonator 15 which is provided with vibrating electrodes 12 and 13 on the upper and lower surfaces of a piezoelectric substrate and makes areal vibrations is held between a pair of holding terminals 21 and 22 in a case 11. The terminals 21 and 22 are respectively constituted of electrode sections 21a and 22a, outside connecting sections 21b and 22b, and holding sections 21c and 22c. The vibrating electrodes 12 and 13 of the resonator 15 are respectively press-contacted with the press- contacting surfaces 23a and 23b of the holding sections 21c and 22c over the whole areas. Fine projections are formed on the press-contacting surfaces 23a and 23b, so as to make the surface roughness of the press-contacting surfaces 23a and 23b larger than those of the electrodes 12 and 13.
Patent JP-H073040-A (JP)
Title: Production of friction material
Inventor: SAKATA TOICHI
IPC: C09K3/14
Filed: 1993-06-18
Abstract: PURPOSE:To obtain a method for producing a friction material in which the friction material having a stable friction coefficient and a low wear rate even under conditions of a high temperature and load can be produced. CONSTITUTION:This method for producing a friction material is to knead or impregnate (d) a substrate composed of a fibrous material with a composition for the friction material containing (a) 20-70 pts.wt. binder, (b) 30-80 pts.wt. friction modifier [with the proviso that the total amount of the components (a) and (b) is regulated to 100 pts.wt.] and (c) carbon black in an amount of 15-50 pts.wt. based on 100 pts.wt. total amount of the components (a) and (b), then dry the kneaded or impregnated substrate, preform the dried kneaded or impregnated substrate, hot press form the preformed substrate, further heat- treat the hot press formed substrate at 230-330 deg.C for 1-8hr and subsequently cure the heat-treated substrate.
Patent JP-H05876-A (JP)
Title: Compost producing equipment
Inventor: HASHIMOTO KIYOBUMI
IPC: C05F11/06
Filed: 1991-06-19
Abstract: PURPOSE:To eliminate the need for cutting work in the production of compost and to produce compost in a short time. CONSTITUTION:An air supply means 12 constituted of an air supply pipe 8 having many blowout holes 8A is provided to the lower part of the inside of the compost tank 1. A suction means 14 constituted of a suction pipe 9 having suction holes 9A is provided to the upper part of the inside of the compost tank 1. A circulation driver U described below is provided to the outside of the compost tank 1. The circulation driver U circulates the air in a range of the suction means 14 via the inside of a heaped layer 5 from the air supply means 12. The suction pipe 9 is placed on the uppermost face of the heaped layer 5 in the inside of the compost tank 1. The uppermost face of the heaped layer 5 containing the suction pipe 9 is covered with a pressing sheet 6 for dissipating fermentation heat or the like.
Patent JP-H04371009-A (JP)
Title: Production of surface acoustic wave filter
Inventor: HASHIMOTO KAZUYUKI
IPC: H03H3/08
Filed: 1991-06-20
Abstract: PURPOSE:To prevent pyroelectric destruction to improve the yield of a filter by connecting a ground terminal and a ground electrode to a leading-out line at the time of forming a protective layer to prevent the potential difference among conductive patterns formed on a substrate having the pyroelectric capac ity even at the time of the change of temperature accompanied with formation of the protective layer. CONSTITUTION:An Al conductive film is stuck to the surface of a substrate 21 cut out from single crystal of, for example, a 36 deg. Y-X LiTaO3 and is selectively removed by photolithography to form many conductive patterns 22, and many connection lines 24 are used to connect them to an Al layer 25 remaining between conductive patterns adjacent in the X-Y direction and in the outer peripheral part of the substrate 21. Connection lines 24 connected to adjacent patterns are extended from an input terminal 6, an output terminal 7, a ground terminals 8 in endmost parts, and end parts in the transverse direction of a leading-out line 10, and patterns 22 are covered with a protective layer, and middle parts of exposed connection lines 26, 27, and 24 are cut by etching, and the substrate 21 is so divided that each divided piece includes the pattern 22.
Patent JP-H04370945-A (JP)
Title: Method and apparatus for face down bonding
Inventor: WAKAYAMA HIROYUKI
IPC: H01L21/60
Filed: 1991-06-20
Abstract: PURPOSE:To provide the method and apparatus for face down bonding by which an appropriate bonding can be available at all times, concerning the method and apparatus for face down bonding by which a bonding condition can be identified. CONSTITUTION:In the method for face down bonding of an electronic component or printed wiring board (hereinafter simply called 'electronic component') 3 and another electronic component 4 through bumps 5a, 5b, a difference is made in temperatures between the one electronic component 3 and the other electronic component 4 and a bonding condition at the time of bonding the bumps 5a, 5b of the two electronic components 3, 4 is identified by an infrared camera 1. When the two electronic components 3, 4 abut each other, heat is transmitted to the infrared camera 1. Consequently, the size of images of the bumps 5a, 5b when the bonding condition of the upper and lower bumps 5a, 5b is appropriate differs from the one when the bonding condition in inappropriate.
Patent JP-H11242893-A (JP)
Title: Non-volatile semiconductor storage device and its data write-in method
Inventor: NOBUKATA HIROMI
IPC: G11C16/04
Filed: 1998-05-28
Abstract: PROBLEM TO BE SOLVED: To provide a non-volatile semiconductor storage device which can reduce write-in time, and the data write-in method for the device. SOLUTION: The device is provided with a latch circuit Q22, Q21 and with the write control circuit 12 which writes by charging the corresponding bit line to the ground voltage, if latch data is the data '00' that makes the threshold voltage of a storage cell a value most separated from the threshold voltage in the initial erase state, and by charging to a voltage VB higher than the ground voltage, if the latch data is the data that makes other threshold voltage. Concretely, in the case of quarternary value, the device is so constituted that the write-in of the data '10', '01' and that of the data '00' are carried out parallelly, and that the electric field is raised relating to the tunnel oxide film of the cell in which the data '00' is written.
Patent JP-S5938875-A (JP)
Title: Separate classification registering system
Inventor: KUMAGAI SHIYOU
IPC: G07G1/00
Filed: 1982-08-27
Abstract: PURPOSE:To prevent a registration error beforehand, by displaying a character data corresponding to an inputted classification number and executing the confirmation of coincidence with a designated commodity, prior to registration. CONSTITUTION:Plural classification numbers and character data of commodities corresponding to the classification numbers are stored in advance in a PLU memory 15. Whenever a registering key in an input part 8 is operated, a classification number corresponding to an inputted registered value and its corresponding character data are read out of the PLU memory 15, are displayed by a display part 6 through a CPU 10 and a display controlling circuit 12, and when a classification designating key is operated, the registering operation is executed in accordance with the number corresponding to the inputted registered value.
Patent JP-S5373311-A (JP)
Title: Clutch motors
Inventor: SEKIZAWA SADAO
IPC: H02K7/112
Filed: 1976-12-10
Abstract: PURPOSE: To devise an effective usage of a component able to both uses of a precious lining by adhering a lining material of a brake and a clutch ring to an other part material than a ring, and by making it detachable by a combining part material such as a screw etc. 
     COPYRIGHT: (C)1978,JPO&Japio
Patent JP-H05185587-A (JP)
Title: Method and apparatus for automatic inspection of exposed and folded printing plate
Inventor: JIYON DABURIYUU PAWAAZU
IPC: G01B7/00
Filed: 1992-06-08
Abstract: PURPOSE:To carry out automatic inspection on exposed and folded printing plates by a method wherein the printing plates are inspected automatically and those plates on which images are not formed on correct positions are sent automatically to a first course for carriage and those on which the images are formed on correct positions are sent automatically to a second course for carriage. CONSTITUTION:Photosensors 101 and 102 provided respectively to belt conveyers 51 and 53 on an inlet detect the existence of printing plates stopped by stoppage gadgets 97 and 99 of the conveyers. A holding means 39 of an inspection stand 37 is equipped with an operating means that opens and shuts first paired jaw plates 111A and 111B and second paired jaw plates 113A and 113B that are arranged at a distance from the first paired jaw plates in the direction intersecting the carriage direction of the printing plates passing through the inspection stand 37. An inspection stand conveyer 119 is placed between the two pairs of the jaw plates and serves for carrying the printing plates from a movable conveyer 69 provided on the inlet to a preliminary position where the printing plates are placed in preparation for the inspection. The inspection stand conveyer also carries the printing plates from the inspection stand 37 after completion of the inspection.
Patent JP-S63530-A (JP)
Title: Drilling machine
Inventor: POORU KAMERERI
IPC: E02F5/08
Filed: 1987-06-13
Abstract: Trenching apparatus (10) for excavating deep trenches in which inground concrete retaining or foundation walls may be formed. The trenching apparatus (10) has a crawler base (11) on which a carrier assembly (14) is pivotally supported by pivots (16) whereby it may be tilted by rams (17) to maintain the platform horizontal. Automatic control means (64) are provided for this purpose. The carrier assembly (14) has a pair of rails (18/19) along which a carriage (21) may move. The carriage (21) supports a sleeve (24) through which a trenching arm (25) may be lowered to excavate a trench section as the carriage (21) is driven along the rails (18/19).
Patent JP-H08315623-A (JP)
Title: Luminaire
Inventor: NAKANO HIDEJI
IPC: F21V19/00
Filed: 1995-05-22
Abstract: PURPOSE: To facilitate the assembling with saving the material of a body, and also facilitate the mounting work by providing a socket mounting surface part, socket base bent part, and a fitting part on a socket base, and providing a recessed notch part on the end part of a reflecting plate. CONSTITUTION: A socket base 300 has a socket mounting surface part 310 on which a socket 400 is mounted, socket base bent parts 320 formed by bending the opposed edge parts of the surface part 310, and a fitting part 330 extended from the surface part 310 and fitted to the inside of the side surface part 120 of a body 100. Recessed notch parts 511 for exposing the surface part 310 of the base 300 mounted on the body 100 are provided on both end parts of the upper surface part 510 of a reflecting plate 500. The base 300 is mounted on the body in the state where the bent parts 320 nip the side surface parts of the body 100, and the part 330 is in contact with the inside of the body bent part 110. Since the plate 500 has the part 511, it is fastened to the part 330 by a screw 530 which is a fastening means. Thus, a luminaire can be easily constituted without a work such as welding.
Patent JP-H0442925-A (JP)
Title: Manufacture of semiconductor
Inventor: YASHIMA KOJI
IPC: H01L21/302
Filed: 1990-06-06
Abstract: PURPOSE:To suppress scattering of etching dimensions and even up element characteristics in and between IC chips by patterning etched layers by two dry etchings for etching exactly opposite patterns respectively. CONSTITUTION:A polycrystalline silicon layer 2 is deposited on a silicon oxide film 1 and phosphorus is thermally diffused in the polycrystalline silicon layer 2. Another polycrystalline layer 2 is deposited, and exposed and developed with a reticle having the opposite pattern to the normal one. The upper polycrystalline silicon layer 2 is dry-etched with fluorine gas in plasma. After etching in hydrofluoric acid water solution, positive resist 3 is peeled in sulfuric acid solution. Positive resist is applied thick and its surface is securely flattened. The whole surface of the positive resist 3 is dry-etched with gas containing fluorine and oxygen in plasma. The upper polycrystalline silicon layer 2, a silicon oxide film 4, and the lower polycrystalline silicon layer 2 are dry-etched at a time with fluorine gas in plasma. The positive resist 3 is peeled to complete patterning.