Patent GB-960260-A (GB)
Title: Magnetic flux switching element
IPC: H03K17/82
Filed: 1961-07-24
Abstract: 960,260. Magnetic storage devices. FORD MOTOR CO. July 24, 1961 [July 25, 1960], No. 26688/61. Heading H1T. The Specification relates to magnetic logic elements comprising a block of magnetic material having two orthogonal holes with little or no magnetic material between them. There are flux paths of equal reluctance around each of the holes and flux switching can take place between them. According to the invention a setting pulse is applied to a conductor in one hole and information is stored by applying or not applying a pulse to a conductor in the other hole. Finally a strobe pulse is applied to a conductor in the second hole and an output E.M.F. is induced in a conductor in the first hole if there has been an input pulse. The embodiment shown in Fig. 1 may be used as an AND gate by applying the three pulse sequence of inputs shown in graphs 38, 40, 42 of Fig. 2. In Fig. 1 the block 20 of pressed ferrite or other magnetic material has holes 21, 22 with a gate output conductor 23 a logic set up conductor 24 and a bias current conductor 29 (which is not essential) in the hole 21 and gate input conductors 25, 26, 27 and a logic strobe conductor 28 in the hole 22. The conductors may thread the holes more than once. The three pulse operating sequence is as follows. Firstly the logic set up clock pulse 38 sets up a flux around the lower hole 21. Secondly if any of the input conductors 25, 26, 27 has a current pulse therein such as 40 the upper hole 22 has its flux path saturated and the flux surrounding the lower hole is reduced to zero. Thirdly the logic strobe clock pulse generator produces a current pulse 42 in the upper hole. The gate output is read only at the third stage of the sequence when a strobe pulse occurs, although various pulses may be induced in it at stages 1 and 2. Consequently if any AND gate input has a current pulse during the second stage the strobe pulse has no effect and there is no output except noise, but if no AND gate input had a current pulse, flux switching will be caused by the strobe pulse at the third stage and an output will be produced. Consequently zero input at all gate inputs (that is an AND condition) is indicated by a pulse output. The Specification describes how the flux changes and induced voltages occur with the various pulse inputs and, in particular, how the noise outputs are produced by shuttling of the flux between the remanence and saturation values as current pulses occur. A bias current may be applied to a conductor in one hole which will reduce, or even reverse in phase, the noise voltages induced in conductors in the other hole (Figs. 3, 4, 5 and 6, not shown). A single conductor may be used in each hole combined with suitable switching arrangements. Fig. 7 shows an alternative two pulse sequence in which the gate inputs coincide in time with the setting pulse. The operation is similar to that described above. Again the flux switching energy may be supplied entirely by the clock pulses. Fig. 8 (not shown) shows a similar sequence except that the gate input is delayed by a fraction of a pulse width. This system is preferred for high speed operation. In another embodiment (Fig. 9, not shown) there are two parallel holes with a third hole transversely between them. The operation is the same provided that the currents in the two parallel holes are in the same direction.