Patent GB-844763-A (GB)
Title: Improvements in or relating to time interval analysers
Inventor: GUILLON HENRI
IPC: G04F10/00
Filed: 1956-09-25
Abstract: 844,763. Classifying pulses. COMMISSARIAT A L'ENERGIE ATOMIQUE. Sept. 25, 1956 [Oct. 5, 1955], No. 29293/56. Class 37. General principles and operation (Figs. 1 and 2). The invention concerns a method of routing each of pulses bl to b5 into the appropriate one of a number of counters 33 depending on its time spacing from a reference pulse a. In the simplest arrangement the reference pulse a is applied to a delay line having taps 42 to 49 at points corresponding to the position of the pulse at times #t 2#t, 3#t sec. Each tap feeds one of coincidence circuits 25 to 32 to all of which the b pulses are applied. The coincidence circuit receiving both pulses simultaneously actuates its counter. At the end of each section of the delay line is a circuit 41 which is fed with the output of an oscillator of period #t and which re-shapes the gating pulse before it enters the next delay line section. Pulses bl, &c., may be delayed in known manner so as to coincide exactly with the centre of the gating pulse. Practical embodiment (Fig. 5). - In this embodiment the gating circuits each consist of one of triodes 68 to 73 the cathodes of which are coupled and earthed through a triode 74. The grids of triodes 68 to 73 are connected to the delay line taps. Pulses b, delayed so as to occur in the middle of the appropriate gate pulse, are applied to the grid of triode 74. Only that one of series valves 68-73 which is simultaneously receiving a gating pulse on its grid conducts and produces at its anode a negative pulse which,may be used to feed a counter. The regenerating circuit consists of pentode 62 to the grid 60 of which a gating pulse is applied while the oscillator output is applied to grid 65. The negative anode pulse produced by the coincidence of these two signals triggers a monostable circuit 63, 64 to produce a negative rectangular pulse which is inverted by transformer 67. Expanding time scale (Figs. 6 and 7). The Specification describes arrangements for increasing the width of the period within which the pulses are to be classified to not while still using oscillator of period #t. Fig. 6 shows a delay line closed on itself and having N taps where N has no common divisor with n. The signal passes through the delay line n times in each operating cycle and every tap works only once in each cycle. Under these circumstances pulses occurring between zero and 3#t will register on the coincidence circuit connected to 91, from 3#t to 6#t at 89, from 6#t to 9#t at 92 and so on. In addition, pulses bare moved into phase with pulses of period 3#t. In the arrangement shown in Fig. 7 it is also arranged that during the first two operating cycles no pulses are registered and that. a third cycle only is used for registration. Pulse a is applied simultaneously to mixer 98 and to a circuit 100 which produces a control signal 101 to allow oscillator 102 to emitter pulses 103 of period. #t. Pulses 103 are applied to regenerating circuits by a line 104 as previously described in connection with Fig. 5. At the output of mixer 98 pulse a operates mono-vibrator 106 to produce a gate signal 107 which is applied to delay line 94. At time N #t the pulse reaches the end of the line and is applied to a selection circuit 109. This circuit selects the pulse from train 103 which is applied to mixer 98 and creates a gate signal 111 spaced by N#t from pulse 107. Pulses 103 are applied to demultiplier 113 producing a train 114 of period n #t. This train is applied to a second selector circuit 116 also fed with the output of the delay line, the effect being to select from train 114 pulses 118 corresponding to times nN #t representing the end of one cycle of the selector. These impulses operate a counter 119 which delivers a pulse of 120 after k cycles k being chosen as desired and another at 121 after k + 1. During the period between these two pulses b to be classified are fed to phase adjusting circuit 128 also fed with the output of demultiplier 113. Thus pulses b are brought into coincidence with pulse train 114 and are then fed to coincidence circuits 95 and registered on the appropriate counter according to which of the periods of length n #t they fall into. After time (k + 1) Nn #t counter 119 is applied to control circuit 100 to stop oscillator 102.