Patent GB-717689-A (GB)
Title: Improvements in or relating to electrical signalling systems particularly telephone or like systems
Inventor: BAKER GEORGE THOMAS
IPC: H04Q3/42
Filed: 1951-07-25
Abstract: 717,689. Automatic exchange systems. BRITISH TELECOMMUNICATIONS RESEARCH, Ltd. July 10, 1952 [July 25, 1951], No. 17678/51. Class 40 (4.) A magnetic drum register of the type described in Specifications 717,687 and 717,688 is arranged to register trains of impulses. The normal line and cut-off relays in a subscribers' line circuit are dispensed with, leads SA, SB from the substation being connected to one winding of a repeating coil RC while leads EA, EB connect the other winding to the automatic switches over which the connection is set up. An auxiliary track on the drum produces clock pulses TX1-5 corresponding to the areas in each block, TY1-13 corresponding to the blocks in each group and TZ1-N corresponding to the groups, i.e. to the lines served by the register. According to whether the loop is closed or open potential appears on lead PA or P A at the instant a clock pulse is applied to the appropriate TZ lead. The drum rotates in 16<SP> 2</SP>/ 3 . msecs. to permit two samplings of each closure of the loop between impulses. The memory circuits M11-14 are of the type described in the above-mentioned Specifications and are operated by the coincidence circuits on the left and reset by those on the right. A pulse appears on a lead such as TX5 or T X5 according to whether the corresponding area when read contains a dot or a blank. One or other sampling lead SL or SL receives a pulse for each area of the drum. When the loop is closed PA, TX1, TY1 pulse lead B to write a dot in the first area X1 of the instruction block Y1 in the appropriate Z group. A change in the condition of the loop in either direction operates M11 at the next scan. M11 pulses lead A for the remainder of the instruction block to erase any timing registrations already in areas X2-X4 and in coincidence with PA, TX5 and TY1 pulses lead B to write a dot in area X5, at which time M11 is reset. When the loop reopens M11 reoperates, erases the dot in position XI, Y1 and tests for the next block which has no registration in the first area, in this case block Y2. When this is found M12 operates and through coincidence circuit SL, T X5, T Y1 writes a dot in area X2 of the instruction block whereupon M12 is reset by SL, TX1. If the condition of the loop remains the same for the next scan, M11 remains reset but M12 reoperates to add 1 to the binary registration, in areas X2-X4 of the instruction block, being reset in position X5, and so on for successive scans. Assuming that a train of impulses is being sent, reclosure of the loop operates M11, registrations are again made in areas X1, X5 of the instruction block and areas X2-X4 are cleared. When the loop opens again M11 adds 1 to the block bearing the partial registration, timing in the instruction block beginning again at the next scan. At the end of the train M12 fills areas X2-X4 and at its next operation M12 remains operated to operate M13 in position X5. M13 writes a busy dot into the first area of the block concerned to show that the digit is complete, M13 then being reset. The next digit is entered into the succeeding digit block. If the subscriber abandons the call, timing areas X2-X4 of the instruction block are filled when the loop is open so that there is potential on lead P A and this time M12 operates M14 which pulses lead A to clear all digit blocks and is then reset. M14 also pulses lead RL to release the connection.