baber/WOPTO huggingface dataset:
Patent TW-420736-B (TW)
Title: Method of producing yarn-reinforced nonwoven cloth and device thereof
Inventor: HSU HUANG-TANG
IPC: D04H3/08
Filed: 1998-11-25
Granted: 2001-02-01
Abstract: The present invention relates to a method of producing a yarn-reinforced nonwoven cloth and a device thereof. The method uses yarns as the reinforcement material of the nonwoven cloth. The nonwoven cloth can simultaneously have the reinforcement functions in the longitudinal, transversal and slant directions by using a net-laying device and a longitudinal filament-fetching device that can continuously alter the net-laying angle of fiber. The yarn-reinforced nonwoven cloth according to the present invention has a better dimensional stability and uniformity, and a lower elongation and a better MD/CD tensile strength. Therefore, better reinforcing effects can be achieved by using less reinforcing yarns. The cloth can be made into a structure similar to a scrim. Therefore, the cost of processing the cloth into a scrim can be omitted. The method can produce various high strength nonwoven clothes according to different demands, and has a high industrial application value.
Patent TW-457698-B (TW)
Title: Nonvolatile memory control circuit and control method thereof
Inventor: CHEN WEI-FAN
IPC: G11C16/14
Filed: 1998-12-02
Granted: 2001-10-01
Abstract: A nonvolatile memory control circuit is disclosed, which is suitable to be used in a nonvolatile memory cell having a source, drain, control gate, and a substrate electrode. The circuit comprises: a voltage source, a first charge pumping circuit, a word line switch, a second charge pumping circuit, a source switch, a third charge pumping circuit and a substrate electrode switch. The first, second, and the third charge pumping circuits are connected to the voltage source, which generate the first positive voltage, the second positive voltage and the first negative voltage respectively. The word line switch selects the voltage source or the first positive voltage to the control gate, the source switch selects the grounding potential or the second positive voltage to the source, the substrate electrode switch selects the grounding potential or the first negative voltage to the substrate electrode. In the erasing operation, the first positive voltage is provided to the control gate, and the first negative voltage is provided to the substrate electrode.
Patent TW-476745-B (TW)
Title: Phenyl-methoxyimino-acetic acid derivatives, the process for the preparation thereof, the fungicidal composition containing said compounds and the process for the protection of plants against harmful fungi using said compounds
Inventor: SZCZEPANSKI HENRY
IPC: C07C251/48
Filed: 1999-07-14
Granted: 2002-02-21
Abstract: Compounds of formula 1, wherein: A is a group CH2O or CH2ON=C(R1); X, and X2 independently of one another, are C1-C4 alkyl; Y is OH, O(C1-C4-alkyl), NH2 or NHCH3; R1 is C1-C4-alkyl, cyclopropyl, cyano, trifluoromethyl or C1-C4-alkoxy; R is aryl, hetaryl or heterocyclyl, whereby the above-mentioned groups may be substituted by identical or different substituents, have microbicidal activity and may be used for the control and prevention of plant-pathogenic fungi in agriculture, horticulture and in the field of hygiene.
Patent TW-472211-B (TW)
Title: Method and apparatus for interpolation
Inventor: LI MING-JR
IPC: H04N1/46
Filed: 1999-07-27
Granted: 2002-01-11
Abstract: The invention provides a method and device for interpolating between a first and second pixel in a video display system, where the first pixel has a first pixel value and a first coordinate on a first axis, and the second pixel has a second pixel value and a second coordinate on the first axis. The invention provides a first intermediate coordinate in between the first and second coordinates on the first axis, and determines a weight factor for the first intermediate coordinate. The weight factor is determined by either inputting the first intermediate coordinate into a first blending function if the first intermediate coordinate is within a first domain, or by inputting the first intermediate coordinate into a second blending function if the first intermediate coordinate is within a second domain. Once the weight factor is determined, a first interpolated value is calculated from a first product of the weight factor and a difference between the first pixel value and the second pixel value.
Patent TW-469272-B (TW)
Title: Three coordinate fluoroaryl aluminum catalyst activator composition
Inventor: CHEN EUGENE Y
IPC: C08F10/00
Filed: 1999-07-30
Granted: 2001-12-21
Abstract: Compounds corresponding to the formula: AIAfQ1Q2, or a dimer, adduct, or mixture thereof and further mixtures with aluminum compounds of the formula AIAf3, where: Af is a fluorinated aromatic hydrocarbyl moiety of from 6 to 30 carbon atoms; Q1 is Af or a C1-20 hydrocarbyl group, optionally substituted with one or more cyclohydrocarbyl, hydrocabyloxy, hydrocarbylsiloxy, hydrocarbylsilylamino, hydrocarbylsilyl, silylhydrocarbyl, di(hydrocarbylsilyl)amino, hydrocarbylamino, di(hydrocarbyl)amino, di(hydrocarbyl)phosphino, or hydrocarbylsulfido groups having from 1 to 20 atoms other than hydrogen, or, further optionally, such substituents may be covalently linked with each other to form one or more fused rings or ring systems; and Q2 is an aryloxy, arylsulfide or di(hydrocarbyl)amido group, optionally substituted with one or more hydrocarbyl, cyclohydrocarbyl, hydrocarbyloxy, hydrocarbylsiloxy, hydrocarbylsilylamino, hydrocarbylsilyl, silylhydrocarbyl, di(hydrocarbylsilyl)amino, hydrocarbylamino, di(hydrocarbyl)amino, di(hydrocarbyl)phosphino, or hydrocarbylsulfido groups having from 1 to 20 atoms other than hydrogen, or, further optionally such substituents may be covalently linked with each other to form one or more fused rings or ring systems, said Q2 having from 3 to 20 atoms other than hydrogen are useful as activators for olefin polymerizations.
Patent TW-463144-B (TW)
Title: Record strategy of record carrier
Inventor: YAN MENG-SHIN
IPC: G11B7/125
Filed: 1999-10-06
Granted: 2001-11-11
Abstract: The present invention provides a method for planning a specific storage unit in a plurality of storage units. Said plurality of storage units are formatted on a record carrier, e.g. a CD-R, a CD-RW, or a MO-disk, etc. The method comprises: performing a determination on the absolute time in pregroove (ATIP) error rate occurred in the ATIP codes of a specific storage unit, and performing a determination on the valley value of the reflective signals of the specific storage unit; based on the determination result, determining an optimum record setting required for a data record device to form a set of data pattern on the specific storage unit, or marking the specific storage unit as non-recordable. Thus, all storage units of the record carrier can be fully and suitably configured. Furthermore, the recordable storage units, after forming a pattern by recording, have a high reliability during reading.
Patent TW-434778-B (TW)
Title: Protective case for wafer
Inventor: KAZAMA HITOSHI
IPC: B65D85/86
Filed: 1999-10-12
Granted: 2001-05-16
Abstract: The object of the present invention is to provide a protective case to contain and carry wafers easily and safely. The object is achieved by constructing a protective case of a laboratory dish type container shaped to copy the wafer and a grip being applied thereon and providing a body for mounted the grip on the container with a pinching claws stretching from the body and a piece folded downward from the body.
Patent TW-499463-B (TW)
Title: Wettable polypropylene composition and related method of manufacture
Inventor: POTNIS PRASAD S
IPC: D01F6/46
Filed: 1999-11-19
Granted: 2002-08-21
Abstract: A wettable polypropylene composition comprising polypropylene and a hydrophilic, polar compound which includes functional sites selected from the group consisting of carboxyl, hydroxy, ether or ester moieties, wherein the polypropylene composition is wettable, having a contact angle less than or equal to 75 DEG. The hydrophilic polar compounds are selected from the group consisting of maleic anhydride-modified polypropylene (MAPP), acrylic acid modified polypropylene, ethylene acrylate modified polypropylene, polypropylene grafted with a sodium salt of an acrylic acid, polyethylene glycol (PEG), modified polyethylene glycol, polyvinyl alcohol (PVOH), polyvinyl formal (PVF); and monomer and dimer fatty acids having a carbon chain length in the range of 6 to 50, preferably 18 to 36 the compositions can further include the presence of an amorphous compound and surfactants.
Patent TW-521453-B (TW)
Title: Core for alkaline battery and battery using the same
Inventor: OHMURA HITOSHI
IPC: H01M2/02
Filed: 2000-01-03
Granted: 2003-02-21
Abstract: Disclosed is to provide core for alkaline battery using thin steel sheet and is excellent in holding characteristics of active substance and battery using the same. The said core is composed of graphite dispersion nickel plating layer or graphite dispersion nickel alloy plating layer, which is formed by graphite dispersed onto a thin steel sheet. The alloy plating layer is preferably nickel-cobalt alloy, nickel-cobalt-iron alloy, nickel manganese alloy, nickel-phosphor alloy or nickel-bismuth alloy and graphite, so it can form a irregular surface, and also provide a core for alkaline battery using thin steel sheet and is excellent in holding characteristics of active substance.
Patent TW-501096-B (TW)
Title: Disk reproduction system
Inventor: TAKAHASHI YORIO
IPC: G11B19/28
Filed: 2000-02-11
Granted: 2002-09-01
Abstract: There is provided a disk reproduction system being capable of utilizing a maximum reproduction rate and/or maximum search rate of the system effectively. The disk reproduction system searches a target position of a disk (2) where data have been recorded at a constant linear velocity when received an instruction from an external device, reads information data of the target and outputs information data in conformity with a reproduction format of the disk. When an address information of the latest address accessed by an access instruction is an address information recorded outer than the outer-most address information of disk (2) having been accessed until now, outer-most address memory circuit (21) updates the outer-most address information stored therein to the latest address information and determines a reference of speed control of disk (2) based on the updated latest address information. CAV control circuit (20) controls the velocity of disk (2) based on the determined reference.
Patent TW-I244092-B (TW)
Title: Memory system
Inventor: SINCLAIR ALAN WELSH
IPC: G06F3/06
Filed: 2000-02-29
Granted: 2005-11-21
Abstract: A memory system (10) having a solid state memory (6) comprising non-volatile individually addressable memory sectors (1) arranged in erasable blocks, and a controller (8) for writing to reading from the sectors, and for sorting the blocks into ""erased"" and ""not erased"" blocks. The controller performs logical to physical address translation, and includes a write pointer (WP) for pointing to the physical sector address to which data is to be written from a host processor. A sector allocation table (SAT) of logical addresses with respective physical addresses is stored in the memory, and the controller updates the SAT less frequently than sectors are written to with data from the host processor. The memory may be in a single chip, or in a plurality of chips. A novel system for arranging data in the individual sectors (1) is also claimed.
Patent TW-424060-B (TW)
Title: Quality testing method of concrete construction and its device
Inventor: LIN YI-CHING
IPC: B62D5/09
Filed: 2000-04-12
Granted: 2001-03-01
Abstract: The characteristic of this quality inspection method of concrete construction is to calculate first the penetrating time, and then to find the depth of crack by mathematical reasoning. The device includes a tapping tool, a sensor membrane, a receiver, an aid electrical circuit, and a calculating device. This invention requires only single receiver with one-man power to complete the process of checking the cracking depth. It also shows more superior to the conventional inspection methods that used to require two receivers, and the signal analyzing process will be simplified as well accordingly. With all the benefits it contributes, this invention will generally improve the non-destroy inspection technical level and efficiency for civil and architecture construction with lower construction cost.
Patent TW-506079-B (TW)
Title: A method of manufacturing a semiconductor device
Inventor: PONOMAREV YOURI
IPC: H01L29/10
Filed: 2000-05-06
Granted: 2002-10-11
Abstract: In a method of manufacturing a semiconductor device comprising a semiconductor body (1) of a first conductivity type which is provided at a surface (2) with a transistor having a gate (28) insulated from a channel (13) provided at the surface (2) of the semiconductor body (1) by a gate dielectric (26), a structure is provided on the surface (2) comprising a dielectric layer (14) having a recess (16), which recess (16) is aligned to a source zone (11, 9) and a drain zone (12, 9) of a second conductivity type provided at the surface (2) of the semiconductor body (1) and has side walls (17) extending substantially perpendicularly to the surface (2) of the semiconductor body (1). In this recess (16), a double-layer (20) is applied consisting of a second sub-layer (19) on top of a first sub-layer (18), which second sublayer (19) is removed over part of its thickness until the first sub-layer is exposed, which first sub-layer (18) is selectively etched with respect to the second sub-layer (19) and the side walls (17) of the recess (16) to a depth, thereby forming trenches (21) extending substantially perpendicularly to the surface (2) of the semiconductor body (1). Via these trenches (21) impurities of the first conductivity type are introduced into the semiconductor body (1), thereby forming pocket implants (22).
Patent TW-516124-B (TW)
Title: Method for forming crystalline silicon nitride
Inventor: JAMMY RAJARAO
IPC: H01L21/318
Filed: 2001-02-02
Granted: 2003-01-01
Abstract: In accordance with the present invention, a method for forming a crystalline silicon nitride layer, includes the steps of providing a crystalline silicon substrate with an exposed surface, precleaning the exposed surface by employing a hydrogen prebake and exposing the exposed surface to nitrogen to form a crystalline silicon nitride layer. Also, a trench capacitor, in accordance with the present invention, includes a crystalline silicon substrate including deep trenches having surface substantially free of native oxide. A dielectric stack, including a crystalline silicon nitride layer, is formed on the sidewalls of the trenches. The dielectric stack forms a node dielectric between electrodes of the trench capacitor.
Patent TW-492139-B (TW)
Title: Device with excellent durability to electrostatic discharging
Inventor: PENG KUO-REAY
IPC: H01L21/76
Filed: 2000-09-06
Granted: 2002-06-21
Abstract: The present invention provides a device with excellent durability to electrostatic discharging. The device according to the present invention is provided with two NMOSs with finger-type gates and a N-well. Each NMOS is configured on a P-well. The surface of the N-well is configured with a p-type heavily doped region. With the semiconductor controlled rectifier (SCR) composed of the p-type heavily doped region, N-well, P-well, and NMOS source, the device according to the present invention can provide a very excellent ESD protection; furthermore, it can be used as the driving device for the I/O port. Moreover, the present invention has the shallow trench isolation layer configured around the N-well for reducing the capacitance formed by the P-well and the N-well. Thus, the parasitic capacitance of the device according to the present invention is extremely small, which can be applied to the I/O port for high frequency integrated circuit.
Patent TW-515699-B (TW)
Title: Electrically-driven curtain opening/closing device
Inventor: TOCHIHARA KATSUNORI
IPC: A47H15/02
Filed: 2000-12-14
Granted: 2003-01-01
Abstract: An electrically-driven curtain opening/closing device is electrically operated to prevent a gap between curtains in a joint location of the curtains and receiving wires in the curtain rail. Runner rollers 3 and 7 provided with a pair of free rollers in the front and rear to be supported at both lower edges of a curtain rail 14 are pivoted to a top runner 1 via a supporting member. The top runner 1 is provided with both an electric motor 9 inside and a drive roller 13 interlocked with a drive shaft of the electric motor via a decelerating mechanism and is moved by pressing the drive roller into contact with the lower surface of the curtain rail 14. The device electrically moves the top runners 1 to open and close curtains. In this case, an engaging hole 2a to be engaged with a curtain suspending ring is formed for the tip of the front arm rod 2 of one top runner 1, and an engaging hole 2'a to be engaged with a curtain suspending ring is formed for the tip of the arm rod for intersection of the other top runner 1'. The tip locations of the arm rods 2, 2' are displaced to each other so that the arm rods 2, 2' intersect and overlap each other at the location where the top runners collide with each other. Grooves 15 for receiving electrical wires of the top runners are defined in the curtain rail 14.
Patent TW-544607-B (TW)
Title: Determining intra-day net asset value proxy of an actively managed exchange traded fund
Inventor: GASTINEAU GARY L
IPC: G06Q40/00
Filed: 2001-06-04
Granted: 2003-08-01
Abstract: A system for determining an intra-day net asset value proxy of an actively managed exchanged traded fund and the like includes a trusted computer system that has a physical hardware and operating system configuration in which domain configuration and trust relationships are established to determine access to information in the trusted system. The system also decrypts a file having adjusted portfolio information to provide security positions and calculates the intra-day net asset value proxy for the fund by applying prices received from a quote feed to security positions in the fund portfolio.
Patent TW-503131-B (TW)
Title: Piezo-ceramic bending-converter
Inventor: LUBITZ KARL
IPC: B06B1/06
Filed: 2001-04-10
Granted: 2002-09-21
Abstract: This invention relates to a piezo-electric bending-converter (1) with a carrier-body (3) and a stack (4), which is applied on the carrier-body (3) and composed of the layers (6) made of piezo-ceramic and flat electrodes (7, 8) arranged between the layers (6). On the side, which is far away from the stack (4), of the carrier-body (3) is applied an adaptive-layer (10) which is composed of a material with a thermal expansion-coefficient equal to that of the piezo-ceramic. The bending-converter (1) shows a good adjust-force and a small thermal eigen-bending in an advantageous production-cost. It is especially suitable for the utilization in a valve.
Patent TW-513718-B (TW)
Title: Compatible optical pickup device adopting single light source
Inventor: LEE CHUL-WOO
IPC: G11B7/135
Filed: 2001-04-16
Granted: 2002-12-11
Abstract: A compatible optical pickup device includes a single light source for emitting light having a wavelength longer than 650 nm, an objective lens formed of a near axis area, a ring type annular lens area, and a far axis area with respect to an apex for focusing light emitted from the light source to form light spots suitable for a first optical disk which is relatively thin and a second optical disk which is relatively thick so as to form a light spot having an FWHM (full width at half maximum) of less than or equal to 0.72 μm with respect to the first optical disk and a light spot having an FWHM of greater than or equal to 0.8 μm with respect to the second optical disk an optical path changer arranged on the optical path between the light source and the objective lens for changing a proceeding path of incident light, and a photodetector for receiving light reflected by the optical disk and passing through the objective lens and the optical path changer and detecting an information signal and/or error signal. Thus, since the compatible optical pickup device according to the present invention includes an inexpensive single light source for emitting light a wavelength longer than 650 nm and an objective lens, designed in relation to the wavelength of the light emitted from the light source, for forming a light spot having an FWHM equal to or less than 0.72 μm with respect to an optical disk of a DVD family and a light spot having an FWHM greater than or equal to 0.8 μm with respect to an optical disk of a CD family, it has an inexpensive and simple structure and can compatibly reproduce/record an optical disk of a CD or DVD family.
Patent TW-552580-B (TW)
Title: Fast ADPCM method and minimum logic implementation circuit
Inventor: LI HENG-KUAN
IPC: G10L15/02
Filed: 2001-05-11
Granted: 2003-09-11
Abstract: The present invention provides a fast ADPCM method and minimum logic implementation circuit. Three simple lookup tables are used in compressing decoding. The three simple lookup tables are: step table (1x37 array), index table (1x8 array), and Q_table (1x64 array). In decompressing, only index table and Q_table are used to perform decoding. With such a compressing and decompressing method, it is able to effectively reduce the calculating time and used memory capacity. Furthermore, it is able to implement a logic gate circuit with a minimum hardware storage space in designing compressing/decompressing circuit.
Patent TW-516137-B (TW)
Title: Single-point bonding apparatus
Inventor: SUGIURA KAZUO
IPC: H01L21/00
Filed: 2001-05-21
Granted: 2003-01-01
Abstract: The present invention is provided to improve a device working rate and to reduce the cost of a tool member by using a tool to an original tool life cycle without damaging the tool. In a single-point bonding apparatus that connects the end portions of leads or the cut end portions of leads to bonding pads respectively by pressing such end portions of leads or cut end portions of leads with a tool 14, it is characterized in that: a cleaning stage 22 to clean the tool 14 is additionally provided, and a cleaning chip 40 is disposed on the surface of the cleaning stage 22.
Patent TW-495996-B (TW)
Title: Semiconductor structure, semiconductor device, communicating device, integrated circuit, and process for fabricating the same
Inventor: RAMDANI JAMAL
IPC: H01L21/36
Filed: 2001-06-20
Granted: 2002-07-21
Abstract: High quality epitaxial layers of compound semiconductor materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline compound semiconductor layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.
Patent TW-I220899-B (TW)
Title: 5-(m-cyanobenzylamino)pyrazole derivatives or salts thereof and the composition of psticide as antiseptic for agriculture
Inventor: ITO HIROYUKI
IPC: C07D231/40
Filed: 2001-07-25
Granted: 2004-09-11
Abstract: 5-(m-cyanobenzylamino)pyrazole derivatives of the formula (I), [wherein, R1 is a C1-6 alkyl group, a C3-7 cycloalkyl group or a phenyl group, R2 is a hydrogen atom or a C1-6 alkyl group, R3 is a C1-6 alkyl group etc., R4 is a hydrogen atom, a halogen atom a C1-6 alkyl group etc., Y is a C1-6 alkyl group etc., n is 0 to 4] or the salts thereof are disclosed.