baber/WOPTO huggingface dataset:
Patent TW-I223240-B (TW)
Title: Structure and manufacturing method of optical recording medium
Inventor: WANG WEI-SHIANG
IPC: G11B7/2595
Filed: 2000-08-18
Granted: 2004-11-01
Abstract: The present invention relates to a structure and manufacturing method of optical recording medium. In the structure of optical recording medium, each film layer structure in sequential downward order is: a transparent substrate, the first dielectric layer, the first buffer layer, recording layer, the second buffer layer, the second dielectric layer, optical compensation layer and reflective layer. The formation sequence of each film layer is the same. The first buffer layer and the second buffer layer prevent at least one element in the recording layer from diffusing/entering the first dielectric layer and the second dielectric layer, and prevent at least one element in the first dielectric layer and the second dielectric layer from diffusing/entering the recording layer. The optical compensation layer increases the thermal sensitivity of the recording layer when the optical pickup head proceeds the access.
Patent TW-487660-B (TW)
Title: Power unit for vehicle
Inventor: SEKIYA YOSHIYUKI
IPC: F02B75/16
Filed: 2000-10-05
Granted: 2002-05-21
Abstract: To dispose a starter unit and a generator on the opposite side to a speed change gear with respect to an engine to achieve equality of the weight distribution of a power unit in leftward and rightward directions and besides suppress the projection amount of the starter unit in the axially outward direction of the generator to a small amount. A generator 6 includes a bowl-shaped rotor 33 securely mounted on a crankshaft 8 and having an open end directed outwardly of an engine 4, and a stator 36 supported on a crankcase 10 and disposed in the rotor 33. A starter unit 7 having a pinion gear 40 engageable with a ring gear 39, which is securely mounted in a neighboring relationship with an end wall 34b of the rotor 33, and an electric motor 43 capable of driving the pinion gear 40 is disposed in a neighboring relationship with an outer side of the rotor 33 in a radial direction.
Patent TW-I291256-B (TW)
Title: Films for electrochemical components and method for producing the same
Inventor: BIRKE PETER
IPC: H01M10/056
Filed: 2000-10-20
Granted: 2007-12-11
Abstract: The invention relates to a past-like mass that can be used in electrochemical components. Said mass comprises a heterogeneous mixture from (1) a matrix (A) that comprises at least one organic polymer, the precursors thereof or the prepolymers thereof and a plasticizer or that consists of theses components and (2) an inorganic material in the form of a solid substance (B) that can be electrochemically activated and that is not soluble in the matrix and in water, with the proviso that the mixture does not contain a conductor that is soluble in the plasticizer and that is different from (B). The invention also relates to layers (films) and electrochemical interlaminar structures (for example electrochemical cells). The plasticizer used is preferably at least one substance that carries the group (a), wherein A1 and A2 may independently represent R1, OR1, SR1 or NHR1, with R1 equal C1-C6 alkyl, or A1 and A2 together with D form a 5-membered heterocyclic ring and D may represent C=O, S=O, C=NH or C=CH2 and may also represent O, S, NH or CH2 if D together with A1 and A2 forms a 5-membered heterocyclic ring. The invention also relates to methods for producing the inventive films and interlaminar structures.
Patent TW-515205-B (TW)
Title: Apparatus and method for decoding digital image and audio signals
Inventor: MORLEY STEVEN A
IPC: H04N5/00
Filed: 2001-01-30
Granted: 2002-12-21
Abstract: An apparatus and method for decoding of encoded signals representing at least image information from a storage medium is claimed. A storage device is configured to receive the storage medium. A decoder is configured to receive the compressed encrypted encoded signals from the storage medium, and send the signals to a decryptor. The decryptor is configured to decrypt the compressed encrypted encoded signals, and send the signals to a decompressor. The decompressor is configured to receive the compressed encoded signals from the decryptor and to decompress the compressed encoded signals to enable display of the image.
Patent TW-499618-B (TW)
Title: Semiconductor device, liquid crystal display device, and manufacturing method thereof
Inventor: HAYSHI MASAMI
IPC: H01L21/77
Filed: 2000-12-13
Granted: 2002-08-21
Abstract: A semiconductor device with a high reliability can be gained. The semiconductor device includes a substrate, a semiconductor layer, a gate insulating film and a gate electrode. The semiconductor layer is formed on the main surface of the substrate and includes source and drain regions adjoining each other via a channel region. The gate insulating film is formed on the channel region. The gate electrode is formed on the gate insulating film and has a sidewall. The gate insulating film includes an extended part which has sidewall positioned outside of the sidewall of the gate electrode. The source and the drain regions include high concentration impurity region which is formed in a region of the semiconductor layer apart from the sidewall of the extended part and low concentration impurity region, and which is formed in a region of the semiconductor layer positioned beneath the extended part.
Patent TW-494543-B (TW)
Title: A flash memory device having a bipolar transistor associated therewith and a method of manufacture therefore
Inventor: SINGH RANBIR
IPC: H01L21/8247
Filed: 2001-01-15
Granted: 2002-07-11
Abstract: The present invention provides a bipolar transistor for use in increasing a speed of a flash memory cell having a source region and a drain region and first and second complementary tubs. In one embodiment, a base for the bipolar transistor is located in the first complementary tub. The first complementary tub functions as a collector for the bipolar transistor. The bipolar transistor base also uniquely functions as the source region. The bipolar transistor's emitter is also located in the first complementary tub and proximate the base. For example, the emitter may be located adjacent the base or actually located in the base. In an additional embodiment, the opposing bases and emitters are located on opposing sides of and proximate to the flash memory cell.
Patent TW-484195-B (TW)
Title: Processing method for grounding solder structure of tape ball grid array package structure
Inventor: HUANG JIAN-PING
IPC: H05K1/11
Filed: 2001-01-18
Granted: 2002-04-21
Abstract: A processing method for grounding solder structure of tape ball grid array package structure is to manufacture a grounding solder structure on tape ball grid array package structure, in which plurality of exhausts, which are arranged on the periphery of the circular grounding solder pad with approximately equal angle interval, are formed on the circular grounding solder pad of grounding through hole. During tempering, melted coating solder flows downward, pushes bubbles stored in the bottom part of the grounding through hole and makes the air in the bubbles discharged into the environment. Hence, there is no bubble stored in the bottom part of the grounding through hole in substance. Since no bubble is stored in the bottom part of the grounding through hole, highly neat grounding solders are obtained and highly reliable electric soldering effect is obtained between the grounding solder and heat-conducting block.
Patent TW-524837-B (TW)
Title: Adhesivers for plastics products
Inventor: LIOU LIANG-HUNG
IPC: C09J135/00
Filed: 2001-03-07
Granted: 2003-03-21
Abstract: The invention provides adhesivers comprising the components of: 45-65% by weight of haloalkanes, 30-50% by weight of nitro-containing C1-6hydrocarbons, and less than 12% by weight of C1-6alkoxy-substituted C1-6alkanols. The adhesivers can be applied to adhere plastics products, particularly the surfaces between acrylics and the surfaces between acrylics and other plastics such as polystyrene, polycarbonates and PETG. The adhesivers allow the contacting surface to perform a bright appearance with high transparency and brightness, and without the generation of bubbles and the formation of yellowing condition.
Patent TW-548457-B (TW)
Title: Signal processing substrate used for liquid crystal display unit and method of assembling the same
Inventor: TAKEISHI YUTAKA
IPC: G02F1/1345
Filed: 2001-03-08
Granted: 2003-08-21
Abstract: A signal processing substrate (13) is formed with a through-hole (31). A device (15) having a variable value and including an value adjustment portion (15a) through which the variable value is adjusted is mounted on a first surface (13a) of the signal processing substrate (13). The signal processing substrate (13) includes a flexible arch-shaped member (16) having a height relative to the first surface (13a) of the signal processing substrate (13). The device (15) is electrically and mechanically fixed onto a lower surface of the member (16) in a floating condition above the signal processing substrate (13) such that the value adjustment portion (15a) is in alignment with the through-hole (31) so as to allow the value adjustment portion (15a) to be adjusted through the through-hole (31). The member (16) is fixed at opposite edges onto the first surface (13a) of the signal processing substrate (13).
Patent TW-569075-B (TW)
Title: Active matrix substrate and manufacturing method thereof
Inventor: NAKATA SHINICHI
IPC: G02F1/1333
Filed: 2001-03-20
Granted: 2004-01-01
Abstract: In an active matrix substrate of the IPS system, the present invention performs patterning of a protective film covering a TFT using a photosensitive resin based on an acrylic resin, and uses the acrylic resin as it is as a leveling layer after opening the protective film. Therefore, the leveling layer can be formed on the protective film without increasing the number of steps and suppressing the rubbing non-uniformity becomes possible.
Patent TW-516117-B (TW)
Title: Chemical mechanical polishing process for low dishing of metal lines in semiconductor wafer fabrication
Inventor: ALLERS KARL-HEINZ
IPC: H01L21/66
Filed: 2001-04-03
Granted: 2003-01-01
Abstract: A two-step chemical mechanical polishing (CMP) process is provided for low dishing of metal lines in trenches in an insulation (oxide) layer, e.g., of silicon dioxide of a thickness of about 100-2000 nm, of a semiconductor wafer, e.g., of silicon, during its fabrication. The first step involves chemically mechanically polishing a metal layer, e.g., of copper of a thickness of about 200-2000 nm, disposed on the oxide layer and having a lower portion located in the trenches for forming metal lines and an upper portion overlying the lower portion. The first step polishing is effected at a high downforce, e.g., 3-8 psi, to remove at a high rate the upper portion of the metal layer substantially without removing the lower portion thereof and substantially without dishing of the lower portion located in the trenches. The second step involves continuing the CMP at a lower downforce, e.g., 1-5 psi, to remove at a lower rate the lower portion of the metal layer with attendant minimized dishing to an extent for providing the metal lines as individual metal lines correspondingly disposed in the trenches. The total polishing time is about 120-48 seconds (2-8 minutes).
Patent TW-503495-B (TW)
Title: Electronic component of a high frequency current suppression type and bonding wire for the same
Inventor: YOSHIDA SHIGEYOSHI
IPC: H01L23/49
Filed: 2001-04-04
Granted: 2002-09-21
Abstract: In order to provide an electronic component of a high frequency current suppression type, which can completely suppress a high frequency current to prevent an electromagnetic interference from occurring even when it is used at a high frequency, and a bonding wire for the same, the semiconductor integrated circuit device (IC) (17) operates at a high speed in using at a high frequency band, and a predetermined number of terminals (19) are provided with a high frequency current suppressor (21) for attenuating a high frequency current passing through the terminals themselves. This high frequency current suppressor (21) is a thin film magnetic substance having a range from 0.3 to 20 (μm) in thickness, and is disposed on the entire surface of each terminal (19), covering a mounting portion to be mounted on a printed wiring circuit board (23) for mounting IC (17) and an edge including a connecting portion to a conductive pattern (25) disposed on the printed wiring circuit board (23). When the top end is connected with the conductive pattern (25) by means of a solder (27) in mounting the printed wiring circuit board (23) of IC (17), the vicinity of the mounting portion has conductivity in a using frequency band, which is less than a few tens MHz.
Patent TW-498583-B (TW)
Title: Static eliminator
Inventor: TAKAYANAGI MAKOTO
IPC: H05F3/06
Filed: 2001-05-08
Granted: 2002-08-11
Abstract: A static eliminator comprises one pair of discharge electrodes. One electrode issues ions of a polarity while the other electrode issues ions of opposite polarity. In addition to the foregoing, polarity of ions issued from each of said discharge electrodes is switched over to opposite polarity. The switching over of polarities is synchronized with each other so that ions issued from each discharge electrodes are of opposite polarities. In another embodiment, static eliminator comprises a rotary ionizer or rotary ion issuing discharge electrodes. In still another embodiment, static eliminator comprises more than three arrayed discharge electrodes, each of discharge electrodes issues ions of opposite polarity to that issued from adjacent discharge electrodes.
Patent TW-508952-B (TW)
Title: Chaining mechanism of single user and multiple video decoders
Inventor: WANG JIAN-SHIUN
IPC: H04N19/89
Filed: 2001-05-18
Granted: 2002-11-01
Abstract: The invention provides a chaining mechanism of signal user and multiple video decoders, using a headend with a user management unit and a chain control unit to control at least two sets of matching pairs for video decoder in effort to separate the video decoder into a host system and a subsystem. The successfully matching video decoder further uses the radio chain control signal continuously sent from the host system to ensure whether the host system and subsystem are matched. When the subsystem receives the chain control signal, it will compare the initially matching signal at setup and the carried clock by the headend to ensure whether they are matched. By means of the chaining mechanism of the invention, it is featured by simple construction, convenient installation, high safety and low cost without requiring externally installed control signal line or dedicated parts.
Patent TW-I239235-B (TW)
Title: Herbicidal compositions
Inventor: WURTZ JOCHEN
IPC: A01N47/36
Filed: 2001-06-15
Granted: 2005-09-11
Abstract: The present invention relates to a herbicidal composition comprising (A) one or more sulfonylureas of the formula (1) and/or their salts in which R1 is C2-4-alkoxy or CO-Ra, where Ra is OH, C1-C6-alkoxy or NRbRc, where Rb and Rc independently of one another are identical or different and are H or C1-C6-alkyl, R2 is halogen or (A)n-NRdRe, where n is zero or 1. A is a group CRfRg, where Rf and Rg independently of one another are identical or different and are H or C1-C6-alkyl. Rd is H or C1-C6-alkyl and Re is H, C1-C6-alkyl or an acyl radical, where Rd and Re may also form a heterocyclic ring and where, if R1 is C2-C4-alkoxy, R2 may also be H, R3 is H or C1-C6-alkyl, m is zero or 1, X and Y independently of one another are identical or different and are C1-C6-alkyl, C1-C6-alkoxy or C1-C6-alkylthio, where each of the three radicals mentioned is unsubstituted or substituted by one or more radicals selected from the group consisting of halogen, C1-C4-alkoxy and C1-C4-alkylthio, or are C3-C6-cycloalkyl, C2-C6-alkenyl, C2-C6-alkynyl, C3-C6-alkenyloxy or C3-C6-alkynyloxy, preferably C1-C4-alkyl or C1-C4-alkoxy, Z is CH or N, and (B) one or more surfactants comprising as structural element at least 10 alkylene oxide units.
Patent TW-531934-B (TW)
Title: Vanadium electrolyte preparation using asymmetric vanadium reduction cells and use of an asymmetric vanadium reduction cell for rebalancing the state of charge of the electrolytes of an operating vanadium redox battery
Inventor: BROMAN BARRY MICHAEL
IPC: H01M50/77
Filed: 2001-08-01
Granted: 2003-05-11
Abstract: An acid vanadium electrolyte solution containing V<+3> and V<+4> in a desired concentration ratio from solid vanadium pentoxide fed into the electrolyte solution, is produced by electrochemically reducing at least partly of the dissolved vanadium in the acid electrolyte solution by circulating the electrolyte solution through a plurality of electrolytic cells in cascade to at least partly to a V<+3> state; reacting the so reduced vanadium content in electrolyte solution outlet from the last of said electrolytic cells with a stoichiometric quantity of vanadium pentoxide obtaining an electrolyte solution containing vanadium substantially in a V<+4>; adding acid and water to maintain a certain molarity of the solution; and continuously recycling the electrolyte solution through the cascade of electrolytic cells while bleeding a stream of yielded electrolyte solution containing V<+3> and V<+4> in the desired concentrations at the exit of one of the cells of said cascade. Each cell is highly asymmetric, having a cathode and an anode with respective surface morphologies, geometry and mutual disposition such to establish on the anode surface a current density from 5 to 20 times greater than the current density on the projected cathode surface and evolve oxygen at the anode. An asymmetric cell of this type may be used in the circuit of one of the positive and negative electrolytes of a working battery for rebalancing the respective states of oxidation of their vanadium content.
Patent TW-530345-B (TW)
Title: Method to from contact-areas in integrated circuits
Inventor: LAHNOR PETER
IPC: H01L21/321
Filed: 2001-10-25
Granted: 2003-05-01
Abstract: This invention relates to a method to form contact-areas in integrated circuits with the steps: providing a substrate (10) with an isolating-layer (15) located on the substrate (10), a contact-area made of contact-hole-material is to form in the isolating-layer (15); providing a hard-mask-layer (20) on the isolating-layer (15); structurization of an opening (35) in the hard-mask-layer (20) according to the to-be-formed contact-area; providing a spacer-layer (40) in the opening (35) to form an opening (35') with smaller diameter; etching a contact-hole (45) by means of the opening (35') with smaller diameter; applying a liner-layer (50) over the resulted structure; applying a layer (60) made of the contact-material over the liner-layer (50), so that the contact-hole is filled and the surrounding is covered thereby and chemically-mechanically polishing the resulted structure to remove the layer (60) made of the contact-material, the liner-layer (50), the spacer-layer (40) and the hard-mask-layer (20) outside of the contact-hole (45).
Patent TW-I250417-B (TW)
Title: Symbol-based signaling for an electromagnetically-coupled bus system
Inventor: SIMON THOMAS D
IPC: G06F13/40
Filed: 2001-10-29
Granted: 2006-03-01
Abstract: The present invention provides a mechanism for supporting high digital bandwidth in a multi-drop bus system. A first device of the system encodes multiple bits in a symbol and drives the encoded symbol onto the multi-drop bus. Multiple receiving devices are linked to the bus through electromagnetic couplers. A receiving device samples the encoded symbol through the electromagnetic coupler and recovers the encoded bits from the sampled symbol.
Patent TW-538314-B (TW)
Title: Photo resist composition and patterning process
Inventor: TAKEDA TAKANOBU
IPC: G03F7/039
Filed: 2001-10-31
Granted: 2003-06-21
Abstract: A a photoresistant material comprises recurring units of formula (1) and recurring units having acid labile groups which units increase alkali solubility as a result of decomposition under the action of acid, and has a molecular weight of 1,000-500,000 in average. R1 and R2 each are a hydrogen, hydroxyl group, hydroxyalkyl group, straight or branched alkyl group, alkoxy group or halogen, and n is 0, 1, 2, 3 or 4. The photoresistant material is useful as a base resin to form a chemically amplified, positive photoresist composition which has advantages including a significantly enhanced contrast of alkali dissolution rate before and after exposure, high sensitivity, high resolution, and high etching resistance and is best suited as a micropatterning material for use in VLSI manufacture.
Patent TW-515061-B (TW)
Title: Electroplating nickel/gold process and structure for electric contact pad of chip package substrate
Inventor: SHIU SHR-BIN
IPC: H01L23/28
Filed: 2001-11-12
Granted: 2002-12-21
Abstract: A kind of electroplating nickel/gold process and structure for electrical contact pad of chip package substrate are outlined in the present invention. The invention contains the followings: covering the substrate surface, which has the patterned circuit and the defined circuit layer, with a conducting film; forming a photoresist layer on the substrate surface to cover the substrate, in which the photoresist layer has openings to expose the circuit layer for the conducting film on top of the electrical contact pad region; removing the conducting film that is not covered by the photoresist layer; forming another photoresist layer on the substrate surface to cover the remaining exposed conduction film; conducting the electroplating process of nickel/gold onto at least one electrical contact pad of the substrate in order to make the electrical contact pad surface be electroplated with the nickel/gold layer; removing the photoresist (PR) layer and the conducting film covered by the PR layer; and at last, covering the substrate with a solder mask layer, which exposes the completed electrical contact pad of the electroplated nickel/gold layer. The structure disclosed by the invention contains a substrate which has the circuit layer of patterned circuit. The circuit has at least an electrical contact pad exposed out of the solder mask layer, wherein the exposed surface of the electrical contact pad is covered by an electroplated nickel/gold, and the substrate has no electroplated wires disposed additionally for electroplated nickel/gold to be on the electrical contact pad.
Patent TW-I264109-B (TW)
Title: Compact semiconductor device capable of mounting a plurality of semiconductor chips with high density and method of manufacturing the same
Inventor: TAGO MASAMOTO
IPC: H01L25/065
Filed: 2001-11-30
Granted: 2006-10-11
Abstract: In a semiconductor device, rewirings 3 for connecting a semiconductor chip 1a, a semiconductor chip 1b and external connecting terminals 4 with each other are formed on the semiconductor chip 1a. An insulating resin 6 having opening portions in regions for forming the external connecting terminals 4 at peripheral portion of the semiconductor chip 1a and another opening portions in another region for mounting the semiconductor chip 1b at the central of the semiconductor chip 1a is overlaid on the rewirings 3. The external connecting terminals 4 consisting of BGA are formed in the opening portions of the regions for forming the external connecting terminals 4 through rands 5. The semiconductor chip 1b is connected to another opening portions of another region for mounting the semiconductor chip 1b by flip-chip structure through electrodes 11 and bumps 8. A junction surface of the bumps 8 is sealed by a sealing resin 7. The semiconductor chip 1b is mounted on the same surface as that the external connecting terminals 4 are formed. The under surface of the semiconductor chip 1b is ground in order that the semiconductor chip 1b may be shorter than the external connecting terminals 4. The semiconductor chip 1b is thereby mounted with high density.