Patent GB-1112981-A (GB)
Title: Improvements in or relating to frequency synthesisers
Inventor: MCAINSH JARVIS NEVILLE
IPC: H03L7/185
Filed: 1965-04-26
Abstract: 1,112,981. Automatic frequency control systems; transistor pulse circuits. GENERAL ELECTRIC CO. Ltd. 13 June, 1966 [26 April, 1965; 13 Dec., 1965], Nos. 17508/65 and 52915/65. Headings H3A and H3T. A frequency synthesizer comprises a master oscillator 1, Fig. 1, feeding a divider 2 which provides a 100 c/s. input to a discriminator 3, the oscillator also feeding a spectrum generator 10 which provides outputs at 5 Mc/s. frequency intervals at switch 11 which feeds a mixer 9 supplied with the output of a variable-frequency oscillator 6, the output of the mixer passing through a pulse-shaping unit 12 to a variable divider 13 which provides the second input to the discriminator 3, the output of which controls the frequency of oscillator 6 via a motor 7 and a reactance stage 8. The output frequency of oscillator 6 is therefore 100 times the division ratio of divider 13, which is shown on a display 14, plus the output frequency selected by switch 11. When the inputs to frequency and phase discriminator 3 differ by more than 3 c/s., a fast search circuit 16 alters the division ratio of divider 13 by a factor of 10 and selects the output of the penultimate stage of divider 2 as the second input to the discriminator, thereby multiplying the error by a factor of 10. The system may be applied to tuning a radio receiver, the display then being arranged to indicate the frequency to which the receiver is tuned. The frequency divider. Fig. 2 (not shown), comprises a five-stage counter, the first four stages (17-20) being decimal and the last stage (21) counting up to a maximum of 8. Each stage feeds a coincidence detector (22-26) the output of which pass to an AND gate (27) controlling a gate (28) which allows a pulse from unit 12 to pass each time a predetermined count is reached. This pulse is fed to a unit (29) which provides the output and also provides a resetting pulse for the counter. If the re-setting occupies a time corresponding to n input pulses, the coincidence detector (22) of the first stage of the counter is offset by the number n. The division ratio is controlled by two knobs (31 and 32). The first control knob (31) adjusts the re-set value of the first stage and the coincidence detectors (23-25) of the next three stages. When the penultimate stage (20) is adjusted from 9 to 0 or vice versa, an overlap circuit (38) alters the setting of the coincidence detector (26) of the final stage by one in the required direction, thereby providing a 1À2 Mc/s. range of adjustment (for knob 31). The second control knob (32) controls the re-set valve of the final stage (21) and is coupled to switch 11 so that when it changes from 5 to 1 or vice versa the switch 11 is moved one position in the required direction. Overlap circuit, Fig. 4.-When switch A is moved clockwise from position 7 to position 8, a positive potential is applied to the base of transistor 67 to bias it ON and thereby biasing transistor 83 to conduction and effectively earthing contacts A0 and A1 via diode 81. In position 9 there is no change, but in position 0 a positive potential is applied to the collector of transistor 83 causing relay C to operate. Contacts (not shown) of relay C alter the coincidence detector (26, Fig. 2, not shown) in the last stage of the counter to produce an output at a count of 7 (instead of 6), the display associated with this stage is altered accordingly, and a warning lamp is lit. In position 1 an output through contact C1 causes black out of all the display (14) except that associated with the last stage of the counter, and in position 2 the overlap circuit is re-set. A similar sequence occurs when the switch is rotated anti-clockwise, with relay B operating instead of relay C. Pulse shaping circuit, Fig. 3.-An input sine wave (from mixer 9) is fed to a Schmitt trigger circuit 43, 44 feeding an emitter follower 45 which supplies an input to re-set pulse generator 29. This signal is also fed via differentiating circuit 46, amplifier 47, differentiating circuit 48 and inverting circuit 49 to one input of a gate formed by diodes 50 and 51, the gated-out pulses being fed to the re-set pulse generator 29. This comprises bi-stable circuit 59, 60 and output stages 61-63. Frequency-sensitive change-over switch, Fig. 5.-Transistor 93 is normally conducting and transistor 95 cut off so that the gates formed by diodes 96, 106 and 107 are open whereas those formed by diodes 97, 108 and 109 are closed. When the frequency of the input applied to the pump circuit 89, 90 rises above 3 c/s., the Schmitt trigger 87, 88 operates to change over transistors 93 and 95 and thereby change over the gate circuits.