baber/WOPTO huggingface dataset:
Patent JP-H0290692-A (JP)
Title: Circuit board
Inventor: KOBAYASHI AKIRA
IPC: H05K3/38
Filed: 1988-09-28
Abstract: PURPOSE:To strongly bond a rigid plate to fluororesin by a method wherein one side of a fluoroplastic plate is finished into a mat face, and the rigid plate is bonded to this side of the fluororesin plate through the intermediary of a bonding agent. CONSTITUTION:A fluoroplastic plate 1 and a copper foil 2 are bonded together through hot fusion welding. As irregularities biting into fine irregularities on the underside of the copper foil 2 are formed on the upside of the fluororesin plate 1 through hot fusion welding, they are strongly bonded together. And, the underside of the fluoroplastic plate 1 has been made a mat face the same as the upside, and a rigid plate 4 is mounted on the underside of the plate 1 through the intermediary of epoxy resin 3 (bonding agent). The rigid plate 4 is formed of an aluminum plate or a transparent glass plate excellent in heat radiating property. As the underside of the fluororesin plate 1 is formed into a mat face and the epoxy resin 3 bites into the fine recessed parts of the underside, they can be strongly bonded together. When the rigid plate 4 is an aluminum or a glass plate, even if the faces of the plate 4 are smooth, the rigid plate 4 and the epoxy resin 3 are strongly bonded together.
Patent JP-2000076917-A (JP)
Title: Lighting system
Inventor: ABE TOMIYA
IPC: G02F1/1335
Filed: 1998-08-28
Abstract: PROBLEM TO BE SOLVED: To provide a lighting system of surface light emitting type having excellent mass-producing and assembling performance by simplifying the positioning of a light guide plate with a light guide rod. SOLUTION: This lighting system is formed into a tabular shape and is composed of a light guide plate 4 which leads in light from a side 4s to surface-emit it from the surface 7, a light source 1 composed of a halogen lamp (of 100 W) provided at a distance that heat is not transferred to the light guide plate 4, an optical fiber 2 having a large diameter core for transmitting light from the light source 1 to the light guide plate 4, and a light guide rod 3 formed into a columnar shape in conformity with the shape of the side 4s of the light guide plate 4, and set in parallel with and at a distance from the side 4s, further leading in the light transmitted by the optical fiber 2 from an end face 3a to emit it into the side 4s of the light guide plate 4. The light guide plate 4 and the light guide rod 3 are made of a transparent acrylic resin which is capable of injection molding.  The light guide plate 4 is provided with coupling parts 8, 9 at both the longitudinal ends of side 4s in order to keep the light guide rod 3 at the distance of, for example, 1 mm. By integrally forming them of the light guide plate 4, the light guide rod 3 is integrally jointed with the light guide plate 4 through the coupling parts 8, 9.
Patent JP-H0697016-A (JP)
Title: Pasting apparatus for substrates
Inventor: MURAKAMI HIRONORI
IPC: H01L21/02
Filed: 1992-09-11
Abstract: PURPOSE:To paste a substrate such as a large-area thin sheet glass or the like with high positional accuracy by a method wherein a bumping block which is installed at one end of a vacuum suction stage and which is used to position a first substrate to be pasted and a roller which is pressurized and moved toward the other end from one end close to a clamp block are installed. CONSTITUTION:A second substrate (a thin sheet glass) 14 mounted on a movement stage 6 is slid and fed to the position of a bumping block 2, one edge is bumped against the bumping block 2 and the second substrate is aligned while it is being recognized by a CCD sensor as an image sensing device. A clamp block 3 is lowered at a prescribed position, and one end of the second substrate 14 is fixed. In this state, a roller 4 is turned, moved and mounted in a part clamped by the second substrate 14. The roller 4 is moved at a prescribed speed together with the movement stage 6. The second substrate 14 is laid into the lower part of the clamp 4 together with the movement of the movement stage 6 and pasted on a first substrate 1 by means of the roller 4.
Patent JP-H0696658-A (JP)
Title: Operation test circuit for earth leakage breaker
Inventor: WATANABE HIROSHI
IPC: H01H83/02
Filed: 1992-09-14
Abstract: PURPOSE:To make a circuit compact, and reduce power consumption by supplying a test current to a zero-phase current transformer via a power supply circuit built into an earth leakage breaker through the operation of a test button. CONSTITUTION:Regarding a feeder connecting main circuit buses 1 and 2 to a power supply circuit 7, a (b) contact 11 interlocked with a test button is fitted and connected to a feeder connected to the bus 2. Furthermore, the inverse parallel circuit of a diode 13 is connected to a bypass line 12 branched from a line between the (b) contact 11 and the circuit 7 and connected to the bus 2 in such a way as bypassing a zero-phase current transformer 4. In a Current is made to flow from a main circuit to the circuit 7 via the contact 11. In this case, no test current flows through the bypass circuit 12, due to the action of the edgewise voltage of the diode 13 and, therefore, secondary output does not appear in the transformer 4. When the test button is pressed at the time of operation check, the contact 11 is turned off and the test current begins to flow through the circuit 12 via the circuit 7, due to the edgewise voltage of the diode 13 and the internal resistance of the circuit 7, thereby supplying simulated leakage current to the transformer 4.
Patent JP-S62104903-A (JP)
Inventor: TANAKA TOYOAKI
IPC: A61F13/49
Filed: 1985-11-01
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S62106244-A (JP)
Title: Air-conditioning device
Inventor: ENOMOTO GORO
IPC: F24F11/04
Filed: 1985-11-01
Abstract: PURPOSE:To permit control of a motor for air conditioning to a desired number of rotation by manual operation by a method wherein an inverter electric source, having a capacity up to a rating, or commercial electric source, having a capacity higher than the rating, is permitted to be connected selectively to the motor for air conditioning by a multi-converter in accordance with the magnitude of a load. CONSTITUTION:An analog signal according to an indoor temperature, detected by a detacting means 2 or a temperature sensor 21, is inputted into a multi-converter 3 while the level thereof is being adjusted on the way thereof. The multi-converter 3 catches the indoor temperature as a load and when it is an usual time or the load is lower than 80%, for example, the multi-converter 3 outputs a selection signal for connecting a motor 41 for an air feeding fan and the motor 42 and an exhaust fan, which are the motor 4 for air conditioning, to the inverter electric source 5, and a rotating number control signal for the motor 4, which consists of signals in accordance with the magnitude of the load. Upon a peak load in which the load is 80% or more of a full load, the multi-converter 3 outputs the selection signal for connecting the motor 41 to a commercial electric source 6 and the motor 4 can be rotated at a rated rotating speed.
Patent JP-H03105526-A (JP)
Title: Instruction control system
Inventor: TAKEI MASAYOSHI
IPC: G06F9/28
Filed: 1989-09-20
Abstract: PURPOSE:To increase the working speed of an information processor which has plural hierarchies of instructions by providing a result holding means which stores the data outputted from a sending order deciding means and a clock control means which stops the clocks that are outputted to an instruction executing means just for a necessary period of time in response to the processing time of the instruction executing means. CONSTITUTION:A clock control means 30 refers to the operand of an instruction which is processed by an instruction executing means 27 to calculate the processing time and stops the clocks Co for the period of time required for a due process to secure the processing time and to perform the process with the variable length applied to the clock time at the execution of the instruction as long as the means 27 is processing an instruction to read the next macroinstruction or the specific data into a CPU unit 21 from a memory unit 22 even though a clock is sent out of the means 30 and the microinstructions are read out of the instruction storage means (23-1) - (23-N). Thus, the processing speed is increased with in information processor which contains plural microinstruction storage memories and plural hierarchies of instructions.
Patent JP-H04124983-A (JP)
Title: Picture display system
Inventor: TABATA TOSHIO
IPC: H04N7/025
Filed: 1990-09-17
Abstract: PURPOSE:To attain the effective using of a margin area and to prevent the burning of a picture tube by displaying the picture of an aspect ratio smaller than a wide aspect ratio on the screen of a television image receiver of the wide aspect ratio and displaying character multiplex data on the margin of the screen. CONSTITUTION:A video signal supplied to buffer memories 8 and 10 and signals RGB of character multiplex data are written in the buffer memories 8 and 10 by clock signals C1 and C3. Then, they are read by a clock signal C2 to possess the frequency 4/3 times as much as that of the clock signal C1. The output of the buffer memories 8 and 10 speed-converted in this way is supplied to a selector 11 respectively and is switched at a specified horizontal position every a line under the control of a timing signal TM. Accordingly, a standard NTSC screen is displayed on the screen of a television image receiver 13 of which a wide aspect ratio is 16 to 9 and of which the number of scanning lines is 525 and the character multiplex data are displayed on the margin area of a screen right side.
Patent JP-S62143013-A (JP)
Title: Endoscope
Inventor: TAKAYAMA SHUICHI
IPC: G02B23/24
Filed: 1986-10-16
Abstract: PURPOSE:To prevent an antifriction component and dust from invading the tip part from an inserting part, to protect a solid-state image pickup element in the tip part from dust, etc., and to always make an observation image clear, by providing a partition wall for closing up tightly the inside of the tip part, between the tip part and the inserting part. CONSTITUTION:A body 3 of a tip part 1 to which a CCD 9 has been installed is intercepted from the inside of a flexible pipe 2 of an inserting part by a substrate 4a being a partition wall, and an invasion of dust, etc., from the flexible pipe 2 side is prevented. In this state, when a light beam which has been sent through a light fiber 13 from a light source device is irradiated to an observation object, a reflected light from the observation object is brought to an image formation in a photodetecting pat 10 of the CCD 9 which the CCD 9 has, by an objective lens 12, and also this image is converted to an electric signal by the CCD 9, sent out to a monitor device of an observation part through a wiring connecting part and connecting cords 7..., and by this monitor device, an output signal of the CCD 9 is restored to an image.
Patent JP-H03105922-A (JP)
Title: Semiconductor integrated circuit
Inventor: KOBAYASHI HIROSHI
IPC: H01L23/52
Filed: 1989-09-19
Abstract: PURPOSE:To increase the degree of freedom of wiring, to facilitate wiring of signal lines at the time of the design of a mask pattern and to improve the degree of integration by forming a buried wiring layer connected to a buried layer under an isolation insulating layer and bonding the buried wiring layer to a potential setting wiring. CONSTITUTION:A pair of N-type semiconductor layers, bases of which have N<+> type buried layers and side faces of which are surrounded by isolating insulating layers 3, are formed. A P-type semiconductor layer 6 is provided selectively on one N-type semiconductor layer 7-1, an N<+> type contact leading- out region 9a reaching from an N<+> type buried layer 8-2 on the base thereof to a surface thereof is formed on the other N-type semiconductor layer 7-2, and an N<+> type buried wiring layer 10 connecting N<+> type buried layers 8-1, 8-2 on the bases of a pair of the N-type semiconductor layers is provided. Accordingly, contacts for setting potential of the buried layers are isolated from a resistance island, thus reducing the area of the resistance island. Each connection to a potential setting wiring from a plurality of the resistance islands is eliminated, thus collectively minimizing the areas.
Patent JP-H0562980-A (JP)
Title: Semiconductor device and manufacture thereof
Inventor: TSURUMARU KAZUHIRO
IPC: H01L21/60
Filed: 1991-08-29
Abstract: PURPOSE:To enable a semiconductor device to be lessened in size and thickness protecting semiconductor pellets. CONSTITUTION:In a semiconductor device 30, electrode pads 34 are formed on pellets 31 in which electronic circuits are built so as to electrically connect the electronic circuits to the outside, bumps 32 electrically and mechanically connected to a mounting board 11 are provided to the electrode pads 34 protruding, and furthermore a protective layer 41 of insulating resin is formed on all the surface of the semiconductor pellet 31 so as to enable the bumps 32 to be exposed.
Patent JP-H0292283-A (JP)
Title: Immobilization of enzyme
Inventor: HAYASHIDA MIKIO
IPC: C12N11/00
Filed: 1988-09-30
Abstract: PURPOSE:To improve the adsorptivity of an enzyme and to enable the use of a porous carrier having high bulk specific gravity by adsorbing and immobilizing an enzyme to a hydrophobic porous carrier in the presence of an inorganic salt and a water-soluble polymeric substance. CONSTITUTION:An enzyme (e.g., catalase or lipase) is dissolved in a buffer solution and mixed with an inorganic salt (e.g., ammonium sulfate) and a water- soluble polymeric substance (e.g., polyethylene glycol). A porous carrier (e.g., activated carbon) is added to the mixture to effect the adsorption and immobilization of the enzyme to the porous carrier. The adsorption and immobilization of the enzyme can be carried out in high adsorptivity because of the presence of the inorganic salt in combination with the water-soluble polymeric substance. Accordingly, the amount of the porous carrier can be decreased to reduce the size of the apparatus.
Patent JP-H0695996-A (JP)
Title: Information processing system
Inventor: TSUBAKI MASAMITSU
IPC: G06F3/048
Filed: 1992-09-14
Abstract: PURPOSE:To allow respective terminals to simultaneously and independently edit information by mutually and instantaneously transmitting inputted information elements by the plural terminals and instantaneously displaying all received information elements on the receiving side. CONSTITUTION:In the case of preparing a file such as a sentence and a graphic, each terminal inputs its information elements from an input device 13. The information elements inputted from the device 13 are displayed on a display device 17 and sent also to a communication part B through a shared memory 25. The device 17 is constituted of a liquid crystal, a plasma display, a CRT, or the like. The communication part B lets respective terminals be in connected states, transmits the information elements from a system control part A to respective terminals and sends information elements from respective terminals to the control part A. Since the processing is instantaneously executed, the same contents are basically displayed on the display devices 17 of respective terminals. Since the capacity of the display device 17 in each terminal is limited, however, an overflowed part which can not be displayed is stored in a memory 12 and properly displayed.
Patent JP-S6487280-A (JP)
Title: Printing paper feeding method for printer
Inventor: OSADA ISAO
IPC: B41J11/14
Filed: 1987-09-29
Abstract: PURPOSE:To avoid an increase in load resistance at the time of passage of a thicker part of a paper between a ribbon mask and a platen, by a method wherein in the case of a special paper, a driving signal for enlarging a printing gap is given to a drive source prior to an operation of feeding the paper and/or moving a carrier to an end of a printing line, and after the operation is carried out, a driving signal in the opposite direction is given to the drive source. CONSTITUTION:An ordinary paper and a special paper such as an envelope are detected by sensors 1, 2. In the case of the ordinary paper, paper feeding, movement of a carrier and a printing operation are carried out while maintaining a set printing gap 8. In the case of the special paper, a printing gap is set, and when it is necessary to feed the paper or move the carrier before printing, a pulse motor 7 is reversely rotated to lower a platen 5 by about two times the thickness of a raw material paper, and an operation of feeding the paper and/or moving the carrier is conducted. After the operation is finished, the pulse motor 7 is rotated forward to raise the platen 5 to a position corre sponding to the printing gap set above, and printing is conducted. In this way, it is made possible to avoid an increase in load resistance at the time of passage of a thicker part of a paper between a ribbon mask 9 and the platen 5.
Patent JP-H0692788-A (JP)
Title: Liquid level detector
Inventor: SUGIYAMA IWAO
IPC: C23C16/44
Filed: 1992-09-14
Abstract: PURPOSE:To provide the liquid level detector to detect the liquid level of a conductive liquid, such as mercury, which can detect the position of the liquid level within a stainless crucible, whose inside cannot be observed, with high accuracy. CONSTITUTION:This detector has a pair of electrodes 3A, 3B, the front ends of which come into contact with the surface of the conductive liquid to be subjected to the detection of the liquid level, a heating power source 12 for heating a pair of these electrodes 3A, 3B and a detecting means (potentiometer) 13 for detecting the potential difference between a pair of the electrodes 3A, 3B. The detector is constituted to detect the potential difference between a pair of the electrodes 3A, 3B while intermittently heating the pair of the electrodes 3A, 3B at every specified time.
Patent JP-H1160064-A (JP)
Title: Bobbin holder for winder
Inventor: TSURUOKA TAKESHI
IPC: B65H54/547
Filed: 1997-08-25
Abstract: PROBLEM TO BE SOLVED: To provide a bobbin holder for a winder, which can prevent contamination of a winding package, deterioration of the environment and the like. SOLUTION: A bobbin holder is composed of a holder member 3 provided with a holding mechanism 4 for gripping a bobbin and having a connection part 3a and cylindrical parts 3b, 3c, a tubular support member 3 projected into a hollow part 3e in the cylindrical part 3b of the holder member 3, and attached to a machine frame 1, and a shaft member 5 rotatably journalled by a bearing 8 in the tubular support member 3 and connected to the shaft connection part 3a of the holder member 3, spiral beads 2c, 3f being formed at the inner peripheral surface of the cylindrical part 3b of the holder member 3.
Patent JP-H0292116-A (JP)
Title: Keyboard system
Inventor: NINOMIYA RYOJI
IPC: G06F3/023
Filed: 1988-09-29
Abstract: PURPOSE:To decrease the burden of a host CPU by assigning further a switch to show a keyboard type to a switch on a keyboard matrix to show whether or not a key is pushed, deciding a keyboard type with a key scanning action, and preparing a key code in accordance with the type obtained here. CONSTITUTION:A keyboard controller 2, in order to investigate whether or not a pushed key is present, designates a key scanning control device 3 to execute the scanning successively one by one for the line of all keyboard matrixes 4 at a key switch 5. The switching condition of the line on a keyboard matrix 4 to scan each time the key scanning control device 3 scans is informed to the keyboard controller 2. When the key is pushed, since the key switch, which is the key, is turned ON, the keyboard controller 2 finds that the pushed key is present and can know which key is pushed from the relation with the scanned line. Thus, the function distribution is executed and the throughput of the system is improved.
Patent JP-H0883013-A (JP)
Title: Image forming device
Inventor: SEKIDA ITSURO
IPC: G03G15/20
Filed: 1994-09-13
Abstract: PURPOSE: To provide an image forming device which copes with various types of sheet materials, for example an OHP sheet, and is free of a waste of sheet materials. CONSTITUTION: The device is equipped with a feed part 52 for feeding a transfer material P as a sheet material, image formation parts SA, SB, SC, and SD for forming images on the fed transfer material P, standby parts (feed part 52) for supplying the transfer material P to the image formation parts SA, SB, SC, and SD, and a fixing unit 11 for fixing the images, formed by the image formation parts SA, SB SC, and SD to the transfer material P. The fixing unit 11 has a first fixing speed, which is an ordinary fixing speed, and a second fixing speed, which is slower than the first one. There is a difference in the feed sequence of the feed part 52 between the first and second fixing speeds.
Patent JP-H0295590-A (JP)
Title: Holding device
Inventor: YOSHIDA TOMIYOSHI
IPC: G05B13/00
Filed: 1988-09-29
Abstract: PURPOSE:To accurately hold without destroying a body by providing an inference part performing a fuzzy inference in order to decide an adaptive holding power based on the differential value of the detection values of an reaction power sensor and displacement sensor. CONSTITUTION:The reaction force from a body of the time when the body is held on a holding part 1 is detected by a reaction force sensor 2 and also the slide of the held body is detected by a displacement sensor 3. The detection values of these reaction force sensor 2 and displacement sensor 3 are differentiated by differential processing parts 4, 5, the differentiated value thereof is input to an inference part 6 and a fuzzy inference is executed in order to decide an adaptive holding force. Based on the inference result of this inference part 6, the holding power of a driving part 8 opening and closing the holding part 1 is controlled by a control part 7 and the body is accurately held without destroying it.
Patent JP-H05227012-A (JP)
Title: Compound semiconductor logical integrated circuit
Inventor: KAMEYAMA ATSUSHI
IPC: H03K19/0952
Filed: 1992-09-14
Abstract: PURPOSE:To steadily control the output level of a circuit, to reduce power consumption and to easily attain DC/AC design by controlling a control FET through a fixed delay time after the operation of a directly connected FET logic DCFL circuit. CONSTITUTION:When an 'L' level signal is inputted to the input of a DCFL circuit 11, a circuit output Y is turned to 'H' after the delay time of the circuit 11. At the time, a controlling FET 14 is in an OFF state and an 'H' level tries to rise up to the sum 2phib of the gate and source of the succeeding FET 121. The output potential of a source-follower circuit 12 is also raised and a load capacitor 16 is charged with electricity. After the lapse of prescribed seconds, the FET 14 is turned on and the output Y is clamped. When an 'H' level signal is inputted to the circuit 11, the output Y is turned to 'L'. At the time, the FET 14 is in the ON state an the output Y is suddenly turned to 'L'. Thereby the output potential of the circuit 12 is also dropped and electricity is discharged from the capacitor 16. When the FET 14 is turned off thereafter, the potential of a normal BDCFL circuit is restored.