Patent GB-957811-A (GB)
Title: Improvements in or relating to apparatus for determining the repetition frequency ofpulse signals
IPC: G01R23/00
Filed: 1962-02-27
Abstract: 957, 811. Electric selective signalling. H. LINDARS. Feb. 25, 1963 [Feb. 27, 1962], No. 7648/62 Heading G4H. The repetition frequency of repetitive pulses is measured by apparatus comprising a pulse source and a system of frequency dividers deriving clock pulse trains at different frequencies, a gate opening a predetermined time after the occurrence of one of the repetitive pulses to allow clock pulses to pass to a counter counting down from an initial setting the output of the counter selecting the clock pulse train to be used so that the value in the counter, when counting is stopped by the next repetitive pulse, indicates the frequency corresponding to the interval between the pulses. The pulse recurrence frequency to be determined may vary between 240 and 30 pulses per minute. A frequency of 240 would give an interval time of a quarter-second. The counter may be set initially at 240, the maximum frequency to be measured. If counting starts 250 milliseconds after the first pulse, the second pulse stops counting as soon as it began, leaving the count at 240 which is a correct measure of the frequency. If the clock pulse frequence were 1000 c.p.s. andthe interval were slightly longer, ten pulses may reach the counter before the second pulse arrives, bringing the count down to 230 and this figure correctly indicates the frequency in cycles per second. As the frequency decreases, the frequency of the clock pulses needed to count down the value in the counter, so that it always approximately represents the frequency, also decreases. In the form shown in the figure the recurrent pulses are derived in transducer 10, differentiated at 11 and applied to reset a bi-stable 12. In this condition there are no signals at outputs 13, 14 but inverter 101 responds to the absence of signal on line 14 to open gate 100 and allow 500 c.p.s. pulses to pass to the sequence counter 103. This effects a number of resetting operations and 14 milliseconds after the resetting of the bi-stable it sends a signal on line 117 to set bi-stable 12. The signal on output 13 opens gate 15 and allows clock pulses on line 50 to pass to counter 16. The oscillator 30 has a frequency of 4Kc and the output is applied to three chains of frequency-dividers 31 and 34-39; 32 and 40-44; 33 and 45-49 producing clock pulse frequencies varying between 1000 c.p.s. and 20. 8 c.p.s. which are applied to And gates 51-64 controlled by bi-stable units 65-78. The bi-stable units are connected so that as each one is set it resets the previous one. Initially the bi-stable 65 is set so that gate 51 passes clock pulses at 1000 c.p.s. to the gate 15. When the counter has counted down to 230 outputs from the counter applied to gate 80 set bi-stable 66, resetting 65. Gate 52 then passes pulses at 800 c.p.s. to the gate 15 and so on. When the next pulse arrives from transducer 10 the bi-stable 12 resets and counting stops. The contents of the counter 16 are transferred to stores 106-108 by sequence counter 103 and the counter 16 reset to its initial value. The value stored is displayed on multi-cathode tubes 109-111. Frequencies higher or lower than the expected limits may cause alarms to be given. The initial value set into the counter is 476 since the counter 103 counts seven pulses at 500 c.p.s. giving a delay of 14 milliseconds. This means that 250 milliseconds after the first pulse the counter stands at 240, the initial clock pulses being 1000 c.p.s. During the next 250 milliseconds the counter 16 will indicate approximately the frequency of the input repetitive pulses measured by the interval between adjacent pulses.