Patent GB-1181855-A (GB)
Title: Improvements in or relating to Information Converter Arrangements
Inventor: KAENEL REGINALD ALFRED
IPC: H04M1/276
Filed: 1967-06-07
Abstract: 1,181,855. Magnetic storage apparatus; automatic exchange systems. WESTERN ELECTRIC CO. Inc. 7 June, 1967 [15 June, 1966], No. 26189/67. Headings H3B and H4K. An information converter arrangement comprises a magnetic domain wall storage medium in which input information, stored in the medium in the form of a reverse magnetized domain of length in accordance with the information is propagated through the medium to an output portion thereof where the length of the domain causes converted output information in accordance therewith. The converter is used as a multi-frequency to dial-pulse converter in a telephone system in which a multifrequency code is translated to a 2-out-of-7 code which is then converted into a number of dial pulses for each multifrequency pulsed digit. A domain wall wire DW, Fig. 1, is divided into write, buffer and read portions. Coded input information from a push-button subset, Fig. 4 (not shown), is written into the wire DW as reverse magnetized domains by means of input conductors L1, L2, L3, L4, H1, H2, H3, arranged as shown in Fig. 2. The wire DW is initially magnetized in one direction so that when one of the push-buttons is depressed the appropriate input conductor or conductors is pulsed, resulting in a current flow through part of the wire 11 reversing the initial magnetization by a length along the wire DW determined by the input conductors pulsed, Fig. 3 (not shown). At the same time as a digit select button is depressed a write signal is also applied to conductor 20 setting bi-stable circuit 21. If bi-stable circuit 24 is in a reset state and five-phase clock CS1 is in its first phase then AND circuit 22 is enabled and bi-stable circuits 25, 27 are set, resulting in a write buffer gate WBG being enabled. The WBG gate then gates four phase pulse sequences from clock source CS 1 to two sets of propagation conductors P1, P2 arranged as shown in Fig. 2 around the wire DW, thus advancing the stored reverse domain into the buffer portion. When the trailing domain wall passes conductor 30 wound on wire DW a pulse is induced in this conductor which resets bi-stable circuit 27 after a one-phase delay and propagation of the reverse domain ceases. This process is repeated for each depression of the digit select buttons until the entire called number is stored in the buffer portion of wire DW. If, during the storing of the calling number read signals are received from a central office on line 40 indicating the readiness of the central office to accept dial pulses bi-stable circuit 42 is set. Thus when bi-stable circuit 25 is next reset by the arrival of the trailing edge of a reverse domain at the position coupled by conductor 30 and thereafter when clock pulse source CS1 provides a next phase 2 bi-stable circuit 24 is set. When clock pulse source CS1 next provides a phase 1 pulse AND circuit 44 is enabled, bi-stable circuit 45 is set and read buffer gate RBG is enabled for gating four-phase clock pulses from source CS1 to two sets of propagation conductors P3, P4 arranged similarly to P1, P2 over the read portion of wire DW. At the same time as gate RBG is enabled AND gate 46 is supplied with a set pulse from circuit 45 so that at every fifth clock pulse from CS1 gate circuit 46 is enabled and monopulser 47 is triggered, thus pulsing conductor 48 to drive the coupled portion of the output position to the initialized magnetized condition if not already therein. When the leading domain wall of a stored reverse domain reaches the portion of the output position coupled by a conductor 60 it induces a positive pulse therein which is ignored by interdigit spacing circuit 61 and bi-stable circuit 42. In addition, pulses induced in conductors 48, 50 are also ignored. On the following phase 5 read monopulser 47 is activated, thus driving the portion of the coded domain coupled by conductor 48 to the initialized direction so that the resultant reversal of flux induces a voltage in conductor 50 for detection by device U which may be the switching apparatus in a telephone central office and producing a dialling pulse. The voltage induced in 50 also activates OR gate 51 and resets bi-stable circuits 24, 45 enabling a further write operation to be performed, if required, and terminating the advance of the domains in the read portion. In the absence of such a write operation clock CS1 enables AND gate 43 for activation on the next phase 2 and the advance of the reverse domains in the buffer and read portions is again initiated until the next voltage pulse on conductor 50 at phase 5 produces a further dialling pulse and ceases the advance. The operation continues until the trailing edge of the domain arrives at 60 when the negative pulse induced in this conductor activates interdigit spacing circuit 61 and disables gate 41 for a preset time and also resets circuit 42. The number of pulses at U are determined by the number of bit positions occupied by the interrogated reverse domains. The writing and reading cycles are interleaved. A thin film device may be used.