baber/WOPTO huggingface dataset:
Patent KR-950021617-A (KR)
Title: 반도체 메모리장치 제조방법
IPC: H01L27/108
Filed: 1993-12-21
Abstract: 본 발명은 반도체 메모리장치 제조방법에 관한 것으로, 종래 반도체 메모리장치 제조에 있어서 커패시터 유전체막을 질화막을 로드 록 부착 LPCVD장치를 이용하여 증착할 경우에 발생하는 질화막의 내산화성 저하문제를 해결하기 위해 반도체기판(100)상에 트랜지스터를 형성하는 공정과, 상기 트랜지스터 상부에 층간 절연막(5)을 형성하는 공정, 상기 층간절연막(5)상에 내산화용 질화막(9)을 형성하는 공정, 상기 내산화용 질화막(9)과 산화막(5)을 선택적으로 식각하여 상기 트랜지스터의 소오스(또는 드레인)영역(S/D)을 노출시키는 콘택홀을 형성하는 공정, 결과물 전면에 커패시터 스토리지노드 형성을 위한 도전층(6)을 형성하는 공정, 상기 도전층(6)을 사진식각공정에 의해 선택적으로 식각하여 커패시터 스토리지노드를 형성하는 공정, 결과물 전면에 커패시터 유전체막(7)을 형성하는 공정 및 상기 커패시터 유전체막(7) 전면에 커패시터 플레이트전극(8)을 형성하는 공정으로 이루어지는 반도체 메모리장치 제조방법을 제공한다. 
     본 발명에 의하면, 내산화용 질화막을 커패시터 유전체막 형성전에 그 하부에 형성함으로써 커패시터 부위이외의 필드산화막 상부에서의 질화막의 두께가 부분적으로 얇게 형성되는 것을 방지하여 질화막의 내산화성을 유지시킬 수 있게 됨으로써 반응가스와의 이상반응을 방지할 수 있게 되며, 결과적으로 기생 MOS Vt의 저하현상을 막을 수 있게 된다.
Patent KR-950021366-A (KR)
Title: 반도체 장치의 소자분리막 형성방법
Filed: 1993-12-27
Abstract: 본 발명은 반도체 장치의 소자분리막을 형성하는 방법에 관한 것으로, 필드영역이 형성될 부분의 반도체 기판에 트렌치를 형성하고, 상기 트렌치 내벽에 CVD 산화막 스페이서 및 질화막을 증착하여 후공정의 산화공정시 반도체 기판으로의 산화제 확산을 방지하게 하고, 상기 질화막이 증착된 트렌치 내부에 폴리실리콘 또는 비정질 실리콘을 매립한 후 소자분리막으로서의 필드 산화막을 형성하므로써, 버즈비크(Bird′s Beak)가 없어 넓은 능동영역을 얻을 수 있고, 평탄화된 소자분리막의 형성으로 후속공정을 용이하게 할 수 있는 반도체 장치의 소자분리막을 형성하는 방법에 관해 기술된다.
Patent KR-950022492-A (KR)
Title: 이더넷 브리지 환경하에서 리모트 패킷의 자동 필터링 로직
IPC: H04L12/851
Filed: 1993-12-30
Abstract: 본 발명은 이더넷 브리지 환경하에서 리모트 패킷을 추출하는 수단과 관련된 것으로서, 종래에는 이러한 수단이 시스템의 메모리에 이더넷 신호를 리모트 패킷 여부와 관계없이 모두 저장한 후 프로그램 적으로 리모트 패킷을 추출하는 수단을 취하고 있어 시스템 메모리의 증가와 처리 효율을 저하시키게 되는 원인이 되었다. 본 발명은 종래의 이러한 문제점을 개선할 수 있도록 이더넷 신호가 입력되는 이더넷 세그먼트(ESE)와 이더넷 제어기(21)사이에는 리모트 패킷만 선별하여 통과시키는 자동 필터링 로직(1)을 구비시킨 구성의 리모트 패킷의 자동 필터링 로직을 제공하는데 있다.
Patent KR-930703629-A (KR)
IPC: H04N13/02
Filed: 1991-11-27
Abstract: A single camera autostereoscopic recording system includes a single image recorder having a single optical path moved along the scanning path substantially continuously for a plurality of scanning cycles. A path defining structure includes the ability to adjust the convergent point as well as the extent of travel along the scanning path or disparity of the images. The convergent point of the scanning path can be manually or automatically adjusted using a range finder. A unique driver structure provides scanning motion with reduced reactional forces. The degree of motion of the recorded images is used to adjust the amount of travel along the scanning path. Synchronization betwen the driver and the recorder is bi-directional for double exposures. The recorded image is adjusted in recording or in display as a function of the position inthe scanning path.
Patent MY-133643-A (MY)
Title: Delay circuit.
Inventor: STRUCK SONKE
IPC: G11C27/04
Filed: 1996-02-02
Abstract: A DELAY CIRCUIT HAVING AT LEAST TWO MEMORY CELLS, (3, 4, 5, 6, 8, 9) EACH COMPRISING A CAPACITIVE MEMORY ELEMENT (20, 26, 40, 45), A WRITE TRANSISTOR (22, 28, 42, 47) BY MEANS OF WHICH INFORMATION TOBE DELAYED CAN BE WRITTEN FROM A WRITE LINE (18) INTO THE CAPACITIVE MEMORY ELEMENT (20, 26, 40, 45), AND A READ TRANSISTOR (21, 27, 41, 46) BY MEANS OF WHICH INFORMATION CAN BE READ FROM THE CAPACITIVE MEMORY ELEMENT (20, 26, 40, 45) ON A READ LINE (19), AND HAVING A CONTROL ARRANGEMENT WHICH IS CLOCKED BY MEANS OF A FIRST CONTROL CLOCK AND WHOSE INPUT RECEIVES A CONTROL SIGNAL AND WHICH COMPRISES INTERCOUPLED CONTROL CIRCUITS (11, 12, 13, 14, 15, 16) ONE OF WHICH IS ASSOCIATED WITH A RESPECTIVE MEMORY CELL (3, 4, 5, 6, 8, 9), EACH CONTROL CIRCUIT (11, 12, 13, 14, 15, 16) OF THE READ TRANSISTOR (21, 27, 41, 46) OF THE ASSOCIATED MEMORY CELL (3, 4, 5, 6, 8, 9) BEING CONTROLLABLE BY MEANS OF THE INPUT SIGNAL AND EACH CONTROL CIRCUIT (11, 12, 13,14, 15, 16) OF THE WRITE TRANSISTOR (22, 28, 42, 47) OF THE ASSOCIATED MEMORY CELL BEING CONTROLLABLE BY MEANS OF THE OUTPUT SIGNAL, IN WHICH EACH CONTROL CIRUCIT (11, 12, 13, 14, 15, 16) HAS A FIRST ELEMENT (43, 48, 24, 30) AND A SUBSEQUENT SECOND CONTROL ELEMENT (44, 49, 25, 31), THOSE CONTROL CIRCUITS (14) WHOSE PRECEDING CONTROL CIRCUIT (11) IS ARRANGED LOCALLY REMOTE HAVE A THIRD CONTROL ELEMENT (29) PRECEDING THE FIRST CONTROL ELEMENT (30), IN THAT THE INPUT OF THE THIRD CONTROL ELEMENT (29) RECEIVES THE OUTPUT SIGNAL OF THE FIRST CONTROL ELEMENT (24) OF THE PRECEDING, SPATIALLY REMOTE CONTROL CIRCUIT (11), AND IN THAT THE FIRST CONTROL ELEMENTS (43, 48, 24, 30) OF THE CONTROL CIRCUITS (11, 12, 13, 14, 15, 16) ARE CLOCKED BY THE FIRST CLOCK AND THE SECOND (44, 49, 25, 31) AND THIRD (29) CONTROL ELEMENTS OF THE CONTROL CIRCUITS (11, 12, 13, 14, 15, 16) ARE CLOCKED BY A SECOND CLOCK.
Patent MY-132478-A (MY)
Title: Catalysts suitable for preparing aliphatic alpha-, omega-aminonitriles by partial hydrogenation of aliphatic dinitriles
Inventor: VOIT GUIDO
IPC: C07C255/24
Filed: 1997-09-10
Abstract: A CATALYST SUITABLE FOR PREPARING ALIPHATIC ALPHA, OMEGA-AMINONITRILES BY PARTIAL HYDROGENATION OF ALIPHATIC DINITRILES COMPRISES(A) METALLIC COBALT, A COBALT COMPOUND OR A MIXTURE THEREOF, THE PROPORTION OF METALLIC COBALT BASED ON (A) BEING FROM 20 TO 100BY WEIGHT,(B) FROM 10 TO 70BY WEIGHT, BASED ON (A), OF METALLIC IRON, IRON OXIDE, A FURTHER IRON COMPOUND OR A MIXTURE THEREOF, THE PROPORTION OF IRON OXIDE BASED ON (B) BEING FROM 20 TO 100BY WEIGHT,(C) FROM 0 TO 1 BY WEIGHT, BASED ON (A), OF A COMPOUND BASED ON AN ALKALI METAL, AN ALKALINE EARTH METAL OR ZINC.
Patent MY-124129-A (MY)
Title: Hybrid electronic detonator delay circuit assembly
Inventor: EWICK DAVID W
IPC: H03K17/567
Filed: 1997-12-01
Abstract: AN ELECTRONIC DELAY CIRCUIT (10) FOR USE IN A DETONATOR (100) HAS A SWITCHING CIRCUIT (20) AND A TIMER CIRCUIT (22). SWITCHING CIRCUIT (20) CONTROLS THE FLOW OF A STORED CHARGE OF ELECTRICAL ENERGY FROM A STORAGE CAPACITOR (12) TO A BRIDGE INITIATION ELEMENT SUCH AS A SEMICONDUCTOR BRIDGE (18) OR A TUNGSTEN BRIDGE. THE TIMING OF THE RELEASE OF THIS ENERGY IS CONTROLLED BY TIMER CIRCUIT (22). SWITCHING CIRCUIT (20) IS AN INTEGRATED, DIELECTRICALLY ISOLATED, BIPOLAR CMOS (DI BICMOS) CIRCUIT, WHEREAS TIMER CIRCUIT (22) IS A CONVENTIONAL CMOS CIRCUIT. THE USE OF A DI BICMOS SWITCHING CIRCUIT ALLOWS FOR GREATER EFFICIENCY OF ENERGY TRANSFER FROM THE STORAGE CAPACITOR (12) TO THE SEMICONDUCTOR BRIDGE (18) THAN HAS PREVIOUSLY BEEN ATTAINED.(FIGURE 2)
Patent MY-114823-A (MY)
Title: Laminated fibrous structure and method for manufacturing same
Inventor: DENNIS TROKHAN PAUL
IPC: B32B7/04
Filed: 1998-09-16
Abstract: A LAMINATED FIBROUS STRUCTURE(10) COMPRISING AT LEAST TWO FIBROUS SHEETS(11,21) AND A METHOD FOR MANUFACTURING SAME ARE PROVIDED. AT LEAST ONE, AND PREFERABLY TWO, OF THE FIBROUS SHEETS MAY BE EMBOSSED. THE SHEETS(11,21) ARE MOVABLY JOINED TOGETHER IN A FACE-TO-FACE RELATIONSHIP TO FORM A LAMINATED STRUCTURE SUCH THAT THE SHEETS ARE ABLE TO MOVE RELATIVE EACH OTHER DURING THE USE OF THE LAMINATED STRUCTURE BY A CONSUMER, WITHOUT TEARING OR SEPARATION OF ANY ONE OF THE SHEETS COMPRISING THE LAMINATED STRUCTURE. THE SHEETS COMPRISING THE LAMINATED STRUCTURE MAY BE MOVABLY JOINED BY USING A BONDING MATERIAL, BY MECHANICALLY ENGAGING UPSTANDING FIBERS(41,42) CREATED ON THE INTERFACING SURFACES OF THE SHEETS, OR BY A COMBINATION OF THE BONDING MATERIAL(51,52) AND ENGAGING THE UPSTANDING FIBERS(41,42).FIG 2B
Patent MY-125814-A (MY)
Title: Formulations based on water soluble gold compounds suitable for colouring ceramic manufactured articles
Inventor: GUIZZARDI FABRIZIO
IPC: C04B/
Filed: 1999-08-20
Abstract: COMPOSITION WHEREBY CERAMIC MANUFACTURED ARTICLES ARE COLOURED IN SHADES FROM PINK TO PURPLE TO VIOLET, SAID COMPOSITION CONSISTING OF A MONOVALENT GOLD THIOLATE WATER SOLUTION OR MIXTURE OF WATER WITH A WATER SOLUBLE ORGANIC SOLVENT ACCORDING TO THE FOLLOWING FORMULAS AU-S-R-X AND AU-S-R-H WHERE R STANDS FOR A LINEAR OR BRANCHED BIVALENT RADICAL OF ALIPHATIC OR AROMATIC OR CYCLOALIPHATIC OR HETEROCYCLIC TYPE OPTIONALLY WITH SUBSTITUENTS, SUCH AS FOR EXAMPLE AMINIC, AMIDIC, HYDROXYLIC, CARBOXYLIC, HYDROCARBYLIC OR CARBONYLIC GROUPS OR CONH-, IN THE CHAIN; X STANDS FOR A MONOVALENT GROUP SELECTED OUT OF -COOH, SO2OH, -OH, -CONH2, -NH2; O-P(O)(OH)2, IN WHICH H ATOMS MAY BE REPLACED BY ALKYL GROUPS AND WHEREIN ACID GROUPS MAY BE SALIFIED WITH AMINES OR ALKALINE OR ALKALINE EARTH METALS AND BASIC GROUPS MAY OPTIONALLY BE SALIFIED WITH ORGANIC ACIDS.
Patent SI-21747-A (SI)
Title: SYNTHESIS OF 2-METHYL-4-(4-METHYL-1-PIPERAZINYL)-10H-THIENO(2,3 b)(1,5)BENZODIAZEPE
Inventor: MESAR TOMAZ
IPC: C07D495/04
Filed: 2004-03-18
Abstract: An improved two-stage procedure is described in the invention for synthesis of 2-methyl-4-(4-methyl-1-piperazinyl)-10H-thieno(2,3-b)(1,5)benzodiazepine via the purified intermediate 2-methyl-4-(1-piperazinyl)-10H-thieno(2,3-b)(1,5)benzodiazepine.
Patent SI-23085-A (SI)
Title: Pneumatic machine for simulating pounding which generates a pounding sound
Inventor: FAUSTO MARTIN
IPC: G01H15/00
Filed: 2009-06-24
Abstract: Subject of the submitted invention is a machine for simulating pounding, which is usually used for simulating noise created by steps, in particularly for the purpose of measuring unwanted noise. Its main advantage is its small weight and reduced level of unwanted external noise. On one side because the energy is stored just like compressed air in the corresponding container and on the other due to the absence of motors which rotate the swivelling pieces via a chain drive or cogwheel drive and adequate gearbox.
Patent SI-23133-A (SI)
Title: Procedure of baking food in household appliance
Inventor: KRECA MARKO
IPC: A47J37/00
Filed: 2009-09-23
Abstract: The submitted invention relates to a procedure of baking food in a household appliance, as for example in an oven of a built-in kitchen range, in a built-in oven, in a self-standing kitchen range or similar, which comprises setting of operation of a heating body and/or heating bodies and setting of temperature and baking time. In this connection, it is foreseen according to the invention that a user selects the oven operation mode, temperature and time optionally often in succession and permanently saves selected parameters for later use.
Patent SI-24005-A (SI)
Inventor: SKOK IZTOK
IPC: F24J2/00
Filed: 2012-02-13
Abstract: Predmet izuma so zasloni z nameščenimi sončnimi moduli in neodvisno krmiljenimi vmesnimi zasloni. Inovacija rešuje problem izkoriščanja proti jugu usmerjenih strani objekta za namen pridobivanja električne energije iz obnovljivih virov s pomočjo visoko zmogljivih sončnih modulov (1), nameščenih na zaslonih (2) za senčenje objekta. Vmesni zasloni (3), nameščenimi med zasloni (2) s sončnimi moduli, ki imajo zaradi neodvisnega krmiljenja (7,7A) sposobnost, da se v pozicijah, ko bi zgornji zaslon zasenčil spodnjega, umaknejo v pozicijo, ki je prikazana na sliki 1, ki to prepreči, omogočajo v popolnosti izkoriščanje sistema senčenja in pridobivanja električne energije.
Patent SI-25622-A (SI)
Inventor: JEZERŠEK NEJC
IPC: B60Q1/00
Filed: 2018-04-06
Abstract: Luminiscenčna zgradba svetilke po izumu obsega ohišje (1), ki je konfigurirano za sprejem svetlobnega vodnika (2), ki je na vsaj enem svojem vzdolžnem koncu opremljen z elektronskim sklopom (5), obsegajočim svetlobni vir za dovajanje svetlobe v svetlobni vodnik (2) in krmilje za upravljanje s svetlobnim virom, zaslonko (6), ki je razporejena na proč od ohišja (1) obrnjeni strani in pokriva svetlobni vodnik (2), pri čemer omenjena zaslonka obsega vsaj en izrez (7) za prehod svetlobe iz svetlobnega vodnika (2), in prosojni optični element (8).
Patent TW-201126535-A (TW)
Title: 3D memory array with improved SSL and BL contact layout
Inventor: LUE HANG-TING
IPC: G11C7/18
Filed: 2011-01-25
Abstract: A 3D memory device includes a plurality of ridge-shaped stacks, in the form of multiple strips of conductive material separated by insulating material, arranged as bit lines which can be coupled through decoding circuits to sense amplifiers. The strips of conductive material have side surfaces on the sides of the ridge-shaped stacks. A plurality of conductive lines arranged as word lines which can be coupled to row decoders, extends orthogonally over the plurality of ridge-shaped stacks. the conductive lines conform to the surfaces of the stacks. Memory elements lie in a multi-layer array of interface regions at cross-points between side surfaces of the semiconductor material strips and the conductive lines. The memory element are programmable, like the anti-fuses or charge trapping structures. in some embodiments, the 3D memory is made using only two critical masks for multiple layers. Sone embodiments include a staircase-shaped structure positioned at ends of the semiconductor material strips. Some embodiments include SSL interconnects on a metal layer parallel to the semiconductor material strips, and further SSL interconnects on a higher metal layer, parallel to the word lines.
Patent TW-201144723-A (TW)
Title: Solar photovoltaic power generator system
Inventor: OSAKO KAZUYOSHI
IPC: F24S23/00
Filed: 2011-01-25
Abstract: Adoption of solar photovoltaic power generator systems has increased in recent years as awareness of the importance of protecting the environment grows, and it has become necessary to search out output maxima rapidly and accurately. Disclosed is a solar photovoltaic power system capable of tracking maxima at high speed and searching for maxima with improved accuracy. The system comprises solar panels, and a power conditioner that searches for output maxima of generated power that is outputted from the solar panels and supplies same to a power system by controlling either the voltage or the current of the generated power as an operating value according to the characteristics of the solar panels. The power conditioner further comprises a data memory unit that stores a plurality of operating values by way of the fluctuation control, and a plurality of patterns of the generated power from the solar panels that are based on the operating values; and a maxima tracking unit that adds new operating values to some operating values when running past searches on the basis of the patterns of the generated power from the solar panels of the past searches, and computes next search operating values. When the deviation of the plurality of generated power that is outputted by the searching by the maxima tracking unit is less than or equal to a prescribed value, such will be treated as the maximum value.
Patent TW-201232438-A (TW)
Title: Small-area marketing and transacting system and method
Inventor: WHAN WEN-JEA
IPC: G06Q20/30
Filed: 2011-01-28
Abstract: A small-area marketing and transacting system and method are disclosed. The system comprises a signal source (wireless broadcaster), a web server, a transaction-processing device, and a personal digital processor. The broadcaster is provided at a seller terminal for broadcasting identification codes associated with marketing information. The web server is provided at a network for storing marketing and transacting data. The transaction-processing device is provided at the seller terminal for handling the transaction between a consumer terminal and the seller terminal. The personal digital processor is provided at the consumer terminal for connecting with the web server, for receiving and identification codes associated with marketing information, and for exchanging transaction information with the transaction-processing device. Thereby, network marketing and the store-based shopping-and-transacting mode can be effectively integrated as a whole.
Patent TW-201235490-A (TW)
Title: Hard coating, article having hard coating, and method for making article
Inventor: CHANG HSIN-PEI
IPC: C23C14/34
Filed: 2011-02-16
Abstract: Hard coating, article having the hard coating, and method for making the article are provided. The hard coating includes a plurality of TiAlN layers and AlN layers alternately arranged with the TiAlN layers. The weight percent of elements of the hard coating is Ti: 46-46.6%, Al: 25.6-26.2%, N: 27.2-28.4%. The article includes a base and the hard coating formed on the base. The method for making the article includes alternately depositing the TiAlN layers and AlN layers on the base, then heating the base in an oven with full of N2 in the oven, thus to get the article.
Patent TW-201235838-A (TW)
Title: Testing system and method for USB hub
Inventor: LAI YI-LIN
IPC: G06F13/38
Filed: 2011-02-18
Abstract: A testing system including a testing device, a USB hub and a host device is disclosed. The USB hub is coupled between the testing device and the host device. The host device communicates with the testing device via the USB hub and includes a storage unit and a processing unit. The storage unit stores a first test program and a second test program. When the USB hub is coupled between the testing device and the host device, the processing unit executes the first test program and then executes the second test program. When the first test program is executed, the testing device operates in a USB 3.0 mode. When the second test program is executed, the testing device operates in a USB 2.0 mode. The processing unit reads the first and the second test programs via different interfaces.
Patent TW-201139459-A (TW)
Title: Osteopontin-specific monoclonal antibodies
Inventor: MATSUDA HARUO
IPC: G01N33/577
Filed: 2011-03-18
Abstract: Disclosed is a substance capable of inhibiting the neutrophil recruitment, a substance capable of inhibiting a polymerization of osteopontin, or an osteopontin-specific antibody having different affinity for monomeric osteopontin or polymeric osteopontin. Use an osteopontin-specific antibody recognizing transglutamination motif of osteopontin, inhibiting the neutrophil recruitment, inhibiting the polymerization of osteopontin, or having a heavy-chain variable region CDR1 comprising an amino acid sequence depicted in SEQ ID NO: 2, a heavy-chain variable region CDR2 comprising an amino acid sequence depicted in SEQ ID NO: 3 and a heavy-chain variable region CDR3 comprising an amino acid sequence depicted in SEQ ID NO: 4.
Patent TW-201206262-A (TW)
Title: Wiring substrate
Inventor: OOI TAKAHIRO
IPC: H05K1/02
Filed: 2011-03-29
Abstract: A wiring substrate includes differential wirings; a first insulating layer adjacent to one side of the differential wirings, including first fiber bundles parallel to the differential wirings; a second insulating layer adjacent to another side of the differential wirings, including second fiber bundles parallel to the differential wirings and disposed by the same pitch as the first fiber bundles; a third insulating layer on the first insulating layer on a side opposite to the differential wirings, including third fiber bundles in parallel to the differential wirings; and a fourth insulating layer on the second insulating layer on a side opposite to the differential wirings, including fourth fiber bundles in parallel to the differential wirings. Intervals of the third and fourth fiber bundles are respectively narrower than intervals of the first and second fiber bundles. The differential wirings are disposed between adjacent first fiber bundles, and between adjacent second fiber bundles.
Patent TW-201243091-A (TW)
Title: Coated article and method for making the same
Inventor: CHANG HSIN-PEI
IPC: C23C16/40
Filed: 2011-04-28
Abstract: A coated article is provided, which includes a substrate and a coated layer formed on the substrate. The coated layer is an M doped titanium dioxide layer, where M is one selected from nickel, iron and chromium. A method for making the coated article is also provided. The method utilizes PVD coating technology and target with special ingredients in order to make the coated layer on the substrate. The method is simple and environmentally friendly. The coated layer has stable property and good photochromic effect.
Patent TW-201144468-A (TW)
Title: Sputtering target and process for producing the same
Inventor: NAKAMURA ATSUSHI
IPC: G11B7/257
Filed: 2006-04-03
Abstract: This invention provides a sputtering target that has low refractive index and, at the same time, low bulk resistance. The sputtering target comprises Al2O3: 0.2 to 3.0 at% and MgO and/or SiO2: 1 to 27 at% with the balance consisting of ZnO. There is also provided a process for producing a sputtering target having low refractive index and, at the same time, low bulk resistance, characterized by comprising previously mixing Al2O3 powder and ZnO powder as raw materials, calcining the mixture, mixing the calcined Al2O3-ZnO mixed powder with MgO and/or SiO2 powder, and then sintering the mixture. Further, a target for optical thin film formation, which is free from sulfur, has low bulk resistance, can realize DC sputtering, has low refractive index, and a process for producing the same are also provided. The target has high transmittance and is formed of a non-sulfide system and thus is useful for the formation of a thin film for an optical information recording medium that adjacent reflective layer and recording layer are less likely to be deteriorated. Further, improved properties of the optical information recording medium, reduced equipment cost, and significantly improved throughput by virtue of an improved film formation speed can be realized.
Patent TW-201250739-A (TW)
Title: Ceramic nanometer physical energy storage device and manufacturing method thereof
Inventor: CHEN ZU-WANG
IPC: H01G4/12
Filed: 2011-06-15
Abstract: A ceramic nanometer physical type energy storage device and a manufacturing method thereof are disclosed; the device includes at least two electric storage layers, at least a dielectric layer and two electrode plates. The electric storage layers comprise a dielectric ceramic and nano-conductive material, wherein the nano-conductive material is interspersed among the dielectric ceramic; the dielectric layer is disposed between the two electric storage layers, and the electrode plates are disposed on the top and bottom respectively. When energized, the crystal structure of the dielectric ceramic and the dielectric layer is changed according to electromagnetic field change, such that the nano-conductive layer can pass through the crystal structure to perform electric energy storage or release rapidly in a physical manner.
Patent TW-201206624-A (TW)
Title: Main shaft drive for machine tool
Inventor: TATSUDA YOSHINORI
IPC: B23Q11/10
Filed: 2011-06-20
Abstract: A main shaft drive includes a supply groove that opens to a friction surface, that extends so as to surround a main shaft within a contact range where the friction surface and a pressing surface oppose each other, and that includes an intersecting groove and a discharge opening. The intersecting groove extends in a direction of intersection with a circumference in which a rotational center of the main shaft is a center. The discharge opening is connected to a location that is outside the contact range. By opening a nozzle hole, used for supplying lubricant, towards the supply groove, as the main shaft rotates, four intersecting grooves move relative to the contact range, so that the lubricant is supplied to the four moved intersecting grooves. Therefore, the lubricant easily reaches a location within the contact range where the friction surface and the pressing surface oppose each other.
Patent TW-201251129-A (TW)
Title: Manufacturing method of LED device
Inventor: HONG SEUNG-MIN
IPC: H01L33/48
Filed: 2011-06-27
Abstract: A manufacturing method of a LED device is provided to spread a fluorescent liquid made by mixing resin paste and fluorescent powder on a LED chip. The method includes the following steps: (a) preparing a flat shaped base, (b) preparing a sheet-shaped guide member having a plurality of chip holes; (c) disposing the guide member and the LED chips on the base in a manner that the LED chips is received in each of the chip holes, (d) distributing the fluorescent liquid towards each of the chip holes of the guide member after steps (a), (b) and (c), and (e) removing the guide member after step (d).