Patent GB-1334044-A (GB)
Title: Image analysing
IPC: H04N5/217
Filed: 1969-11-12
Abstract: 1334044 Television shading correction MELDRETH ELECTRONICS Ltd 6 Nov 1970 [12 Nov 1969] 55269/69 Heading H4F Shading correction signals for a video signal source are derived by scanning the photosensitive region of the video signal source when uniformly illuminated and sampling the resulting video signal amplitude at each of a plurality of selected points within the scanned region, these video samples being stored at separate locations in a store and subsequently read-out in groups in synchronism with the re-scanning of the region to derive the video signal to be corrected. Each group of locations read is arranged to contain signal samples corresponding to points in the scanned region which define an area within which the scanning spot effecting the re-scanning lies, and the shading correction signals are generated from each such group of signal samples and then used to correct the amplitude of the video signal, i.e. increase its amplitude in shaded regions. A connected video signal may be compared with a reference voltage to effect an analysis of the video signal amplitude excursions. The shading correction information is derived (see later) from a video signal produced by scanning a plain evenly illuminated field and is stored in a memory 50, Fig. 3, from which the information is selected and passed via an interpolator 52 to a signal multiplier 48 which modifies the video signal from the scanner 46 to produce a corrected video signal as regards uniformity of raster intensity. Multiplier 48 may comprise a variable gain amplifier. In a single arrangement in which the scanned field is divided into sixteen rectangular regions A1 to D4 (Fig. 1, not shown) the memory 50, Fig. 4, can be thought of as comprising sixteen individual stores arranged in a 4 x 4 matrix A1 to D4. Correlator 54, Fig. 3, ensures that appropriate stores of matrix 50 are read-out in the appropriate manner in correspondence with the line and frame scan of the scanner 46. In Fig. 4 the information is extracted under control of the scan timing generator which drives address decoders 66 and 68, the respective outputs being integrated 56, 58, 60, 62 and 72, these integrators being reset at the end of each line or frame scan.  In a further embodiment, Fig. 5, the information from memory 50 is extracted simultaneously in the four rows, and the frame decoder 66 is arranged to select pairs of rows such that the instantaneous point of interest is between the two selected rows. These two selected rows are passed to a vertical interpolator 73 which is arranged to take a weighted mean between the selected rows so as to give a linear interpolation between matrix regions in the vertical direction. This vertically interpolated signal is delayed 74 by one matrix region in the line direction so that signals from two adjacent matrix points are available at any moment and are passed to the horizontal interpolator 75 which performs a similar weighted mean operation in the line direction so that the final correction signal at any instant represents a correctly linearly weighted mean between the four nearest matrix points in the memory. A correction system employing automatic loading is shown in Fig. 6. During loading using a plain evenly illuminated field the scanner 46 generates a video signal which passes to a comparator 76, e.g. a divider, which divides a reference signal corresponding to the theoretical video produced by scanning a plain field, by the video signal so as to derive the required shading correction (multiplying 48) factor. Correlator 77 opens gate 80 to allow the results from the divider to pass into the correct memory position. The information from memory 50 is interpolated 52 as described with reference to Fig. 4 or 5. When the memory is fully loaded switch 77<SP>1</SP> is opened. An improved loading arrangement is shown in Fig. 7 in which the scanner 46 output passes through the multiplier 48 to the comparator 78 which comprises a threshold detector which merely responds to whether the corrected signal is greater or less than the reference, an increment generator 79 generating an " increasing " or " decreasing " multiplier increment which is passed to the memory 50 as in Fig. 6. This system contains its own feedback loop and so the linearity and gain of the various components is automatically compensated. Switch 81 is closed during loading but is opened to prevent operation of gate 80 during a reading mode, but since the loading is performed on a plain field this does not restrict its utility. The increments of correction applied through the generator 79 are preferably successively smaller for subsequent scans. For the comparison it is sufficient to take the smallest picture element at each matrix point if the signal-to-noise ratio of the scanner is high, but if it is low then an average of a plurality of adjacent picture elements is used. A vertical interpolator for use in Fig. 5 is described with reference to Fig. 8 (not shown), digital to analogue converters being employed, an integrator for use in Fig. 4 is described with reference to Fig. 9 (not shown), and a system for storing digital information relating to the shading characteristic of the video source is described with reference to Fig. 10 (not shown) first and second level correction signal shift register type storage devices being employed for each line of stored matrix points, the outputs from all the shift registers associated with each pair of lines of matrix points being read in parallel and interpolated. The applications following have been divided out of the Specifications 1,334,045, 1,334,046, 1,334,047 and 1,334,048.