Patent GB-1354915-A (GB)
Title: Semiconductor device
IPC: H01L27/07
Filed: 1971-06-17
Abstract: 1354915 Semi-conductors PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd 17 June 1971 [20 June 1970] 28445/71 Heading H1K A semi-conductor device (Figs. 1, 2) comprises a body 1 containing a number of integrated circuits at least one element of which is separated by insulation zone 2, 3 and connected to a resistor 4; the elements being provided in surface layer 5 of one conductivity type extending over a layer 6 common to all such elements and of the same conductivity type, being of lower resistivity than layer 5, and which may be epitaxially deposited. The element comprises zone 7 in layer 5 and zone 8 of opposite conductivity type extending from surface 10 to form PN junction 11; which is used, e.g. as a diode or as a base-collector PN junction of a transistor surrounding an emitter zone of the one conductivity type. Insulation zone 2, 3 of cup shape extends from the surface through layer 5 into the boundary of layers 5, 6 to surround zones 7, 8, and defines an aperture 12 connecting zone 7 to common layer 6 to present a resistor 4 in the surface layer. An insulant layer 10 overlies the surface and bears conductive tracks 14, 15 connected through apertures to the base and emitter zones. Common layer 6 acts as a reference or ground plane to which a supply conductor 16 may be soldered. The insulant zone may be of solid, insulating material or of intrinsic or high ohmic s/c material, e.g. of opposite conductivity type, provided on the surface of substrate 6 before epitaxial deposition of layer 5, and the portion 2 may be diffused in. In a further example the surface element is an FET (Figs. 3, 4) in which a low ohmic substrate 21 is overlain by a high ohmic layer 22 of the one conductivity type, with cup shaped insulant zone of opposed conductivity type surrounding a portion of the surface layer comprising source, channel, and drain regions 24, 25, 26. The drain region contacts lateral resistor region 27 traversing aperture 29 of the insulation zone. Conductive tracks 35, 36, 37 are connected to the source drain and gate regions through apertures of insulant layer 31. A surface zone 30 of insulant material or opposite conductivity type semi-conductor may extend from the surface to reduce the cross-section of the resistor region, and may be connected over track 34 to a reverse bias potential source for the PN junction 32, so that the resistance value is controllable thereby, and zone 30 may cohere with the insulation zone. In a further example (Fig. 5) a bipolar transistor having collector, base, and emitter zones 52, 53, 54 formed in surface layer 55 of the s/c body 50 is surrounded by insulation zone 51 outside which a further bipolar transistor circuit element whose collector zone is formed by the one conductivity type region and adjoining insulation zone 51 with low ohmic common layer 57 as its connection; the collector zone also being connected to similar zone 52 over aperture 58 and lateral resistor 59, 60. The further element also has base zone 61 surrounding emitter zone 62. Collector zone series resistance is reduced by a buried layer 63 with graduated doping of the one conductivity type, and a similar layer 60 combined therewith underlies the lateral resistor 59, 60. A surface insulant layer underlies the conductive tracks 65, and the surface semiconductor layers 55, 56 are epitaxial and of similar resistivity. A further example comprises an integrated flip-flop circuit having two cross-connected transistors with collector resistors for bi-stable, two diodes for set and reset, and two further transistors for readout, which may form part of a memory matrix (Figs. 6, 7, not shown). A semi-conductor body of low ohmic substrate and high ohmic epitaxial layer of a one conductivity type is formed with vertical bi-polar transistors for the bi-stable, separated by insulation zones; the base zones of the transistors being extensions of the insulating zones coherent therewith at the surface. The collector zones form a low ohmic layer and have a contact zone formed simultaneously with the emitter zones, and adjoin a lateral resistor bounded by the insulated zone which connect the central zone and an aperture of the insultion zone for connection over low ohmic substrate to the supply voltage. The insulation zones form anodes of the set-reset diodes whose cathodes are provided simultaneously with the emitter zones. The walls of the insulant zones cohere with the base zones of the emitter-follower readout transistors, whose collectors are formed by part of the epitaxial layer outside the insulant zone and are directly connected to the substrate, while the emitter zones are surrounded by the base zones, under which lies an N-type buried layer. The surface is covered by an insulant layer metallized for interconnection of the circuit elements through apertures: the base zones being contacted through the insulator zones (Figs. 8, 9, not shown). The buried layers are obtained by, e.g. diffusion of As and the base and insulant zones by, e.g. diffusion of BO, and the emitter zones by, e.g. diffusion of P using photoresist mask, or by ionic implantation. Concentration and dimensional figures are quoted. The substrate material may be Si, Ge, or A<SP>111</SP>B<SP>v</SP> compounds, and the insulant layers may be SiO 2 , Si 3 N 4 , or Al 2 O 3 . Metallization may be vapour deposited Al followed by etching, or may use Au or Mo or composite layers. The conductivity zones may be interchanged, and the FET zones may be annular; while the devices may be enclosed in envelopes. Specification 1,354,527 is referred to.