baber/WOPTO huggingface dataset:
Patent JP-H0512802-A (JP)
Title: Recording and reproducing device for compression-encoding signal
Inventor: NAKAJIMA KOJI
IPC: G11B20/10
Filed: 1991-07-08
Abstract: PURPOSE:To reduce deterioration in signal quality caused through the repetition of compression and expanding by controlling the frame phase for encoding with the frame phase for duplication as a reference when the compression- encoding signal is duplicated for the purpose of editing, etc. CONSTITUTION:In a frame synchronization detecting part 2, the frame synchronization of a first encoding signal S1 which is reproduced in a reproducing part 1 is detected. In a decoding part 3, the encoding signal S1 is decoded in accordance with this frame synchronization, and a reproducing signal S3 is outputted. In a frame synchronization generating part 4, a second frame synchronization signal is outputted with the detected frame synchronization as a reference and at a timing in which the same sample of the reproduced signal S3 comprises one frame. In an encoding part 5, the reproduced signal S3 is encoded in accordance with this frame synchronization, and a second encoding signal S5 is outputted. The second encoding signal S5 is recorded by a recording part 6.
Patent JP-2000354633-A (JP)
Title: Production of treatment jig inserting pipe
Inventor: OHASHI ICHIJI
IPC: A61M25/00
Filed: 1999-06-14
Abstract: PROBLEM TO BE SOLVED: To produce a treatment jig inserting pipe having a good protruded part uniformly formed to the entire periphery thereof radially in good workability without requiring large-scaled equipment. SOLUTION: In a method for producing a treatment jig inserting pipe wherein a coil body 27 is fitted to the outer periphery of a flexible tube 26 and the parts positioned between the strands of the coil body 27 are outwardly protruded in a radial direction, a densely wound coil body 29 having an outer diameter slightly smaller than the inner diameter of the tube 26 is inserted in the tube 26 to be held to an arcuate state having a predetermined radius of curvature and a predetermined circumferential angle and rotated around its center line.
Patent JP-S5869025-A (JP)
Title: Manufacture of unmodified polyolefin resin molded item that can be coated
Inventor: NAITOU OUKOU
IPC: C08J7/04
Filed: 1981-10-21
Abstract: PURPOSE:To obtain easily the titled molded item that can be coated without troublesome pretreatments, by forming a thin film of a carboxyl group-containing unmodified polyolefin (to which a metal compound has been added) on a  mold cavity, and then performing injection molding. CONSTITUTION:A copolymer of an olefinic monomer (A) (e.g. ethylene, propylene, etc.) with an ethylenically unsaturated carboxylic acid (B)[e.g. (meth)acrylic acid, maleic anhydride, etc.)], or a carboxyl group-containing unmodified polyolefin (C) (having a modification degree of 0.01-10wt%)[to which a metal compound (e.g. aluminium hydroxide, etc.) may be added in an amount of 0.05-10 PHR]which will be prepared by graft polymerization of a polyolefin (e.g. a polypropylene, etc.) with constituent (B) is coated on an injection mold by air spray or other means, and after it is dried, an unmodified polypropylene resin is injected to obtain the aimed molded item whose outer surfaces are coated  with the unmodified polyolefin.
Patent JP-H0455776-A (JP)
Title: Trouble shooting device for logic integrated circuit
Inventor: OKAMOTO HIDETAKA
IPC: G01R31/28
Filed: 1990-06-25
Abstract: PURPOSE:To perform a trouble diagnosing and to shorten a diagnosing time by presuming a trouble position based on a measured result of a general-purpose tester, and collating an expected value obtained from a logic simulation LS reflecting it with the measured result. CONSTITUTION:An LSI is decided as specifications by a general-purpose tester by using a test pattern TP generated based on logic connection data DT. From this test, an output of the LSI as a measured DT is corresponded to an expected value obtained previously, and a fail list FL of how to fail at any TP is obtained if not as the specifications. A trouble position to be detected from this is set, and a logic SL is conducted after alteration of the logic connection DT. The expected value DT of the result is collated with the measured DT, and both are completely coincident if only set trouble to be detected is a cause. If not complete coincidence is obtained but the number of fails of FL is reduced, it is stored as a cause. The setting of the trouble to be detected, logic SL and collation are executed until the coincidence is obtained. According to this, estimation of the trouble is facilitated, its priority can be decided, and a diagnosing time can be shortened.
Patent JP-S6059007-A (JP)
Title: Detection of behavior of raw material charged into blast furnace
Inventor: KOYAMA TOMOYOSHI
IPC: C21B5/00
Filed: 1983-09-09
Abstract: PURPOSE:To detect the behavior of the raw material charged into a blast furnace and to enable stable operation of the blast furnace by directing and disposing the receiving part of a radiometer to and in the blast furnace and measuring the radiation energy of the microwave band emitted by the raw material. CONSTITUTION:Mounting holes 3, 4, 5 are formed circumferentially at a specified interval to the circumferential wall 2 of a blast furnace 1 in the height direction. Probes 6a, 7a are inserted into the holes 3, 4 in such a way that the top ends thereof do not project into the furnace 1 and antennas 6b, 7b are coupled thereto to apply received mu waves to mu wave radiometers 6, 7. A probe 8a is freely attachable and detachable and loosely inserted into the hole 5 so as to advance into the furnace 1 and the antenna 8a is attached thereto to apply the received mu wave to a mu wave radiometer 8. A calculator 9 detects temp., layer thickness ratio, charge descending speed, temp. distribution and grain size distribution from the signals transmitted thereto from the radiometers 6, 7, 8.
Patent JP-H0216268-A (JP)
Title: Oscillation controlling wall and oscillation controlling wall unit
Inventor: YAMADA SHUNICHI
IPC: E04H9/02
Filed: 1988-07-05
Abstract: PURPOSE:To reduce layer deformation effectively and enhance the attenuation effect of a frame by crossing the damper of an energy absorbing device over a section between the suspended column and rise column of great rigidity which are fitted on a central section between the beams of upper and lower floors, and are separated from each other at an upper section and a lower section. CONSTITUTION:An oscillation controlling wall A consists of a suspended column 1 and a rise column 2 arranged saliently between the beams G, G of the SRC of upper and lower floors and the central section between the beams, and a damper 3 crossed over a section between both the columns 1, 2. By the damper 3, horizontal oscillatory energy in the face-internal direction is absorbed. Through the damper 3, slots 3a are properly bored, and the damper is the elastic plastic damper or viscous damper of regulated rigidity and is jointed to the column 1, 2 with bolts 4 or the like.
Patent JP-S6229160-A (JP)
Title: Manufacture of semiconductor device
Inventor: HIRAIWA ATSUSHI
IPC: G11C11/401
Filed: 1985-07-31
Abstract: PURPOSE:To form in a groove an impurity-doped layer adequately controlled in terms of impurity concentration and thickness by a method wherein the combination is repeatedly applied of a process of doping a region as desired in a semiconductor substrate through a mask and another process of forming a groove within the region doped through the mask. CONSTITUTION:Impurity is selectively driven into a substrate with the intermediary of a groove-forming mask, whereafter heat treatment is accomplished for the annealing of the region damaged during the impurity-implanting process and for the lateral diffusion of the implanted impurity. A process follows of forming a groove in the substrate by the selective etching technique with the intermediary of the groove-forming mask. The work of forming the groove is divided into several similar steps, so that impurity implantation and etching are repeatedly performed. For example, a groove- forming mask composed of a silicon nitride film 14 and silicon oxide film 15 is formed on a silicon substrate 1 and As ions are driven into the substrate 1, whereafter heat treatment is accomplished for the formation of an As-implanted layer 2. A process follows wherein the reactive ion etching technique is applied for the formation of a groove. The same is repeated for the completion of a groove provided with the As-planted layer 2 in the surface of the silicon substrate 1.
Patent JP-H0332056-A (JP)
Title: Manufacture of cmis semiconductor device
Inventor: SHINPO MASAFUMI
IPC: H01L21/225
Filed: 1989-06-29
Abstract: PURPOSE:To make it high-speed by providing a gate oxide film, and stacking a polycrystalline Si film, and removing an oxide film, and accumulating a film of high melting point metal or silicide on the polycrystalline film, and forming a PMOS in a substrate and an NMOS in a p-well. CONSTITUTION:A p-well 11 is provided in an n-type Si substrate 10, and a field oxide film 5 for separation is formed, and gate oxide films 6 are accumulated on an active region 1 and the well, and then a polycrystalline Si film 20 is grown. With the diffusion source oxide film 7 as a mask, p-type impurities are selectively added to other mask 20 so as to form an n-type polycrystalline film 23 and a p-type polycrystalline film 24. Next, a silicide film 25 and the films 23 and 24 are etched en block so as to provide gate electrodes 21 and 22, consisting of polycides, and wiring. P and n polycrystalline films 123 and 124 are put in the form being connected by a silicide film 125, and n<+> source and drain regions 111 and 112 and p<+> source and drain regions 211 and 212 are provided so as to complete a CMOS consisting of an NMOS 100 and a PMOS 200. This way, the same pole gate structure can also be made by addition of a mask process of one time.
Patent JP-H0459678-A (JP)
Title: Curing of cement-based raw board
Inventor: ONO KOICHI
IPC: C04B40/00
Filed: 1990-06-26
Abstract: PURPOSE:To make possible of uniform curing of cement-based raw board without falling down nor deformation by applying a sealer on the surface of cement- based raw board, scattering sand on the surface, superposing many pieces of the board, elastically nipping from both sides, vertically standing and curing. CONSTITUTION:At first, a sealer is applied on the surface of cement-based raw board and sand is bonded to the surface of the raw board with scattering. Next, many pieces of the raw board are superposed and the many superposed cement-based raw boards are elastically nipped from the both sides by spring materials, then the cement-based raw boards are vertically stood with keeping the nipped state, thus cured. By said curing method, whitening is inhibited by the sealer and sand is bonded, then curing is uniformly performed also in outer peripheral part and inside part as a slight gap is generated between the cement-based raw boards in curing. Besides, deformation (warpage) of the cement-based raw board is able to be suppressed. Furthermore, falling down of the cement-based raw board with its own weight is able to be prevented.
Patent JP-S5957520-A (JP)
Title: Phase comparator
Inventor: OOTANI SUSUMU
IPC: H03K5/26
Filed: 1982-09-27
Abstract: PURPOSE:To attain accurately the phase comparison even if the phase difference is in the vicinity of + or -pi, by forming the phase characteristic of the phase comparator having no discontinuous point. CONSTITUTION:A reference clock generating circuit 11 frequency-divides an original clock kfc to form a reference clock having the same frequency as an input signal and the 1st and the 2nd pulse signal having a phase difference of + or -pi/2 to this reference clock are formed. Further, a phase region discriminating circuit 12 discriminates the phase region of the input signal to the phase region 0-+ or -pi of the reference clock. A selecting circuit 13 selects the 1st or the 2nd pulse signal to this discriminated output. An averaging circuit 15 receiving an output of an FF14 to which this selecting output and the input signal are applied outputs a phase mean value. This output and the output of the discriminating circuit 12 are added at an adder circuit 16. As a result, the phase characteristic having no discontinuous point at a phase difference of + or -pi is obtained. Thus, the phase comparison is performed accurately even if the phase difference is in the vicinity of + or -pi.
Patent JP-S5956688-A (JP)
Inventor: KANEKO AIJIROU
IPC: F26B17/14
Filed: 1982-09-27
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H112385-A (JP)
Title: Sound proofing, anticorrosive, and antisweating structure for gas piping
Inventor: ASANO KAZUMASA
IPC: F16L58/16
Filed: 1997-06-09
Abstract: PROBLEM TO BE SOLVED: To effectively perform sound proofing, antisweating, and anticorrosive processes for gas piping, by providing at least an adhesion water-barrier sheet layer which contains at least one of rust preventives and sound proofing agent and tightly sticks to a gas pipe, and a sound absorbing foaming products layer which is placed around the sheet layer and covers the gas pipe, and, if necessary, a water-proof protection tape layer around the sound absorbing foaming products layer. SOLUTION: The structure consists of at least an adhesion water-barrier sheet layer 2 which tightly sticks to a gas pipe, and a sound absorbing foaming products layer 3 which is placed around the sheet layer and covers the gas pipe 1. The adhesion waterbarrier sheet layer 2 contains at least one of rust preventives and sound proofing agent, and can be made as anticorrosive type, sound proofing type, or anticorrosive and sound proofing type by adjusting mixed components. The sound absorbing foaming layer 3 is composed of foaming products, assembly of foaming tips, and others. In addition, in order to protect and water-proof the adhesion water-barrier sheet layer 2 and the sound absorbing foaming products layer 3, if necessary, a water-proof protection tape layer 4 is provided around them.
Patent JP-H0217717-A (JP)
Title: Output circuit
Inventor: HAYASHI TAKAAKI
IPC: H03K17/16
Filed: 1988-07-05
Abstract: PURPOSE:To prevent overshoot and undershoot from being generated in an output wave by connecting the gate of a complementary MOS inverter from the output of a pre-buffer via resistors whose values are increased gradually. CONSTITUTION:When a signal phi1 changes from an L to an H, the output of the pre-buffer changes steeply. Thereby, a signal phi2 is propagated and delayed by the gate resistor 3 of a first complementary MOS inverter 6, and the P-type MOSFET of the first complementary MOS inverter is turned on moderately. Furthermore, since large gate resistance exists in a second complementary MOS inverter, it is delayed more than the P-type MOSFET of the first complementary MOS inverter, and is turned on more moderately. Thus, since the P-type MOSFETs are turned on sequentially, the output signal phi6 of an output inverter 8 rises moderately, therefore, no overshoot is generated. And also, at a trailing edge side, no undershoot is generated by performing the same operation.
Patent JP-H09328944-A (JP)
Title: Device of preventing door from natural opening
Inventor: MINAMI SABURO
IPC: A47B96/00
Filed: 1996-06-07
Abstract: PROBLEM TO BE SOLVED: To easily open/close biparting doors for a furniture with the operation of a handle to open one of the doors by preventing free opening of the doors even when force beyond the locking force of a locking tool is applied to the doors during earthquake or large vibration unless the handles mounted on the doors are operated for opening. SOLUTION: Both biparting doors D, D on a furniture mainframe are provided with locking tool mainbodies A, A opposing each other. Eath locking tool mainbody A has an oscillatable cam 5, a handle to oscillate the cam 5 for operation and a hook 12 engaged with the cam 5 of the locking tool mainbody A disposed in opposition. When the door D is being open with no oscillation of the cam 5 for operation, the cam 5 is engaged with the hook 12 of the locking tool mainbody disposed in opposition.
Patent JP-H1069063-A (JP)
Title: Method for correcting defect of phase inversion mask
Inventor: SEOK LEE JUN
IPC: G03F1/30
Filed: 1997-06-25
Abstract: PROBLEM TO BE SOLVED: To facilitate correction by forming a phase inversion layer thicker than the thickness at which phase inversion occurs and edging the phase inversion layer as it is in the event of the occurrence of a defect. SOLUTION: In case edging residues are produced in the phase inversion layer 22 of an inverted translucent region 27 or a defective region 28, such as the occurrence of damage in the phase inversion layer 22, arises, a second resist pattern 26 is removed and the phase inversion layer 22 of the translucent region 25 and the phase inversion layer 22 of the inverted translucent region 27 are simultaneously subjected to dry process edging. At this point, an edging stopper layer 21 is used for the end point of the edging. The defective region 28 formed in the phase inversion layer 22 of the inverted translucent region 27 is removed and simultaneously, the translucent region 25 is edged by allowing the phase inversion layer 22 to remain at a thickness (d). The phase inversion mask maintaining the thickness (d) of the phase inversion as it is from the adjacent patterns is eventually formed. Even if the defect arises in the phase inversion layer 22 of the translucent region 25, the defect is removed by simultaneously edging the exposed phase inversion layer 22 between the light shielding layer patterns 23.
Patent JP-H05332540-A (JP)
Title: High load burner
Inventor: OBARA MASATAKA
IPC: F23R3/28
Filed: 1992-06-03
Abstract: PURPOSE:To effectively cool the nozzle body of a high load burner in a state that equivalent ratio of fuel to oxidizer is approximately near '1'. CONSTITUTION:The high load burner comprises an injector body 7 so mounted as to close one end of a substantially cylindrical nozzle body 1, an igniter injection hole 9, a fuel injection hole 10 and an oxidizer injection hole 11 passed externally to substantially a center of a side end face of the nozzle body of the body 7, and a plurality of cooler injection holes 12 so passed externally as to surround nozzle body side opening group of the hole 9, 10, 11 to an end face of the body 7 to the nozzle body side end.
Patent JP-H0813732-A (JP)
Title: Structure of stair handrail turn-around position
Inventor: ISHIGE AKEMI
IPC: E04F11/18
Filed: 1994-06-27
Abstract: PURPOSE:To regulate the length of a handrail at a connecting position. CONSTITUTION:The turn-around position of a stair handrail is composed of a pair of L-shaped handrail composition members 1 and 1, and each connecting part is composed of a cylindrical member 2. While the other side cylindrical member 2b is fitted to one side cylindrical member 2a, plural engaging members 3 provided on the inner surface of one side cylindrical member 2a, and on the outer surface of the other side cylindrical member 2b in the axial direction, are engaged each other regulatable freely, so as to form the connection.
Patent JP-S6413560-A (JP)
Title: Carrier for developing agent for electrophotography
Inventor: TAKEDA MASAYUKI
IPC: G03G9/10
Filed: 1987-07-08
Abstract: PURPOSE:To give a large quantity of electric charge to a toner and to prolong the life of a developing agent by incorporating a specified amt. of fine powder of fluororesin to the toner. CONSTITUTION:More than 5wt.% fine fluororesin powder basing on the total amt. of a carrier is incorporated into the carrier contg. negatively chargeable magnetic particles dispersed therein obtd. by dispersing magnetic powder in a binder resin. If the content of the fine fluororesin powder is <5wt.%, the crushability of the carrier is inferior in the stage of production of the carrier, moreover, sufficient quantity of electric charge is not given to the carrier. The chargeability of a carrier can be controlled by the control of the amt. of fine fluororesin powder as described above, and the life of the carrier, i.e. the life of the developing agent, can be prolonged.
Patent JP-S5958720-A (JP)
Inventor: OGAWA MASASHI
IPC: H01F29/04
Filed: 1982-09-28
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S6146410-A (JP)
Title: Lubricant amount correcting device of engine
Inventor: KURIO NORIYUKI
IPC: F01M3/02
Filed: 1984-08-13
Abstract: PURPOSE:To control lubricant supplying amount precisely by making correction to control amount of a lubricant supplying means according to the magnitude of viscosity of lubricant. CONSTITUTION:A lubricant supplying system supplying lubricant to a sliding portion 16 of a piston 14 and a cylinder 15 of an engine 11 is provided. The lubricant supplying system is constructed to supply lubricant A pressurized by a pump 18 to the sliding portion 16 through a lubricant supplying pipe interposed by a solenoid valve 17. The solenoid valve 17 controls opening and closing by a supplying amount adjusting means 19 based on the output of a running condition detecting means 20 detecting opening of a throttle valve, cooling water temperature and output shaft angle etc. And in a correcting means 40, correction is made to control amount of the solenoid valve 17 set by the adjusting means 19 according to the output of a viscosity detecting means 39 for detecting viscosity of lubricant A, and supplying amount of lubricant is controlled according to the viscosity.
Patent JP-H1021034-A (JP)
Title: Numerical input device
Inventor: ARAYA ATSUSHI
IPC: G06F3/048
Filed: 1996-06-28
Abstract: PROBLEM TO BE SOLVED: To suitably perform a numerical input by GUI(Graphical User Interface). SOLUTION: An input numeral specification area including a scale and a lever is displayed on the screen of a display device 2. The lever is moved against the scale and an input numerical value is specified with the positional relation of the lever to the scale. The displayed scale can be enlarged and reduced. When the input numerical value is specified by the lever movement, it is inputted as a numerical value corresponding to the currently displayed scale. The movement of the lever and the enlargement and reduction of the scale can be performed only by operating a position device such as a mouse 3.
Patent JP-H069759-A (JP)
Title: Epoxy resin composition for laminated board
Inventor: YOSHIZAWA MASAKAZU
IPC: C08L63/00
Filed: 1992-06-26
Abstract: PURPOSE:To obtain a compsn. which gives a prepreg excellent in appearance and a laminated board excellent in moisture resistance, solder resistance, and adhesion between substrates by compounding an epoxy resin with a bisphenol novolac resin having a specified softening point. CONSTITUTION:The compsn. contains an epoxy resin and a bisphneol novolac resin having a softening point of 90 deg.C or lower. The compsn. gives a prepreg excellent in appearance and a laminated board for a printed circuit board which is excellent in moistrue resistance, adhesion between a substrate and a copper foil or between substrates themselves, and solder resistance.
Patent JP-H1023013-A (JP)
Title: Atm communication method
Inventor: KURANAGA HIROSHI
IPC: H04L12/28
Filed: 1996-06-28
Abstract: PROBLEM TO BE SOLVED: To obtain the ATM communication method in which an ATM terminal equipment is connected to an ATM network either the star or ring from. SOLUTION: An ATM terminal equipment receives an ATM cell, sent from other ATM terminal equipment (step 101), and discriminates whether or not the received ATM terminal cell is addressed to itself (step 101). As a result of the discrimination, when the received ATM terminal cell is not addressed to itself, the ATM terminal equipment sends the received ATM terminal cell without modification (step 103), and when the received ATM terminal cell is addressed to itself, the ATM terminal equipment processes the received ATM terminal cell by itself (step 104), ATM terminal equipments, adopting the ATM communication method, are applicable to both the star and ring form ATM terminal networks.