Patent SE-307382-B (SE)
Inventor: HEIGHTLEY J
IPC: H04J3/07
Filed: 1967-01-03
Abstract: 1,170,789. Pulse transmission system. WESTERN ELECTRIC CO. Inc. 22 Dec., 1966 [4 Jan., 1966], No. 57428/66. Heading H4L. In a time division multiplexing system of the type described in Specification 1,103,567, wherein, to bring a plurality of asynchronous pulse trains into synchronism, each pulse train is written into a store 11, Fig. 1, at a rate controlled by a write clock signal and is read out therefrom at the faster synchronous rate controlled by a read clock signal, and wherein a phase comparator 13 determines the phase difference between the two clock signals and indicates the instant when this phase difference has risen to such a magnitude that a stuffing pulse must stop the read out to replenish the contents of the store and wherein this stuffing pulse can only be used during specified time intervals not necessarily coincidental with said instant, said lack of coincidence can cause instability in the pulse train receiver. The present invention seeks to overcome this instability. Fig. 2 (a) shows the intervals during which a a stung command signal can be produced by generator 15 to inhibit the readout clock signals at gate 12. Fig. 2 (b) shows the output of phase comparator 13 in comparison with a threshold as measured by comparator 18. The first threshold attainment shown is coincidental with one of the stuffing intervals, such that immediate stuffing is possible. The phase comparator reacts to the loss of a read out clock pulse, by its output dropping by a fixed amount. The phase comparator output then resumes its rise and next crosses the threshold 10.5 stuffing intervals later, producing an output from comparator 18. Before a stuff command signal can issue at the next stuffing interval however, 0.5 of a stuffing interval elapses, during which time the output of the phase comparator continues to rise above the threshold. After dropping by said fixed amount at the 11th stuffing interval, the phase comparator output, starting from a higher initial level, resumes its rise, to cross the threshold simultaneously with the 21st stuffing interval. The output of the phase comparator thus has an alternating variation of its peak value. At the receiver, Fig. 3, the received pulse train at the synchronous rate is read into an elastic store 20 under the control of a synchronous rate write clock signal. A signal from the transmitter, indicating that a stuffing signal has been used causes a signal to inhibit gate 21, and stop the write in of the stuffed pulse. The store is read out at a nominally constant rate equal to the rate of the write clock signal at the transmitter to reproduce the original signal. A phase comparator 22, similar to 13, Fig. 1, compares the phase of the write clock signal (synchronous with the read clock signal of the transmitter), and the read clock signal and thus produces the output of Fig. 2(b) having the peak amplitude variation mentioned. This peak amplitude is detected by a low-pass filter 23 and used to control the frequency of oscillator 24 producing the read clock signal. Thus said amplitude variation causes a corresponding variation in the read clock signal and the rate of the final information signal. This is the instability to be cured. A signal generator 28 thus, under the control of the stuff signals, generates the inverse of the output of the phase comparator, complete with the inverse of said peak amplitude variation. This is combined with the output of the comparator such that only a D.C. component remains to produce a correct read clock signal at a constant rate. Generator 28, includes a capacitor linearly charging up at a rate proportional to the average stuffing rate until it is instantaneously discharged a fixed amount by a stuffing signal. When repeated this produces a replica of the output of the phase comparator, and an inverter is then added to produce the required signal.