baber/WOPTO huggingface dataset:
Patent JP-H04297379-A (JP)
Title: Body pillar structure
Inventor: MORI TAKEO
IPC: B62D25/20
Filed: 1991-03-26
Abstract: PURPOSE:To enable the expansion of a pillar lower part so largely without enlarging a pillar cross section as well as to maintain the rigidity of the pillar itself. CONSTITUTION:A center pillar rear part 96 is hung down as it is, and it is hit on a side frame 22 of the underframe 12 and joined together. A center pillar front part 98 is bent in a circular form in front of a vehicle in the midway, and thereby it is gradually separated from the center pillar rear part 96. In this separated state, it is hit on the side frame 22 and joined together. Since a center pillar 72 is composed of two closed sectional form members, its rigid drop will not occur at all, so high rigidity is securable and, what is more, a combination pitch with the side frame 22 is enlargeable, thus combined rigidity can be enhanced.
Patent JP-S51138379-A (JP)
Title: Scanning type electron microscope
Inventor: TODOKORO HIDEO
IPC: H01J37/28
Filed: 1975-05-26
Abstract: PURPOSE: To prevent the decrease in the magnetic field and scattered electron beam caused by eddy current by the use of metal bellows as a partition wall between a scanning coil and an electron passage. 
     COPYRIGHT: (C)1976,JPO&Japio
Patent JP-S62219201-A (JP)
Title: Rotary head type magnetic video recording and reproducing device
Inventor: KASHIMURA TAISUKE
IPC: G11B5/53
Filed: 1986-03-19
Abstract: PURPOSE:To obtain a device having immense effects on time, space and cost at the time of multiplexing of information by recording or reproducing three kinds of signals on a magnetic tape simultaneously by a VTR. CONSTITUTION:In a pattern 17, the first field of the second signal is recorded by the first head 4 having the first azimuth angle from the starting position 14 of recording to the position of termination of signal recording opposing by 180 deg., similarly in a pattern 19, the first field of the third signal is recorded by the fifth head 8 having the first azimuth angle, in a pattern 20, the second field of the first signal is recorded by the second head 5 having the second azimuth angle, in a pattern 21, the second field of the second signal is recorded by the third head 6 having the first azimuth angle and in a pattern 22, the second field of the third signal is recorded by the sixth head 9 having the second azimuth angle. Thus, three kinds of signals are recorded or reproduced simultaneously on a tape by a VTR.
Patent JP-H04212470-A (JP)
Title: Power semiconductor device and manufacture thereof
Inventor: TAKAHASHI YOSHITOMO
IPC: H01L21/8234
Filed: 1991-03-27
Abstract: PURPOSE:To enable the semiconductor chip temperature to be detected in a simple structure by a method wherein a vertical field effect transistor and a horizontal MOS transistor are provided in the same semiconductor chip and then the gate electrode and the drain electrode of the horizontal MOS transistor are connected. CONSTITUTION:A vertical field effect transistor T1 and a MOS transistor T2 are integrated into one semiconductor chip. When the gate terminal G2 and the drain terminal D2 of the horizontal MOS transistor T2 are commonly connected, the gate voltage to give specific value e.g. about 1mA to the current between drain and source can be specified as a linear function of the semiconductor chip temperature while the gradient, if (100 surface is selected, will be about -7mV/ deg.C. Accordingly, the semiconductor chip temperature can be detected by monitoring the gate voltage.
Patent JP-S60205517-A (JP)
Title: Optical fiber core and its production
Inventor: SHIODA TAKAO
IPC: C03C25/10
Filed: 1984-03-30
Abstract: PURPOSE:To decrease the rate of elongation or contraction of a partial resin coating layer and to suppress the increase in transmission loss by providing the discontinuous or partial resin coating layer between a primary coat and a secondary coating layer. CONSTITUTION:A primary coat 12 consisting of a silicone resin or Al, etc. is continuously provided over the entire surface of a bare optical fiber 11. A cylindrical partial resin coating layer 13 is provided partially and intermittently on the fiber 11 in the axial direction thereof. The layer 13 is provided to 100- 500mum thickness and 5-300mm. length in the longitudinal direction thereof and at specified or random intervals. The resin constituting the layer 13 may be either thermoplastic or thermosetting resin. A secondary coating layer 14 is provided on the layer 13. The layer 14 consists of a resin or metal, is provided continuously over the entire length of the core wire and is formed intermittently with a gap layer 15.
Patent JP-S59188394-A (JP)
Title: Operating method and device of power facility having spare machine
Inventor: YOKOTA HIROSHI
IPC: H02P5/74
Filed: 1983-04-07
Abstract: PURPOSE:To prevent the fretting wear of a bearing in a motor by alternately operating a normally using machine and a spare machine or operating the spare machine at every prescribed time for a short time. CONSTITUTION:Assume that a machine No.A is a normal use, a machine No.B is a spare use and automatic and manual switches 14A, 14B are switched to an automatic side. Since the energizing coil 20A of a time limiting reset timer in an operating circuit 10B is inserted into the secondary side of a transformer 13B and energized, a contact 21B is contacted ON or OFF. Thus, even if the water level of the exhaust water pit does not rise to H2 level for a long period, a closing coil 11BC is energized at every 6hr. Accordingly, the motor BM No.B is warmed up for one minute at every 6hr.
Patent JP-S54153563-A (JP)
Title: Logical array circuit
Inventor: MAYUMI HIROSHI
IPC: H03K3/78
Filed: 1978-05-24
Abstract: PURPOSE: To establish the PLA suitable for the programmable timing generator, in which the timing waveform can arbitrarily be controlled depending on the control input and the state of internal flip flop.  
     CONSTITUTION: The AND array forms a matrix with 8 input lines a 1  to a 8  and 8 internal lines O 1  to O 8 , each cross point is provided with a logic element, and P is programmed in conductive state. The internal lines O 1  to O 8  are extended at the input line of the OR array d and they are crossed with the output lines P 1  to P 8 . The counter a in 4-bit advances with the clock input CLK, and the output of each digit having weight of 1,2,4,8 is respectively connected to the input lines a 1  to a 8  of the AND array C. Four sets of J-K flip flop b 1  to b 4  are connected to the output lines p 1  to p 8 , being controlled with the clock input CLK, and each output Q 1  to Q 4  are taken as the output of the timing generator. 
     COPYRIGHT: (C)1979,JPO&Japio
Patent JP-S57177448-A (JP)
Title: Auxiliary machine drive speed-change device
Inventor: HOSONO TOMOHIRO
IPC: F16H59/38
Filed: 1981-04-24
Abstract: PURPOSE: To provide possibility of speed reduction at the time of drive shaft at a high revolving speed with the speed change ratio changed automatically in a device for apeed change of auxiliary machine drive by improving the constitution of the planetary gear speed-change device which is to couple the auxiliary machine drive pullery with the input member on the engine drive shaft.  
     CONSTITUTION: This auxiliary machine drive speed-changer 1 is provided with  an input member 3 fitted on the drive shaft 2, a hub 5 fixed at the engine block  4, a hollow drum type auxiliary machine drive pulley 6 born by said members  3, 5, a planetary gear speed-changer 7 housed in the pulley 6 and coupled with  the parts 3, 5, 6, and a governor valve 8 fitted in the input member 3. The  plantary gear speed changer 7 is composed of a planetary gearing set 9, a one- way clutch 10, and a clutch 12 having an oil-hydraulic servo 11. The pressure of  oil fed to the oil-hydraulic servo 11 is so arranged as to be controlled by the  centrifugal force, i.e. through the governor valve 8 which is displaced in compliance with the number of revolutions of the drive shaft 2. 
     COPYRIGHT: (C)1982,JPO&Japio
Patent JP-S54153515-A (JP)
Title: Coder
Inventor: OKANO HIROSUKE
IPC: H04N19/00
Filed: 1978-05-24
Abstract: PURPOSE: To restore the smooth picture, by making dot-separation for the binarized signal into the video element piece of 1/2 n  of video element unit, and coding the information of 0 or 1 and the binary number of n-digit showing the length of the information as (1+n)bits signal.  
     CONSTITUTION: The two dimensional information inputted from the input terminal 1 is converted into binary signal at the binary circuit 4, it is further sampled and converted into parallel signal with the strobe generation circuit 7. The detection of the number of video elements at the discrimination circuit 8 discriminates the length of the signal of 0 or 1 every video element. This is represented in the binary number of n-bit and is picked up from the output terminal 9 with the data of 0 or 1. 
     COPYRIGHT: (C)1979,JPO&Japio
Patent JP-S53148487-A (JP)
Title: Measuring device for moment of inertia
Inventor: YOSHIMURA TSUNEHIKO
IPC: G01M1/10
Filed: 1977-05-31
Abstract: PURPOSE: To make possible the measurement of the moment of inertia of a rotating body of an intricate shape by mounting the body to be measured to a rotating body, winding a yarn to the rotating body, suspending a slit of stripe pattern to the yarn, rotating the body and optically measuring the transmission of the slit. 
     COPYRIGHT: (C)1978,JPO&Japio
Patent JP-S56159742-A (JP)
Title: Priority level controller
Inventor: KIKUCHI KAZUHIKO
IPC: G06F13/36
Filed: 1980-05-13
Abstract: PURPOSE:To set a priority level freely by setting a parameter by writing the parameter in a rewritable register group. CONSTITUTION:In a register group, values which correspond to priority levels of processing request signals 3-0, 3-1-3-n are written. When the signal 3-0 has priority level ''1'' and turns on, only an ouput 4-00 of a register 2-0 comes to ''1''. Only a logical circuit 5-00, therefore, has level ''1'' and a signal appears at the 7-0 of a program control part 8 via an OR circuit 6-0. When the 3-1 has priority level ''3'', the signal appears at a 7-2. Thus, priority levels of signals 3-0-3-n are determined according to parameter values written in register grops 2-0, 2-1-2-n.
Patent JP-H08265348-A (JP)
Title: Fault handling communication controller
Inventor: KANEDA NORIKO
IPC: H04L69/40
Filed: 1995-03-22
Abstract: PURPOSE: To provide a fault handling communication controller which is capable of recognizing the generation of a fault without performing useless communication when the fault of a terminal is generated in a network. CONSTITUTION: A fault generation detection part 108 and a fault restoration detection part 109 detect that a fault is generated or restored at the inside of their terminals. A fault frame assembling part 107 assembles the frame on the fault based on the detection result and subsequently, a communication part 102 performs the simultaneous multi-address of the frame to a transmission line. Each terminal knowing the generation of the fault at other terminal by a fault frame decoding part 110 suppresses the transmission of the frame to the faulty terminal before the fault is restored.
Patent JP-S57175927-A (JP)
Title: Light splitting device for photometry
Inventor: OOTAKA KEIJI
IPC: G01J1/04
Filed: 1981-04-24
Abstract: PURPOSE:To enhance the light utilization efficiency by changing the inclinations of minute submirrors in a minute submirror group, which guides the split luminous flux into a light receiving part with respect to the split luminous flux, depending on the positions on said minute sumirrors. CONSTITUTION:The light splitting device comprises a main mirror 1 such as a reflecting mirror which splits the luminous flux in amplitude or a reflecting mirror wherein a transparent part and a reflecting part are mixed and which splits the luminous flux in area and the submirror group 2 which is provided on the back surface of the main mirror 1 and has the many minute submirrors. The luminous flux, which is emitted from a photographing lens system 3 in parallel with an optical axis, is reflected by the semitransparent surface of the main mirror 1. The most of the luminous flux is directed to a finder system. The luminous flux transmitted through the main mirror is reflected by the minute submirror group 2 at the back surface of the main mirror 1 and guided to the light receiving element 8. The inclination of each minute sumirror in the minute submirror group 2 with respect to the split luminous flux is changed depending on the position where it is located.
Patent JP-H03263333-A (JP)
Title: Semiconductor device
Inventor: WATASE MANABU
IPC: H01L29/812
Filed: 1990-03-13
Abstract: PURPOSE:To reduce an inductance component created by a wiring and the variation of the inductance by a method wherein respective I/O electrodes on a semiconductor chip are electrically connected to the respective electrode terminals of a header through through-hole which are so formed as to correspond to the respective electrodes of the chip and thick plating layers which fill the through-holes. CONSTITUTION:Source electrode 2, gate electrode 3 and drain electrode 4 on a semiconductor chip are linked with the rear of a semiconductor substrate 1 through through-holes 5 formed in the semiconductor substrate 1 and thick plating layer 6. When the chip is mounted on a microwave header 8, dielectric substrates 10 are formed on the sides of the I/O electrodes 12 and 13 of the header 8 and metallized patterns 11 are formed on the surfaces of the dielectric substrates 10 to form an impedance matching circuit. Not only the source electrode 2 but also the gate electrode 3 and the drain electrode 4 are electrically connected to the respective electrode terminals 12 and 13 of the header 8 with the through-holes 5 and the thick plating layers 6 filling the holes 5. therefore, the parasitic inductance component of a wiring can be substantially suppressed and the variation of the inductance can also be reduced.
Patent JP-S63229447-A (JP)
Title: Exposing method and its device
Inventor: YAMAZAWA TOSHIHARU
IPC: H01L21/02
Filed: 1987-03-18
Abstract: PURPOSE:To improve a throughput by making an exposure shot for main patterns and a pattern for discrimination at the same time without making exposure shots for the main pattern and patterns for discrimination individually. CONSTITUTION:When plural main patterns which are sectioned from one another are exposed by making an exposure shot for a similar pattern on a large-sized substrate in order, the patterns for discrimination are arranged within an effective exposure range which can be exposed by one exposure shot, and the large- sized substrate is exposed to the patterns for discrimination at the same time together with the main patterns by respective exposure shots. For example, the large-sized substrate 14 is installed on an XY stage 15 and then moved and positioned at a 1st shot position. In this state, a main pattern A set at a reticle 11 and a discrimination pattern (B-1) printed on a film 18 for discrimination are exposed by a lighting optical system 12 through a projecting optical system 13. The main pattern A and discrimination pattern (B-1) corresponding to it are exposed by the exposure shot at the same time to the 1st shot position of the large-sized substrate 14 through said operation. Consequently, the throughput is improved.
Patent JP-S60226879-A (JP)
Inventor: ETSUIO BOMUBARUDETSURI
IPC: C07D457/02
Filed: 1985-03-27
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S61224347-A (JP)
Title: Semiconductor integrated circuit device
Inventor: WATANABE YOJI
IPC: G05F1/46
Filed: 1985-03-29
Abstract: PURPOSE:To prevent the erroneous operation of the title device by a method wherein the internal circuit is driven by voltage to be impressed with the breakdown voltage between the drain and source of the FET equal to the minimum channel length in the circuit as the reference. CONSTITUTION:The power source terminal 11 of an internal circuit main body 10 is connected to the output of the voltage transfer circuit consisting of a reference voltage generating circuit 20, an error amplifier 30 and a control element 40; and the potential thereof is nearly equal to the output Vref of the circuit 20. In the circuit 20, an N-type FET 20 is formed equal to the minimum channel length in the main body 10, the drain 25 is connected to a power source 50 through a load 23, the gate is connected to a gate voltage generating circuit 24 and the source is earthed. The potential V2 of the drain 25 becomes nearly equal to the breakdown voltage between the drain and source of the FET and is dropped to Vref by stepping down, the Vref is fed to the error amplifier 30 and V2>Vref C*cc is used as the internal supply voltage. Hereby, the V*cc is constantly held, the erroneous operation of the main body 10, which is caused by the fluctuations of the external power source, is prevented, and moreover, the V*cc can be set in the optimum voltage, whereto the reliability and operating characteristic of the element in the main body 10 are added.
Patent JP-S61223305-A (JP)
Title: Actuator
Inventor: HOSODA YUJI
IPC: F15B15/10
Filed: 1985-03-29
Abstract: PURPOSE:To avoid the need of an air pressure source outside and reduce the dimension and weight by arranging, in an actuator, an inner-pressure control means for controlling the inner pressure by the charged gas in the actuator. CONSTITUTION:The captioned actuator extends and contracts in the axial direction through the variation of the expanded diameter of a flexible cylindrical body 1 made of rubber, etc. The gas such as hydrogen gas is charged into the chamber 6 of the actuator. Inside the chamber 6, an inner-pressure control means 9 such as the occlusion material which absorbs and discharges the gas through the temperature variation is arranged. Said inner-pressure control means 9 is heating/cooling-controlled from outside in the utilization of heat pipes, Peltier effect, laser beam, etc., and the diameter of the flexible cylindrical body 1 is increased and reduced by absorbing and discharging the gas.
Patent JP-S63228567-A (JP)
Title: Alkaline battery
Inventor: YASUDA HIDEO
IPC: H01M4/52
Filed: 1987-03-17
Abstract: PURPOSE:To prevent electric potention from varying to the noble direction by repetition of charging and discharging, by containing a hydroxide or an oxide of chromium, silver, copper, iron, cerium, mercury, zinc or cadmium in an active material mainly composed of a hydroxide of nickel and cobalt. CONSTITUTION:A positive plate, containing a hydroxide and an oxide of chromium, silver, mercury, cerium, zinc, calcium or cadmium, is used for an active material mainly composed of a hydroxide whose content rate of cobalt against nickel and cobalt is 15-85 wt%. This positive plate is excellent in stability of electric potential with charging and discharging cycles, and even if charging and discharging are repeated, both charging and discharging quantities of electricity and residual capacity in a battery can be easily found out by a voltage variation, while discharge capacity increases. In addition, such operation as detecting voltage and thereby performing the charging control comes easy, thus confidence accuracy is improved.
Patent JP-S6465113-A (JP)
Title: Reaction injection molding
Inventor: SAITO JOICHI
IPC: C08G18/65
Filed: 1988-03-18
Abstract: PURPOSE:To obtain a molded product which is excellent in heat resistance and elongation characteristics, by using a specified diaminobenzene derivative as a chain extender in the reaction injection molding of a high-MW active hydrogen compd. and a polyisocyanate. CONSTITUTION:A chain extender is prepared, which comprises of diaminobenzene derivative (e.g., 3,5-diamino-4-methyl-nitrobenzene) having an electrophilic group selected from among a halogen atom., a nitro group, a trihalomethyl group, a cyano group, an alkoxycarbonyl group, an N-alkyl-substd. carbamoyl group and an alkoxysulfonyl group and further having, if necessary, an alkyl group. A starting material comprising said chain extender, a high-MW active hydrogen compd. and optionally added another chain extender, catalyst, foaming agent, etc. and another starting material comprising a polyisocyanate compd. (e.g., tolylene diisocyanate) are submitted to reaction injection molding to give a synthetic resin molding.
Patent JP-S54155053-A (JP)
Title: Method of and device for forming image
Inventor: SHIMIZU SHIYOUICHI
IPC: G03G21/00
Filed: 1978-05-26
Abstract: PURPOSE:To simplify and reduce the size of the configuration of image forming sequence control by completing other interrupt process on the midway of completing the CPU control process to thereby reopen a process interrupted on the basis of the stored content of a memory. CONSTITUTION:Program responsive to set mode responsive to paper size and copying number or the like is read from the ROM in a CPU through a matrix circuit 50 in response to the operation of numerical keys to thereby conduct predetermined processing in the CPU. Thus, copying operation is conducted on the basis of necessary sequence control signals A, B, E,... of charger transformer, paper feed rollers, optical system, developing unit, exposure lamp, copying number counter and photosensitive drum rotation of the like. When an interrupt is conducted by lower stage numerical keys or the like on the way, the process control is interrupted through the CPU and predetermined memory is stored in the RAM of the CPU. Copying operation responsive to the interrupt is conducted. When this operation is completed, the CPU reopens the interrupted mode on the basis of the stored content  of the RAM to simplify and reduce the configuration of the image forming sequence  controller.
Patent JP-H05264677-A (JP)
Title: Vector control device for induction motor
IPC: H02P21/36
Filed: 1992-03-19
Abstract: PURPOSE:To automatically measure and set a primary resistance which is the motor constant of an induction motor and a leak inductance with high precision. CONSTITUTION:A magnetic flux arithmetic part 116 has a first compensating circuit for conducting a predetermined secondary circuit time constant, when an induction motor is in mechanically stopped state, and changing the leak inductance compensating value of the induction motor until the phase of a motor magnetic flux vector calculated from the current and voltage applied to the induction motor is equal to the phase of a current model magnetic flux vector. Further, it has a second compensating circuit for changing the primary resistance compensating value of the induction motor until the amplitude value of the motor magnetic flux vector is equal to the amplitude value of the current model magnetic flux vector generated by a magnetic flux command arithmetic part 103.
Patent JP-H11221559-A (JP)
Title: Scum remover
Inventor: FUJIWARA MITSUHIRO
IPC: C02F1/40
Filed: 1998-02-05
Abstract: PROBLEM TO BE SOLVED: To easily conduct post-treatment by allowing a fixed small amt. of water to flow in at all times even if the water level is fluctuated. SOLUTION: This scum remover is provided with a cylindrical skiimer pipe 5 with both the longitudinal ends supported and capable of being rotated by a rotating means. A clutch mechanism 50 is furnished to the transmission system of the rotating means so that the skimmer pipe 5 is allowed to follow the water level only when reset. In this case, the clutch mechanism 50 is engaged with the clutch shaft 38 projecting from the skimmer pipe 5 by the operation of the rotating means and disengaged from the clutch shaft by the resetting of the rotating means.
Patent JP-S52146668-A (JP)
Title: Small electronic apparatus with calendar functions
Inventor: EBIHARA HEIHACHIROU
IPC: G09D3/12
Filed: 1976-06-01
Abstract: PURPOSE:To obtain information concerning unknown calendar and increase the speed of calendar operation by operating only year data part and day data part then operating month, date and day.