Patent GB-953220-A (GB)
Title: A storage device for registering mutilated electrical pulses
IPC: G11C19/04
Filed: 1961-02-09
Abstract: 953,220. Magnetic storage matrices. STANDARD TELEPHONES & CABLES Ltd. Feb. 9, 1961 [Feb. 9, 1960], No. 4868/61. Heading H3B. A metering pulse on a line switches a magnetic core particular to that line in a matrix of such cores, the cores being read out cyclically at a speed such that each core is interrogated at least twice during the occurrence of a metering pulse, there being an arrangement to obviate the spurious effects of mutilated metering pulses involving a second matrix having a core for each line; the detection of a metering pulse input to one of the cores of the first matrix at one interrogation causing the corresponding core of the second matrix to be switched and to stay switched during subsequent interrogations until the metering pulse is found to have ceased and no longer provides input to the core of the first matrix whereupon the states of these cores in the matrices signals the reception of a valid metering pulse and causes the event to be registered in a meter fee store. As shown in Fig. 1 the first matrix is M1 and the second matrix is M2. Both matrices are interrogated cyclically from a common source A and the output produced at each interrogation is passed by way of amplifierdiscriminators L1, L2, to staticizing toggles F1, F2, which enables the information read out in the first half of an interrogation to condition the automatic re-write that occurs in the second half. In the absence of an input the cores of M1 are cycled round their hysteresis loops by the read-out and re-write pulses at each interrogation and this also occurs with the cores of M2. If a core of M1 is subject to an input metering pulse interrogation produces no significant output but the interrogation at the same time of the corresponding core in M2 does produce an output. The lack of an output from toggle F1, however, causes a control circuit V to mark a gate J2 which inhibits the automatic re-write in the second half of the interrogation of the core in M2. At the next interrogation, therefore, providing the metering pulse is still present, as it must be if it is genuine, neither toggle F1 nor F2 provide an output and will continue in these relative states during all subsequent interrogations until the metering pulse ends and the core in M1 is switched again. When this interrogation occurs toggle F1 gives output while toggle F2 does not and the control circuit V detects this condition as a signal that a metering pulse has been received and should be stored in a register R. When the register R is ready to accept the pulse it accepts the F1 on, F2 off, condition at the next succeeding interrogation and signals reception to circuit V which removes the inhibition on re-write effected by J2 on the core in M2. As a further guard a third matrix M3 with associated circuitry J3, L3, F3, may be provided such that when a core of M1 is subject to a metering input the state of F1 off causes the inhibition of re-write of the core in M2 so that in the next interrogation both F1 and F2 are off and cause the inhibition of automatic re-write of the core in M3. In the third interrogation after the detection of a metering pulse, therefore, the toggle F3 will give no output. The states F1 on, F3 off, will then signal registration of a pulse in the register R.