baber/WOPTO huggingface dataset:
Patent TW-411450-B (TW)
Title: Biaxially oriented polyester film and magnetic recording media containing the film as the base
Inventor: OGAWA TATSUYA
IPC: G11B5/73
Filed: 1998-10-28
Granted: 2000-11-11
Abstract: A biaxially oriented polyester film for a magnetic recording medium, which comprises more than 0.0005 wt% and less than 0.001 wt% of crosslinked polymer particles A having an average particle diameter dA of 0.8 to 1.6 mu m, 0.1 to 0.8 wt% of inert particles B having an average particle diameter dB of 0.4 to 0.8 mu m and 0.05 to 1.0 wt% of inert inorganic particles C having both an average particle diameter dC of 0.01 to 0.3 mu m and a Mohs hardness of 7 or more, wherein the ratio (dA/dB) of the average particle diameter of the crosslinked polymer particles A to that of the inert inorganic particles B is 1.5 to 3 and the ratio (SRz/SRa) of the three-dimensional 10-point average roughness SRz to the three-dimensional center plane average roughness Sra of the film surface is 20 or more. This film has excellent winding property, abrasion resistance and travel durability, can be produced at a low production cost and is especially useful as a base film for a magnetic recording medium for a high-speed duplicator.
Patent TW-408453-B (TW)
Title: Package for semiconductor power device and method for assembling the same
Inventor: SHIMIZU TOSHIO
IPC: H01L23/31
Filed: 1998-12-07
Granted: 2000-10-11
Abstract: A package for a semiconductor power device which comprises: a conductive bottom plate as a heat sink; an insulating substrate mounted on the bottom plate; a copper film formed on the insulating substrate to expose a peripheral region of the insulating substrate; semiconductor chips disposed on the copper film; a container arranged on the bottom plate, surrounding the insulating substrate; an external terminal supported through the container and connected electrically with the semiconductor chips; and a silicone gel filled within the container, wherein a solidified insulating material is disposed on an outer edge region of the copper film and the peripheral region of the insulating substrate. Thus, reducing an electric field across the interface and making it difficult to cause a creeping discharge. A notch is formed in the bottom plate, and the notch is filled with a high heat conductive resin. The notch is located outwardly apart from a region where the semiconductor chips are mounted. Thus, a creeping breakdown is prevented without sacrificing a heat radiation effect of the bottom plate. Using a waterproof and flexible film to seal an inlet for filling the silicone gel into the case, a heat stress caused by an expansion and a shrinkage of the silicone gel in response to a variation of temperatures is reduced, and it prevents the silicone gel from being wet. A thermoplastic insulating resin is employed instead of the silicone gel.
Patent TW-513447-B (TW)
Title: Ultra high solids vinyl acetate-ethylene and vinyl acetate homopolymer emulsions
Inventor: WALKER JAMES L
IPC: C09J151/00
Filed: 1998-12-10
Granted: 2002-12-11
Abstract: A process for the production of ethylene vinyl acetate based polymer emulsions having solids levels greater than about 65% by weight comprising the steps of: (i) providing a polymer seed selected from the group consisting of vinyl acetate, ethylene vinyl acetate, acrylic, vinyl-acrylic and styrene (meth) acrylic having a particle size of 0.15 to 2.5 microns; (ii) polymerizing vinyl acetate and ethylene monomers in the presence of 5 to 15% by weight of the final emulsion of said polymer seed; said polymerization of step (ii) being carried out in the presence of a surfactant system comprising polyvinyl alcohol and a nonionic emulsifier.
Patent TW-437069-B (TW)
Title: Method for fabricating for DRAM device
Inventor: HEO YEON-CHEOL
IPC: H01L27/108
Filed: 1998-12-28
Granted: 2001-05-28
Abstract: Disclosed is a method for fabricating a dynamic random access memory ""DRAM"" that the parasitic capacitance raised between the capacitor and the bit line, is fundamentally prevenced since the capacitor and the bit line are formed on the opposite side of the silicon layer respectively. In the DRAM, there are wirings formed in each layer and those wirings are in contact with each other, therefore the conductive layer patterns formed on the upper and on the lower of the silicon substrate, are connected each other. The method for forming DRAM according to the present invention includes the steps of: providing a silicon-on-insulator substrate that a first silicon layer, a buried oxide film and a second silicon layer are stacked; forming an isolation film in the second silicon layer; forming a first trench and a second trench in the second silicon layer and in the isolation film respectively; forming gate electrodes in both sidewalls of the first and the second trenches; forming a first impurity region and a second impurity region in the upper surface of both sides of the first trench and a third impurity region beneath the first trench, and a fourth impurity region beneath the second trench by injecting impurity ions into the second layer; forming a first intermediate insulating layer on the entire substrate; forming a first, a second and a third contact holes in the first intermediate insulating layer so as to expose the first, the second and the fourth impurity regions respectively; forming a capacitor which is in contact with the first and the second impurity regions via the first and the second contact holes, and a first wiring which is in contact with the fourth impurity region via the third contact hole, on the first intermediate insulating layer; forming a second intermediate insulating layer to cover the capacitor and the first wiring on the first intermediate insulating layer; forming a fourth contact hole which exposes the first wiring, in the second intermediate insulating layer; forming a first conductive layer pattern including a second wiring which is in contact with the first wiring via the fourth contact hole, on the second intermediate insulating layer; bonding a dummy substrate to the third intermediate insulating layer; remove the first silicon layer; forming a fifth and a sixth contact holes in the buried oxide film so as to expose the third and the fourth impurity regions respectively; forming a bit line and a third wiring connected to the third and the fourth impurity regions via the fifth and the sixth contact holes respectively, on the buried oxide film; forming a fourth intermediate insulating layer on the bit line, the third wiring and the buried oxide film; forming a seventh contact holes which exposes the third wiring in the fourth intermediate insulating layer; and forming a second conductive layer pattern including the fourth wiring which is contact with the third wiring via the seventh contact hole, on the fourth intermediate insulating layer.
Patent TW-471025-B (TW)
Title: Mask for mask ROM process
Inventor: CHEN JIN-LUNG
IPC: H01L21/027
Filed: 1999-01-15
Granted: 2002-01-01
Abstract: This invention provides a mask for mask read only memory (ROM) process, which combines conventional steps of mask for forming pad opening and mask for code-writing opening. This can save a lithography etching step and thus simplify processes and improve efficiency. Moreover, it can avoid barrier layer erosion due to residual etchant from etching step if the deposited barrier layer has to wait for the making of coding mask.
Patent TW-424244-B (TW)
Title: Printed wiring board having highly reliably via hole and process for forming via hole
Inventor: GAKU MORIO
IPC: H05K3/42
Filed: 1999-06-02
Granted: 2001-03-01
Abstract: Disclosed are a printed wiring board having micro-via holes highly reliable for conduction and a method of making the micro-via hole by providing a coating or sheet of an organic substance containing 3 to 97 % by volume of at least one selected from a metal compound powder, a carbon powder or a metal powder having a melting point of at least 900 DEG C and a bond energy of at least 300 kJ/mol on a copper foil as an outermost layer of a copper-clad laminate having at least two copper layers, or providing a coating or sheet of the same after oxidizing a copper foil as an outermost layer, irradiating the coating or sheet with a carbon dioxide gas laser at an output of 20 to 60 mJ/pulse, thereby removing a micro-via-hole-forming portion of at least the copper foil as the outermost layer, then irradiating micro-via-hole-forming portions of the remaining layers with a carbon dioxide gas laser at an output of 5 to 35 mJ/pulse to make a micro-via hole which does not penetrate through the copper foil in a bottom of the micro-via hole, and electrically connecting the copper foil as the outermost layer and the copper foil in the bottom of the micro-via hole with a metal plating or an electrically conductive coating composition.
Patent TW-400439-B (TW)
Title: Color separation prism assembly and method for making same
Inventor: BRYARS BRETT J
IPC: G02B27/14
Filed: 1999-06-11
Granted: 2000-08-01
Abstract: A color separation device useful in information display systems is assembled from three prisms in an arrangement that provides for air equivalent thickness adjustment for each color. The air equivalent thickness adjustment provides for the correction of deviations in any of the three prisms, as well as providing a method to correct for the chromatic aberration arising from other optical elements in the information display system. The color separation device improves image quality and provides opportunities to lower the display system cost by using low tolerance components and/or plastic optical components normally having a high chromatic aberration.
Patent TW-421697-B (TW)
Title: Corrosion-resisting screw with cutting insert
Inventor: GERHARD ANTON
IPC: F16B25/00
Filed: 1999-11-11
Granted: 2001-02-11
Abstract: A corrosion-resisting, self-tapping screw (1), in particular a concrete screw, to be driven into a bore, which has a wall, comprises a substantially cylindrical core (2) of corrosion-resisting metal with a central longitudinal axis (8); a thread (5), which is integral with the core (2); and at least one cutting element (9), which has at least one cutting head (12) for cutting engagement with the wall of the bore; the at least one cutting element (9) being inserted in the core (2), tightly joined thereto and consisting of a hardened metal, and the at least one cutting head (12) being arranged in the thread (5).
Patent TW-448573-B (TW)
Title: High voltage device structure and the manufacturing method thereof
Inventor: DUNG MING-TZUNG
IPC: H01L27/115
Filed: 1999-12-29
Granted: 2001-08-01
Abstract: A high voltage device comprises: a substrate of the first conductive type in which the substrate comprises a first well region of the first conductive type, a second well region of the second conductive type, and the second well region has no connection with the first well region; the surface of the second well region has a plurality of field oxide layers; the shallow trench isolation located between the field oxide layers and comprising a second doped region of the first conductive type under the shallow trench isolation; a third well region of the first conductive type, located in the first well region; a gate structure located on the substrate between the first and the second well regions, extending and covering part of the first well region, the third well region and the field oxide layer; furthermore, comprising a source region of the second conductive type in the third well region on one side of the gate structure, and a drain region of the second conductive type in the second well region exposed beside the field oxide layer on the other side of the gate structure.
Patent TW-502520-B (TW)
Title: Backup memory managing device, backup memory managing method, game machine, and recorded medium
Inventor: TSUCHIYA KOJI
IPC: A63F13/95
Filed: 1999-12-28
Granted: 2002-09-11
Abstract: A backup memory managing technique is provided for detecting unauthorized copying of data in a backup memory and imposes an appropriate penalty. A backup memory managing device has data storage means (10). The data storage means (10) judges whether or not parameter data which has been stored in a backup memory (3) is proper when created and updated parameter data is stored in the backup memory (3), overwrites the created and updated parameter data over the parameter data stored in the backup memory (3) if the parameter data stored is judged proper, and executes a predetermined special processing if the parameter data stored is judged improper. The special processing can be, for example, an imposition of a penalty in a game.
Patent TW-457693-B (TW)
Title: A method of forming top metal contact to antifuse background of the invention
Inventor: PIEW SAY GUT
IPC: H01L23/62
Filed: 2000-01-05
Granted: 2001-10-01
Abstract: A method for fabricating a self-aligned antifuse cell is described. An antifuse is provided overlying a metal plug in an insulating layer on a semiconductor substrate. A dielectric layer is deposited overlying the antifuse. The dielectric layer is etched to form dielectric spacers on the sidewalls of the antifuse. A top metal layer is deposited overlying the antifuse and dielectric spacers and patterned to complete the antifuse cell in an integrated circuit device.
Patent TW-550714-B (TW)
Title: Bonding material, semiconductor device, method of manufacturing semiconductor device, circuit board and electronic device
Inventor: HASHIMOTO NOBUAKI
IPC: H01L23/31
Filed: 2000-02-14
Granted: 2003-09-01
Abstract: This invention provides a bonding material, a semiconductor device, a method of manufacturing semiconductor device, a circuit board and an electronic device. A semiconductor device (1) comprises a semiconductor chip (10), a substrate (20) with wiring patterns (22), and bonding material (30) that connects the semiconductor chip (10) and the wiring patterns (22) electrically. The bonding material (30) has a two-layer structure which includes a first layer (32) having a first resin base and opposed to the semiconductor chip (10) and a second layer (34) having a second resin base and opposed to the substrate (20). The first resin and the second resin have different physical properties such as thermal expansion coefficient.
Patent TW-457433-B (TW)
Title: I/O page kill definition for improved DMA and L1/L2 cache performance
Inventor: ANDERSON GARY DEAN
IPC: G06F12/08
Filed: 2000-02-29
Granted: 2001-10-01
Abstract: A special ""I/O"" page, is defined as having a large size (e.g., 4K bytes), but with distinctive cache line characteristics. For DMA reads, the first cache line in the I/O page may be accessed, by a PCI Host Bridge, as a cacheable read and all other lines are non-cacheable access (DMA Read with no intent to cache). For DMA writes, the PCI Host Bridge accesses all cache lines as cacheable. The PCI host bridge maintains a cache snoop granularity of the I/O page size for data, which means that is the host bridge detects a store (invalidate) type system bus operation on any cache line within an I/O page, cached data within that page is invalidated (L1/L2 caches continue to treat all cache lines in this page as cacheable. By defining the first line as cacheable, only one cache line need be invalidated on the system bus by the L1/L2 cache in order to cause invalidation of the whole page of data in the PCI host bridge. All stores to the other cache lines in the I/O Page can occur directly in the L1/L2 cache without system bus operations, since these lines have been left in the ""modified"" state in the L1/L2 cache.
Patent TW-475315-B (TW)
Title: Vibration actuator having three vibration modes
Inventor: TESHIMA MAKOTO
IPC: B06B1/04
Filed: 2000-04-11
Granted: 2002-02-01
Abstract: In a vibration actuator using a magnetic circuit device (14), a supporting arrangement (23) elastically supports the magnetic circuit device. A coil (17) is inserted into a magnetic gap (15) of the magnetic circuit device and is supported by a vibration plate (19). The vibration actuator has a first operation mode in which the magnetic circuit device mainly vibrates to transmit vibration through the vibration plate to the outside, a second vibration mode in which the coil mainly vibrates to produce a buzzer sound through the vibration plate, and a third vibration mode in which the magnetic circuit device and the coil mainly vibrate to produce a sound corresponding to a speech through the vibration plate.
Patent TW-442311-B (TW)
Title: Manufacture of skating shoe skates
Inventor: CHEN CHING-CHI
IPC: A63C1/30
Filed: 2000-04-12
Granted: 2001-06-23
Abstract: Discloses is a manufacture of skating shoe skates, comprising the steps of: (a) pre-making a skate body made of a light material, and forming an elongated slit along the bottom edge of the bottom end of each of the opposing sides of the skate body; (b) retaining a blade body made of an abrasive-resistant material to each of the elongated slit; and (c) polishing the skate bodies and the blade bodies such that the skate body includes two blade ends formed by the two blade bodies.
Patent TW-465052-B (TW)
Title: IC die power connection using canted coil spring
Inventor: MORRIS TERREL L
IPC: H01L23/48
Filed: 2000-05-10
Granted: 2001-11-21
Abstract: A semiconductor device assembly (10) according to the present invention may comprises a semiconductor die (12) having at least one contact pad (14) thereon and a package substrate (16) having at least one lead pad (20) thereon. The package substrate (16) is sized to receive the semiconductor die (12) so that the contact pad (14) on the semiconductor die (12) is substantially aligned with the lead pad (20) on the package substrate (16) when the semiconductor die (12) is positioned on the package substrate (16). A coil spring (22) is positioned between the contact pad (14) on the semiconductor die (12) and the lead pad (20) on the package substrate (16) so that the axis (30) of the coil spring (22) is substantially parallel to the contact pad (14) contained on the semiconductor die (12) and the lead pad (20) contained on the package substrate (16).
Patent TW-463518-B (TW)
Title: Earphone
Inventor: NAGENO KOJI
IPC: H04R25/00
Filed: 2000-05-25
Granted: 2001-11-11
Abstract: Can obtain a satisfactory feeling of mounting the earphone regardless of the user. Can also achieve listening to reproduced acoustics in satisfactory sound quality. An elastic auricle-mounting member is provided surrounding a sound-discharging opening formed on a housing that accommodates a speaker unit. A space formed by the drum membrane, the speaker unit and the auricle-mounting member when a user wears the earphone on the auricle is communicated to the outside of the earphone via a ventilation resistor. Thus, it is possible to prevent deterioration in the sound quality attributable to pooled indistinct sound generated when the space encircled by the drum membrane, the speaker unit and the auricle-mounting member has been sealed.
Patent TW-I274589-B (TW)
Title: Porous drug matrices and methods of manufacture thereof
Inventor: CHICKERING DONALD E
IPC: A61K9/20
Filed: 2000-05-29
Granted: 2007-03-01
Abstract: Drugs, especially low aqueous solubility drugs, are provided in a porous matrix form, preferably microparticles, which enhances dissolution of the drug in aqueous media. The drug matrices preferably are made using a process that includes (i) dissolving a drug, preferably a drug having low aqueous solubility, in a volatile solvent to form a drug solution, (ii) combining at least one pore forming agent with the drug solution to form an emulsion, suspension, or second solution, and (iii) removing the volatile solvent and pore forming agent from the emulsion, suspension, or second solution to yield the porous matrix of drug. The pore forming agent can be either a volatile liquid that is immiscible with the drug solvent or a volatile solid compound, preferably a volatile salt. In a preferred embodiment, spray drying is used to remove the solvents and the pore forming agent. The resulting porous matrix has a faster rate of dissolution following administration to a patient, as compared to non-porous matrix forms of the drug. In a preferred embodiment, microparticles of the porous drug matrix are reconstituted with an aqueous medium and administered parenterally, or processed using standard techniques into tablets or capsules for oral administration. Paclitaxel or docetaxel can be provided in a porous matrix form, which allows the drug to be formulated without solubilizing agents and administered as a bolus.
Patent TW-550532-B (TW)
Title: Liquid crystal display device
Inventor: ITO SHIGERU
IPC: G09G3/20
Filed: 2000-06-27
Granted: 2003-09-01
Abstract: The present invention relates to a liquid crystal display device, and, more particularly, to a technology applicable to image signal line driving (drain driver) of a liquid crystal display device which is capable of producing a multiple grayscale display. The object of the invention to provide a liquid crystal display device capable of promoting the display quality of a display image displayed on a liquid crystal display element, and enabling the high speed operation and large screen formation of a liquid crystal display element. To achieve the object, a liquid crystal display device is constituted by a liquid crystal display element and at least a single piece of semiconductor integrated circuit device, and has an image signal line driving means for supplying grayscale voltages in correspondence with the display data to respective image signal lines of the liquid crystal display element. The said semiconductor integrated circuit device includes a plurality of grayscales voltage selecting means for selecting grayscale voltages in correspondence with the display data inputted from a plurality of grayscale voltages, a plurality of amplifiers for amplifying the grayscale voltages selected by the respective grayscale voltage selecting means and outputting the grayscale voltages to respective image signal lines, and a precharge control circuit provided between the respective grayscale voltage selecting means and the respective amplifiers.
Patent TW-553749-B (TW)
Title: Stable pharmaceutical composition comprising (E)-7-[4-(4-fluorophenyl)-6-isopropyl-2-[meteyl(methylsulfonyl)amino]pyrimidin-5-yl]-(3r,5s)-3,5-dihydroxyhept-6-enoic acid and method for producing the same
Inventor: CREEKMORE JOSEPH R
IPC: A61K33/30
Filed: 2000-08-04
Granted: 2003-09-21
Abstract: The invention concerns a pharmaceutical composition comprising the HMG CoA reductase inhibitor (E)-7-[4-(4-fluorophenyl)-6-isopropyl-2-[methyl(methylsulfonyl)amino]pyrimidin-5-yl]-(3R,5S)-3,5-dihydroxyhept-6-enoic acid or a pharmaceutically acceptable salt thereof as the active ingredient, which remains stable over a prolonged period.