Patent GB-1153807-A (GB)
Title: Method of and System for Interrogating a Plurality of Sources of Data
IPC: G06F9/46
Filed: 1967-11-13
Abstract: 1,153,807. Data collection and processing. DATA PATHING Inc. 13 Nov., 1967 [14 Nov., 1966], No. 51425/67. Heading G4A. In a system comprising a control computer station connected to a plurality of data sources by way of satellite computer stations, the data sources possessing a plurality of different types of predetermined data, a satellite station wishing to interrogate a data source obtains a program from the central station corresponding to the type of data, and then, under program control, interrogates the data source, stores the data supplied and transmits the data to the control station during a single continuous time interval. As shown (Figs. 2 and 3) a control computer station 10 is linked to a satellite computer station by means of two wires 27 and a buffer 16. A plurality of satellites may be strung together on a single pair of wires 27 and other similar strings of satellites may also be linked to the station 10. Each satellite includes a unit 28 for converting between serial signals on wires 27 and parallel signals for use in the satellite. An address patch plug 29 is provided whereby each satellite may respond only to those signals intended for it. All satellites are tested in turn by the control computer to check their status and attend to requests as they arise. A modified modulus-3 error check device 35 operating on a code illustrated in (Fig. 8, not shown) is also provided. All input and output data passes through a register 30. Operation of the satellite station is controlled by a command register comprising a control register 31, system counter 32, receive command device 33 and a byte counter 34. The register 31 and counter 32 are stepped through their various states to control the sequential functioning of the station (the functions corresponding to the states of counter 32 being illustrated in Fig. 7, not shown). The receive command device 33 under the control of byte counter 34 supervizes the loading of programmes and transmission of certain output data. Register 30 is also connected for the passage of programme data to a shift register comprising stages 36A-J each one of which can accommodate a single 5-bit byte. A key board 41 may also feed data into the register 36 and stages 36A-E are coupled to a numeric display panel 38. The final stage 36J is connected to stage 1 and 6-9 of a general purpose register 42 to which a programme select panel 35 badge reader 54A, document reader 54B and card reader 54C are also connected. The cards or documents read at these stations 54A-C may carry information in the form of punchings, magnetic marks, perforations, reflective marks or opaque marks on transparent documents. An instruction display panel 57 is coupled to the register 42 and register 31 for passing instructions to the satellite station operator. In operation, a programme is selected by pressing a button in panel 53. A code corresponding to the selected programme is fed into stages 10-12  of register 42 and from these by way of register 30 when the satellite station is next tested to the control computer 10. In response, the control computer feeds to the satellite station the requested programme, this being stored in shift register 36, and sets the counters or registers 31-34 to their initial states. The operator is informed of what information is required and when by way of panel 57. The display panel 38 indicates, by means of dashes, how many digits are required to be keyed in the case of variable data. Data keyed in gradually takes the place of the programme data which is eventually completely lost (to the satellite station). After compliance with all instructions, the data is fed in to the control computer 10 in a continuous stream. Coding and numeric display.-Communication between the control computer 10 and the satellite station is by way of phase modulation coded 8-bit bytes, two of which (C1 and C2, Fig. 8, not shown) are for checking purposes. The stages of the shift register 36 each accommodate 5-bit bytes representing the digits 0-9 and the symbol dash according to the code illustrated in Fig. 6 (not shown). Each of the five bit positions corresponds to a segment A-E of the digit display positions 38 A-E, the two segments F and G being selectively added by converters 39A-E. The bits corresponding to segment E which control the display of the symbol dash are fed from register 36 into the stages 1-5 of register 42 to indicate how many digits are required when variable information is to be keyed in.