baber/WOPTO huggingface dataset:
Patent JP-H06132558-A (JP)
Title: Infrared detector
Inventor: YONEDA KIWA
IPC: H01L31/10
Filed: 1992-10-16
Abstract: PURPOSE:To provide an infrared detector of heterojunction type of GeSi and Si without being affected by an impurity layer on the surface of an Si substrate and a crystal defect. CONSTITUTION:An infrared detector comprises a P-type Si substrate 2, an Si buffer layer 21 which is formed on the P-type Si substrate 2 and has a P-type impurity concentration of 10<18>cm<-3> or less, and a GeSi layer 1 formed on the Si buffer layer 21. Accordingly, the infrared detector having the uniform barrier height and the good crystalline GeSi layer can be obtained.
Patent JP-2001099609-A (JP)
Title: Parasitic signal eliminating system touch panel apparatus
Inventor: KATABAMI KOICHIRO
IPC: G06F3/03
Filed: 1999-09-30
Abstract: PROBLEM TO BE SOLVED: To eliminate detecting position deviation independently of a grounding situation of an operator, of a touch panel apparatus of a touch effective area whole surface analog type which detects a touch position from an AC signal current flowing in a surface resistor. SOLUTION: In the state of an AC signal, a vectorial eliminating signal having an antiphase equal amplitude is compulsively applied to a parasitic signal caused by electromagnetic radiation from a panel and a parasitic signal caused by parasitic capacitance, in a control circuit.
Patent JP-S62136862-A (JP)
Title: Resin sealed semiconductor device
Inventor: IKO KAZUO
IPC: H01L23/29
Filed: 1985-12-10
Abstract: PURPOSE:To avoid development of crackings even in the case of surface mounting using a reflow furnace by a method wherein a semiconductor element is sealed with a resin sealing unit to form a semiconductor device and the resin sealing unit is colored white. CONSTITUTION:If a package, normally colored black, is colored white, development of crackings created by a heat shock caused by a sudden heating in a reflow furnace can be avoided. In order to color a resin molded unit white, molding resin is colored white by mixing a white pigment such as titanium white into the molding resin compound in place of carbon black. Therefore, defects such as crackings are not developed in the resin sealing unit by the heating for reflow and the like and the excellent moisture resistant properties and very high reliability of a semiconductor device can be provided even after mounting process such as surface mounting.
Patent JP-H06209394-A (JP)
Title: Called party display device for communication terminal equipment
Inventor: OGAWA MUTSUO
IPC: H04N1/32
Filed: 1992-09-25
Abstract: PURPOSE:To provide a called party display device for a communication terminal equipment capable of preventing erroneous dialing to the utmost. CONSTITUTION:The information of the called party for which transmission is predicted and the called party name corresponding to the called party information are stored in a storage device 9 beforehand and when the called party information is inputted from a keyboard 1, the corresponding called party name is called from the storage device 9 and displayed on a display device 16. At the same time, while a telephone number corresponding to the called party name is instructed to transmit, the called party information displayed on the display device 16 is reset and the telephone number corresponding to the called party information is transmitted on a line only when it is confirmed that the called party name is correct by an operator.
Patent JP-H10119038-A (JP)
Title: Housing method for smc
Inventor: SUZUKI HIROYASU
IPC: B29B11/16
Filed: 1996-10-22
Abstract: PROBLEM TO BE SOLVED: To provide a water-resistant property and facilitate housing of a sheet molding compound by a method wherein the sheet molding compound is housed zigzag in a bag, which is made of two or more layers comprising one layer made of impermeable styrene film and another layer made of water impermeable film and installed in a housing box hermetically closed. SOLUTION: A housing box 1 is covered with a bag 2, which is made of three-layered laminate film formed by laminating a polyethylene film for preventing moisture penetration on both sides of a nylon film for scattering styrene. A sheet molding compound(SMC) 3 is housed being folded zigzag under the state that the housing box 1 is covered with the bag 2. Finally, the portion, which extends outside the housing box 1, of the bag 2 is hermetically sealed with a self-adhering tape or the like for aging and thickening the SMC. By the above housing method, no styrene as the volatile component of the SMC 3 to be housed scatters and this method has a water resistance. In addition, the quality and reliability of the SMC 3 are improved and its housing work is also improved.
Patent JP-H10126041-A (JP)
Title: Plated circuit for electric circuit board and its manufacturing method
Inventor: TANAKA MASAYOSHI
IPC: H05K3/20
Filed: 1996-10-22
Abstract: PROBLEM TO BE SOLVED: To provide a plated circuit for electric circuit board, which prevents a photo resist part from peeling out of the metal foil even in filling a conductor circuit pattern groove with conductor, and does not cause trouble in removing the metal foil from the photo resist part and the conductor circuit pattern part after filling the conductor circuit pattern groove with conductor, and to provide its manufacturing method. SOLUTION: A plated circuit 4 for electric circuit board is provided by forming a photo resist layer on the surface of a metal foil 1, by forming a conductor circuit pattern groove on the photo resist layer by etching, and by filling the conductor circuit pattern groove with conductor so as to form a conductor circuit pattern 3. The surface roughness (Rz) of the metal foil 1 which contacts with the conductor circuit pattern 3 and the photo resist part 2 is set within a range of 3-11μm.
Patent JP-H01120815-A (JP)
Title: Heating of semiconductor wafer
Inventor: TAKAIKE KIYOUICHI
IPC: H01L21/205
Filed: 1987-11-05
Abstract: PURPOSE:To heat a wafer efficiently and uniformly by a method wherein impurity ions are implanted into the surface of the wafer opposite to the surface on which an epitaxial film is built up, a low resistance layer with a specified resistivity and thickness is formed by a thermal diffusion treatment, its induction heating is performed and the wafer is heated by the heat transmission from the low resistance layer. CONSTITUTION:Wafers 6 with low resistance layers are put on a quartz board 5 in a reaction tube 4. After the reaction tube 4 is evacuated through an exhaust pipe 10, the low resistance layers 2 formed on the rear surfaces of the wafers 1 are induction-heated by an induction heating coil 8 while reactive gas is introduced into the reaction tube 4 from a gas introducing pipe 7. The wafer 6 with the low resistance layer is formed by diffusing n-type impurity into the rear surface of the p-type Si wafer. For that purpose, after phosphorus ions are implanted, the wafer is annealed in a nitrogen atmosphere. In order to obtain the effect of induction heating, it is necessary to have the diffusion depth not less than 1mum and the resistivity not higher than 0.1OMEGAcm. With this constitution, the wafer can be heated efficiently and uniformly.
Patent JP-H01160637-A (JP)
Title: Product including langmuir-blodgett's-film assembly
Inventor: TOOMASU ROON PENNAA
IPC: B32B15/08
Filed: 1988-11-07
Abstract: PURPOSE: To improve a structural integrity and stability for patterning by a differential illuminating and developing by incorporating an oriented polymer layer of a monomolecular thickness including a repeating unit formed of one hydrophilic group for bonding two hydrophobic groups including two crosslinking moieties in a film assembly. CONSTITUTION: The product contains an LB film assembly including at least one oriented polymer layer generated by optical crosslinking of a monomer oriented by an LB analysis including one hydrophilic group for bonding two hydrophobic groups of at least two parts of portions for receiving a crosslinking reaction by optically activating on a support. When the support is slowly drawn from a polar solvent, the LB film is formed in a shape in which a head is near to the support as compared with the end. This array can be diagrammed. A specific monomer considered by using to constitute the LB film assembly for satisfying the necessary conditions is represented by a formula I.
Patent JP-H04152710-A (JP)
Title: Schmitt trigger circuit
Inventor: KUROSE FUMITAKA
IPC: H03K3/027
Filed: 1990-10-16
Abstract: PURPOSE:To speed up the circuit operation by connecting a transmission gate to outputs of inverting gates having a different threshold level, and selecting any transmission gate in response to a change in an input signal. CONSTITUTION:When the level of an input signal SIN fed to an input terminal 10 is at a ground level GND, outputs of inverting gates 12, 13 are at a power supply level VDD. When the input signal SIN rises gradually from the ground level GND and reaches a threshold level VTHH of the inverting gate 13, the output signal SOUT changes from the ground level GND to the power supply level VDD. When the input signal SIN falls down the power supply level VDD gradually and reaches a threshold level VTHL of the inverting gate 12, the output signal SOUT changes from the power supply level VDD to the ground level GND. The Schmitt trigger circuit having a width of (VTHH-VTHL) is formed by changing the threshold level of the inverting gates 12, 13.
Patent JP-S61158836-A (JP)
Title: Production of parent material for optical glass
Inventor: HARA RYOICHI
IPC: C03B8/04
Filed: 1984-12-29
Abstract: PURPOSE:To obtain the titled parent material which is completely dehydrated even if the diameter of the parent material is enlarged, by sintering the outer periphery of a porous rod parent material into a semi-sintered state, dehydrating the parent material, and depositing and forming a porous glass layer on the outer periphery of the dehydrated rod parent material. CONSTITUTION:A gaseous-phase glass raw material (SiCl4) containing no dopant (e.g., GeCl4), O2, H2, and an inert gas (e.g., Ar) are fed to the reaction burner 12, burned, the glass raw material is chemically reacted, glass fine particles such as SiO2, GeO2 etc. are formed,and deposited on a deposit of a target. The target is transferred in the arrow X direction while rotating around its axial line as a rotating shaft, and the porous rod parent material 1 is formed. The rod parent material 1 is heat-treated at a temperature lower than a transparent glass formation temperature by the heater 13, and sintered in a semi- sintered state. Then, the rod parent material 1 is sent to the dehydrating furnace 16, dehydrated under heating in a chlorine-containing atmosphere, and the porous glass layer 2 is formed in the more enlarged reactor 17, to give the parent material 3 for optical glass.
Patent JP-H09129477-A (JP)
Title: Laminated capacitor
Inventor: MIZUNO YOICHI
IPC: H01G4/30
Filed: 1995-10-27
Abstract: PROBLEM TO BE SOLVED: To provide a laminated capacitor having a low electrostatic capacitance and a high quality factor and having no defect in its internal structure. SOLUTION: The size of a dielectric layer 21 and the shape of internal electrode pieces 22b are set in such a manner that the ratio of the width D of the internal electrode pieces 22b and the width W of the dielectric layer 21 becomes the prescribed value in the range of 0.1 to 0.4, and at the same time, the ratio (L1/L) of the length L1 of the internal electrode pieces 22b and the length L of the dielectric layer 21 becomes in the range of 0.5 to 0.9. As a result, the dielectric layers of the upper and the lower layers of the dielctric layer 1 can be sufficiently adhered directly with each other on the area, in the widthwise direction and the longitudinal direction of the internal electrode pieces without intermediary of the internal electrode pieces 22b. As a result, the generation of the structural defects such as cracks, delamination, etc., can be prevented.
Patent JP-H06129660-A (JP)
Title: Method for mounting wall-hang type indoor air conditioner
Inventor: ISHIBASHI KEN
IPC: F24F13/20
Filed: 1992-10-19
Abstract: PURPOSE:To provide a mounting method which prevents piping holes from being deviated when mounting a wall hang type indoor air conditioner. CONSTITUTION:A board 1, which is preliminarily bored to suit a piping opening 2, is fixed with a stud 3. Then, inner wall work around the board 1 is constructed so that an indoor air conditioner is mounted to the front of the board 1 while a pipe 5 pulled out from the opening 2 is connected to the indoor equipment. Prior to the construction of the inner wall, the position of the opening 2 through which the pipe is pulled out is already decided, which protects the position of the opening 2 from being deviated to a great extent. Therefore, the indoor equipment can be mounted with ease so that a drain hose is not forced to be bent excessively, thereby preventing the generation of a trap which may be attributable to water leakage.
Patent JP-H06129543-A (JP)
Title: Seal structure of transmission case of vehicle
Inventor: TAKEMURA TOSHIHIKO
IPC: F16H57/04
Filed: 1992-10-19
Abstract: PURPOSE:To prevent oil leakage from a space between a front part case of mission case and am intermediate case by a load working on a car body through works at the time of soil loading work or excavation work by fitting a front loader and a backhoe in a tractor, and to provide a seal structure that bears well fatigue due to compression. CONSTITUTION:An interposing plate 20 made of metal is sandwiched in a connected surface between a front part case 9 of transmission case and an intermediate case 10, and the interposing plate 20 is divided into inner and outer directions of the transmission case, while an elastic seal material 22 connecting to the front part case 9 as well as the intermediate case 10 is provided between the inner and outer interposing plates 20a and 20b, and sealing of the connected surface between the front part case 9 and the intermediate case 10 is thus achieved.
Patent JP-S63132452-A (JP)
Title: Pattern forming method
Inventor: NAKANO HIROBUMI
IPC: H01L21/027
Filed: 1986-11-24
Abstract: PURPOSE:To form a two-layer pattern of different kinds of metal with high accuracy, by forming a two-layer film pattern, implanting ion, arranging a resist film on a substrate except for the pattern, and forming a second metal film after a thin film is eliminated. CONSTITUTION:A two-layer film pattern P of a first metal film 14 and a thin film 15 is formed on a semiconductor substrate 11. After ion implantation using the pattern P as a mask and then annealing, a resist film 16 is formed on the whole surface. The film 16 on the thin film pattern 15 is eliminated, and further the thin film pattern 15 only is eliminated. After a second metal film 17 is formed on the surface, the resist film 16 and the metal film 17 on the film 16 are eliminated by lift-off method, and a second metal film pattern 18 is formed on the metal film pattern 14.
Patent JP-H04153065-A (JP)
Title: Determination system of position of printing
Inventor: MATSUMOTO YASUAKI
IPC: G06F3/12
Filed: 1990-10-18
Abstract: PURPOSE:To prepare a document flexibly by mounting a fundamental definition section defining the item, format and combination relationship of document data and a document data developing section forming the printing type of document data according to a development system defined by the fundamental definition section. CONSTITUTION:A printing position determination system is composed of a fundamental definition section 1 and a document data developing section 2. The fundamental definition section 1 conducts the item definition, document- printing position (a format) definition and combination definition of document data. The document data developing section 2 forms document data in a printing type according to a development system formed by the fundamental definition section 1. The item definition defines document data as items, and is constituted of the name, position, length and attribute of the items. The format definition defines the printing position, printing character number and line-feed number of a document. Printing is conducted so that space is formed positively between the item and the item.
Patent JP-2000091691-A (JP)
Title: Semiconductor optical element
Inventor: NAOE KAZUHIKO
IPC: H01S5/042
Filed: 1998-09-16
Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor optical element whose temperature characteristics is good even at the time of mounting. SOLUTION: The semiconductor optical element comprises, on a substrate 101, an active layer 102, a clad layer 103, a contact layer 104, a passivation film 105, an upper part electrode 106, and a lower part electrode 107. A ridge waveguide part formed at a center comprises not the passivation film 105 but the contact layer 104. A waveguide side part formed on both sides comprises not the contact layer 104 but the passivation film 105. With this configuration, the step between the ridge waveguide part and the waveguide side parts on both sides is reduced, to 0.3 μm or less.
Patent JP-2000110941-A (JP)
Title: Diaphragm
Inventor: MURAKAMI TSUNEO
IPC: F16J3/02
Filed: 1998-10-02
Abstract: PROBLEM TO BE SOLVED: To prevent a hindrance to manufacture even in a shape having deep drawing by constituting a reinforcing material layer of a cut fiber. SOLUTION: A cut fiber 9 is embedded by a prescribed quantity as the constitutive material in a reinforcing material layer 8 for reinforcing a rubber-like elastic material layer 2. The reinforcing material layer 8 is arranged on one surface 1a side of a diaphragm 1 or the rubber-like elastic material layer 2. A partial cut fiber 9 is exposed in the surface to this one surface 1a. This cut fiber 9 is embedded in a free shape or arrangement in a thickness of rubber without having a texture of weaving and knitting like base cloth. Thus, the manufacture is not hindered even if the diaphragm 1 has a deep drawing shape, so that the diaphragm 1 can be comparatively easily manufactured.  Thus, restriction of a shape of the diaphragm 1 set for fear of incompleteness of drawing and generation of wrinkles can be removed, so that a shape range of a substantially manufacturable diaphragm 1 can be expanded.
Patent JP-H03251728-A (JP)
Title: Pyroelectric infrared detector and driving method thereof
Inventor: TOMITA YOSHIHIRO
IPC: G08B13/191
Filed: 1988-11-07
Abstract: PURPOSE:To simplify wirings of pyroelectric element arrays with processing circuits by wiring pyroelectric elements of each pyroelectric element array in series, by processing signals in the opposite ends of the array and also by scanning the pyroelectric element arrays in sequence optically by a slit. CONSTITUTION:Electrodes 2 and 3 are formed on the opposite surfaces of a pyroelectric thin film 1 and each pyroelectric element is constructed. The pyroelectric elements in the lateral direction out of those arranged two-dimensionally are wired with the adjacent ones by patterns of the electrodes 2 and 3 alternately, and the pyroelectric elements arranged in one array are connected in series. The pyroelectric element array is disposed in a plurality in the longitudinal direction, so as to construct the two-dimensional pyroelectric element arrays. By moving a slit 4 in the lateral direction in front of these pyroelectric element arrays, an infrared image 5 being incident on the pyroelectric element arrays is scanned and a voltage generated between electrodes 6 and 7 in the opposite ends of each array is connected as an output to a signal processing circuit. According to this constitution, a small-sized pyroelectric type infrared detector having high performance of positional resolution, simple wirings of the pyroelectric element arrays with processing circuits and the reduced number of processing circuits can be manufactured at low cost.
Patent JP-H09129053-A (JP)
Title: Manufacture of oxide superconductive wire material
Inventor: HASE TAKASHI
IPC: C01G1/00
Filed: 1995-10-27
Abstract: PROBLEM TO BE SOLVED: To provide a manufacturing method for an oxide superconductive wire material wherein swelling of the oxide superconductive wire material can be prevented. SOLUTION: This method is a manufacturing method for an oxide superconductive wire material wherein a sheath material filled with a calcined powder to be used as a raw material for the oxide superconductive wire material is crystallized by being heated to a partly melting temperature and then slowly cooled. In this event, degassing treatment of the interior of the above-mentioned sheath material is conducted by raising temperature in a vacuum and thereafter heating to the partly melting temperature is conducted in an oxygen-enriched atmosphere. When the oxide superconductor is a Bi-2212 oxide superconductor, it is recommended that an ultimate temperature in heating conducted in a vacuum be as high a temperature as possible but not higher than 750 deg.C.  Furthermore, in the event of heating in an oxygen-enriched atmosphere, removal of carbon dioxide gas from the above-mentioned sheath material can be accelerated by holding a temperature range of 780 to 840 deg.C, and thereafter removal of oxygen gas can be conducted by gradually raising temperature from the range of 780 to 840 deg.C up to the partly melting temperature in the oxygen-enriched atmosphere.
Patent JP-H05120063-A (JP)
Title: Debugging system for microprocessor and debugging panel for the same
Inventor: MORIYAMA TAKASHI
IPC: G06F9/46
Filed: 1991-10-28
Abstract: PURPOSE:To correctly monitor the operation of a microprocessor (MPU) by providing the MPU with an interruption line for debugging, and simultaneously, providing the MPU with routine to execute processing corresponding to an interruption signal. CONSTITUTION:When a prescribed key is pushed down in a debugging panel 3, the interruption signal is sent to a CPU board 2 through an I/O bus 22. This interruption signal is transmitted to an interruption controller 23, and further, it is sent to the MPU 21 through an interruption signal line 24. In the MPU 21, the information of the debugging panel 3 is read in by debugging panel accessing routine, and it is analyzed what key was pushed down in the debugging panel 3 by read data analyzing routine, and prescribed processing is selected and executed. Thus, the operation of the MPU 21 can be monitored by only a microprogram without interposing software working in the MPU 21.
Patent JP-H01123457-A (JP)
Title: Manufacture of semiconductor device
Inventor: FURUKAWA MAKOTO
IPC: H01L29/73
Filed: 1987-11-09
Abstract: PURPOSE:To form a bipolar transistor in a unitary body by utilizing the process of a CMOS transistor, by a method wherein an inverse conductivity type well is formed on a one-conductivity type semiconductor substrate, and a base region is formed by introducing a one-conductivity type impurity into said well. CONSTITUTION:On the surface of a P-type semiconductor substrate, a silicon oxide film 2 having a required pattern is formed, which is used as a pattern to form N-type semiconductor regions 10, 11 on required regions. The whole part of the silicon oxide film 2 is eliminated, a thin silicon oxide film 3 is grown on the whole surface, a part turning to the base region of a bipolar transistor on a PSG film 4 is subjected to patterning, and P-type impurity ion is implanted. The PSG film 4 is eliminated, and a base 12 of the bipolar transistor is formed in a N-well region 10. An element isolation region 13 and a gate oxide film 14 are formed by LOCOS oxidizing, and the gate electrodes 15, 16 of MOS transistors are formed by using polysilicon. After that, the sources and drains 17, 18 of N-channel and P-channel MOS transistors are formed in a self-alignment manner.