Patent GB-1119001-A (GB)
Title: Data communication system
IPC: H04L25/05
Filed: 1965-08-13
Abstract: 1,119,001. Digital interface apparatus. DIGITAL EQUIPMENT CORP. 13 Aug., 1965 [13 Aug., 1964], No. 34869/65. Heading G4A. Receivers 16 receive and store digital data received over lines 14 and produce a flag signal when a complete data unit, e.g. a character, has been received, a flag scanner 24 detects and identifies a receiver producing a flag signal and notifies a computer 22, whereupon a line selector 20 controlled by the computer transfers the data unit stored in the identified receiver to the computer. Reception.-Each receiver includes a shift register converting a serial input on its line 14 to a parallel output, and associated logic produces a flag signal when the last bit of a character has been received. Gates 104 of the group flag mixers 32 and 34 are normally held open by flag line selector 90 and gates 108 are interrogated alternately by flag group selector 100 so that a flag signal passes to flag scanner control 26 over line 36 the next time the appropriate mixer 32 or 34 is interrogated. Group scanning is thereby halted and line scanning by counter 88 and selector 90 takes place until a flag signal again passes to line 36, the count held in counter 88 then identifying the receiver producing the flag signal. A notification signal is passed to computer 22 at this juncture and the identification signal is passed to the in/out register 38 of the computer. On command from the computer 22, line selector 20, which also receives the identification signal held in counter 88, gates out the stored character from the identified receiver and passes it to register 38, at the same time cancelling the flag signal from this receiver. Line scanning then continues, any further flag signals in that group being identified and the corresponding characters being transferred to register 38 as above, and when the group has been completely scanned, group scanning by selector 100 recommences. Transmission.-Computer 22 sends the group and line identity of the required line 14 over bus 15 to line selector 20 and the corresponding character is sent from register 38 to all the transmitters 18. On command from the computer, line selector 20 gates the character into the shift register of the identified transmitter 18 which subsequently sends it serially over its line 14. When a complete character has been transmitted, the corresponding receiver 16 produces a flag signal which may serve as a check that a complete character has been transmitted. A more detailed check may be made by identifying the receiver producing the flag signal as on reception and passing the character stored therein to the computer for comparison with the character which should have been transmitted. A duplex system is also described in which the transmitter 18 and receiver 16 of each channel have individual lines 14 and group flag mixers are provided for the transmitters as well as the receivers. In this system, the transmitters produce a flag bit when they are ready to transmit a new character. Priority is given to reception to ensure that a character is transferred from a receiver to register 38 before arrival of the next character on that line. If no further characters are to be sent by an identified transmitter 18 the computer 22 cancels its flag signal.