Patent GB-982326-A (GB)
Title: Improvements in or relating to signalling systems
IPC: H04L1/00
Filed: 1961-11-08
Abstract: 982,326. Telegraphy. GENERAL ELECTRIC CO. Ltd., N. E. HEAD, R. F. KILBY, and J. M. SMART. Feb. 8, 1963 [Nov. 8, 1961], No. 39997/61. Heading H4P. The invention provides a data transmission system in which data is sent in blocks, each block including a synchronizing signal which has a predetermined pattern, it being arranged that the synchronizing signal pattern cannot be transmitted except at predetermined intervals. The data may have two or more discrete states. The data block, in the embodiment described, consists of 100 data bits the synchronizing pattern, and parity bits. The block is divided into 12 sub-groups as indicated in Fig. 1. The first subgroup is the synchronizing signal, formed by 01 repeated six times. The twelfth bit of each sub-group is a parity check on the sub-group, and the first bit of the second to twelfth sub-groups is a repeat of the immediately preceding parity bit. The 100 data bits are allotted positions 2 to 11 of the second to eleventh sub-groups. The twelfth sub-group has positions 2 to 10 all 0 or all 1, position 11 being 1 so that the synchronizing pattern is not simulated by part of this sub-group and the start of the next block. The transmitter, Fig. 2, comprises 144 contact pairs, corresponding to the 144 bits in a block. The contacts 11-22 of only one sub-group are shown-11 and 22 are always shorted, 12-21 are shorted or open dependent upon the data to be transmitted and are controlled by external arrangements. The state of each contact pair is sampled in turn by clock pulses B1-B12 (derived from a bit-counter B driven by way of counter A from an oscillator 1) and is passed to bi-stable unit 28 during period C2 (derived from sub-group counter C driven by counter B) which lasts for one sub-group. A parity bit counter 38 counts the 1 bits, it being set to zero at the start of each block. The data from unit 28 is sent to line 32 via gates 35, 36 and unit 31, this arrangement being such that the first bit is replaced by the parity bit of the preceding sub-group, and the twelfth bit is replaced by the parity bit indicated by counter 38. Transmission is by carrier, e.g. voicefrequency. The receiver. Fig. 3 (not shown), includes 12 temporary stores which store each sub-group as it is received. Transfer of the ten data bits to 10 permanent stores takes place only if parity check on the received bits shows an error. The received block is also passed to an arrangement of a bi-stable circuit and gates, which is such that if the bi-stable circuit is not changing its state in synchronizm with the synchronizing pattern transfer of data from the temporary stores to the permanent stores is inhibited. In such a case the said arrangement also resets a bit-counter and sub-group counter to zero. No data can be transferred until a complete block and the synchronizing signal of the next block have been correctly received. General.-Two systems such as described above can be operated in parallel, transmitting either the same data simultaneously-in which case data in one channel is the complement of that in the other-or data staggered by 72 bits so that the time for signalling a change in any one of the hundred contact pairs is halved. Specifications 982,326 and 982,328 are referred to.