Patent GB-1034212-A (GB)
Title: Improvements in or relating to systems for automatically controlling data stored in a memory
IPC: G11C15/04
Filed: 1964-02-27
Abstract: 1,034,212. Data locating arrangements for data-storage apparatus. COMPAGNIE DES MACHINES BULL. Feb. 27, 1964 [March 13, 1963], No. 8280/64. Heading G4C. Characters forming words are stored in a matrix store, each word being separated by a code mark, whereby a specific word may be extracted by successive extraction of the characters and comparison with the selected code mark in a register and subsequent rewriting of the characters until the required code mark is located, whereupon the characters are read out but not rewritten until another different code mark is located which restarts the rewriting of extracted characters. Reading and writing networks (Figs. 2a and 2b, not shown). Columns are read out successively by application of a pulse to a series of control circuits, one of which is previously rendered conductive by the state of a bi-stable trigger. The same pulse, after a delay to allow read-out, resets the first trigger to a non- conducting state and sets the next trigger to allow read-out of the next column by a succeeding pulse. Pulses are similarly applied to a column for writing, such pulses being half the value necessary to set a magnetic core, the other halves being supplied to the rows according to the word required to be stored or extracted. Introduction.-To introduce a word at a specified location the code mark and word are set in a shift store 16 (Fig. 1A, not shown), the code mark in a register 17, and an instruction decoder 22 is set to IN. A main pulse generator 33 emits pulses A, B, C, D which set the apparatus for operation, write the code mark in an auxiliary register 2 and a comparison register 9, set trigger B1 to state " 1," triggers B2, B3 to state " 0 " and starts an auxiliary pulse generator 35. Pulse S1 resets register 2 to zero. Pulse S2 reads the first code mark from store 1 into register 2 and compares it with that in register 9 which gives an output through one of circuits 12 or 13 to render either circuit 29 or 28 conductive to pulse S3. If equality occurs pulse S3 sets B3 to state " 1 " but gate 42 is not rendered conductive and hence circuits 39, 40 block the next pulse S4. An output pulse at 46 recirculates through control 38 and another cycle commences with S1 clearing register 2. Cycles are repeated until the entire word is erased and another code mark is registered, whereupon inequality causes the comparator 11 to operate gate 13 and permit S3 to pass control 28 and set B3 to state " 0" rendering control 39 conductive and thus permitting re-use of the writing network 8. The characters are thereafter read-out and rewritten in compact form in the store until, after an extraction, the register 2 remains at zero. If initially the register 2 contains a code mark different from that in register 9 it is rewritten in the store and the next character read out. Since it is not a code mark none of circuits 28-32 are conductive and S4 rewrites it in its previous position. When after an extraction the register 2 remains at zero an indicator 27 operates gate 25 and control 31 such that S3 is transmitted to control 19 to cause the code mark and word in store 16 to be written into store 1 on application of pulse S4. Erasure.-The device operates as previously with the decoder 22 set at EX, the operation terminating when all the characters have been compared with that in register 9. Extraction.-The device operates with the decoder 22 set at EX, the characters being compared with the selected code mark until equality is obtained, whereupon the code mark is reintroduced into store 1 and entered into store 16. Each succeeding character is similarly written in both stores 1 and 16 until another code mark is reached, or the register 2 remains at zero, whereupon the device is stopped.