baber/WOPTO huggingface dataset:
Patent TW-331657-B (TW)
Title: The global planarization method for manufacturing MOSFET
Inventor: DAY CHANG-MING
IPC: H01L21/469
Filed: 1997-01-31
Granted: 1998-05-11
Abstract: A method for manufacturing MOSFET device on semiconductor substrate by using shallow trench filled with silicon-oxide, its steps include: - Grow 1st silicon-oxide on substrate. Deposit silicon-nitride on 1st silicon-oxide. Coat 1st positive PR on silicon-nitride, and use shallow trench to expose PR on 1st positive PR to develop narrow & wide features. - Use narrow & wide features inside 1st PR as mask, and use anisotropic etching to produce narrow & wide features inside silicon-nitride & 1st silicon-oxide, and continuous the anisotropic etching to produce narrow & wide shallow trench on substrate. - Remove 1st positive PR, and deposit 2nd silicon-oxide to fully fill narrow & wide shallow trench to form uneven surface, in which, the silicon-oxide filled in narrow trench is thicker than filled in wide shallow trench. - Coat anti-reflection layer on 2nd silicon-oxide, and bake anti-reflection layer. - Coat 2nd positive PR on anti-reflection layer to form 2 planarization compound layers, to enclose 2nd positive PR. - Bake 2nd positive PR, to even the surface of 2 planarization compound layers, in which, the planarization compound layer covered on thin 2nd silicon-oxide of wide shallow trench is thicker than the planarization compound layer covered on thick 2nd silicon-oxide inside narrow shallow trench. - Proceed 1st planarization, and use dry etching to totally remove thin planarization compound layer on thick 2nd silicon-oxide to expose the top surface of 2nd silicon-oxide, and remain the thicker planarization compound layer on thin 2nd silicon-oxide. - Proceed 2nd planarization, and use dry etching to totally remove thick 2nd silicon-oxide from narrow shallow trench to expose silicon-nitride to even the narrow shallow trench and interval portion, and remain the thicker planarization compound layer on thin 2nd silicon-oxide. - Soak in HF buffering solution, remove remained thicker planarization compound layer, silicon-nitride and 1st silicon-oxide. - Grow 3rd silicon-oxide as gate insulating. Deposit polysilicon, and define the pattern of polysilicon. Form polysilicon gate structures on gate insulating. - Implant 1st conductive dopant into narrow trench and substrate uncovered by polysilicon gate structure to form LD source/drain. - Deposit 4th silicon-oxide, and proceed anisotropic etching for 4th silicon-oxide to form insulating spacer at side of polysilicon gate structure. - Implant 2nd conductive dopant into narrow trench and substrate uncovered by polysilicon gate structure & spacer to form thickly doped source/drain.
Patent TW-322554-B (TW)
Title: A wireless modem with a supplemental power source
Inventor: ROBERT H BASS SR
IPC: H04B1/38
Filed: 1997-02-19
Granted: 1997-12-11
Abstract: A wireless modem is provided with a passive power source using a first PCMCIA slot that is normally provided in mobile computer systems. Most mobile computing systems today provide for two or more PCMCIA slots. In the preferred embodiment of the present invention one slot is used by a first PCMCIA adapter that provides for baseband signal processing and power signals to a transceiver device. A second PCMCIA adapter card supplements the power signals provided by the first PCMCIA adapter card to the transceiver. The second PCMCIA adapter card occupies a second PCMCIA slot. The second PCMCIA adapter card supplements the power signals provided by the first PCMCIA card, permitting the transceiver to draw more current than that available from the first PCMCIA card. The transceiver and PCMCIA cards are interconnected by a Y cable in the preferred embodiment and a three connector housing in an alternative embodiment.
Patent TW-454008-B (TW)
Title: Pyrimido[5,4-d]pyrimidines, pharmaceuticals containing these compounds, their use and processes for the preparation thereof
Inventor: HIMMELSBACH FRANK
IPC: C07D487/04
Filed: 1997-03-06
Granted: 2001-09-11
Abstract: The present invention relates to pyrimido[5, 4-d]pyrimidines of the general formula, in which Ra to Rc are as defined in claim 1, their tautomers, their stereoisomers and their salts, in particular their physiologically tolerated salts with inorganic or organic acids or bases, which have valuable pharmacological properties, in particular an inhibitory effect on signal transduction mediated by tyrosine kinases, their use for the treatment of disorders, in particular of oncoses, and their preparation.
Patent TW-316233-B (TW)
IPC: A61F2/00
Filed: 1997-03-15
Granted: 1997-09-21
Abstract: The artificial foot comprises an elastic foot-insert (20) which is C-shaped in a longitudinal section with a rear-facing opening (22) absorbing the prosthesis load with its top C-shaped limb (24). The opening transmits the load via its lower C-shaped limb to a plate spring (10) joined to it. The plate spring extends forward parallel to the sole part (5) over the foot-insert, with its front end (12) protruding into the toe part (3). The foot-insert is formed from a tubular cylindrical segment (21) having a horizontal cylinder axis, and an axial slot for forming the rear opening. The underside (10a) of the plate spring is convex between the foot-insert and the free end of the plate spring. The top side (10b) of the plate spring forms a saddle (14) in the rear end part, for supporting part of the bottom arm of the foot-insert. The top C-shaped limb has a foot adapter (30) detachably joined to the leg prosthesis.
Patent TW-341632-B (TW)
Title: Bipode joint
Inventor: FLOREA DUDITZA 6JPROFESSOR
IPC: F16D3/24
Filed: 1997-03-21
Granted: 1998-10-01
Abstract: A bipode joint comprising: a first joint part with a first longitudinal axis and with two arms extending at a right angle relative to the first longitudinal axis, the arm axes of the arms being positioned in a plane containing the first longitudinal axis; rollers supported on the arms; a second joint part with a second longitudinal axis and a central cavity accommodating the first joint part, two opposed first running faces opening towards the cavity, the running faces extending parallel to the second longitudinal axis and supporting the rollers with outer faces, the running faces of the second joint part being planar faces extending parallel relative to the second longitudinal axis and relative to one another; and the first joint part including first connecting means and the second joint part including second connecting means; supporting faces following the first running faces in the radial direction towards the second longitudinal axis, the supporting faces being cylindrical partial faces of a hollow cylinder whose cylinder axis is formed by the second longitudinal axis; supplementary running faces following the supporting faces towards the second longitudinal axis, the supplementary running faces extending parallel relative to the first running faces and positioned at a greater distance from one another than the running faces; the rollers being supported on the running faces, the rollers including cylindrical outer faces; spherical zones on the rollers for radially supporting the first joint part on the supporting faces of the second joint part, the spherical zones having a ball radius which is centered on the first longitudinal axis and which corresponds to a radius of the supporting faces; a cylindrical transmitting face on the rollers following each of the spherical zones in the radial direction towards the first longitudinal axis, the cylindrical transmitting face centered on the arm axis and guided between the supplementary running faces of the second joint part and is supported on the supplementary running faces.
Patent TW-363153-B (TW)
Title: Method for accessing memory
Inventor: MCINTYRE KENNETH L JR
IPC: G06F13/42
Filed: 1997-06-04
Granted: 1999-07-01
Abstract: A data processing system has a high performance chip select (HPCE) signal, which is functionally programmable to remain asserted for a predetermined number of bus cycles based on an access duty cycle. Bits in an option register allow the user to program HPCE for maintained assertion always, never, of for a number of cycles after a last valid address match, which allows the user to determine the trade-off between high speed access and low power consumption. The data processing system also provides programmable chip select signal negation one bus cycle before the end of a transaction, giving an external device additional time to disconnect from the current bus cycle before the start of the next bus cycle. A data processing system also has a burst address generator (BAG), with a programmable transaction mode applicable to both cache and pre-fetch architecture types.
Patent TW-324075-B (TW)
Title: Phase-shifting mask border region pattern alignment method
Inventor: TZY SAN-DER
IPC: G03F9/00
Filed: 1997-06-28
Granted: 1998-01-01
Abstract: A phase-shifting mask stricture comprises of: (1) One mask substrate; (2) One pattern region formed on the mask substrate; (3) One border region formed on the mask substrate and the pattern region outside, in which the border region approximated is formed as polygon, and one side adjacent with the pattern region has multiple turnings; (4) Multiple first contact windows formed in the border region, whose distribution method is based on each turning of the border region, extending to outside and two lateral sides in same space.
Patent TW-382617-B (TW)
Title: Process for the recovery of sulfur from SO2 containing gases
Inventor: LAGAS JAN ADOLF
IPC: B01D53/86
Filed: 1997-08-27
Granted: 2000-02-21
Abstract: The invention relates to a process for recovering sulfur from an SO2 containing gas stream through catalytic conversion thereof to elemental sulfur, comprising converting SO2 and H2S in the presence of liquid sulfur and a catalyst system based on a heterogeneous catalyst which catalyzes the Claus reaction, while as promoter for the Claus reaction a basic nitrogen compound is present in the liquid sulfur.
Patent TW-376431-B (TW)
Title: Roll body cycle path structure of linear motion roll bearing
Inventor: SI GUO-YI
IPC: F16C29/04
Filed: 1997-09-03
Granted: 1999-12-11
Abstract: A roll body cycle path structure of linear motion roll bearing comprises a linear load path, and a rotation path on the two sides which is connected to a linear no-load path. A roll body can perform an unlimited cycle motion in this loop. This invention makes a breakthrough on the tangential segment connection technique of curve in a conventional geometrical method wherein a roll body starts from a motion point, makes reference to the variation of a centripetal acceleration, and uses the curvature as the main design parameter to connect the segments into a close cycle loop. The cycle loop is mainly characterized in that: the curvature of the whole loop maintains a continuous variation in addition to the continuous variation of the slope at each point; such that the continuous variation of curvature is used to eliminate a rapid variation of the centripetal acceleration when the roll body enters the cycle path from the connection path, in order to reduce the impact force and the slippage friction of the roll body on the cycle path and the noise generated by vibration.
Patent TW-436267-B (TW)
Title: Semifluid, seasoning and/or colouring, binding foodstuff
Inventor: AMMEDICK-NAUMANN CLAUDIA
IPC: A23L23/00
Filed: 1997-10-07
Granted: 2001-05-28
Abstract: The invention relates to a semifluid, seasoning and/or colouring, binding foodstuff comprising an oil-in-water emulsion including ungelatinized starch and a vegetable powder or fruit powder in a finely divided form containing cell wall and/or fibre, which is not completely soluble in the water phase.
Patent TW-388799-B (TW)
Title: Apparatus for, and method of, automated production, and/or packaging and/or testing of fiber optic devices including optical fiber system components and optical fibers
Inventor: BLOOM CARY
IPC: G01M11/02
Filed: 1997-11-04
Granted: 2000-05-01
Abstract: A system for automated production of a fiber optic device includes a chamber regulating an environment and/or atmosphere within for the automated production of the fiber optic device. The system also includes a sealable with the chamber and substantially sealing the environment and the atmosphere of the chamber. The sealable inlet accepts an optical fiber for pass through into the chamber. A movable holding stage is included within the chamber, including at least one clamp to be secured to the optical fiber. An energy source is disposed within the chamber, and used to supply energy to the optical fiber. The system also includes a gripping device within the chamber. The gripping device includes a cavity adapted for accommodating the optical fiber and for securing thereto. The gripping device is also adapted to transport the optical fiber from the sealable to the movable holding stage and to a predetermined position to receive the energy supplied by the energy source.
Patent TW-386940-B (TW)
Title: Laminar product comprising fibrous material and a thermosetting resin mixture, process for manufacturing same, fibrous material for use in same, and commodityobtained with the aid of same
Inventor: KROEZEN ANTONIUS BERNARDUS J
IPC: B29B15/12
Filed: 1997-11-14
Granted: 2000-04-11
Abstract: The invention relates to a laminar product comprising fibrous material and a thermosetting resin mixture as matrix, and is characterized in that the fibrous material does not contain a binder and is composed of discontinuous fibres, some of which are oriented virtually perpendicularly to the plane of the sheet. The invention also relates to a process for the preparation of the laminar product.
Patent TW-367597-B (TW)
Title: Base unit structure for packaging of integrated circuit and manufacturing method thereof
Inventor: ZHAN QIAN-CAN
IPC: H01L23/02
Filed: 1997-11-24
Granted: 1999-08-21
Abstract: A kind of base unit structure for packaging of integrated circuit and manufacturing method thereof which the main structure is to pre-bury the metal lead frame in an integrated packaging base unit. The steel mold employs the terminals of metal lead frame as the parting line and the lower mold has the cavity associated with the metal lead frame. The depth of cavity is smaller or equal to the thickness of metal lead frame so that the metal lead frame will be enclosed in the plastic and the internal terminal will be exposed out of the plastic surface. The packaging base unit made by the said method, the metal lead frame thereof is injection molded once in the plastic so that the process is simple and fast and cost-saving.
Patent TW-387024-B (TW)
Title: Plush fabric capable of generating long/short piles, pill-like fabric and method of production thereof
Inventor: KASAOKA KATSUYUKI
IPC: D03D15/567
Filed: 1998-04-03
Granted: 2000-04-11
Abstract: A plush fabric with short cut piles made of a synthetic multifilament yarn which is an intermingled yarn comprised of (a) a crimped multi-filament yarn and (b) a non-crimped highly heat-shrinkable multifilament yarn having a heat shrinkage larger than that of the crimped multifilament yarn (a), and having thick portions and thin portions, alternately occurring along the length of each constituting filament of the yarn (b), said thick portions having a heat shrinkage larger than that of said thin portions. When heat-treated, the cut pile fabric provides a high-and -low cut pile fabric having a unique appearance. Especially when tip portions of cut piles of the crimped multifilament yarn (a) are entangled with each other, a cut pile fabric having a rugged surface with lumps of snarled piles is obtained.
Patent TW-371638-B (TW)
Title: Actuating tool
Inventor: KARLE OTMAR
IPC: B25B13/54
Filed: 1997-12-22
Granted: 1999-10-11
Abstract: The invention relates to an actuating tool applicable to a multisided fastening element such as screw or bolt; which embraces an actuating head conformable with the configuration of multi-side element, on the head there is a recess (17) for accommodating a spring ring (21), the spring ring is braced on the walls (41,43) of the recess (17).
Patent TW-348055-B (TW)
Title: Quick cooking pasta
Inventor: ELAINE REGINA WEDRAL
IPC: A23L7/109
Filed: 1998-03-21
Granted: 1998-12-21
Abstract: A process of preparing a shelf stable pasta having a moisture content of from about 15 to about 28% which comprises preparing a fresh pasta, steaming the fresh pasta, applying a humectant to the steamed fresh pasta, partially drying to a moisture content of from about 15 to about 28%, and packaging the pasta in a container under modified atmospheric or vacuum conditions.
Patent TW-366526-B (TW)
Title: A mass production of silicon dioxide film by liquid phase deposition method
Inventor: LEE MING-KWEI
IPC: H01L21/208
Filed: 1998-04-30
Granted: 1999-08-11
Abstract: Since the liquid phase deposition (LPD-SiO2) method for the growth of silicon dioxide film has many advantages such as low-cost, low deposition temperature, selective growth, and etc. It has a potential in integrated circuits (IC) fabrications. Nowadays, a trend to large wafer size and large area production in IC fabrication is essential. This invention develops a deposition system which is "two wafers held vertically in a slotted Teflon boat" with a "proper and short distance between wafers". We have successfully carried out the mass production of 20 pieces of 5-inch wafer with this deposition system. The thickness uniformity between wafer to wafer is about 2.2% to 4.7% which meets the demand of the industry mass production.
Patent TW-410492-B (TW)
Title: Connection element for HF cable
Inventor: FRECH FRIDOLIN ALOIS
IPC: H01R4/24
Filed: 1998-05-16
Granted: 2000-11-01
Abstract: The connecting element (10) for the pair-twisted, insulated, individual conductors (20) of an HF cable (12) has an even number of contact slots (18) with a device arranged in the area of the conductor end for cutting or punching through the insulation (22) of the inserted individual conductors (20). The contact slots (18) of the connection element (10) have arranged in a first part (D) of the slot length (L), the conductor pair zone (24), a catch (30) for each unseparated conductor pair (26). In a second part (E) of slot length (L), the individual conductor zone, are arranged catches (32, 34) for the individual conductors (20). After exposure of the twisted conductor pairs (26) and the individual conductors (20) at the ends, the unseparated conductor pairs (26) are captured in the conductor pair zone (24) and the individual conductors (20) in a contact slot (18). Thus, all captured individual conductors (20) and conductor pairs (26) can be pushed simultaneously, using a closing cap (82), into their contact slot (18) or conductor pair zone (24).
Patent TW-383415-B (TW)
Title: Method of reducing the formation of watermarks on semiconductor wafers
Inventor: RAMACHANDRAN RAVIKUMAR
IPC: H01L21/304
Filed: 1998-05-22
Granted: 2000-03-01
Abstract: A method for reducing the formation of watermarks includes providing a semiconductor wafer and contacting the semiconductor wafer with a solution containing a watermark reducing amount of at least one cationic surfactant.
Patent TW-397987-B (TW)
Title: Semiconductor memory device having standby array voltage generator
Inventor: YOON SEI-SEUNG
IPC: G11C11/413
Filed: 1998-06-03
Granted: 2000-07-11
Abstract: A semiconductor memory device having a plurality of memory array banks, a plurality of active array voltage generators, a standby array voltage generator and a plurality of switching means is provided. The semiconductor memory device includes a plurality of memory array banks in which information is stored, a plurality of active array voltage generators connected to the memory array banks, for generating predetermined active voltages in response to memory array bank enable signals for activating the memory array banks, a standby array voltage generator for generating a predetermined standby voltage so that the memory array banks are maintained in a standby state for operation, and a plurality of switching means connected between the memory array banks and the standby array voltage generator, for disconnecting the output of the standby array voltage generator from memory array bank in response to memory array bank enable signals fro activating the memory array banks. The power consumption of the semiconductor memory device is reduced.
Patent TW-445745-B (TW)
Title: Joint assembly with multiple degrees of rotational freedom
Inventor: TAN SENG LING
IPC: F16M11/12
Filed: 1998-11-13
Granted: 2001-07-11
Abstract: According to the objects of the present invention, there is provided a simple yet versatile joint assembly that offers multiple degrees of rotational freedom to objects attached to opposing sides of the joint. This joint is provided with a cross-shaped attachment member with the first and second arm both having cylindrical ends. A first and a second bracket each with two holes, are rotatably attached to the ends of the first and second arms respectively by fastening members. When the fastening members are not tightly fastened, rotational movements via the longitudinal axes of the respective arms are allowed for the respective brackets. As the two arms are perpendicularly disposed, there are provided two degrees of rotational freedom for an object attached to the first bracket in relation to a second object attached to the second bracket. For a third degree of freedom, one embodiment provides an additional rotating means which can be attached to one of the brackets.
Patent TW-437137-B (TW)
Title: Means for supplying a high precision current
Inventor: BALES TIM
IPC: G05F1/56
Filed: 1998-10-07
Granted: 2001-05-28
Abstract: The present invention concerns means (30; 50) for supplying a first current (I3) to an external element (3), this current having to be supplied with high precision at a desired nominal value. The current supply means include a first transistor (T3) through which the first current flows, an operational amplifier (A2) to a first input of which a reference voltage (Vref) is supplied, and to an output of which a control signal from the first transistor is supplied, and an external resistor (Re1; Re2). These means are characterised in that they further include a second transistor (T4) through which a second  current (I4; I4/m) flows, said second current also flowing through the external resistor. Such an arrangement of the means according to the present invention allow the value of the first current to be trimmed with great precision to its nominal value.
Patent TW-366414-B (TW)
Title: Multi-axis gyroscope
Inventor: BURDESS JAMES STONEHOUSE
IPC: G01C19/567
Filed: 1998-10-28
Granted: 1999-08-11
Abstract: The present invention provides a solid-state gyroscope (10) having a primary axis (OZ) and means for detecting cos(n ± 1)θ or sin(n ± 1)θ modes of vibrations, thereby to facilitate detection of rotation about one or more axis, neither of which is the primary axis (OZ).
Patent TW-I234849-B (TW)
Title: Structure and method of controlling short-channel effect of very short channel MOSFET
Inventor: WANN HSING-JEN
IPC: H01L29/78
Filed: 1999-02-11
Granted: 2005-06-21
Abstract: A semiconductor device comprising a gate having an approximately 0.05 mum channel length, an oxide layer below the gate, a self-aligned compensation implant below the oxide layer, a halo implant surrounding the self-aligned compensation implant below the oxide layer; and gate and drain regions on opposite sides of the halo implant and below the oxide layer.