Patent GB-877443-A (GB)
Title: Frequency-shift-keyed system having a minimum frequency shift
IPC: H04L27/227
Filed: 1959-06-29
Abstract: 877,443. Frequency shift radio signalling; automatic phase control systems. COLLINS RADIO CO. June 29, 1959 [Aug, 18, 1958], No. 22265/59. Class 40(5) In a frequency shift communication system, particularly for V.L.F. propagation, alternate digits of a binary signal are separated into two channels each channel including a phase modulator which phase shifts the carrier frequency by 0 degrees or 180 degrees in accordance with the signal component on the respective channel. The local carriers applied to the respective channels are of equal frequency but differ in phase by 90 degrees. In addition, the amplitude of each of the channels is varied in a half-sine wave manner in synchronism with the channel timing and the signals from both channels are added to provide a frequency shifted signal for transmission. The invention is stated to provide minimum frequency shift for a given rate of information transmission. At the transmitter, Fig. 1, the incoming binary signal A, Fig. 2, is synchronized at 11 with a frequency # t  derived from a source 40 which includes the necessary frequency dividers. A pair of gates 16, 26, are opened alternately so that each passes alternate digits, control pulses C, D, at a repetition frequency #<SP>t</SP>/2 being provided from a divider 41. Circuits 17, 27, store the information received from their respective channels for periods 2T, Fig. 2, E, F, and supply respective phase modulators 18, 28, which also receive a carrier frequency # o  from the source 40, the frequency # o  supplied to the modulator 28 being phase shifted by 90 degrees at 39. Each phase modulator phase shifts the carrier by 0 degrees or 180 degrees according to its input signal, and thus the equivalent phase shift in the modulator 28 is 90 degrees or 270 degrees, Fig. 2, G, H. A sine wave at a frequency of #<SP>t</SP>/4 is derived from the dividers 41, 44, and low-pass filter 46 and is full-wave rectified in circuits 48, and after a 90 degrees phase shift is full-wave rectified in circuit 47. The rectified waves, including the direct current components, are supplied to respective amplitude modulators 19, 29 which also receive an input from the respective phase modulator 18 or 28, and the outputs I, J, of the amplitude modulators are added at 36 to provide a resultant frequency shifted wave K, M, and supplied to a transmitter 37. At the receiver, Fig. 3, a frequency # o  is generated at 80 and is phase-locked to an unmodulated carrier wave at frequency # o  which is transmitted for short periods at intervals of say fifteen minutes. The incoming signal is supplied to a phase control means 81 together with the local carrier frequency # o  and the resulting phaselocked carrier is supplied to a phase detector 56 and with a 90 degrees phase shift to a phase detector 66, the two phase detectors being connected to the output of the receiver 52. Figs. 4, A and B show the respective outputs of the phase detectors. In order to improve reliability a weighting function in accordance with the known amplitude form of the transmitted signals is applied to the received signals, and in addition the signals are integrated over a period 2T. The weighting functions are generated from a sine wave of frequency #<SP>t</SP>/4 derived from a pulse generator 90 and supplied to an amplitude modulator 58, after full wave rectification at 96, Fig. 4C, and to an amplitude modulator 68 after rectification at 94 and 90 degrees phase shift at 93, Fig. 4D. A circuit 87 phase-locks the weighting function waves with the corresponding phase detector outputs. The outputs E, F of the amplitude modulators 58, 68 are integrated at 59, 69, Fig. 4, G, H, and at the end of each period 2T circuits 60, 70, sample the polarity of their corresponding integrator circuit and discharge it back to a zero condition. The resultant short duration staggered pulses I, J, are supplied to a bistable circuit 76 which reconstructs the original binary modulating signal as shown at K. The arrangement may be incorporated in a time division multiplex system, Figs. 5 and 8 (not shown). Automatic phase control. At the receiver, the locally generated carrier of frequency # o  with a phase error #is supplied via terminal 83 of the phase control means 81, Fig. 6, to a phase detector 132 where it is compared with the incoming synchronizing signal of frequency # o . The output of the phase detector 132 is passed via a low pass filter 133, and D.C. amplifier 134 to a relay 136. Due to the long time constant of the filter 133 the relay contacts 137 are closed only when the synchronizing signal is received for a period of at least one second, thus preventing operation by noise or stray signals. Operation of the contacts 137 connects the synchronizing signal to a phase detector 141, the local carrier being applied to the phase detector 141 via a phase shifter 131, and the output of the phase detector, through a D.C. amplifier 144 operates a motor 146 controlling the phase shifter 131 until a null position is found, the output # o  being taken from terminal 84. In the time base synchronizer 87, Fig. 10 (not shown) a full wave rectifier receives the output at a frequency #<SP>t</SP>/2 of one of the phase detectors, e.g. 56, providing an output waveform similar to C, Fig. 4, which is supplied to a pair of gates opened alternately at a frequency #<SP>t</SP>/2 derived by frequency division from the frequency M# t  supplied by the source 80 via a controllable phase shifting circuit. When the system is correctly adjusted, the switching of the gates occurs at the instants of transition of the rectified phase detector output and the gates pass alternate and identical half-cycles which have equal direct current components passed via low pass filters to a subtracting circuit. In this condition no output is obtained from the subtracter. If the frequency M# t  has a phase error # a corresponding D.C. output having a polarity dependent on the direction of misadjustment is obtained from the subtracter, which drives a motor to control the phase shifter and effect the required adjustment.