baber/WOPTO huggingface dataset:
Patent TW-451327-B (TW)
Title: Dual damascene process
Inventor: TZENG HUA-JOU
IPC: H01L21/28
Filed: 2000-11-06
Granted: 2001-08-21
Abstract: The present invention provides a dual damascene process which forms a conductor layer in the semiconductor substrate and forms a dielectric layer on the substrate and the conductor layer. The dielectric layer is first defined, and in which a trench is formed. A polymer planarization layer is formed on the dielectric layer and fills the trench. A patterned photoresist layer is formed on the planarization layer. The patterned photoresist layer is used as a mask to remove a part of the planarization layer and the dielectric layer such that a via is formed therein. After the photoresist layer and the planarization layer are removed, a metal layer is filled in the trench and the via to accomplish the dual damascene process.
Patent TW-567061-B (TW)
Title: Unitary absorbent cores having profiled strata and improved fluid absorbency performance
Inventor: ERSPAMER JOHN P
IPC: D04H13/00
Filed: 2001-02-01
Granted: 2003-12-21
Abstract: Disclosed are absorbent structures having y-directional profile in density and superabsorbent polymer particle content. The structures include zones having higher density and higher superabsorbent polymer particle content and zones having lower density and lower superabsorbent polymer particle content. Also disclosed are methods for preparing absorbent structures having y-directional profile in density and superabsorbent polymer content.
Patent TW-465148-B (TW)
Title: Method for making socket connector
Inventor: LI YU-SUNG
IPC: H01R12/58
Filed: 2000-11-21
Granted: 2001-11-21
Abstract: A method for making a socket connector for connecting a CPU module to a circuit board includes the steps of (1) attaching a conductive film to a first face of an insulative plate to form a laminate, the insulative plate defining at least an array of bores therein; (2) photo-etching or laser-etching the conductive film to remove the conductive film with a portion thereof left in the laminate corresponding to each bore of the insulative plate, the portion of the conductive film having a base section attached to the first face of the insulative plate and a beam section extending from the base section over the corresponding bore; and (3) performing a second forming process to bend each beam section through the corresponding bore and partially extending over a second face of the insulative plate to be opposite the base section, the beam section being spaced from the second face of the insulative plate for resilient deformation in engaging the CPU module. A further step of attaching a solder ball to each base section may be selectively taken for surface mounting the socket connector to the circuit board.
Patent TW-I280272-B (TW)
Title: Conditioning of through holes and glass
Inventor: CARANO MICHAEL V
IPC: C25D7/00
Filed: 2000-12-07
Granted: 2007-05-01
Abstract: A composition and method for cleaning and conditioning a non-conductive surface defined by a through hole in a printed circuit board (PCB) is disclosed. The through hole surface is contacted with the composition of the invention to provide a cleaned and conditioned surface. The clean and conditioned surface is coated with conductive carbon particles (usually graphite) to provide a carbon-coated surface. The carbon-coated surface is electro plated and then soldered using hot solder. Those surfaces that have been soldered and also treated with the composition of the invention exhibit fewer blow hole problems. The composition of the invention comprises carbonates, binders, and resins, and combinations thereof, that improve the adhesion and coverage of a coating containing graphite to a surface defined by a through hole bore or other substrate. (""Through holes"" as used herein refers both to through holes and to vias.)
Patent TW-463252-B (TW)
Title: High-frequency MOSFET structure
Inventor: TSAI CHAO-CHIEH
IPC: H01L21/28
Filed: 2000-12-18
Granted: 2001-11-11
Abstract: The present invention provides a high-frequency MOSFET structure and its manufacturing method. The MOSFET comprises: a semiconductor substrate; a gate formed on the semiconductor substrate; source/drain formed on the surface of the semiconductor substrate and at two sides of the gate; a trench gate stack structure covering on the surface of the gate and having a dimension larger than the dimension of the gate; a first insulating layer formed on the surface of the semiconductor substrate and covering on the source/drain; a second insulating layer formed on the surface of the first insulating layer; and a first metal wire formed on the surface of the trench gate stack structure. In accordance with the present invention, the trench gate stack structure directly comes in touch with the first metal wire and the contact area is large. Therefore, the contact resistance is greatly reduced, thereby reducing the gate resistance and increasing the maximum frequency (fmax) of the device to insure the signal amplification capability of the high-frequency MOSFET.
Patent TW-501980-B (TW)
Title: A printhead having different center to center spacings between rows of nozzles
Inventor: TORGERSON JPSEPH M
IPC: B41J2/05
Filed: 2001-01-16
Granted: 2002-09-11
Abstract: An ink jet printhead having a plurality of columnar arrays (61, 62) of ink drop generators that have different center to center spacing along a reference axis. The ink jet printhead further includes ink feed slots (71, 73) that are each fluidically connected to only one columnar array (61, 64) of ink drop generators.
Patent TW-509965-B (TW)
Title: Mixed swing voltage repeaters for high resistance or high capacitance signal
Inventor: HANSON DAVID R
IPC: H03K19/00
Filed: 2000-04-03
Granted: 2002-11-11
Abstract: A method in an integrated circuit for implementing a mixed swing voltage repeater circuit on a signal line having thereon reduced voltage signals. The reduced voltage signals has a voltage level that i below a full swing voltage level. The full swing voltage level represents an internal voltage level at which the integrated circuit operates. The mixed swing voltage repeater circuit is configured to be coupled to the signal line and has an input node coupled to a first portion of the signal line for receiving a first reduced voltage signal and an output node coupled to a second portion of the signal line for outputting a full swing voltage signal. The method includes coupling the input node to the first portion of the signal line, the input node being coupled to an input stage of the mixed swing voltage repeater circuit, the input stage being configured to receive the first reduced voltage signal on the signal line. The input stage is also coupled to a level shifter stage that is arranged to output at least one level shifter stage control signal responsive to the first reduced voltage signal, a voltage level of the at least one level shifter stage control signal being higher than a voltage level associated with the first reduced voltage signal. The method also includes coupling the output node to the second portion of the signal line. The output node also is coupled to an output stage of the mixed swing voltage repeater circuit. The output stage is configured to output the full swing voltage signal on the output node responsive to the at least one level shifter stage control signal.
Patent TW-540207-B (TW)
Title: Transmission member handling priority packets supported by single chip buffer structure and virtual area network label
Inventor: LIN YING-CHIAN
IPC: H04L29/06
Filed: 2001-01-31
Granted: 2003-07-01
Abstract: The present invention provides a transmission member handling priority packets supported by single chip buffer structure and virtual area network label, wherein the network data packets can be separated as high priority packets and low priority packets. In the member, the high priority packets is transmitted in priority than the low priority packets to be compliant with the actual priority requirement, and by continuously transmitting the packets to maintain the high transmission efficiency. Furthermore, the transmission member according to the present invention is compatible with different kinds of chip structures, so it needs not to replace the hardware when applying to different chip structures.
Patent TW-494703-B (TW)
Title: Car speaker
Inventor: NAKADA TSUYOSHI
IPC: H04R9/02
Filed: 2001-02-13
Granted: 2002-07-11
Abstract: The damper installation wall part (40) installed on the narrower diameter side of the speaker shape of the frame (1) and extending towards inside of the radial direction is made with its external diameter longer than the diameter of the attached damper. A ring-shaped hat-shade-like hazard wall part (41) that surrounds the damper (8) is formed in one mold at the position extending from the front side of the frame (1) towards the axial direction and pulling away from the periphery of the damper (8) on the periphery of the damper installation wall part (40).
Patent TW-493131-B (TW)
Title: Electronic commerce transaction system and method
Inventor: CHEN SZ-YUAN
IPC: G06Q20/04
Filed: 2001-03-20
Granted: 2002-07-01
Abstract: An electronic commerce transaction system and method is primarily an electronic commerce payment system effectively integrating membership functions, electronic commerce cash flow, merchandises flow and data flow. The payment scheme of the system goes through the member account management, member transaction code authentication and direct security encryption scheme between cardholder and the system to solve the authorization issue of instant credit card payment in the current electronic commerce cash flow. Meanwhile, generate the credit card invoice file in accordance with the merchandise flow status of each product item in the purchase order to fully solve the reimbursement issue as a result of unavailable goods for the purchase order and payment issue for partial shipment in electronic commerce, securing the network purchasing right of consumers.
Patent TW-518845-B (TW)
Title: Method of erroneous data correction for full response channel system
Inventor: SHIE JIA-HUNG
IPC: G11B20/10
Filed: 2001-03-30
Granted: 2003-01-21
Abstract: A method of erroneous data correction for a full response channel system comprises: obtaining a read signal from a storage medium; converting the read signal into a bit data; recording the bit data in a NRZI format in the storage medium (e.g. a DVD disk); using a Viterbi detection method to determine whether a conversion of the bit state in the bit data has taken place in a predetermined continuous length limited region, and changing the bit value of the bit status conversion took place in the predetermined continuous length limit region in the changed bit data if the conversion taken place in the predetermined continuous length limit region is violated.
Patent TW-I282829-B (TW)
Title: Alkaline pulp having low average degree of polymerization values and method of producing the same
Inventor: SEALEY JAMES E II
IPC: D01F2/00
Filed: 2001-05-04
Granted: 2007-06-21
Abstract: The present invention provides compositions, useful for making lyocell fibers, having a high hemicellulose content, a low copper number and including cellulose that has a low average degree of polymerization (D.P.) and a narrow molecular weight distribution. Further, the present invention provides processes for making compositions, useful for making lyocell fibers, having a high hemicellulose content, a low copper number and including cellulose that has a low average degree of polymerization and a narrow molecular weight distribution. The present invention also provides lyocell fibers containing a high proportion of hemicellulose.
Patent TW-561144-B (TW)
Title: Process and device for catalytic conversion of a substance
Inventor: HUMS ERICH
IPC: C10L1/12
Filed: 2001-05-09
Granted: 2003-11-11
Abstract: For the conversion of a substance in a gas flow (A), it is feeded into a reaction space (2), and the substance (NO) is exposed to the action of catalytic effecting material (K, KU). With the gas flow (A), into the reaction space (2) is supplied with an agent (S) which is the catalytic effecting material (K, KU), or can be formed by the catalytic effecting material (K, KU). Preferably, the agent (S) is mixed with the fuel (B). In its burning, the substance (NO) contained in the gas flow (A) is produced as exhaust gas. In the method for reactivating a deactivated catalyst module (3), the catalyst module is moistured with an agent (S), which is a fresh catalytic effecting material (KU), or contain this material, or able be deposited from such material. Both methods are especially based on the principle of selective catalytic reduction, and can be used to decompose the nitrogen oxide (NO) in the waste gas (A). It also mentions a fuel (B) containing an agent which is the catalytic effecting material, or produced from the catalytic effecting material (KU) when it is burned.
Patent TW-588556-B (TW)
Title: Method of using a cellular phone to send voice email
Inventor: LIU MICHAEL
IPC: H04Q1/00
Filed: 2001-05-15
Granted: 2004-05-21
Abstract: The present invention provides a method of using a cellular phone to send voice E-mail. The sender first uses a handset to send edited email addresses of the sender and receiver to a designated voice email service center via a short message service, and obtains the mail serial number responded from the voice email service center. Then, the sender dials the handset to connect to the voice email service center. Based on the prompt provided by the voice email service center, the sender presses keys to input the mail serial number just received and leaves a voice message to complete the transmission of voice email, thereby allowing the receiver to select the received voice message files in his/her email box for playing the voice message directly from the computer speaker.
Patent TW-554369-B (TW)
Title: Plasma picture screen with protective layer
Inventor: BACHMANN PETER KLAUS
IPC: H01J11/12
Filed: 2001-06-14
Granted: 2003-09-21
Abstract: The invention relates to a plasma picture screen with a protective layer (5) made of materials having a low electron affinity and a high resistance to sputtering. A plasma picture screen provided with a front plate (1) comprising a glass plate (3) on which a dielectric layer (4) and a protective layer (5) are provided, with a carrier plate (2) provided with a phosphor layer (9), with a ribbed structure (12) which subdivides the space between the front plate (1) and the carrier plate (2) into plasma cells, which are filled with a gas, and with one or several electrode arrays (6, 7, 10) on the front plate (1) and the carrier plate (2) for generating corona discharges in the plasma cells, characterized in that the protective layer (5) comprises a material chosen from the group of crystalline diamond, AlN, AlGaN, BN, and tetrahedral amorphous carbon.
Patent TW-508726-B (TW)
Title: Semiconductor device having multi-layer copper line and method of forming the same
Inventor: PARK KI-CHUL
IPC: H01L21/3205
Filed: 2001-07-03
Granted: 2002-11-01
Abstract: A semiconductor device includes at least two metal lines each being made of a copper layer, in which a recess is concavely forming an interface between a lower metal line and a via contact. A barrier layer is formed on a center of the interface, and copper layers of the via contact and the lower metal line are directly connected to each other around the interface, i.e. a corner part where a sidewall of the via contact and the lower metal line intersect. If the upper metal line and the via contact are subject to a dual damascene method, bottom and lateral of the upper metal line and a lateral of the via contact are formed at the same time as the barrier laver is formed.
Patent TW-508852-B (TW)
Title: Power supply device
Inventor: ODA TAKASHI
IPC: H01M10/60
Filed: 2001-07-13
Granted: 2002-11-01
Abstract: The power supply device has a plurality of power modules, a holder-case housing a parallel arrangement of power modules in a plurality of rows and columns, and a fan. The interior of the holder-case is divided into a plurality of partitions by walls. Wall surfaces follow the contours of power module surfaces to establish cooling ducts of uniform width. The holder-case has flow inlets opened through the first surface plate and exhaust outlets opened through the second surface plate. The power supply device uses the fan to divide and induce air flow through flow inlets into a plurality of partitions, and expels air which has passed through cooling ducts out the exhaust outlets thereby cooling power modules disposed inside the partitions.
Patent TW-I248035-B (TW)
Title: Image reading apparatus
Inventor: IIHAMA TOMOMI
IPC: G06V30/144
Filed: 2001-08-02
Granted: 2006-01-21
Abstract: Provided is a two dimensional image reading apparatus capable of releasing appropriately the static electricity charged in a target object to be detected, which is disposed on a photosensor device, so as to markedly suppress the malfunction of reading and breakage of the device.
Patent TW-I281858-B (TW)
Title: Pharmaceutical combination of angiotensin II antagonists and angiotensin I converting enzyme inhibitors
Inventor: BOHM PETER
IPC: A61K31/401
Filed: 2001-08-20
Granted: 2007-06-01
Abstract: The invention relates to a method of treatment of indications which can be positively influenced by inhibition of AT1 mediated effects with maintenance of AT2 receptor mediated effects of Angiotensin II and by ACE inhibition, thus also increasing bradykinin mediated effects, e.g. to reduce the incidence of stroke, acute myocardial infarction or cardiovascular death, or of indications associated with the increase of AT1 receptors in the sub-epithelial area or increase of AT2 receptors in the epithelia, comprising co-administration of effective amounts of an Angiotensin II antagonist and an ACE inhibitor, pharmaceutical compositions containing an Angiotensin II antagonist together with an ACE inhibitor and the use of an Angiotensin II antagonist and an ACE inhibitor for the manufacture of corresponding pharmaceutical compositions.
Patent TW-516228-B (TW)
Title: Optoelectronic component with many luminescent diode-chips
Inventor: ARNDT KARLHEINZ
IPC: H01L25/075
Filed: 2001-08-23
Granted: 2003-01-01
Abstract: A component (1) with many luminescent diode-chips in a reflector (3) is formed, so that the direct visible line between the luminescent diode-chips (5) is broken by an inter-wall (11). Thus the efficiency of the component (1) is improved greatly.
Patent TW-567350-B (TW)
Title: Method for repairing of image display apparatus, film for repairing, and image display apparatus
Inventor: IWABUCHI SHIROYUKI
IPC: G02F1/1335
Filed: 2001-10-23
Granted: 2003-12-21
Abstract: When a defect so called dot chipping occurs in one display element of a liquid crystal display apparatus (101) with a plurality of display elements being arranged thereon, a film for repairing (1) is attached on the image display surface of a liquid crystal display apparatus (101) and a prism portion (2) having a cross-section on which peaks (2a) of isosceles-triangle-shape and troughs (2b) are alternately provided, so that some rays of light emitted obliquely from normal display elements are refracted and synthesized at the prism portion (2) to go perpendicularly to the film for repairing (1).
Patent TW-538520-B (TW)
Title: Silicon controlled rectifier electrostatic discharge protection device with external on-chip triggering and compact internal dimensions for fast triggering
Inventor: AVERY LESLIE R
IPC: H01L27/092
Filed: 2001-11-06
Granted: 2003-06-21
Abstract: A silicon controlled rectifier electrostatic discharge protection circuit with external on-chip triggering and compact internal dimensions for fast triggering. The ESD protection circuit includes a silicon controlled rectifier (SCR) (202) having an anode (122) coupled to the protected circuitry and a cathode (124) coupled to ground, where the cathode has at least one high-doped region (312m). At least one trigger-tap (401) is disposed proximate to the at least one high-doped region and an external on-chip triggering device (205) is coupled to the trigger-tap and the protected circuitry.
Patent TW-548588-B (TW)
Title: Branch handling for single instruction multiple datapath processor architectures
Inventor: REDFORD JOHN L
IPC: G06F9/44
Filed: 2001-11-09
Granted: 2003-08-21
Abstract: A method of determining whether datapaths executing in a computer program should execute conditional processing block includes determining whether processor enable (PE) states of all of the datapaths are disabled, and branching around the conditional processing if the PE states of all of the datapaths are disabled. Branching is not performed, even if the PE states of all of the datapaths are disabled, if the program is determined to be deterministic. That determination is made by evaluating the state of a deterministic bit. Instructions are also provided for carrying out the determining and branching operations. The instructions may also be combined with operations that maintain the PE states during conditional processing.
Patent TW-548837-B (TW)
Title: Trench capacitor, memory cell, method for fabricating a trench capacitor and method for fabricating a memory cell
Inventor: SCHUMANN DIRK
IPC: H01L27/12
Filed: 2002-02-27
Granted: 2003-08-21
Abstract: The present invention relates to a trench capacitor for use in a DRAM memory cell and to a method for fabricating a trench capacitor of this type. The trench capacitor according to the invention comprises a lower capacitor electrode (10), a storage dielectric (12) and an upper capacitor electrode (18), which are at least partially arranged in a trench (5), the lower capacitor electrode (10) adjoining, in the lower region, a wall of the trench, while in the upper trench region there is a spacer layer (9) which adjoins a wall of the trench and is made from an insulating material, and the upper electrode (18) comprising at least two layers (13, 14, 15), of which at least one is metallic, with the proviso that the upper electrode does not comprise two layers of which the lower layer is tungsten silicide and the upper layer is doped polysilicon, the layers (13, 14, 15) of the upper electrode in each case extending along the walls and the base of the trench (5) up to at least the upper edge of the spacer layer (9).
Patent TW-535307-B (TW)
Title: Package of light emitting diode with protective diode
Inventor: CHEN TZE-PENG
IPC: H01L25/16
Filed: 2002-03-04
Granted: 2003-06-01
Abstract: A package structure of a light emitting diode (LED) accompanying with a protective diode is disclosed. The flipped LED chip with a p and an n electrode on the same side is, respectively, bonded to an n electrode of a Zener diode and a silicon substrate. The p electrode on the opposite surface side of the Zener diode and the silicon substrate are then bond to a metal conductor which has a good electrical and heat dissipation properties therefrom connecting to the n electrode of the LED.
Patent TW-565771-B (TW)
Title: Method, apparatus, and system to enhance an interface of a flash memory device
Inventor: KENDALL TERRY L
IPC: G06F3/06
Filed: 2002-03-19
Granted: 2003-12-11
Abstract: The present invention is in the field of flash memory. More particularly, embodiments of the present invention can enhance an interface of a flash memory device by increasing the number of operations performed per transmission from a media management system. Further, some embodiments of the invention are designed to interface the flash memory device and media management controller via an interconnection attachment and/or driver common to a second type of data storage device, such as a hard drive.