baber/WOPTO huggingface dataset:
Patent TW-473518-B (TW)
Title: Soluble chromophores containing solubilising groups which can be easily removed
Inventor: HALL-GOULLE VERONIQUE
IPC: C09B69/08
Filed: 1996-07-06
Granted: 2002-01-21
Abstract: Compounds of formula A(B)x (I), wherein x is an integer from 1 to 4, A is the radical of a chromophore of the quinacridone, anthraquinone, perylene, indigo, quinophthalone, isoindolinone, isoindoline, dioxazine, phthalocyanine, diketopyrrolopyrrole or azo series, which radical A contains x N-atoms linked with B, preferably with at least one immediately adjacent or conjugated carbonyl group. B is a group of formula and, if x=2, 3 or 4, can also be one, two or three hydrogen atom(s), and wherein Q is a group of formula. These soluble chromophores can be readily converted to the corresponding pigments by heating, even in the substrate into which they can be incorporated without any difficulty in dissolved form. R1-R8 are as claimed in claim 1.
Patent TW-389741-B (TW)
Title: Hydrogen cyanide process and apparatus therefor
Inventor: COWELL CHRISTOPHER
IPC: C01C3/02
Filed: 1996-09-05
Granted: 2000-05-11
Abstract: A catalytic process and apparatus therefor for the manufacture of hydrogen cyanide. In the process an oxygen rich oxidant stream and at least one oxidant-free feed stream containing methane and ammonia are separately preheated and rapidly mixed to form a detonable mixed stream at a temperature which is at least 50 DEG C below the autoignition temperature of the mixed stream. The mixed stream is then conveyed to a catalyst capable of catalysing the formation of hydrogen cyanide at such a velocity that detonation is avoided. The process is more energy efficient and gives rise to an effluent stream containing more hydrogen than the conventional Andrussow process.
Patent TW-344792-B (TW)
Title: Method for automatically measuring the amount of photo-coupling
Inventor: TZENG JYI-WANQ
IPC: G01J1/42
Filed: 1996-11-06
Granted: 1998-11-11
Abstract: A method for automatically measuring the amount of photo-coupling, which comprises the following steps: (1) positioning a photo-coupling element on a jig; (2) using a program stored in a photo detection instrument to detect whether the photo-coupling element is positioned correctly; (3) continuing the detection if it is not being positioned correctly on the jig; if it has been positioned, separately flowing a plurality of sets of current through the light emitting elements of the photo-coupling element, and storing the data of the generated photo-coupling; (4) analyzing for which current is most suitable for the photo coupling element thereby matching it with a control element of an application device; (5) if the optimum data have been obtained, displaying the data with the photo detection instrument; if the optimum data have not been obtained, displaying an information indicating that the quality of the photo-coupling element is not good; (6) resetting it; (7) removing the photo-coupling element; (8) next, returning to the step (1); thereby, detecting the characteristics of a photo-coupling element prior to assembly, and measuring a suitable impedance of the resistance matching the light emitting element, so that the impedance of the resistance can match with the photo-coupling signal generated by the photo-coupling element thereby matching with the control element of the application device.
Patent TW-362267-B (TW)
Title: Semiconductor device and lead frame therefor
Inventor: KUSAKA KENICHI
IPC: H01L23/28
Filed: 1996-12-19
Granted: 1999-06-21
Abstract: A semiconductor device comprising a semiconductor device comprising a semiconductor chip, a plurality of leads including first inner leads and second inner lead substantially radially extending from a central point of the semiconductor chip, electrical conductors electrically connecting the semiconductor chip to the lead frame and an encapsulating resin for encapsulating the semiconductor chip, the electrical conductors and the inner leads. Each of the first inner leads has a first inner end located in the vicinity of the central point, and each of the second inner leads has a second inner end located remoter than the first inner end from the central point; and the first and second inner leads are substantially alternatively arranged. Thus, the arrangement is such that at least some of the inner leads extend under the semiconductor chip providing heat conducting paths. The lead frame comprises a frame and a plurality of leads supported by the frame and including first inner leads and second inner leads radially extending substantially toward a central point of the frame. The lead frame is applicable in common to mount thereon semiconductor chips of different outer dimensions and a necessary clearance is maintained between said leads.
Patent TW-342313-B (TW)
Title: Method of controlling the growth of weeds and herbicidal compositions
Inventor: GORDON ANDERSON-TAYLOR
IPC: A01P13/00
Filed: 1997-02-05
Granted: 1998-10-11
Abstract: A method of controlling the growth of weeds at a fixed point, which comprises, at that point per hectare, applying: (a) 5 g to 500 g of 4-benzoylisoxazole of the formula (I) (I) in which R is a hydrogen or -CO2R3; R1 is cyclopropyl; R2 is selected from halogen, -S(O)pMe and C1-6 alkyl or haloalkyl; n is 2 or 3; p is 0, 1 or 2; and R3 is C1-4 alkyl; and (b) 30 g to 600 g of acid analogue of bromoxynil which is 3,5-dibromo-4- hydroxybenzylnitrile, or ioxynil which is 4-hydroxy-3,5-diiodobenzylnitrile, or an agriculturally acceptable salt or ester thereof, or a mixture thereof.
Patent TW-419532-B (TW)
Title: Composition of microetching agent for copper or copper alloy
Inventor: KO TAKAHISA
IPC: H05K3/06
Filed: 1997-02-17
Granted: 2001-01-21
Abstract: A microetching composition for copper or copper alloys comprising, (a) nitric acid or sulfuric acid, or both, (b) ferric nitrate or ferric sulfate, or both, (c) at least one component selected from a group consisting of unsaturated carboxylic acids, salts of unsaturated carboxylic acid, and anhydrides of unsaturated carboxylic acid, and (d) water. The composition can produce a copper or copper alloy surface exhibiting excellent adhesion to resins such as prepregs and resists and superior solderability. The composition is suitable for the manufacture of printed wiring boards with highly integrated fine line patterns.
Patent TW-351879-B (TW)
Title: A telephone doubler arrangement
Inventor: TOENNBY INGMAR
IPC: H04M3/428
Filed: 1997-06-03
Granted: 1999-02-01
Abstract: A method for providing telephone service with an Internet access server over an IP link established over a connection on the telephony network, the IP link connects the data communication (4) of the subscriber at present position with an extension of Internet access server disposed on the Internet gate node position, the data communication equipment is joined with the data terminal equipment (2) of the subscriber at the present position, the data terminal equipment provides an IP link with audio transfer program, the IP link is characterized in providing a telephony server within the public access network and access server of the Internet network, the telephony server requests forwarding of calls to the subscriber^s own telephone number to go to the telephony server from which they are transported to over the IP access server.
Patent TW-351850-B (TW)
Title: New contact process using skew contact etching for polysilicide ladder
Inventor: KE JIUN-CHENG
IPC: H01L21/768
Filed: 1997-06-16
Granted: 1999-02-01
Abstract: A method for forming a contact window includes the steps: preparing a substrate with a gate oxide layer deposited thereon; to build on the gate oxide layer a ladder type polysilicide line, in which the polysilicide is composed of polysilicon and silicide, the ladder is formed by means by unevenly etching the silicide; an oxide spacer is constructed along the periphery of the polysilicide; and the oxide spacer is etched to form a skew contact window.
Patent TW-373416-B (TW)
Title: Metal halide lamp and temperature control system therefor
Inventor: KAI MAKOTO
IPC: H05B31/06
Filed: 1997-09-05
Granted: 1999-11-01
Abstract: In a metal halide lamp which includes a discharge tube retaining a fill of mercury and at least one metal halide added as a luminous material, an energy density of the arc discharge portion represented by a product E x j is in the range of 70.0 ≤ E x j ≤ 150.0 (VA/mm<SP>3</SP>) where E=V/d, j=I/S, assuming that I is a lamp current in amperes with a lamp voltage of V volts applied between the paired discharge electrodes in a stable lighting condition of the lamp and that each of the electrodes has a tip face of which a cut area in section is S mm<SP>2</SP> and the gap distance is d in millimeters, and thus a high luminous flux retention rate and high luminance of an arc discharge portion can be accomplished with a longer life of the lamp, suppressing a lamp voltage varying rate, avoiding a change in color temperature, which remarkably improves additional merits as in utilization as a light source in various display apparatuses such as optical projection systems.
Patent TW-363295-B (TW)
Title: Ultraviolet/visible light emitting vertical cavity surface emitting laser and method of fabrication
Inventor: RAMDANI JAMAL
IPC: H01S5/323
Filed: 1998-04-10
Granted: 1999-07-01
Abstract: An ultraviolet/blue/green vertical cavity surface emitting laser (VCSEL) for use in high density data storage that includes the fabrication of a VCSEL structure on a metallic single crystal substrate. The metallic single crystal substrate is utilized as a back reflecting mirror that in conjunction with an aluminum gallium nitride/gallium nitride distributed Bragg reflector serves to increase the overall reflectance of the VCSEL device. The metallic substrate is fabricated of a material such as nickel aluminum, thereby achieving an improved lattice match to the included III-nitride materials.
Patent TW-429673-B (TW)
Title: Differential amplifying circuit and load driving circuit
Inventor: KAWAKITA KEISUKE
IPC: H03F3/21
Filed: 1998-02-11
Granted: 2001-04-11
Abstract: The subject of this invention is to provide differential amplifying circuit with a dynamic range that is higher than the lower power source voltage supply and is lower than the higher power source voltage supply. The solving means of this invention is described as follows. A differential amplifying circuit 10 has the following: a differential amplifying circuit portion 100, which is used to amplify the voltage difference between the inverting phase input node and the non-inverting phase input node; and an output buffer circuit 200, which is used to output the signal from the output node of this differential amplifying circuit portion 100 to the output node. Differential amplifying circuit portion 100 is connected to the first high power source voltage node 1 and the first low power source voltage 2, and is driven by the power source voltage that is added to the first high power source voltage node 1 and the first low power source voltage node 2. Output buffer circuit 200 is connected to the second high power source voltage node 3 and the second low power source voltage node 4, and is driven by the power source voltage that is added to the second high power source voltage node 3 and the second low power source voltage node 4.
Patent TW-406444-B (TW)
Title: Multi-chip module
Inventor: YAMAMOTO KENJI
IPC: H01L25/16
Filed: 1998-03-30
Granted: 2000-09-21
Abstract: The multi-chip module 1 of this invention comprises: a light illumination device 2, one part of its anode or cathode is connected to the power voltage or base voltage; a control circuit 3, which is used to control the electric flux of the light illumination device 2, having the conductive substrate opposed to the light illumination device 2; a lead frame 9, which is to joint the light illumination device 2 and the control circuit 3 on the common island portion 4; and a package piece 5, which is used to tightly seal the light illumination device 2 and the control circuit 3. Therefore the small-scale multi-chip module with high power-dissipation and high illuminance is formed .
Patent TW-390048-B (TW)
Title: Current interrupter for electrochemical cells
Inventor: POIPIER JEFFREY
IPC: H01M50/574
Filed: 1998-04-09
Granted: 2000-05-11
Abstract: A current interrupt mechanism for electrochemical cells is disclosed A thermally activated current interrupt mechanism (38) is integrated into an end cap assembly (10) for an electrochemical cell The thermally responsive mechanism (38) preferably includes a free floating bimetallic disk (40) or shape memory alloy member which deforms when exposed to elevated temperature causing a break in an electrical pathway within the end cap assembly. This prevents current from flowing through the cell and effectively shuts down an operating cell. The thermally responsive mechanism (38) may include a heat producing electrical resistance means, preferably a Zener diode (700), to enhance thermal sensitivity. The end cap assembly (10) may include a pressure responsive mechanism (48) which ruptures when there is extreme gas buildup. Gas is allowed to escape from the cell interior to the external environment through a series of vent apertures (63, 67) within the end cap assembly (10).
Patent TW-393464-B (TW)
Title: Elimination method of iodine compounds from liquid acetic acid.
Inventor: HUANG HAU-RAN
IPC: C07C51/47
Filed: 1998-05-04
Granted: 2000-06-11
Abstract: The invention relates to a method of eliminating iodine compounds from liquid acetic acid. At an adequate flow rate, temperature, and pressure, the process uses a zeolite modified with silver ion to react with iodine containing liquid acetic acid; thus, the iodine compounds are removed from acetic acid. The silver ion modified zeolite is made from a crystal aluminosilicate with silver ion replacement, where the limiting index ranges from 1 to 12 and mole ration of silicon oxide and aluminum oxide is 30-to-1 to 500-to-1.
Patent TW-376607-B (TW)
Title: Global telecommunications system with distributed virtual networks and method of operation therefor
Inventor: OLDS KEITH ANDREW
IPC: H04B7/185
Filed: 1998-06-02
Granted: 1999-12-11
Abstract: In a communication system having low earth orbit (LEO) satellites (210), one or more mission operations control centers (MOCCs) (220), one or more distributed virtual network managers (DVNMs) (230), and several types of customer premises equipment (CPE) (250, 260, 270, and 280), individual service providers (20) are able to control the network services they provide independently from other service providers (20) through local management of the DVNMs (230). A communication system comprising: a central network control center forming a portion of the communication system which controls a set of system functions which affect substantially all other portions of the communication system; and multiple distributed virtual networks forming other portions of the communication system, wherein the communication system is configured so that a first distributed virtual network of the multiple distributed virtual network controls a second set of system functions which affect only first services provided by the first distributed virtual network without affecting second services provided by a second distributed virtual network of the multiple distributed networks.
Patent TW-373146-B (TW)
Title: Apparatus and method for performing semantic concurrency control in dispatching client requests within a server in a client/server computer system
Inventor: FREUND THOMAS
IPC: G06F15/16
Filed: 1998-06-06
Granted: 1999-11-01
Abstract: An apparatus for dispatching client requests for execution by a server object in a heterogeneous object-oriented client/server computing environment, the apparatus has: a request-holding buffer having an input connected to a communications channel which channels the client requests to the apparatus, and an output; a plurality of parallel execution threads connected to the output of the buffer; and a semantic concurrency control means for examining the semantics of a request in the buffer and the semantics of each request presently being executed on any of the plurality of parallel execution threads, and for delaying the request from being dispatched from the buffer to an execution thread if the examined semantics of the requests indicate that such dispatch would cause conflicting access to the server object's resources.
Patent TW-405210-B (TW)
Title: The manufacture method of the shallow trench isolation (STI) structure to avoid producing the microscratch on the surface of the shallow trench isolation (STI) structure
Inventor: LIU WEN-BIN
IPC: H01L21/762
Filed: 1998-06-22
Granted: 2000-09-11
Abstract: A kind of manufacture method of the shallow trench isolation (STI) structure; firstly, form a pad oxide layer and hard mask layer on the substrate and define the pad oxide layer and the hard mask layer, and form a trench on the substrate. Next, form a liner oxide on the surface of the trench; next, form a CVD insulated layer and a HDPCVD insulated layer on the substrate in order, wherein the CVD insulated layer on the surface of the trench is not higher than the surface of the hard mask layer. Then, using CMP to remove the CVD insulated layer on the hard mask layer and the HDPCVD insulated layer. Next, remove the hard mask layer and the pad oxide to complete the shallow trench isolation (STI) structure of this invention.
Patent TW-388920-B (TW)
Title: Shutter mechanism of light irradiation apparatus
Inventor: UENO TAKANAO
IPC: G02B26/02
Filed: 1998-07-09
Granted: 2000-05-01
Abstract: The present invention  provides a shutter mechanism which occupies a smaller area with a shutter plate, does not require a large size shutter drive mechanism, and can effectively cool the shutter plate. The light beam emitted from a light irradiating source is shielded by a shutter plate 11a. The shutter can be opened by moving the shutter plate 11a upward with an air-cylinder 16a. In this case, a cooling nozzle 14a also moves together with the shutter plate 11a, and the center area of the shutter plate 11a is always cooled by the cooling air. The shutter can also be closed by moving a shutter plate 11b upward with an air cylinder 16b. Thereby, the light beam is shielded by the shutter plate 11b. A cooling nozzle 14b moves together with the shutter plate 11b, and the shutter plate 11b is cooled by the cooling air at all times. Next, the shutter can then be opened by moving the shutter plate 11b downward, and the shutter is closed by moving the shutter plate 11a downward.
Patent TW-415060-B (TW)
Title: Manufacturing method of self-aligned via hole in the multilevel interconnects
Inventor: WU HUA-SHU
IPC: H01L21/768
Filed: 1998-08-31
Granted: 2000-12-11
Abstract: This invention relates to a manufacturing method of self-alignment via hole in the multilevel Interconnect, which comprises: providing a semiconductor substrate; forming a connection layer on the semiconductor substrate; removing part of the connection layer to form a sacrificial pillar; forming an isolation layer in between the sacrificial pillar and the connection layer such that the isolation layer and the sacrificial pillar have the same height; and removing the sacrificial pillar so as to form the self-aligned via hole.
Patent TW-408331-B (TW)
Title: A circuit and method for eliminates flash memory arrays
Inventor: CHEN KOU-SU
IPC: G11C16/34
Filed: 1998-10-15
Granted: 2000-10-11
Abstract: A circuit and method for achieving compressed distributions of erased cell threshold voltages in an EEPROM array is disclosed. The invention, when used to condition flash memory cell arrays, results in increased endurance of such arrays, and eliminates the need for pre-programming operations before a bulk erase can take place. By eliminating the need to pre-program the memory array before each erasure, the process provides a significant improvement for low power applications, because battery life is extended and write cycle time is enhanced.
Patent TW-434646-B (TW)
Title: Semiconductor device and method for making the same
Inventor: MIYATA OSAMU
IPC: H01L21/56
Filed: 1998-11-20
Granted: 2001-05-16
Abstract: A semiconductor device comprises a film substrate and a semiconductor chip bonded to the upper surface of the film substrate in a stacked layer manner. The semiconductor chip has a main surface formed with a plurality of terminal pads. The film substrate has a lower surface formed with a plurality of external terminal portions in a matrix pattern, and an upper surface formed with a plurality of wiring patterns for respectively connecting with the external terminal portions. The wiring patterns formed in the upper surface of the film substrate are respectively electrically connected to the terminal pads formed on the main surface of the semiconductor chip.
Patent TW-541796-B (TW)
Title: A method and device for interfacing variable-rate sampled digital audio information to a string of uniform-sized blocks, and a unitary medium so produced by a write-interfacing
Inventor: VERBAKEL JOHANNES MARTINUS MAR
IPC: G10L19/02
Filed: 1998-12-14
Granted: 2003-07-11
Abstract: For mapping sampled digital audio information onto a linear physical mapping space that is partitioned in a string of uniform-sized blocks, in particular for variable-rate coded audio information that is distributed over successive audio units which are each composed from one or more audio packets, each block is supplemented with a block header for indicating an actual content of the block in question with respect to any constituent packet of the audio information.
Patent TW-396549-B (TW)
Title: The flash memory's manufacturing methods
Inventor: CHEN HUEI-HUANG
IPC: H01L21/8247
Filed: 1998-12-19
Granted: 2000-07-01
Abstract: This is a flash memory system production method. This method is to form a stack gate on the substrate memory cell region at first and to form the metal oxide semiconductor capacitor on the peripheral circuit region. A dielectric layer formed on the substrate covers the peripheral circuit region and a thin spacer wall is formed on the side-wall of the stack gate. Then, the hot process is proceeded to drive the dopant in the doping region into the substrate and to oxidize parts of floating gate of the top of the corner in the punch-through oxidation layer of parts of the stack gate.
Patent TW-418419-B (TW)
Title: SOG pipeline system capable of continuous production and its operation procedure
Inventor: LIANG MING-CHENG
IPC: H01L21/00
Filed: 1999-01-11
Granted: 2001-01-11
Abstract: The present invention relates to a SOG pipeline system capable of continuous production and its operation procedure, wherein a buffer tank is installed between a conventional SOG solution tank and a SOG dripping unit, and a plurality of position sensors are installed in the buffer tank for level detection and constant-flow control by a pump, so that SOG in the solution tank can flow into the buffer tank. Meanwhile, the periphery of the buffer tank is installed with a cooling unit so that the buffer tank can be maintained at a low temperature to prolong the life span of the SOG solution and prevent crystallization in the pipeline due to evaporation of the organic solution. The aforementioned structure can achieve a continuous production and avoid an interruption in the production due to a replacement operation of the SOG solution in the conventional process, thereby increasing the economical benefit of the machine. Meanwhile, the present invention can reduce the consumption cost of SOG by alleviating the residual problem of SOG.