Patent GB-990779-A (GB)
Title: Improvements relating to the sensing of marks recorded on a document
IPC: G06K7/016
Filed: 1963-12-02
Abstract: 990,779. Sensing records. INTERNATIONAL BUSINESS MACHINES CORPORATION. Dec. 2, 1963 [Dec. 3, 1962], No. 47401/63. Heading G4M. [Also in Division H3] In a system for sensing marks on a document, each signal produced by a transducer, e.g. a photocell, sensing tuning marks is differentiated to produce a first pulse followed by a second pulse, and means responsive to the amplitude of those pulses provides an output indication when a valid timing mark has been sensed. Each signal produced by transducers sensing data marks is also differentiated, and one or other of the first and second pulses occurs within a given time interval, if the mark is valid. Long-term drift in the photo-cell output is also compensated. Timing circuit. Each output pulse from photocell 26, Fig. 6, derived from column-designating marks on the document, is inverted by transistor 50, differentiated by capacitor 57 and resistor 58, and the two resulting pulses are inverted by transistor 59. The signal on conductor 67 is clamped to a level which is dependent on the steady-state output of photo-cell 26 by means of transistor 72 and diode 73, and only the negative pulse corresponding to the trailing edge of the timing mark is applied to transistor 78. The threshold level at which transistor 78 conducts is adjustably by a potentiometer 83, and is so chosen that erroneous timing pulses are not produced from spurious marks, tears &c. on the document. Transistors 90, 91 of latch circuit 28 are normally conducting and non-conducting respectively. A positive pulse on conductor 85 reverses the states of transistors 90, 91 provided an enabling voltage is present at terminal 100. Terminal 97 rises to earth potential to indicate the sensing of a valid timing mark, and subsequently a positive voltage is applied at terminal 100 from an external circuit to reset latch 28 ready for sensing the next timing mark. Data circuit. The output of photo-cell 22 Fig. 7 is inverted and differentiated as in the timing circuit, and the two pulses produced are inverted by transistor 158 and applied to the base of transistor 159. Conductors 169, 170 are clamped to preselected voltage levels by diodes 186, 187 and transistor 180 in dependence on the steady-state output of photo-cell 22, in a similar manner to that used in the timing circuit. For a normalsized mark, there appears on conductor 169 a positive pulse corresponding to the leading edge of the mark, and on conductor 170 a positive pulse corresponding to the trailing edge of the mark. Latch 24 is identical to latch 28 of the timing circuit, and has its terminal 100<SP>1</SP> connected to terminal 97 of latch 28 through an inverter. Latch 24 may thus be set by a pulse on conductor 169 or 170 during the time that terminal 100<SP>1</SP> is at a negative potential following the sensing of a valid timing mark, i.e. a valid indication of a data mark is obtained if the leading or trailing edge of the mark lies within an index position associated with a timing mark. The circuit also treats as valid a mark which extends right across an index position. The time constant of network 155, 156 is such that capacitor 155 discharges before the trailing edge of such a mark passes photo-cell 22, and the discharging pulse falls within the acceptable time interval.