baber/WOPTO huggingface dataset:
Patent JP-S6293070-A (JP)
Title: Method and device for press-fixing solder ribbon
Inventor: SUZUKI YASUNOBU
IPC: H05K3/34
Filed: 1985-10-17
Abstract: PURPOSE:To press-fix a solder ribbon in a short time and with a high productivity by bending the solder ribbon which has been supplied to the tip of a tool and bringing it to pressure welding to a substrate, and thereafter, cutting the solder ribbon from the joint of the bend part by an ascent of a clamper. CONSTITUTION:As shown in a figure (a), a solder ribbon 16 which has been wound round a ribbon spool 17 is supplied vertically until it is projected a little by a prescribed quantity from the tip of a tool 16. Subsequently, as shown in figures (b), (c), the ribbon 16 which has been projected from the tip of a tool 18 is bent along the lower face of the tool 18 by a bender 40. Thereafter, as shown in figures (f)-(i), the tool 18 is made to descend and the bent ribbon 16 is brought to pressure welding to a substrate 86. Next, as shown in a figure K, the ribbon 16 is clamped by clampers 29, 30 which have been provided on the upper part of the tool 18, and thereafter, the clampers 29, 30 are made to ascend, the ribbon 16 is cut from the joint of the bend part of the ribbon 16, and the ribbon piece 16 is brought to pressure welding to the substrate 86. Thereafter, as shown in a figure l, the tool 18 and the clampers 29, 30 are made to ascend, and the solder ribbon 16 is projected from the tip of the tool 18.
Patent JP-S61109559-A (JP)
Inventor: FUKUBA HIROSHI
IPC: A46B15/00
Filed: 1984-11-04
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0686538-A (JP)
Title: Power supply equipment, lighting device for discharge lamp and illuminating apparatus
Inventor: OTAKE HIROKAZU
IPC: H02M3/155
Filed: 1992-08-31
Abstract: PURPOSE:To provide a lighting device capable of reducing the generation of high frequency noise. CONSTITUTION:AC power from a commercial AC power source E is applied to a filter circuit 21 for removing noise, is then rectified and smoothened by a rectifying and smoothening circuit 22, is subjected to step-down chopping in a chopper circuit 25, and is converted into high frequency by an inverter circuit 26 and an electric discharge lamp FL is lighted up. A high-frequency capacitor C7 is connected between a transistor Q1 and a diode D1 by making the distance the shortest between them. Connections should be made in such a manner that the area of a closed circuit having the transistor Q1, the diode D1 and a capacitor C7 becomes minimum. By doing this, spike type noise from the transistor Q1 due to the line inductance of a wire connecting a smoothening capacitor C5 to the transistor Q1 can be suppressed. Nose by high frequency can be removed by the capacitor C7.
Patent JP-H09107109-A (JP)
Title: Active matrix panel
Inventor: OSHIMA HIROYUKI
IPC: H01L29/786
Filed: 1996-09-02
Abstract: PROBLEM TO BE SOLVED: To provide complementary thin film transistors of which the absolute values of threshold voltages have mutually different dependences on the thickness of silicon thin films, and which have silicon films in respective channel regions of thickness not more than a predetermined film thickness and having good characteristics which little differ from each other. SOLUTION: In complementary thin film transistors, the width of a silicon thin film tsi is set smaller than both maximum widths χPmax and χNmax of depletions layers in P and N channel-type thin film transistors, respectively and not more than 0.1μm. With this arrangement, threshold voltages of the transistors are reduced. The reduced threshold voltages make it possible to reduce drive voltages of the thin film transistors and to provide higher current when the transistors are on. Consequently, it makes it possible to facilitate using the thin film transistors and to realize high speed operation of the transistors.
Patent JP-H1158464-A (JP)
Title: Mold structure for surface illuminant light guide and its molding method
Inventor: HARUNA SHUNICHI
IPC: G02F1/1335
Filed: 1997-08-28
Abstract: PROBLEM TO BE SOLVED: To provide a mold structure and a method thereof for replacing a stamper securely and with high accuracy, safely and efficiently without replacing a mold. SOLUTION: In a mold for molding a surface illuminant light guide, an ejector block 11 provided with the gradient of same angle of a light guide plate end face 15 is brought into contact with the light guide plate end face 15, and also the light guide plate 14 is molded as a part of an end face forming cavity 5 when the light guide plate 14 is molded by the cavity. When the molding is completed and mold opening is started, the ejector block 11 is protruded forward, and the light guide plate end face 15 is extruded on an ejector block inner side face 12 being brought into contact with the light guide plate end face 15 to release the light guide plate 14 from the cavity. The ejector block 11 is provided with a hook-shaped section 13 and the stamper 17 is clamped between the hook-shaped section 13 and end face forming cavities 6a and 6b.
Patent JP-S60124063-A (JP)
Title: Reproduction system of magnet memory device
Inventor: AIKAWA TAKASHI
IPC: H03K6/00
Filed: 1983-12-08
Abstract: PURPOSE:To detect accurately the peak position of a reproduction signal and to improve the reliability for reproduction of a magnetic memory, by producing a gate signal which detects the peak position of the reproduction signal by a differentiation system and excludes the peak position of a signal due to noises by an integration system. CONSTITUTION:The record data is written onto a magnetic disk by a magnetic disk through a writing circuit 12, and the reproduction signal read by the head 11 is supplied to an amplifier 13. The output of the amplifier 13 is branched into two parts. One of these two outputs is supplied to a differentiating circuit 14 and differentiated; while the other output is supplied to an integration circuit 17 and integrated. This integration waveform is converted into a peak pulse PP-B via a zero-slice circuit 18, and this 2nd peak pulse PP-B is supplied to a delay circuit 19 and a triggerable monostable circuit 20 respectively. The circuit 19 delays the 2nd peak pulse by 3 bits like the input 1st peak pulse PP-A to produce a signal D. This signal D is delivered to an AND circuit 21 and a flip-flop circuit 22 respectively. A pulse NP produced by noises is excluded and only a correct signal peak pulse is detected.
Patent JP-S6387674-A (JP)
Title: Magnetic recorder
Inventor: ARIGA TOMOE
IPC: G11B21/24
Filed: 1986-09-30
Abstract: PURPOSE:To automatically adjust a position at high speed by constituting the position adjusting means of a second carriage provided with a medium clipping element which performs recording and reproducing together with a first magnetic head. CONSTITUTION:With respect to the position adjusting means which sets required relative position relations between a lower head 8 as the first magnetic head and an upper head 3 as a second magnetic head, V-shaped notches are formed on both of a holding part 4d of an upper carriage 4 as the second carriage and a suspension holder 6. Both of them are combined and are clipped between circular jigs 18a and 18b, and jigs 18a and 18b are moved, and the holding part 4d and the suspension holder 6 are moved to the following-up position integrally. Thus, the upper carriage 4 does not cause a stress, which has an influence upon the position of the upper head 3, by position adjustment, and the position of the upper head 3 is adjusted stably and easily, and the position is automatically adjusted at the high speed.
Patent JP-S6291872-A (JP)
Title: Testing circuit
Inventor: NOZAKI TOSHIAKI
IPC: G01R31/28
Filed: 1985-10-17
Abstract: PURPOSE:To enlarge the degree of freedom to a test by placing a test exclusive ROM in a part of a testing circuit, so that a test sequence and the testing method of each part in a circuit to be tested can be changed optionally. CONSTITUTION:An input signal control circuit 11 controls the operation of a ROM 12 in accordance with an input signal inputted from an input terminal by following a test program. The ROM 12 is placed exclusively for a test, a prescribed part (usually, an address) is driven in accordance with the output signal of the circuit, and a prescribed signal is outputted. The output signal of the ROM 12 is inputted to a test signal generating circuit 13, and a test signal corresponding to the output of the ROM 12 is generated, and supplied to a circuit to be tested. Accordingly, by setting optionally the contents of the ROM 12, a signal waveform supplied to the circuit to be tested can be determined optionally.
Patent JP-H0282417-A (JP)
Title: Breaker
Inventor: KAWASAKI YUTAKA
IPC: H01H33/16
Filed: 1988-09-19
Abstract: PURPOSE:To maintain concentricity for keeping up a break and make function of both a stationary electrode section and a movable electrode section over a long period of time so as to permit the formation of a large-capacity and high-reliability breaker, by mounting plural capacitor units on a pair of electrode plates being electrically connected to a stationary electrode section and a movable electrode section for forming the breaker. CONSTITUTION:A breaker 1 is formed in such a manner as the step of receiving plural pieces of capacitor elements 12 multiply in hollow insulated rods 11 to connect them in series with one another to make capacitor units 15, arranging the required number of the capacitor units 15 electrically and mechanically in parallel with one another between paired electrode plates 16 to make capacitors 9A, 9B, and fixing these capacitors 9A, 9B electrically and mechanically between both the stationary electrode side and the movable electrode side of the breaker 1. Thus, large-capacity capacitors can be easily mounted onto the breaker 1 without causing any increase in the dimensions of a tank 2 for the breaker 1, and in mounting the capacitors thereonto, centering accuracy in a breaker electrode section is prevented from being lowered, with prolonged reliability on the capacitors themselves permitted to be maintained.
Patent JP-2001054768-A (JP)
Title: Cleaning method and cleaning device
Inventor: KOGURE MASAHIKO
IPC: H01L21/304
Filed: 1999-08-19
Abstract: PROBLEM TO BE SOLVED: To effectively clean a substrate at room temp. while terminating Si on the surface of the substrate, which is exposed during cleaning, with hydrogen. SOLUTION: This cleaning method is by blowing gaseous hydrogen 7 sent from a gaseous hydrogen generating means 5 into a diluted hydrofluoric acid aq. solution 8 to bubble to dissolve and dipping a Si wafer 9 to be cleaned in the diluted hydrofluoric acid aq. solution 8 in a cleaning bath 1 while applying ultrasonic vibration for a prescribed time. As a result, the Si wafer 9 is cleaned at room temp. and the dangling bond of Si on the surface of the Si wafer 9 is terminated with hydrogen.
Patent JP-S6474596-A (JP)
Title: Multiplex display controller
Inventor: KOUSONO ICHIROU
IPC: G09G5/36
Filed: 1987-09-16
Abstract: PURPOSE: To detect specified picture information from display data read out from a display memory, to selectively control writing operation based on the detected result and the state of superscription instruction, and to selectively use the specified picture element information used for the detection as effective color information. CONSTITUTION: A basic picture display position information generation circuit 6 generates display position information on a scanning line on the screen of a CRT. When the display data for a basic screen becomes complete, a multiple picture processing signal is activated and the display operation of a multiple signal is started. An address selection circuit 17 reads out the output of a retrieval counter 9 in order of the attribute information of an attribute memory 3, detects a multiple picture, and performs the write-control 10 of a superscription instruction signal from the memory 3. In the case the display data read out from the display memory 2 is edited in an editing memory 4, prioritization and the control of a display state are performed by the control circuit 10.  The data read out from the memory 4 is parallel-serially converted by a video data register 13 and supplied to the CRT 15 through a video generation circuit 14.
Patent JP-H0893328-A (JP)
Title: Fitting frame
Inventor: NAGANO TAKATOSHI
IPC: E06B1/56
Filed: 1994-09-28
Abstract: PURPOSE: To fit a fitting frame surely into an opening section formed to the wall section of a building, etc., simply without looseness. CONSTITUTION: A fitting frame 1 is composed of a fitting frame body 10 formed in a rectangular shape and inserted into the opening section of a building and an adjusting plate 11 being movably engaged with the fitting frame body 10 towards the inner circumferential surface 5a of the opening section and capable of pushing the inner circumferential surface 5a of the opening section. The adjusting plate 11 is moved towards the inner circumferential surface of the opening section, and the inner circumferential surface 5a of the opening section is pushed by the adjusting plate 11, thus surely fixing the fitting frame body 10 into the opening section while preventing looseness.
Patent JP-H04115062-A (JP)
Title: Crushing method by crushing agent
Inventor: FUJIEDA YOSHIICHI
IPC: E04G23/08
Filed: 1990-09-05
Abstract: PURPOSE:To improve the safety by inserting a hollow pipe in a filling hole for a crushing agent formed beforehand, and pouring water in the filling hole after filling a granular crushing agent. CONSTITUTION:A vertical filling hole 2 is formed in the surface of a substance 1 to be crushed made of concrete. Then, a hollow pipe 3 is inserted in the filling hole 2. Then, a granular crushing agent 4 is filled in the filling hole 2. Furthermore, by pouring water 5 in the filling hole 2, the water flows down along the clearances between particles of the crushing agent 4, and pushes down the air existing in the clearances. As a result, the air passes through the pipe 3 and is exhausted out of the filling hole 2.
Patent JP-H0889571-A (JP)
Title: Apparatus and method for monitoring turbidity of waste liquid of peritoneal dialysis
Inventor: MORITAKE HISASHI
IPC: A61M1/28
Filed: 1994-09-28
Abstract: PURPOSE: To qualitatively and quantitatively measure clouding by eliminating the influence of the clouding causes, exclusive of perotonisis and the coloration by urea, etc., and to prevent the occurrence of an erroneous alarm by these causes by measuring the clouded colors of the waste liquid of a peritoneal dialysis with scattered light. CONSTITUTION: The waste liquid of the peritoneal dialysis is usually discharged into a flexible bag 10 made of plastics, etc. This waste liquid bag 10 is provided with a recessed part 1 for fixing and positioning at least part thereof. A light source 2 of a light emitting element and at least two light receiving elements 4, 5 at different angles with its optical axis and, if necessary, a light receiving element 3 for detecting transmitted light existing on the optical axis of the light source of the light emitting element 2 are arranged on the inside surface of the recessed part 1. The space distribution of the scattered light intensity of the light past the waste liquid is varied by the size of the particles therein.  The ways of the scattering thereof are measurable if the measurement is made at the different angle and, therefore, the measurement of the kinds and quantities of the particles is made possible.
Patent JP-H03100192-A (JP)
Title: Multistage rde electrolytic bath
Inventor: IN KEISHIYAKU
IPC: C25B9/19
Filed: 1990-09-05
Abstract: PURPOSE: To form the electrolytic cell which obtains a high reaction yield under a low electrolytic voltage by constituting working electrodes of multistages-RDEs(multistages rotary disk electrodes) alternately laminated with disk-shaped large-sized RDEs and small-sized RDEs in the central axial direction of the disks and SPE(solid high-polymer electrolyte) electrodes formed by coupling conductive materials to the surfaces of SPEs.  
     CONSTITUTION: Paired electrodes 2 are disposed on both sides in the electrolytic cell 1 and the multistages-RDEs 3 are disposed in the central part thereof. The SPE electrodes 4 are disposed therebetween. The multistages-RDEs 3 are composed by alternately laminating the disk-shaped large-sized RDEs 3a having circular holes in the central parts and the small-sized RDEs 3b around the holes as common central axes in an axial direction and screw coupling these RDEs by metallic current collectors 3c via the holes. The SPE electrodes 4 are constituted by forming metallic electrodes 4b (Cu, Bi, etc.) on one surface of the ion exchange membranes 4a and forming the metallic current collectors 4c (Cu, Ti, etc.) at both ends of these metallic electrodes 4b. The desired objects are obtd. at the high yield and the electrolytic voltage may be lowered by simultaneously using the two electrodes 3, 4 in such a manner. 
     COPYRIGHT: (C)1991,JPO
Patent JP-H0896083-A (JP)
Title: Character recognizing device
Inventor: WADA MASATO
IPC: G06K9/62
Filed: 1994-09-28
Abstract: PURPOSE: To provide a character recognizing device which is capable of setting optimum pre-processing technique and recognition processing technique easily and in a short period without requiring special knowledge and experiences. CONSTITUTION: In the character recognizing device recognizing the number image-picked up by a camera device 1 by the image of the end face of the product 10 in which the number is entered, plural pre-processing techniques and character recognition processing techniques are preliminarily provided and the combination of the optimum pre-processing technique and character recognition processing technique is set based on the statistic processing of the recognition result of plural images for sample. When an erroneous recognition occurs, the image is preserved and the combination of the both techniques is reset by referring to the preserved image.
Patent JP-H0962640-A (JP)
Title: Access control method for shared memory
Inventor: FUKUDA TSUTOMU
IPC: G06F12/00
Filed: 1995-08-18
Abstract: PROBLEM TO BE SOLVED: To provide the method which efficiently use processors by eliminating the idle time of a bus cycle as to a system which performs data transfer between the processors through a shared memory. SOLUTION: This method is equipped with a shared memory circuit 102 which has the shared memory 103, a port arbitration process part 104, and a ready process part 105 outputting a BUSY signal 202, a BUSY control circuit 106 which detects the BUSY signal and an acquisition reservation interruption signal 203 from a processor 101 and outputs a/CS reservation signal 206, and an OR circuit 107 which ORs a /CS signal and the /CS reservation signal and outputs the result as a /CS signal to the shared memory 103.  When the processor 101 receives an interruption pulse signal 201 as the result of access to the shared memory circuit 102, the state of access to the shared memory 102 is maintained if the BUSY signal from the shared memory circuit 102 is Low, but when the signal is High, the state of access to the circuit is interrupted and an acquisition reservation interruption signal is sent out to the BUSY control circuit 106.
Patent JP-2001058737-A (JP)
Title: Manufacture of paper sheet feeding roller
Inventor: UCHIDA KIYOHIKO
IPC: B28B3/20
Filed: 1999-08-20
Abstract: PROBLEM TO BE SOLVED: To manufacture a paper sheet feeding roller of high accuracy having no coupling part in the roller part, at a low cost, with a high precision, and in mass-production by the extrusion molding method from a hydraulic composition. SOLUTION: The invention is applied to a method of manufacturing a paper sheet feeding roller composed of a rotary shaft and a cylindrical roller part consolidated with the periphery of the rotary shaft, whereby the roller part is formed by extrusion molding from a hydraulic composition and subjecting the obtained extrusion to a curing and a hardening process.
Patent JP-S60125957-A (JP)
Title: Tape sag eliminating mechanism of tape player
Inventor: HASEGAWA ISAO
IPC: G11B15/43
Filed: 1983-12-13
Abstract: PURPOSE:To eliminate the tape sag and also to attain a simple and miniature design of a tape sag eliminating mechanism by energizing the idler gears at both sides to the press-contact positions with each reel disk when a power supply is cut off and separating one of both idler gears from the reel drive disk via an engaged part when a power plate is locked right and left. CONSTITUTION:A power plate 4 is set at a neutral point when a power supply is cut off, and idler gears 2F and 2R are engaged with reel drive disks 1F and 1R by the energizing force of a spring. Under such conditions, both gears 2F and 2R are driven with application of a power supply and disks 1F and 1R are revolved in their winding directions (opposite to each other). Thus a tape is pulled in both sides. Thus the tape sag can be quickly eliminated with no tape run at all. A roller change plate 5 and the plate 4 are locked forward or reverse after the elimination of the tape sag. Thus a pinch roller of one side is pressed to the tape with an idler gear of the opposite side is detached from the tape respectively to drive the tape.
Patent JP-S6478382-A (JP)
Title: Picture data processor
Inventor: IWAKI HIROSHI
IPC: G06T3/40
Filed: 1987-09-19
Abstract: PURPOSE:To display whole scan data at high speed with resolution sufficient for area designation by sequentially outputting plural picture data in a two-dimensional segment corresponding to a prescribed two-dimensional compression ratio with respect to picture data in a memory as one compressed picture data when the number of picture data is beyond a prescribed significant degree. CONSTITUTION:The picture memory 3 which stores plural two-dimensional binary picture data in which the picture on a piece of paper 1 is previously scanned by an image scanner 2 and the like, and a picture data compression part 4 which compresses whole data in the picture memory 3 and outputs compressed data for display to a normal display part 5 are given. The picture data compression part 4 compresses original scan data in a dot which the display unit can display at once according to the compression ratio in a horizontal direction, which is for displaying in the normal display unit at once. If the picture elements of respective dots in the picture memory 3 are more than the prescribed significant degree, more than '1' in a most typical case, the compressed picture elements are set to '1', namely, to data presence. Thus, compression data with resolution sufficient for area designation can be obtained at high speed by a comparatively simple circuit constitution.