Patent GB-1242806-A (GB)
Title: Telecommunication exchange
IPC: H04Q3/52
Filed: 1969-06-18
Abstract: 1,242,806. Automatic telephone exchanges. INTERNATIONAL STANDARD ELECTRIC CORP. 18 June, 1969 [25 June, 1968], No. 30940/69. Addition to 1,199,119. Heading H4K. A switching network comprises a cascade of matrices with MOS transistor switches at the cross-points. Each cross-point switches separate go and return wires as seen in Fig. 6 where a path switched over stages a, b, c, has MOS transistor switches E<SP>1</SP> and E<SP>11</SP> at each stage. Switch contacts Z1 in the send wire of a line circuit indicate hook switch state which state is relayed as a signal Ra by a transistor Ty 3  in a state detector ST in a junctor. A calling condition is detected by a scanning procedure in which a junctor, which will serve a resulting call, is connected over the network to all the line circuits in sequence the state of the line being determined in the junctor. Switch contacts Z2 in the receive wire of a line circuit are made to complete a path to the line circuit and current over such a path is detected in the state detector ST of the associated junctor and relayed as a signal Rb by a transistor Ty4. A network is shown in Fig. 4 where line circuits H in a stage Tx are connectible to junctors V in a stage Ty by way of switching stages Ta, Tb, Tc, comprised of 16, 16 x 8; 8, 16 x 16; and 16, 8 x 8, matrices respectively. Local connections are made over two junction circuits in series such as V101 and V1601. Verticals of a preceding switching stage are linked to horizontals of the next stage in a standard trunking pattern. Marking and finding of routes across the network is effected by decoders Sa, Sb, Sc, acting as scanner/markers according to the setting of shift registers Ka, Kb, Kc. Each cross-point of a matrix is controlled by an associated bi-stable W, the bi-stables of each horizontal of a matrix marking a gate peculiar to that horizontal and such that operation of any one cross-point in a horizontal inhibits the operation of any further cross-point and gives an indication that the horizontal is busy. If a horizontal is free a signal e is present as for example in Fig. 5 where in stages b and c and for the single cross-points shown a signal e6 indicates the accessibility of horizontal s6 of stage c and a signal e3 indicates the accessibility of horizontal s3 of stage b. The state detector circuit ST is shown in Fig. 5 as a block in association with the order control circuit DC which has control of the c-matrix vertical V4 serving the junction and controllable over vertical control wire d4. Control circuit D.C. operates on the vertical control wire in accordance with loop and path states evidenced by signals Ra, Rb, and orders set up from central control as inputs Qa, Qb, Qc, and Qd. Junctor release.-Order Qa releases the crosspoint connection by a direct application to the control wire d4 by way of gate P1. Path search.-Order Qb marks the control wire by setting a bi-stable M so that the wire will stay marked through a number of clock pulses Gt. To take the specific example shown in Fig. 5, d4 is marked in coincidence with a select signal to horizontal wire s6 and operates cross-point Xc46. A busy mark appears on horizontal wire e6 which in the preceding stage b is the vertical control wire d1 and has the effect, in co-operation with a select signal to horizontal s3, of operating cross-point Xb13. The consequent busy mark appearing on horizontal wire e3 causes a similar response in stage a to connect with the horizontal serving the wanted line circuit. Once a path has been completed to a line circuit a signal Rb appears in the junctor and causes the production of an order completion signal Xa which resets bi-stable M and suppresses the Qb order in central control. If with the particular selections of horizontals indicated from decoders Sb, Sc, no path is available the order remains and with the appearance of the next clock pulse Gt advances the decoder Sc to another horizontal of the switch serving the junctor. If all horizontals of the switch are examined without finding a path, the common control sends a signal Xb to terminate path search. Call finding.-Order Qc connects a selected junctor over the network with all line circuits in turn, calling conditions being detected in the junctor by signal Ra. The order Qc effects cyclic advance of the registers Ka and Kb the states of which indicate line circuit identity. Line circuit busy test.-The identity of a given line circuit is set up in registers Ka and Kb, order Qd cycling store Kc for an idle junctor with access to the wanted line. The busy condition is judged by signals Ra and Rb in the junctor.