baber/WOPTO huggingface dataset:
Patent TW-505693-B (TW)
Title: Methods for producing sweet alcohol-containing food
Inventor: WU MING-LING
IPC: A23L7/104
Filed: 1998-12-17
Granted: 2002-10-11
Abstract: The present invention relates to the isolated microbial strains of Rhizopus sp. M-303 (CCRC 930027), Saccharomyces cerevisiae Y-202 (CCRC 920015), and Pediococcus pentosaceus L-101 (CCRC 910113), and the methods for producing sweet alcohol-containing food by using said microbial strains for pure culture fermentation, and the products produced by said methods such as Tien-chiu-niang.
Patent TW-437164-B (TW)
Title: Impedance conversion circuit, video apparatus, audio apparatus, and communication apparatus
Inventor: HIRABAYASHI ATSUSHI
IPC: H04N5/44
Filed: 1998-12-31
Granted: 2001-05-28
Abstract: An impedance conversion circuit, a video apparatus, an audio apparatus, and a communication apparatus are provided. Further an impedance conversion circuit which can be used at a frequency higher than that conventionally used and which is suitable for formation into an integrated circuit, a video apparatus using this impedance conversion circuit, and the like are proposed. Driving current is supplied to first and second terminals of an impedance circuit in accordance with voltages of first and second input sends, respectively, and current is made to flow out of the second and first input ends in accordance with the first and second terminal voltages, respectively.
Patent TW-432704-B (TW)
Title: Row decoder having global and local decoders in flash memory devices
Inventor: HA IM-CHEOL
IPC: G11C16/06
Filed: 1999-01-04
Granted: 2001-05-01
Abstract: The present invention relates to a row decoder in a flash memory device; and, more particularly, to a row decoder having global and local row decoders to reduce a loading of the high voltage and a chip area. The row decoder according to the present invention comprises a plurality of global row decoders for generating a first control signal and a second control signal according to an operation mode of the flash memory, wherein each global row decoder produces a first voltage level from a first power supply and a second voltage level from a second power supply, which respectively correspond to the first and second control signals, in response to first and second addresses from a predecoder; and a plurality of local row decoders for selecting a word line selection signal in response to the first and second control signals, wherein each local row decoder produces a third voltage level from a third power supply and a fourth voltage level from a fourth power supply which receives a third address from the predecoder and wherein the first control signal is out of phase from the second control signal.
Patent TW-475050-B (TW)
Title: Refrigerator
Inventor: NONAKA HIKARI
IPC: F25D17/06
Filed: 1999-03-12
Granted: 2002-02-01
Abstract: To reduce cost of a vegetable container and to enhance space efficiency of a vegetable chamber. A cold storage chamber (2) and a vegetable chamber (3) are provided in connected between in the refrigerator (1). A cold storage cooler (26) is disposed on a back surface of the vegetable chamber (3), and a refrigerant is supplied selectively to a deep-freezing cooler (51). Cold air generated by the cooler (26) is circularly supplied also to the vegetable chamber (3) via the cold storage chamber (2) by a cold storage cooling fan (28). Here, the cold storage cooling fan (28) is driven by extending for a predetermined time from when supply of the refrigerant to the cooler (26) is stopped. Thus, since frost adhered to the cooler (26) is evaporated and a humidity of the cold air supplied to the chamber (2) is raised, an upper surface open type can be used as a vegetable container (30).
Patent TW-406288-B (TW)
Title: Method for preventing the peeling of dummy wafer
Inventor: TSAI RUNG-HUEI
IPC: H01L21/00
Filed: 1999-04-16
Granted: 2000-09-21
Abstract: A method for preventing the peeling of bare wafer comprises the steps of providing a dummy wafer first, then defining the pattern of the dummy wafer, and finally forming at least a deposited layer on the dummy wafer. Since the dummy wafer already has gone through the pattern definition process, therefore when producing the deposited layer, it can prevent the deposited layer having a larger shear force from peeling off.
Patent TW-411685-B (TW)
Title: Method and equipment for detection and elimination of call-waiting signal for preventing network connection from interrupting
Inventor: WU CHUAN-JIA
IPC: H04M11/06
Filed: 1999-05-18
Granted: 2000-11-11
Abstract: This invention is concerning about the method and equipment for detection and elimination of call-waiting signal for preventing network connection from interrupting. The main function is that, while connecting to Internet via telephone subscriber line and LAN, if call-waiting signal is arriving, could alert the user that has a call-waiting in time, and could prevent the connection from interrupting by disturbance of the phone call-waiting signal sent by subscriber line. And this invention is also including a switch equipment that could change the telephone line connection from data communication status to voice communication status and could switch back to data communication status after ending the voice communication status.
Patent TW-419721-B (TW)
Title: Method of reducing line width of pattern by resist silylation process
Inventor: YANG JIN-CHENG
IPC: H01L21/027
Filed: 1999-06-21
Granted: 2001-01-21
Abstract: The present invention discloses a method of reducing the line width of a pattern by a resist silylation process, which uses the resist silylation process to push the dimensions of the contact and opening on a resist to finer dimensions. The method comprises: defining a resist with a required pattern by performing a spin-coating, a baking, an exposing and a developing process on a positive resist; and performing a flood exposure procedure and diffusing a silylation agent into the resist to carry out a silylation reaction with the resist, such that the resist will expand to a certain degree. By suitably selecting and controlling the resist, the silylation agent and the process conditions, together with the characteristics where the resist will expand after silylation, it is able to produce contacts, openings and interconnects with reduced dimensions thereby complying with the trend of reducing dimensions in device.
Patent TW-416248-B (TW)
Title: Split mirrored panoramic image display
Inventor: NALWA VISHVJIT SINGH
IPC: G03B37/04
Filed: 1999-07-14
Granted: 2000-12-21
Abstract: A panoramic image is displayed as two partial images. A first partial image shows approximately 180 degrees of the panoramic image centered about a viewing direction selected by a user. A second partial image shows approximately the remaining 180 degrees of the panoramic image as a mirror image. As a result, a user more readily understands the relationship between objects in different parts of the panoramic display.
Patent TW-463061-B (TW)
Title: Optical fiber base material ingot and method for producing the same
Inventor: TERASHIMA MASAMI
IPC: C03B37/014
Filed: 1999-07-20
Granted: 2001-11-11
Abstract: There are disclosed a method for producing an optical fiber base material ingot comprising depositing a soot on a starting core member, and subjecting the soot to dehydration, vitrification by sintering, and then cylindrical grinding, wherein the cylindrical grinding is performed while a core portion central axis is brought into line with a rotation axis of cylindrical grinding machine, and an optical fiber base material ingot produced by the method. According to the present invention, there are provided an optical fiber base material ingot having excellent ingot roundness and excellent core portion eccentricity, and a production method capable of producing the optical fiber base material ingot in a short period of time.
Patent TW-470948-B (TW)
Title: Optical disk apparatus
Inventor: MASARU ARAI
IPC: G11B7/09
Filed: 1999-10-07
Granted: 2002-01-01
Abstract: The present invention provides an optical disk apparatus to convert the amount of jitter of RF signal into the minimum offset adjusting signal for correcting the offset of TE signal, so as to obtain the RF signal in a good state. The solution of the present invention comprises: an optical head 2 for reading information recorded on an optical disk 1; reproduction signal generating means 3 for generating an RF signal and a TE signal from the recorded information read by the optical head 2; servo means 10 for generating a tracking drive signal based on the TE signal and controlling the position of the optical head 2 by the tracking drive signal; jitter detecting means 5 for detecting a jitter amount in the RF signal; and offset amount adjusting means 8 for adjusting the offset amount of the TE signal on the basis of the jitter amount. The offset amount adjusting means 8 generates an offset amount adjusting signal which minimizes the jitter amount detected by the jitter detecting means 5, and the servo means 10 generates a tracking drive signal whose offset amount is corrected on the basis of the offset amount adjusting signal.
Patent TW-434903-B (TW)
Title: Lateral diffused metal oxide semiconductor transistor
Inventor: TUNG MING-TSUNG
IPC: H01L29/78
Filed: 1999-12-03
Granted: 2001-05-16
Abstract: The present invention provides a kind of lateral diffused metal oxide semiconductor (LD MOS) transistor used in a semiconductor wafer. The semiconductor wafer includes a silicon substrate and the LD MOS transistor includes a gate layer, at least a shallow trench, and two doped regions. These two doped-regions are set within a predetermined range on the silicon substrate and are used for source and drain of the LD MOS transistor. The gate layer is set on part region surface of these two doped-regions and includes two opposite sides, which are the first side and the second side, respectively. The shallow trench is set within a predetermined range on the doped region and is located under one side of the gate layer. Additionally, an insulating layer is set inside the shallow trench and is used for electrical isolation.
Patent TW-I225101-B (TW)
Title: Material for shadow mask, method for production thereof, shadow mask and image receiving tube
Inventor: SATO TAIZO
IPC: H01J29/07
Filed: 2000-03-06
Granted: 2004-12-11
Abstract: This invention provides a material for shadow mask having the following composition of components: C <= 0.0008 wt%, Si <= 0.03 wt%, Mn 0.1 to 0.5 wt%, P <= 0.02 wt%, S <= 0.02 wt%, Al 0.01 to 0.07 wt%, N <= 0.0030 wt%, B: an amount satisfying the formula: 5 ppm <= B-11/14xN <= 30 ppm, balance: Fe and inevitable impurities; a method for producing the material; a shadow mask using the material (cold rolled steel sheet); and an image receiving tube equipped with the shadow mask. The material has excellent etching characteristics, which are uniform within the same coil, and excellent press formability.
Patent TW-462012-B (TW)
Title: Mobile Chinese input method
Inventor: TZENG TZUNG-GUO
IPC: G06F40/00
Filed: 2000-04-01
Granted: 2001-11-01
Abstract: The present invention provides a mobile Chinese input method in which a selector consisting of a preset number of keys is applied for selecting input of Chinese phonetic symbols. Based on the structure (consonant, vowel, and tone) of Chinese phonetic symbols, the mobile Chinese input method allocates phonetic symbols into a preset number of groups so that each group consists of a preset number of phonetic symbols. By pressing a key on the selector either once or twice, a group allocation is set as the value of the key to allow users to select phonetic symbols for the application of the Chinese input method.
Patent TW-593732-B (TW)
Title: Plasma treated thermal CVD of TaN films from tantalum halide precursors
Inventor: HAUTALA JOHN J
IPC: H01L21/285
Filed: 2000-04-26
Granted: 2004-06-21
Abstract: A plasma treated chemical vapor deposition (PTTCVD) method for depositing high quality conformal tantalum nitride (TaNx) films from inorganic tantalum halide (TaX5) precursors and a nitrogen containing gas is described. The inorganic tantalum halide precursors are tantalum pentafluoride (TaF5), tantalum pentachloride (TaCl5) and tantalum pentabromide (TaBr5). In a thermal CVD process, a TaX5 vapor is delivered into a heated chamber. The vapor is combined with a process gas containing nitrogen to deposit a TaNx film on a substrate that is heated to 300 DEG C-500 DEG C. A hydrogen gas is introduced in a radiofrequency generated plasma to plasma treat the TaNx film. The plasma treatment is performed periodically until a desired TaNx film thickness is achieved. The PTTCVD films have improved microstructure and reduced resistivity with no change in step coverage. The deposited TaNx film is useful for integrated circuits containing copper films, especially in small high aspect ratio features. The high conformality of these films is superior to films deposited by PVD.
Patent TW-I227281-B (TW)
Title: Carbon film and method for formation thereof and carbon film coated article and method for preparation thereof
Inventor: MURAKAMI YASUO
IPC: C23C16/26
Filed: 2000-06-17
Granted: 2005-02-01
Abstract: A carbon film containing fluorine and hydrogen, wherein a spectrum determined by FT-IR (Fourier transform infrared) spectrum analysis exhibits such a relationship that a ratio (IR.C-F)/(IR.C-H) between a peak area (IR.C-F) in a range from 1000 cm<-1> to 1300 cm<-1> resulting from C-F bonds and a peak area (IR.C-H) in a range from 2800 cm<-1> to 3100 cm<-1> resulting from C-H bonds is larger than 0, and a spectrum determined by XPS (X-ray photoelectron spectrum analysis) exhibits such a relationship that a ratio (F1S/C1S) between a peak intensity resulting from F1S and a peak intensity resulting from C1S is larger than 0 and smaller than 3. A carbon film containing hydrogen and nitrogen. A carbon film containing at least one of metal, metal compound, silicon and silicon compound.
Patent TW-497328-B (TW)
Title: Floating power supply using dual NPN transistor
Inventor: CHEN ANGUS
IPC: H02M7/08
Filed: 2000-09-19
Granted: 2002-08-01
Abstract: A low supply voltage for operating an operational amplifier operating as a voltage follower is derived from a high voltage source. Two npn tranistors, two zener diodes and a current source are connected in series across the high voltage source. The input voltage (to the operational amplifier) plus a zener reference voltage is applied to the base of the transistor near the positive terminal of the hight voltage source. Then a low positive supply voltage V+ nearly equal to the input voltage plus the zener voltage (Vi+Vz) is derived at the emitter. This low positive supply voltage V- is derived by dropping V+ through the two series zener diodes to obtain a low negative supply voltage equal to (Vi-Vz).
Patent TW-523872-B (TW)
Title: Post-fuse blow corrosion prevention structure for copper fuses
Inventor: DAUBENSPECK TIMOTHY H
IPC: H01L23/525
Filed: 2000-09-25
Granted: 2003-03-11
Abstract: A structure and method of fabricating a semiconductor corrosion resistant metal fuse line including a refractory liner which can also act as a resistor is disclosed. Fabrication is accomplished using damascene process. The metal structure can be formed on a semiconductor substrate including a first portion including a first layer and a second layer, the first layer having higher resistivity than the second layer, the second layer having horizontal and vertical surfaces that are in contact with the first layer in the first portion, and a second portion coupled to the first portion, the second portion being comprised of the first layer, the first layer not being in contact with the horizontal and vertical surfaces of the second layer in the second portion. The metal structure can be used as a corrosion resistant fuse. The metal structure can also be used as a resistive element. The high voltage tolerant resistor structure allows for usage in mixed-voltage, and mixed signal and analog/digital applications. The resistor element has low capacitance, low skin effect, high linearity, a high melting temperature, and a high critical current to failure. The resistor structure can be formed on the walls of a dielectric trough. The structure can be applied to circuit applications such as an ESD network, an RC-coupled MOSFET, a resistor ballasted MOSFET and others. The resistors can be in series with the MOSFET or other structures.
Patent TW-451312-B (TW)
Title: Manufacture method for sheet resistor of modified concave power semiconductor
Inventor: HUANG LIN-JUNG
IPC: H01L21/265
Filed: 2000-09-29
Granted: 2001-08-21
Abstract: This invention describes manufacture method of a power transistor device, which utilizes ion capable of self-aligned onto field oxide implanted well, substrate, drain and source to fabricate semiconductor device with good symmetry. Sheet resistance of the device can also be reduced by increasing the silicon concentration beneath the gate so that effectiveness of power semiconductor device can be improved. The inventive manufacture method includes at least: the first epitaxial silicon layer being formed on a n-type silicon substrate, an oxide layer and a silicon nitride layer being formed on the epitaxial silicon layer, the position of gate being defined using a mask and part of the oxide layer and the silicon nitride layer being etched, using conventional ion implant method to lightly dope n-type impurity into the gate area of the epitaxial silicon layer, sheet resistance being reduce by driving the n-type dopant though thermal diffusion into the epitaxial silicon layer using a furnace and also growing field oxide area at the gate position at high temperature, removing the silicon nitride underneath field oxide area at the gate position and forming substrate area by driving ion at self-aligned field oxide area, forming source by driving ion into epitaxial layer after the center of the substrate area being patterned and mask aligned, removing mask layer and field oxide layer and depositing another oxide layer and polysilicon layer, using another mask to define gate area and etch, and forming passivation layer, contact and conductive connect.
Patent TW-501205-B (TW)
Title: Use of silicon germanium and other alloys as the replacement gate for the fabrication of MOSFET
Inventor: MA YANJUN
IPC: H01L29/49
Filed: 2000-09-30
Granted: 2002-09-01
Abstract: A method of fabricating a MOSFET is provided, including: depositing an oxide layer on a silicon substrate for device isolation; forming a silicon based alloy island above a gate region in the substrate, wherein the silicon based alloy comprises a silicon germanium alloy or a silicon tin alloy or another alloy of group IV-B elements; building a sidewall about the silicon based alloy island; forming a source region and a drain region in the substrate; removing the silicon based alloy island, thereby leaving a void over the gate region; filing the void and the areas over the source region and the drain region; and planarizing the upper surface of the structure by chemical mechanical polishing. Alternative embodiments providing conventional and raised source/drain structures are disclosed.
Patent TW-I247040-B (TW)
Title: Flax seed specific promoters
Inventor: CHAUDHARY SARITA
IPC: C12N15/82
Filed: 2000-10-27
Granted: 2006-01-11
Abstract: Novel methods for the expression of non-native genes in flax seeds and the seeds of other plant species are provided. The methods involve the use of seed-specific promoters obtained from flax. Additionally provided are novel flax seed-specific promoters, chimeric nucleic acid constructs comprising novel flax seed-specific promoters, transgenic plant cells, transgenic plants and transgenic plant seeds containing novel flax seed-specific promoters. The promoters and methods are useful, for example, for altering the seed oil and protein composition in flax seed or other plant seeds.
Patent TW-512563-B (TW)
Title: Lightning arrester device for low-voltage network
Inventor: MACANDA CHRISTIAN
IPC: H02H3/05
Filed: 2000-11-08
Granted: 2002-12-01
Abstract: A lightning arrester device for protecting an electrical circuit against transient overvoltages, comprising at least one protective element consisting of a gas-type spark gap, which device comprises a set of gas-type spark gaps (2a-2c) connected in parallel and which individually have a surge current rating below a desired surge current rating.
Patent TW-466661-B (TW)
Title: Method to measure the effective gate channel length by C-V method
Inventor: HUANG HENG-SHENG
IPC: H01L21/66
Filed: 2000-11-21
Granted: 2001-12-01
Abstract: The present invention provides a method to measure the effective gate channel length by C-V method, and to obtain the gate etching bias length and gate-to-drain overlapping length of the device. In the present invention, the deviation between the measured gate length using the present invention and the actual gate length measured by scanning electron microscope is less than 5%. Furthermore, the computation method of the present invention used by the present invention is only a simple simultaneous equation, which can be solved manually or by computer. With the shrinking of the design rule, the present invention provides a simple method to find the important parameters of the device.
Patent TW-567367-B (TW)
Title: Display device
Inventor: HUANG SHIAN-SHIUNG
IPC: G02F1/133
Filed: 2000-12-04
Granted: 2003-12-21
Abstract: A display device is disclosed, which comprises a liquid crystal panel, a flexible printed circuit board, a driving IC device, a conductive adhesive and passive devices such as resistive capacitors, etc. the liquid crystal display panel has a panel electrode, the flexible printed circuit board is fixed onto the right back end of the liquid crystal panel, the flexible printed circuit board has plural external leads on its exterior, and has plural internal leads inside. The conductive adhesive is bonded to the position between the panel electrode of the liquid crystal panel and the external leads outside the printed circuit board, and is also bonded to the position between the internal leads inside the printed circuit board and the driving IC device. Thus, the display is not only light, thin, short, small but also can prevent the generation of crosstalk.
Patent TW-561687-B (TW)
Title: Operational amplifier and its offset cancel circuit
Inventor: KOKUBUN MASATOSHI
IPC: H03F3/34
Filed: 2000-12-08
Granted: 2003-11-11
Abstract: An offset cancel circuit for an operational amplifier comprises a capacitive element for storing a voltage to be amplified by an operational amplifier section and containing an offset, and for a feedback-controlling a voltage value of the operational amplifier section based on the stored voltage, and switching elements for switching operation between the storage of the voltage in the capacitive element and the feedback control based on the value of the voltage stored in the capacitive element. The capacitive element and the switching elements can be used to cancel accurately an offset in the operational amplifier section without increasing the gate areas of transistors in the operational amplifier section.
Patent TW-I246872-B (TW)
Title: Radiation source for use in lithographic projection apparatus
Inventor: BIJKERK FREDERIK
IPC: H01L21/027
Filed: 2000-12-11
Granted: 2006-01-01
Abstract: A radiation source of a radiation system of a lithographic projection apparatus comprises electrodes for creating a discharge in a space between them such that the discharge collapses into a pinch volume. The collapsing discharge creates a highly ionized, high pinching volume and is thereby raised to a high temperature state and emits extreme ultraviolet radiation.