baber/WOPTO huggingface dataset:
Patent TW-386921-B (TW)
Title: Method and apparatus for controlling electric discharge machining efficiency
Inventor: LI JAU-SHIOU
IPC: B23H1/02
Filed: 1998-06-24
Granted: 2000-04-11
Abstract: The present invention relates to a method and apparatus for controlling the electric discharge machining efficiency, the objective of the present invention is to stabilize the discharge procedure, thereby enhancing the discharge machining efficiency, for the rough working, to improve the duty factor of discharge and to provide a more accurate discharge signal to the servo for control so as to expect to enhance the discharge efficiency during the finishing process. The conventional discharge is to control the servo clearance according to the discharge clearance average voltage so as to achieve the discharging effect, if the setting is not proper, it will influence the discharge efficiency, thereby making the discharging condition worse, the magnitude and the time of the arc voltage and the discharge clearance voltage (depending on material), and the discharge stop time will have an effect on the discharge clearance average voltage, and a more serious condition exists during the finishing process. The present invention is in that, the analogue circuit is not used for providing the clearance average voltage for reference of the servo feed, the discharge clearance average voltage is sampled and calculated by the controller itself, to control the servo feed according to the results of the practice calculation, in addition, to adjust the sensitivity of the servo by using the wave identification technology so as to achieve the requirements of rapid and stable discharge, to efficiently control the non-load voltage additional time so that each discharge is an effective discharge, if necessary, to add a greater arc voltage to assist the control, at the same time, to automatically adjust to mate with the discharge stop time, thereby preventing the arc time from being too short or too long to decrease the discharge efficiency, thus to make the discharge duty factor approach 1, thereby efficiently increasing the discharge efficiency.
Patent TW-393843-B (TW)
Title: Methods for telecommunication
Inventor: DAHLMAN ERIK
IPC: H04W72/04
Filed: 1998-07-16
Granted: 2000-06-11
Abstract: The present invention relates to methods for assigning spreading codes to forward-link connections with variable bit-rate in DS-CDMA communication systems. A first connection is asssigned a first number of codes (x) from a first set (S1) of orthogonal codes. A second connection is assigned a second number of codes (y). A first part (y-ki) of the second number of codes (y) is taken from the first set (S1) of orthogonal codes. A second part (k1) of the second number of codes (y) is taken from a second set (S2) of orthogonal codes which is non-orthogonal to the first set (S1).
Patent TW-392234-B (TW)
Title: Apparatus and method for improved washing and drying of semiconductor wafers
Inventor: AKATSU HIROYUKI
IPC: H01L21/00
Filed: 1998-08-13
Granted: 2000-06-01
Abstract: Apparatus and method are provided for improved washing and drying of semiconductor wafers utilizing an enhanced ""Marangoni effect"" flow of liquid off of the wafers for superior prevention of watermarks (water spots) on integrated circuits(Ics) on the wafers. The apparatus includes a housing 12 which may be hermetically sealed, an open-top wash tank 60 within a lower part of the housing, a moveable rack 16 for holding the wafers either in the tank for washing or in an upper part of the housing for drying, apparatus 34 for supplying chilled (near freezing) de-ionized water (DIW) to a lower part of the tank, the DIW flowing within the tank and overflowing the top thereof, a pump 20 for draining overflowing DIW from the housing, and apparatus 40 for supplying to the housing organic vapor such as isopropyl alcohol (IPA)in a dry gas such as nitrogen. During wafer drying operation of the apparatus the pressure within the housing is kept at about one Torr or less.
Patent TW-392341-B (TW)
Title: Method for forming multi-fin and multi-cylinder capacitor of high density DRAM
Inventor: WU SHIE-LIN
IPC: H01L27/108
Filed: 1998-09-01
Granted: 2000-06-01
Abstract: A silicon nitride layer is first formed on a semiconductor substrate. A stacked layer composed of BPSG and silicon oxide is then formed on the silicon nitride layer, and an opening is defined in the stacked layer. A high selective etching is applied to the BPSG of the stacked layer. A first polysilicon is filled into the etched portion of the contact window and the stacked layer, and a dielectric layer is formed thereon. Then, non-doped hemispherical silicon grains are formed on the dielectric layer for being used as a mask to etch the dielectric layer and expose part of the first polysilicon layer, and a second polysilicon layer is subsequently formed thereon. Next, the etch back or CMP method is utilized to smooth the surface. The photolithography and etching techniques are applied to define the storage electrodes, and the stacked is removed by BOE solution. Finally, a dielectric film is formed along the surface of the first and second polysilicon layer, and a third polysilicon layer is covered thereon, so as to form a capacitor having a plurality of horizontal fins and vertical cylinders.
Patent TW-434767-B (TW)
Title: Package architecture of ball grid array integrated circuit device
Inventor: LIN JR-GANG
IPC: H01L23/498
Filed: 1998-09-05
Granted: 2001-05-16
Abstract: A package architecture of ball grid array (BGA) integrated circuit device comprises: a plurality of BGA solder balls arranged on the backside of the BGA packaged substrate, and a plurality of supporting pads arranged on the periphery of the backside of the BGA packaged substrate. In the present invention, a plurality of supporting pads are arranged on the backside of the BGA packaged substrate, so that the BGA package can accurately come into touch with the printed circuit substrate thereby avoiding the dish falling problem.
Patent TW-407094-B (TW)
Title: Saw strip for fixing a crystal and process for cutting off wafers
Inventor: KASER MAXIMILIAN
IPC: B28D5/00
Filed: 1998-09-11
Granted: 2000-10-01
Abstract: A saw strip for fixing a crystal of semiconductor material when cutting wafers from this crystal using a wire saw, which strip has a section which adjoins the crystal and has a hardness which essentially corresponds to the hardness of the crystal.
Patent TW-394988-B (TW)
Title: Method for formation of a dielectric film
Inventor: LAN SHR-MING
IPC: C23C16/455
Filed: 1998-09-14
Granted: 2000-06-21
Abstract: This is a two-step method to form a dielectric film at different temperature levels. At low temperature, first un-doped silicate glass film is initially deposited on a silicon substrate and the oxide film. Then, the second un-doped silicate glass film is deposited onto the first silicon dioxide film at high temperature to form a dielectric film. Therefore, the dielectric film surface sensitivity phenomenon are eliminated.
Patent TW-523973-B (TW)
Title: Activation circuit and method
Inventor: TSAI MING-SHI
IPC: H02P1/18
Filed: 1998-10-02
Granted: 2003-03-11
Abstract: The present invention provides an activation circuit and method to eliminate the surge current outputted instantaneously from an inductive circuit during activation, wherein a feedback signal is inputted to a comparison circuit, and a control signal is generated in response to the feedback signal and the setting signal, so as to control the inductive circuit for activating the inductive circuit segment-by-segment, thereby eliminating the surge current.
Patent TW-432319-B (TW)
Title: Universal testing module and method for communication connecting port
Inventor: CHANG YU-CHUAN
IPC: G06F3/14
Filed: 1998-10-26
Granted: 2001-05-01
Abstract: The invention relates to a universal testing module and method for communication connecting port, in which discloses one kind of modular universal communication module comprising a microprocessor. Such universal testing module is connected to the communication connecting port to be tested (including parallel port and serial port). Through the logic test method of walk 1' and walk 0', determine the electrical state (open/short) of each pin in the communication connecting port. This testing module can simultaneously test if each communication pin of the parallel port and serial port is in normal state or abnormal state (including open or short), and provide one kind of universal testing module to simultaneously test the parallel/serial communication connection port.
Patent TW-439179-B (TW)
Title: Shallow trench isolation method
Inventor: KANG WOO-TAG
IPC: H01L21/76
Filed: 1998-11-24
Granted: 2001-06-07
Abstract: A shallow trench isolation method forms an initial shallow trench which is less deep than a final shallow trench in a field area of a semiconductor substrate. An insulator film is deposited onto the semiconductor substrate so that the initial shallow trench can be completely filled. Then, active area of semiconductor substrate is exposed, and the insulator film in the initial shallow trench is left to a thickness corresponding to a depth of the final shallow trench. Then, an epitaxial layer is grown in the exposed active area. A shallow trench having a high aspect ratio can be completely filled with insulator film, to thereby ensure reliability for shallow trench isolation process.
Patent TW-548105-B (TW)
Title: Composition and method for treating nonalcoholic steatohepatitis
Inventor: FAN DAVID
IPC: A61K33/04
Filed: 1998-12-07
Granted: 2003-08-21
Abstract: Nonalcoholic steatohepatitis (NASH) is a disease of the liver characterized by inflammation and damage to the liver cells. Typically, steatohepatitis involves inflammation of the liver related to fat accumulation, and mimics alcoholic hepatitis but is observed in patients who seldom or never consume alcohol. Nonalcoholic steatohepatitis can lead to serious liver damage, and ultimately cirrhosis. The present invention provides methods and compositions useful for the treatment or alleviation of nonalcoholic steatohepatitis and the pharmaceutical formulations for their administration to a human. Specifically, compositions comprised of lecithin, antioxidants and vitamin B complex are administered parenterally, most preferably by oral administration. Specific therapeutic formulations include admixtures of these compounds and specific dosage formulations include daily oral administrations of these compounds in tablet or powder forms.
Patent TW-423237-B (TW)
Title: Unequal error protection for perceptual audio coders
Inventor: SINHA DEEPEN
IPC: H04L1/00
Filed: 1999-01-18
Granted: 2001-02-21
Abstract: An audio information bit stream including audio control bits and audio data bits is processed for transmission in a communication system. The audio data bits are first separated into n classes based on error sensitivity, that is, the impact of errors in particular audio data bits on perceived quality of an audio signal reconstructed from the transmission. Each of the n different classes of audio data bits is then provided with a corresponding one of n different levels of error protection, where n is greater than or equal to two. The invention thereby matches error protection for the audio data bits to source and channel error sensitivity. The audio control bits may be transmitted independently of the audio data bits, using an additional level of error protection higher than that used for any of the n classes of the audio data bits. Alternatively, the control bits may be combined with one of the n classes of audio data bits and provided with the highest of the n levels of error protection. Further protection may be provided for the control bits by repeating at least a portion of the control bits from a current packet of the audio information bit stream in a subsequent packet of the audio information bit stream. Moreover, the classification of audio data bits into n different classes can be implemented on a fixed packet-by-packet basis, or in a more flexible, adaptive implementation in which different multipacket error protection profiles are used for different multipacket segments of a source-coded audio signal.
Patent TW-382653-B (TW)
Title: Apparatus and method for measuring the refractive index and optical path length effects of air using multiple-pass interferometry
Inventor: HILL HENRY ALLEN
IPC: G01N21/45
Filed: 1999-02-23
Granted: 2000-02-21
Abstract: Apparatus and methods particularly suitable for use in electro-optical metrology and other applications to measure and monitor the refractive index of a gas in at least one measurement path and/or the change in optical path length of the measurement path due to the gas while the refractive index of the gas may be fluctuating due to turbulence or the like and/or the physical length of the measuring path may be changing. More specifically, the invention employs multiple pass interferometry to provide measurements of dispersion of the refractive index, the dispersion being substantially proportional to the density of the gas, and/or measurements of dispersion of the optical path length, the dispersion of the optical path length being related to the dispersion of the refractive index and the physical length of the measurement path. The refractive index of the gas and/or the optical path length effects of the gas are subsequently computed from the measured dispersion of the refractive index and/or the measured dispersion of the optical path length, respectively. The information generated by the inventive apparatus is particularly suitable for use in interferometric distance measuring instruments (DMI) to compensate for errors related to refractive index of gas in a measurement path brought about by environmental effects and turbulence induced by rapid stage slew rates. In preferred embodiments, differential plane mirror interferometer architectures are utilized, the operating wave lengths are approximately harmonically related and may be monitored and/or controlled to meet precision requirements, heterodyne and superheterodyne processing are beneficially used, and phase redundancy is resolved.
Patent TW-432355-B (TW)
Title: Apparatus for the recording or for the reproduction of information with a drive system for a scanning device
Inventor: WEISSER FRITZ
IPC: G11B7/085
Filed: 1999-03-12
Granted: 2001-05-01
Abstract: The invention relates to an apparatus for the recording or for the reproduction of information with a drive system for a scanning device for reading or writing information in one or more tracks of a recording medium. The object of the invention is to provide a drive system for a scanning device which requires little outlay and satisfies the requirements in respect of high positioning accuracy, short access time and self-locking. According to the invention, this object is achieved by means of a drive system comprising a toothed rack arrangement 6, a stratight-toothed gearwheel 7 and a worm 9, without a helically toothed worm wheel being necessary. For the purpose of an engagement in the straight-toothed gearwheel 7, the worm 9 is arranged at an angle with respect to the axis of the gearwheel 7, which angle corresponds to the lead of the said worm. The field of application of the invention is associated with apparatuses for the recording or for the reproduction of information with a drive system for a scanning device for reading or writing information in one or more tracks of a recording medium, such as, for example, a CD, DVD, an erasable CD or DVD or else a magneto-optical recording medium.
Patent TW-513403-B (TW)
Title: Process for producing aromatic carboxylic acid
Inventor: NAKAO FUJIMASA
IPC: C07C63/26
Filed: 1999-06-14
Granted: 2002-12-11
Abstract: A process for producing an aromatic carboxylic acid by liquid phase oxidation, wherein the start-up of the oxidation reaction can be made using a smaller electric power furnished by a smaller scale power supply equipment, while conducting an energy recovery after the start-up so as to carry out the reaction in an efficient way. The process comprises: connecting the rotating axes of an electric power device workable as an electric power generator and a motor, of a compressor for supplying a gas containing molecular oxygen to the reactor, and of an expander for obtaining a rotating power from the expansion of a gas; supplying an electric power to the electric power device to actuate the compressor; heating a gas containing molecular oxygen pressurized by the compressor; introducing the heated pressurized gas into the expander to expand it and to obtain a rotating power; starting the oxidation reaction by supplying to the reactor a part of the gas containing molecular oxygen pressurized by the compressor; recovering the energy after the reaction began by introducing the oxidation exhaust gas into the expander, whereby the electric power generation is conducted by the electric power device to which the electric power supply is cut off; and increasing gradually the supply of the pressurized gas containing molecular oxygen to the reactor, while decreasing its supply to the expander.
Patent TW-540070-B (TW)
Title: Manufacturing method of thermistor element
Inventor: KAWAHARA TAKAHIKO
IPC: H01C7/02
Filed: 1999-08-12
Granted: 2003-07-01
Abstract: To provide a method capable of effectively manufacturing a small-sized thermistor element of low resistance. The method of manufacturing a thermistor element is to form trenches 2, 3 for division into individual thermistor elements on one surface of a thermistor green substrate 1 obtained by sheet molding of material powder, the thermistor green substrate 1 is baked, and a thermistor mother substrate is obtained. Electrodes are formed on both surfaces of the obtained thermistor mother substrate, and the respective thermistor elements are obtained by dividing the thermistor mother substrate along the trenches 2, 3 after the electrodes are formed.
Patent TW-439127-B (TW)
Title: Method for manufacturing semiconductor self-aligned dual-doped gate
Inventor: LIN CHI-HUEI
IPC: H01L21/28
Filed: 1999-08-16
Granted: 2001-06-07
Abstract: There is provided a method for manufacturing semiconductor self-aligned dual-doped gate, which is suitable for a substrate having a source/drain region, a first region and a second region. The method comprises: sequentially forming a gate insulating layer, a first conductive layer, a first insulating layer doped with second impurity ions, and a second insulating layer without being doped with impurity ions; defining and removing the second insulating layer without being doped with impurity ions and the first insulating layer doped with second impurity ions of the first region; implanting first impurity ions on a first conductive layer of the first region wherein the first impurity ions cannot enter the second region due to the block of the second insulating layer without being doped with impurity ions; performing a thermal driving procedure to remove the second insulating layer and the first insulating layer of the second region, and defining the first insulating layer doped with second impurity ions of the first region and second region for forming a gate of the first region and a gate of the second region, respectively, thereby completing the method of the present invention.
Patent TW-446643-B (TW)
Title: Fluid supply device
Inventor: CHEN CHIN-TAI
IPC: B41J2/175
Filed: 1999-10-01
Granted: 2001-07-21
Abstract: The present invention relates to a fluid supply device mainly designed for general printers, plotters, and wide format ink jet printers. The fluid supply device consists of a container, a delivery device, and a guiding device. The container has a longitudinal opening and contains several longitudinal ink chambers. Each longitudinal ink chamber contains various basic color inks. Consisting of several interconnected inlet portions and discharge portions, the delivery device, in accordance with the design, delivers each basic color ink in the container to a printhead cartridge equipped with a nozzle. Each inlet portion moves along the longitudinal direction of the opening while immersing in an ink chamber. Each discharge portion is connected to a printhead cartridge. The guiding device guides the inlet portions to move along the opening. Thus, while inlet portions are moving along the container's longitudinal opening back and forth, by means of the absorption of the delivery device, inks can continuously be delivered to the printhead cartridge for wide format ink jet printers and plotters to provide durable printing effects.
Patent TW-440965-B (TW)
Title: Manufacture of semiconductor device
Inventor: TAKAMORI YOSHINORI
IPC: H01L21/324
Filed: 1999-10-14
Granted: 2001-06-16
Abstract: The present invention is provided to improve throughput by performing a hydrogen sintering treatment of a wafer, having a large aperture of 8 inches or more without deteriorating, in particular the characteristics of an MOS semiconductor device. Wafers, each including an MOS semiconductor component thereon, are introduced one by one into a single-wafer heat treatment system. First, hydrogen is introduced into the system and the wafer is heated up to a predetermined temperature in step 1. Next, while the wafer temperature is kept constant at the predetermined temperature, the hydrogen sintering process is performed in step 2. Then, the wafer is cooled down to another predetermined temperature or less within the system in step 3. Finally, the wafer is taken out in step 4. The time taken to perform a single cycle of the sintering process may be within three minutes. Accordingly, compared to a conventional process using a diffusion furnace, the throughput can be increased and the temperature response and uniformity of the wafer can also be improved. By taking the wafer out of the system after sintering and then cooling down it once, the damage caused in MOS interface states, for example, by a previous process step can be repaired in a short time.
Patent TW-434854-B (TW)
Title: Manufacturing method for stacked chip package
Inventor: PAI TSUNG-MING
IPC: H01L21/50
Filed: 1999-11-09
Granted: 2001-05-16
Abstract: A manufacturing method for stacked chip package which includes the following steps: (A) bonding the first chip on the upper surface of a substrate via the first adhesive; (B) partially curing the first adhesive for gelation enough for fixing the first chip but not cured so as to minimize the warpage of the first chip and the substrate for ensuring the following processes; (C) bonding the second chip on the first chip via the second adhesive; (D) curing the first adhesive and the second adhesive; (E) electrically connecting the first chip and the second chip to the substrate for forming electric connection structure with the outside; (F) forming a sealing glue on the first chip, the second chip and a part of the upper surface of the substrate. Because the first adhesive may be cured together with the curing process of the second adhesive, the manufacturing method for stacked chip package according to the present invention can reduce the cycle time so as to reduce the manufacturing cost and ensure the production quality.