baber/WOPTO huggingface dataset:
Patent TW-512595-B (TW)
Title: Signal transmission circuit for wireless cellular phone
Inventor: TSAO KUAN-LIANG
IPC: H04B1/44
Filed: 1999-03-04
Granted: 2002-12-01
Abstract: A signal transmission circuit capable of reducing power source consumption for the wireless cellular phone is provided in the present invention. The signal transmission circuit includes the followings: a voice converting circuit for converting the voice of user into a voice signal; a voice modulator electrically connected to the voice converting circuit for modulating the voice signal to form a radio frequency (RF) signal; a power amplifier, electrically connected to the voice modulator for amplifying the RF signal; the first switch electrically connected to the power amplifier for turning on and turning off the power amplifier; an antenna for emitting the RF signal outputted from the power amplifier; and a control circuit for controlling the operation of the cellular phone. When the cellular phone outputs the voice signal of the user, the control circuit will use the first switch to turn on the power amplifier so as to amplify the RF signal generated by the voice modulator and output the RF signal through the antenna. When the cellular phone receives the wireless signal, the control circuit will use the first switch to turn off the power amplifier so as to decrease the power source consumption of the cellular phone.
Patent TW-442849-B (TW)
Title: Process and apparatus for treating a substrate
Inventor: SAMUKAWA SEIJI
IPC: C23C16/08
Filed: 1999-03-24
Granted: 2001-06-23
Abstract: The aim of this invention is to produce a desirable amount of desirable radical and/or ion in treating a substrate such as etching the substrate, depositing a thin film on the substrate by using plasma. As a treating gas, a gas containing both a strongly bonded halogen element (F etc.) and weakly bonded halogen element (I etc.) is used. A substrate is treated by active species produced by exciting the treating gas by an excitation means capable of providing an energy which cannot dissociate the strong bond but can dissociate the weak bond. Preferable excitation means is capable of emitting a monochromatic irradiation, having a single value of excitation energy, such as electron beam, light etc., or otherwise capable of providing plasma, having a peak energy value of electrons and sharp electron energy distribution, such as UHF plasma etc.
Patent TW-457425-B (TW)
Title: Semiconductor device and process of producing the same
Inventor: IKEDA KOUICHI
IPC: H01L27/10
Filed: 1999-05-18
Granted: 2001-10-01
Abstract: An object of the present invention is to provide a semiconductor device and its manufacturing process that can reduce the fraction defective and that also enables the required steps to be simplified in case of manufacturing the semiconductor device which can be high density packaged. A plurality of memory chips 1 of the same type are formed on a semiconductor wafer 2 and are inspected for acceptability at a time. Then, the memory chips 1 determined to be acceptable is cut out from the semiconductor wafer 2 into a set of four or two adjacent chips side by side or individual such memory chips 1. Subsequently, the memory tips 1 are mounted on the substrate 4 to manufacture a memory module 10.
Patent TW-429525-B (TW)
Title: Process for dual damascene
Inventor: JUNG SHIAN-DA
IPC: H01L21/768
Filed: 1999-07-08
Granted: 2001-04-11
Abstract: The present invention discloses a dual damascene process using a conductor pattern on which a barrier on the conductor pattern is formed. The process is to form the first material on the barrier; next, form the second material layer on the first material layer; if the first material layer is a material layer of inorganic low dielectric constant, the second material layer is a material layer of organic low dielectric constant; if the first material layer is a material layer of organic low dielectric constant, the second material layer is a material layer of inorganic low dielectric constant; then, etch the first and second material layers to form the opening to expose the barrier; use the second material layer as the etching stop to etch the second material layer to form the trench for exposing the second material layer at the top of the opening; then, remove the silicon nitride under the opening to expose the conductor pattern; at this point, the opening located in the silicon nitride, the first material layer and the second material layer for exposing the conductor pattern is referred as via; then, form conductor plug in the via to be filled up.
Patent TW-415867-B (TW)
Title: Method for applying flux for use in brazing aluminum material, flux coating apparatus, and method for manufacturing a heat exchanger
Inventor: KONO MAKOTO
IPC: F28F3/02
Filed: 1999-07-27
Granted: 2000-12-21
Abstract: Fluoride-based flux is uniformly dispersed in and mixed with synthetic resin, which has fluidity at room temperature and sublimes at a temperature lower than a brazing temperature, so as to constitute 40 to 70 wt.% of the mixture, thereby producing coating material. This coating material is applied to coating belts which undergo rotation and is transferred from the coating belts to the surface of the aluminum material. The coating material has high viscosity and stably adheres to the transferred areas.
Patent TW-442759-B (TW)
Title: Improving the portability of digital images
Inventor: MATTISON PHILLIP E
IPC: H04N1/46
Filed: 1999-08-16
Granted: 2001-06-23
Abstract: Techniques for storing and translating digital images of different native formats in a way that makes it unnecessary for independent manufactures of imaging devices such as digital cameras to agree on factors related to production/capture and processing of the images. Image data in a native format and an associated method are combined as part of an image object, within the meaning of classical object-oriented technology, and transferred to the host system. An abstract machine, such as a virtual machine, in the host system acts as a virtual image processor and executes the method to obtain image data in a common format. The method in each image object operates on its corresponding image data to yield an image in a common format.
Patent TW-442813-B (TW)
Title: Field emission electron source array, method for producing the same, and its use
Inventor: HATAI TAKASHI
IPC: H01J31/12
Filed: 1999-08-26
Granted: 2001-06-23
Abstract: The present invention relates to a field emission electron source that emits electron beam through strong electric field emission using a semiconductor material, and its production and use, and is an improvement of the U.S. patent application No. 09/140,647 (field emission electron source array, and its production and use) of which contents are incorporated herein. The present invention provides an array of field emission electron sources and a method of preparing the array which discharges electrons from desired regions of a surface electrode of field emission electron sources. The field emission electron source 10 comprises an electrically conductive substrate of p-type silicon substrate 1; n-type regions 8 of stripes of diffusion layers on one of principal surfaces of the p-type silicon substrate, strong electric field drift layers 6 formed on the n-type regions 8 which is made of oxidized porous poly-silicon for drifting electrons injected from the n-type region 8; poly-silicon layers 3 between the strong field drift layers 6; surface electrodes 7 of the stripes of thin conductive film formed in a manner to cross over the stripes of the strong field drift layer 6 and the poly-silicon layers 3. By selecting a pair of the n-type regions 8 and the surface electrodes 7 and thereby making electron emitted from the crossing points due to combination of the surface electrode 7 to be electrically applied and the n-type region 8 to be electrically applied, electrons can be discharged from desired regions of the surface electrodes 7.
Patent TW-474912-B (TW)
Title: Method for preparation of low molecular weight polyethylene glycol carboxylic acids
Inventor: LIU FENG
IPC: C07C67/31
Filed: 2000-03-01
Granted: 2002-02-01
Abstract: A method of making low molecular weight polyethylene glycol carboxylic acids comprises reacting lower molecular weight polyethylene glycols with monohalogen substituted aliphatic acid esters in base, and then saponifying the resulting intermediates. The polyethylene glycol carboxylic acids are then extracted with a toluene-containing organic phase for removing unreacted compounds and byproducts. The extracted polyethylene glycol carboxylic acids are then acidified and purified by dialysis, gel filtration, or precipitation.
Patent TW-499503-B (TW)
Title: Non-chromate chemical treatments used on magnesium alloys
Inventor: LAI TZ-YUAN
IPC: C23G1/12
Filed: 1999-10-21
Granted: 2002-08-21
Abstract: Formulations and a process are disclosed for chemically treating a surface of a product made from magnesium alloys to form an adequate protection skin layer for protection and beautification purposes. One formulation comprises an acid pickle comprising hydrofluoric acid and diol and a second formulation comprises a conversion solution comprising nitric acid, manganate, and acid ammonium fluoride. The process comprises degreasing the product with alkaline solution, rinsing the product with water, pickling the product with the acid pickle, rinsing the product with water, modifying the product using the modifying solution, rinsing the product with purified water, and drying the product by heating.
Patent TW-425533-B (TW)
Title: High-rise building with large scale display device inside transparent glassexterior
Inventor: TOKIMOTO TOYOTARO
IPC: E04H1/04
Filed: 1999-10-25
Granted: 2001-03-11
Abstract: A high-rise building with a large scale dot-matrix display device is disclosed. The glass panels arranged in rows and columns form a curtain wall structured transparent outer wall 12 extending over an exterior of a building 10. Each panel is installed apart from end portions of floor slabs to form a void space therebetween. A plurality of louver structured modules 22 are arranged within the void space in rows and columns to form a large scale display area. Each module 22 has a louver-like structure formed of a plurality of posts 24 arranged in substantially parallel relationship and a plurality of parallel, uniformly spaced beams 26 connecting said adjacent posts 24. A plurality of LED combination lamps 28 are mounted on each beam 26 at uniform pitches as those between the adjacent beams 26. The LEDs are driven by drive circuits disposed in each beam 26. The vertical guide members 44 are fixed to the end portions of the floor slabs 20. The guide members 44 are arranged substantially in parallel relationship so that the modules 22 are supported between the adjacent guides 44 at the both lateral sides thereof. A plurality of vertical mullion members 48 fixed to the vertical guide members 44 as spaced apart from each of the vertical guides 44, so that the glass panels 12 are supported therebetween.
Patent TW-442837-B (TW)
Title: Integrated circuit-arrangement and its production method
Inventor: HOFMANN FRANZ
IPC: H01L21/8242
Filed: 1999-11-29
Granted: 2001-06-23
Abstract: The integrated circuit-arrangement includes a planar 1st transistor and a diode arranged above the 1st transistor. The diode is connected between a 1st source/drain-region (SD) of the 1st transistor and a gate-electrode (G1) of the 1st transistor, so that the flow of the charge from the gate-electrode (G1) to the 1st source/drain-region (SD) is difficult. A diode-layer (S), which is a part of the diode, is arranged on a part of the 1st source/drain-region (SD). A conductive structure (L), which is another part of the diode, is arranged above a part of the gate-electrode (G1) and on the diode-layer (S). The diode can be constructed as a tunnel-diode. The diode-layer (S) can be generated through thermal oxidation. In order to generate the diode, only one mask is necessary. A capacitor can be arranged above the diode, the 1st electrode (P1) of the capacitor is connected with the conductive structure (L). The integrated circuit-arrangement can include a DRAM-cells arrangement, in which a memory-cell contains a 1st transistor, the diode and a 2nd transistor. The integrated circuit-arrangement can additionally contain a logic-circuit.
Patent TW-516970-B (TW)
Title: Absorbent articles comprising biodegradable PHA copolymers
Inventor: NODA ISAO
IPC: A61F13/514
Filed: 1999-12-20
Granted: 2003-01-11
Abstract: The present invention relates to biodegradable PHA copolymers comprising at least two randomly repeating monomer units. The present invention further relates to a plastic article comprising a biodegradable copolymer, wherein the biodegradable copolymer comprises at least two randomly repeating monomer units (RRMU) wherein the first RRMU has the structure wherein R1 is H, or C1 or C2 alkyl, and n is 1 or 2; the second RRMU has the structure and wherein at least 50% of the RRMUs have the structure of the first RRMU. The present invention further relates to an absorbent article comprising a liquid pervious topsheet, a liquid impervious backsheet comprising a film comprising a PHA of the present invention and an absorbent core positioned between the topsheet and the backsheet.
Patent TW-480391-B (TW)
Title: A system, method and article of manufacture for a runtime program analysis tool for a simulation engine
Inventor: NICHOLS MARK STEWART
IPC: G06F11/36
Filed: 1999-12-22
Granted: 2002-03-21
Abstract: A system is disclosed that provides a goal based learning system utilizing a rule based expert training system to provide a cognitive educational experience. The system provides the user with a simulated environment that presents a business opportunity to understand and solve optimally. Mistakes are noted and remedial educational material presented dynamically to build the necessary skills that a user requires for success in the business endeavor. The system utilizes an artificial intelligence engine driving individualized and dynamic feedback with synchronized video and graphics used to simulate real-world environment and interactions. Multiple ""correct"" answers are integrated into the learning system to allow individualized learning experiences in which navigation through the system is at a pace controlled by the learner. A robust business model provides support for realistic activities and allows a user to experience real world consequences for their actions and decisions and entails realtime decision-making and synthesis of the educational material. The system includes tools for analysis and display of a presentation as it is presented.
Patent TW-480455-B (TW)
Title: Manufacturing method of module card
Inventor: LIOU FU-JOU
IPC: G06K9/00
Filed: 2000-02-29
Granted: 2002-03-21
Abstract: The present invention is a manufacturing method of module card, which comprises the following steps: providing a substrate which has at least a first package region and a second package region, the first package region and the second package region are symmetric, have the first cutting line and have a first gold finger and the second gold finger, respectively; implant a first chip and a second chip in the first package region and the second package region, the position of both chips are symmetric to the first cutting line; form the first and the second encapsulation layers on the first chip and the second chips; cut the first cutting line to form at least two pieces of module card.
Patent TW-460346-B (TW)
Title: A manufacturing method of a structure body and a manufacturing apparatus of a structure body
Inventor: ESUMI MASAKUNI
IPC: B23K37/08
Filed: 2000-04-07
Granted: 2001-10-21
Abstract: A friction stir joining apparatus 1a comprises members 20 and 30 to be subjected to a friction stir joining which is fixed on a table 5, a joining head 200 which moves relatively to an arrow mark A direction against the table 5. A rotary tool 10 performs the friction stir processing and a joining bead 50 is formed. A sensor 210 irradiates a light beam 212 and detects edge portions 24 and 34 of the members and the joining head 200 is moved and controlled to a center of the joining portion. A burr removing cutting means 12 of the rotary tool 10 cut off the burr and the chips 60 are formed. An air jet J injected from an air nozzle is discharged to an outside from a cover 230 and an enter of the chips 60 to the sensor 210 can be prevented. In a friction stir joining apparatus, it provides the friction stir joining apparatus in which the enter of chips to the sensor 210 for detecting a center position of the joining portion can be prevented.
Patent TW-498595-B (TW)
Title: Switching regulator
Inventor: MASUKO TAKESHI
IPC: H02M3/155
Filed: 2000-05-03
Granted: 2002-08-11
Abstract: A switching regulator includes an input power supply connected to an input of the switching regulator; at least one input/output disconnection switch disposed between the input power supply and a device connected to an output of the switching regulator, for interrupting the supply of an energy to the device from the input power supply; and a device for limiting a rush current that flows into an output capacitor from the input power supply when the input/output disconnection switch turns on to start step-up operation.
Patent TW-442927-B (TW)
Title: Method for forming metal pad on the surface of copper wire
Inventor: SHIH TSU
Filed: 2000-05-12
Granted: 2001-06-23
Abstract: The present invention provides a method for forming metal pad on the surface of copper wire, which comprises the steps of: first, forming a passivation layer composed of insulating material on the surface of a semiconductor wafer; next, selectively etching said passivation layer to form an opening for exposing the copper wire and also form a rugged pattern; then, forming a metal layer on the passivation layer remained after etching and the metal layer being filled in the rugged pattern thereby forming an alignment mark; afterwards, using said alignment mark to define a photoresist pattern on the copper wire; and using the photoresist pattern as an etching mask to etch the metal layer without being covered by the photoresist pattern, so as to form a metal pad on said surface of the copper wire. In accordance with the method of the present invention, the manufacturing process can be simplified by reducing one photolithography and etching step. Furthermore, the alignment mark can be precisely identified without discarding the wafer.
Patent TW-472246-B (TW)
Title: A method for recording reproducing information and an apparatus for recording reproducing information
Inventor: KANDO HIDEHIKO
IPC: G11B7/004
Filed: 2000-05-15
Granted: 2002-01-11
Abstract: Heretofore, if the recording mark arranging method in a track is changed, the physical format on the disk is also changed, as in DVD-Rs and DVD-RAMs. This makes it difficult to attain interchangeability between data recorded in a plurality of different recording mark arranging methods. There is provided a method which makes it possible to arbitrarily set a frequency conversion multiplying factor to be used when generating a write clock (A, B) from a signal (Fig. 2A) obtained by detecting track deformation periodically provided on a recording track, which makes it possible to arbitrarily set a total number of channel bits in a single track, and which thereby implements a plurality of different recording mark arranging methods (Figs. 2C and 2E) on disks having the same physical format.
Patent TW-422711-B (TW)
Title: Multi-channel ultrasonic high-temperature tumor curing system
Inventor: LU BING-YU
IPC: A61N7/00
Filed: 2000-05-15
Granted: 2001-02-21
Abstract: This invention is about multi-channel ultrasonic high-temperature tumor curing system that includes several channel driving circuits, in which the output terminal of each channel driving circuit is connected to a corresponding ultrasonic energy converter of the multi-channel ultrasonic energy converter array in order to drive this ultrasonic energy converter to generate ultrasonic signal. The driving circuit of each channel includes a phase control circuit, an amplitude control circuit, a switch circuit, a logic control circuit and a power amplifier. The phase control circuit is designed as frequency dividing circuit with different frequencies so as to simultaneously drive ultrasonic energy converter having different frequency. The reference clock is sent to the clock input terminal of this phase control circuit. Each channel is designed as the counter that has the function of preset initial value such that the output terminal of each channel has the phase-shift output signal. For the counter of each channel, the synchronous trigger signal is obtained by loading the same signal into the enabling line that is connected to the signal input enabling terminal of each counter. The programmable electric erasing logic devices are used in the phase control circuit and individually designed as an n-bit counter with the ability of presetting the initial value such that the phase control circuit has the phase shift resolution of (360/2n) phase angle. Different phase shift resolution is designed at each channel and the driving signal output with different frequency can be exported at the same time so as to form the heating area having different frequency. Therefore, based on the shape and size of tumor, the amplitude, phase, and frequency of the output signal are determined.
Patent TW-457657-B (TW)
Title: Wafer-level packaging of micro electromechanical elements and fabrication method thereof
Inventor: JOU JENG-SAN
IPC: H01L23/28
Filed: 2000-07-14
Granted: 2001-10-01
Abstract: The present invention provides a wafer-level packaging of micro electromechanical elements and a fabrication method thereof, which includes a silicon wafer having a plurality of micro electromechanical elements and a packaging silicon wafer having the same size as the silicon wafer. A plurality of channels are formed between the top and bottom surfaces of the packaging silicon wafer. A metal conductive cylinder is formed in each channel to electrically connect the top and bottom surfaces of the packaging silicon wafer. There is formed a soldering bump on the metal conductive cylinder such that the soldering bump on the metal conductive cylinder can attach to a predetermined soldering bump on the silicon wafer having a plurality of micro electromechanical elements, thereby forming a packaging device.
Patent TW-471197-B (TW)
Title: Integrated type bi-direction feed-in electromagnetic apparatus
Inventor: JAN CHANG-GENG
IPC: H01Q13/02
Filed: 2000-07-20
Granted: 2002-01-01
Abstract: An integrated type bi-direction feed-in electromagnetic apparatus is used to receive the radio waves of two satellites, which are separated from each other by a small angle, and includes the first down conversion frequency module and the second down conversion frequency module. A dish antenna is used to focus the radio waves, which are transmitted by two satellites separated from each other by a small angle, at two different points in front of the focal plane, and the waveguide feed horn heads of two down conversion frequency modules are used to receive the radio waves of two satellites. The characteristic is that two waveguide feed horn heads have the elliptic structures and are adjacent to each other through the use of the minor axes. The separation between two descending frequency modules is decreased in order to receive the focused signals of two small-angled satellites. In addition, by maintaining the length of the conventional major axis, the gain of signals received by two down conversion frequency modules is not attenuated too much as the receiving points are close to each other.