Patent GB-1184410-A (GB)
Title: Voltage Drive Circuits
IPC: G11C11/22
Filed: 1968-12-10
Abstract: 1,184,410. Light modulators. INTERNATIONAL BUSINESS MACHINES CORP. 10 Dec., 1968 [15 Jan., 1968], No. 58697/68. Heading H4F. To avoid electrolysis breakdown occurring in an electro-optic crystal due to accumulation of electrical charge on the crystal when the crystal is electrically pulsed repeatedly in one polarity, the polarity of the voltage applied to the crystal is changed to oppose the charge on the crystal, e.g. if binary zero is represented by ground potential on both electrodes of the crystal and a binary one is represented by ground potential on one electrode and a predetermined positive potential on the other electrode, then when the charge on the crystal has risen to a threshold level, the previously grounded terminal is connected to receive positive pulses and the other terminal is grounded, thus discharging the crystal. The invention utilizes the fact that the polarity of the potential across the crystal does not affect the operation of, for example, a digital light deflector in which the electro-optic crystals are utilized as switchable half-wave plates. In Fig. 1, the electrodes 14 and 15 of electro-optic crystal 12 are connected to the output terminals at drivers 16 and 17 each arranged to produce at its output one of two voltage levels. Input data on line 19, waveform (1), Fig. 2, is applied to inputs of two AND gates 20 and 21, one of which is enabled by control signals (see later) to transmit the data signals to a corresponding one of the two drivers. Waveforms (6) and (7) represent the outputs of the drivers 16 and 17 respectively. An analogue charge accumulator 25 is arranged to be charged from the low voltage outputs of AND circuits 20, 21 in the same way that the crystal is charged at the outputs of drivers 16, 17. A voltage is produced at the output 28 of accumulator 25 that varies in amplitude and polarity according to the voltage at electrode 14 with respect to electrode 15, accumulator 25 is a circuit analogue of the electrical characteristics of crystal 12. Waveform (2) represents the output of the accumulator. A comparator circuit 30 receives the amplitude varying output voltage on line 28 and produces at its outputs 31 and 32 binary signals that signify the residual charge on the crystal, waveform (3) represents the output at terminal 31, and the output at terminal 32 is the complement of waveform (3). Comparator 30 comprises a bi-stable circuit having its set input connected to receive positive polarity voltages on line 28 and having its reset input connected to receive negative voltages on line 28. The comparator includes a threshold device at its input to prevent the circuit responding to voltages below the threshold. AND gates 20 and 21 are enabled by the complementary outputs 36 and 37 of trigger circuit 35 represented by waveform (5) in which level #D selects gate 20 and level D selects gate 21. Trigger 35 receives pulses from OR gate 39, waveform (4), whenever the crystal 12 has been charged to the polarity at the selected driver i.e. positive for driver 16 and negative for driver 17. OR gate 39 combines the outputs of AND gates 41 and 42. AND gates 41 and 42 are enabled by means of timing pulses derived by inverters 54 and 55, and single shot circuit 53 from the data pulses. Each timing pulse corresponds to the trailing edge of a " 1 " data pulse.