Patent GB-1016341-A (GB)
Title: Improvements in and relating to the generation of oscillations and their applicationto testing
Inventor: CATHERALL REGINALD
IPC: H03K4/02
Filed: 1960-12-30
Abstract: 1,016,341. Electric analog calculating. SOLARTRON ELECTRONIC GROUP Ltd. Dec. 28, 1961 [Dec. 30, 1960], No. 44881/60. Heading G4G. [Also in Division G1] A method of synthesizing a substantially sinusoidal waveform comprises adding rectangular current pulses to triangular current waveforms or stepped triangular current waveforms. The Specification describes systems suitable for generating oscillations over the frequency range from one cycle in 30 hours to 1500 c/s. Synthesizing a sine function.-In Fig. 2, a sequence controller 26 is provided to select certain clock pulses to be used to control the timing and amplitude of triangular waveforms 15 ... 18 (Fig. I) and pulse current wavetorms 11 ... 14 (Fig. 1) derived from switching circuits 28, 29 and added in a summing device 30. In Fig. 2a clock pulses are generated at terminal 39 by setting switch 35 alternately to the + E and -E supplies. The clock pulses are converted to triangular waveforms at 41 by a Miller integrator 32. When the value of the waveform at 41 reaches a predetermined level, the voltage detectors 36 or 37 reverse the position of the switch 35. Fig. 4 shows a circuit of the triangular waveform selector 27 of Fig. 2. The triangular waveform P at 41 is inverted at 59 giving waveform Q. Switches 58, 60 are used to connect alternate half cycles of waveforms P, Q to terminal 57, giving the sawtooth waveform shown. The order of operating switches 58, 60 is reversed when 90 degrees of the synthesized sine wave have been generated. Fig. 3 shows a circuit for controlling the amplitude of rectangular and sawtooth waveforms. The conductive state of the pairs of switching transistors is controlled by pulses from the sequence controller 26 (Fig. 2), If, for example, during one clock pulse, transistor 46 is conductive and transistor 47 non-conductive, a D.C. pulse is fed from the stabilized supply at terminal 49 to the summing amplifier 30, the amplitude being dependent on the value of resistor R1. Current pulses 11 ... 14 (Fig. 1) are generated by successively reversing the conductive state of the pairs of transistors in block 28. The value of resistors R1 ... R4 are selected so that each pulse is of the appropriate amplitude. A similar set of switching transistors in block 29, fed with a sawtooth waveform at terminal 57, provides the sawtooth waveforms 15 ... 19 (Fig. 1). The polarity of the inputs to terminals 49, 57 is reversed when synthesizing negative half cycles. In a practical embodiment, the sine wave of Fig. 1 may be synthesized in steps of 1 degree under control of bi-stable and logic circuits (Figs. 21A ... 21D, not shown). Synthesizing modulated carriers.-Fig. 13 shows a system in which the rectangular D.C. pulses are replaced by pulses from a carrier source 67. The sawtooth waveforms are replaced by staircase waveforms of carrier current generated at 29. The switching circuits used for blocks 28, 29 are of the type shown in Fig. 3 but the stabilized D.C. and sawtooth waveform inputs are replaced by carrier waves from 67. Fig. 19 (not shown) relates to a more complicated modulated wave synthesizer. Testing networks and servomechanisms.-Fig. 18 shows apparatus for determining the transfer function of a network or servo 60. The servo 60 is of the type capable of operating with a modulated input signal and is fed with a synthesized modulated sine wave from Fig. 13. The output is demodulated at 82 and fed to a pair of resolvers 61<SP>1</SP>, 62<SP>1</SP> the outputs of which are integrated at 63<SP>1</SP>, 64<SP>1</SP> to give the transfer function in cartesian co-ordinates R cos # and R sin #. The resolvers 61<SP>1</SP>, 62<SP>1</SP> each consist of a system of the type shown in Fig. 13 with the carrier source 67 replaced by the filtered output of the demodulator 82 and with appropriate modifications to the sequence controller 26. Fig. 12 (not shown) relates to similar apparatus for use with D.C. servos.   Co-ordinate converters.-When the integrators 63<SP>1</SP>, 64<SP>1</SP> have reached a steady state, switches 83 ... 86 are thrown to position 2. Each resolver 61<SP>1</SP>, 62<SP>1</SP> is now fed from the output of its associated integrator. The integrators now function until the comparator 87 indicates equality in the resolved outputs. The operation of the sequence controller is arrested at this point, so that the phase shift in the servo 60 may be indicated by a digital voltmeter connected to the sequence controller 26 (Figs. 21A ... 21D, not shown). Switches 83 ... 86 are now set to position 3, transposing the inputs to the resolvers. It is shown that the sum of the resolver outputs from 88 is equal to the modulus of the transfer function of the servo 60. This may be indicated on another digital voltmeter. Fig. 23 shows a further co-ordinate converter. With the switches in the position shown, the system indicates the value of the input in cartesian co-ordinates. At the end of the integrating period, switches 83 ... 86 are set to the opposite positions, stabilizing the outputs of the integrators to their last values. Resolvers 61<SP>1</SP>, 62<SP>1</SP> are cycled and their outputs fed into a chopper amplifier 120, controlled by contacts 110, 111 synchronized with the auxiliary sequence controller 114. The resolver outputs are also fed via the lower contacts 110 to a summing amplifier 88 which gives the modulus of the transfer function. When the sum of the resolver outputs is equal to zero (as determined by comparator 87), a bi-stable circuit 112 is triggered, arresting the auxiliary sequence controller 114, the state of which indicates the phase of the transfer function.