baber/WOPTO huggingface dataset:
Patent JP-S6440057-A (JP)
Title: Covering material for skin
Inventor: KAWAGUCHI TOSHIO
IPC: A61L15/44
Filed: 1988-07-18
Abstract: PURPOSE:To form a rigid and transparent filmy material and impart a powerful antibacterial function thereto by using a polymer having a hydropholic group and a carboxyl group or a carboxylic acid anhidride group, and an org. titanate compound as main ingredients. CONSTITUTION:The title material is composed of a polymer having a hydrophobic group and a carboxyl group or a carboxylic acid anhydride group, and an org. titanate compound as main ingredients. Especially, a polymer wherein at least two carboxyl groups are bonded together, and further, a polymer wherein two carboxyl groups are bonded to an adjacent carbon atom is more effective. The polymer with its mol.wt. ranging 1,000-100,000 having a carboxyl group or a carboxylic acid anhydride and a hydrophobic group is most pref. As the org. titanate, a titanate represented formula 1 (wherein, R<4> represents an alkyl group, p represents an integer from 0 to 20), especially a tetraalkyl titanate is pref. This covering material has an itself an antibacterial function, and especially effective against anaerobic bacteria.
Patent JP-H04373055-A (JP)
Title: Active line attachment/detachment corresponding bus connecting circuit for unit
Inventor: KODAMA TOMOAKI
IPC: G06F3/00
Filed: 1991-06-21
Abstract: PURPOSE:To provide the active line attachment/detachment corresponding bus connecting circuit for a unit not to collide data signals even when attaching/ detaching the unit during the operation. CONSTITUTION:At the active line attachment/detachment corresponding bus connecting circuit for the unit equipped with a CPU unit 10 to load a CPU 11, I/O device connected through a back board 40 by a bus and plural units to load a memory, a decoder 12 is provided in the CPU unit 10 so as to decode an address bus 42 from the CPU 11 in the CPU unit 10 and to generate a unit selection signal, and a unit selection signal line to transmit this unit selection signal to the relevant unit is connected between the decoder 12 and each unit.
Patent JP-S6422830-A (JP)
Title: Bicyclohexylcyclohexene derivative
Inventor: TANAKA YASUYUKI
IPC: C07C67/00
Filed: 1987-07-17
Abstract: NEW MATERIAL:A compound expressed by formula I [R is 1-9C straight-chain alkyl; X is F or Cl; groups expressed by formula III are all trans(equatorial- equatorial) configuration]. EXAMPLE:A compound expressed by formula IV. USE:A nematic liquid crystal substance useful as a material capable of expanding driving temperature range of liquid display cell having excellent eye angle characteristics to high temperature side and having high N-I transition temperature as well as small value of anisotropy (DELTAn) of refractive index. PREPARATION:A compound expressed by formula II is reacted with a halogenating agent such as PCl5 in a chlorine based solvent such as CHCl3 and then the reaction mixture is added into diluted hydrochloric acid and extracted with the above-mentioned solvent and the extract liquid is washed with water and then dried and the solvent is distilled to afford a crude product, which is reacted with a base such as 1,8-diazabicyclo(5,4,0)-undecene-7 in an organic solvent such as N,N-dimethylamide and then the reaction product is extracted with n-hexane, washed with water and dried and n-hexane is distilled and the dried product is recrystallized to provide the aimed compound expressed by formula I.
Patent JP-S6068834-A (JP)
Inventor: AMAMIYA SHINICHI
IPC: G01S15/50
Filed: 1983-09-26
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-2000013961-A (JP)
Title: Circuit unit
Inventor: HATANO TAKAYASU
IPC: H02G3/16
Filed: 1998-06-24
Abstract: PROBLEM TO BE SOLVED: To provide a circuit unit which constitutes minimum dimensions when packaged. SOLUTION: This circuit unit 10 includes a signal circuit 20 and a power circuit 30 formed by processing a metallic plate, and a support 40 for supporting them by insert molding. The signal circuit 20 is arranged to have a relation with a common surface at a position relatively close to an outer surface with the surface of the metallic plate directed parallel to the outer surface of the supporter 40. The power circuit 30 is formed by being positioned inner than the signal circuit 20 but at a distant from its outer surface and directing the metallic plate surface vertically to the outer surface.
Patent JP-S6070237-A (JP)
Inventor: IKENAGA TAKAO
IPC: E03D5/10
Filed: 1983-09-26
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0468852-A (JP)
Title: Data communication equipment
Inventor: IKEGAYA TADAHIKO
IPC: H04M11/00
Filed: 1990-07-06
Abstract: PURPOSE:To exactly use the network of an entrepreneur having the most low- priced network by operating an LCR function after calculating time for communication according to the amount of a data to be actually transmitted and velocity for communication. CONSTITUTION:When a start button is pushed, a called party number is stored in a called party number holding means 11, and original information read from a scanner is stored in a picture storage memory. When all the original information is stored in the picture storage memory, capacity 12 using the picture storage memory is calculated. On the other hand, communication velocity 13 and protocol time 14 are decided in advance, and these data are supplied to a communication time calculating means 15 so as to calculate time for communication. Next, a correspondent network selection number is read from an LCR table 16 while referring to the LCR table 16 according to an area code in the called party number held in the called party number holding means 11 and the time for communication. Afterwards, the network selection number and the called party number are transmitted to an automatic dial device 17, successively dialed in this order and transmitted to a line.
Patent JP-S6334911-A (JP)
Title: Manufacture of coil
Inventor: FUJIMOTO TAIJI
IPC: H01F41/06
Filed: 1986-07-30
Abstract: PURPOSE:To prevent the leads of a coil from being damaged, such as cracking in case of removing the coil by winding the leads and impregnating it with resin in the state that a tapered bobbin is engaged with a tapered supporting shaft in the axial direction of a winding shaft at the inner periphery side of the winding shaft and then removing the supporting shaft from the bobbin. CONSTITUTION:A supporting shaft 11 formed on its outer peripheral surface in a tapered shape is engaged with a bobbin 10. A superconducting lead 1 is wound on the bobbin 10, impregnated with resin in the state that the bobbin 10 is engaged with the shaft 11, and a clamping force (w) of the lead 11 designated by an arrow is applied to a winding shaft 10a. A bearer 8 is contacted with a flange 10b of the tapered largediameter side of the shaft 10a and the shaft 11 is pressed from the tapered small-diameter side of the shaft 11 to remove the integrated superconducting coil from the shaft 11. Since the engaging surfaces of the shafts 10a, 11 are formed in tapered surfaces 12, the lead 1 and the shaft 10a are shrinked substantially in the same shrinking amount deltain the axial direction of the coil. Thus, a crack of the lead 1 due to the difference of the shrinkage amounts can be eliminated.
Patent JP-H0227613-A (JP)
Title: Superconductive film formation substrate
Inventor: HOSHIZAKI HIRONORI
IPC: C01G1/00
Filed: 1988-07-15
Abstract: PURPOSE:To acquire high critical current density and prevent the superconductive film formation substrate in the title from cracking itself, by using Y2BaCuO5 as a substrate and YBa2Cu3O7-4 as a superconductive film, and mutually junctioning both of them. CONSTITUTION:Y2BaCuO5 as a substrate 1 and YBa2Cu3O7-4 as a superconductive film 2 are used to mutually junction both of them. In such a manner like this, the combination of construction materials of the substrate 1 and the superconductive film 2 is selected. The junction of the superconductive film 2 onto the substrate 1 is then carried out by printing high-temperature superconductive ceramics comprising YBa2Cu3O7-4 in the form of a thick film on the substrate and heat-treating the printed film. Although inclusion of the superconductive phase, YBa2Cu3O7-4 and the substrate, Y2BaCuO5 tends to deteriorate superconductive characteristic, both materials are present as respectively independent construction materials in a region except the junction part according to the junction so that there is no problem. This makes it possible to acquire high critical current density and prevent the superconductive film formation substrate in the title from cracking itself.
Patent JP-2001001315-A (JP)
Title: Manufacture of wear resistant woody material
Inventor: HARA NOBUHIKO
IPC: B27K5/00
Filed: 1999-06-24
Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing a wear resistant woody material capable of easily manufacturing a woody material having an improved wear resistance by using an antifriction material and manufacturing the material having high quality. SOLUTION: The method for manufacturing a wear resistant woody material comprises the steps of coating an undercoat paint layer 3 formed on a surface 1A of the woody material 1 with a first paint, and separately spraying an antifriction material 8 on the paint while the paint is in an uncured state. The method further comprises the steps of curing and drying the paint to form a first paint layer 9 containing the material 8, further coating the first paint layer 9 with a second paint 11, and curing and drying the paint 11. Thus, there is no inconvenience such as scarcely uniformly coating of the woody material with the antifriction material due to a precipitation of the antifriction material mixed in the paint, in the paint like a prior art, but the wear resistant woody material small in variations of an amount of a wear material in each product can be easily manufactured.
Patent JP-H0342563-A (JP)
Title: Semiconductor evaluating device
Inventor: OGUSHI HIDEYO
IPC: G01N27/00
Filed: 1989-07-10
Abstract: PURPOSE:To analyze the density of a impurities or the like in a sample by setting the state, in which a tunnel current flows between a probe and a sample, to apply a voltage pulse and measuring the transient characteristic of the junction current by an independently provided electrode. CONSTITUTION:A pulse generator PG supplies the voltage pulse from a probe P to the pn junction or the like of a sample DUT in accordance with the indication from a CPU (processor). Measuring electrodes are provided on front and rear faces of the sample DUT and are connected to a preamplifier PA which measures the tunnel current. The output current of the amplifier PA is supplied to an A/D converter ADC and is converted to a digital signal. The converter ADC converts the tunnel current, which momently changes in accordance with the pulse voltage supplied from the probe P, to a digital signal. This digital signal is supplied to a waveform analyzer WC and is recorded in a waveform memory WM. The front end of the probe P is scanned in X and Y directions by a fine adjustment mechanism MCU to set the measuring point of the sample DUT, and the density of impurities or the like is obtained as a three-dimensional picture from measured results.
Patent JP-S5879736-A (JP)
Title: Wiring structure
Inventor: KAWAMOTO EIJI
IPC: H01L21/3205
Filed: 1981-11-05
Abstract: PURPOSE:To allow wiring tracks to have two different signals in common thereby to increase the integration degree, by altering or overlapping layers for horizontal segments and vertical segments of wiring with each other. CONSTITUTION:Hitherto, a first layer is formed with four vertical segments 11- 14, while a second layer is formed with horizontal segments 15, 16. Contacts 17, 18, 19, 20 are conventionally provided on points where the vertical segments 11-13, 12-14 and the horizontal segments 15, 16 cross each other, respectively, so that the vertical segments 11-13, 12-14 are electrically connected to each other respectively. According to the present invention, however, the horizontal segment 16 conventionally formed in the second layer is formed on the contacts 17, 18 in the first layer, i.e., on the position where the horizontal segment 16 overlaps with the horizontal segment 15. Thus, wiring can be alotted within one track even in the case where there are two sets of vertical segments.
Patent JP-H0227382-A (JP)
Title: Developing device
Inventor: HOSAKA AKIHITO
IPC: G03G15/08
Filed: 1988-07-15
Abstract: PURPOSE:To obtain an image being free from uneven density by providing a member in the vicinity of a developer carrying body and running along its longitudinal direction and separating a descending path of developing material and an ascending path on the carrying body. CONSTITUTION:A developer of a mixture of a magnetic particle 27 and a toner particle 28 is attracted by a magnetic pole S3 when a sleeve 22 rotates. Subsequently, a developer bank is generated in a magnetic field to a magnetic plate 27 in the longitudinal direction of the adjacent sleeve 22, the developer passes through a gap of the sleeve and the magnetic plate and reaches a blade 24, and a part thereof is fed to a developing part from the gap to be sleeve 22. The developer which does not pass through drops down in a raindrop-like lump along a path A. The magnetic plate 29 prevents turning-in of the dropped particle lump, and a direct drop and a collision onto the sleeve 22 are avoided. As a result, uneven density and deterioration of the magnetic particle are prevented, and an image having a high quality is obtained.
Patent JP-H0618655-A (JP)
Title: Sound generator
Inventor: MURAYAMA TOMOKI
IPC: G01S15/10
Filed: 1992-07-06
Abstract: PURPOSE:To obtain a power supply controller of a sound generator which does not require a battery with an unnecessarily large capacity. CONSTITUTION:The title generator transmitting an acoustic signal is provided with a power supply controller consisting of a power supply 7, a capacitor 6 which is charged by the above power supply and transmits sound from the title generator owing to discharge of the charged electric charge, and resistors 5 and 12 which feed charged current from the power supply 7 to the capacitor 6 and the resistance of the resistors 5 and 12 is maintained to be high for a certain amount of period after power is turned on. The high-resistance resistor 12 is connected to the resistor 5 in series as a means for maintaining the resistance of the resistors 5 and 12 to be high. Further, the high-resistance resistor 12 is short-circuiting in a certain amount of period after power is turned on by a timer 11 which initiates counting when power is turned on.
Patent JP-S6072261-A (JP)
Title: Semiconductor memory
Inventor: HASEGAWA HITOSHI
IPC: H01L27/108
Filed: 1983-09-28
Abstract: PURPOSE:To prevent the decrease in the dielectric constant due to the mixing of Si into a dielectric layer by a method wherein a barrier metal (TaN, TiN, etc.) is used, instead of poly Si of the conventional use, for the lower side electrode layer of the capacitor of a semiconductor memory cell. CONSTITUTION:A P type Si substrate 1 is provided with a field oxide film 9, gate oxide film 4, poly Si gate electrode 5, surface oxide film 10, and n<+> layers 2 and 3 by the fixed method. Next, the lower side electrode of TaN 6 and Ta are successively laminated by sputtering, and then changed into a Ta2O3 layer 7 by heating in O2, and the upper side opposed electrode of poly Si 8 is formed thereon. It is covered with a PSG11, and an Al bit line 12 is attached. Since a barrier metal is used for the lower side electrode layer of the capacitor, the decrease in the high dielectric constant of Ta2O3 due to the mixing of Si is avoided, and the resistance of contact of the n<+> layers with the lower side electrode greatly reduces; accordingly the MOS dynamic RAM of a small size and high performance can be obtained.
Patent JP-S6329414-A (JP)
Inventor: PAORO GATSUTSUANA PURIAROTSUJI
IPC: H01B7/28
Filed: 1987-07-16
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S6423335-A (JP)
Title: Instruction processing system
Inventor: HOSAKA KAZUHIDE
IPC: G06F9/22
Filed: 1987-07-18
Abstract: PURPOSE:To shorten the executing time of a branch instruction by fetching the branching destination instruction of a branch instruction during execution of an instruction preceding said branch instruction by one step. CONSTITUTION:An instruction fetch permission bit 122 is provided into a microinstruction register 120. A branch instruction deciding circuit 70 decides based on the output of an instruction register 30 whether the instruction to be carried out next is equal to a branch instruction or not. If so and an active microinstruction is carried out by the bit 122, a fetch request is immediately delivered for a branching destination instruction. Then a branching success/ failure deciding circuit 90 decides the success or failure of branch based on the output of the register 30 and the output of a condition status register 100. When the success of branching is confirmed, the branching instructions received from a memory part 1 are fetched by the instruction prefetching registers 11-13.
Patent JP-S5968544-A (JP)
Title: Exhaust duct in cylinder head
Inventor: SHIMODA KUNIHIKO
IPC: F02F1/24
Filed: 1982-10-13
Abstract: PURPOSE:To improve supercharging characteristics, by forming a ratio between an area corresponding to an inner diameter of the valve seat part and a cross- sectional area of an exhaust duct in a cylinder head extending from an exhaust valve seat part to an outlet of the cylinder head of an internal-combustion engine provided with an exhaust turbo-supercharger at 0.5-1.0. CONSTITUTION:An inner diameter of an exhaust duct 5 extending from a seat part of a valve seat 4 to an inlet of the exhaust duct 5, that is, from an inner diameter DTH to that DN of the valve seat 4 is set in a small size so that a cross-sectional area of the duct 5 ranges from an area ATH corresponding to the inner diameter DTH to an area AN corresponding to 0.5-1.0 times of the area ATH. A cross section of the exhaust duct extending from an inlet of the exhaust duct to an outlet 6 of a cylinder head is kept at the fixed area AN and its cross-sectional shape is in a shape close to a circle. In addition to the above, a bent part extending from a valve seat 4 part to an outlet 6 of the cylinder head is set in a large size so that a curving radius R at the center of the exhast duct is given by an expression R/DN>=1.0.
Patent JP-H0933660-A (JP)
Title: Beta-ray dose measuring instrument
Inventor: YAMANO TOSHIYA
IPC: G01T1/24
Filed: 1995-07-14
Abstract: PROBLEM TO BE SOLVED: To obtain a β-ray measuring instrument which can be applied to a personal exposure dosemeter and has little energy dependency, by using a pulse-height discriminator circuit which outputs a standardized signal only for a pulse having a peak value within a specific voltage range. SOLUTION: A β ray enters a β-ray detecting element 2 through an incidence window 4 and generates an electric charge correlating to the energy of the βray and this generated electric charge is converted, into a voltage pulse signal by an amplifier circuit 5 and then inputted to a pulse-height discriminator circuit 8. The pulse-height discriminator circuit 8 outputs a pulse signal standardized to have a fixed waveform peak value, only when the peak value of the inputted voltage pulse signal is within a voltage range set beforehand, and this standardized pulse signal is counted by a counter circuit 9. The sensitivity of β-ray measurement is varied according to the range of a specific voltage set for the pulse-height discriminator circuit 8.  By regulating the set value of the pulse- height discriminator circuit 8, accordingly, measurement of the dose of the βray depending little on the energy in terms of the sensitivity to the β ray can be executed even in a place where β-ray emitting nuclides different in the maximum β-ray energy are present mixedly.
Patent JP-2000012785-A (JP)
Title: Semiconductor device
Inventor: HAGIWARA YOSUKE
IPC: H01L29/94
Filed: 1998-06-25
Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device equipped with a satisfactory and thin capacitor insulating film. SOLUTION: A P--type well region 2 is formed inside an N-type semiconductor substrate 1 on the main surface side, a high-concentration P-type diffused region 3 is formed inside the P--type well region 2 on the main surface side, and a P+-type high concentration region 4 is formed apart from the P-type diffused region 3 surrounding the periphery of the P--type well region 2 in a plan view. A low-resistance polysilicon film 6 is formed on the P-type diffusion region 3 through the intermediary of a thin capacitor insulating film 5 of thermal oxide film. The capacitor insulating film 5 is formed at the same time, when the gate oxide film of a CMOS is formed on the same N-type semiconductor substrate 1. A second wiring 11 of aluminum is connected electrically to the P+-type high concentration region 4.  A first wiring 10 of aluminum is formed apart from an the polysilicon film 6, and a low-resistance polysilicon resistor element 30 is provided between the first wiring 10 and the polysilicon film 6.
Patent JP-S57101907-A (JP)
Title: Drilling control method of numerical control drilling machine
Inventor: IMURA TAKAYOSHI
IPC: G05B19/18
Filed: 1980-12-17
Abstract: PURPOSE:To execute drilling which generates no failure, by calculating the extent of expansion of a base plate from a difference between a design pitch and an actual pitch between each pattern, correcting the coordinates of a drilling position in drilling information by said extent. CONSTITUTION:A data processing device 2 in which drilling information has been stored, a numerical control device 3 and a body 5 and provide. Also, on a frame 6 of the body 5, a stable 7 is driven so as to move in th direction as indicated with arrows A, B, and an upper head 10 is constituted so as to move in the directions as indicated with arrows C, D. Subsequently, in a state that a multilayered printed base plate 20 is spot-faced, and dummy land patterns 20a- 20d of 4 places are exposed, the base plate 20 is set onto the table 7. The total  extent of shift is calculated from a difference between design coordinates and  actual coordinates of said lands 20a-20d, also the extent of expansion of the  base plate is calculated from a difference of a design pitch and an actual pitch  between each pattern, and from these extents, the coordinates of a drilling position in the drilling information are corrected.
Patent JP-S6334277-A (JP)
Inventor: FUJITA SHIGEYOSHI
IPC: B65G1/04
Filed: 1986-07-29
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0627186-A (JP)
Title: Method and device for evaluating semiconductor transistor characteristics
Inventor: MORII TOMOYUKI
IPC: G01R31/26
Filed: 1992-07-06
Abstract: PURPOSE:To independently measure the characteristics of n-type transistor and single n-type transistor constituting a CMOS inverter circuit, based on actual operation of LSI. CONSTITUTION:The device is provided with a CMOS inverter circuit 1 consisting of an n-type transistor 2 and p-type transistor, a pulse generator 8 that is connected to the input part of the circuit 1 and generates continuous pulse voltage, a discrete n-type transistor 3, and a change-over switch for changing over a gate 6 and drain 7 of the transistor 3 to the output part of the generator 8 or the circuit 1. The change-over switch is changed over in order to respectively measure the characteristics of the transistor 2 constituting the circuit 1 where gate voltage and drain voltage work reversely and the transistor 3 where gate voltage and drain voltage work synchronously.
Patent JP-S6077816-A (JP)
Inventor: MOGAMI TATSUROU
IPC: B65B9/04
Filed: 1983-09-27
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S6334102-A (JP)
Inventor: SEKIGUCHI YOJI
IPC: B28B13/02
Filed: 1986-07-29
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。