Patent ES-8603132-A1 (ES)
Title: Telecommunication line circuit and associated voltage converter
IPC: H04M19/00
Filed: 1984-10-19
Abstract: At least one telecommunications line amplifier can be coupled via telephone lines between a telephone subscriber's appts. and an exchange. A biasing d.c. signal, produced by a line amplifier and d.c. control circuit, prevents the line amplifier from saturating when an a.c. control signal, e.g. a 'ringing' signal, is transmitted. The control circuit contains two voltage-to-current converters. - The biasing signal amplitude varies in proportion to the amplitude of the a.c. signal envelope. The use of this circuit also results in less power being dissipated by the amplifier during the a.c. signal transmission. The circuit includes a polarity reversing circuit, consisting of a differential amplifier coupled to secondary amplifiers. (Dwg.0/2) EPAB- EP-241604 B Polarity reversal circuit for reversing the polarity of first (L10) and second (L11) line conductors of a telecommunication line, said circuit including a reference circuit having at least one reference control output (JP1, JP2) which is coupled through controlled gating means to at least one signal output (VT1, VR1) of said polarity reversal circuit, said signal output being coupled to said telecommunication line, means being provided to generate a reference voltage (V + - x, VEET + x) through forwardly biased transistor base-emitter junctions (P1, N4, P6, N17, N15, N16; N6, N3, N5, P7, N17, N15, N16), characterised in that said reference voltage (V + - x, VEET + x) is produced on said reference output (JP1, JP2), which is coupled to said signal output (VTI, VRI) through said forwardly biased transistor base-emitter junctions (P1, N4, P6, N17, N15, N16; N6, N3, N5, P7, N17, N15, N16) of bipolar transistors in series with a compensation resistance, the value of a predetermined constant current flowing through said resistance and the resistance value being selected such that the resulting voltage drop in said resistance compensates the voltage drops in said junctions to produce at said signal output an output voltage exactly equal to said reference voltage. - (Dwg.1/3) - EP-241604 B Polarity reversal circuit for reversing the polarity of first (L10) and second (L11) line conductors of a telecommunication line, said circuit including a reference circuit having at least one reference control output (JP1, JP2) which is coupled through controlled gating means to at least one signal output (VT1, VR1) of said polarity reversal circuit, said signal output being coupled to said telecommunication line, means being provided to generate a reference voltage (V + - x, VEET + x) through forwardly biased transistor base-emitter junctions (P1, N4, P6, N17, N15, N16; N6, N3, N5, P7, N17, N15, N16), characterised in that said reference voltage (V + - x, VEET + x) is produced on said reference output (JP1, JP2), which is coupled to said signal output (VTI, VRI) through said forwardly biased transistor base-emitter junctions (P1, N4, P6, N17, N15, N16; N6, N3, N5, P7, N17, N15, N16) of bipolar transistors in series with a compensation resistance, the value of a predetermined constant current flowing through said resistance and the resistance value being selected such that the resulting voltage drop in said resistance compensates the voltage drops in said junctions to produce at said signal output an output voltage exactly equal to said reference voltage. ((Dwg.1/3)) USAB- US4614840 A The appts. comprises a line amplifier whose output is coupled to a telecommunication line conductor, a DC bias signal is applied of such a value that the amplifier cannot saturate when an AC metering signal is applied to it. The bias signal delta V is a voltage equal to the sum of a constant voltage delta VRG-VAG and a variable second voltage VE-VAG varying with the envelope VE of the metering signal MS. Two operational line amplifiers whose outputs TP,RG are connected to respective conductors of the telecommunication line L10,L11 and which are each fed between a first (V+) and second VEET DC supply voltages. The DC biasing to the inputs of the amplifiers so that a DC voltage appears on each of the line conductors which differs from the first or second supply. - A resistance R2,R3 connects outputs of the amplifiers to their inverting inputs. A bias DC voltage equal to VH'=(V+)-2 delta V or VEET is applied to the non-inverting inputs of each of the amplifiers and a voltage drop equal to the bias voltage in the resistances is realised so that the DC voltage appearing on the line conductor is equal to VH=(V+)-delta V or VL=VEET+ delta V.