baber/WOPTO huggingface dataset:
Patent TW-516194-B (TW)
Title: Wiring substrate, semiconductor device and package stack semiconductor device
Inventor: JUSO HIROYUKI
IPC: H01L23/498
Filed: 2001-06-12
Granted: 2003-01-01
Abstract: A wiring substrate of the present invention includes a terminal section, provided on a first surface of an insulating substrate, for wire or flip-chip bondings; a land section, provided on the insulating substrate, for an external connection terminal; wiring patterns, respectively provided on the first surface and a second surface on the other side of the first surface, for making electrical connection between the terminal section and the land section; and a support pattern, provided on the second surface corresponding in position to the terminal section, for improving bondings. The wiring substrate can relieve connection failure in bondings.
Patent TW-502293-B (TW)
Title: Substrate processing device and substrate processing method
Inventor: OTA YOSHIHARU
IPC: H01L21/00
Filed: 2001-06-12
Granted: 2002-09-11
Abstract: The present invention provides an ultraviolet irradiation unit (UV) for processing the substrate G by irradiating ultraviolet as shown in Fig. 3, which comprises: a table 76 for supporting the substrate G; one or more lamps 64(n) for emitting ultraviolet by supplying power, and the ultraviolet emitted from the lamp 64(n) is toward the lamp chamber 66 for irradiating the substrate G; a table driving portion 80, which moves the table 76 along the specific direction, so that the ultraviolet from the lamp chamber 66 can scan the processed surface of the substrate G supported on the table 76 from one end of the substrate until the other end; and, a controller 88, for controlling the time period of substantially static state of the table 76 for the substrate G from one end and/or the other end to be irradiated by the ultraviolet from the lamp chamber 66.
Patent TW-506007-B (TW)
Title: Structure evaluation method, semiconductor device manufacturing and recording medium
Inventor: NOZAWA KATSUYA
IPC: H01L21/66
Filed: 2001-06-15
Granted: 2002-10-11
Abstract: High accuracy structure evaluation method that employs optical evaluation, semiconductor device manufacturing and recording medium are provided. It sets the initial values of the procedure conditions and uses the procedure simulator to predict the elementary structure of the semiconductor device, and then calculate the predictive value of the measurement data of the physical quantity. Further, employ the optical evaluation method to compare the real measurement data and the theoretically calculated data of the physical quantity of the key elements of the semiconductor device and use for example rapid descending method to get likely actual structure of the measured key elements of the semiconductor device. By using the result, it also can correct the procedure conditions of the key elements of another semiconductor devices.
Patent TW-512281-B (TW)
Title: Apparatus and method for drawing three dimensional graphics by controlling Α value based on z coordinate value
Inventor: MORIWAKI SHOHEI
IPC: G06T15/00
Filed: 2001-06-27
Granted: 2002-12-01
Abstract: In the three-dimensional graphics drawing apparatus, a color register has an Α register in which a Z-coordinate value of an object is set as its Α value. A drawing unit draws the object based on coordinate data stored in a coordinate register and color data stored in the color register. Accordingly, the degree of transparency of a drawing object that is closer to the front increases, and a portion that is hidden behind the drawing object becomes apparent. Visibility is thus increased.
Patent TW-504480-B (TW)
Title: Magazine for semiconductor device
Inventor: SEMBOMMATSU SHIGERU
IPC: G01R1/04
Filed: 2001-07-03
Granted: 2002-10-01
Abstract: A magazine 12 for storing a plurality of packaged semiconductor integrated circuit devices 10, such as BGA packages, having connection terminals 1 located on a lower surface of the package, includes an elongated housing 9 having a pair of opposite end open mouths fitted with a rubber stopper or a bottle stopper. The housing includes a horizontal bottom plate 6, a pair of first side plates 4 extending from opposite edges of the horizontal bottom plate 6 in an inclined upward direction, a pair of second side plates 5 extending vertically upward from an upper edge of the pair of first side plates 4, respectively, and a horizontal upper plate 7 bridging an upper edge of the pair of second side plates 5. The pair of first side plates 4 have an inclined angle Α which is necessary and sufficient to ensure that the connection terminals 1 of the semiconductor device 10 never contact with the first side plate 4 and the bottom plate 6 when the semiconductor device 10 is stored in the housing 9.
Patent TW-503514-B (TW)
Title: Film forming method, semiconductor device and semiconductor device manufacturing method
Inventor: OKU TAIZO
IPC: H01L21/312
Filed: 2001-07-17
Granted: 2002-09-21
Abstract: The present invention relates to a film forming method of forming an interlayer insulating film having a low dielectric constant to cover a wiring. In construction, an insulating film for covering a wiring is formed on the substrate by plasmanizing a film forming gas, that consists of any one selected from a group consisting of alkoxy compound having Si-H bonds and siloxane having Si-H bonds and any one oxygen-containing gas selected from a group consisting of O2, N2O, NO2, CO, CO2, and H2O, to react.
Patent TW-581771-B (TW)
Title: Recombinant production of a polypeptide for inducing interferon-gamma production, and monoclonal antibody against the polypeptide
Inventor: USHIO SHIMPEI
IPC: A61K38/00
Filed: 1995-10-04
Granted: 2004-04-01
Abstract: A novel polypeptide which has a molecular weight of 18,500 ± 3,000 daltons on SDS-PAGE and a pI of 4.9 ± 1.0 on chromatofocusing. The polypeptide strongly induces the IFN-gamma production by immunocompetent cells with only a small amount, and dose not cause serious side effects even when administered to human in a relatively-high dose. It is readily prepared by using a monoclonal antibody obtained from hybridomas, and incorporated into agents for IFN-gamma susceptive diseases to treat and/or prevent malignant tumors, viral diseases, bacterial infectious diseases, and immune diseases.
Patent TW-540007-B (TW)
Title: Character recognition system
Inventor: NAKAGAWA SHINYA
IPC: G06K9/62
Filed: 2001-08-30
Granted: 2003-07-01
Abstract: In the prior art, in character recognition of a language having many characters, such as Japanese, a feature vector is extracted from an input pattern, distance between the feature vector and reference vectors are calculated, and a character corresponding to a reference vector having the smallest distance value is selected as a recognized character. However, in the character recognition of a language having many characters, since the number of the reference vectors to be compared is large, there is a limit in improvement of processing speed of the character recognition. In the present invention, reference vectors corresponding to target characters are classified into plurality of classes based on occurrence frequencies of characters. When distances between the feature vector and the reference vectors are calculated, a comparison is sequentially made from the reference vectors of a class having a high character occurrence frequency, so that the processing speed of the character recognition is improved.
Patent TW-543153-B (TW)
Title: Method of forming a CMOS type semiconductor device having dual gates
Inventor: KIM WOO-SIK
IPC: H01L27/092
Filed: 2001-09-10
Granted: 2003-07-21
Abstract: A method of forming a CMOS type semiconductor device having dual gate comprises forming a first gate insulation layer and a first metal-contained layer sequentially on a surface of a substrate in first and second impurity type transistor regions, removing the first metal-contained layer and the first gate insulation layer in the second impurity type transistor region, forming a second gate insulation layer and a second metal-contained layer in the second impurity type transistor region, and forming first and second electrodes respectively in the first and second impurity type transistor regions by patterning the first and second metal-contained layers. When first and second impurities in the transistor regions are respectively p-type and n-type impurities, a fermi level of the first metal-contained layer has an energy level similar to the balance band of the silicon layer in the first impurity type transistor region heavily doped by a p-type impurity and a fermi level of the second metal-contained layer has an energy level similar to the conduction band of the silicon layer in the second impurity type transistor region heavily doped by an n-type impurity.
Patent TW-498033-B (TW)
Title: Vehicle body structure
Inventor: TAKEMOTO YORITO
IPC: B60N2/68
Filed: 2001-10-08
Granted: 2002-08-11
Abstract: A front side member extending in the longitudinal direction of a vehicle is comprised of a kick up portion, and a cylindrical front side member body with an octagonal sectional form extending from the front end to the rear end in front of the kick up portion. The kick up portion and the front side member body are integrated together by joining an inner member and an outer member. The respective portions of the inner member and the outer member between the kick up portion and the front side member are concaved to be in contact with each other, and are welded together to form a joint. A first closed section is formed at the upper side of the joint, and a second closed section is formed at the lower side of the joint. This realizes a vehicle body structure having a lightweight front side member with an improved impact resistance and a high energy absorbing efficiency.
Patent TW-I222817-B (TW)
Title: Data acquisition method and terminal
Inventor: YAMADA KAZUHIRO
IPC: G06F9/445
Filed: 2001-11-23
Granted: 2004-10-21
Abstract: Receive the ADF storing the data attribute information through the terminal in network communication and based on the selected communication means (normally SSL) upon receiving the ADF and the selected communication means upon receiving the physical JAR storing the said data to determine if it is allowable communication means. If yes, the JAR will be received. When the communication means is not allowed for jeopardizing security, the JAR won't be received, that is data can be obtained only when the communication means is allowed.
Patent TW-I278706-B (TW)
Title: Method of manufacturing photo-alignment layer
Inventor: YIP WING C
IPC: G02F1/1337
Filed: 2001-11-23
Granted: 2007-04-11
Abstract: A photo-alignment layer having excellent long-term stability to light and heat is manufactured by coating a material for the photo-alignment layer, which contains a dichroic dye having two or more polymerizable groups per molecule, on a substrate, and exposing the coating layer to polarized light, thereby imparting a photo-alignment function, and polymerizing the polymerizable groups by heating or light exposure.
Patent TW-529090-B (TW)
Title: Back-end metallisation process
Inventor: MEULENKAMP ERIC ALEXANDER
IPC: C25D7/12
Filed: 2002-01-08
Granted: 2003-04-21
Abstract: The invention provides for a back-end metallisation process in which a recess is filled with copper and which includes the step of forming a plating base on the surfaces of the recess for the subsequent galvanic deposition of the said copper, and wherein subsequent to the formation of the plating base, but prior to the galvanic deposition of the copper, a modifying agent is introduced to the recess and which serves to absorb in the surface regions not covered by the plating base and to thereby modify the surface to promote copper growth thereon so as to effectively repair the initial plating base before the copper plating fill commences.
Patent TW-591003-B (TW)
Title: Porous ceramics and method for preparation thereof, and microstrip substrate
Inventor: MIYANAGA MICHIMASA
IPC: B24B37/04
Filed: 2002-02-07
Granted: 2004-06-11
Abstract: Powder of a metal serving as a precursor for ceramics (1) and a sintering additive are mixed with each other and heat-treated by microwave heating thereby nitriding or oxidizing the metallic powder from the surface thereof and diffusing the metal with a nitride or an oxide formed on the shell of the metal for obtaining porous ceramics (1) having homogeneous and fine closed pores (1a). The porous ceramics (1) according to the present invention, having the closed pores (1a) homogeneously diffusing at a high ratio, exhibits excellent characteristics when applied to an electronic circuit board or the like requiring moisture absorption resistance, low permittivity and low dielectric loss as well as mechanical strength.
Patent TW-550498-B (TW)
Title: Method and apparatus for modular multiplying and calculating unit for modular multiplying
Inventor: ELBE ASTRID
IPC: G06F7/72
Filed: 2002-02-08
Granted: 2003-09-01
Abstract: In a method for modular multiplying a multiplicand (C) by a multiplier (M) using a modulus (N), the multiplicand, the multiplier and the modulus being polynomials of variable, a multiplication look-ahead method to obtain a multiplication shift value (sz) is carried out. An intermediate result polynomial (Z) is shifted to the left by the number of digits of the multiplication shift value (sz) to obtain a shifted intermediate result polynomial (Z'). Furthermore, a reduction look-ahead method to obtain a reduction shift value (sN) is carried out, the reduction shift value equalling the difference of the degree of the shifted intermediate result polynomial (Z') and the degree of the modulus polynomial (N). The modulus polynomial is then shifted by a number of digits equalling the reduction shift value to obtain a shifted modulus polynomial. In a three-operands addition, the shifted intermediate result polynomial (Z') and the multiplicand (C) are summed and the shifted modulus polynomial (N') is subtracted to obtain an updated intermediate result polynomial (Z). By iteratively executing the preceding steps the modular multiplication is processed progressively until all the powers of the multiplier polynomial have been processed. By means of a carry disabling function it is possible to carry out both a Z/NZ arithmetic as well as a GF(2<n>) arithmetic on a single long number calculating unit.
Patent TW-I240021-B (TW)
Title: Method of producing cellulosic sheaths around fibers of textiles and textiles produced thereby
Inventor: OFFORD DAVID A
IPC: D06M15/09
Filed: 2002-03-12
Granted: 2005-09-21
Abstract: The present invention is directed to a method for treating a synthetic, man-made, or natural fiber substrate to create a permanently attached carbohydrate sheath around the fibers of the substrate. Such a treatment gives a composite fibrous substrate that exhibits the most desirable characteristics of the fiber core coupled with the most desirable characteristics of the carbohydrate sheath. It is also possible to apply this technology to individual synthetic fibers or yarns, if desired before weaving, knitting, stitch-bonding or other method of woven or non-woven substrate formation.
Patent TW-I282720-B (TW)
Title: A base seat of charger for personal digital assistant (PDA)
Inventor: TSAO JOHNSON
IPC: H05K7/00
Filed: 2002-03-28
Granted: 2007-06-11
Abstract: A base seat includes a base body with a back revolving axle and a supporting frame with axis hole on top of it. Via coupling of the axis hole and the revolving axle, the supporting frame is able to prop up the base seat body. And, if heavy external force acts on the base body when the base body is propped up, the axis hole will then detach from the revolving so that the supporting frame and the base body can separate with each other to prevent the supporting frame from breaking caused by over force. The present base seat can be used as base seat of charger for personal digital assistant (PDA).
Patent TW-544983-B (TW)
Title: Semiconductor laser device
Inventor: ABE SHINJI
IPC: H01S5/34
Filed: 2002-04-30
Granted: 2003-08-01
Abstract: In a semiconductor laser device including a window structure region formed by disordering an active layer or active layers of a quantum well structure by silicon ion implantation and a subsequent heat treatment, a dislocation loop is substantially absent in the window structure region and the vicinity thereof (upper clad layer). Accordingly, deterioration of the semiconductor laser device induced by dislocation loops can be prevented, and reliability of the semiconductor laser device can be improved.
Patent TW-I229138-B (TW)
Title: Magnetron-sputtering source
Inventor: HEINZ BERND
IPC: G11B7/26
Filed: 2002-05-06
Granted: 2005-03-11
Abstract: In order to optimize the efficiency on the sputtered material and the target-lifetime of a magnetron-source, at the same time to attain good distribution-values of the layer on a substrate and keep stable through the whole target-life-time, a concave sputtering-face 20 in an arrangement with small target-substrate distance d is combined with a magnet-system to form the magnetron-electrons-falls, in which the outer-pole 3 of the magnetron-electrons-falls is stationary arranged and an eccentrically arranged inner-pole 4 with a 2nd outer-pole-part 11 is formed rotatably around the central source-axis 6.
Patent TW-582098-B (TW)
Title: Method of evaluating core based system-on-a-chip (SOC) and structure of SOC incorporating same
Inventor: RAJUSMAN ROCHIT
IPC: G01R31/317
Filed: 2002-05-07
Granted: 2004-04-01
Abstract: A method of debugging an individual core in core based system-on-a-chip (SOC) ICs with high accuracy and observability, and a structure of SOC incorporating the method. The method includes the steps of building two or more metal layers of a pad frame for each core in an SoC while connecting I/O (input and output) pads on a lower metal layer to a top metal layer, thereby exposing all I/O pads and power pads on a surface of the top metal layer of the pad frame of each core, and applying test vector to each core through the I/O pads on the top metal layer of the core and evaluating response outputs of the core received through the I/O pads on the top metal layer.
Patent TW-537960-B (TW)
Title: Method and device for controlling the pressure in a vented single-screw extruder or a cascade extruder
Inventor: SCHAFER BERNHARD
IPC: B29C48/38
Filed: 2002-05-27
Granted: 2003-06-21
Abstract: The invention relates to a method for controlling the minimum level of the pressure in the first half of the metering section, as seen in the transport direction, in a vented single-screw extruder or a cascade extruder during the transport of a molten thermoplastic, the vented single-screw extruder or the cascade extruder in each case having a first screw section (15), a venting zone (14), a metering section (22) and a measurement control circuit (M), which includes a pressure-measuring sensor (P) in the first half of the metering section, a controller (R) and an actuator (S) for influencing the pressure in the metering section, in which method the pressure is measured by means of the pressure-measuring sensor (P) and is set by means of the controller (R) and the actuator (S) in such a way that the minimum level at the location of the measurement is between 0.1 and 10 bar.
Patent TW-537873-B (TW)
Title: Spike for golf shoes
Inventor: TERASHIMA YASUYUKI
IPC: A43C15/16
Filed: 2002-06-20
Granted: 2003-06-21
Abstract: The invention is intended to provide a spike for golf shoes that secures walking stability and sufficient gripping force for any green surface in golf courses and that will never damage a delicate green surface such as a batting green. A spike for golf shoes comprises a plurality of legs (2) extending downward from a spike main body, a rounded bulge (B) installed in the front end of each leg (2), wherein even if a bulge (B) wears out, there will be no sharp portion produced in the bulge (B).
Patent TW-535261-B (TW)
Title: Manufacturing method of mask ROM
Inventor: CHEN SHI-XIAN
IPC: H01L21/8246
Filed: 2002-06-24
Granted: 2003-06-01
Abstract: A manufacturing method of mask ROM is disclosed, which comprises: first, forming a first isolation layer on a substrate having plural parallel bit lines; second, forming plural parallel trenches in the isolation layer to define plural word lines; sequentially forming a gate oxide layer, a polysilicon layer on the bottoms of the parallel trenches to make plural parallel word lines; third, globally forming a second isolation layer and then etching the second isolation layer through plural strip type photoresist to form plural channel regions between the two adjacent bit lines on the word line; and finally programming the channel region via a hole-pattern mask.
Patent TW-552725-B (TW)
Title: Method for improving surface roughness of anode in OLED
Inventor: LEE HSIN-HUNG
IPC: H01L33/00
Filed: 2002-07-02
Granted: 2003-09-11
Abstract: A method for improving the surface roughness of the anode in OLED is described. A substrate is provided firstly. A multi-step sputtering process is performed to form at least two layers anode. Then, an emitting layer is formed on the anode, and a cathode is formed on the emitting layer.
Patent TW-567067-B (TW)
Title: Air massager for foot
Inventor: MATSUMOTO HIROSHI
IPC: A61H15/00
Filed: 2002-07-02
Granted: 2003-12-21
Abstract: The present invention relates to an air massager capable of efficiently promote the blood circulation of a human leg. This air massager has a plurality of air bags that can inflate to apply pressure on a human leg. This air massager includes a plurality of air bags 13, 14 disposed beside the front portion of a human leg, and a plurality of air bags 11, 12 disposed at the locations corresponding to the calf of the leg. One of the plurality of air bags disposed beside the front portion of the leg and one of the plurality of air bags disposed at the locations corresponding to the calf of the leg constitutes a pair. Each such pair of air bags are inflated or deflated by use of an air pressuring and exhausting means. By thus, pressure may be applied simultaneously at plural locations of the leg by simultaneously inflating several air bags, and the locations on which pressure is applied may be changed together with time.
Patent TW-I252093-B (TW)
Title: Device for driving a rotary tool for a food-processing apparatus, and food-processing apparatus provided with such a device
Inventor: FOUQUET JACQUES
IPC: A47J43/04
Filed: 2002-08-23
Granted: 2006-04-01
Abstract: This drive device comprises a rotary shaft (50), integral with a drive head (56), capable of being fitted closely into a base part (30) of the rotary tool (24). This drive head (56) is provided with at least two studs (66), which can move between a radially set-back rest position and a radially separate use position, in which each stud is engaged in the base part (30), and an elastic membrane (76) is provided for protecting these studs (66), elastically returning these studs towards their rest position.
Patent TW-552490-B (TW)
Title: Apparatus and method of pulse type flow rate adjustment
Inventor: NAWATA TOKUHIDE
IPC: G05D7/06
Filed: 2002-10-16
Granted: 2003-09-11
Abstract: A kind of flow rate adjusting apparatus and flow rate adjusting method are disclosed in the invention, in which the new manner of pulse type is used to release the limit of the conventional apparatus. When the pulse is repeated (the open/close action of the second blocking valve (17) is conducted after the open/close action of the first blocking valve (12) is conducted), the flow rate Q of the processing gas vented from the second blocking valve (17) per unit time is calculated on the basis of the pressure, which is detected by the pressure sensor (14), after it is filled and the pressure P after it is vented for the processing gas of the gas filling volume (13). Furthermore, by changing the form of the pulse, the flow rate Q of the processing gas vented from the second blocking valve (17) per unit time is adjusted.