Patent GB-1076860-A (GB)
Title: Improvements in or relating to time division switching systems
IPC: H04Q11/04
Filed: 1964-10-21
Abstract: 1,076,860. Automatic exchange systems. WESTERN ELECTRIC CO. Inc. Oct. 21, 1964 [Oct. 31, 1963], No. 42849/64. Heading H4K. A telephone exchange having a time division switching arrangement where line circuits are repeatedly connected to a common bus in assigned time slots, has two arrangements for applying the ring and ring-back signals to the called and calling lines via the bus. The time slots are grouped into four repetitive time units of one second each and normally the ring and ring-back signals are applied only in the time unit with which the assigned time slot is associated. But when a line circuit is first assigned a time slot ring and ring-back tones are sent for a time unit of one second independent of the particular unit of time in which these lines would normally be rung. Fig. 1 shows the general arrangement. Line circuits L1 . . . LN or trunk circuits T1 . . . TM are periodically connected to the common bus 23 by sampling switches SW, whose timing is controlled by the network control unit 21 through supervisory equipment 13. A ringing control signal source 40 applies control signals to the bus to actuate a ring source 16, and a ring-back source 17 applies the smaller ring- back signals directly to the bus, both sources being controlled by the network control 21 which is itself controlled by a logic circuit 30 fed by store 19. An attendant can be connected to the bus through its sampling switch 25. Fig. 2 shows the ring and ring-back logic circuit which provides control signals to the network control to determine the instants and the type of ringing to be applied to the bus for each time slot. The outputs of the AND gates A1 . . . A4 produced by the clocks C1 . . . C4 are shown in Figs. 5 and 6 and define the repetitive time units of one second. Each 1 second unit contains pulses of 3À2 Ásecs. defining a selected number of the 25 time slots, e.g. in the first second only pulses for time slots 1, 5, 9, 13, 17, 21, 25 occur, and these pulses provide the timing basis for an arrangement of staggered ringing where only a certain number of lines are rung in one time unit. However, when a line is first assigned a time slot it is rung immediately for one second independently of this time basis. The information that the line is in this state is made by a pulse on the store lead CR at every instant of the respective time slot and communicated to the AND gates A7 and A8 whose outputs RC and RBC provide the ring and ring-back control signals to the network control 21. Because the sampling switches of the called and calling lines cannot be opened at the same time these lines, which are assigned the same time slots, are rung in alternate 80 Ásec. cycles of the slots by means of a 160 Ásec. pulse applied alternately to the AND gates A7 and A8 from the clock C5 and inverter 115. The third input to these gates is a 0À5 Ásec. pulse so that the signal RC or RBC on the bus lasts for only 0À5 Ásec. of the 3À2 Ásecs. allowed for the time slot. These three inputs will actuate the gates A7 and A8 at the appropriate times. After one second of ringing the control network up-dates the store by removing the CR bit and replacing it by an IR bit signifying that the line is now to be rung on the abovementioned time basis of a ring tone only in the allotted period of one second. Since the AND gates A7 and A8 no longer receive any pulse from the store on the CR lead they do not actuate and produce a signal on the RC or RBC outputs. The information signals for this other arrangement of ringing to the network control are produced by AND gates A5 and A6, namely RI for a called line and RBI for a calling line. The type of ringing information is sent from the store to the gates over lead IR at every time slot, but the gates will only operate if a pulse is received from the AND gates A1 . . . A5 over lead IT signifying that the particular time slot is one that is to be rung in the present one second time interval. Further inputs to these two gates produce the 0À5 Ásec. pulse and provide ring and ring-back in alternate cycles of the time slots. When the called line answers the IR bits are removed from the store and ringing control signals RI and RBI cease, at which instant a pulse appears on the output NRRB of AND gate A9, fed by inverters from gates A7 and A8, signalling control network to operate the sampling switches in unison. The attendant by making a request signal to network control is connected to the calling line during ringing periods by a signal TAA from OR gate 02. Although this gate is controlled by an attendant signal ATT from the store, it can only be actuated by ring-back signals RBC or RB1 or from AND gate A10 which is actuated in the 3 seconds silent period during ringing.