baber/WOPTO huggingface dataset:
Patent JP-S57183626-A (JP)
Title: Magnetic recording medium
Inventor: KITAMOTO TATSUJI
IPC: G11B5/852
Filed: 1981-05-07
Abstract: PURPOSE:To obtain a magnetic recording medium having excellent vertical orientation and high S/N, by dispersing ferromagnetic particles having <=0.3mu average particle length with 1-3 length/width ratio into a binder to obtain a vertical magnetized recording layer. CONSTITUTION:Ferromagnetic particles of gamma-Fe2O3, etc. having <=0.3mu mean particle length and 1-3 length/width ratio are used. A binder uses a thermoplastic resin having <=150 deg.C softening point and about 10,000-200,000 mean molecular weight, and a phenolic resin or an epoxy resin (thermosetting resin or reaction type resin) having <=200,0000 molecular weight under a coating state which becomes infinite with condensation and addition reactions after drying and heating. Then a magnetic coating material containing 10-2,000pts.wt. binder based on 100pts.wt. magnetic powder is coated with application of a magnetic  field, and the magnetic particles are oriented in the vertical direction to the  recording surface. Thus a magnetic recording medium is obtained. In such a  way, the output is increased with high recording density and high S/N.
Patent JP-S59210640-A (JP)
Title: Amorphous component
Inventor: SHIMADA JIYUICHI
IPC: H01L21/205
Filed: 1984-04-06
Abstract: PURPOSE:To provide a superiorly amorphous Si layer on the prescribed substrate by a method wherein the layer is formed according to materials containing F in the shape of chemical bond of identicalSi-F. CONSTITUTION:Structure of amorphous Si is changed by using mixed gas of SiF4 and Ar, and by changing sputtering condition using Si or graphite as a target. Atmospheric pressure is made to 10-0.02Pa, a substrate is heated at 30- 600 deg.C, electric power of 13.56MHz, 300-600W is used, partial pressure of SiF4 is made to 5-10% of total pressure, and when H2 is contained, partial pressure of H2 is selected to 1-10%. Then a-Si1-x:Fx (0<=x<=0.3, the ratio of the peak of the maximum absorption intensity and peak absorption intensity corresponding to absorption of SiF4 is 0.5 or less when wavelength is within 9-13mum), a-[Si1-xCx]1-y:Fy (0<=x<0.6 or 0<=y<=0.3), a-[{Si1-xCx}1-yHy]1-z:Fz (0<=x<0.6, 0<= y<=0.3, 0<=z<=0.3) are formed on the substrate. F is contained in the materials thereof mainly in the shape of identicalSi-F, usual defects of a-Si:F and a-Si:F:H, etc. are removed, and an amorphous Si layer having a favorably electric characteristic and favorably chemical stability can be obtained.
Patent JP-S62228901-A (JP)
Inventor: RENNAATO DANIERUSOON
IPC: G01B5/20
Filed: 1987-03-18
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H09258988-A (JP)
Title: Interruption control system
Inventor: ANEZAKI MITSUGI
IPC: G06F9/46
Filed: 1996-03-25
Abstract: PROBLEM TO BE SOLVED: To provide interruption control method/circuit by which multiple interruptions to CPU can be received and circuit/device constitution can be facilitated. SOLUTION: An interruption control circuit is provided with plural interruption control parts 1, 2...N and a high-order interruption control part 20 arbitrating interruption coming from plural interruption lines. The interruption control part 1 is provided with plural interruption request parts 1, 2...M having interruption generation circuits for an interruption request pulse signal 101, a clock generation part 10 generating a clock signal 600, an interruption request pulse detection part 11 detecting the interruption request pulse signal 101 and detecting a pulse position (M), an interruption request number register 12 where the interruption request number (M) being a number allocated to the interruption generation circuit is set,  an interruption line control part 14 arbitrating interruption coming within one interruption line and an interruption response pulse generation part 13 generating an interruption response pulse signal 102 in a pulse position.
Patent JP-S59194470-A (JP)
Title: Gate-turn off thyristor of amplifying gate structure
Inventor: HAYASHI YASUHIDE
IPC: H01L29/744
Filed: 1983-04-18
Abstract: PURPOSE:To effectively perform a turn OFF operation by flowing the OFF gate current of a main GTO in the base directly under the emitter of an amplifying gate. CONSTITUTION:In an amplifying gate structure GTO thyristor, an N type emitter layer N3 is diffused in a P type base layer PB of a main GTO, the electrode G3 of the layer N3 and the electrode G4 of the layer PB of an amplifying gate AG are connected, and a gate P<+>B2 is formed as a strip layer in the layer PB opposed to the layer N3. Thus, the OFF gate current is flowed in a circuit of an emitter NE2  a gate G3 a gate G4  a buried gate P<+>B1  a gate G1 at the turn OFF time, and led from the gate G1 through the part directly under the N type emitter NE1 of the amplifying gate, thereby effectively turning OFF it.
Patent JP-H10261796-A (JP)
Title: Semiconductor device and its manufacture
Inventor: OGAWA SHUICHIRO
IPC: H01L29/792
Filed: 1997-03-21
Abstract: PROBLEM TO BE SOLVED: To enable a semiconductor device possessed of a micro channel to be manufactured through a simple method without using a vacuum process and improved in erase time by a method wherein a metal micro crystal which confines electrons in a potential well is formed directly on a part of a tunnel oxide film on a semiconductor substrate, and an insulating film is formed thereon. SOLUTION: A source electrode 1 and a drain electrode 2 are formed, then a tunnel thick oxide film 4 of SiO2 is formed and then subjected to a pre- treatment for electroless plating to form palladium catalyst nucleus. Polyimide precursor liquid which contains palladium salt is applied by spin coating, subjected to pre-baking, then patterned by irradiation with light rays, and thermally treated to turn into imide. By pre-baking, palladium micro crystals are formed on a boundary between the tunnel oxide film 4 and a polyimide precursor coating film and its vicinity. A gate electrode 3 is formed on a polyimide insulating film 6, and thus a MOSFET coupled-type memory is obtained. This semiconductor device is markedly improved in erase time.
Patent JP-S56168187-A (JP)
Title: Emergency mechanism of electronic wristwatch
Inventor: OONISHI WATARU
IPC: G04F5/06
Filed: 1980-05-22
Abstract: PURPOSE:To easily secure a high accuracy, by providing an emergency mechanism which is capable of controlling for a gain/losing with an external operation plus another emergency mechanism which is capable of controlling the same in a circuit block state or in a movement state and incapable of controlling with an external operation. CONSTITUTION:An electronic wristwatch is provided with not only a logical emergency mechanism A which emerges by an external operation but another emergency mechanism B which is incapable of operation from outside and has no change even with an exchange of battery. With said mechanism B, a nominal accuracy of about + or -15 seconds per month can be secured. In other words, the mechanism B is provided with a quartz oscillator 31 and a trimmer capacitor 32, and the oscillation frequency of the oscillator 31 is controlled by varying the capacity of the capacitor 32. Thus an emergency is given to the time rate. In such way, the mechanism B adapts such system in which the degree of emergency has no change although the primary power source is removed when exchanging the battery. Thus the nominal accuracy of the wristwatch is ensured by the mechanism B only to secure the nominal accuracy at all times.
Patent JP-S60212438-A (JP)
Title: Transporting belt material
Inventor: FUKAHORI YOSHIHIDE
IPC: C08L33/00
Filed: 1984-04-05
Abstract: PURPOSE:The titled material, obtained by incorporating an adhesion inhibitor with rubber or plastic in a specific proportion, and capable of preventing effectively the adhesion of adhesive material, e.g. oil sand. CONSTITUTION:A transporting belt material obtained by incorporating 100pts.wt. rubber or plastic with 10-250pts.wt. adhesion inhibitor. An adhesion inhibitor capable of constantly bleeding on the surface of a belt after molding to cover always the surface, compatibilizing well with bitumen, reducing the cohesive force of the bitumen itself remarkably from that of the mixed phase and easily peeling the once adhered oil sand is used as the adhesion inhibitor, and the adhesion inhibitor, having 6.5-10.5 solubility parameter (SP) value, tackiness of a mixture at 1:1 weight ratio between adhesion inhibitor and the bitumen <=0.35 that of the bitumen alone, capable of bleeding 0.03-15mg/cm<2> adhesion inhibitor from the sheet surface obtained by incorporating a basic formulation of 100pts. wt. NBR with 60pts.wt. carbon with 30pts.wt. above-mentioned adhesion inhibitor at 20 deg.C for 24hr, and having >=200 deg.C boiling point under ordinary pressure is particularly preferred for the adhesion inhibitor.
Patent JP-S58186378-A (JP)
Title: Power converter
Inventor: OGAWA KIYOSHI
IPC: H02M7/48
Filed: 1982-04-26
Abstract: PURPOSE:To suppress the variation in the voltage in an interlock system with other power source by synthesizing a deviation signal between the output voltage of an inverter and the set value and the detected signal of reactive power, thereby controlling the output voltage of the inverter. CONSTITUTION:The output of a power converter 2 is interlocked through a transformer 3 and a switch 4 to an AC power source 5, an error signal between the voltage reference 21 and the output voltage 12 is inputted to a voltage controller 23, an error signal between the effective power reference 31 and an effective power detector 32 is applied through a PLL circuit 34 to the control circuit 23, thereby controlling the converter 2. The reactive power is detected by a detector 41, synthesized by the error signal between the reference 21 and the output voltage 12, and inputted to the controller 32. Accordingly, when the set of the power reference 31 is varied, the input of the controller 23 is immediately varied by the signal of the detector 41, thereby maintaining the interlocking voltage of the power source 5 to the prescribed value.
Patent JP-S55161628-A (JP)
Title: Injection molding method
Inventor: TAKAGI MASAO
IPC: B29C45/76
Filed: 1979-06-04
Abstract: PURPOSE:To eliminate a defective molding and improve an efficiency of molding in a die having a plurality of cavities therein by a method wherein a molding condition in each of the cavities is meausred and a temperature in the die is controlled based on said measured information. CONSTITUTION:Both an upper and lower limits of the most suitable resin charging pressure for each of the cavities 3a, 3b and 3c are predetermined in advance, and a charging step is transferred to a pressure keeping step when the resin pressure in said cavity satisfies said pressure range, the resin pressure in each of the cavities during the change-over of the charging step to the pressure keeping step is continuously stored for each of the forming cycles, and then the temperature in te respective cavity is independently controlled in response to the stored information of said resin pressure. The cavity pressure is measured by the pressure sensor 13, the pressure is changed to another value by means 14, while the changed value is compared with a standard pressure range setting value, and the value is applied from the controller 16 via power amplifier 17 to operate both the die temperature control valve 10 and the electro-hydraulic control valve 18.
Patent JP-H10245950-A (JP)
Title: Tile roofing board for roof
Inventor: SHIMOYAMA SHINICHI
IPC: C23F13/00
Filed: 1997-03-06
Abstract: PROBLEM TO BE SOLVED: To prevent corrosion of a copper sheet roof caused by acid rain by providing a metallic roof tile sheet having the ionization tendency equivalent or superior to that of a copper sheet on a boundary part between an eaves side copper sheet roof and a ridge side roof tile in a side-protected roof. SOLUTION: A roof tile sheet E is loaded on the upstream side of a dutch-lap roof B with copper sheets, and a downstream side end part of a roof tile A is loaded on a flat part of the tile roofing board E. The roof tile sheet E is formed by bending copper sheet, zinc sheet, aluminum sheet or alloy sheet thereof, an engagement piece 11 is erected upstream for flashing, and the downstream is returned upwardly to stay rain flowing down from the roof tile A so as to promote the neutralization of acid rain, and the water overflows from an upper part and is discharged onto the dutch-lap roof B. Corrosion of the dutch-lap roof B caused by acid rain is prevented by the sacrificial corrosion of the roof tile sheet E, and no sense of incompatibility of the appearance is given. The service life of the tile roofing board E is about 10 years, but the roof tile sheet can be easily renewed.
Patent JP-S55159652-A (JP)
Title: Data transmission system
Inventor: MATSUMOTO MASAHIRO
IPC: G06F13/00
Filed: 1979-05-30
Abstract: PURPOSE:To increase the transmission efficiency, by providing the synchronizing station generating the frame consisting of address slot and data slot, in performing data transmission via a loop transmission line. CONSTITUTION:The synchronizing station 14 generating the frame consisting of data slots PC1...PCn transmitting the block information, data slots IO1...IOa serially transmitting each information of a plurality of data units, and address slot ADR designating the unit to receive the information is provided. This information 14 is inserted with the same address as the frame to the address slot of the next frame and transmitted. Further, without the transmission of the information of sensor base by using the same transmission line of information of the process line control unit, the transmission efficiency can be increased.
Patent JP-S55161350-A (JP)
Title: Fluorescent lamp and manufacture thereof
Inventor: SUGIYAMA HIROSHI
IPC: H01J17/24
Filed: 1979-05-31
Abstract: PURPOSE:To sufficiently prevent darkening by covering the getter material in a lamp by a film which is acidproof and can be dispersed through discharge. CONSTITUTION:A getter material 2 is formed, covering the surface of an electrode 1 through sputtering method, and then, on siad getter material, thin film oxidation preventing layer 3 is formed in lamination by the same sputtering method. The process for manufacturing lamp is carried out by the normal procedures. As the getter material 2 is covered and protected by the oxidation preventing layer 3 in the lamp manufacturing process, the getter material 2 does not absorb impure materials. After lamp completion, if lamp discharge is performed, the darkening preventing layer 3 is sputter-etched, and the getter material 2 appears, and absorbs umpure materials.
Patent JP-H06253848-A (JP)
Title: New dna, polypeptide and recombinant dna
Inventor: ISHIDA MARIO
IPC: C12P21/02
Filed: 1993-03-03
Abstract: PURPOSE:To obtain a new DNA capable of suppressing the tumorigenic ability. CONSTITUTION:This new DNA comprises substantially bases at the 10- to the 408-positions of a DNA sequence expressed by the formula and-the one or plural bases in the DNA sequence from the 10- to the 408-positions are substituted and/or deficient and/or one or plural bases may be added into the sequence. The objective clone sp41 having a per repeat in an open reading frame (ORF) is obtained by screening a cDNA of a cell in a murine spleen using the sequence of cp2.2 of a gene homologous with a period gene in a murine genome, selecting a clone capable of hybridizing under moderately stringent conditions and determining the DNA sequence. The base sequence of the cDNA in the sp41 is expressed by the formula.
Patent JP-H10265859-A (JP)
Title: Method for charging raw material in sintering machine and device therefor
Inventor: WADA TAKASHI
IPC: F27B21/10
Filed: 1997-03-24
Abstract: PROBLEM TO BE SOLVED: To provide a charging method of raw material into a sintering machine which can keep a dropping position of the raw material to the fixed position even if the supplying quantity of the raw material changes, and a charging device thereof. SOLUTION: In the charging method of the raw material into the sintering machine, the raw material 7 in a raw material supplying device 1 is supplied into a screen type chute 2 constituted by arranging linear members 3 with intervals in the vertical direction to segregate the grain size distribution in the raw material layer 8. In such a case, an auxiliary roll feeder 10 is arranged between the raw material supplying device and the screen type chute and the number of revolutions of the auxiliary roll feeder is adjusted based on the dropping position of the raw material onto the screen type chute to control the dropping position to a prescribed position.
Patent JP-H05230118-A (JP)
Title: Photo-polymerization initiator composition
Inventor: YAMAGUCHI TAKEO
IPC: G03F7/028
Filed: 1992-02-19
Abstract: PURPOSE:To provide a photo-polymerization initiator composition having high sensitivity, composed of a 3-ketocoumarin compound and a specific synthetic product and sensitive to visible light at a low luminous energy to cause the polymerization of a polymerizable unsaturated compound or cyclic compound. CONSTITUTION:The objective photo-polymerization initiator composition is composed of (A) 100 pts.wt. of a 3-ketocoumarin compound [e.g. 3,3'-carbonylbis(7-diethylaminocoumarin)] and (B) 1-10,000 pts.wt. (preferably 25-400 pts.wt.) of a compound of formula [R<1> to R<3> are (substituted) alkyl, alkenyl, aryl or benzoyl provided that at least one (preferably both) of R<1> and R<2> is aryl; R<1> and R<2> may together form a ring structure; Q is S or SO; X is halogen, BF4, etc.) (e.g. diphenylphenacylsulfonium tetrafluoroborate). A photo-sensitive composition is produced by adding 0.1-30 pts.wt. of the initiator composition to 100 pts.wt. of a polymerizable unsaturated compound and/or cyclic compound.
Patent JP-H06284113-A (JP)
Title: Pn pattern detection circuit and bit error detection circuit
Inventor: MASANO MASAMI
IPC: H04B17/309
Filed: 1993-03-29
Abstract: PURPOSE:To provide a bit pattern detection circuit in which initial synchronization is established quickly and-locking is executed even when synchronization is stepped-out and to provide a PN pattern detection circuit capable of detecting the input of a PN pattern continuously. CONSTITUTION:A PN pattern detection circuit 12 provides the output of received PN pattern data as they are to suppress an error bit output from a data comparator circuit 14 and allows a synchronization discrimination circuit 16 to decide establishment of synchronization and the circuit 16 brings the PN pattern generating circuit 12 to the internal generating state. When lots of error bits are generated by the detection of the data at a PN pattern detection circuit 15, re-locking is executed as out of synchronism. The PN pattern detection circuit 15 processes the inputted bit pattern. The PN pattern is not detected only when lots of unmatching cases take place within a predetermined period based on the output of a built-in decoder having the similar internal configuration to that of the PN pattern detection circuit 12.
Patent JP-S52153942-A (JP)
Title: Preparation of kanamicin c deoxy derivatives and kanamicine c or its deoxy derivatives
Inventor: UMEZAWA KENJI
IPC: A61P31/04
Filed: 1976-06-16
Abstract: PURPOSE: Kanamycin C deoxy derivatives I (R is OH or H), e.g. 3'-deoxykanamycin C. 
     COPYRIGHT: (C)1977,JPO&Japio
Patent JP-S60229516-A (JP)
Title: Resonator
Inventor: BUARUTAA TSUINKU
IPC: G04F5/06
Filed: 1985-04-04
Abstract: A resonator (1) is described for vibrating in a thickness-shear mode and has auxiliary electrodes (7f, 8d) between the zone of its main excitation electrodes (3, 4) and the zone of its connection terminals (5, 6) to generate an auxiliary vibration in opposition of phase with respect to the main vibration. The presence of the auxiliary electrodes (7f, 8d) improves notably the quality factor of the resonator.
Patent JP-S52153322-A (JP)
Title: Memory
Inventor: KUKI TAKAHIKO
IPC: G11C27/04
Filed: 1976-06-14
Abstract: PURPOSE: To realize a high-performance and large-capcity memory with no information distortion caused by transfer loss by having reinput to the electric charge transfer element input while reproducing the plural level value of the electric charge transfer element of CCD, etc. 
     COPYRIGHT: (C)1977,JPO&Japio
Patent JP-S61229999-A (JP)
Title: Blower
Inventor: SAKURAI SEIICHI
IPC: F04D29/44
Filed: 1985-04-03
Abstract: PURPOSE:To make a blower compact, by making the increase in the radius of vortical curvature of a casing small or zero outwards from an optional point between the inner and outer ends of a vortical plate, and by gradually augmenting the width of the casing. CONSTITUTION:In a centrifugal blower, the increase in the radius of vortical curvature of the vortical plate 5a of a casing 5 is made constant to a point K' but made zero from the point K' to another point J. The width of the casing 5 is gradually augmented from M to N to provide the same cross-sectional area of a passage as the vortical space of a conventional casing. The casing 5 is thus provided with the same capacity as the conventional casing but with a smaller height than it so as to reduce the height of the body of an air conditioner or the like employing the blower.
Patent JP-S60214165-A (JP)
Title: Cathode-ray tube display
Inventor: MAEJIMA MICHIO
IPC: H04N3/20
Filed: 1984-04-09
Abstract: PURPOSE:To prevent the brightness from being increased by bringing the switch into the closed state when no synchronizing signal is inputted so as to avoid a DC level of a video signal inputted to a CRT from being decreased. CONSTITUTION:The horizontal synchronizing signal applied to an input terminal 8 is applied to a set position of a flip-flop 9. Further, a reset signal generated at application of power and inputted to a reset signal input terminal 11 is fed to the reset position of the flip-flop 9. Since the waveform at an output terminal 12 of the flip-flop 9 is reset at application of power and set at each horizontal synchronizing signal, the DC level of the video signal inputted to a CRT is prevented from being decreased.
Patent JP-H0722544-A (JP)
Title: Resin sealed type semiconductor device
Inventor: URAGAMI AKIRA
IPC: H01L23/29
Filed: 1991-03-12
Abstract: PURPOSE:To adequately prevent resin crack of a small and thinner of resin sealing layer by loading a semiconductor element on a chip loading area and molding the surrounding of the chap loading area having loaded a semiconductor element with a resin sealing material including fine pieces of fluorine resin porous material. CONSTITUTION:A semiconductor element 10 is loaded on a chip loading material 11 and an electrode of the semiconductor element 10 and a lead 12 are connected with a gold fine wire 14 having excellent electrical characteristic. The chip loading material 11 is surrounded and sealed by a molding resin 13 including fine pieces 15 of fluorine resin porous material. Thereby, generation of crack in the mold resin 13 due to alleviation and absorption of internal stress can be adequately prevented even when temperature changes suddenly during the soldering process and thermal stress is applied after humidity is absorbed.