baber/WOPTO huggingface dataset:
Patent JP-S60149147-A (JP)
Title: Semiconductor ic device
Inventor: TSUCHIYA CHIKARA
IPC: H01L29/732
Filed: 1984-01-17
Abstract: PURPOSE:To prevent the malfunction of an analog IC from a large load of inductance by a method wherein, using a substrate of the same conductivity type as that of a collector layer, a reverse conductivity type layer and the substrate are connected to a reference potential by interposing the reverse conductivity layer between the substrate and the collector layer. CONSTITUTION:N<+> layers 13 are buried in a P-epitaxial layer 12 on the N type Si substrate 11, and N-collector layers 14a and 14b are produced by isolating an N-epitaxial layer 14 with a P<+> layer 15. An N-substrate connection layer 16, N<+> collector connection layers 17, P-base layers 18, N<+> emitter layers 19, an N<++> collector lead-out layer 20 are provided, and an electrode is attached to each. When the collector layer 14a of an L-load driving element T1 is biased negatively to the grounded substrate 11 and P-layer 12 by application of a negative high-voltage generating by load-off on the layer 14a, a parasitic bi-polar transistor T3 whose emitter is the layer 14a generates under the element T1, and the transistor T1 becomes saturated by supply of current from the substrate 11. Thereby, a parasitic transistor is not formed between the adjacent element T2, and the collector potential of the element T2 does not decrease, resulting in normal actions of the element T2.
Patent JP-S61164880-A (JP)
Title: Simple printing method
Inventor: SATO MASAMICHI
IPC: B41M1/42
Filed: 1985-01-18
Abstract: PURPOSE:To enable an inexpensive and simple printing without using printing inks, by a method wherein a mirror image of image information copied on a tracing paper by a copying machine is copied on a conductive sheet by using an insulating toner, the toner image is electrostatically charged, and the toner image thus charged is transferred onto a transfer paper, and is fixed. CONSTITUTION:Image information of an original is copied on the tracing paper 1 by the copying machine to form a non-reversed pattern 2. The mirror image pattern 2' is copied on the conductive sheet 3 from the back side of the paper 1 by an electrostatic copying machine using an insulating toner to form a mirror image pattern 4. The conductive sheet 3 as an original plate 5 is wound tightly around a drum 7 driven to rotate at a circumferential velocity corresponding to the feeding velocity of the transfer paper 6, and a charger 8, a developing unit 9 and a transferring unit 10 are disposed in this order in the vicinity of the drum 7. The toner image in the mirror image pattern 4 is transferred onto the transfer paper 6 as a non-reversed image by the transferring unit 10, and thermal fixing or pressure fixing is conducted by a fixing unit 12.
Patent JP-H01185135-A (JP)
Title: Control circuit for charger
Inventor: INAKAGATA SATORU
IPC: H02J7/10
Filed: 1988-01-14
Abstract: PURPOSE:To enable automatic switching between super quick charge, quick charge and normal charge, by detecting the temperature of a secondary cell to be charged and switching the charging current for the secondary cell. CONSTITUTION:A temperature sensor Ds in a temperature detecting circuit 9 detects the temperature of a secondary cell to be charged and provides an output through a sample and hold circuit 10, an operational amplifier 11 and a comparison circuit 12 to a latch circuit 15 thus controlling charge current for the secondary cell. Furthermore, a cell type judging circuit 17 and a cell voltage control circuit 18 are provided in order to detect the difference of cell type based on an output from the temperature detecting circuit 9, thus switching the charge current between super quick charge, quick charge, normal charge and the like.
Patent JP-H11201782-A (JP)
Title: Illumination structure of instrument
Inventor: HAYAKAWA KIYOSHI
IPC: G01D11/28
Filed: 1998-01-14
Abstract: PROBLEM TO BE SOLVED: To provide an illumination structure of an instrument preventing a light leak from a reflecting face and having improved luminance of a pointer by providing a reflecting wall covering the reflecting face of the pointer shaft insertion hole of a light guide plate on a light guide plate case. SOLUTION: A light guide plate 1 is stored in a light guide plate case 2, a pointer shaft insertion hole 9 having a reflecting face 8 is formed on the light guide plate 1, and the light from a light source 3 arranged at the edge of the light guide plate 1 is reflected on the reflecting face 8 to illuminate a pointer 10 on the light guide plate 1 in this illumination structure of an instrument. The light guide plate case 2 is extended at the portion of the reflecting face 8 to form a reflecting wall 2a covering the reflecting face 8, and the light tending to leak from the reflecting face 8 is stopped by the reflecting wall 2a.
Patent JP-S5391533-A (JP)
Title: Time-division control system of refresh memory
Inventor: HAMADA NAKAHARU
IPC: G09G5/22
Filed: 1977-01-22
Abstract: PURPOSE:To shorten a memory access time by causing access to that memory three times within a two-character display time.
Patent JP-S63175836-A (JP)
Title: Organic nonlinear optical material
Inventor: KURIHARA TAKASHI
IPC: C08G69/26
Filed: 1987-01-16
Abstract: PURPOSE:To improve the formability and mechanical strength by using a high molecular material contg. specified repeating units. CONSTITUTION:A high molecular material contg. repeating units represented by formula I or II is used as an org. nonlinear optical material. In the formulae I, II, R is -(CH2)n- [(n) is an integer of >=2], a group having arylene group in the methylene chain or arylene group, L is a dye producing a nonlinear optical effect, Am is -NHCO- or -CONH- and each of (m) and (k) is an integer of 1-12. The org. nonlinear optical material has a significant third-order nonlinear optical effect, can be simply formed by coating or other method and may attain a response speed of picosecond or below, so the material can be utilized as the principal material of an optical device utilizing a third-order nonlinear optical effect, e.g., an optical integrated device for future optical communication such as an optical bistability device, an optical switch or an optical memory.
Patent JP-2000209064-A (JP)
Title: Piezoelectric vibrator and potential sensor
Inventor: KUMADA AKIRA
IPC: G01R29/12
Filed: 1999-01-13
Abstract: PROBLEM TO BE SOLVED: To provide a piezoelectric vibrator which limits a solder forming area to secure high stability and has its reduced characteristic variance and also to provide a potential sensor which uses the piezoelectric vibrator. SOLUTION: A piezoelectric vibrator 1 has vibration parts 2a and 2b, a support part 3 and a solder fixing part 4. A metallic thin film 5 which consists of a copper clad material and has the excellent solder wettability is bonded to the part 4. Then a potential sensor consists of the vibrator 1 which is soldered and fixed to a fixing pad 8 contained in a circuit board at the part 4.
Patent JP-H02186446-A (JP)
Title: Logical level detection circuit
Inventor: MINAGAWA TATSUYA
IPC: G06F11/25
Filed: 1989-01-12
Abstract: PURPOSE:To shorten a detecting time by connecting a first input edge to the other edge of a first resistor, connecting a second input edge to the node of a detection terminal and detecting a current to flow between the first and second input edges. CONSTITUTION:In the case of a voltage source V1=5V, voltage source V2=0V, resistor 21=10,000OMEGA and resistor 22=20,000OMEGA, when the logical level of a node 201 is high, namely, in the case of V3 5V, the current to be detected is 0mA. When the logical level of the node 201 is low, namely, in the case of V3 0V, the current to be detected is 0.5mA. When the node 201 is in a high impedance state, the condition of V1-V2/10,000+20,000 5-0/30,000 1.7mA is obtained. Thus, the logical level of an element 20 to be detected is decided from the value of a detecting signal 107.
Patent JP-H03211660-A (JP)
Title: Document preparing device
Inventor: HASHIMOTO SHINICHI
IPC: G06F17/24
Filed: 1990-01-17
Abstract: PURPOSE:To eliminate an area frame when the area frame beyond an object is the hindrance of editing and to attain document editing work with a visible screen by permitting a user to select the display/non-display of the area frame beyond the object of editing. CONSTITUTION:An editing area control table 202 controlling the positions, types and data of respective areas displayed in the screen, and a flag 209 identifying the state of the display/non-display of the area frame are provided. When the display of the area frame is instructed by a selection means, the flag is referred to. When the frame is not displayed, it is displayed. When the selection means selects the elimination of the area frame, the flag is referred to. When the frame is displayed, the frame is eliminated and the flag is reset. Thus, the user can select the display/elimination of the frame of the editing area and he can execute editing work without being interrupted by the frame.
Patent JP-S63174346-A (JP)
Title: Manufacture of lead frame
Inventor: TAJIMA TAKAHIRO
IPC: H01L23/50
Filed: 1987-01-14
Abstract: PURPOSE:To prevent a suspension lead for holding a die pad from springing back after it is folded, by providing notch grooves at folds of the lead such that the grooves extend along width of the lead. CONSTITUTION:A metal frame having die pads 1 and leads 4 is formed by punching a rectangular metal piece. A notch groove 11 is formed at a fold 2a of a suspension lead 2 such that the groove extends along the width of the lead 2. The suspension lead 2 is folded at the notch groove 11 so that the face 1a of the die pad 1 on which a chip is to be bonded is positioned at a lower level than the wire connecting face 4a. Thereby, the suspension lead can be prevented from springing back after it is folded. Accordingly, the chip bonding face of the die pad can be positioned reliably at a predetermined position.
Patent JP-H04248397-A (JP)
Title: Controlling method for inverter
Inventor: OKUDA YOSHIHISA
IPC: H02P3/18
Filed: 1991-01-24
Abstract: PURPOSE:To reduce a capacity of a damping resistor for regenerative power consumption, provided in a voltage type inverter for driving an induction motor at a variable speed and to shorten a predetermined decelerating time of the motor. CONSTITUTION:A ratio of an output voltage to an output frequency of an inverter is so controlled that a value at the time of controlling to decelerate a motor is larger than that at the time of controlling to accelerate it. The motor is overexcited in a suitably allowable range at the time of controlling to decelerate it, and the share of an exciting loss in the motor itself to the rotary energy of the motor during decelerating is increased thereby to accelerate the reduction in regenerative power via the inverter and absorption of the energy, thereby reducing a predetermined capacity of a damping resistor for thermally consuming the regenerative power and shortening a predetermined decelerating time.
Patent JP-S59134205-A (JP)
Inventor: SHIMIZU SOUICHIROU
IPC: E04B1/68
Filed: 1983-01-20
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H04239974-A (JP)
Title: Logic simulation system
Inventor: KURASHITA MASAHIRO
IPC: G06F17/50
Filed: 1991-01-24
Abstract: PURPOSE:To perform the simulation at high speed without considering the delay time even when the feedback exists in a simulation object circuit A. CONSTITUTION:A memory operation analysis part 2 analyzes the functions in a memory M detected from a simulation object circuit A by a memory extraction part 1, a memory function reduction part 3 reduces the writing function from the functions of the memory M. A memory addition part 4 addes other memory for writing function. A level allocation part 5 performs the level allocation for the memory of the reading function to the same level as the normal gate and the memory of the siting function to the same level as the flip flop, respectively. A simulation part 6 performs the simulation calculation.
Patent JP-S5598831-A (JP)
Title: Manufacture of semiconductor wafer
Inventor: MATSUMIYA RITSUO
IPC: H01L21/304
Filed: 1979-01-24
Abstract: PURPOSE: To improve the properties of a semiconductor device, by using equal polishing materials and polishing means to polish a wafer, which is cut out from an ingot and has a diameter of 4in. or more and a thickness of 400μ or less, to cancel the obverse and reverse mechanical strain by each other.  
     CONSTITUTION: An ingot having a large diameter of 4in. or more is made by a Czochralski method or the like. A wafer is cut out from the ingot by a diamond cutter or the like. The wafer is slightly prite-etched. At that time, the reverse side of the wafer is not pasted and not only the obverse side of the wafer but also its obverse side are polished by equal polishing materials and polishing means. Such wafers 8a, 8b are tightly fitted in perforated holes 7a, 7b provided in a conveyor  belt 6 made of synthetic resin or the like and are passed through a container 1  equipped with a polishing material such as alumina and a pair of rotary discs 2, 3  so that the oberse and reverse sides of each wafer are polished under the same  condition. This results in reducing the thickness of the wafers and simplifying the  polishing work. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-H01183205-A (JP)
Title: Voltage follower circuit
Inventor: NANBA KIYOSHI
IPC: H03F3/45
Filed: 1988-01-18
Abstract: PURPOSE:To reduce an offset voltage by connecting a fourth transistor with a third transistor in serial and connecting the base of the fourth transistor with the collector of a second transistor in a voltage follower circuit consisting of three transistors. CONSTITUTION:A transistor Q6 having the same polarity as a transistor Q5 is connected with the transistor Q5 in serial, and the base of the transistor Q6 is connected with the collector of a transistor Q1. Consequently, the same base currents are divided and supplied to the bases of the transistors Q5 and Q6 from the collectors of the differential transistors Q1 and Q2. Thus, the operation currents of two transistors Q1 and Q2 consisting a differential circuit become equal, and the offset voltage is reduced.
Patent JP-H03212558-A (JP)
Title: Forming method for group of floor joist and double floor
Inventor: YAMAMOTO KIYOSHI
IPC: E04F15/00
Filed: 1990-01-16
Abstract: PURPOSE:To improve safety and to facilitate work for wiring and piping under a floor by connecting plural floor joists through connecting members crossing them at about a right angle to form a group of the floor joists, and mutually connecting the floor joists through detachable auxiliary floor joists to compose a composite floor joist. CONSTITUTION:Plural floor joists which have a fixed length and are parallel to each other are mutually connected through connecting members 2 crossing them at about a right angle to form a group of the floor joists A, which are set at a fixed position on a floor slab at fixed spaces. The floor joists 1 are mutually connected through detachable auxiliary joists 14 to form plural parallel composite floor joists AA, and a floor plate is placed between two sets of the composite floor joists AA to form a double floor. The group of the floor joists A is therefore stabilized in the longitudinally and lateral directions, and direct access into an under-floor space can be made possible by removing the auxiliary floor joists 14.
Patent JP-H08192126-A (JP)
Title: Sheet cleaning apparatus
Inventor: YOSHIDA MASAHIRO
IPC: G03G21/00
Filed: 1995-01-20
Abstract: PURPOSE: To control the consumption of cleaning liquid by evaporation by immersing a sheet in a treatment tank in which the cleaning liquid is stored and then discharging the sheet from the cleaning liquid by switchback in a cleaning apparatus for removing a printing material from a sheet with an image printed. CONSTITUTION: Sheets S printed with a printing material such as toner are sent one by one from a paper supply tray 3 by rollers 4, 5, are introduced into cleaning liquid 8 with the end nipped by a squeezing roller 14, and are stored in a storage part 9. The toner on the surface of the sheet is swelled during immersion in liquid 8 for a specified time. Next, when an offset roller 10 is inverted, the swelled toner is peeled off from the surface of the sheet by the peeling action of the offset roller 10 while the sheet S being transferred in the reverse direction to an entrance route, and the residual toner is scraped off by a brush roller 11. The sheet, after being dried by a drying roller 19, is discharged into a paper discharge tray 21 through a paper discharge roller 20.
Patent JP-S61166733-A (JP)
Title: Front pto device for agricultural tractor
Inventor: KOBAYASHI FUMIHIRO
IPC: B60K25/06
Filed: 1985-01-17
Abstract: PURPOSE:To increase the strength of support and also to make assembly and disassembly of the device easy, by providing a laterally mounted bracket between left and right chassis frames, and by supporting a front PTO pulley in front of the bracket. CONSTITUTION:Engine power is conveyed from a front PTO pulley 17 to a counter pulley 18 through a V-belt 41, and rotates a front PTO shaft 6 on the device, and a laterally mounted bracket 10 is laterally and firmly fixed on the middle between left and right chassis frames 30L and 30R which exist extending to the longitudinal direction of a vehicle. A U-shaped PTO pulley bracket 17 is firmly fixed in front of the laterally mounted bracket 10, and the PTO pulley 17 is made support pivotally on he bracket 7. Also, the counter pulley 18 is made support pivotally on a reverse U-shaped center pin bracket 20 which is firmly fixed to the chassis frames 30L and 30R.
Patent JP-H11198848-A (JP)
Title: All-direction moving vehicle
Inventor: EGI MAMORU
IPC: B62D55/065
Filed: 1998-01-19
Abstract: PROBLEM TO BE SOLVED: To suppress the costs and miniaturize a device by driving a plurality of wheels or crawlers using one driving source and thereby decreasing the number of drive sources to be furnished on a vehicle. SOLUTION: An all direction moving vehicle 1 is constituted so that four crawlers 3a-3d are supported about the moving center of a base 2 in a plane of movement. The crawlers 3a and 3c are fed with a driving force from a motor 4a through a transmission mechanism 8a in the opposite direction about the moving center of the base 2 during a straight motion and during the rotational motion, are fed with a driving force in the same direction about the moving center of the base 2. The other crawlers 3b and 3d are fed with a driving force from a motor 4b through a transmission mechanism 8b in the opposite direction about the moving center of the base 2 during a linear motion, and during rotational, motion in the same direction about the moving center of the base 2.
Patent JP-S63176039-A (JP)
Title: Error alarm generating circuit
Inventor: KONO OSAMU
IPC: H04L1/00
Filed: 1987-01-16
Abstract: PURPOSE:To prevent the temporary reduction of line quality without requiring time for transmission line switching even when a signal with a high error rate is inputted by constituting the titled circuit by a switch section, two error counters and an OR circuit for processing two error counter outputs. CONSTITUTION:The error counter 2 counts an inputted error pulse 102 and when it is decided that the level exceeds the selected threshold level, error alarm 105 is generated. The error counter 3 counts the error pulse 102 while the count pulse 104 is inputted to decide whether or not the error rate exceeds 10<-3> and if the error rate exceeds 10<-3>, an error alarm 106 is generated. An OR circuit 4 outputs an OR signal for the error alarms 105, 106. When the signal having an error rate of 10<-3> or over is inputted while any of error threshold values 10<-3>-10<-8> is selected and set, since the error alarm takes place by the error counter 3, the detection time is decreased.
Patent JP-S54100337-A (JP)
Title: Preparation of m-(p-bromophenoxy)benzaldehyde
Inventor: OOSUMI TADASHI
IPC: C07C67/00
Filed: 1978-01-25
Abstract: PURPOSE: To obtain the title compound, an intermediate for pyrethriod insecticides of low toxicity to fishes, by brominating m-phenoxy benzaldehyde in the presence of a reactive aldehyde with a brominating agent, e.g. Br or BrCl, selectively.  
     CONSTITUTION: m-Phenoxybenzaldehyde, easily obtained from  m-cresol and chlorobenzene, is brominated with a brominating agent, e.g. Br 2  or BrCl, in a solvent which will not be halogenated, e.g. methylene chloride, without heating even in the absence of a catalyst selectively to give m-(p-bromophenoxy)benzaldehyde.  
     EFFECT: Easy operation, no side reaction, high yields, and low-priced product. 
     COPYRIGHT: (C)1979,JPO&Japio
Patent JP-H11203265-A (JP)
Title: Microcomputer
Inventor: MAEDA SHOHEI
IPC: H01L27/04
Filed: 1998-01-19
Abstract: PROBLEM TO BE SOLVED: To allow transfer of signals of different voltage levels between an internal circuit and a circuit constituting an input/output part by preparing a voltage conversion part which includes 1st and 2nd level shifters. SOLUTION: In an input/output PAD part (input/output interface) 5, an input protection circuit 51, an output buffer 52, a TTL input detection circuit 53 and a Schmitt type input detection circuit 54 operate on a 5 V power supply. A voltage conversion part 55 includes 5 V/3.3 V conversion circuits 511, 531 and 541 (2n level shifters) which convert 5 V signals, i.e., a CMOS input detection signal CM, a TTL input detection signal TL and a Schmitt type input detection signal ST into 3.3 V signals. Meanwhile, 3.3 V/5 V conversion circuits 421 and 522 (1st level shifters) convert the output enable signals HE and LE, i.e., the 3.3 V signals which are outputted from an input/output control circuit into the 5 V signals.
Patent JP-S59134940-A (JP)
Title: Information transmitting method between 1 by n terminal transmitters
Inventor: OONO YOUJI
IPC: G06F17/40
Filed: 1983-01-22
Abstract: PURPOSE:To transmit information between terminal devices every time upper stream display information is transmitted from the terminal device by transmitting polling and down stream information from a central device at a prescribed time interval. CONSTITUTION:When polling information P to terminal devices T1, T2, T3 control information C1 to the terminal device T1, polling down stream information PC1 comprising down stream terminal information Td1, information C2, C3 controlling the terminals T2, T3 and down stream information C2d, C3d are transmitted from the central transmitter T0 at a prescribed time interval, the device T1 receives the PC1 as shown in Fig. A, outputs externally the information Td1, inputs the upper and lower stream terminal information Tu0, Td2, outputs the information C1 and inputs display information I1. Then, the polling down stream display information PI1 is constituted by the information P, Td2 and information I1 and transmitted to a transmission line L2, and the upper stream display information I1u in constituted by the upper stream terminal information Tu0 and the information I1 and transmitted to the transmission line L1 at the same time.