Patent GB-1069390-A (GB)
Title: Control circuit for key punch or verifier
IPC: G06F3/08
Filed: 1964-10-16
Abstract: 1,069,390. Selective punching. SPERRY RAND CORPORATION. Oct. 16, 1964 [Oct. 28, 1963], No. 42404/64. Heading B4B. [Also in Division G4] In a control circuit for a key punch, having a memory for storing the data to be punched, a memory is also provided for storing the programme for operations such as skipping and duplicating, and a counter which is actuatable by the keyboard or the programme memory controls the data and programme memories. The programme is entered from a punched card, but the alternative use of a keyboard is mentioned. Entry of programme.-The programme card is read column by column by a reader 120, and with switch 181 closed, the programme is entered into programme memory 103 through gates 183 and core drivers 131. Column selection is performed by a selector switch 124 which is driven in synchronism with the card feed, first and second synchronizing pulses being applied in turn to clear the selected column and provide half write current respectively. Entry of duplicating data.-A duplicating card bearing information which is to be punched or which appears on all cards, is read column by column by reader 120, and with duplicating switch 180 closed, the appropriate gates 182 are enabled to enter the duplicating data into the data memory 102 through core drivers 130. Entry of data from keyboard.-With the counter preset to select group 1, column 1 of the memories 102, 103, actuation of a key produces an output from gate 154 to enable gates 160, and gates 164 are also enabled via gate 163. The combined currents on group line 106 and column line 104 resets all cores in column 1 of the memories, any programme instruction in memory 103 being temporarily stored in flip-flops 115-118 and subsequently written back into the memory. Gate 170 then enables gates 172 and half-write current is applied to column line 104 by driver 132, the appropriate cores in data memory 102 being set from the keyboard via gates 173. After this write operation and following release of the key, a counter is advanced to select column 2 of group 1 ready for the next keyboard entry. Skip operation.-Assuming column 2 of the programme memory 103 contains a skip instruction, flip-flops 115-116 are set when the second column of the memories is cleared. Unlike the programme instruction, any information in the data memory 102 is not written back from flip-flops 137 because gates 129 are only enabled during a card reading or punching operation. The counter is then advanced to column 3, and if a further skip instruction is present the process is repeated until a column is reached which has no programme instruction. It is possible to skip all 80 columns faster than the operator may operate the keyboard. Provision is also made for manual control of the skipping operation. Duplicating operation.-This is similar to the skip operation except that information in the data memory must not be erased in those columns which are to be duplicated. To prevent such erasing, a driver 136 provides an inhibit signal for all columns of the data memory 102 when a duplicate instruction is read from the programme memory 103 or a manual duplicate key is pressed. Manual stepping.-Keys are provided for back spacing the counter in the event of an incorrect keyboard entry being made and also for stepping of the counter forward without erasing the memory should the operator back space the counter too far. Punching.-When the counter is stepped to 81 after the entry for the 80th column has been made, a new card is fed to the viewing station and the previous card is advanced to the punching station. Selector 124 reads out the memories column by column to control punch magnets through flip-flops 137 and drivers 138. The information temporarily stored in flip-flops 137 is written back into memory 102 through gates 129. Interlock.-As soon as a column has been punched, the corresponding column of memory 102 is available for the entry of data for the next card. Normally, punching will take place faster than the operator can enter data from the keyboard, but if skipping of a large number of columns has been programmed the counter, which under these conditions is stepped considerably faster than the punching rate, might be advanced to a column which has not yet been punched on the preceding card, and entry of data for this column of the new card would erase that for the card being punched. To prevent this, an interlock circuit is provided to warn the operator and to halt advancement of the counter.