Patent GB-1144879-A (GB)
Title: A system particularly for use in translating signals of analogue form
Inventor: BIRI JANOS
IPC: H03K17/60
Filed: 1966-03-23
Abstract: 1,144,879. Selective switching. KOZPONTI FIZIKAI KUTATO INTEZET. 23 March, 1966, No. 12923/66. Heading H3T. In a system for selectively connecting one of a plurality of analogue signal inputs to a common output, the inputs are applied to the bases of separate transistors which can be connected through the emitter-collector path of a further transistor to the input of an amplifier which feeds the output terminal, negative feedback being provided from the output to the base of the further transistor to establish a predetermined voltage gain between input and output. In Fig. 1 the various analogue inputs are applied to transistors 1, 3 ... 5 which are normally turned off by the reversely-connected diodes 2, 4 ... 6, but which can be gated on by supplying current from a constant-current source 10 through gating transistors 7, 8 ... 9, controlled by signals V1, V2 ... Vk. In the simplest arrangement point d is connected to the supply voltage and c forms the input terminal of an amplifier 12 to which the selected analogue signal is applied. Feedback is applied through circuit 13 to the base of a transistor 11 which is effectively in series with the selected input transistor since the corresponding diode (e.g. 2) is now forward biased by the supply UT through the gated-on transistor (e.g. 7). Drift is compensated by connecting an additional diode (not shown) to the emitter of each transistor 1, 3, 5, in series opposition to diode 2, 4, 6. The feedback circuit 13 may comprise a direct linkage, the output being taken from terminal t through a series RC circuit (Fig. 2, not shown) to minimize the effect of load capacitance. Alternatively (Fig. 3) the output may be stored in a capacitor 14 in the feedback loop, the terminal d now forming the input of the amplifier and c being connected to the supply voltage. Assuming that the input signals are always positive, and that the amplifier introduces no phase reversal, the output at e will forward bias diode 16 to charge capacitor 14 accordingly and an output signal will be available at f, through an emitter-follower 18 if desired. This signal can be terminated by switching on a constantcurrent generator 17 by signals at s to discharge the capacitor. In another mode of operation input a2 (Fig. 1) is used as a reference level and capacitor 14 discharges through resistor 15 to provide an output pulse whose duration represents the difference between the amplitudes of the signals at a1 and a2, since the gating-on of the latter signal opens diode 16 again and establishes the level to which the capacitor can discharge. The cessation of signal a1 or a2 cuts off diode 16 and opens the feedback loop. The amplifier 12 may comprise an emitter-follower (Fig. 5, not shown) preceded by a diode clamping circuit to establish a datum level which is then shifted to a new level by a Zener diode. Alternatively, when terminal c is to be used as the amplifier input, a common-emitter transistor can be used (Fig. 6, not shown) with appropriate modification of the feedback loop to bring the gain down. In another version (Fig. 7, not shown) terminals c and d form the two inputs to a differential amplifier. The circuit of the invention can be used in a measuring system for converting analogue signals into pulseamplitude or pulse-duration signals.