baber/WOPTO huggingface dataset:
Patent TW-200718742-A (TW)
Title: Surface-modified metal oxides, production processes and use thereof in cosmetic preparations
Inventor: RIEGER JENS
IPC: A61K8/19
Filed: 2006-06-02
Abstract: The present invention relates to surface-modified nanoparticulate metal oxides where the metal is chosen from the group consisting of aluminum, cerium, iron, titanium, zinc and zirconium, wherein the surface modification comprises a coating with a copolymer P comprising, as monomers, (A) 1 to 99 mol% of a N-vinylamide N-vinylpyrrolidone and (B) 99 to 1 mol% of a monomer comprising, per molecule, a free-radically polymerizable α,β-ethylenically unsaturated double bond and an anionogenic and/or anionic group, with the proviso that the copolymer P must comprise no further monomers chosen from the group consisting of C8-C30-alkyl esters of monoethylenically unsaturated C3-C8-carboxylic acids, N-alkyl- or N,N-dialkyl-substituted amides of acrylic acid or of methacrylic acid with C8-C18-alkyl radicals, or vinyl esters of aliphatic C8-C30-carboxylic acids.
Patent TW-200732386-A (TW)
Title: Functional master batch and method for making the same
Inventor: HWANG JI-CHAN
IPC: C08K3/10
Filed: 2006-06-12
Abstract: The present invention relates to a function master batch and a method for manufacturing the same, and particularly to a functional master batch having an remarkably antimicrobial activity and a deodorant activity, and a method for manufacturing the same. The functional master batch in accordance with the present invention comprises polymer resin and antimicrobial agent, wherein the antimicrobial agent comprises support and silver(Ag) and magnesium oxide(MgO) supported by the support which comprises titanium oxide(TiO2) and zinc oxide(ZnO). The functional master batch in accordance with the present invention has an remarkably antimicrobial activity and a deodorant activity and can be manufactured at low cost.
Patent TW-200801763-A (TW)
Title: Fabrication method of periodic domain inversion structure
Inventor: CHEN JYH-CHEN
IPC: H01L21/027
Filed: 2006-06-21
Abstract: A fabrication method of a periodic domain inversion structure is provided . A nonlinear optical ferroelectric crystal substrate is provided. A photoresist layer is formed on the upper and the lower surface of the substrate and periodic gratings formed by interference of two laser beams are employed to expose the photoresist layer on the upper surface of the substrate. Meanwhile, the two laser beams would pass through the substrate so the periodic gratings are used to expose the photoresist layer on the lower surface. A development process is performed and a periodic photoresist pattern is formed on the two surface of the substrate. A conductive layer is formed above the substrate covering the photoresist pattern and surface of the substrate exposed. The photoresist layer and a portion of the conductive layer thereon are removed by lift-off. A voltage is applied to the substrate via the remaining conductive layer to polarize parts of the substrate.
Patent TW-200720342-A (TW)
Title: Additive for epoxy resin and epoxy resin composition
Inventor: YAMAMOTO AKIRA
IPC: C08K5/5419
Filed: 2006-07-11
Abstract: To provide an additive for epoxy resins capable of lowering surface tension of the epoxy resins and increasing fluidity of the resin by adding it to the epoxy resin, effectively used as a leveling agent and a fluidizing agent for epoxy resins and to provide an epoxy resin composition by adding the additive to the epoxy resin. The additive for epoxy resins is composed of an epoxy-modified low-molecular weight silicone represented by general formula (I) [wherein A is each independently a group selected from an epoxy group-containing group, an alicyclic epoxy group-containing group and Me (methyl group); n is an integer of 0-2]. The epoxy resin composition is obtained by formulating 0.1-10 pts.mass additive for epoxy resins with 100 pts.mass epoxy resin.
Patent TW-200706615-A (TW)
Title: Powder coating materials
Inventor: RING JOHN
IPC: C09D5/03
Filed: 2006-07-11
Abstract: The present invention pertains to a powder coating material comprising particles having a particle size distribution which satisfies the following equation: [d(s, 90)/d(s, 10)]2 ÷ [d(s,90)-7] ≤ 3.5 and in which d(s, 90) is greater than 7 μm, d(s, 90) and d(s,10) being measured in microns. The powder coatings can be obtained via a grinding-classification process or an agglomeration process. In a preferred embodiment the particles are prepared by a process which comprises mechanical fusion of a powder coating material, wherein the powder is brought to a maximum temperature in the range of from the Tg of the powder to 15 DEG C above the Tg, at a heating rate for at least the last 3 DEG C, preferably at least the last 4 DEG C, up to the maximum temperature of no more than 4DEG C per minute, and after a period in the range of from 0 to 40 minutes at the maximum temperature the powder is cooled.
Patent TW-200804158-A (TW)
Title: Machine for assembling lens
Inventor: LEE HAN-LUNG
IPC: B65G31/04
Filed: 2006-07-14
Abstract: The present invention discloses a machine for assembling lens. The machine includes an operating platform, a transport workstation, an element workstation, a number of locating assemblies, a dispensing workstation and a solidifying workstation. The transport workstation is mounted on the operation platform and can revolve alone an axis of the operation platform. The element workstation is used to assemble element. The locating assemblies are mounted on the operating platform and are used to hold a workpiece. The dispensing workstation is used to dispense an adhesive to the workpiece. The solidifying workstation is used to achieve solidifying. The machine can improve the acceptable ratio of the lens in course of transport or exchange.
Patent TW-200705820-A (TW)
Title: Phase locked loop having cycle slip detector capable of compensating for errors caused by cycle slips
Inventor: WANG PING-YING
IPC: H03L7/085
Filed: 2006-07-18
Abstract: A phase locked loop capable of compensating for errors caused by cycle slips. The phase locked loop includes a phase detection unit for generating a phase error signal; a loop filter for filtering the phase error signal and generating a first control signal; a cycle slip detector for detecting whether a cycle slip has occurred according to the phase error signal and generating a slip indication signal; a toggling unit for toggling the selection between a first value and a second value as a compensation signal according to the slip indication signal; an accumulator for accumulating the compensation signal and generating a second control signal; an adder for adding the first control signal and the second control signal and generating a third control signal; and a controllable oscillator foi generating the output clock.
Patent TW-200806469-A (TW)
Title: Polyimide composite flexible board and its preparation
Inventor: HWANG KUEN-YUAN
IPC: C08G73/10
Filed: 2006-07-26
Abstract: The present invention relates to a polyimide composite flexible board and a process for preparing the same, the process comprises sequentially applying polyamic acids each having a glass transition temperature of from 280 to 300 DEG C, from 300 to 350 DEG C, and from 190 to 280 DEG C on a copper foil, then subjecting the polyamic acids to imidization into polyimide by heating, and then pressing the polyimide-containing copper foil with a copper foil to produce a two-copper side printed circuit flexible board. According to the present invention, it can obtain a polyimide composite flexible board having excellent mechanical property, high heat resistance, and excellent dimension stability without using adhering agent.
Patent TW-200808623-A (TW)
Title: Airtight body capable of receiving packages of various sizes
Inventor: LIAO CHIAN-HUA
IPC: B65D81/03
Filed: 2006-08-02
Abstract: This invention relates to an airtight body capable of receiving packages of various sizes, comprising an air column plate having main body, the two sides of the main body being connected with a first buffer wall and a second buffer wall respectively. The first buffer wall is provided thereon a plurality of first nodes, to enable the first buffer wall to bend along different first nodes to have different height. The second buffer wall is provided thereon a plurality of second nodes, to enable the second buffer wall to bend along different second nodes to have different height. Further, the arrangement manner of the first nodes on the first buffer wall and the arrangement manner of the second nodes on the second buffer wall are asymmetric, making the first buffer wall and the second buffer wall have different height after being bent. Therefore, by selecting the first nodes for the first buffer wall to be bent and the second nodes for the second buffer wall to be bent, packages of various sizes can be received between the main body, the first buffer wall and the second buffer wall.
Patent TW-200721139-A (TW)
Title: Method and apparatus for recording and reproducing signal on and from optical information recording medium
Inventor: TOKIWA KAZUNORI
IPC: G11B7/125
Filed: 2006-09-20
Abstract: Test signals are recorded on a prescribed area in an optical disc. The prescribed area is scanned by a laser beam while the power of the laser beam is changed among different DC erasing values. The different DC erasing values are assigned to the recorded test signals, respectively. The recorded test signals are reproduced from the prescribed area to obtain reproduced signals. Parameter values of the respective reproduced signals are detected. The detected parameter values correspond to the different DC erasing values, respectively. Among the detected parameter values, a detected parameter value is decided which matches a target. One corresponding to the decided parameter value is selected from the different DC erasing values. A prescribed coefficient and the selected DC erasing value are multiplied to calculate an optimum level of an erasing power of the laser beam.
Patent TW-200728293-A (TW)
Title: Phenyl-[1,2,4]-oxadiazol-5-one derivatives with phenyl group, processes for their preparation and their use as pharmaceuticals
Inventor: KEIL STEFANIE
IPC: A61K31/4245
Filed: 2006-09-27
Abstract: The invention relates to phenyl-[1,2,4]-oxadiazol-5-one derivatives with phenyl group in all its stereoisomeric forms and mixtures in any ratio, and its physiologically acceptable salts and tautomeric forms showing PPARdelta agonist activity. What is described are compounds of the formula I, wherein the radicals are as defined, and their physiologically acceptable salts and processes for their preparations. The compounds are suitable for the treatment and/or prevention of disorders of fatty acid metabolism and glucose utilization disorders as well as of disorders in which insulin resistance is involved and demyelinating and other neurodegenerative disorders of the central and peripheral nervous system.
Patent TW-200811019-A (TW)
Title: Automated guided transport carriage
Inventor: HASHIMOTO TOSHIHIRO
IPC: B65G49/00
Filed: 2006-10-19
Abstract: The invention provides an automated guided vehicle capable of stably mounting, supporting and conveying a cassette even when the cassette is large and heavy, without enlarging the vehicle width of the automated guided vehicle and increasing the rigidity of a cassette frame more than necessary. In the automated guided vehicle, swing bases 1, 1 arranged at front and rear ends of a lower part of an automated guided vehicle main body 2 and enabling self-traveling are swingably mounted, respectively, and cassette placing tables 5 are arranged on pedestals 4, 4 disposed in an upper part of the automated guided vehicle main body 2 to mount and support the cassette K. The mounting positions of the cassette K of the cassette placing tables 5, 50 are set to be positions capable of supporting front and rear end parts of a bottom part of the cassette K and a central part in the middle of the front and rear end parts.
Patent TW-200716989-A (TW)
Title: Testing apparatus, fixture board and pin electronics card
Inventor: WATANABE DAISUKE
IPC: G01R31/28
Filed: 2006-10-26
Abstract: A testing apparatus for testing a DUT (device under test) with a pre-emphasis circuit is provided, wherein the pre-emphasis circuit enhaces the predetermined component of an output signal for being outputted. The testing apparatus includes a filter and a testing part. The filter eliminates the enhanced component of the output signal outputted by the DUT, wherein the enhanced component is formed by the pre-emphasis circuit. The testing part measures signals outputted by the filter, and judges whether the DUT is good or not according to the results of measurement. By using the testing apparatus, the pre-emphasis function of the DUT containg the pre-emphasis circuit can be tested in good precision.
Patent TW-200730180-A (TW)
Title: Therapeutic uses of steroidal compounds
Inventor: WULFERT ERNST
IPC: A61P25/00
Filed: 2006-11-20
Abstract: A steroid derivative of formula (I): (in which: one of R1 and R2 is hydroxy and the other is hydrogen; or R1 and R2 together represent oxo; R3 is hydrogen or hydroxy; and the dotted lines represent single or double carbon-carbon bonds); and pharmaceutically acceptable salts and esters thereof are useful for the prevention or treatment of pain, for improving nerve regeneration after nerve injury or damage or disease, for the prevention or treatment of brain injury, damage or disease and for neuroprotection. Particularly useful compounds are 11-hydroxy- Δ 4-androstene-3,17-dione and 11-oxo- Δ 4-androstene-3,17-dione or their derivatives.
Patent TW-200802362-A (TW)
Title: Programmable matrix array with chalcogenide material
Inventor: LOWREY TYLER
IPC: H01L29/06
Filed: 2006-12-22
Abstract: A chalcongenide material is proposed for programming the cross-connect transistor coupling interconnect lines of an electrically programmable matrix array. Leakage may be reduced by optionally placing a thin insulating breakdown layer in series with the select device or a phase change material. The matrix array may be used in a programmable logic device.
Patent TW-200827570-A (TW)
Title: Designing method of minute flow rate controller with entrance throttle groove
Inventor: SEKOGUCHI KOTOHIKO
IPC: F15D1/02
Filed: 2006-12-29
Abstract: To provide a designing method of a minute flow rate controller for accurately controlling a minute flow rate of a fluid, realizing a desired valve characteristic without inducing unstableness of a fluid flow, and having a throttle groove for controlling the minute flow rate with a simple shape. The minute flow rate controller comprises an inflow passage 12 for introducing the fluid, a valve element 2 having a main throttle groove 6 formed thereon for making the introduced fluid flow from a starting end toward a finishing end, a fluid outflow port 20 opened at an optional cross section by a flow rate adjusting member, and an outflow passage 14 for leading out the fluid flowing out from the fluid outflow port 20. In this designing method of the minute flow rate controller with the entrance throttle groove, the entrance throttle groove 8 is provided communicably preceding a starting end position of the main throttle groove 6, and based on a relational expression derived from the momentum equation of the fluid flowing in the entrance throttle groove 8 and the main throttle groove 6, the size of the entrance throttle groove 8 is determined so that a desired flow resistance is displayed.
Patent TW-200828864-A (TW)
Title: Symbol rate testing method based on signal waveform analysis
Inventor: CHENG YU-YI
IPC: H04L1/24
Filed: 2006-12-29
Abstract: A symbol rate testing method based on signal waveform analysis is provided. A signal with a plurality of quasi-bit 1s and quasi bit 0s is received and sampled within an acquiring time. The maximum values of quasi bit 1s is calculated according to sampled values at each sampling point of the signal. A minimum value of the maximum values is determined as a critical value. Whether the quasi bit 1 is a bit 1 or not is determined according to the critical value, and a total number of the bit 1s within the acquired time is obtained. For the same concept, a total number of the bit 0s can be derived. Then, a symbol rate is calculated based on the acquired time, the number of the bit 1s and bit 0s.
Patent TW-200826856-A (TW)
Title: Method for manufacturing nanometer grade pure pearl powder
Inventor: LIAO CHIN-TANG
IPC: A23L17/40
Filed: 2006-12-29
Abstract: This invention relates to a method for manufacturing nanometer grade pure pearl powder. The method comprises the following steps: cleaning pearl surface with fresh water, soaking the pearl in weak acid, then removing the pearl for once more cleaning with fresh water, thereafter, pulverizing, rough grinding, fine grinding, and sieving of the pearl, further grinding the sieved pearl powder with water added therein to remove suspension in the surface layer of the solution and settlement in the bottom, and then sieving and low temperature drying, followed by repeating twice the steps of water-added grinding, impurity removal, sieving, and low temperature drying to the nanometer grade pure pearl powder.
Patent TW-200739186-A (TW)
Title: Transflective liquid crystal display device
Inventor: IMAYAMA HIROTAKA
IPC: G02F1/133
Filed: 2007-01-03
Abstract: The present invention enhances display efficiency and a contrast of a reflective part in an IPS-type transflective liquid crystal display device. In a transflective liquid crystal display device in which the liquid crystal display device includes a liquid crystal display panel having a pair of substrates and liquid crystal sandwiched between the pair of substrates, the liquid crystal display panel includes a plurality of sub pixels each having a transmissive part and a reflective part, each sub pixel out of the plurality of sub pixels includes a pixel electrode which is formed on one substrate out of the pair of substrates and a counter electrode which is formed on the one substrate, and an electric field is generated by the pixel electrode and the counter electrode thus driving the liquid crystal, a portion of the counter electrode of the each sub pixel at the reflective part constitutes a reflective electrode, the reflective electrode includes an uneven portion and a flat portion, and the flat portion of the reflective electrode is arranged on a boundary portion between the transmissive part and the reflective part of the each sub pixel.
Patent TW-200830461-A (TW)
Title: Damascene interconnection structure and dual damascene process thereof
Inventor: HUANG CHUN-JEN
IPC: H01L21/768
Filed: 2007-01-12
Abstract: A dual damascene process is disclosed. A substrate having a base dielectric layer, a lower wiring layer inlaid in the base dielectric layer, and a cap layer capping the lower wiring layer is provided. A dielectric layer is deposited on the cap layer. A silicon oxide layer is deposited on the dielectric layer. A metal hard mask is formed on the silicon oxide layer. A trench opening is etched into the metal hard mask. A partial via feature is etched into the dielectric layer within the trench opening. The trench opening and the partial via feature are etch transferred into the dielectric layer, thereby forming a dual damascene opening, which exposes a portion of the cap layer. A liner removal step is performed to selectively remove the exposed cap layer from the dual damascene opening by employing CF4/NF3 plasma.
Patent TW-200731832-A (TW)
Title: Method and apparatus for processing a media signal
Inventor: OH HYEN-O
IPC: H04S3/00
Filed: 2007-01-19
Abstract: An apparatus for processing a media signal and method thereof are disclosed, by which the media signal can be converted to a surround signal by using spatial information of the media signal. The present invention provides a method of processing a signal, the method comprising of extracting a downmix signal from a bitstream; generating a decorrelated downmix signal by applying a decorrelator to the downmix signal; and generating a surround signal by applying rendering information for generating a surround signal to the downmix signal and decorrelated downmix signal.
Patent TW-200810371-A (TW)
Title: Asynchronous sigma-delta digital-analog converter
Inventor: RIVOIR JOCHEN
IPC: H03M3/02
Filed: 2007-02-26
Abstract: An asynchronous sigma delta digital to analog converter (100) for converting a digital input signal (u[k]) into an analog output signal (f(t)), the digital to analog converter (100) comprising an asynchronous sigma delta modulator (120) comprising a low pass filter (104) and a comparator (106) and being supplied with the digital input signal (u[k]), and a clock sample unit (108) adapted to sample a signal (x(t)) processed by the comparator (106) based on a clock signal (fb) thereby generating the output signal (f(t)).
Patent TW-200739087-A (TW)
Title: Test tray for test handler
Inventor: SHIM JAE-GYUN
IPC: G01R31/26
Filed: 2007-02-26
Abstract: The present invention relates to a test tray for a test handler. According to this invention, there is disclosed a technique that an insert loaded in a loading part which is arranged in a matrix pattern in a frame of the test tray allows an amount and direction of free movement thereof to be determined in accordance with a location of the loading part, where the insert is loaded, on the matrix, thereby enabling a thermal expansion or contraction of a match plate or the test tray to be compensated.
Patent TW-200828183-A (TW)
Title: Image enhancement using hardware-based deconvolution
Inventor: RAPPAPORT ELCHANAN
IPC: G06T5/00
Filed: 2007-03-15
Abstract: An image enhancement circuit (26, 60, 190, 260) includes an input interface (64, 262), which is operative to accept a stream of input pixel values belonging to pixels (32) of an input image. The input image includes a plurality of different input sub-images including respective subsets of the pixels, such that the input pixel values of the pixels in the different input sub-images are interleaved in the stream. A plurality of filter cells (92, 144, 206, 222, 238, 364) are connected in a two-dimensional array configuration and are arranged to separately filter the input pixel values of each of the input sub-images with respective two-dimensional deconvolution kernels so as produce respective output sub-images that include output pixel values. A multiplexer (88, 332) is coupled to multiplex together the output pixel values of the output sub-images so as to produce a filtered output image.
Patent TW-200808078-A (TW)
Title: Dynamic sequencing of timeslots in wireless communication systems
Inventor: ZHANG GUO-DONG
IPC: H04M/
Filed: 2004-03-15
Abstract: A method and system for assigning resources in wireless communication systems is disclosed. Timeslots allocated for handling user traffic are evaluated to create a plurality of timeslot sequences. Resources are assigned to the allocated timeslots according to the timeslot sequence having the lowest total interference.