Patent GB-1270111-A (GB)
Title: Improvements relating to thyristor converter systems
Inventor: GOODRIDGE RICHARD JAMES
IPC: H02M7/757
Filed: 1968-04-19
Abstract: 1,270,111. Static converter systems; control of motors. ASSOCIATED ELECTRICAL INDUSTRIES Ltd. 21 July, 1969 [19 April, 1968; 29 Nov., 1968; 2 April, 1969], Nos. 18553/68, 56748/68 and 17342/69. Headings H2F and H2J.  A thyristor converter system for providing two alternative modes of connection of an electrical supply to a load (e.g. to provide reversible drive of a D.C. or A.C. motor) includes a control circuit comprising basically a bi-stable circuit (e.g. a J-K binary unit) which switches from one state to the other in response to a demand signal to changeover the converter connection mode (e.g. to reverse the phase rotation in the case of A.C. output to the load as in Fig. 7 or to reverse polarity in the case of D.C. output, (Fig. 4, not shown) and a changeover means (which may be an electrically operable switch) responsive to each output of the bistable circuit to inhibit the appropriate one of the converter connection modes and permit the other mode to be established. The system further includes means for inhibiting changeover of the bi-stable circuit if certain conditions are not fulfilled (e.g. zero load current, zero output voltage, zero phase advance of firing signals). The changeover means may include a delay means to ensure that outgoing thyristors have regained their blocking state before firing the incoming thyristors. In one embodiment Fig. 7, a 3 phase A.C./A.C. converter feeding an induction motor M comprises five anti-parallel pairs of thyristors wherein either sense of phase rotation is selected by supplying firing signals to one or the other set of three pairs, one of the pairs being common to both sets. Firing signals are supplied via channels FS1, FS2 from a phase shifter and firing circuit FC having pulse suppression input signals via channels PS1, PS2 from a logic unit LU which includes the J-K bi-stable circuit. Current control means is constituted by a phase shifter input ramp circuit RP having such characteristics as to limit the rate of change of phase advance to limit the current fed to the induction motor under transient conditions. Load current, is sensed by CT's or alternatively by Hall plate devices or D.C. transformers and a feedback signal derived by a unit CM is applied to the ramp unit RP via a known "spillover" circuit SL to limit the thyristor current to a safe value. The logic unit LU receives changeover inhibiting inputs for preventing reversal of the converter connection mode until input conditions represent-zero load current (via line CS), zero phase advance of thyristor firing signals (via line PB), and zero voltage across the system output (derived by a transformer T1 and rectifier BR1). Depending upon the output mode of the unit LU bi-stable circuit a signal on line P causes a polarity control unit PC either to reverse the polarity of the changeover demand reference signal CD or allow it to pass through to the ramp unit RU with unchanged polarity. An output from an AND gate in the logic unit LU via line IR keeps the output of the ramp unit RU to a low level during changeover conditions whereby the firing pulses to incoming thyristors are initially fully retarded and the load current is then increased from zero in a controllable manner. In a modification of the Fig. 7 arrangement, Fig. 7A (not shown), there is additionally an A.C./D.C. converter connected via a single phase transformer to the supply whereby direct current can be injected into the A.C. motor for dynamic braking.  Alternatively the current demand signal CD may be an error signal representing the difference between actual and desired speeds of a D.C. motor. Application to the control of a motor driving a tension reel in a rolling mill or driving a locomotive for charging or discharging a coke oven, is suggested.