Patent GB-1326685-A (GB)
Title: Data indicator screens
IPC: G02F1/135
Filed: 1971-05-20
Abstract: 1326685 Modulating light; dielectric storage apparatus SIEMENS AG 20 May 1971 [29 July 1970] 15949/71 Headings H3B and H4F [Also in Division G5] Each element of a display matrix comprises a dynamic scattering liquid crystal layer 2 and a parallel layer 1 of a ferroelectric ceramic material, such as lead zirconate titanate, each layer being provided with a pair of opposed electrodes, the arrangement being such that the variable capacitance of layer 1 may be used to control the potential difference UFK to be applied across layer 2. A first embodiment, Fig. 7, comprises X and Y addressing electrodes, 3, 4, and opposed electrodes 12, 6 respectively, which as described form a common circular electrode, with a central boss portion 12 of diameter equal to the width of electrode 3. An insulating layer 11 is provided. The capacitance between electrodes 4 and 6 is made greater than that between electrodes 3 and 12, and the hysteresis curve of the ferroelectric material is preferably nearly rectangular. If a D.C. potential U is is applied between electrodes 3 and 4, with electrode 12, 6 isolated apart from capacitive coupling, the relationship between UFK and U is non-linear i.e. similar to a diode I-V curve, Figs. 3 and 4 (not shown), and cross-talk between elements on the same row or column is thereby much reduced. For effective operation the layer 2 should have a resistance and the capacitance across layer 2 should be sufficient for discharge over a period greater than the turn-on time of the element. In one mode of operation, at each operation of the element the sign of the pulse applied to electrodes 3, 4 alternates, so that the layer 1 is moved through alternate halves of a hysteresis loop. In a second mode, using the fact that the resistance of layer 1 is much greater than that of layer 2, a D.C. bias voltage is applied across electrodes 3, 4, most of it lying across layer 1 and being sufficient to cause saturation thereof. Recording pulses of an opposite sign are applied to electrode 3, 4, to activate an element by causing the layer 1 to undergo a complete hysteresis cycle, Fig. 5 (not shown). A suitable circuit including decoupling diodes between the bias and pulse source is described, Fig. 6 (not shown). A second embodiment, Fig. 11, suitable for rapid (1 Ás) recording of information, with subsequent optical read-out, comprises X and Y address electrodes 13, 14, a circular electrode 28 with a boss 36, 37 inserted in a respective aperture 35 of electrode 13 but spaced therefrom, and a continuous transparent sheet electrode 26. Initially all ferroelectric elements 1 are in the state R 1 , Fig. 10. Negative D.C. pulses U 2  applied between electrodes 13 and 14 drive the addressed elements into state R 2 . For optical read out, voltage pulses Q are applied between all the electrodes 14 and the sheet electrode 26, whereupon for elements in the state R 2 , only the major potential drop occurs across layer 2. Such elements are energized with simultaneous destruction of the information stored in layer 1. In a similar embodiment, Fig. 8 (not shown), layers 1 and 2 are separated and provided with an electrode spot (21) and an electrode (23) respectively, these being connected and thereby equivalent to the electrodes 36, 37, 28. Insulating layer 11 may be of photosensitive material deposited on layer 1, which is exposed and etched to form an aperture at each display element location, and the common electrodes 6 or 28 are subsequently vaporized in and around the apertures. For operation by light transmission, all layers and electrodes are transparent, e.g. SnO 2  electrodes, but for reflection the central electrodes are, e.g. of Al or Ni. The layer 2 may be coloured or of the sort exhibiting a storage effect when once activated.