baber/WOPTO huggingface dataset:
Patent JP-S6175592-A (JP)
Inventor: TOKUNAGA YUTAKA
IPC: H01L25/04
Filed: 1984-09-21
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S6176985-A (JP)
Inventor: SUGAWARA SATOSHI
IPC: G21C7/14
Filed: 1984-09-21
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0541187-A (JP)
Title: Cathode ray tube
Inventor: TAKAMURA TAKUMI
IPC: H04N5/64
Filed: 1991-08-06
Abstract: PURPOSE:To improve charge voltage damping characteristics in a cathode ray tube containing an antistatic film. CONSTITUTION:An antistatic film is formed on the surface of a panel, a low resistance band 16 is formed all around the perimeter of an unavailable screen part of the antistatic film, subsequently the low resistance band 16 is connected to a grounded explosion proof band 5 by a conductive tape 17.
Patent JP-H08172184-A (JP)
Title: High-voltage mos transistor
Inventor: KURASU EICHI EKURUNDO
IPC: H01L27/092
Filed: 1995-06-28
Abstract: PURPOSE: To integrate an isolated gate MOSFET transistor and a both side junction gate FET transistor, connected is series, on one chip while keeping the compatibility with a 5 V logic element. CONSTITUTION: A drain region 26 for forming the channel of a junction gate FET transistor (JFET) extends laterally in the opposite directions from a drain contact 16 and the block of a second insular region to a position touching the surface of a substrate 11. It is isolated from a region for forming the channel of an MOSFET disposed laterally between a source contact 14 beneath an insulation layer 18 and the block of first insular region and a position of the extended drain region 26 closest to the surface of the substrate 11. It is combined with a gate electrode 17 for controlling the current passing through an MOSFET channel and flowing beneath the insulation layer 18 by the field effect. With such structure, transistors can be integrated easily on one chip while keeping the compatibility with a 5 V logic element.
Patent JP-H0925015-A (JP)
Title: Paper feeder
Inventor: NISHIO TATSUO
IPC: B65H27/00
Filed: 1995-07-10
Abstract: PROBLEM TO BE SOLVED: To reliably separate paper one by one from the stack of paper thereby preventing double feeding by inserting a rotating separating member into a rotating paper-feeding member when moved in one direction and by projecting the rotating separating member from the rotating paper-feeding member and intermittently inserting it into the stack of paper when moved in the other direction thereby slipping the sheets of paper little by little. SOLUTION: A rotating separating member 51 is projected from a peripheral surface of a rotating paper-feeding member 50. A rotating driving cylinder 21 is driven via a pulley 36 for transmitting a driving force to rotate a rotating body 20 for feeding, whereby the rotating separating member 51 is intermittently put into contact with and inserted into the stack of paper carried and thus some sheets of paper in the upper side are slipped little by little. After a predetermined time, a solenoid 55 is turned on to attract an operating arm 55a and to move a cam shaft 45 in a left direction via a lever 58.  An engaging shaft 51 of the rotating separating member 51 is dropped in a cam groove 45c by a coil spring 61 and the rotating separating member 51 is retracted from the peripheral surface of the rotating paper-feeding member 50, whereby friction material 22 on the peripheral surface separates the sheets of paper in a slipped state one by one.
Patent JP-S6440061-A (JP)
Title: Method for excessively filing adsorbent into artificial organ
Inventor: KUKI KAZUO
IPC: A61M1/36
Filed: 1987-08-05
Abstract: PURPOSE:To prevent the generation of a liquid layer which does not contain adsorbent, and to enhance adsorptivity, by making the inner volume of an intimate mixture of an adsorbent of a given concentration to be filled into an artificial organ and a solution larger than the inner volume of the artificial organ. CONSTITUTION:An intimate mixture of a solution and an adsorbent with a volume which is by less than 15%, normally several percent, larger than the inner volume defined by the lower filter and the upper filter of an artificial organ,is filled in the following manner: the vessel to be used in the filling is of an integral construction comprising an auxiliary metering vessel and an artificial organ closely connected to an opening of the artificial organ: the preset amount of the mixture is filled under the confirmation with the detecting part of the auxiliary metering vessel: the filter used in the filling operation does not pass the adsorbent but passes the solution. The filling is performed by pressing the mixture into the artificial organ through said filter, thereby filling an excessive amount of the adsorbent into the organ in a compressed state and discharging the surplus amount of the adsorbent outside the artificial organ. In this manner, at the time of filling the adsorbent, layers containing no adsorbent scarcely exist within the artificial organ, thereby preventing the lowering in the adsorbability.
Patent JP-H1040448-A (JP)
Title: Atm handling state display method
Inventor: OHIRA KYOKO
IPC: G07D9/00
Filed: 1996-07-26
Abstract: PROBLEM TO BE SOLVED: To improve the efficiency of monitor operation work and customer service by providing an automatic teller machine(ATM) handling state display method which can inform a customer of information showing processes taken for recovery of the ATM can be reported when any fault is generated at the ATM. SOLUTION: Concerning the ATM handling state display method for displaying a guidance picture by sending a display signal from a monitor terminal 11 provided at a monitor center 7 through a communication line 13 to an ATM 3, processing for operating recovery through the monitor terminal 11 after the confirmation of fault generated at the ATM 3, processing for displaying a fault dealing message onto the ATM 3 through the remote operation of the monitor terminal 11 when the recovery operation due to this monitor terminal 11 is disabled, and processing for displaying the prenotice message of recovery onto the ATM 3 through the remote operation of the monitor terminal 11 after the discrimination of recovery schedule of the fault is performed.
Patent JP-S6175626-A (JP)
Title: Interleaving method in digital communication
Inventor: TAKAHASHI YASUHIRO
IPC: H03M13/27
Filed: 1984-09-20
Abstract: PURPOSE:To miniaturize the circuit and to improve the reliability by using one set of an RAM and an address setting circuit. CONSTITUTION:One set of the matrix arrangement of (m+n) sets of storage elements is used for an RAM 12 and a data from an input terminal 14 is written sequentially in lateral direction. When the address is written up to the final address, the address is restored again to the initial address, the data is read to an output terminal 15 while the address is moved longitudinally sequentially for example and a new data from the input terminal 14 is written. When this proceeded up to the final address, the procedure is restored gain to the first address and lateral read/write is executed. Then this operation is repeated alternately. The address setting circuit 13 consists of row and column direction counters and switches alternately the moving direction of addresses at each cycle in cooperation with the control circuit and a switching circuit (both not shown).
Patent JP-H1141655-A (JP)
Title: Interference system control system for cellular mobile communication
Inventor: WATANABE OSAMU
IPC: H04W24/02
Filed: 1997-07-23
Abstract: PROBLEM TO BE SOLVED: To avoid deterioration of connection quality and communication quality by an influence of an interference from other communication system by performing a communication by using the communication channel of frequency band where the central part of a radio zone is more influenced by an interference from other communication system and performing the communication by using the communication channel of the frequency band in which a peripheral part has in particular a little or no influence of interference. SOLUTION: A frequency band is set so that an order becomes B1 band, B2 band... Bn band in order of degree of influence of interference from other communication system, a band A is set in a frequency band not influence at all by other communication system and the communication channels are used depending upon circumstances. That is, when a reception level L of a mobile station is higher than LB1, the B1 band is used and, when the reception level L is between LB1 and LB2, the B2 band is used, and when the reception level L is smaller than Lbn and so on, the A-band is used similarly. Thus, influences of interference given to the quality of connection and communication can be avoided.
Patent JP-H0362528-A (JP)
Title: Heterojunction field-effect transistor
Inventor: SAITO AKIRA
IPC: H01L29/812
Filed: 1989-07-28
Abstract: PURPOSE:To obtain a high-speed heterojunction FET by a method wherein p-type GaAs layers, which are arranged in an undoped GaAs layer on a semi-insulative GaAs substrate at regular intervals and are buried in the undoped GaAs layer, and an n-type AlGaAs layer on the undoped GaAs layer are made to intersect each other. CONSTITUTION:An undoped GaAs layer 2 is formed on a semi-insulative GaAs substrate 1 and Be ions are selectively implanted to bury fine rectangle-shaped p-type GaAs layers 3a to 3c in the layer 2 at equal intervals. An annealing is performed to activate, an n<+> AlGaAs layer 4 is superposed on the layer 2 to form a heterojunction and a two-dimensional electron gas layer is formed on the heterojunction interface. Then, a gate electrode 5 is formed intersecting orthogonally the layers 3a to 3c. A potential in the layer 2 over the layers 3a to 3c is near that in the layers 3a to 3c and is higher than that between the rectangle-shaped layers 3a and 3c, the two-dimensional electron gas layer concentrates and is formed on the heterojunction interface at the intermediate region between the layers 3a to 3b and the intermediate region between the layers 3b to 3c, the electron gas layer can be turned into a one-dimensional electron gas layer, mobility and a saturation velocity are improved and a heterojunction FET becomes a high-speed device.
Patent JP-H0753173-A (JP)
Title: Filter changing device
Inventor: TAKEI YOSHITAKA
IPC: B66C1/46
Filed: 1993-08-10
Abstract: PURPOSE:To provide a filter changing device which permits a number of contiguous filters to be changed at the same time and prevents the filter from being broken in the change. CONSTITUTION:A filter changing device is equipped with an insertion body 15 which has a bottomed pipe shape and is inserted into a filter 1 from the upper end opened port part 1c of each filter 1 which is insertion-engaged with a number of penetration holes 12 formed on the partitioning wall 9 of a dust collector and a rubber tube 17 which is installed so as to spread and contract the diameter on the insertion body 15. The diameter of the rubber tube 17 is spread and contracted by introducing air under pressure into the insertion body 15 from an air pump 30, and the rubber tube 17 is press-attached with the inner surface of the filter 1, and then the insertion body 15 is raised, and the filter 1 is pulled out from the through hole 12.
Patent JP-S5898900-A (JP)
Title: Microprocessor controlling system
Inventor: TSUSHIMA SATORU
IPC: G06F13/00
Filed: 1981-12-09
Abstract: PURPOSE:To detect the abnormality of the access of a microprocessor to a memory having an unused address area, by detecting this access by a detecting circuit consisting of comparing circuits where address information is collated with contents of upper and lower limit address setting registers. CONSTITUTION:A microprocessor 1, a memory 5 having a ROM9, a RAM6, and an unused address area 7, a lower limit address setting register 11 to which the lower limit address of the unused address area is set, an upper limit address setting register 12 to which the upper limit address of this area is set a comparing circuit 13 where contents of an address bus 3 to which address information is transferred are supplied and are collated with contents of the lower limit address setting register, a comparing circuit 14 where said contents of the address bus are collated with contents of the lower limit address setting register, and a logic circuit 15 which detects the validity of contents of the address bus on a basis of results of collation are provided to detect the access of the microprocessor to unused addresses, and this abnormality is detected.
Patent JP-H1035404-A (JP)
Title: Occupant protective device
Inventor: HORIKOSHI HITOSHI
IPC: B60R21/16
Filed: 1996-07-26
Abstract: PROBLEM TO BE SOLVED: To easily provide a dedicated IC by furnishing an AND gate to put out an ignition signal by taking up AND (logical multiply) from first and second ignition judgement circuits. SOLUTION: A first comparison circuit 7 as a first ignition judgement circuit compares integrated output of a first integrating circuit 6 and a standard value 7a with each other and puts out a first ignition signal when the integrated output exceeds the standard value 7a. A second comparison circuit 10 as a second ignition judgement circuit compares integrated output from a second integrating circuit 9 and a standard value 10a with each other and puts out a second ignition signal when the integrated output exceeds the standard value 10a. When the first and second ignition signals from the first and second comparison circuits 7 and 10 are supplied to an AND gate 11, it puts out an ignition signal and puts out a signal to develop an air bag, etc. Consequently, it is possible to provide a circuit suitable for a custom IC.
Patent JP-S6257623-A (JP)
Title: Electroosmotic dehydrator
Inventor: KONDO SHIRO
IPC: C02F11/12
Filed: 1985-09-06
Abstract: PURPOSE:To surely stick the second electrically conductive plate on a conductive plate supporting plate by mounting the second conductive plate on the elastic membrane of a squeeze filter plate so that the central part of the conductive plate is stuck on the conductive plate supporting plate through the elastic membrane. CONSTITUTION:An electrically conductive plate 4 on the cathode side is provided on the surface of a filter plate 1 opposite to a squeeze filter plate 3, a conductive plate 5 on the anode side fixed to a conductive plate supporting plate 17 is furnished on the opposite surface of the squeeze filter plate 3 through an elastic membrane 18, a couple of filter cloths is inserted between the filter plate 1 and the squeeze filter plate 3 and an unfiltered liq. is forced into the clearance formed in between. When the elastic membrane 18 is expanded, the conductive plate 5 is moved in association with the conductive plate supporting plate 17, a DC voltage is impressed between both the conductive plates, the liq. coonent is drawn to the cathode side and the solid component is drawn to the anode side and dehydrated by electroosmosis.
Patent JP-S63184368-A (JP)
Title: Manufacture of compound semiconductor fet
Inventor: NISHI SEIJI
IPC: H01L21/338
Filed: 1986-08-26
Abstract: PURPOSE:To facilitate predetermining the threshold voltages of FET's on each wafer with good reproducibility by a method wherein recesses are formed on each wafer by etching so as to have depths which provide designed thresholds of original FET's with the threshold voltage of a spare FET formed on each wafer as a reference and gate electrodes are provided in the respective recess to form the original FET's. CONSTITUTION:A spare FET is provided on a wafer on which original FET's are formed. For that purpose, a recess 12 which reaches a channel layer 24 and has a suitable depth is formed by a necessary etching technology from the surface of the wafer (the surface of an N<+>type GaAs layer 26) in a spare FET forming region between a source electrode 32 and a drain electrode 34. A gate electrode 14 is provided in the recess 12. For a D-type FET, a recess 12D is formed by etching from the surface of the N<+>type GaAs layer 26 so as to have an estimated depth and a gate electrode 14D is formed in the recess 12D. Successively, a recess 12E for an E-type FET is formed by etching and a gate electrode 14E is formed in the recess 12E.
Patent JP-H0753015-A (JP)
Title: Article carry-out monitor
Inventor: CHIBA KEIICHI
IPC: B07C5/344
Filed: 1993-08-10
Abstract: PURPOSE:To make housing work to a stocker more efficient, and its device smaller in size by controlling an already measured article to be tested which is carried on by a carrying conveyor so as to be moved to the applicable empty shelf of a stocker by a lifting conveyor based on a detected height inspection value. CONSTITUTION:As for an article 1 to be tested moved in a monitor main body 20 by a carrying conveyor 21, its height is detected by a height inspection switch 29, and its radiation quantity is measured by radiation detectors 27a to 27c. When the article 1 after measurement is moved to a lifting conveyor 23, an empty shelf applicable to the height of the article 1 is detected out of a stocker 26 by an empty shelf detecting means based on the height of the article 1. The lifting conveyor 24 is moved up or down to the empty shelf of the stocker 26. Next, when it is detected by a discharge control means that the lifting conveyor 24 is stopped at the empty shelf of the stocker 26, the discharge control means drives the lifting conveyor 24 so as to move the article 1 to the empty shelf. With this constitution, stocking work can be thereby made efficient.
Patent JP-S6091534-A (JP)
Title: Manufacture of color picture tube
Inventor: TANAKA TOKUSHIROU
IPC: H01J29/07
Filed: 1983-10-25
Abstract: PURPOSE:To prevent deterioration of color purity due to color slippage or the like of a picture while reducing doming of a shadow mask by forming a film layer having a low thermal expansion coefficient and the low heat conductivity on the main face on the side of an electron gun of a shadow mask. CONSTITUTION:Lead borate glass 11 dissolved in an acetic acid butyl alcohol solution, in which several % of nitrocellulose is dissolved, is applied to the side of an electron gun of a shadow mask 5. Next, an organic film 12 is further formed on said film layer for preventing glass particles from falling down. The shadow mask 5 formed in this way is made to pass a heat treatment furnace, then a glassified lead borate glass layer can be formed on the side of the electron gun of the shadow mask 5. Further, the organic film 12 disappears by heating. The heat generated by lead borate glass, which an electron beam hits, reduces its amount to be conducted to the mask due to the small thermal conductivity of the lead borate glass thus being able to effectively check temperature rise of the shadow mask.
Patent JP-S6257778-A (JP)
Title: Manufacture of box-structure body
Inventor: SAKURAI TAKASHI
IPC: B23K9/00
Filed: 1985-09-07
Abstract: PURPOSE:To reduce the manufacturing time of a box-structure body, by forming a box body of skin plates and a reinforcing plate on a conveyer and welding the reinforcing plate to the skin plates after welding the skin plates to each other. CONSTITUTION:A box body 11 is formed of skin plates 3a, 3b, 3c, and 3d and a reinforcing plate 7 which are previously prepared from steel plates on a conveyer. Then corner groove welding between each contacted skin plates 3c and 3b and 3b and 3d is performed by using horizontal welding equipments 31 on an assembling conveyer 27. Thereafter, the grooves 9a and 9b of the reinforcing plate 7 are welded by means of a consumable nozzle type electroslag welding equipment 35a through key holes 12c on the conveyer 27. The manufacturing time can be reduced and the structure body can be prevented from being distorted because the conveyers are used, therefore, the product accuracy can be improved.
Patent JP-H0949117-A (JP)
Title: Conductive cellulose fiber
Inventor: ARAI SHINJI
IPC: D01F1/09
Filed: 1995-08-03
Abstract: PROBLEM TO BE SOLVED: To obtain a conductive cellulose fiber having slight variation in specific resistance and suitable for an impression brush or an electricity removing brush in a dry-type copying machine of electrophotography, etc., by compounding carbon particles and zinc in fibers each in a specific amount. SOLUTION: A conductive cellulose fiber having the variation of a specific resistance of <100<3> Ωcm is obtained by compounding 5-70wt.% (preferably, 10-30wt.%) of carbon particles and 30-5000ppm of zinc in cellulose fibers. A copy figure drawn by an impression brush using the fiber as piles is excellent in sharpness.
Patent JP-S57168955-A (JP)
Title: Corrosion preventive pigment and corrosion preventive paint using same
Inventor: BIGO HATSUKU
IPC: C09C1/36
Filed: 1981-12-11
Abstract: 1. Claims for the Contracting States : BE, DE, FR, GB, IT, NL, SE Metal phosphate and/or mulybdate corrosion protection pigments based on zinc and magnesium, characterised in that they can be obtained by treatment with phthalic acid and/or phthalic anhydride at increased temperatures. 1. Claims for the Contracting State : AT Process for the preparation of metal phosphate and/or molybdate corrosion protection pigments based on zinc and magnesium, characterised in that the pigments are treated with phthalic acid and/or phthalic anhydride at increased temperatures.
Patent JP-H0646242-A (JP)
Title: Picture reader
Inventor: HASHIMOTO YOSHIYUKI
IPC: H04N1/387
Filed: 1992-07-24
Abstract: PURPOSE:To output plural pictures whose arrangement is changed onto recording paper or a CRT or the like by reading plural pictures picked up onto a micro film in pairs through one scanning. CONSTITUTION:Plural pictures arranged to a prescribed attitude and picked up on a micro film are projected on a screen 11. The projected picture is read by an image sensor and written in memories 31,32. When the picture data are printed on recording paper R, displayed on a CRT or recorded on an optical disk, the data are outputted while the arrangement of the picture is changed by address selectors 35,36. Thus, plural pictures picked up on a micro film in a roll form serially in the broadwise direction are printed on the recording paper R in parallel.
Patent JP-S6175959-A (JP)
Title: Retrieving method of microfische film
Inventor: KAIDA SHINICHI
IPC: G06F17/30
Filed: 1984-09-21
Abstract: PURPOSE:To prevent repetition of the same setting action by setting the rotary positioning so that the information recorded to the frames of a microfiche are set in the normal direction and at the same time storing the rotary positioning data. CONSTITUTION:It is decided whether the information on the frames 22 of a microfishe 2 is equal to the horizontal information 22A or the vertical information 22B. The information 22A is copied as it is and processed. While the microfishe 2 is turned by 90 deg. with the information 22B. At the same time, the fine control is given to the stop position of the microfishe 2. Thus the correct positioning is secured with the microfishe. Then the position the microfishe 2 is detected and stored to a memory, and the retrieval processing is carried out. In case another microfishe is retrieved, the microfishe 2 is turned based on the position data stored in the memory so that the information 22B is set at a normal position. Then the retrieval processing is repeated.