Patent GB-977876-A (GB)
Title: Improvements in or relating to digital electric signal handling equipment
Inventor: KILLICK RICHARD DUNCAN
IPC: H03M13/27
Filed: 1961-07-25
Abstract: 977,876. Multiplex pulse code signalling. GENERAL ELECTRIC CO. Ltd. July 24, 1962 [July 25, 1961], No. 26894/61. Heading H4L. Relates to an arrangement for re-arranging the order of the digits in a time division multiplex p.c.m. system. As described a twenty-five channel system in which the eight-digit signals for each channel signal sample are transmitted in succession is converted into a system in which all the first digits of each sample are transmitted in succession, followed by all the second digits, and so on. The incoming multiplex signal is supplied over line 1 to an array 3 of two hundred bi-stable devices (stages) arranged in twenty-five rows and eight columns, and the converted signal is supplied over an output line 2. It is assumed that the two hundred digits of the first frame are stored in the array with the digits representing the first sample of the first channel stored in the top eight stages and so on down to the bottom eight stages in which the first sample of the twenty-fifth channel is stored. While the digits of the first frame are being supplied to line 2 the digits of the next frame are being supplied to the array and as each digit is supplied to the array some operation is performed on the stored digits under the control of three trains of pulses A, B, C. The A pulses supplied over lead 4 consist of groups of twenty-four pulses coinciding with the digits numbered 0 to 23, 25 to 48 . . . 175 to 198 of each incoming frame. The B pulses supplied over lead 5 are single pulses coincident with incoming digits 24, 49, 74 . . . 174 of each frame. The C pulses supplied over lead 6 consist of a pulse which coincides with the last digit 199 of each frame. A pulse generator 7 produces pulses in synchronism with the incoming signal which provide the pulse train A via gates 10, 11. A circuit 8 divides the p.r.f. of the pulses from 7 by twenty-five to provide via gate 12 the pulse train B and divider 9 effects a further division by eight to provide the pulse train C. The arrangement is such that the gate 12 is inhibited whenever a pulse is present in the output of divider 9 and gate 10 or 11 is inhibited whenever a pulse is present in the output of divider 8 or 9. The A pulses are supplied to the stages of the left-hand column only and each A pulse causes the digit stored in the top stage of the left-hand column to be fed out over lead 2 and each of the digits in the remaining stages of this column to move up one stage, the next digit of the input signal being supplied at the same time over lead 1 to the bottom stage of the left-hand column. Thus after the first group of twenty pulses A the first twenty-four initial digits of the respective channels have been fed out to line 2 and the top stage of the first column contains digit 192 (the first digit of the twentyfifth channel) and the remaining stages of column 1 contain digits 0<SP>1</SP>, 1<SP>1</SP> . . . with 231 in the bottom stage (the first twenty-four digits of the next frame). The B pulse is supplied to all the stages and causes the digit 192 in the top stage of the first column to be fed out to line 2 and the digits stored in the remaining stages of the left-hand column to be moved over to the righthand column and at the same time up one row, and all the digits in the remaining columns to be moved one column to the left, the next digit of the input signal this time being supplied to the bottom stage of the right-hand column. Thus all the second digits of the respective channels now appear in the left-hand column and the first twenty-five digits of the next frame appear in the right-hand column. After another group of twenty-four A pulses followed by a pulse B the second digits of the respective channels are fed out and the left-hand column now contains all the third digits of the respective channels, the seventh column contains the first twenty-five digits of the second frame, and the eighth (right-hand) column contains the second twenty-five digits of the second frame. After the eighth group of twenty-four A pulses all except the last digit of the first frame have been fed out and the left-hand column contains at the top the digit 199 of the first frame with the remaining stages containing the last digits of the second frame. The second column contains in the top stage digit 0 and so on with digit 24 of the second frame in the bottom stage and similarly with the remaining columns. Thus successive digits of the second frame now appear in columns instead of, as was the case for the first frame, rows. A pulse C is now applied to all the stages of the array and causes the digit in the top stage of the left-hand column to be fed out to line 2, and each of the digits stored in the remaining stages is moved by unspecified means so that successive digits of the second frame are stored in rows, as was the first frame at the commencement of the operation and the cycle of operations is repeated. The procedure for converting the signal back to its original form in which it is supplied to an array of two hundred bi-stable devices arranged in eight rows and twenty-five columns also is referred to.