Patent GB-951735-A (GB)
Title: Self-adaptive control system
IPC: G05D1/08
Filed: 1961-08-29
Abstract: 951,735. Automatic control of aircraft. BENDIX CORPORATION. Aug. 29, 1961 [Sept. 14, 1960], No. 31038/61. Heading G3R. Apparatus for controlling a system, e.g. a flying machine under widely and rapidly varying external conditions, comprises means applying incremental control actions to the system at frequently recurring intervals, and means automatically modifying at each interval the gain factor of the apparatus as a function of the discrepancy between the measured response of the controlled system to the incremental control action applied to it, and a desired response. During a particular sampling interval t n  a gyro-vertical 7c senses attitude variations of airframe 7 about a selected axis and emits electrical signal ##, 7d being a manual command device through which a signal may be introduced to cause a desired change of attitude. The resulting signal # c  is applied to a model 8 which derives a signal # m representing the desired rate of attitude change, and which may comprise an analogue computer whose components simulate the desired natural response frequency and damping factor of the system. A rate gyro 7b produces a signal # indicative of the actual rate of attitude change. The two rate signals are fed to a predictor 9 which derives an actual error signal E n , representing # m -# at the time instant t n  under consideration, and a predicted error signal E n+1 , representing the difference between the two rate signals at the next sampling instant t n+1 , assuming that no control action is applied to the airframe in the meantime. The predicted error signal E n+1  is passed through a controller 10 where it is multiplied by a variable gain factor K d , which has been computed during the preceding sampling interval t n-1 . The resulting signal #X n  is applied to a servomotor device acting on a control surface, or jet deflector, each control increment being added to preceding increments to provide a total control action #X n  resulting in a control effect # ec . During the same sampling interval controller 10 uses the difference between the actual error signal E n  and the previously predicted error signal E n , derived during interval t n-1 , to compute a new value of K d  for use during the next interval t n+1 . Controller (Fig. 3). The controller includes a programmer 18 which generates pulses to open gates G1 to G11 in a sequence defining one or other of the operating modes, A or B, between which the controller alternates every 100 milliseconds. Mode A is initiated by a synchronizing pulse SP applied over lines 84, 85 to open gates G1, G3, G4, G8 and G11 A synchronizing interval then exists for ten milliseconds after which the gates close, and during which capacitor C1 stores the actual error signal E n  and capacitor C2 the predicted error signal E n+1 . Signal E n+1  also passes through amplifier 61 to a voltage divider R1 to R6, which is controlled by gates G13 to G15 so that a fraction K d  of the input voltage appears at the output, and K d  is dependant on the setting of the divider. This output voltage is modified by a factor p and is stored in capacitor C5 as #X n  = pK d  E n+1 . After eleven milliseconds a command transfer pulse CTP opens gates G9 and G11 for an accurately controlled interval of two milliseconds during which signal #X n  is transferred to the servo device over line 41. Computing K d . At sixteen milliseconds a compute pulse CP1 opens gates G2, G5 and G10 to start a compute interval CI, and sets flip-flop FF1 to open gate G12. Capacitor C3 has stored in it the predicted error signal E n  from the preceding sampling interval, so a signal (E n -E n ) is passed through gain computer 16, where it is multiplied by K d , and applied to a null detector circuit 15. Capacitor C4 has stored in it the control signal #X n-1  from the preceding sampling interval and this is also applied to circuit 15. The quantity K d  (E n -E n )-#X n-1  is applied through gate G12 to flipflop FF2. Meanwhile compute pulse CP1 is also passed by line 81 to gate 19 which has been qualified during the preceding sampling interval to allow the pulse to be applied over line 90 to the computer. The pulse is applied directly to reset flipflops FF3 to FF5, and is also applied through time delay unit 64 to flip-flop FF6, as pulse CP2. Programmer 18 also provides a series of timing pulses TP over line 80 to gate 72 which is qualified by pulse CP2 from flip-flop FF6. Flip-flops FF3 to FF5 constitute a digital counter 63 which counts the pulses TP passed by gate 72, Fig. 5 showing the states of the flip-flops after successive pulses. The flip-flops control gates G13 to G15 to adjust the voltage divider and thereby vary K d  in steps (Fig. 5). As K d  varies, so the quantity K d  (E n -E n )- #X n   -1  varies, and when this quantity reaches substantially zero flip-flop FF2 is triggered, generating a stop compute pulse SCP in line 54. This pulse resets FF1 to cause gate G12 to close, and also resets FF6 to terminate the qualifying voltage applied to gate 72. Pulses TP are therefore blocked and K d  is maintained constant at its new value. Computation criteria. At twenty-five milliseconds a first compute criterion pulse CCP1 opens gates G5 and G6 and allows a signal E n+1 -E n  to be passed to logic circuit 13 where it is divided by a constant # and the absolute value of the resultant signal is derived. Simultaneously the absolute value of E n  is derived at 30 and the differences between the two absolute values is detected at 33 to give a signal L d  which is applied to gate 19. The gate is partially qualified thereby only if |E n+1 -E n | -# |E n |>O. At about twenty-eight milliseconds the first compute criterion interval CCI a  is terminated and a second interval CCI b  is started by pulse CCP2. This pulse opens gate G4 to apply signal E n+1  to circuit 13. The absolute value of the signal is compared at 34, 35 with predetermined allowable maximum and minimum values E max , and E min  to provide signals L m1  and L m2  which partially qualify gate 19 only if E max  > |E n+   1 >E min . If either criterion is not satisfied the gain computer will not operate during the next sampling interval so that K d  will remain unchanged during that interval. Gate 19; (Fig. 6). The qualifying signals for gate 19 are applied with respective pulses CCP1 and CCP2 to AND gates 91, 92 which set flip-flops FF7 and FF8, which in turn provide two inputs for a further AND gate 97. The third input is compute pulse CP1 which is passed only if the gate is fully qualified. Pulse CP1 is also applied through delay circuit 98, as a pulse CP3,to reset flip-flops FF7 and FF8. Mode B of controller 10 is similar to mode A except that the functions of capacitors C2 and C3, and of C4 and C5 are reversed: C3 and C4 now store information obtained during the present sampling interval,while C2 and C5 store information obtained during the preceding interval. A solution of the problem in mathematical terms is given in the Specification. Specification 914,762 is referred to. In an acceleration control system for a gas turbine an electrical signal proportional to the actual rate of flow of fuel is derived from a flow meter and an electrical signal representative of the rate of flow of fuel required to maintain a given speed are derived and the actual fuel flow during the acceleration is maintained at a proportion of the flow to maintain speed at any given instant. As shown, the outputs from a tachogenerator 4 and a compressor inlet temperature sensing device 5 is fed to a unit 6 devining a signal proportional to N/#T. The signal is fed to a function generator 7, producing an output from a potentiometer 11 dependent on the steady running fuel flow curve of the engine, and is fed to a function generator 8 producing an output from a potentiometer 12 dependent on the difference between the ideal acceleration curve and the fuel required to attain the steady running curve. The voltage at a slider of potentiometer 11 is compared at the input to an amplifier 13 with the output of a flowmeter 3 monitoring the fuel to a combustion system. The output of the amplifier 13 energizes a motor 16 which positions the sliders of potentiometer 11,12 to maintain equality between the flow and acceleration signals. The run of the signals from potentiometers 11,12, representative of the total fuel required to attain the ideal acceleration is compared in an amplifier 14 with a fuel flow signal from the flowmeter 3 and when the actual fuel flow exceeds the ideal fuel flow a device 15 becomes operative to reduce the fuel flow from a variable capacity pump 1. During acceleration the amplifier 13 is rendered inoperative by a device 17.