Patent GB-1225071-A (GB)
Title: Improvements relating to semiconductor charge storage arrangements
IPC: H04N5/374
Filed: 1969-04-18
Abstract: 1,225,071. 071. Measuring electrically. PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd. April 18, 1969 [April 23, 1968], No.19855/69. Heading GIN. [Also in Divisions H1 and H4] In a semi-conductor charge storage arrangement comprising at least one row of semi-conductor pick-up elements each of which is adapted to store as an electrical charge information of a physical pattern sensed by the pick-up elements and in which the sensed pattern can be converted into an electrical signal as a function of time by sequentially reading out the stored information, each pick-up element such as B 11  has associated with it a first capacitance C 1  connected between an output electrode D and a control electrode G of a first semiconductor circuit element; is the case shown a MOS transistor T 1 ; the control electrode G being connected through a voltage source P 1 , P 2  capable of producing a pulsed voltage rendering the transistor T 1  alternately conducting and non-conducting, to a control electrode G of a second circuit element, MOS transistor T 2 , between the output D and gate G electrodes of which a second capacitance C 2  is connected. The output D of the transistor T 2  is connected to the input S of the transistor T 1 , and a transfer of charge, the magnitude of which is dependent upon information of the physical pattern stored within the pick-up element B 11 , can occur between the two capacitances C 2  and C 1  as a result of the transistor T 1  being rendered conductive. The information is also transferred in a similar manner between the pick-up elements B 12  and B 11 , &c. when transistors T 2  are likewise rendered conductive out of step with the conduction of transistors T 1 , due to a similar coupling between transistors T 2  and T1, of adjacent elements, and the overall effect is to pass a continuous chain of information along the row, from right to left as shown, via a further transistor to which may similarly be rendered conductive by pulses from the voltage source P 1 , P 2 , to a capacitance C 0 . The information is thence fed via an output transistor T 3  to an output terminal Z. A further voltage source supplies pulses across the capacitance C o  via an alternately conductive and non- conductive diode D 3 , which pulses also form part of the information-transfer system. When a plurality of such rows of pick-up elements are connected through a system of shift registers and gates, Fig. 3 (not shown) to the voltage sources they provide sequential chains of information corresponding to a two-dimensional physical pattern via a common capacitance C 0  and output transistor T 3  to the output terminal Z. If the information stored varies with time the pick-up elements of each row integrate the incoming information during the read-out periods of the other rows. The physical pattern concerned may comprise a pressure distribution or a geometry of unevenness, which acts upon the dielectric of the capacitances C 1 , C 2  to discharge the fully charged capacitances to a degree dependent upon the information stored, or upon pressure sensitive resistors connected in parallel with the capacitances C 1 , C 2  similarly to discharge them partially. The physical pattern may also be a magnetization pattern, in which case the magnetic field distribution affects the values of magnetic field sensitive resistors connected across the capacitances C 1 , C 2  to partially discharge the latter. Such resistors may comprise In Sb masses containing NiSb needles. The preferred use of the invention is for a television camera, in which case light incident upon the arrangement causes MOS capacitances C 1 , C 2  provided between the gate electrodes and drain regions of the MOS transistors T 1 , T 2  by suitable arrangement of the geometry of the respective device parts (see Division H1) to partially discharge these capacitances to an extent dependent upon the intensity of the light. Two or three such structures may be provided for use in a colour T. V. camera, and in each structure frame interlace may be provided for by suitable arrangement of the shift registers and gates. The MOS transistors may be replaced by other IGFET's, or by bipolar Si or Ge transistors.