Patent GB-1353124-A (GB)
Title: Communications control systems
IPC: H04Q3/54
Filed: 1972-04-25
Abstract: 1353124 Automatic exchange systems WESTERN ELECTRIC CO Inc 25 April 1972 [26 April 1971] 19064/72 Heading H4K A control circuit contained in an exchange, more particularly in a PABX, includes a counter which is used both for generating address codes to enable a set of communication lines to be scanned for service requests, and for counting the impulses representing the digits of a number of a called subscriber received over a calling one of said communication lines thereby to register in the counter a count representative of the number of the called subscriber. Subsequent to the receipt of the dialled digits a further scan is performed to again identify the calling line, the scan stopping when the counter is registering a count representative of the identity of the calling communication line. The communication lines are preferably provided with line circuits, of the type described in either U.S. Specification 3,697,701 or 3,697,700. General description: Fig. 1.-A plurality of telephone stations TS11-TS48 are each connected to a correspondingly numbered one of a set of line circuits LC11-LC48 and thence to a switching network SN which is a conventional 6-wire crossbar switch network. Each of the line circuits is additionally connected to a common control circuit CC. Network SN terminates a number of trunk circuits such as central office trunk circuit COT, intercom trunk circuit ITC, register circuits RCA and RCB, and an attendant position circuit APC connected to an attendant console AC. The common control circuit CC regulates and co-ordinates the operation of the system during the serving of calls and accordingly it is connected to the switching network, register and various trunk circuits as well as to the line circuits. Each of the register circuits RCA and RCB is equipped with counter/  scanner circuitry which operates under control of the common control CC to generate line scanning signals during the time that call service is not in progress. The generated line scanning signals are supplied to the common control CC for interrogating each of the line circuits LC11- LC48 for call service requests. Calls are initiated in a conventional manner, an off-hook condition being detected by the common control CC during the scanning action. The common control, by virtue of the fact that it is scanning, has selected an idle register circuit. It then recognizes the calling line, marks both ends of the network SN, completes a path between the calling line circuit and the register circuit and then releases from the call. The register circuit returns dial tone and the caller proceeds to dial into the selected register circuit. The initiation of dialling causes the register circuit to switch from a scanning mode into a digit pulse counting mode and the dialled digits are stored in the counter. For calls to other subscriber stations this will be a two digit number and the counter is divided into a tens and a units sections. However single digit numbers are also used, e.g. for obtaining an operator and the numbers 0 to 4 are reserved for such purposes. There is also provided in the register circuit a means for registering the class of the calling station. According as to whether the calling'line is (a) a station restricted to local intercom calls to another station or to an operator, (b) to an attendant position, or (c) to an attendant position attempting to complete a central office trunk call inward to a station, one of three corresponding bi-stable circuits is set by marks applied to the circuit by common control at the end of the initial calling line detection scan. Once the digits are stored the register circuit bids for the services of common control. Common control responds when idle by applying a mark which causes the stored digits and the class of service information to be read out to common control; it then selects an idle trunk circuit and marks the network SN termination of the selected trunk. At this stage the calling line circuit remains connected to the register circuit and common control has no information as to the identity of the calling line. Therefore common control instructs the register to initiate a line identification operation. The register sends a mark potential to the calling line circuit through the network SN and then initiates a scan operation in order to identify the calling line circuit. For this purpose the counter of the register circuit is reused in a scan mode. Common control CC stops the operation when the calling line has been recognized and then instructs the register circuit to release its connections through network SN to the calling line circuit. The common control then marks the network termination of the calling line circuit for establishing a call connection between the calling line circuit and the selected trunk. Further call processing proceeds in a conventional manner. Description of register circuit.-The complete register circuit is described with reference to Figs. 2-9 (Figs. 2, 3, 5, 7-9, not shown) which are arranged as indicated in Fig. 12 (not shown). The circuit mainly consists of transistor logic circuitry which has the following characteristics. Each logic gate can be switched between a low output state (- 24 V), i.e. the gate is ON and a high output state (-16 V), i.e. the gate is off. Where a lead designation in the figures is accompanied by an asterisk, that lead has a HIGH thereon during the idle condition of the register, i.e. when the counter is performing a general line scanning operation and is not involved on a particular call. The circuitry will not be fully described. Only the operation of the counter, Fig. 4 and Fig. 2 (not shown) and an on-off hook detector circuit will be outlined. The other circuitry comprises a digit steering circuit (Fig. 8, not shown) whereby the tens and units digits of a dialled number are directed to the required section of the counter; a station class circuit (Fig. 3, not shown) comprising bi-stable circuits for storing the class of the calling line; a register bid circuit (Fig. 3, not shown) for marking a lead subsequent to the receipt of digits by the register for accessing common control when it is next free; a register state control (Fig. 5, not shown) for controlling the scan, digit reception and identification scan states of the register; a tone control (Fig. 7, not shown) for causing dialling tone or busy tone to be provided via the onoff hook detector circuit to the calling line; and a register clear and call supervision circuit (Fig. 10, not shown) for ensuring the correct sequence of operation of the other circuitry and for causing the register circuit to return to a line scanning state when released from a call.  The counter circuitry.-The tens and units counter subsystems are identical and only the units counter is shown (Fig. 4). The units counter comprises a units four counter UFC and a units three counter UTC. When the counter is in its reset position gates XU and AU have HIGH outputs and all the other gates BU to DU and YU and ZU have LOW outputs. This causes capacitors CYU and CBU to be charged. Upon receipt of a pulse (see below) from a gate IUFC capacitor CUFC allows a short positivegoing pulse to appear at an input of each gate of the chain AU to DU. All gates in the chain then turn on momentarily but when the pulse is terminated these gates attempt to turn off. Since capacitor CBU is priorly charged, gate AU turned ON causes the capacitor voltage at the input of gate BU to go a few volts below - 24 V. This causes gate BU to turn off before gates AU, CU and DU and thereupon holds the latter gates ON. Hence the output of the units four counter has changed from HLLL to LHLL, and further pulses shift the high output one gate to the right. When gate DU turns OFF, output HIGH, the next pulse causes gate AU to have the HIGH output and gate YU in the unit threes counter to have a HIGH output. It can therefore be seen that the " units " counter steps from 1-12 before repeating itself. In this respect it is pointed out that the designation " units " for this counter and the designation " tens " for the other counter merely indicate the digits of a two digit number which the counters receive at a later stage of the call. During line scanning each of the two counters counts 12 pulses before repeating. On each 13th pulse the gate ZU causes the tens counter to step one. As this counter is identical it can be seen that 144 unique identities can be produced. To produce a sequential count a clock CLK is used to pulse the units counter via gates CDR and IUFC. During digit reception the clock is inhibited via line SCAN* and the steering circuit (Fig. 8, not shown) ensures that the first digit pulse train is directed via a gate (ITFC), corresponding to gate IUFC, to the tens counter. The second pulse train is directed via gate IUFC to the units counter. If the first digit received is 0, 1, 2, 3 or 4 the register circuit proceeds to an " all digits received " condition without awaiting a second digit. The content of the counter is read out to Common Control as a 14 bit code via lines (TCX-TCD) (Fig. 2, not shown) and lines UCX-UCD, four of the leads being HIGH and ten LOW. The on-off hook detector circuit: Fig. 6.-This circuit is connected with a calling subscriber via tip, ring and sleeve leads RLK, TLK and SLK which extend through the switching network SN. It comprises transistors QDPA and QDPB which are arranged as a differential pair across the leads TLK and RLK. When the register circuit is idle, leads TLK and RLK are open and transistor QDPB conducts and reverse biases the transistor QDPA to supply a LOW to the station on-hook gate SONH. The HIGH output of gate SONH holds ON the station off-hook gate SOFFH. When the circuit is connected to a calling subscriber, leads TLK and RLK are looped. The potential at the base of transistor QDPB rises and the potential at the base of tr