baber/WOPTO huggingface dataset:
Patent JP-2000328543-A (JP)
Title: Connection structure of board material to concrete structure, and embeded structure of board material for forming drainage groove into concrete floor
Inventor: OKUBO KAZUNORI
IPC: E03F5/04
Filed: 1999-05-24
Abstract: PROBLEM TO BE SOLVED: To enhance connection strength between concrete and board material so as to prevent separation of connection surface by forming a plurality of through holes for placed concrete at intervals at an extension flange of the board material in forming a concrete structure. SOLUTION: In connecting structure to connect a board P for forming a drainage groove to a concrete structure F, an extension flange 4 extending downward is bendwise integrated with an outer edge of a flange 3 of the board P, and a plurality of through holes (h) are formed at intervals in the flange 4. Accordingly, in a concrete placing step, the concrete can be flowed smoothly in an inner space of the flange 4 through the holes (h), thereby improving the connection strength between the concrete and the board, preventing separation of connection surfaces and prevent oxidization of concrete beforehand.
Patent JP-H11333228-A (JP)
Title: Gasket filter and its manufacture, and gas treatment
Inventor: FUJII ATSUHIRO
IPC: F16J15/06
Filed: 1998-05-25
Abstract: PROBLEM TO BE SOLVED: To allow a gasket filter to be structurally simple and not to be limited by a use position. SOLUTION: A gasket filter 10 is integrally composed of a central filter part 11 and a gasket part 12 enclosing that, and forms a disk-like shape. The filter part 11 is formed of a porous material such as a netlike metal (for example, a stainless steel) or the like, and constituted so as to be capable of filtering a highly pure gas to be used for manufacture of a semi-conductor device or the like. Though its thickness varies by a precision in filtration and a gas flow rate, the thickness is set at about 5 mm. Its diameter is set according to a diameter of a gas feed piping, and is, for example, an about 12 mm for 6.35 mm (1/4 inch) piping.
Patent JP-S5666913-A (JP)
Title: Current miller circuit
Inventor: OKADA TAKAFUMI
IPC: H03F3/343
Filed: 1979-11-05
Abstract: PURPOSE:To increase the accuracy and to make suitable the circuit for circuit integration, by enabling to determine the current ratio arbitrarily according to the emitter area or number of parallel transistors which are constituents. CONSTITUTION:Taking the current flowing to the current source as I1, I1 is the sum of the base current of a transistor Q3 and the collector of a transistor Q1. Further, the output current I2 is the sum of transistors Q3 and Q4. In this case, the collector current of Q3 is hfe times the base current of Q3, and since the base potential of Q1 and Q4 is common, the base current according to the emitter area or parallel number of transistors flows to Q1 and Q4, resulting that the collector current is also proportional. Thus, I1/I2 can be determined through the ratio of emitter areas or parallel numbers of Q1, Q2, Q3 and Q4. Since the Q2 is grounded, it acts like a path of the base current of Q1, Q4 and the response to high frequency can be increased more.
Patent JP-S5569015-A (JP)
Title: Turbine meter for steam
Inventor: KATAYAMA MASAYOSHI
IPC: G01P5/06
Filed: 1978-11-20
Abstract: PURPOSE: To increase the durability of steam turbine meter, by providing the wing wheel in the vapor duct and constituting the liquid bearing of the wing wheel through the use of liquid produced measured vapor.  
     CONSTITUTION: The steam fed from the tube 4 turns the wing wheel 9 and is exhausted to the tube 5. The number of passing wings of the wing wheel 9 is detected electrically with the pick up coil 20, and the flow and speed of steam can be measured with the electric pulse. A part of the steam exhausted in the tube 5 is fed to the condensor 15 via the through-hole 16 and stored in the tank 17 with being liquidized. Next, the steam is suctioned and pressed with the pump 18 and heated at the thermal exchanger 13 via the through-hole 14 and introduced at the hole 10 sequentially. The liquid introduced to the hole 10 is fed between the shaft 8 and the wing wheel 9 via the through-hole 11 acting like the liquid bearing. Thus, unnecessary substance is not mixed in the steam and the durability of turbine meter can be increased. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-H05309569-A (JP)
Title: Shotblast device
Inventor: FUJIMURA HIROYUKI
IPC: B24C9/00
Filed: 1992-05-08
Abstract: PURPOSE:To provide a shotblast device which can recover a projection material finishing the work, and can remove coarse particulates generated in a cabinet, in a simple mechanism. CONSTITUTION:A shot recovery pipe 5 is provided outside a cabinet 1, and the upper end of the shot recovery pipe 5 is communicated to a shot separating bank 3 provided at the upper side of the cabinet 1, while the lower side of the shot recovery pipe 5 and the bottom of the cabinet 1 are communicated through a chute 7, the shot separating bank 3 is communicated to a dust collector 9, and furthermore, an air intake port is provided at the upper position of the cabinet 1, so as to compose this shotblast device.
Patent JP-S624957-A (JP)
Title: Hydraulic controller for continuously variable transmission
Inventor: SAKAI YASUTO
IPC: B60W10/10
Filed: 1985-06-29
Abstract: PURPOSE:To obtain the sufficient line pressure by reducing the pump loss by obtaining the max. line pressure by reducing the oil discharge quantity of a solenoid valve to the min. in idling operation with the lowest pump efficiency. CONSTITUTION:A line pressurized oil passage 22 communicates with a reducing pressurized-oil passage 33, and further communicates with a solenoid valve 65 for controlling the line pressure. The solenoid valve 65 forms the reduction function which reduces the duty pressure as the duty ratio increases. Therefore, an oil pump having a small oil-pump capacity can be adopted by setting the line pressure to the max. by reducing the oil discharge quantity of the solenoid valve to the min. with the min. duty ratio in case of the max. speed change ratio such as in idling.
Patent JP-H0437367-A (JP)
Title: Data compression control method
Inventor: YATSUNO TADASHI
IPC: H04N1/41
Filed: 1990-06-01
Abstract: PURPOSE:To devise the method such that run length encoding and Huffman encoding are easily applied to a data after DCT operation in the case of applying DCT operation to the picture data for compression by storing the data being quantized picture data, dividing the data into bit planes from the MSB and the LSB bits and applying run length encoding and Huffman encoding to the data. CONSTITUTION:An input data is quantized by a Discrete Cosine Transform(DCT) computing element 3 for each block, the quantized data is stored in a conversion data memory 4, the stored data is divided into bit planes, data '1', '0' for each plane are encoded by a run length encoder 7, the data subject to run length encoding is encoded by a Huffman encoder 8 to compress the input data. The run length encoding and Huffman encoding for compression are easily implemented by adopting the method employing a binarization data resulting from DCT operation to the picture data.
Patent JP-S6036392-A (JP)
Title: Apparatus for pulling single crystal
Inventor: MATSUTANI KINYA
IPC: C30B15/30
Filed: 1983-08-05
Abstract: PURPOSE:To effect the growth of uniform single crystal, and to prevent the breakage of the crucible by thermal stress, by placing a magnet device to apply a magnetic field near the upper and the lower parts of the pulling surface of a single crystal, thereby suppressing the thermal convection at the upper part of the molten liquid and stirring the lower part of the liquid. CONSTITUTION:The objective single crystal pulling apparatus is composed of the main body of the pulling apparatus to pull up the seed crystal immersed in the molten liquid 1 of the raw material of the crystal to form the single crystal, and the magnet device to apply a magnetic field to the molten liquid 1. The magnet device is a superconductive magnet consisting of the magnet 28 to suppress the thermal convection near the boundary layer 6 between the solid and liquid interface of the molten liquid 1 and the magnet 29 to generate the rotary magnetic field to stir the part lower than the boundary layer 6. The magnet 28 is directed to generate the magnetic field perpendicular to the pulling direction of the single crystal, and the magnet 29 is placed to direct the magnetic field parallel to the pulling direction.
Patent JP-H04370481-A (JP)
Title: Switching valve
Inventor: NISHIGAKI MIDORI
IPC: F16K31/02
Filed: 1991-06-14
Abstract: PURPOSE:To reduce an amount of consuming fluid and to provide stable controllability of a fluid flow as the whole of a switching valve is prevented from complication. CONSTITUTION:An external port 4 is communicated with an internal space 2 of a casing 1, and external ports 5 and 6 are connected to a pair of internal flow ports 11 and 12 positioned facing each other in the internal space 2. A pair of seal bodies 25a and 25b to open and close the internal flow ports 11 and 12, respectively, and a spring 24 through the force of which the seal bodies are energized in the reverse direction to each other, are contained in a containing body 23 to form a valve body 26. By arranging the valve body 26 between the two internal flow ports 11 and 12, the valve body is supported by a plate-form piezoelectric element 19 such that it is switcheable to a neutral state wherein the two internal flow ports 11 and 12 are both closed, the first communicating state wherein the one internal flow port 12 is closed, and the second communicating state wherein the other internal flow port 11 is closed.
Patent JP-S5267416-A (JP)
Title: Secondary air feeding device of inner combustion engine
Inventor: OOTSUBO JIYOU
IPC: F01N3/10
Filed: 1975-12-01
Abstract: PURPOSE:To feed accurate secondary air amount removed by reburning unburnt noxious component exhausted from an inner combustion engine and to arrange dispersion of air pump discharge performance, ranging in a specified secondary air-fuel ratio.
Patent JP-H038356-A (JP)
Title: Gate array
Inventor: TANOI SATOSHI
IPC: H01L21/822
Filed: 1989-06-06
Abstract: PURPOSE:To improve degree of freedom in design by separating some of plural power source ground wirings into upper and lower parts, at the corner part of a semiconductor substrate, by the metallic wirings at the first and second layers, and forming them in parallel-run conditions. CONSTITUTION:At a chip corner 11a, GND wirings G11a and G11b, and G12a and 12b, and VCC wirings V12 and V12b are connected, respectively. Furthermore, at the corner part 11a, for the place where the VCC wirings V11a and V11b are cut since there is no allowance in space, they are connected with each other by VCC wiring 20 consisting of metallic wiring at the first layer. For that reason, cutting does not occur, between the VCC wirings 11a, V12a... and the GND wirings G11a, G12a..., at the corner part 11a, so it is not restricted by that, and VDD cells and GND cells can be formed at the positions of optional I/O cells 13-(n-1), 13-n, 14-1, and 14-2.
Patent JP-S5769582-A (JP)
Title: Memory element
Inventor: ODA YUKIO
IPC: G11C11/41
Filed: 1980-10-15
Abstract: PURPOSE:To improve the production control property against a defective chip at the state of a final inspection, by preparing in the chip a diode which is written electrically from the outside of a package. CONSTITUTION:A line address input line 1 becomes an input of a line address decoder 2, a row address input line 3 becomes an input of a row address decoder 4, and a word line 5 and a bit line 6 being each output select one memory element of a memory element array 7. At the time of a read-out operation, a chip selective line 10 is activated, and a write enable signal line 9 is passivated. At the time of a write operation, the line 10 and 9 are activated. The second upper rank address input line 13 and the uppermost rank address input line 14 are divided into each line and row address decoder selective line 16 and 17 by a dividing circuit 15, and control so that the memory array 7 is divided and used. In this case, an address is switched by adding a write enable diode element to one of the line 1, and utilizing its avalanche breakdown.
Patent JP-H09326200-A (JP)
Title: Nonvolatile semiconductor memory device and driving method therefor
Inventor: KATO ARIMITSU
IPC: H01L21/8246
Filed: 1996-06-06
Abstract: PROBLEM TO BE SOLVED: To recover data at the time of turning power on and also to compensate in accumulated charge by a refresh function in a memory having a ferroelectric capacitance at a gate part. SOLUTION: The electrode of one side of a ferroelectric capacitance element 1 is connected to the gate of an FET 2 and its connection part 4 is connected to a switching element 3 which is controlled by a control line CL and whose terminal of one side is connected to a potential imparting wiring DL. The electrode of other side of the capacitance element 1 is connected to a word line WL and the source and the drain of the FET 2 are respectively connected to a common potential line GL and a bit line BL. Readout is preformed by impressing a voltage by the bit line BL and by detecting a voltage change due to a drain current. Writing is performed by impressing a voltage between the bit line BL and the word line WL. Refreshing is performed by performing the readout/writing periodically.  At the time of turning power on, the data before power is turned off are discriminated by whether a polarization inversion is generated or not while impressing a voltage from the word line WL to the capacitance element 1.
Patent JP-H07325492-A (JP)
Title: Image forming device
Inventor: KOBAYASHI KENICHI
IPC: B65H29/70
Filed: 1994-06-01
Abstract: PURPOSE:To surely bring the sheet material in contact with a transfer drum without raising the electric attracting force of the transfer drum unnecessarily by providing a curl forming means for forming the curl oriented in the direction to be wound round the transfer drum with respect to the sheet material before reaching the transfer drum. CONSTITUTION:The paper feeding cassette 112 and the paper feeding tray 113 is severally provided with the curl forming means (112C and 113B) for forming the curl oriented in the direction to be wound round the transfer drum 105 with respect to the loaded sheet material S. At the time of reaching right upstream part of the transfer drum 105, the sheet material S transported from the paper feeding cassette 112 and the paper feeding tray 113 is respectively formed in a state of the upward curl oriented in the direction to be wound round the transfer drum 105. When the upward curl formed sheet material S is transported to the transfer drum 105, the sheet material leading end is grasped by the clipper 106, wound round the transfer drum 105 rotating in the direction of the arrow and electrically attracted to the transfer drum 105 by the attracting roller 107.
Patent JP-H11341087-A (JP)
Title: Clock reproducing circuit for four value fsk system
Inventor: ABE HIROAKI
IPC: H04L27/14
Filed: 1998-05-26
Abstract: PROBLEM TO BE SOLVED: To attain reduction of a clock pull-in time by oversampling reception data, detecting an opening part of an eye pattern and controlling the clock corresponding to its phrase. SOLUTION: An (m) phase generation circuit 9 generates (m) sampling signals of (m) multiple speed to a signal which indicates a cycle of an N/m frequency division circuit 7 generation data in every cycle and transmits them to a ϕ/m phrase selection circuit 10. The circuit 10 receiving this transmits the inputted (m) sampling signals to an VD converter 1 as they are when there is no selection signal input, and A/D converts them by oversampling of the (m) multiple speed. An optimal initial phase detection circuit 8 performs eye pattern opening part detection by its (m) multiple speed output signal, transmits the optimal initial selection signal to the circuit 10 by the optimal phase ϕ detection, selects a corresponding phase sampling signal among (m) sampling signals, and stops oversampling.  Thus, the clock is pulled in a phase within 2π/m at high speed with regard to the optimal initial phase.
Patent JP-H10333978-A (JP)
Title: On-board write control device and its method
Inventor: KOBAYASHI TAKAHIRO
IPC: G06F12/06
Filed: 1997-06-02
Abstract: PROBLEM TO BE SOLVED: To shorten the time to be required for the rewriting of a flash EEPROM. SOLUTION: The on-board write control device 2 receiving a control signal from a host computer 10 controls a selector 11. Thereby only one of plural I/O buffers 12 is selected and validated and a write control signal from a controller 6 is outputted only from the validated I/O buffer 12 to a user substrate 1 through a connector 4.
Patent JP-H09324546-A (JP)
Title: Unit building
Inventor: MAEDA MASAYO
IPC: E04B1/348
Filed: 1996-06-06
Abstract: PROBLEM TO BE SOLVED: To provide a building with a kitchen building unit having a kitchen table under an excellent mounting state. SOLUTION: A unit building has a kitchen building unit, to which a kitchen table is installed, and the framework structure 1 of the kitchen building unit is constituted in a box shape by columns 11, ceiling beams 12 and floor beams 13. Intermediate columns 14, 14 are mounted among the ceiling beams 12, 12 and the floor beams 13, 13 on both sides of the framework structure 1 respectively at that time, beams 15, 15 for a top plate are stretched among the opposed intermediate coins 14, 14 on both sides, the top plate of the kitchen table is placed on the beams 15, 15 for the top plate, and wall materials 2 for a kitchen are set up to the framework structure 1 in the periphery of the kitchen table.
Patent JP-H0241613-A (JP)
Title: Outlet box for electric bus-bar system
Inventor: JIYON DEBISU ANDAASON
IPC: H01R25/16
Filed: 1989-06-08
Abstract: PURPOSE: To facilitate the connection between contact blade tabs and a power takeout assembly, by aligning the contact blade tabs at a specified interval with the slots within a plug-in enclosure. CONSTITUTION: A bus conductor 11 is arranged within a continuous housing 14 consisting of a first side frame 15 and a second side frame 16. Contact blades 20-23 are welded to individual buses 12, and they project through slots 19 onto cross members 18 for coupling upright rails 17 on the first side frame 15 and the second side frame 16 constituting a bus part 10. The bus part 10 and a bus 12 are connected tightly by a stud bolt 9, at the bus part 10 where plug-in parts 7 and 8 are positioned. To electrically isolate the upright contact blades 20-23, a plug in enclosure 6 is arranged on the contact blades 20-23 by inserting a bolt 20 into a through hole 25 and a tapped hole 26.
Patent JP-H11340959-A (JP)
Title: Synchronization data transmission output controller and receiver
Inventor: YAMASHITA SEIICHI
IPC: H04L7/033
Filed: 1998-05-26
Abstract: PROBLEM TO BE SOLVED: To separate accurately a noise and a signal (data and synchronization clock) in the case of receiving high speed synchronization data by using an FSK receiver or the like. SOLUTION: A digital PLL circuit 16 separates data DATA and a synchronizing clock CLK from an input binary signal S2 and outputs them. However, a synchronization detection circuit 44 discriminates a synchronization state in response to a synchronizing state signal S3 outputted from a phase comparator 34 being a component of the digital PLL circuit 16 and makes a gate of a gate circuit 50 passed through only when the synchronizing state (so-called data link establishing state) is detected. Then an output control circuit 24 outputs the signal. Thus, when the output control circuit 24 outputs the signal, only the data DATA being the signal and the synchronizing clock CLK are outputted.
Patent JP-H021985-A (JP)
Title: Manufacture of semiconductor device
Inventor: TAKADA IKUNORI
IPC: H01L21/336
Filed: 1988-06-10
Abstract: PURPOSE:To obtain a semiconductor device which can be easily manufactured at a low cost by a method wherein not only a semiconductor region, possessed of a main current controlling function, is provided to one side of a breakdown strength retaining resistance semiconductor region, but also a low resistance semiconductor region and a semiconductor region of a conductivity type opposite to that of the high resistance semiconductor region are provided to the other side. CONSTITUTION:An N-type impurity is diffused into surface layer sections of both primary faces of a high resistance semiconductor mother material 1a to form low resistance semiconductor regions 7 respectively. After that, the underside of the semiconductor mother material 1a is abraded up to a position shown by a dotted line B, and a P-type semiconductor region 8 is grown on the above underside through an epitaxial growth. The upside of a high resistance region 1 is abraded up to a dotted line C so as to be as thick as required. The formed P-type epitaxial layer can be employed as a P-type semiconductor region 8 as it is, and a controllable range of the specific resistance and the thickness of the epitaxial layer by this method is extraordinary larger than that by a conventional epitaxial growth method, whereby a manufacturing cost can be remarkably reduced.
Patent JP-H039416-A (JP)
Title: Power supply control system
Inventor: OSANAI NAOTO
IPC: G06F13/00
Filed: 1989-06-07
Abstract: PURPOSE:To remove waiting time and to enable a supervisor to effectively utilize a time by automatically turning off the power supplies of computers arranged on side after ending the jobs of all terminals only by generating a specific instruction from a terminal equipment. CONSTITUTION:The host side is provided with a main computer 1 and two subcomputers 2, 3. Plural terminal equipments 41 to 46 are respectively connected to respective computers 1 to 3. When any one of power supply switches 11, 27 of the main computer 1 and the subcomputers 2, 3 is turned on, the power supplies of all the computers 1 to 3 on the host side are turned on, and when a power OFF switch 12 in the main computer 1 is turned on, the power supplies of all the computers 1 to 3 on the host side are turned off. A power OFF switch 28 in either one of the subcomputers 2, 3 is turned on, only the corresponding power supply circuit is turned off. Thus, the power supplies of all the computers on the host side are automatically turned off after ending all the jobs of respective terminals without waiting the host side supervisor only by generating a specific instruction from the terminal equipment to the host.
Patent JP-S631144-A (JP)
Title: Accounting control system for acoustic exchange
Inventor: KOGURE SADANORI
IPC: H04M3/22
Filed: 1986-06-19
Abstract: PURPOSE:To set an accounting device compact by at low cost normally connecting and transmitting accounting data from an automatic exchange to the accounting device, selecting and connecting either an auxiliary device or an auxiliary line and transmitting switching information at the time of receiving it. CONSTITUTION:A data switching device 6 is diposed between the automatic exchange 1 and the accounting device 4. Normally said device 6 connects accounting data from the automatic exchange 1 to the accounting device 4, and switches and connects to a line leading to a computer 5 according to switching information. There are heavy-load information from the automatic exchange 1, overload information of the accounting device 4 and test switching information as switching information. Accounting data transmitted to the computer 5 through the data switching device 6 is stored in the auxiliary storage device 52 being a temporary storage device and transmitted to the computer 5 through a computer interface circuit 51. The computer 5 calls a detail information storage device 43 in the accounting device 4 to transmit and record detail information which is accounting-processed and facilitates an output to a printing device 44.