Patent GB-1093221-A (GB)
Title: Improvements in or relating to decoding equipment
Inventor: FRENCH JAMES ALFRED THOMAS
IPC: H04Q3/62
Filed: 1963-02-18
Abstract: 1,093,221. Automatic exchange systems. HER MAJESTY'S POSTMASTER GENERAL. May 19, 1964 [Feb. 18, 1963], No. 6501/63. Heading H4K. Translating equipment comprises a number of input circuits, each representing an element of a code and each including a transistor 13, Fig. 1, driving a single input winding 11 on a respective magnetic core, e.g. 9. A number of output leads, e.g. code wire 9999, each representing a a decoded version of combinations of one or more code elements are threaded through the respective one or more code element cores and coupled to a threshold detector which includes transistor 15 which is biased so that it produces an output pulse only when all the input windings to which the output lead is coupled are energized. The cores may be arranged in an array to decode, e.g. four figure numbers, of which only the cores of 0, 1, 2, and 9 digits, and the drive circuits for the digits 9, are shown in Fig. 1. The inputs to the drive circuits may be a single pulse or a series of time spaced pulse trains, e.g. as described in Specification 1,034,921, and in order to make the threshold circuits common to a whole series of time spaced pulse trains, but to ensure that the detector output comprises only one of the pulse trains of the series at any time, a further core may be introduced for each pulse train in the' series of pulse trains, each further core being energized by a respective channel pulse via a drive circuit similar to that described above. Code wires of different groups but allotted the same pulse train are threaded through the core to which the appropriate channel pulse is applied, Fig. 2 (not shown). The digit cores in this arrangement may be driven with a long pulse embracing all the channel pulse or, preferably with a train of clock pulses each of which occurs within each of the channel pulse times. A modification of the translating equipment to allow all the lines to a P.B.X. number to be marked and tested in sequence until one is found free is shown in Fig. 3, in which a marking pulse is applied to lead 19 of a blocking oscillator 20 whose output is a long pulse of duration sufficient for the scanning of a whole block of groups of lines, e.g. in the exchange of Specification 1,034,921 which has 34 groups of 30 lines the duration is 3-4 milliseconds. The blocking oscillator pulse is applied to transistor 13 of the core drive circuit, which is also fed with a train of clock pulses, each of which occurs within a different one of the channel pulses and which is fed via a buffer amplifier 24 which supplies all the clock pulses. Marking is accomplished by applying pulses to the appropriate leads 19, of which only one is shown in Fig. 3, and the first pulse of the clock train which coincides with a channel pulse completes the switching of the digit cores coupled to the code wire of the circuit allotted the pulse trains with which coincidence has been established, and the circuit is indicated by the operation of the appropriate threshold detector. Reference has been directed by the Comptroller to Specification 845,506.