Patent GB-845337-A (GB)
Title: Improvements in data processing apparatus
IPC: G06F3/06
Filed: 1958-09-05
Abstract: 845,337. Electric digital-data storage apparatus. INTERNATIONAL BUSINESS MACHINES CORPORATION. Sept. 5, 1958 [Sept. 6, 1957 (2)], No. 28591/58. Class 106 (1). Words are transferred one at a time from a high-speed data store to a sense register adapted to contain a word and back to the store under the control of selected addressing circuit, a digit selecting means being effective whilst each of the words is in the sense register to cause a selected character of the word to be transferred to a lower speed data store. As shown, the invention is embodied in the data processing machine of Specification 800,273 and includes a high-speed store 6, magnetic tape units 24, 25 and a calculator 22 in which the store is a magnetic drum. The store 6 is a core storage array for 1000 11-character words, each character being represented by a two-out-of five code, and has associated with it X and Y core drivers, and " inhibit drivers " for supplying data to the store. A three-digit number represents the address of any word in the store 6 and this is fed on line 34 to a decoder 33 which selects the appropriate X and Y drivers. The word selected is transferred in parallel to a sense register 7 from where it may be regenerated in the store via line 8, switch 36 and inhibit drivers 38. A clock 35 controls the readregenerate cycle. Channel 34 is fed from four sources through switches 54 to 57 and mixer 45, address rings 51 to 53 and translator 23. Address ring 51 is associated with the calculator 22, rings 52, 53 with the tape units 24, 25, respectively. Translator 23 is connected to one output 105 of an address register of the calculator which is described in Specification 800,273. The rings 51 to 53 are latch rings, each comprising three ten-position rings from which the outputs taken in parallel represent a threedigit number. The rings are advanced by pulses from AND circuits 66 to 68. With each register is associated a " set start " circuit, a stop register, and a start-stop store. A stop coincidence circuit 86 is also provided. The " start start " circuits each comprise a diode switching arrangement which takes input data from line 14 in the form of a two-out-of-five code and translates it to a representation of three decimal digits, and which sets the ring at a required address. The stop register is a latch store for the number at which the ring is to stop. The stop coincidence circuit 86 is fed from the stop register and line 34 and coincidence of signals on these lines prevents emission of a pulse to the appropriate input of AND circuits 66 to 68. Data appearing on line 14 is passed to a validity check circuit 132 which determines that a word is complete and that each character is valid. When it is required to store the start and stop addresses of a ring the start-stop stores are used to insert valid characters in the five remaining positions of the word after the addresses have been inserted, and to feed the word to line 14. It is then stored in the core array 6 at the address selected by the calculator address register. The calculator has two input and output channels, the output being by switches 101, 102 to line 14, the input by switches 96, 97 from line 29. Data is transferred between the core storage array and the calculator by way of the one word register 18 and the staticizer 19 or dynamizer 21. Tape units 24 and 25 with associated registers 133, 134 acting as temporary stores are connected in a circuit whereby data is transferred between the core storage array and the tape units which comprises digit selection and digit insertion units 26, 28, respectively connected to the output and input of the sense register 7, with translators 135, 136 rendering the signals between the units 26, 28 and the tape units compatible. The units 26, 28 are under the control of digit address rings 141, 142. To transfer a word from core storage to tape 24, address ring 52 set at the required address and the word is transferred from storage to sense register 7 and to digit selection unit 26 by line 178 from where a digit or character is removed as selected by a digit ring, e.g. 141. After this has been done the word is regenerated in the core storage array while the character is transferred to tape. The process is repeated and a second character is selected, and transferred to tape, and so on until all eleven characters have been transferred when completion of cycle by digit ring 141 serves as an advance signal to address ring 52. Transfer of data to both tapes may occur consecutively. Thus while a word is in sense register 7 and a character is being selected by unit 26 for transfer to tape unit 24, address ring 53 may be selecting a storage location of a word which is to be transferred to tape unit 25. Additionally a word may be stored in the one word register for transfer to calculator 22. Specifications 710,554 and 768,183 also are referred to.