Patent GB-1270064-A (GB)
Title: Magnetically operable semiconductor device
IPC: H01L29/82
Filed: 1970-09-11
Abstract: 1,270,064. Semi-conductor devices. MITSUBISHI DENKI K.K. 11 Sept., 1970 [11 Sept., 1969; 31 Oct., 1969; 16 Dec., 1969], No. 43567/70. Heading H1K. In a magneto-sensitive transistor or SCR a current flowing in the base region between two ohmic contacts is deflected by an external magnetic field due to the Hall effect so that at some point the bias across the emitter junction is varied. As shown, Figs. 2 and 3, a transistor comprises a P-type emitter region 72, an N-type base region 66, and two P-type collector regions 62, 64 formed in an N-type substrate 60. The emitter region 72 is in the form of a strip the ends of which overlie the collector regions 62, 64, and two ohmic base contacts 76, 78 are provided extending parallel to the emitter electrode. In operation a current flows between the two base contacts passing beneath the emitter region which is connected to a voltage source selected so that substantially zero bias appears across the emitter junction. When a magnetic field is applied in a direction perpendicular to the plane of the drawing the current in the base region is deflected due to the Hall effect so that at one end of the emitter region the electron concentration is increased forward biasing this part of the emitter junction while at the other end of the emitter region the electron concentration is decreased reverse biasing this part of the emitter junction.  The forward biased part of the junction injects minority carriers which are collected by the corresponding collector region. The device operates as if it comprises a Hall plate with the Hall electrodes connected to the bases of two transistors, the output at terminals 20, 22 being the amplified Hall voltage. The emitter region 72 may be forward biased in the absence of a magnetic field. The following structural variations are described, the emitter region is divided into two discrete parts connected to a common terminal, Fig. 5a, 5b (not shown), one of these discrete emitter parts is replaced by an ohmic contact and the two collectors are merged to form a single collector region, Fig. 6a, 6b (not shown), and a single collector transistor is provided with two emitter regions from which the outputs are taken, Fig. 7a, 7b (not shown). As shown, Fig. 8, an SCR includes an upper emitter region 86, the adjacent base region 84 having two ohmic contacts 76, 78 between which a current flows which when it is deflected by a suitably poled magnetic field forward biases emitter junction 92 to fire the SCR. In a second embodiment, Fig. 10 (not shown), the upper emitter region (86) is formed as a strip extends across the base region (84) through which the current flows between ohmic contacts (76, 78). The lower base and emitter regions (82, 80) are formed as strips at one edge of the wafer extending perpendicularly to the upper emitter strip. When the current between contacts (76, 78) is deflected towards the end of the emitter region overlying the regions (82, 80), this part of the emitter junction is forward biased and the SCR fires. In a modification of this embodiment a mirror image of the lower base and emitter regions is provided at the opposite edge of the wafer to form in effect two SCRs which are selectively fired by the deflection of the base current by oppositely poled magnetic fields, Fig. 11 (not shown). This device may be further modified by dividing the upper emitter region into two discrete portions, Fig. 12 (not shown). The devices may be produced by the planar process or may utilize a Schottky barrier as one of the rectifying junctions, and may involve diffusion, epitaxial, growth and alloying. The semi-conductor material may be Si, Ge or a III-V compound.