Patent GB-676672-A (GB)
Title: Improvements in or relating to electronic counters or accumulators for use in digital electric calculating apparatus
IPC: G06F7/50
Filed: 1950-09-19
Abstract: 676,672. Digital electric calculating apparatus. REMINGTON RAND, Inc. Sept. 19, 1950 [Sept. 21, 1949], No. 23022/50. Class 106 (i) A reversible accumulator for addition and subtraction comprises a series of electronic digit-representing trigger stages, a corresponding series of switching stages each containing an addition triode and a subtraction triode, the control electrodes of which are connected to the normally non-conducting anodes in the corresponding trigger stages, a control circuit for biasing the control electrodes of the switching stages to selectively send an operating pulse through the addition triode or the subtraction triode, and connections between the addition anode of each switching stage and the next higher-valued trigger stage, and between the subtraction anode of each switching stage and the next lower-valued trigger stage, respectively. Trigger stages A1, A0, A2 ... A8 are arranged to form a bi-quinary code decimal counter, " one "-value pulses being fed in over line 18 and " two "-value pulses over line 20 as described in Specifications 665,707, 665,714 and 675,607, which are referred to. The operation of a switch 21 determines whether the entry shall be additive or subtractive; for addition the L.H. grids of the double-triode switching stages S1, S0, S2 ... S8, SC are biased to - 75 v. and the R.H. grids to - 20 v., and for subtraction these conditions are reversed. An example described in the Specification illustrates the operation of the accumulator. Suppose the number 25 to be registered by reversal from the normal state (which is L.H. side conducting) of trigger stages A1, A4 in the " units," and A2 in the " tens," and the number 7 is to be subtracted. With the switch 21 in the " minus " position, the 7 will be represented by a " one "-value pulse arriving at the " units " order on line 18, followed by three " two "-value pulses on line 20. The " one "-value negative pulse being applied to both grids of A1 restores this stage to normal, and a positive pulse from the R.H. anode and a negative pulse from the L.H. anode have no effect on the grids of the switching stage S1 in view of the bias voltages applied via the switch 21. The first " two " value negative pulse over line 20 is applied to all the R.H. grids of triggers A0 ... A8 but since A4 is the only trigger in the reversed state, this stage alone responds and, in returning to normal, a positive pulse passes over line 24 to be applied to both grids of the double-triode switching stage S4. The - 20 v. bias on the L.H. grid is overcome and a negative pulse from the L.H. anode passes along line 30 to be applied to the R.H. grid of A2, reversing this stage. In a similar manner the second " two "- value pulse restores A2 and reverses A0. The third " two "-value pulse restores A0 and a positive pulse from its R.H. anode passes over line 40 to S0, causing conduction of the L.H. half and a negative pulse over line 46 which transfers A8. The positive pulse on line 40 is also applied to the L.H. grid of double-triode SC and conduction of the L.H. side causes a negative pulse on line 37 which reverses stage AC. The rise in potential of the L.H. anode lights a neon 39 and thereby sends a signal to the carry impulse generator that a carry is to be made from the next higher order. Subsequently a pulse from the generator arriving over line 42 returns the stage AC to normal and a positive pulse over line 43 goes to the buffer amplifier stage B in the next higher order via line 44. This causes a negative pulse at the anode equivalent to a " one "-value pulse on line 18. In a modification, the negative pulses from the quinary switching stages are applied to the anodes instead of the grids of the counter stages, thus eliminating six resistances and six capacitances.