Patent GB-827666-A (GB)
Title: Improvements in or relating to circuits embodying semiconductive electrical memory elements
IPC: G11C19/28
Filed: 1956-12-04
Abstract: 827,666. Pattern movement stepping registers. PHILIPS ELECTRICAL INDUSTRIES Ltd. Dec. 4, 1956 [Dec. 7, 1955], No. 37039/56. Class 106 (1). [Also in Group XL (c)] In a circuit in which free charge carriers are established in a semi-conductor diode 4, Fig. 1, to provide a memory a clock pulse K 2  is effective to produce a current pulse which passes through a further diode 11 and the base zone of a transistor 2 to establish free charge carriers in the base zone thereby providing a further memory, while a second series of clock pulses K 1  operates in the collector-emitter circuit. Assuming a negative-going pulse to have been applied to the base of transistor 1, free charge carriers are established in the base zone so that the next clock pulse K 1  causes a pulse of current to pass through resistor 6. Since the emitter of the transistor goes negative, a current pulse will pass through semi-conductor diode 4 and resistor 9, establishing free charge carriers in the diode 4. The next clock pulse K 2 , although in the reverse sense of the diode 4, is effective, due to the charge carriers to pass a pulse through the forward direction of diode 11 and the basecollector path of transistor 2 to establish free charge carriers in the base zone. The next clock pulse K 1  is effective in transistor 2 to commence the next cycle similar to that which has occurred with respect to transistor 1. Since all the charge carriers are not necessarily swept out by the clock pulse K 1 , the pulses are differentiated by capacitor 15 and resistor 16 and fed over isolating diode 17, 18 to the bases of the transistors 1, 2 to sweep out any residual charge. The charge on transistor 1 is progressed through the circuit by the clock pulses K 1 , K 2  or alternatively a pattern may be set up on the transistor chain and stepped on by the clock pulses. The circuit may operate as a ring counter by connecting the output back to the input of the circuit. In a modification, Fig. 2, assuming a charge has been established in the base region of transistor 21, a clock pulse K 1  is effected to cause conduction in the emitter-collector path sufficiently that the emitter remains at substantially earth potential with the result that no current passes through the semi-conductor diode 23. The next clock pulse K 2  is fed over resistor 29 to the diode 23 which presents a high impedance so that current flows through isolating resistor 31 and diode 32 to establish free charge carriers in the base zone of transistor 22. The following clock pulse K 1  recommences the cycle with respect to transistor 22 which has previously occurred with respect to transistor 21. If there is no charge on the base of transistor. 21 the clock pulse K 1  does not render the transistor conducting and current flows through resistors 25, 27 and diode 23 to set up free charge carriers in the diode. The next clock pulse K 2  is therefore able to pass through diode 23 which presents a relatively low impedance so that a negligible current passes through the base region of transistor 22 and no charge carriers are established. In a further modification, Fig. 3, a transistor 31 and semiconductor diode 34 are combined to form a ring counter. Assuming free charge carriers in the base region of transistor 31 the clock pulses K 1  cause current to flow in the emitter-collector path so that a potential is established across resistor 32 and current flows through the diode 34 and resistor 33 to establish free charge carriers in the diode 34. The next clock pulse K 2  is effective to pass current through diode 34, diode 35 and the base region of transistor 31 to establish charge carriers there so that the circuit is restored to its original condition.