Patent GB-949728-A (GB)
Title: Voice frequency selecting system
IPC: H04M1/50
Filed: 1961-09-29
Abstract: 949,728. Automatic exchange systems; ferro resonant circuits. STANDARD TELEPHONES & CABLES Ltd. Sept. 29, 1961 [Sept. 30, 1960], No. 35251/61. Headings H3B and H4K. In an automatic telephone system in which selection is carried out in a subscriber's set by means of a keysender which controls one or more voice frequency generators, the outputs of which are transmitted to the central exchange and in which the subscriber's set is permanently supplied with D.C. from the central exchange, means are provided in the sub-set for varying the value of the D.C. flowing through the set from the exchange between one or other of two values according as to whether the set is (a) " on-hook " or " off-hook " and making a selection of voice frequencies or (b) off hook and before or after selection or in conversation. During the V.F. signalling the receipt of the V.F. signal holds the connection to a register despite the " on-hook " D.C. condition. The subscriber's set circuit, the circuit for decoding the V.F. signals, and a register utilizing ferro resonant multi-stable circuits to store the selection made, are described, the manner in which the connection is made being as described in Specification 815,767. Subscriber's set.-This is shown in Fig. 4 in the off-hook condition. For an incoming call a V.F. signal is received from the exchange, amplified by transistor 110 and fed to the 'microphone 103 which in this case acts as a loud-speaker. On reply the hook switch bridges resistor 108 across the line to signal offhook to the exchange. For an outgoing call the off-hook contacts bridge 108 across the line to provide a D.C. calling signal. When a digit selecting button is depressed contacts such as 106 select resonant circuits for the transistors 131, 132 to cause the digit to be sent in a 2 out of 5 frequency code. The push-button unshorts resistor 118 to reduce the sensitivity of the earpiece and at the same time gives the on-hook D.C. signal to the exchange. Exchange equipment.-The subscriber's line circuit is connected via a link to a register as described in Specification 815,767 separate paths being provided for the D.C. and A.C. signals which appear over lead 42 and pair 45, 46, Fig. 7, respectively. The V.F. selecting signals are amplified and rectified in circuits 62-1 to 62-5 and fed to a decoding matrix to provide an output on one of the leads 60-0- 60-9, these outputs are inhibited by the off-hook signal on lead 42 to prevent false operation by speech signals &c. The rectifier matrix also inhibits a D.C. output on lead 44 during the receipt of the V.F. signals to hold the register circuit (by means not shown). The output on line 44 and the output on one of lines 60-0 to 60-9 are fed to the register-storage circuit, Fig. 6, which converts the serial selecting signals to parallel form. Ferro resonant storage circuit, Fig. 2, is a circuit illustrating the basic principle of operation of a ferro resonant storage circuit and comprises a series circuit of capacitor 902 and the secondary of transformer 901 which is resonant at the frequency of supply to terminals 91a and 91b when the core of transformer 901 is saturated, the core is triggered to its saturated state by a pulse of D.C. across the primary coil of transformer 901 and is maintained saturated by the resonant current. The output is taken from across capacitor 902, rectified and appears across terminals 91a and 92b. A multi-stable storage circuit comprises a number of such circuits fed from a common source of such an impedance that only one circuit can be maintained saturated at any one time, switching from one stable state to another being achieved by applying a pulse of D.C. to the appropriate winding. Two such multi-stable circuits are shown diagrammatically at 501 and 521 in Fig. 6, 521 having four stable states corresponding to the 3 " tens " digits for a thirty line exchange plus a reset state provided by 521-R; storage circuit 501 having 12 stable states corresponding to the ten units digits, a reset state and a state concerned with inhibiting the " unit " storage during transmission of the tens digit. In operation, stages 501-R and 521-R are initially triggered. The output of 521-R enables stages 521-0 to 521-2 so that a signal appearing on one of the lines 60-0 to 60-2 will trigger the appropriate stage. In addition, the voltage V2 on transistor 504 via diode 529 in a gate circuit inhibits the output of the storage circuit; and via diode 503 inhibits stage 501-T, an output from which, via transistor 510, is necessary to " enable " the stages 50-0 to 50-9, thus preventing the " tens " signal on one of lines 60-0 to 60-2 from triggering a " units " stage. After receipt of the " tens " signal, and the consequent triggering of the appropriate one of stages 521-0 to 521-2, the absence of output from stage 521-R inhibits, via transistor 504, stages 521-0 to 521-2 from receiving further triggering signals, sets up one of the inputs to the gate controlling the storage circuit output signals, and " enables " stage 501-T via diode 503 so that the D.C. signal appearing on line 44 and corresponding to the release of the selecting button between selections at the subscriber's set, will trigger stage 501-T the output from which, via transistor 510, disables the storage circuit output via diode 527 and " enables," via resistor 513 and diode 514, the units storage circuits so that the following selecting signal on one of lines 60-0 to 60-9 triggers the appropriate stage 501-0 to 501-9. The consequent cessation of output from stage 501-T when one of the other stages is triggered switches transistor 510 and sets up via diode 527 the second input to the gate controlling the storage circuit output. The release of the selecting key by the subscriber sets up the third input to the output circuit gate via line 44 and diode 528, thus switching transistor 515 and energizing lines 53 and 54 so that signals are fed via the triggered stages to the decimal convertor where the signals appearing on one of lines 51-0 to 51-2 and one of lines 50-0 to 50-9 are converted to a signal appearing on one of thirty lines which is used to set up the appropriate link between the caller and called subscribers. The signal appearing on transistor 515 is also delayed in delay unit 531 to trigger stages 501-R and 521-R to reset the storage circuits after the connection through the link has been established.