Patent GB-692983-A (GB)
Title: Improvements in or relating to methods and devices for decoding groups of coded electric pulses representing a signalling wave
Inventor: PAGES ANDRE PAUL
IPC: H03M1/00
Filed: 1952-03-21
Abstract: 692,983. Pulse code modulation circuits; pulse coincidence circuits. SOC. ALSACIENNE DE CONSTRUCTIONS MECANIQUES. March 21, 1952 [April 16, 1951], No. 7396/52. Classes 40 (v) and 40 (vi). Relates to decoders for pulse signals comprising groups of n-binary digits, each group representing a modulating signal level and being taken from a series of 2<SP>n</SP>+(n- 1) digits, such as 0001110100, when n=3. Each received group is stored and compared progressively with the pulses of the series from which it is taken, the time at which coincidence occurs being represented by a pulse which is thus one of a train of time-modulated pulses which is demodulated by known means. As described, a 3-unit code is used and each incoming pulse group at terminal 401, Fig. 4, is distributed along the delay line 402, 402<SP>1</SP>, 403, the digits being stored respectively in circuits 404, 404<SP>1</SP>, 404<SP>11</SP>. A synchronizing signal is selected in circuit 428 to control the pulse generator 405 which supplies pulses at group recurrence frequency from circuit 406 to restore the storage circuits 404, 4041, 404<SP>11</SP> at the end of each decoding operation. Circuit 405 also supplies from the cathode-ray tube generator 408, of the type described in Specification 661,808, a series of pulses representing the binary series 0001110100, from amplifier 409, and a continuous series of pulses coinciding with the digits of the other series, from amplifier 410. The latter are applied to the suppressor grid 420 of the coincidence valve 415. The code series are applied to the delay line 411, 411<SP>1</SP>, 412, where they are displayed in successive groups of three, the elements of which are applied through amplifiers 413, 4131, 413<SP>11</SP>, to the comparator circuits 414, 4141, 414<SP>11</SP>. The latter are fed also with the stored pulses from circuits 404, 4041, 404<SP>11</SP> and their outputs are connected in parallel to the control grid 417 of the coincidence valve 415. The comparators give an output, which cuts off valve 415, if their two inputs are not the same. When the group of pulses displayed on the line 411, 411<SP>1</SP>, 412 coincides exactly with the stored pulses, none of the comparators gives an output, so that valve 415 is opened to allow the pulse on its suppressor grid to pass to the demodulator 426 for time modulated pulses, the recovered modulating signal being available at terminals 427. Each comparator circuit comprises a bridge of resistances 303, 303<SP>1</SP>, Fig. 3, and rectifiers 304, 3041 connected back-to-back. The two voltage sources 301, 301<SP>1</SP> to be compared, are connected in opposition across one diagonal of the bridge and the grids 307, 307<SP>1</SP> of the double-triode valve 305 are connected to the other corners of the bridge. The anodes 309, 3091 have a common H.T. source 310, the anode 309<SP>1</SP> having a load resistance 311, while the cathodes are earthed through a common resistance 306. When the two inputs are identical, the bridge is balanced and there is no voltage difference between the grids 307, 307<SP>1</SP>. Otherwise the resistances of rectifiers 304, 304<SP>1</SP> take different values, the bridge is unbalanced, a voltage appears between grids 307, 307<SP>1</SP> and the current in resistance 311 changes to give an output through condenser 312.