Patent GB-986493-A (GB)
Title: Improvements in frequency discriminators
Inventor: BALDWIN JOHN LEWIS EDWIN
IPC: H03K9/06
Filed: 1960-10-03
Abstract: 986,493. Frequency discriminators. RANKBUSH MURPHY Ltd. Sept. 28, 1961 [Oct. 3, 1960], No. 33829/60. Heading H3A. A frequency discriminator comprises a first and second switching device operable simultaneously, by first control signals derived from input signals to the discriminator to allow current to pass from the input of one or other switches to a common output circuit and a third switch device operable by second control signals derived from the input signals with a phase displacement with respect to the first control signals dependent on the input frequency, to allow current from a source to flow alternately to the inputs of the first and second switches, whereby the mean output circuit current is a predetermined function of the input signal frequency. In Fig. 1, a carrier wave frequency modulated, e.g. by a square waveform, is applied antiphasedly to the grids of triodes 1, 3 and 2, 4 respectively; the anodes of 1, 4 and 2, 3 having common resistors and producing antiphased outputs while cathodes of 1, 2 and 3, 4 are respectively interconnected to ground through triodes 5, 6 whose cathodes are grounded through resistors 8, 9 and interconnected by capacitor 7 of negligible reactance while their grids are respectively energized from the antiphased inputs over matching resistors 10a, 10b and identical linear delay lines 13a, 13b arranged to produce 90 degrees phase shift at such input frequency as corresponds to the output level required when the input signal amplitude falls to zero. Triode pairs 1, 2 and 3, 4 constitute first and second switch devices operated by first input control signals whereby current may pass from their common cathodes to their respective output circuits, while triodes 5, 6 constitute a third switch device operated by second control signals phase displaced from the first control signals by an angle dependent on input signal frequency to allow current to pass to the first and second switch devices from the supply. Variation of the bias potentials of the triodes of each pair enable the no signal output level to be set to correspond with an input frequency producing other than a 90 degrees phase shift in the delay lines. The outputs at terminals 16 and 18 vary repetitively with input frequency over a range which is a function of the line delay time T with minimum at 16 and n maximum at 18 forf = - where n is an integer, T mean of the extreme output values for # = 4n+1/4T, maximum   at 16 and minimum at 18 for # = 2n+1/T (Fig. 3). A circuit waveform diagram is given (Fig. 2, not shown). In a modification (Fig. 4) the antiphased input signals are applied to the bases of PNP transistors 31, 32 whose emitters are connected over load resistors to ends of grounded top potentiometer 30 so that the transistors are alternately cut off and conductive. The emitters are also capacitance coupled to the common emitters of first and second pairs of PNP transistors 37, 39 and 38, 40 having respective common emitter resistors 41 and 42 returned to the junction between potentiometer 30 and resistors 34, 33. The collectors of 37, 38 and of 39, 40 are respectively interconnected in pairs and resistor coupled to outputs 43, 44 and the input signals to the circuit are also connected respectively over matching resistors 23, 24 and delay lines 25, 26 to the bases of transistors 37, 40 and 39, 38. The latter transistor pairs may be balanced by varying D.C. bias voltages on 21, 22. The mark/space ratio of the output pulses is adjustable by potentiometer 30 and varies with the input frequency so that the integrated output varies linearly with input frequency. A circuit waveform diagram is given (Fig. 5, not shown). The output level for zero amplitude input of a television frequency modulated signal may be chosen to correspond to picture black level.