Patent GB-802196-A (GB)
Title: Improvements in or relating to pulse counting circuits
IPC: H03K21/00
Filed: 1956-11-19
Abstract: 802,196. Electronic counting - apparatus. WESTERN ELECTRIC CO., Inc. Nov. 19, 1956 [Dec. 12, 1955], No. 35283/56. Class 106 (1). [Also in Group XXXIX] In a counting circuit a ferro-electric capacitor delivers quantized pulses to an integrating capacitor, which may be a second ferroelectric capacitor driven to saturation in a number of steps, the integrating capacitor being discharged over a diode to be reset to its datum state after receiving a given number of quantized pulses. As shown in Fig. 1, a negative pulse from alternating pulse source 10 drives ferro-electric capacitor 12 to one state of saturation over diode 14 while a positive pulse drives the capacitor to its other state of saturation and in so doing delivers a quantized charge to integrating capacitor 16 over diode 15. Transistors 24 and 26 in a flip-flop circuit are normally non-conducting and conducting respectively, so that diodes 22 and 23 connected to capacitor 16 are biased against conduction. During the nth quantized pulse delivered to capacitor 16 its potential rises above the bias on diode 22 and applies a positive potential to the base of transistor 24 causing it to conduct. A pulse from the collector of transistor 24 over capacitor 32 is applied to the base of transistor 26 which in consequence ceases to conduct. With transistor 24 conducting point 30 falls from a positive to a negative potential and discharges capacitor 16, removing the positive potential from the base of transistor 24 which stops conducting, and re-establishing conduction in transistor 26. On receipt of every nth positive pulse, therefore, the integrating circuit is reset and complementary pulses produced on terminals 40, 41. An arrangement shown in Fig. 2 uses a ferro-electric capacitor 50 as an integrator which is driven to saturation, and consequently high impedance, by n quantized pulses from a ferro-electric capacitor 45. Initially a negative pulse from source 44 reverses the saturation of capacitor 45 delivering a quantized charge to capacitor 50 over double anode Zener diode 49 which presents a voltage threshold to conduction in both directions. At the same time a ferro-electric capacitor 52 is reversely polarized over double anode Zener diode 54. A subsequent positive pulse resets capacitor 45 over diode 48, which protects the charge on capcitor 50, but has no effect on capacitor 52 as diode 77 and conducting transistor 58 by-pass the pulse to ground. Subsequent negative pulses reverse capacitor 45 to add a quantized charge to capacitor 50 until the nth such charge drives capacitor 50 to saturation and a pulse over double anode Zener diode 56 fires transistor 57, which, over capacitor 65, fires transistor 60 and by means of capacitor 69 extinguishes transistor 58. With transistor 58 non-conducting diode 77 is back-biased and the next positive pulse from source 44 switches capacitor 52 as well as 45 and in consequence switches the polarization of integrating capacitor 50 back to its datum state. Renewed conduction of transistor 58 applies a negative pulse over resistor 70 to extinguish transistor 60 and returns the circuit to its initial condition. In a third arrangement (Fig. 3, not shown), a ferroelectric integrating capacitor is reset by the positive pulse following the nth negative pulse from source 44, saturation of the integrating capacitor triggering a bi-stable transistor pair into one state to switch the reset positive pulse on to the capacitor, and the pulse produced when the capacitor is reset triggering the transistor pair back to the initial state.