baber/WOPTO huggingface dataset:
Patent JP-H0289345-A (JP)
Title: Gate array device incorporating level shift circuit
Inventor: HASHIMOTO MASAMI
IPC: H01L21/822
Filed: 1988-09-27
Abstract: PURPOSE:To enable signal of device of different power supply systems to be received and signal needed for drive to be output by incorporating a level shift circuit and providing a third power supply wiring with a third potential. CONSTITUTION:An input terminal 26 of input signal entered from the outside of a gate array device is connected to an input terminal 46 of a level shift circuit, an output terminal 47 of the level shift circuit is connected to an input terminal 27 of an inverter circuit consisting of MOSFETs 24 and 25, and an output terminal 28 of the inverter circuit consisting of the MOSFETs 24 and 25 is fed to a group of basic cells. At this time, the input signal 26 has been a signal of power supply system E1 but is converted into a signal of E2 power supply system through a level shift circuit 23, thus enabling a circuit of gate array device with a group of basic cells operating in the E2 power supply system through the inverter circuit of E2 power supply to be operated without trouble. Both E1 and E2 power supplies exist at an input circuit located between an alternate long and short dash line 21 and an alternate long and two short dashes line 22.
Patent JP-H0290233-A (JP)
Title: Translation processing system
Inventor: HANAKADA KYOKO
IPC: G06F9/45
Filed: 1988-09-27
Abstract: PURPOSE:To simplify translation processing by retranslating each translation unit which can not be translated because the definition information of common information to be referred is not formed. CONSTITUTION:A retranslation processing means 13 selects retranslatable translation units 21, 23 with translation order restriction out of reference information lacking translation units 21, 23, 27 and checks dependence relation between the reference of common information B1 and C1 included in the unit 21, and the definition of common information C1 and the reference of common information E1 included in the unit 23. The translation order is exchanged so that the unit 23 is translated prior to the unit 21 and the retranslation of the units 23, 21 under the translation order of the units 23, 21 is instructed to a translation processing means 11. Consequently, it is unnecessary for a user to be conscious of the translation processing order of the translation units, write a source program 2 and specify the translation order to a compiler 10.
Patent JP-S6483484-A (JP)
Title: Fuel tank device for scooter type car
Inventor: YOKOYAMA MASAFUMI
IPC: B62J7/00
Filed: 1987-09-25
Abstract: PURPOSE: To enlarge capacity of a fuel tank, and achieve a low gravity center of a car body by disposing the fuel tank under a foot rest surface, forming an upper wall of the fuel tank as a forward-down inclination surface to be close to the foot rest surface, and disposing a fuel injection port at a back part of the foot rest surface. CONSTITUTION: A seat placement part 5 is formed at a back part of a car body B to cover a frame F, and a container 4 is contained in the seat placement part 5. The container 4 is formed to cover an upper surface of a power unit P, a helmet H is contained in it, and a seat 6 is provided on an opened upper surface of it to be freely opened/closed. A foot rest surface 7 is formed at a front part and on both sides of the seat 6 in the car body B, and a fuel tank T is disposed between right and left pipes 8 of the frame F on the lower part of the foot rest surface 7. An upper wall 12 of the fuel tank T is formed as a forward-down inclination surface to be close to the foot rest surface 7, and a fuel injection port 13 is disposed at a back part of it.
Patent JP-S62100854-A (JP)
Title: Communication system between host and terminal
Inventor: SAITO YUKIO
IPC: G06F13/00
Filed: 1985-10-28
Abstract: PURPOSE:To omit the need to change the system generation when the real terminal constitution is changed by setting previously a virtual terminal having the 1:1 correspondence secured between a host and an application program and connecting the virtual terminal to a real terminal with the designation of the application program sent from the real terminal. CONSTITUTION:The dynamic correspondence is secured between virtual terminals 31-34 and real terminals 41-49 via a switch means 35. When the real terminal 41 delivers a telegram indicating an application program AP2, a relay processor 30 checks the using condition of the virtual terminal corresponding to the program AP2. If said virtual terminal is idle, it is connected to a real terminal. Thus a communication path is secured and the real terminal performs the processing by means of the program AP2.
Patent JP-H04120928-A (JP)
Title: Dsi device
Inventor: SHIOKA MASAFUMI
IPC: H04J3/17
Filed: 1990-09-12
Abstract: PURPOSE:To prevent erroneous setting between both stations when changing the setting of a line by transmitting the information of line setting to be changed from a master station side to a slave station side after multiplexing it to a DSI data, and reloading channel maps on the master station side and the slave station side according to the same data. CONSTITUTION:When changing the setting of the line, on the master station side, a channel map write part 160 loads map information down to channel maps (B) 120 and 140 of the station itself and transmits the channel map information to a map information transmission line inserter 170. On the slave station side, the channel map information signal transmitted from the master station side is detected by a map information detector 190, and the map information is loaded down from a channel map write part 180 to the channel maps (B) 120 and 140. Afterwards, the channel maps on the master station side and the slave station side are respectively changed over by switches 101 and 103. Thus, setting error caused by manual input operation error is not generated between the master station side and the slave station side.
Patent JP-H01111621-A (JP)
Title: Compact molding filling sealing machine automatically manufacturing sealed package
Inventor: SANFUOODO RETSUDOMONDO
IPC: B65B9/04
Filed: 1988-09-26
Abstract: PURPOSE: To automatically produce the filled and sealed cups and other package structures by comprising a means for intermittently dividing a web material to a heating station, and a means for intermittently dividing the heated web to a forming station. CONSTITUTION: When a web is passed on an upper part of a pin punching roller, and a machine is operated for dividing, and the bottom formation web is guided to two dividing pin chains along both edges and pierced. Then the chains are divided forward with the proper increment by a dividing drive device and a forced chain driving system. The bottom formation web is divided to a radiation or contact type heating station to be heated by a forming temperature. Then it is sent to a forming station so that one or both of the supply pressure and vacuum treatments are performed to the web, and then the web is pushed into a cooled female die to achieve the desired forming. Then the formed web is divided to a filling station, so that the fluid substance is filled in the formed cavity.
Patent JP-H0291783-A (JP)
Title: Character recognizing device
Inventor: MATSUEDA KAZUTAKA
IPC: G06K9/20
Filed: 1988-09-29
Abstract: PURPOSE:To easily attain the erroneous entry correction when the erroneous entry is executed to a mark sheet by deciding whether or not the character recognition of the line is carried out based on line abolition information detected from input picture data. CONSTITUTION:The title device is provided with an input means 2 to input sheet picture data, a detecting means 9 to detect the line abolition information from input picture data and a deciding means 8 to decide whether or not the character recognition of the line is executed based on the line abolition information. By the input means 2, the picture data of a sheet is inputted, by the detecting means 9, the line abolition information is detected from the input picture data and by the deciding means 8, it is decided whether or not the character recognition of the line is executed based on the line abolition information. Thus, it is not necessary to consume the time for the erroneous entry correction of a mark sheet and the erroneous recognition of the character is reduced.
Patent JP-H0799130-A (JP)
Title: Manufacturing for multi-layer ceramic electronic part
Inventor: NAKAO KEIICHI
IPC: H01F41/04
Filed: 1993-09-29
Abstract: PURPOSE:To achieve a miniaturization by a method wherein, in the multi-layer ceramic electronic part for use in various electric devices, a ceramic crude sheet is made a multi-layer by using a method of forming a via hole high in interlayer connectivity of the ceramic crude sheet and a manufacturing yield, in order to provide a multi-layer ceramic electronic part capable of obtaining a high manufacturing yield. CONSTITUTION:A multi-via hole 8 is formed in a ceramic crude sheet 1 with high producibility by sandblasting, and stopgap 10 is accurately made so that a round can be formed at both ends of the via hole 8, and a multi-layer ceramic electronic part can be made.
Patent JP-H0964127-A (JP)
Title: Wafer probing machine
Inventor: SAKAMOTO TSUTOMU
IPC: G01R31/26
Filed: 1995-08-28
Abstract: PROBLEM TO BE SOLVED: To increase the throughput by enabling the simultaneous processing of probing operation and inspection operation. SOLUTION: A main stage 4 moved in the direction of Y-axis 3 is arranged on a support stage 2 shifted in the direction of X-axis 1, a probing stage 5 rotated in the direction θ is disposed on the main state 4, an intermediate support stage 7 moved in the direction of X-axis 6 is provided on the main stage 4, a sub-stage 9 transferred in the direction of Y-axis 8 is provided on the intermediate support stage 7, and an inspection stage 10 turned in the direction θis disposed on the sub-stage 9.
Patent JP-H1069441-A (JP)
Title: Variable-bit-rate applicable time continous media server system
Inventor: AKIMOTO TOSHIAKI
IPC: H04N5/93
Filed: 1996-08-27
Abstract: PROBLEM TO BE SOLVED: To suppress an increase in a process load by providing a time continuous media transmission control means for continuously outputting information reproduced by a disk drive to a terminal. SOLUTION: A media server comprises disk drives 11-1m which store video information with audio after variable-bit-rate compression and encoding in block units, a multiple access controller 30, a request management part 36, a request editing part 35 which edits the address of a block of information, a time continuous media transmission controller 22 which outputs the reproduced information to a destination terminal, and a switch 21. The multiple access controller 30 is equipped with a time slot management part 32, a bit-rate-time variation information storage part 38, a bit rate control part 33, a request order editing part 37, and a switch 31, and sends blocks of information to the disk drives 11-1m by using time slots. Terminal parts TG1-TGn are equipped with buffer memories 41-4n, expanders 51-5n, and media display parts 61-6n.
Patent JP-S60174251-A (JP)
Inventor: BURUUNO MIRUTOKUNEHITO
IPC: B22D41/24
Filed: 1984-11-19
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-2000073177-A (JP)
Title: Improving method of adhesion property of resin to copper surface and electroless copper plating bath with high adhesion property to be used for that method
Inventor: HONMA HIDEO
IPC: C23C18/40
Filed: 1998-08-28
Abstract: PROBLEM TO BE SOLVED: To improve adhesion property with a resin without changing the structure of a copper surface by dipping a copper coating film in an electroless copper plating bath coating a sulfur compd. SOLUTION: As for a sulfur compd. to be added to an electroless copper plating bath, a sulfide inorg. compd. such as sodium sulfide and ammonium hydrogen sulfide, a thiocyanate compd. such as thiocyanic acid, an org. sulfide compd. such as thiomalic acid, thioglycolic acid are exampled and it is desirably added by about 0.01 to 50 mg/L in the electroless plating bath. As for the electroless copper plating bath in which the sulfur compd. is added, a normal electroless copper plating bath can be used, and as for a reducing agent, formaldehyde or its deriv. is preferably used. In the electroless plating bath, formaldehyde, a hypophosphite or its derives. are used as the reducing agent and for other than those, copper nitrate as a copper ion source, tartaric acid or its salt as a complexing agent of a copper ion can be used.  It may be enough to dip a copper film in the plating bath at 50 to 70 deg.C for about 5 to 30 min.
Patent JP-H08104446-A (JP)
Title: Sheet body detection and device thereof
Inventor: SUTANI TOSHIHIRO
IPC: G03G21/00
Filed: 1994-10-06
Abstract: PURPOSE: To surely detect presence/absence of a sheet element and easily take out a sheet body with a simple structure. CONSTITUTION: This device is provided with a detection roller 92 mounted so as advance and retreat to/from a traveling mechanism, an optical sensor 94 which detects the bottom surface of a film F or a magazine M by stopping the detection roller 92 at a stacking position within a magazine M, and a pressure sensor 96 for discriminating the presence/absence of the film F by detecting the pressure conditions of the first and second suction pads 32, 34 when carrying out suction by the first and second suction pads 32, 34 after moving the first and second suction pads 32, 34 by a prescribed distance toward a stacking position from a position where the relative movement of the detection roller 92 has been detected.
Patent JP-H03102548-A (JP)
Title: Virtual machine
Inventor: NOGUCHI TAKAYUKI
IPC: G06F12/10
Filed: 1989-09-18
Abstract: PURPOSE:To shorten time for execution and to prevent the performance of a machine from being lowered by providing an identifier OR circuit to output the execution instruction of address conversion under a VMOS or VM monitor and a circuit to execute the address conversion under the VMOS or VM monitor and to generate a real address. CONSTITUTION:An identifier OR circuit 17 inputs the outputs of signal lines 1071, 1072, 1073 and 108, calculates OR and outputs the OR to a signal line 109. The signal of the signal line 109 is logic '0' and for the address conversion under the VM monitor, the address conversion under the VMOS is instructed when the signal is logic '1'. Then, a control signal is obtained for generating the address. An adder 15 outputs the true real address to a signal line 126 and a register 8 sends out the real address to a main memory.
Patent JP-H0290389-A (JP)
Title: Automatic ticket examining device
Inventor: KIMATA SHIGEKI
IPC: G07B15/00
Filed: 1988-09-28
Abstract: PURPOSE:To shorten time required for a fare adjustment and to efficiently execute a ticket examination processing by instructing the throwing of recording medium having a monetary value and executing the fare adjustment by its recording medium, when it is decided that the fare adjustment processing by a ticket, etc., is required. CONSTITUTION:When an excess fare is decided at the time of deciding a railway ticket, the railway ticket is stopped on a carrying path, and a gate 4 is closed. Subsequently, a fare adjustment amount is displayed by a display part 5, and it is guided to throw in a money amount card. When the money amount card is thrown into a throw-in port 2 in accordance with this guidance, the fare adjustment amount is subtracted from remaining amount data which is read from the money amount card, and a new remaining amount is calculated. Next, the new remaining amount is displayed by the display part 5, and also, remaining amount data of the money amount data is updated. In such a manner, the time required for the fare adjustment processing can be shortened and the ticket examination processing can be executed efficiently.
Patent JP-H0582258-A (JP)
Title: Manufacture of electroluminescence element
Inventor: MINAMI UCHITSUGU
IPC: H05B33/14
Filed: 1991-09-24
Abstract: PURPOSE:To provide an electroluminescence element of high luminance and high efficiency, capable of emitting light of various colors including a white color in an easy manufacturing process. CONSTITUTION:A thin film made of at least one kind of phosphor is formed on either or both surfaces of a sintered oxide ceramic substrate 3 serving as an insulating layer of a high dielectric constant, followed by a heat treatment within a predetermined temperature range in the suitable atmosphere. Consequently, a satisfactory function as a light emitting layer 2 for an electroluminescence element can be applied to the thin film. Furthermore, a transparent electrode layer 1 for taking out light is formed on the thin film.
Patent JP-H1169397-A (JP)
Title: Selective call communication system
Inventor: SATO FUMIAKI
IPC: H04W72/04
Filed: 1997-08-25
Abstract: PROBLEM TO BE SOLVED: To request the reception of additional information by means of a receiver at the time of receiving additional information transmitted from a base station or the like by the selective call receiver. SOLUTION: Bi-directional communication is executed between the selective call receiver (pager) and the base station by using the frame of a prescribed period, which is constituted of plural slots. The call slot including a call signal to the receiver, the additional information slot including additional information which can be received by any receiver and the request signal slot including the reception request of additional information from the receiver are periodically allocated to the frame. For receiving additional information, the receiver transmits the reception request to the base station by using the request signal slot R2.  In the base station receiving the pertinent request, a position in the frame of the additional information slot D2 including additional information corresponding to the pertinent request is informed by using the call slop C2 allocated to the pertinent receiver. The pertinent receiver receives additional information requested in the informed slot position.
Patent JP-S60136029-A (JP)
Title: Magnetic recording medium
Inventor: SUZUKI KENJI
IPC: G11B5/64
Filed: 1983-12-22
Abstract: PURPOSE:To reduce cost and to improve the magnetic characteristic, mechanical resistance and corrosion resistance of a magnetic recording medium by forming a magnetic layer consisting essentially of Fe and contg. Co, Ni and Cr and making the content ratio of Ni in the surface layer part of the magnetic layer higher than the content ratio of Ni in the inside part of the magnetic layer. CONSTITUTION:A magnetic layer is formed by consisting essentially the same of Fe and incorporating Co and Ni, Cr therein. A concn. distribution is further provided to said layer in such a way that the compsn. concn. of Ni increases in the surface layer part of the magnetic layer. The preferable compsn. of the magnetic layer in which the compsn. ratio by weight of the inside of the magnetic layer is designated as (Fe1-xCox)1-(a1+b1)Nia1Crb1 and the compsn. ratio by weight in the surface layer part is designated as (Fe1-xCox)1-(a2+b2)Nia2Crb2 is such that the compsn. ratio in the inside part of the magnetic layer is 0<x<=0.5, 0.01<=a1 <=0.20, and 0.01<=b1<=0.15 and the compsn. ratio of the surface layer part is in a range of 0<x<=0.5, 0.05<=a1<=1.0, 0<=b2<=0.15 and a1<a2. The magnetic layer contg. 20-30wt% Co, 1-8% Cr, 7-14% Ni in the magnetic layer, 10-20% in the surface layer and the balance Fe is particularly preferable.
Patent JP-S6483676-A (JP)
Title: Wear resistant al alloy member
Inventor: KANAZAWA TAKAAKI
IPC: C23C26/00
Filed: 1987-09-28
Abstract: PURPOSE:To obtain a wear resistant Al alloy member having excellent wear resistance and durability by forming an alloyed layer which is crystallized with CrAl7 at a specific area rate by alloying of Cr on the prescribed surface of an Al alloy base material. CONSTITUTION:The alloyed layer in which at least the intermetallic compd. CrAl7 is crystallized in the area rate within a 10-50% range into the Al alloy matrix by alloying of Cr is formed on the surface of the base material consisting of the Al alloy in the part where the wear resistance of the base material is required. The formation of the alloyed layer mentioned above is executed by a method of applying Cr powder in the form of a slurry on the surface of the desired part of the Al alloy base material and applying the Cr coating on said surface, then applying high-density energy to the Cr coating layer from above to alloy said layer. The Al alloy member which is less segregated with the intermetallic compd. in the alloyed layer and has the smooth and highly wear resistant surface of the alloyed layer is thereby obtd.
Patent JP-S6398265-A (JP)
Title: Phase difference detecting method
Inventor: TOMITA YOSHIHIRO
IPC: H04R5/027
Filed: 1986-10-14
Abstract: PURPOSE:To decrease the amount of arithmetic necessary for phase difference detection and to eliminate fixedly appearing delay by using one of the voices stereoscopically collected by two pieces of microphones as a reference signal higher in power level, and the other lower in level as a sub-signal, inputting these signals to a phase difference detector and obtaining the phase difference between the sub-signal and the reference signal. CONSTITUTION:The voices stereoscopically collected by the two pieces of microphones 1, 2 are converted to digital signals respectively by analog-digital converters 3, 4, and their respective electrical powers are calculated by power calculation parts 5, 6. Thus the power levels are obtained, which are compared by a level comparator 7, and the one of a higher level is obtained. Thus obtained higher-level signal is used as a reference signal, while the lower-level signal is used as a sub-signal, and both are inputted to the phase difference detector 8; the phase difference between the two signals is obtained by a method of cross-correlation function calculation. In such a case, the arithmetic operation in the phase difference detector 8 always deals with the sub-signal which is at all time delayed, therefore, the calculation is required only for the range D to detect a phase difference. Thus, the amount of arithmetic operation is less than that conventionally needed. Also, since the delayed side is made clear, a delay circuit to always delay one side is made unnecessary.
Patent JP-S6489340-A (JP)
Title: Method and apparatus for surface treatment
Inventor: IGAWA EIJI
IPC: H01L21/3065
Filed: 1987-09-30
Abstract: PURPOSE:To obtain a surface on which a spontaneous oxide film is not generated by exposing a thin aluminum series film on which the spontaneous oxide film is generated with a discharge of halocarbon gas under etchable condition, removing the oxidation film and covering it with a surface protective film containing carbon by discharging. CONSTITUTION:A pair of opposite flat platelike electrodes 24 are contained in a vacuum chamber 21 in which an evacuation pump 22 connected through a conductance valve 27, a gas inlet 23 and a pressure gauge 26 are attached, connected to a high frequency power source 25, a sample 38 in which a natural oxidation film is generated is placed on a lower electorode 24, and the valve 27 correlating to the gauge 26 is controlled by a processor 28. An apparatus is composed in this manner, a clean thin aluminum film face from which the spontaneous oxide film on the sample 38 is removed is first exposed by CCl4 plasma, and covered with a polymer layer containing carbon. Thus, the surface of the sample 38 is maintained clean, the polymer layer is exfoliated in case of using it, and desired aluminum wirings or the like are formed thereon.