Patent GB-1316322-A (GB)
Title: Scaling and number base converting apparatus
IPC: H03M7/12
Filed: 1970-06-08
Abstract: 1316322 Shifting operations BURROUGHS CORP 8 June 1970 [7 Aug 1969] 27718/70 Heading G4A A data processing apparatus is arranged to shift a number represented by a binary signal coded in a first number base (e.g. binary coded octal, BCO) by a number of digit positions specified by a binary signal coded in a second number base (e.g. binary coded decimal, BCD). The apparatus may be used in banking to shift decimal currency values represented, e.g. in a computer, in BCO by a number of places represented in BCD. Right shifts.-As described the operation is in two phases, viz. phase I wherein a BCO integer is converted to a BCO fraction by multiplication by 10<SP>-n</SP> (expressed in BCO), and phase II wherein the BCO fraction is converted to a BCD integer by repeated multiplication by decimal 10 (expressed in BCO). The BCD integer is then at least partially converted back into BCO. The apparatus is described in some detail. Briefly however phase I is accomplished by multiplying the number to be shifted with digits decoded from the contents of a counter as the latter is decremented. The resulting product is then added to octal 2 for a rounding correction. The resulting BCO fraction is then converted to a BCD integer by repeated multiplication by 10 which is effected by applying digits of the octal fraction to both inputs of an adder, one input being shifted by three binary bits and the other by one bit. The most significant four bits of the result of successive multiplications represent successive decimal digits. A number of the lower ordered decimal digits resulting from this process are then gated to an output register in accordance with the amount of shift required and the remaining digits are re-converted to BCO using an algorith (see "Seminumerical Algorithms" by Knuth) wherein the most significant BCD digit (e.g. 0001) is modified by adding zeros so as to be represented by two BCO digits (e.g. 000,001), multiplied by 10 (i.e. 1010), added to the next most significant digit similarly modified, multiplied by 10, and so on. This algorithm is executed by applying the adder output, shifted so as to effect a multiplication by 10 (see above) back to the adder inputs. The arrangement is such that several adder inputs are unused and these inputs are utilized to add in the next digit to be converted so as to effect the algorithm. The resulting number is thus shifted right, the integral portion being in BCO, and the fractional part in BCD so that conventional rounding operations may be performed. Shift left.-The number being shifted is applied to the adder in the same manner discussed above in order to effect a number of multiplications by 10 until the number of 4-bit overflow digits equal to the amount of shift required have been produced. The overflow digits are then fed back to the adder for reconversion to BCO also in the manner discussed above while the remaining BCO digits are obtained from the adder which completes the processing of the input number following the derivation of the most significant BCD digits of the shifted number referred to above. It can thus be seen that left shifts are executed using the same apparatus as for right shifts with the addition of a few gates which enable the required operations to be performed in the right order.