baber/WOPTO huggingface dataset:
Patent JP-H08184722-A (JP)
Title: Manufacture of optical waveguide
Inventor: NAKAISHI HIROYUKI
IPC: G02B6/13
Filed: 1994-12-28
Abstract: PURPOSE: To easily manufacture the optical waveguide which has high optical transmission efficiency through a small number of processes by irradiating an optical waveguide material with X rays. CONSTITUTION: After a silicon substrate 1 having silica glass 2 on its surface is mounted on a sample base, a vacuum chamber is reduced in internal pressure by a vacuum pump, etc. Then the substrate is irradiated with O-order light of synchrotron emitted light having specific peak wavelength through a Be window by using, for example, a synchrotron light emission device. Through this operation, the part (light guide part) 4 in the silica glass 2 which is irradiated with the synchrotron emitted light becomes approximately 1×10<-2> larger in refractive index than the part which is not irradiated with the synchrotron emitted light.  After the silicon substrate 1 is taken out, the surface of the silica glass 2 and the surface of the part 4 which is irradiated with the synchrotron emitted light are coated with silica glass 5 which has a lower refractive index than, for example, the unirradiated part 4, thereby forming a three-dimensional waveguide 12.
Patent JP-H01167900-A (JP)
Title: Voice compressing and decoding system
Inventor: SUZUKI MASAMITSU
IPC: G10L19/00
Filed: 1987-12-24
Abstract: PURPOSE:To execute decoding by following up a steep variation of an input signal by taking an average of values of an input sample and two samples before, subtracting a local decoded value of one sample before being an output of a register from its average value and compressing its value successively by an adaptive difference bit. CONSTITUTION:Local decoded values of two samples before and one sample before go into registers 42, 43, respectively. In a decoding part 15, from a value encoded by bringing a scale value to + or -, two samples of the end of one frame are decoded, and its decoded value is given to the registers 42, 43 when one frame has ended. A local decoded value of two samples before of an output of this register 42 and an input signal are added to each other, and brought to 1/2 in an integrating part 41. Accordingly, values of the input sample and two samples before are averaged as a result, and a value which has subtracted the local decoded value of one sample before being an output of the register 43 from said average is compressed successively by an adaptive difference bit. In such a way, decoding can be executed by following up a steep variation of the input signal.
Patent JP-H04205113-A (JP)
Title: Sample table driving device
Inventor: YAMADA SHIZUO
IPC: G05D3/00
Filed: 1990-11-30
Abstract: PURPOSE:To shorten the positioning time of a sample table supported by plural displacement type actuators by determining the position and attitude of the sample table by diving the displacement type actuators simultaneously. CONSTITUTION:A stage 11 is made of a uniform material and its center of gravity G is located in the center of the stage 11. Piezoelectric elements 1-6 are fitted with elastic hinges at both ends. The piezoelectric element 1 has its one end connected to the flank of the stage 11 on the center line in an (x) direction and also has the other end fixed. The piezoelectric element 2 has one end connected to the stage 11 on a flat plate at a constant distance from the (y)-directional center line and has the other end fixed. The piezoelectric element 3 is arranged symmetrically with the piezoelectric element 2 about the (y)-directional center line and the (x)- and (y)-directional translation and (z)-axial rotation of the stage becomes possible by the piezoelectric elements 1-3. Further, piezoelectric elements 4, 5, and 6 are arranged to put the stage 1 in motion with a six degree of freedom while the translation and rotation are combined.
Patent JP-H11220173-A (JP)
Title: Gallium nitride compound semiconductor light emitting element
Inventor: NAKAMURA SHUJI
IPC: H01S5/323
Filed: 1998-11-19
Abstract: PROBLEM TO BE SOLVED: To raise the performance of a nitride semiconductor light emitting element by putting a light emitting element in double hetero structure which has, between a substrate and an active layer, an n-type gallium nitride compound semiconductor layer having such structure that a second nitride semiconductor layer including one kind among Ina Ga1-a N, Aln Ga1-b N (a and b are specified values), etc., is put between first and third nitride semiconductor layers. SOLUTION: Putting a second nitride semiconductor layer different in composition in an n-type nitride semiconductor layer will let the second nitride semiconductor layer (buffer layer) works as a buffer layer, which can lighten a crystal defect. It is to be desired that this second buffer layer 33 should be a multilayer film where films of InIGa1-a N (0<a<=1) or Alb Ga1-b N (0<b<=1) or Alb Ga1-b N (0<a<=1) different in composition are stacked. Furthermore, for the most desirable combination, the n-type nitride semiconductor layers 3' and 3" are n-type GaN, and the second buffer layer 33 is n-type Ina Ga1-a N (0<a<=0.5) or n-type Alb Ga1-b N (0<b<=0.5), or the like. Accordingly, an excellent light emitting element little in crystal defects can be obtained.
Patent JP-2000156617-A (JP)
Title: Automatic gain control amplifier and mobile communication system
Inventor: ROAN DEKURO
IPC: H04B1/16
Filed: 1998-11-19
Abstract: PROBLEM TO BE SOLVED: To attain high speed data transfer by decreasing a reaction time while suppressing occurrence of vibration. SOLUTION: A peak detector 12 detects a peak level of an output signal of a variable gain amplifier 6 and a rectifier capacitor 14 rectifies its peak voltage. A comparator 16 produces a current to charge a rectifier capacitor 20 only when the rectified peak voltage is higher than a reference voltage Vref. A gain control circuit 25 generates output gain control voltages GC1-GC6 to control the gain of variable gain amplifiers 2, 4, 6 based on a control voltage 21 generated by the rectifier capacitor 20. Since a dual rectifier structure using the two rectifier capacitors 14, 20 is adopted, the operating frequency is converted twice into a DC so as to suppress opportunity of occurrence of oscillation.
Patent JP-H11161855-A (JP)
Title: Commodity sales data processor, method therefor and computer-readable storage medium stored with commodity sales data processing program
Inventor: SHIMIZU MASATO
IPC: G06Q50/10
Filed: 1997-12-01
Abstract: PROBLEM TO BE SOLVED: To make it possible to quickly and newly set or change information to be provided from the external by the use of a display device of a terminal. SOLUTION: A host equipment 20 is connected to an Internet server 40 creating a store home page (Web page) in which information can be written by a client 70 through an Internet 49, and is formed so as to display information written in the home page and obtained from the server 40 on each terminal (electronic cash register) 10.
Patent JP-H04207948-A (JP)
Title: Motor
Inventor: ARITA YOJI
IPC: H02K21/16
Filed: 1990-11-30
Abstract: PURPOSE:To reduce driving torque ripple with substantially no effect on cogging torque by a method wherein when a distance in the width direction of a magnetic flux generating region of a permanent magnet is expressed by a series in correspondence to the number of salient poles and the number of poles of the permanent magnet, it should be a form containing a specified coefficient. CONSTITUTION:In a motor having a magnetic field system part 1 which is constituted of a permanent magnet having 'm' pieces of magnetic poles and 'p' pieces of salient poles which are opposite to the magnetic field system part 1, a distance in the width direction h(theta) of a magnetic flux generating region of the said magnetic poles for an angle of rotation 'theta' is expressed by the formula shown when a pair of the said magnetic poles (N pole and S pole) is one cycle 'T' against the direction of the angle of rotation of the motor. In the range of n<i-1, the distance should be constituted of the magnetic field system part 1 having a magnetic flux generation pattern which has a coefficient 'bn'. The coefficient 'bn' is not zero at 'n' pieces of integer values or at one or more integer values. Here, h0=H(0<theta<pi), h0=-H(pi<theta<2pi), H is a standard distance in the width direction when making a pattern of deformed magnetization or form of the magnetic field system part 1. 'i' is an integer expressed by p/q when 'q' is the greatest common measure of m/2 and 'p'.
Patent JP-S63175662-A (JP)
Inventor: ROJIEERU TOROOMU
IPC: B05B13/04
Filed: 1987-12-28
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H07192959-A (JP)
Title: Production of grain boundary insulation multilayer semiconductor ceramic capacitor
Inventor: OGOSE YOICHI
IPC: H01G4/30
Filed: 1993-12-27
Abstract: PURPOSE:To provide a method for producing a grain boundary insulation multilayer ceramic capacitor in which insufficient bonding of a green sheet or delamination of an electrode is prevented. CONSTITUTION:A green sheet 1 is left as it is in an atmosphere having humidity of 30% Rh or above for 10 min or longer in order to activate the binder in the green sheet 1 thus enhancing the bonding strength between the green sheets 1.
Patent JP-2000156576-A (JP)
Title: Case attachment structure to frame
Inventor: KANDA YUICHI
IPC: H05K7/14
Filed: 1998-11-20
Abstract: PROBLEM TO BE SOLVED: To provide a means which can easily settle a case to a frame pen if it is a case different in height for an electric apparatus or the like. SOLUTION: A case 1 is placed at the bottom 2c of a frame 2. A retaining bar 3 consisting of a round bar or a semiround bar lacking its top is laid horizontally, in abutment on the topside 1a of the case 1. Both ends 3a of the retaining bar 3 are provided with two screw holes 3b each. The section corresponding to the screw hole 3b of the retaining bar 3 at the flank 3s of the frame 2 is provided with zigzag through holes where semicircular lengthy slits 4 mutually centering on the ends 4a of the slits 4 link with one another. A screw 6 is penetrated into the slit 5, and it is screwed into the screw hole 3b at the end 3a of the retaining bar 3 so as to lock the retaining bar 3 in the specified position of the frame 2.  The position of lock is made the one where the bottom of the retaining bar 3 abuts on the topside 1a of the box 1, putting the screw 5 at the end of the retaining bar 3 in the position of the end 4a of one slit 4, and sliding the other screw 5 in the direction of long diameter of the slit 4.
Patent JP-H05162418-A (JP)
Title: Controlling maintenance
Inventor: KANEKO MASARU
IPC: G03G21/00
Filed: 1991-12-13
Abstract: PURPOSE:To prevent deterioration of an image formation apparatus by automatic maintenance, and to prevent erroneous operation of the apparatus by simplification of the operation without depending on man power. CONSTITUTION:An image formation apparatus is composed of a program memory (ROM) 204, a data memory (RAM) 203, an EEPROM 214 that records maintenance cycles, an interruption control part 201, an input port 208, an output port 210, a driver 215 and the like with an engine CPU 200 operating as a central unit, and controls communications with a host unit 213 through a controller 211. Control is also made so that when a request for maintenance is made during printing operation as a result of maintenance cycles recorded in the EEPROM 214, the printing operation is interrupted after transfer paper under printing is delivered out, and the printing operation resumes after the maintenance is finished.
Patent JP-H11158442-A (JP)
Title: Pressure-sensitive adhesive paper sheet and its production
Inventor: NAKAMURA YASURO
IPC: C09J7/02
Filed: 1997-12-01
Abstract: PROBLEM TO BE SOLVED: To provide a pressure-sensitive adhesive paper sheet in which the strength resulting from the expansion or contraction of the face paper upon moisture absorption or release and acting to peel the pressure-sensitive adhesive layer out of the paper is perfectly absorbed, and therefore the finish at the time of sticking can be maintained and to provide a process for producing the same. SOLUTION: There is provided a pressure-sensitive adhesive paper adhesive sheet having a facial paper 1 and a pressure-sensitive adhesive layer 3 and having a release sheet 4 on either surface of the layer 3, wherein such deep or high irregularities as to absorb the expansion or contraction of the paper 1 resulting from a moisture change are formed on the paper 1, and a fixing layer 2 to fix the surface paper 1 is disposed between the surface paper 1 and the other surface of the layer 2.
Patent JP-H05168249-A (JP)
Title: Inverter device
Inventor: HONDA KENJI
IPC: H05G1/20
Filed: 1991-12-13
Abstract: PURPOSE:To enable spike voltage to be absorbed positively and power efficiency to be improved with a simple configuration. CONSTITUTION:Snubber circuits SB1 and SB2 are provided at switching elements S1 and S2 which can be turned on and off at a high speed alternately. A charging control circuit Jc which turns on switching circuits S1-J and S1-a is installed at the switching element in parallel at each of the snubber circuits SB1 and SB2 when a spike voltage nearly reaches a DC power supply voltage. The switch circuits S1-J and S1-a are connected to capacitors C1 and C2 in series. respectively, and those two series circuits are connected to the switching element in parallel through diodes D1 and D2 individually. A diode D3 is inserted to the switch circuit S1-J in inverse direction. The switch circuit S1-b is connected to the diode D2 and the capacitor C2 in parallel and is turned on at the time of regeneration. A middle point of the diode D2 and the capacitor C2 is connected to a coil through the switch circuit S1-c and a diode D4, thus enabling the switch circuit S1-c to be turned on at the time of regeneration.
Patent JP-H06175886-A (JP)
Title: Fault monitor method
Inventor: AMANO AKIO
IPC: G06F11/16
Filed: 1992-12-10
Abstract: PURPOSE:To provide a means for suppressing erroneous CPU fault detection, reducing fault detection time and preventing the load amount of a communication line such as a LAN from being increased by fault monitor processing when monitoring the fault generation of a present CPU. CONSTITUTION:Concerning the fault monitoring method for monitoring a fault with either a standby system CPU 15 or a dedicated equipment at least in a system constituted by connecting more than one present CPUs 11-14 and more than one standby system CPU 1 5 with more than one communication lines, after either of the standby system CPU and any dedicated equipment at least transmits data for fault monitor through the communication line so as to investigate the generation of any fault, the respective present CPU 31-14 make responses after CPU load condition information previously decided corresponding to the use frequency of CPU to the data for fault monitor. Further, the standby system CPU or dedicated equipment changes the response monitor time of time to judge the fault at the present CPU 11-14 corresponding to previously decided relation based on the CPU Load condition information when there is no response of fault monitor data, and the generation of the fault at the present CPU 11-14 is monitored.
Patent JP-H09165816-A (JP)
Title: Waterproof structure of underground embedded equipment
Inventor: GOMI MICHITAKA
IPC: E03F5/22
Filed: 1995-12-19
Abstract: PROBLEM TO BE SOLVED: To provide a waterproof structure by which underground embedded equipment such as the control board or the like of a manhole pump can be easily economically, and securely prevented from the intrusion of water or the like, without applying an expensive waterproof shield or the like. SOLUTION: A control board 3 is housed inside a cap-shaped housing container 5 while keeping a prescribed gap. The housing container 5 is made of a metal or the like having a sufficient large specific gravity so that it cannot be floated up by the buoyancy at the time of water intrusion. The lower peripheral part of the housing container 5 is provided with the supporting members SMs that can be detachable from the outside. Thus, the control board 3 inside the housing container 5 is supported in the position higher than the lower peripheral part of the housing container 5.
Patent JP-H03189743-A (JP)
Title: Method and device for arithmetic operation at retrieval of data base
Inventor: TAMURA MINORU
IPC: G06F12/00
Filed: 1989-12-19
Abstract: PURPOSE:To shorten the processing time with the method and device by converting the attributes of such elements as the designation of a variable, the designation of a column, a constant, etc., at the terminal of an assembly of nodes of a tree structure and executing all operations with operation of a fixed attribute and with no conversion of attributes required. CONSTITUTION:A node attribute deciding means 104 refers to the pointers to the left and right operands and processes these operands as the subject nodes via a node attribute deciding means 104 as long as both pointers include no null value. A node attribute changing means 105 changes the attributes between the left and right operands based on the attribute of the subject node and the type of an operator. Then the pointers to both operands are checked and the means 105 processes these operands as the subject nodes as long as those pointers include no null value. Thus it is possible to reduce the attribute converting frequency and also to dissolve the complexity of operations.
Patent JP-2000286350-A (JP)
Title: Nonvolatile semiconductor memory device and manufacture thereof
Inventor: SAITO KENJI
IPC: H01L29/788
Filed: 1999-11-22
Abstract: PROBLEM TO BE SOLVED: To restrain dust from being generated in the array region of a memory cell without etching a gate oxide film forming region on a silicon substrate, even if overetching occurs when an ONO film (three-layered film composed of silicon oxide film-silicon nitride film-silicon oxide film) is removed through dry etching. SOLUTION: This device is equipped with a memory cell region, possessing a nonvolatile memory and a peripheral circuit region possessing a circuit that controls the memory. In the device, the memory cell is provided with a dummy pattern 38 composed of polysilicon which forms a floating gate electrode 20, a two-layered structure film of high-melting metal silicide/polysilicon which constitutes a control gate electrode 30, and an ONO film 24 which constitutes an insulating film located between a floating gate electrode and a control gate electrode, and the dummy pattern 38 is located in a boundary region between the memory cell region and the peripheral circuit region. Furthermore, the floating gate electrode located at the edge of the memory cell region is covered with the control gate electrode.
Patent JP-H02176744-A (JP)
Title: Processing method for silver halide color photographic sensitive material
Inventor: TAKABAYASHI NAOKI
IPC: G03C7/407
Filed: 1988-12-28
Abstract: PURPOSE:To prevent the local increase of a magenta density in a dyestuff color forming part at the time of processing by incorporating a specific ratio of a chloride into a color developing soln. and incorporating a specific iron complex salt into a processing liquid having bleachability. CONSTITUTION:The silver halide color photographic sensitive material has silver halide emulsion layers contg. silver halide particles substantially consisting of silver chloride. The color developing soln. contains >=0.025mol/l chloride and the processing liquid having the bleachability contains the iron complex salt having >=300mol.wt. of free acid. The chloride is exemplified by KCl, NaCl, LiCl, etc., and the color developing agent used for the color developing soln. is preferably a p-phenylene diamine compd. having a water soluble group. The generation of the unequal magenta dyestuff to be generated not only in the unexposed part but also in the color developing part in spite of the execution of a bleach-fix processing right after the color development processing is obviated and the rapid processing is executed.
Patent JP-2001150588-A (JP)
Title: Copper foil laminated body having supporting body, and its manufacturing method
Inventor: TAKAMORI MASAYUKI
IPC: B32B15/08
Filed: 1999-11-22
Abstract: PROBLEM TO BE SOLVED: To provide a copper foil laminated body having a supporting body, wherein the shortcomings of a conventional CAC(copper-aluminum-copper) laminated article are eliminated, i.e., the workability is increased, and defective articles are prevented from being generated, and at the same time, the handling is facilitated, and in addition, contamination such as a resin powder is prevented from adhering to the surface of the copper foil, and which is inexpensive and has a high capability; and also, to provide its manufacturing method. SOLUTION: This copper foil laminated body having a supporting body has a structure wherein a copper foil sheet and the supporting body made of aluminum are separably bonded with an adhesive of which the bonding force is 0.05 N/mm or lower. Such a copper foil laminated body having a supporting body and its manufacturing method are provided.
Patent JP-H05142293-A (JP)
Title: Testing method of ic and tester therefor
Inventor: ISAYAMA TOSHIO
IPC: G01R31/26
Filed: 1991-11-19
Abstract: PURPOSE:To improve reliability and to shorten a test time by enabling execution of a burn-in process for IC in a mounted state and execution of a full-automatic test of a plurality of ICs. CONSTITUTION:In a testing method of IC, ICs are mounted on a burn-in board 1, a test signal is impressed and an operation output from the IC 53 whereon the test signal is impressed is compared with an expected value. A tester is equipped with a signal generator 59 making all of the ICs operate, an expected value generator 67 generating the expected value, a switch 63 selecting an operation output of one of the ICs 53 in a plurality alternatively and a comparator 65 comparing the selected output with the expected value. The signal generator 59 is so designed that it can impress the same test signals as actual operational conditions on the ICs 53 mounted on the burn-in board 1.
Patent JP-H07189585-A (JP)
Title: Method for executing works in shield target part and shield excavating machine for the part
Inventor: NAKAMURA KOICHIRO
IPC: E21D11/00
Filed: 1993-12-27
Abstract: PURPOSE:To eliminate flowout of water and/or earth and sand owing to non- exposing of natural ground directly, enhance the safety in executing works, nullifying necessity for placing mortar for stopping to lead to shortening of the period of constructing, lessen the range of ground improvement, and save the costs and labor as well as shorten the construction term. CONSTITUTION:First a cutter ring 20 for peripheries which is in detention with a cutter head is bitten into the target pit wall 21, and the cutter head 5 and cutter ring 20 are separated, and a cutting ring 15 is slided ahead of the cutter head 5 and is engaged thereby. With this cutting ring 15, the pit wall 21 is cut till the specified position, and the gap between the cutting ring foremost and the pit wall 21 is caulked while the cutting ring 15 is left as it is to serve as a joint member.