baber/WOPTO huggingface dataset:
Patent TW-383491-B (TW)
Title: Regulator for regulating power voltage and semiconductor integrated circuit including the same
Inventor: OSAWA TAKASHI
IPC: G05F1/46
Filed: 1998-02-21
Granted: 2000-03-01
Abstract: The subject is that the used step-down circuit has an effect on increasing the hot carrier current durability but is difficult to increase the dielectric breakdown of gate insulation film. The solution is that the N-type channel MOS is to step down the external voltage and generate the internal power voltage (Vint) of chip. The threshold voltage monitoring circuit is to detect the threshold voltage of the used-up N-type channel MOS. The output of differential amplifying circuit of inverse amplifier composed of resistors R1, R2 is connected to the gate of N-type channel MOS. By the output of differential amplifier, it can compensate the threshold voltage of N-type channel MOS to keep constant internal voltage (Vint).
Patent TW-436699-B (TW)
Title: Programming of bit-wise verify-type low-current floating gate
Inventor: CHEN HAN-SUNG
IPC: G06F13/00
Filed: 1998-07-10
Granted: 2001-05-28
Abstract: There is provided a programming system of the floating gate memory cell array for decreasing the required burning current and the stress of the bit line and word line in burning the floating gate memory array. When one word in the floating gate memory cell array is to be burned, the word is divided into several smaller sub-words. Only one sub-word is burned at one time, thereby decreasing the required burning current. In addition, even though other sub-words are failed in burning, it is not necessary to re-burn the successfully burned sub-words. In comparison with the conventional skill wherein the whole word is burned at one time and the successfully burned sub-words have to be re-burned together with the failed sub-words, the present system can decrease the stress of the bit line. Finally, in each sub-word, only the bits that are failed in burning are required to be re-burned. Therefore, in the re-burning period, the bit line stress of the successfully burned bits is decreased.
Patent TW-403772-B (TW)
Title: Salt-based ink compositions
Inventor: REHMAN ZIA UR
IPC: C09D11/00
Filed: 1998-07-10
Granted: 2000-09-01
Abstract: Ink compositions are described comprising a combination of an ammonium carboxylate salt or salts and one or more surfactants, preferably non-ionic ethoxylate surfactants, hydroxylated or alkoxylated acetylenic polyethylene oxide surfactants, or anionic phosphate esters. The ammonium carboxylate is present in an amount of from about 2 to about 15 weight percent. The ink compositions substantially prevent thermally-induced phase separation at least about 60 DEG C and , preferably, about 70 DEG C. The ink compositions also are relatively non-toxic, resist the tendency to decel at high frequency print rates, and furthermore provide superior light fastness, edge acuity, and fastness when printed on conventional or special media. The described ink compositions are particularly suitable for color ink-jet printing over a wide range of media.
Patent TW-558673-B (TW)
Title: Sedimentation stabilized radiation-curable filled compositions
Inventor: MELISARIS ANASTASIOS PANAYIOTI
IPC: B29C67/00
Filed: 1998-07-20
Granted: 2003-10-21
Abstract: The present invention relates to a process for the production of three-dimensional articles by stereolithography using a radiation-curable composition containing a mixture of at least one cationically polymerizable compound and/or at least one free radical polymerizable compound, at least one filler material, at least one photoinitiator for cationic and/or radical polymerizations and at least one antisedimentation agent. An organic viscosity stabilizer material soluble in the base resin may optionally be brought into contact with the composition. A filler material can be introduced in the composition in an effective amount sufficient to at least delay or prevent a significant viscosity increase. The present invention also relates to cured articles resulting from said processes and a process for preparing said compositions.
Patent TW-479328-B (TW)
Title: Method for manufacturing a self-aligned stacked storage node DRAM cell
Inventor: TU YEUR-LUEN
IPC: H01L27/108
Filed: 1998-12-03
Granted: 2002-03-11
Abstract: A method for manufacturing a self-aligned stacked storage node DRAM cell on a substrate for a capacitor over bit line (COB) process is disclosed. The method comprises the steps of: forming a first dielectric layer onto the substrate; forming a first barrier layer onto the first dielectric layer; patterning and etching the first barrier layer until the first dielectric layer is reached to form a bit line contact and a storage node contact; forming first sidewall barrier spacers on the sides of the first barrier layer; etching the first dielectric layer until the substrate is reached to form a bit line contact opening and a storage node contact opening; depositing a first conducting layer into and above the bit line contact opening and the storage node contact opening, and above the first barrier layer and the first sidewall spacers; depositing a second conducting layer onto the first conducting layer; depositing a cap barrier layer atop the second conducting layer; patterning and etching the first conducting layer, the second conducting layer, and the cap barrier layer to form an intermediate structure above the bit line contact opening and a plug in the storage node opening; forming second sidewall barrier spacers on the sides of the intermediate structure; forming a second dielectric layer onto exposed portions of the first and the second sidewall barrier spacers, the plug and the cap barrier layer; patterning and etching the second dielectric layer thereby leaving a remaining portion only on the intermediate structure; forming a third conducting layer onto exposed portions of the plug, the first and the second side wall barrier spacers, the cap barrier layer, and the remaining portion of the third dielectric layer; and removing the third conducting layer atop the second dielectric layer.
Patent TW-408519-B (TW)
Title: Guassian profile promoting cavity for semiconductor laser
Inventor: HWU RUEY-JEN
IPC: H01S5/14
Filed: 1999-01-06
Granted: 2000-10-11
Abstract: A system and method for generating a laser beam from a semiconductor laser in order to eliminate or substantially reduce filamentation of the laser beam. The system and method utilizes an external optical member such as a reflector to improve or enhance the overall laser beam quality produced. The reflector has a Gaussian intensity profile promoting cavity such as a parabolic cavity, with the cavity having a focal length a preselected distance from the cavity surface. The semiconductor laser is positioned such that the facet of the semiconductor laser is at the focal length distance from the cavity surface. The cavity has a mode-selecting reflective surface such that the beam has a substantially Gaussian intensity profile. A beam splitter can be optionally employed between the semiconductor laser and the optical reflector for certain applications if desired. Altematively, an external digital optics member can be employed with a semiconductor laser to produce a beam with a substantially Gaussian intensity profile.
Patent TW-501944-B (TW)
Title: Waste processing device
Inventor: KAWAMURA KENICHI
IPC: B02C7/11
Filed: 1999-01-30
Granted: 2002-09-11
Abstract: The present invention relates to a waste processing device, which is composed of (A) a top-opened accepting container (1), and (B) a set of opposite circular plates formed by a lower fixing circular plate (2) and an upper rotational circular plate (3), and (C) a driver (5) for rotating the upper rotational circular plate (3). The device is penetrated with the rough shattering portion (11) at the entry of the waste at the upper rotational circular plate (3) formed by the opposite central portion of (B) the set of opposite circular plates; and configured with a waste processing device on the drainage (8) at the bottom of (A) accepting container. The waste processing device can shatter the waste from the daily residential waste or industrial waste, so that it will not cause any blocking problem when directly flowing into the drainage.
Patent TW-378189-B (TW)
Title: Packing container and method of glueing the cap
Inventor: AIBA TAMOTSU
IPC: B65D83/08
Filed: 1999-04-12
Granted: 2000-01-01
Abstract: The present invention is to provide a packing container made of cardboard which will not show its fray old paper layer after being unpacked, and method of glueing the cap thereof. Disclosed are a container main body 8 of packing to bite cover layer 4 on its surface and old paper layer 6 on its reverse surface, and method of 3 glueing the cap 10, characterized in containing the steps of applying adhesives 32 on specific portion 30 of the inner side of the cap for permeating said portion of old paper layer, glueing the cap on to the gluding area 34 of the container main body with said adhesives, and determining the area of glueing area so that the other layer 4 of the glued area with flake off when the glued cap is opened. The packing container made by this method will not show flaking off in its old paper layer of the cap when opened, or show its gray old paper layer but only flaking off in the outer layer of the container main body, for the old paper layer of the cap is glued as a continuous layer and cured.
Patent TW-406411-B (TW)
Title: Manufacture method of the capacitor
Inventor: LI JIN-HUEI
IPC: H01L27/108
Filed: 1999-04-26
Granted: 2000-09-21
Abstract: Manufacture method of the capacitor is disclosed, comprising the steps of providing a semiconductor substrate formed thereon an dielectrics layer having an opening; forming an electric-conductive layer along the profile of the dielectrics and the opening; forming an insulated layer on the electric-conductive layer; removing the insulated layer and the electric-conductive layer outside the opening region so that the upper surface of the dielectrics is exposed; removing part of the dielectrics neighboring to the electric-conductive layer, and forming a semi-sphere-type silicon grain layer on the surface of the electric-conductive layer; removing the insulated layeron the opening so as to form a cylinder-type bottom electrode whose outer side has the semi-sphere-type silicon grain and inner side is planar; and forming a dielectrics film layer and an upper electrode on the bottom electrode, thereby completing the fabrication of the capacitor.
Patent TW-455985-B (TW)
Title: Shallow trench isolation method
Inventor: WU SHIE-LIN
IPC: H01L21/76
Filed: 1999-06-11
Granted: 2001-09-21
Abstract: The present invention proposes a method for manufacturing the shallow trench isolation region. An oxide layer is used as the hard mask for silicon etching. A thick thermal oxide film is formed at the corner of trench and its vicinity in order to prevent gate wrap-around and corner parasitic leakage current. By using a thick silicon oxide mask layer as the hard etching mask, a trench region is formed on a semiconductor substrate. An amorphous silicon thin film is deposited on the substrate and is followed by etching back this amorphous silicon as well as part of substrate material so as to form an amorphous silicon spacer and a sub-trench region. After that, a high-temperature oxidation method is conducted to oxidize the amorphous silicon spacer and part of substrate material in order to form a thermal oxide layer on the sidewall of trench region and the bottom portion. A thick oxide layer is deposited on the semiconductor substrate. Then, CMP (chemical mechanical polishing) method is used to remove the oxidized thin film outside the trench region, and the present invention is completed.
Patent TW-425724-B (TW)
Title: The light emitting diode with a carrier flow shield
Inventor: JENG SHIANG-PING
IPC: H01L33/00
Filed: 1999-06-17
Granted: 2001-03-11
Abstract: A light emitting diode with a carrier flow shield comprises a carrier flow shield under the window layer with high reflectivity to vary the path of general carrier injection, so that most of the injected carrier can flow through the effective light-emitting part, i.e., the outer region below the electrode plates. Secondary, add a contact layer on the double heterostructure to enhance the stability of this light emitting diode wherein the added carrier flow shield is composed of the semiconductor material having high-resistivity oxide layer or having the reverse conductivity to the window layer; and the above mentioned contact layer is a graded AlGaP layer.
Patent TW-483184-B (TW)
Title: Battery including a non-aqueous multi-cell spiral-wound electrode assembly
Inventor: BAILEY JOHN C
IPC: H01M10/0587
Filed: 1999-07-09
Granted: 2002-04-11
Abstract: A battery construction is disclosed that includes a housing and a spiral-wound electrode assembly disposed in the housing and defining at least two electrochemical: cells that are electrically connected in series. Both of the cells include wound layers of a positive electrode, a negative electrode, and a polymer electrolyte provided between the positive and negative electrode layers. The layers of each successive electrochemical cell are wound around the layers of the previous cell and are preferably separated therefrom by an insulating layer. By utilizing a polymer electrolyte, the need for expensive microporous separator layers is eliminated as is the need for providing separate sealed containers to construct a multi-cell battery. Thus, a less-expensive and space-efficient multi-cell spiral-wound electrode construction may be obtained.
Patent TW-I229120-B (TW)
Title: Condensed ring compound for liquid crystal
Inventor: OGAWA SHINJI
IPC: C07C255/50
Filed: 1999-09-10
Granted: 2005-03-11
Abstract: The present invention relates to a novel compound as expressed in the general formula (I), and to a nematic liquid crystal composition comprising it. As shown in the examples, it is very easy to produce the compound as expressed in the general formula industrially. While the compound is used as a nematic liquid crystal, its compatibility with present widely-used mother liquid crystals is excellent, and it has a characteristic that there is little deposition of crystal in a low temperature. Moreover, by means of adding a little into said mother liquid crystal, several characteristics of liquid crystals will not become worse, while the effect of efficiently magnifying the temperature range of liquid crystals will exhibit. Therefore, it is suitable in various liquid crystal display elements in which wide temperature range of actuation is required, and is very useful as a liquid crystal material.
Patent TW-450012-B (TW)
Title: Planar arrangement method for multi-ring electric heating film
Inventor: SHIU LI-HUANG
IPC: H05B1/00
Filed: 1999-09-23
Granted: 2001-08-11
Abstract: The present invention relates to a planar arrangement method for multi-ring electric heating film which is to arrange a plurality of annular electric heating films in inner and outer loops with the same axle center. Each of the annular electric heating films is of the same width and is arranged in arithmetical series. Each annular electric heating film is configured with electrodes at suitable positions, and specific electrodes are interconnected so as to form a plurality of electric heating film units with the same length, thereby making each of the electric heating film units to have the same height, width and depth to obtain the same resistance for uniform heating.
Patent TW-423091-B (TW)
Title: Method for early detection of photoresist coating status using video sensor and device therefore
Inventor: YU JENG-HUNG
IPC: H01L21/66
Filed: 1999-10-05
Granted: 2001-02-21
Abstract: The present invention relates to a method for detecting the photoresist coating by using a video sensor and a device therefore, in which a video sensor is used on a photoresist coating track machine to provide an inspection in coating process during the photoresist coating. It also develops a process flow that is different from a conventional photolithography process and a photoresist defect inspection process. While not affecting the throughput, the present invention can effectively detect in real time the defects of the machine per se or previous layer caused by a poor resist coating. The photoresist detection timing can be greatly shortened to reduce the rework rate caused by the problems of resist coating.
Patent TW-442669-B (TW)
Title: Projection objective
Inventor: SCHUSTER KARL-HEINZ
IPC: G03F7/20
Filed: 1999-11-08
Granted: 2001-06-23
Abstract: A projection objective, particularly for microlithography at 248 nm or 193 nm has, after two bulges and two waists, a pronounced lens arrangement which preferably contains a further waist and always contains the aperture diaphragm (AS). This markedly set back from the negative lens group (LG4) containing the second waist, and is surrounded by important correction means. The highest numerical aperture (0.65-0.80) is attained with the smallest lens diameters and paying heed to the further qualities required for such a microlithography projection objective.
Patent TW-453958-B (TW)
Title: Device for testing functions of filtering element of aerator of vehicular air bag
Inventor: SHIE WEN-SHIN
IPC: B60R21/16
Filed: 1999-12-29
Granted: 2001-09-11
Abstract: This invention is related to a device for testing functions of filtering element of aerator of vehicular air bag, which uses air as the working fluid and is capable of adjusting flow rate of pressurized air so as to reach the testing condition quickly. The device can measure the physical characteristics of the filtering element within the air bag in real time and is capable of adjusting the back pressure valve according to the pressure condition of the working environment.
Patent TW-459000-B (TW)
Title: Transparent articles of copolyalkylene terephthalate/isophthalate
Inventor: AL GHATTA HUSSAIN
IPC: C08G63/80
Filed: 2000-01-19
Granted: 2001-10-11
Abstract: Transparent articles, in particular sheets, having a thickness greater than 5 mm obtained from polyalkylene terephthalate/isophthalate resin containing 5-20% of isophthalic acid units, characterised by an intrinsic viscosity greater than 0.8 dl/g; melt strength at 280 DEG C greater than 1 cN and melt viscosity at 280 DEG C greater than 2000 Pa.s for shear rates tending to zero and not less than 200 Pa.s for shear rates of 1000 sec<SP>-1</SP>.
Patent TW-571162-B (TW)
Title: Liquid crystal display
Inventor: TANIGUCHI YOJI
IPC: G02F1/1335
Filed: 2000-02-02
Granted: 2004-01-11
Abstract: A liquid crystal material having a negative dielectric constant anisotropy is provided between first and second substrates and aligned homeotropically. Pixel electrodes each having a slit are provided on the first substrate. Color filters for giving any one of red, green and blue are arranged in the pixels. A projection pattern is formed on the second substrate so as to divide the pixels into small areas. The slit of each pixel electrode is spaced from the projection pattern so as to divide, together with the projection pattern, the pixels into domains. The width of the slit of a pixel among the red, green, and blue pixels is different from that of the other pixel. The coloring of the display screen occurring during white display is suppressed.
Patent TW-436973-B (TW)
Title: Manufacturing method of shallow trench isolation
Inventor: HE KUEN-CHI
IPC: H01L21/76
Filed: 2000-03-01
Granted: 2001-05-28
Abstract: The present invention relates to a manufacturing method of DRAM memory cell, and more particularly, to a manufacturing method of DRAM memory cell shallow trench isolation. The method comprises the steps of: forming a pad layer and a cap layer on the surface of a semiconductor substrate; defining the pad layer and the cap layer to provide a mask and form a deep trench on the surface of the semiconductor substrate; forming a deep trench capacitor having at least a ring insulation layer, a first conductive layer and a latent conductive strip; using an insulation layer to fill up the space above the latent conductive strip; forming an anti-reflective layer on the surface of the pad layer, and defining a first opening; sequentially removing the layers and semiconductor substrate under the first opening until reaching a predetermined depth to form a second opening; filling another insulation layer in the second opening to form a shallow trench isolation region.
Patent TW-500821-B (TW)
Title: Method to transport at least a steam formed substance through the wall of a vacuum chamber in the vacuum chamber, and the device to carry out the method
Inventor: LIEHR MICHAEL
IPC: B01J4/00
Filed: 2000-04-25
Granted: 2002-09-01
Abstract: Method to transport at least a steam formed substance through the wall (4) of a vacuum chamber in the vacuum chamber, and the device to carry out the method. In this method is a steam formed substance from outside is introduced through the inner tube (1) of the double-mantle-tube in the vacuum chamber. Wherein the inner tube (1) and the outer tube (2) of the double-mantle-tube is applied with the electric current from a current source (3).
Patent TW-474122-B (TW)
Title: Board-shaped member transferring and holding apparatus and method
Inventor: KABESHITA AKIRA
IPC: H05K3/00
Filed: 2000-05-20
Granted: 2002-01-21
Abstract: In a component mounting work region (200), two electronic circuit boards (2) are arranged in staggered manner and components are independently mounted thereon. Two sets of working heads (4, 14) and their driving units, board transferring and holding devices (3, 13), and recognizing devices (9, 19) are arranged. The board transferring and holding device holding a board moves to a position close to a component supply section in each region and mounting is performed.
Patent TW-490293-B (TW)
Title: Cushion for use in a shoe sole and shoe sole for supporting a wearer's foot
Inventor: HARMON-WEISS EDITH M
IPC: A43B13/14
Filed: 2000-06-21
Granted: 2002-06-11
Abstract: A shoe sole for supporting a wearer's foot. The sole has a main sole portion and at least one cushion associated with the main sole portion. The cushion includes first and second hollow tubular portions, preferably with resilient load-bearing first and second hollow walls that have a thickness, material, and shape providing sufficient strength for supporting and cushioning the sides of a corresponding foot region of a wearer's foot. The first wall is disposed on first side of a sole region of the sole, and the second wall is disposed on a second side of the sole region opposite from the first side. At least one of the first and second hollow walls extends along a third side of the sole region. A central portion of the cushion is disposed between and joined with the first and second tubular portions, and preferably has a thickness, material, and shape providing sufficient strength for supporting and cushioning a generally central part of the foot region between the first, second, and third sides.
Patent TW-476871-B (TW)
Title: Step-up/step-down switching regulators and pulse width modulation control therefor
Inventor: VOLK KARL RICHARD
IPC: H02M3/158
Filed: 2000-08-01
Granted: 2002-02-21
Abstract: Step-up/step-down switching regulators and pulse width modulation control therefor which can provide a high output current, high efficiency, use physically smaller inductor and transistors, have lower output voltage ripple, excellent line and load regulation stability and very fast transient response. The modulation control includes three operating states. The improved operating characteristics are obtained by including, as one of the operating states, the direct flow of current from the input of the regulator to the output of the regulator. This allows delivery of current from the inductor to the output a greater percentage of the time than in the prior art. An exemplary embodiment and exemplary method of operation are described.