baber/WOPTO huggingface dataset:
Patent TW-513667-B (TW)
Title: Computer system for quality control correlations
Inventor: SANKA RAVI SANKAR
IPC: G05B13/02
Filed: 1996-11-08
Granted: 2002-12-11
Abstract: A sterilizer data processing system for an automated contact lens manufacturing line that manufactures a plurality of contact lenses defining a lens lot, the manufacturing line including an automated sterilization station for sterilizing the lens lot after their manufacture, the automated sterilization station including a sterilizer process controller for controlling one or more phases of a sterilization process and periodically generating sterilization process data during each sterilization phase includes a device for receiving the sterilization process data from the sterilizer process controller and a device for automatically parsing the sterilization data into text information and sterilizer parameter information and further processing the text information and sterilizer parameter information to automatically generate a sterilization run report associated with a lot number for the sterilized lens lot.
Patent TW-332330-B (TW)
Title: The method for forming ultra-short channel field transistor
Inventor: WU SHYE-LIN
IPC: H01L21/768
Filed: 1997-05-20
Granted: 1998-05-21
Abstract: A method for forming ultra-short channel field transistor by using buried technology, it includes following steps: - Form field oxide on semiconductor substrate as insulating layer of MOSFET; - Form 1st amorphous silicon and pad oxide to cover substrate and field oxide; - Use lithography and etching technology to remove portion of pad oxide, and define gate area of MOSFET; - Proceed 1st ion implantation, and form barrier layer on substrate under the gate area, to decrease the leaking current in active area of MOSFET; - Form sidewall contained silicon-nitride material at both sides of pad oxide in gate area; - Proceed thermal oxidation process, to oxide 1st amorphous silicon in gate area into thick gate oxide; - Use etching method to remove thick gate oxide, and grow a thin gate oxide; - Deposit a 2nd amorphous silicon to cover the surface, and fill back to gate area, then proceed etching back, to remove portion of 2nd amorphous silicon layer to form gate structure; - Remove pad oxide, to proceed 2nd ion implantation to form source, drain and gate of MOSFET; - Proceed salicdation, and form salicide with low resistance on the surface of source, drain and gate.
Patent TW-328996-B (TW)
Title: Display system with CPU for display control
Inventor: LAY JIANG-JIUN
IPC: G09G5/00
Filed: 1997-05-24
Granted: 1998-04-01
Abstract: A display system with CPU for display control, which comprises a CPU, display memories, a latch and a display, which is characterized in that the CPU comprises a clock generator for generating sweeping signals of display control, when generating the sweeping signals, notifying the CPU to interrupt its normal access operation to undergo row addressing of memories in order to store the data of row addresses in the display memories, the data being locked by the latch to be displayed on the display during a display cycle.
Patent TW-353689-B (TW)
Title: Bearing capacity enhancement for piling applications
Inventor: ENGLAND MELVIN GERRARD
IPC: E21B10/32
Filed: 1997-09-25
Granted: 1999-03-01
Abstract: A continuous flight piling auger, in which the auger includes at least one retractable element which may be extended so as to project beyond the circumference of the flight or flights of the auger, characterized in that the at least one retractable element is located in a circumferential part of the auger flight or flights.
Patent TW-360831-B (TW)
Title: Mobil objects method for controlling mobile objects, method and apparatus for generating mobile object group, and memory medium for storing program for generating mobile object group
Inventor: MINAMI KAZUHIRO
IPC: G06F15/163
Filed: 1997-10-14
Granted: 1999-06-11
Abstract: Provided is an efficient mobile agent that requires only a short processing time and that can reduce to the minimum the employment of other resources. According to the present invention, a template is provided by which complicated activities performed by a mobile agent are sorted into basic activity patterns. The template is linked to he execution of an activity that occurs at a place before any moment is initiated and to the execution of an activity that occurs after a movement causes. In accordance with its type, the template defines an instruction to be executed before and after a movement, and transmits it to the mobile agent. In response to the instruction, the mobile agent prepares a clone, moves to another place, or fuses cone. In addition, a plan object held in the mobile agent specifies the sequential order for the execution of templates and activities.
Patent TW-363177-B (TW)
Title: Non-homogeneous second order perspective texture mapping using linear interpolation parameters
Inventor: LARSON MICHAEL
IPC: G06T17/00
Filed: 1997-12-30
Granted: 1999-07-01
Abstract: In a computer system having a host processor, a peripheral graphics device, a display screen, and a memory, a non-homogenous second order perspective texture mapping process. Polygon coordinates, a(m,n), defining a texture polygon, are received. The texture polygon includes span regions. A span value, j, is set to an initial value to designate an initial span region of the texture polygon in (m,n) polygon coordinate space. The total number of rows, is determined for the current span region of the polygon. The total number of polygon coordinates in the current row of the texture polygon is determined. An (xy) display coordinate, corresponding to the current polygon coordinate, am,n is set by translating from (m,n) polygon space to (x,y) display coordinate space. Texture coordinates, u(am,n) and v(am,n), are determined, according to the present invention, for each polygon coordinate, am,n, using linear interpolation based on a set of relationships that utilize the above parameters without using a repetitive divide operation.
Patent TW-441198-B (TW)
Title: Quantization matrix for still and moving picture coding
Inventor: SHEN SHENG MEI
IPC: H04N7/30
Filed: 1998-02-07
Granted: 2001-06-16
Abstract: An encoder and a decoder for still and moving picture are disclosed. The encoder has a memory for storing a default quantization matrix including a plurality of quantization elements having predetermined values. Also, a generator is provided for producing a particular quantization matrix after a number of frames. The particular quantization matrix is read in a predetermined zigzag pattern, and the reading is terminated at a selected position which is in the middle of the zigzag pattern. An end code is added after the read quantization elements of a former portion of the particular quantization matrix. The quantization elements in the default quantization matrix are read in the same zigzag pattern from a position immediately after the selected position, and producing a latter portion of the default quantization matrix. The former portion of the particular quantization matrix and the latter portion of the default quantization matrix are synthesized to form a synthesized quantization matrix.
Patent TW-448049-B (TW)
Title: Use of a 7Α-methyl-17Α-ethynyl-estrane derivative for the treatment of atherosclerosis
Inventor: MEULEMAN DIRK GERRIT
IPC: C07J1/00
Filed: 1998-02-24
Granted: 2001-08-01
Abstract: The invention relates to the use of a 7Α-methyl-17Α-ethynyl-estrane derivative having the general formula I, wherein R1=H(OR3) or O; R2=H or (C1-18)acyl; R3=H or (C1-18)acyl; and the dotted line represents a double bond in the 4,5- or the 5,10-position for the manufacture of a medicament for the prophylaxis or the treatment of atherosclerosis.
Patent TW-497064-B (TW)
Title: An usage status transmission method and its associated device
Inventor: MAEMURA HIROYUKI
IPC: G06F13/40
Filed: 1998-03-23
Granted: 2002-08-01
Abstract: This invention introduces an usage status transmission method device to solve the problems associated with conventional devices. For the conventional device, even the device is in nonuser status, the main computer must perform the same communication processing as it is in the status of being used. Therefore, the problem that the processing load of the main computer could not be reduced takes place. The device in this invention connects a pull-up resistor to a pull-up source to set the device in the status of being used and disconnects the aforementioned pull-up source to set the device in nonuser status. By using this method, the device responds to the commands from the CPU of the device.
Patent TW-398029-B (TW)
Title: Exposure device, method of manufacturing the same and the electric circuit
Inventor: NISHI KENJI
IPC: G03F7/20
Filed: 1998-04-17
Granted: 2000-07-11
Abstract: This concerns an exposure device. The electricity device, which is used to configure the reflection objects using fixed or movable mode near the projective optical system lens placed in the projective exposure device, ejects the measured light beam. The light beam has been calibrated for the light exposure wavelength from the optical system or its side. According to the reflective light beam's intensity, the light objects around the lens can detect its electro-optical characteristics. The penetration or reflection decay value of the corresponding projective optical system change with time is measured. The measured output can modify the sensor base exposure condition accordingly to avoid the poor control of the exposure quantity. The lack of precision control is caused by the change of either penetration or reflection decay value in the projective optical system of UV or luminance optical system exposure device.
Patent TW-527355-B (TW)
Title: Inhibitors of farnesyl protein transferase
Inventor: BHIDE RAJEEV S
IPC: C07D403/12
Filed: 1998-05-26
Granted: 2003-04-11
Abstract: Disclosed are quinoline and benzazepine derivatives that inhibit farnesyl-protein transferase (FTase) and the farnesylation of the oncogenic protein Ras. Thus, the compounds are useful as anti-cancer agents. The compounds are also useful in the treatment of diseases other than cancer.
Patent TW-417029-B (TW)
Title: Connecting device, particularly for eyeglasses
Inventor: SIMIONI LUCIANO
IPC: G02C5/22
Filed: 1998-05-29
Granted: 2001-01-01
Abstract: A connecting device, particularly for mutually connecting components of eyeglasses such as temples and a front and/or a lens and a lens and/or an eyewire and an eyewire and/or a temple and a temple. The device is constituted by at least one element which is detachably associable, with an interlocking action, with at least one of the components, in contrast with at least one flexible element, and can be pivoted to the other component. The device is structurally simple, easy and straightforward to assemble, and at the same time allows to achieve, for example, the extrawide opening of the temple at a low cost and without seizing.
Patent TW-393758-B (TW)
Title: Method of fabricating semiconductor chips with silicide and implanted junctions
Inventor: PREIN FRANK
IPC: H01L27/105
Filed: 1998-07-21
Granted: 2000-06-11
Abstract: A method of fabricating a semiconductor device includes the steps of providing a semiconductor chip (10) with a memory area (22) and a logic area (26). The memory area (22) and a logic area (26) each have gate structure (50) formed therein. The step of sequentially forming silicided junctions (44) in the logic area (26) and implanted junctions in the memory area (26) is also included.
Patent TW-396247-B (TW)
Title: Cross flow fan
Inventor: IKEDA TAKASHI
IPC: F24F1/0325
Filed: 1998-08-11
Granted: 2000-07-01
Abstract: This is a cross flow fan with less noise during operation. A volute-portion starting radius, i.e., the length of a segment O-F1 at a volute-portion starting point F1, is R1. A maximum volute radius, i.e., the length of a segment O-F2 at the outlet-portion starting point F2, is RM. A maximum volute angle, i.e., an angle formed by the segment O-F2 and the segment O-F1, is <alpha>m. Such a point on the volute portion 10b that its distance to the center O of the rotating shaft is RJ = (R1+RM)/2 and an angle <alpha>J formed by, on the one hand, a segment connecting that point and the center O of the rotating shaft and, on the other hand, the segment O-F1 is <alpha>M/2 (= F1-O-FJ) is FJ. A volute portion of a scroll casing is formed into such a circular arc that R1 < RJ < RM and that circular arc passes through the points F1, FJ, and F2.
Patent TW-428311-B (TW)
Title: Manufacturing method for embedded DRAM
Inventor: LIAU KUAN-YANG
IPC: H01L21/8234
Filed: 1998-08-25
Granted: 2001-04-01
Abstract: A manufacturing method for embedded DRAM is provided. The gate of DRAM is composed of tungsten silicide and polysilicon. The logic gate is composed of self-aligned silicide and polysilicon. The depths of both polysilicon layers are different. The present invention comprises using the first photoresist to define the patterns of DRAM gate and logic gate and performing an etching process to form the DRAM gate structure; then, using the second photoresist to overlay the DRAM circuit area; using residual silicon nitride, tungsten silicide and the second polysilicon, remained after the first photoresist photolithography process, as the etching mask and keeping the first polysilicon underneath to form the logic gate. The invention only needs two photoresist to define the DRAM gate and logic gate for reducing the processing difficulty and the manufacturing cost.
Patent TW-482721-B (TW)
Title: Method polymer article having a hydrophilic surface and process for producing the same
Inventor: YASUDA TOKUGEN
IPC: C08J5/00
Filed: 1998-09-30
Granted: 2002-04-11
Abstract: A molded polymer article comprises a main molded body having on the surface thereof a hydrophilic polymer layer, the article being obtained by polymerizing both a monomer having a hydrophilic group and coated on the surface of a hydrophilic mold, and a polymerizable composition consisting essentially of a monomer and/or oligomer and placed in the mold. The hydrophilic polymer layer has excellent adhesiveness to the main body of the molded polymer article and excellent durability, so that the high hydrophilic property can be maintained, even when the article is exposed to external forces such as friction, over a long period of time. The molded articles are therefore useful as, in particular, contact lenses.
Patent TW-392165-B (TW)
Title: Multi-level nonvolatile semiconductor memory device with circuit for adjusting data sensing time
Inventor: CHOI BYENG-SUN
IPC: G11C11/56
Filed: 1998-11-06
Granted: 2000-06-01
Abstract: Disclosed herein is a multi-level nonvolatile semiconductor memory device, which comprises the dummy cell array, the dummy cell sense amplifier circuit, the sensing time control signal generating circuit and the sensing period signal generating circuit. According to this configuration, each sensing period of a data reading operation is automatically determined by means of those, so that each sensing period (time) is optimized even though the amount of cell current flowing through each cell differs at the data states from each other under a constant gate-source voltage Vgs of each cell transistor. Therefore, a sensing margin of each data state is ensured and such problems as current consumption and lower operation speed are prevented, so that a reliability of the multi-level nonvolatile semiconductor memory device is improved.
Patent TW-386062-B (TW)
Title: Forming, filling and sealing machine for standing pouch
Inventor: TSURUTA ORIHIRO
IPC: B65B9/20
Filed: 1998-11-19
Granted: 2000-04-01
Abstract: A forming, filling and sealing machine comprises three sealing mechanisms for heat sealing a film, a folding mechanism for inwardly folding the width direction middle part of the film along the longitudinal direction of the film, and an injection pipe for injecting in filling materials. A first sealing mechanism heat seals a long sheet film to be carried downwards with both side ends overlapped with each other, the heat sealing being applied to the overlapped both side ends along the longitudinal direction of the film. A second sealing mechanism heat seals at least the top of two ridge portions formed by the folding mechanism in the film along the longitudinal direction of the film. A third sealing mechanism is disposed below the injection pipe for horizontally heat sealing the film and cutting the heat sealed portion.
Patent TW-442658-B (TW)
Title: Method and equipment for optical testing an electrical element on a device-head
Inventor: REIMANN GUNTER
IPC: H05K13/04
Filed: 1998-11-26
Granted: 2001-06-23
Abstract: A suction-pipe (5) of the device-head (1) together with a suctioned element (6) will be moved through the front of a liner sensor (7) which extends itself parallel to the axis direction. Said sensor (7) is arranged so that the free end of said suction-pipe (5) and the whole element (6) can reach the sensor-area. In an electronic calculating-device (11), the sensor-value of the empty suction-pipe (5) is compared with the sensor-value of the suction-pipe (5) that is provided with an element (6). From the difference the existence and/or height of said element (6) can be determined with a simpler way.
Patent TW-444203-B (TW)
Title: Method for protecting an over-erasure of redundant memory cells in nonvolatile memory semiconductor devices
Inventor: CHOI KI-HWAN
IPC: G11C16/06
Filed: 1998-12-23
Granted: 2001-07-01
Abstract: The disclosure is a method for protecting an over-erasure in a nonvolatile memory device having a plurality of sectors, each sector including a main field and a redundant field. The method includes the steps of, programming memory cells included the main and redundant field, erasing the memory cells included the main and redundant field, and programming over-erased cells of the memory cells included the main and redundant field. The main and redundant fields are included in a sector.
Patent TW-404006-B (TW)
Title: The manufacturing method of dielectric layer
Inventor: LIOU JR-JIAN
IPC: H01L21/76
Filed: 1999-01-06
Granted: 2000-09-01
Abstract: A manufacturing method of dielectric layer; form and define the electric conductive layer on the provided semiconductor substrate. Form a liner layer utilizing unbiased noncooling high density plasma to cover the semiconductor substrate, the electric conductive layer and the spacer. Next, form a dielectric layer by utilizing high density plasma chemical gas phase deposition method to fill the spacing between the electric conductive layer.
Patent TW-410354-B (TW)
Title: Hybrid-type magnet and stepping motor including same
Inventor: OCHIAI YASUZUMI
IPC: H02K37/12
Filed: 1999-01-26
Granted: 2000-11-01
Abstract: A hybrid-type magnet capable of exhibiting significantly increased attractive force while minimizing current consumption, to thereby attain energy savings. The hybrid-type magnet includes an electromagnet which includes a core made of a magnetic material and formed to have a U-shape and an excitation coil wound on the core, and a bar-like engagement member which includes a permanent magnet and magnetic members arranged so as to interpose the permanent magnet therebetween and is closely joined to outer ends of arms of the core while extending between the outer ends of the arms. The magnetic members of the engagement member are each constructed so as to have a saturation magnetic flux density greater than that of the core.
Patent TW-426875-B (TW)
Title: Loading port of semiconductor substrate processing device and the trolleys for loading port
Inventor: YOSHIKAWA AKIRA
IPC: H01L21/02
Filed: 1999-01-28
Granted: 2001-03-21
Abstract: The present invention relates to the loading port of semiconductor substrate processing device and the trolleys for the loading port, especially to the loading port of semiconductor substrate processing device and the trolleys for the loading port suitable for processing the 12-inch (30 cm) semiconductor wafers used more frequently from now on. The present invention is a kind of trolley of the loading port for the movement of the loading port of the semiconductor substrate processing device and comprising the structure of loading port for the transmission by the trolley. The invention is composed of: the wafer tray for loading and depositing the wafers in the semiconductor substrate processing device; a retainer portion engaged with the arm 23 of the trolley of the loading port for moving the loading port in the loading port of the cap for opening and closing the wafer tray. The trolley of loading port for moving into the loading port 11 which comprises: the body 30 which can be opened on the surface at the front side; and a pair of arms 23 configured on top of the body and slidable in front of the body and engaged with the retainer portion of the loading ports.
Patent TW-437241-B (TW)
Title: Melodic alerts for communications device
Inventor: JONES RICHARD HOWELL
IPC: H04W88/02
Filed: 1999-03-24
Granted: 2001-05-28
Abstract: A point-to-point communications device (SS) which is capable of generating melodic alerts, each alert being generated using numeric data in a received message. The device includes a controller (36) programmed with an algorithm for dividing the digits in a decoded message into one or two digit fields. One digit fields are used respectively to determine the tempo (t) and the number of times (p) a sequence of notes is played and two digit fields are used to select notes.
Patent TW-504903-B (TW)
Title: Frequency shift detection circuit with selectable granularity
Inventor: BYRN JONATHAN WILLIAM
IPC: H03D13/00
Filed: 1999-04-06
Granted: 2002-10-01
Abstract: A frequency shift detection circuit for detecting a frequency shift between a first signal and a second signal includes two or more delay circuits coupled to one another in series and two or more comparison logic circuits. The first delay circuit in the series receives one of the first and second signals and produces a delayed replica. Each of the other delay circuits receives the delayed replica produced by the previous delay circuit in the series and produces a further delayed replica. Thus, the signal produced by each delay circuit is delayed from the original signal by a different amount. Each comparison logic circuit receives one of the delayed replicas and receives the other one of the first and second signals, i.e., the one that is not received by the delay circuits. In response, the comparison logic circuit produces a frequency shift detection signal when it detects a phase difference between that other one of said first and second signals and the delayed replica. By selecting or tapping one of the outputs of the comparison logic circuits, a user can select the detection granularity.
Patent TW-432003-B (TW)
Title: Device and method for handling substrates
Inventor: SPEER ULRICH
IPC: B25J15/08
Filed: 1999-04-16
Granted: 2001-05-01
Abstract: The invention relates to a device and method for handling substrates which have an inner hole, having an inner gripper and an outer gripper. Said inner gripper takes the form of an inner hole gripper. According to the inventive method for handling substrates with an inner hole, a first substrate is grasped by the inner hole gripper, brought into contact with an outer gripper and grasped by the outer gripper. The inner hole gripper is released and moved through the hole in the first substrate before grasping a second substrate.
Patent TW-417290-B (TW)
Title: Relaxed layout for storage nodes for dynamic random access memories
Inventor: YOSHIDA HIROYUKI
IPC: H01L21/8242
Filed: 1999-05-12
Granted: 2001-01-01
Abstract: A memory cell structure (10) includes a plurality of bit lines (12) and intersecting word lines (14). Bit line contacts (16) are spaced evenly apart on an associated bit line (12). A plurality of storage nodes (20) and associated storage node contacts (18) are provided. Storage nodes (20) and storage node contacts (2) are spaced evenly apart along the associated bit line (12). The storage nodes (20) and storage node contacts (18) are offset with respect to storage nodes (20) and storage node contacts (18) placed along adjacent bit lines (12).