baber/WOPTO huggingface dataset:
Patent JP-H0228969-A (JP)
Title: Trench wiring structure and semiconductor structure utilizing it
Inventor: HARARI ELIYAHOU
IPC: H01L21/8244
Filed: 1989-04-25
Abstract: PURPOSE: To form a highly miniaturizable load resistor by forming a vertical trench wiring region between the top surface of a wiring material region and buried region, the wiring material region's top surface being adjacent to the top surface of a semiconductor film in a trench. CONSTITUTION: Drain diffusion regions 512a are connected to vertical polycrystalline Si resistors 510a confined in trenches 560a. The side wall 528a of the trench is insulated by a thin insulation film 518a made of SiO2 , etc. The bottom 517a of the trench 560a extends in an n<+> buried film 516a. The polycrystal Si resistor 510a perfectly fills up the cavity of the trench but its top face 531a is slightly recessed into the Si surface. The top face of the resistor 531a physically directly contacts to a conductive film such as n<+> doped polycrystal Si 522a. This realizes a good electric contact between the drain region 512a and one of terminals of the resistor 531a.
Patent JP-H06317808-A (JP)
Title: Liquid crystal display element and its production
Inventor: YAMADA NOBUAKI
IPC: G02F1/1339
Filed: 1993-05-06
Abstract: PURPOSE:To prevent an active element from being deteriorated even if the element is irradiated with light when produced. CONSTITUTION:When a photopolymerizable resin in a mixture injected into a cell is cured, TFT 2 is not irradiated with light since the TFT 2 is covered with a photomask 5, a light-shielding layer or another light-shielding layer. Meanwhile, an aligning marker is formed on the photomask 5 and a substrate, and the photomask and substrate 5 are aligned based on the marker. Especially, when one of the markers is drawn out of a part of the other, both markers are superimposed on each other without any clearance in between, and the photomask 5 is precisely aligned with the substrate.
Patent JP-S5731248-A (JP)
Title: Circuit error detecting system fo data totalizing system
Inventor: MIMATSU AKINORI
IPC: H04L12/44
Filed: 1980-07-31
Abstract: PURPOSE:To increase the reliability of a totalized file in an on-line and real-time data totalizing system, by installing a totalizing process part at the terminal side to feed the totalized value to the center side along with each data and performing the detection and recovery of the data error caused by a circuit error. CONSTITUTION:Here the collection of data about the pari-mutuel tickets sold at a race track is taken as an example. The data, produced every time the pari-mutuel tickets are sold through ticket vending machines a-1, a-2-a-n installed at polling booths 10, 11-1n in race tracks 1, 2-n, are collected at a central totalizing process station 20 and via a communication controller 100 and a circuit E. In this case, a totalizing process part 110 using a microcomputer, etc. is installed at the race track side to collect the data at every prescribed number of data or every prescribed time. This value of totalization is sent to the station 20 along with an individual data, and a comparison and collation is carried out at the center side between the value of totalization and the totalization of each data. Thus the data error due to a circuit error is detected, and an error caused by the retransmission of data can be recovered.
Patent JP-H05279149-A (JP)
Title: Method for surface decoration of cement-based substrate
IPC: B44C1/17
Filed: 1992-03-30
Abstract: PURPOSE:To firmly fix a decorative sheet on the surface of a cement-based substrate and form a transparent clear coating film on its surface in a few steps. CONSTITUTION:The surface of a cement-based substrate 10 is coated with a liquid coating material 12 and an agent-permeable decorative sheet 14 composed of a material such as paper or cloth is subjected to impregnation treatment in parallel to the coating. The decorative sheet 14 subjected to the impregnation treatment is then placed on the surface of the cement-based substrate 10 subjected to the coating treatment with the coating material 12. The decorative sheet 14 is applied to the surface of the cement-based substrate 10 by the bonding action following the gelation of the coating material 12. The coating material 12 is then cured.
Patent JP-H043314-A (JP)
Title: Magnetic recording medium and production thereof
Inventor: UEDA HIDEYUKI
IPC: C09D127/06
Filed: 1990-04-20
Abstract: PURPOSE:To obtain the magnetic recording medium having excellent durability by mixing three kinds of binders varying in the reactivity (gel molar fraction) from a crosslinking agent (polyisocyanate compd.) and specifying the reactivity of the binder compsn. and the crosslinking agent to >=80%. CONSTITUTION:The three-dimensional network structure which is insoluble and inmeltable in a solvent is formed by the addition reaction between functional groups (isocyanate group and hydroxyl group) and consequently, the tough coated films are formed and the durability of the magnetic layer is improved. The generation of flaws on the surface of the magnetic layer and the generation of drop-outs by the powder dislodged from the magnetic layer are obviated. Further, three kinds of the binders are added in order of the lower reactivity with the crosslinking agent at the time of preparing a magnetic coating material, by which the adsorption layer effective for the dispersion of the magnetic particles is first adsorbed by the binder having the low reactivity with the crosslinking agent without strongly adsorbing and fixing the binder having the good reactivity with the crosslinking agent. The durability of the magnetic layer is, therefore, greatly improved while the electromagnetic conversion characteristics are assured.
Patent JP-H11306755-A (JP)
Title: Semiconductor storage
Inventor: MURANAKA MASAYA
IPC: G11C11/409
Filed: 1998-04-16
Abstract: PROBLEM TO BE SOLVED: To obtain a high-speed semiconductor storage by reducing the number of the elements of a column bank selection switch, layout area, and the load capacity of a column bank selection signal in an I/O line selection system. SOLUTION: In a system that is composed of a DRAM core that is a direct RAM bus specifications 64M.DRAM, is divided into a plurality of banks, and at the same time consists of a memory array where a plurality of the banks can be activated, and an interface logic circuit, can select two sense amplifiers SA0 and 1 (SA2 and 3) by one row selection signal line YS0 (YS1), and connects the sense amplifiers SA0-SA3 to two-system I/O lines IO0 and IO1 by one-system column bank selection signal line CBS, row selection switches SY0 and SY2 and SY1 and SY3 are commonly connected to column bank selection switches SC0 and SC1, respectively.
Patent JP-S60251552-A (JP)
Title: Recording and reproducing device
Inventor: UCHIUMI SATOSHI
IPC: H04N5/782
Filed: 1984-05-25
Abstract: PURPOSE:To prevent disturbance in a reproduced picture before and after an editing point, by inversionally controlling the phase of frequency-halved signals thereafter, when the phase relation of a head rotating signal to a field signal generated from the synchronizing signal of input video signals, is not in a previously fixed condition. CONSTITUTION:Input video signals are supplied to an H synchronizing separator 6, and an H synchronizing signal A is supplied to monostable multivibrators (MMV) 12 and 13. And the output C of the multivibrator 13 is supplied to a gate 15. At the same time, the signal A is also supplied to a V synchronizing separator 7 and a V synchronizing signal D is supplied to the other input of the gate 15 after the signal D is changed to an output E by an MMV14. The output pulse F of the gate 15 is generated at the even field of the input video signals. Upon receiving a drum locking signal, a gate 17 is opened and the output of a gate 16 indicating the phasic relation between the signal F and an SWP signal G is supplied to an MMV18. The MMV18 outputs a pulse H or J and inverts the phase of the frequency dividing output I or K of an FF8 thereafter. Therefore, disturbance in reproduced pictures before and after an editing point can be prevented.
Patent JP-H10300797-A (JP)
Title: Optical fiber current sensor
Inventor: KUMEGAWA HIROSHI
IPC: G01R15/24
Filed: 1997-04-23
Abstract: PROBLEM TO BE SOLVED: To improve characteristics of measurement errors to vibrations and changes of surrounding temperatures in an optical fiber current sensor which has an optical fiber of a single mode wound around a conductor and measures a current running in the conductor from a rotational angle of a polarization plane of light in the optical fiber. SOLUTION: A plurality of point elements P1, P2... are provided via an equal distance at an optical fiber 12. The optical fiber 12 between the point elements is twisted in opposite directions at adjacent segments. Even when a vibration source and a heat source are located at any of one end part 11a and the other end part 11b of a bobbin 11, influences of a double refraction are negated and measurement errors can be reduced.
Patent JP-S60250014-A (JP)
Title: Resin for concentration
Inventor: ITOU HIROSHI
IPC: C08F20/00
Filed: 1984-05-28
Abstract: PURPOSE:The title resin which has water absorptivity varying with temperature and can be fractionated based on MW, prepared by water-insolubilizing a specified N-alkyl- or N-alkylene-substituted (meth)acrylamide polymer. CONSTITUTION:A (co)polymer obtained by (co)polymerizing an N-alkyl- or N- alkylene-substituted (meth)acrylamide monomer of formula I or II [wherein R1 is H or methyl, R2 is H, methyl, or ethyl, R3 is methyl, ethyl, or propyl, A is -(CH2)n or -(CH2)2-O-(CH2)2-, and n is 4-6] with, optionally, other copolymerizable monomers (e.g., acrylamide) in the presence of a polymerization initiator (e.g., ammonium persulfate) is water-insolubilized by heating to 60-250 deg.C.
Patent JP-S60250751-A (JP)
Title: Dialing control circuit
Inventor: MINEMURA YOSHIZOU
IPC: H04M1/50
Filed: 1984-05-28
Abstract: PURPOSE:To prevent incorrect dialing and to make keying operation easy by controlling directly the sending of an FM signal by a signal from a keyboard and opening a DC loop for a fixed period in accordance with the keying operation less than a prescribed period. CONSTITUTION:Termination is informed by a bell circuit BEL connected to line terminals L1, L2 and a DC loop is closed by a talking circuit TKC through a hock switch HS<1>, loop supervisory circuit LSC, diode bridge DB, power circuit PS, and a disconnection circuit CB. A control part CNT is initialized by the operation of a hock switch SH<2> to start control operation and take out the X and Y axis outputs from a keyboard KB. The operation of the keyboard KB is supervised by the control part CNT and the sending of an FM signal is directly controlled by a signal from the keyboard KB. When overlapped operation or operation less than the prescribed period is decided, a dial circuit DIC is controlled to stop the operation, the circuit CB is controlled and the DC loop is opened only for a fixed period to prevent the generation of incorrect dialing.
Patent JP-S61260909-A (JP)
Inventor: RONARUDO MAIKERU MAARU
IPC: B23G5/12
Filed: 1986-05-09
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H05298013-A (JP)
Title: Pressure-sensitive coordinate input device
Inventor: KISHIDA TAKESHI
IPC: G06K11/00
Filed: 1992-04-24
Abstract: PURPOSE:To provide the coordinate input device which has high durability and does not require any special parts by providing an operation processing means to calculate a pressed position on a coordinate instructing plate based on pressure detected by a pressure-sensitive means. CONSTITUTION:When one point on a transparent plate 12 is pressed by a pen, the force is distributed to four fixed points 14a-14d. The peripheries of the fixed points 14a-14d are bent corresponding to the force pressed to the respective points, and the outputs of distortion gauges 16a-16d are changed corresponding to the bending. The outputs of the distortion gauges 16a-16d are amplified by distortion interfaces 18a-18d and A/D converted. The result is dispatched to an operation processor 20 as a distortion output. The operation processor 20 calculates the coordinates instructed on the transparent plate 12. Further, the operation processor 20 drives a display controller 22, and a display position on the screen of a display device 10 corresponding to the coordinate position instructed on the transparent plate 12 is painted in black. Thus, a curve drawn on the transparent plate 12 can be displayed on the screen.
Patent JP-S596401-A (JP)
Inventor: JIEEMUZU UOKU FUAN YUTSUPU
IPC: F15B13/043
Filed: 1983-06-14
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H05299651-A (JP)
Title: Mosfet with back gate material
Inventor: FUNAKOSHI AKIHIKO
IPC: H01L29/78
Filed: 1992-04-24
Abstract: PURPOSE:To prevent conduction from a ground potential to a drain if an amplitude of a signal is deflected to a negative side and to eliminate a negative power source by reversely connecting a P-N junction between a substrate and an epitaxial layer 12 between a back gate electrode and a drain region. CONSTITUTION:If a mute control signal to be applied to a gate electrode 16 is ON in a MOSFET for constituting a muting circuit, an N-type channel layer responsive to a potential difference between a gate potential and a back gate potential is formed on an epitaxial layer 12 between a source region 13 and a drain region 14, the FET is saturated, and a potential of a drain is set to a ground potential. If the control signal is OFF, the channel layer is not formed. In this case, since a P-N junction 20 between the layer 12 and the region 14 and a Z P-N junction 21 between the layer 12 and a substrate 11 are inserted in an anti-series between a back gate electrode 19 and a drain 18, conduction from the ground potential is prevented.
Patent JP-S5630963-A (JP)
Title: N-pyridylaniline derivative, its preparation and agent for controlling noxious life
Inventor: NISHIYAMA RIYUUZOU
IPC: A01N43/40
Filed: 1979-08-22
Abstract: NEW MATERIAL:N-Pyridylaniline derivatives of formula I (X is H, halogen, lower alkyl, nitro, or trifluoromethyl; n is integer of 1W4).  
     EXAMPLE: N-(5-Chloro-2-pyridyl)-2,4-dinitro-6-trifluoromethylaniline.  
     USE: Agent for controlling noxious life. Especially effective to control the growth of insects, mites and germs which are harmful in agriculture and horticulture.  
     PROCESS: A compound of formula I is obtained by the reaction of a compound of formula II (Y is halogen or amino) with a compound of formula III (Z is halogen or amino, provided that Z is amino when Y is halogen and Z is halogen when Y is amino) in the presence of an acid acceptor, e.g. NaOH. 
     COPYRIGHT: (C)1981,JPO&Japio
Patent JP-H01277308-A (JP)
Title: Grooved magnetic head
Inventor: KURODA KAZUHIRO
IPC: G11B5/187
Filed: 1988-04-28
Abstract: PURPOSE:To obtain a magnetic head with dust removing grooves appropriate also for an economical narrow gap ring type by forming X-shaped grooves on the front part of a magnetic gap part on the medium sliding face of a soft magnetic material head core. CONSTITUTION:The X-shaped grooves 14 are formed on the front part in the magnetic head sliding direction of the gap part 2 for recording/reproducing the magnetic head sliding face. The width of the X-shaped grooves is several tens - several 100mum and the depth is 0 - several mum in a far part from the magnetic gap 2 or 10 - several tens mum in a near part and an angle formed by the two grooves is set up in accordance with the shape of a boundary line to which dust is stuck. Since the grooves are formed so as to be deepened in accordance with approach to the magnetic gap abutting part 2 of the head core blocks, an easily formed and economical magnetic head appropriated also for the narrow gap ring type can be obtained.
Patent JP-S61265086-A (JP)
Title: Method of cultivating protoplast
Inventor: FUJIMURA TATSUTO
IPC: C12N15/02
Filed: 1985-05-21
Abstract: PURPOSE:To introduce regeneration of plant, by cultivating a protoplast of a plant cell in a thin film of culture solution. CONSTITUTION:The surface of culture container is coated with a thin layer of a hydrophilic substrate, a layer of culture solution having 100-400mum is formed on the surface of the substrate, a protoplast is cultivated in the thin layer of the culture solution. A hydrophilic high polymer substance such as agar, alginic acid, gelatin, etc., is preferably used as the substrate. Medium MS, medium B5, medium N6, medium R2, etc. are used as the culture solution depending upon properties of the protoplast handled. Better results are obtained by the substrate layer with <=1mm, especially <=200mum.
Patent JP-H11287757-A (JP)
Title: Plastic-discriminating device
Inventor: YOSHIOKA SHOICHIRO
IPC: G01N21/359
Filed: 1998-04-01
Abstract: PROBLEM TO BE SOLVED: To easily, rapidly, and positively discriminate the type of plastic. SOLUTION: A device is provided with a light source 1a for emitting near infrared rays, a light source device 1 consisting of a light-shielding plate 1b and a condensing lens 1c, bandpass filters 2 and 3 for transmitting specific narrow-band wavelength light, infrared detectors 2 4 and 5, a data-processing device 6, a second condensing lens 8, a half mirror 9, and the like. In this manner, the bandpass filters 2 and 3 are set to specific two wavelengths with an interval near the extreme value of the light transmission rate characteristic of plastic to be discriminated from plastic such as vinyl chloride (PVC) and polyethylene telephthalate(PET), each quantity of transmission light is detected, and the difference is compared for each plastic type, thus easily, rapidly, and positively discriminate one type of plastic such as PVC from a plurality of plastic.
Patent JP-S5534459-A (JP)
Title: Hybrid integrated circuit
Inventor: KUSUNOKI KAZUO
IPC: H01L21/60
Filed: 1978-08-31
Abstract: PURPOSE: To increase electic power gain in high frequency and obtain good thermal coupling between a diode and a transistor by mounting a diode tip on an emitter metallized electrode and moreover shorting this electrode and an earth conductive layer.  
     CONSTITUTION: On an insulation substrate 27 the whole back surface of which is composed of an earth conductive layer are mounted a base metallized electrode 13, a collector metallized electrode 8 a transistor tip 9 is soldered on and emitter metallized electrodes 10, 10' between which is put an electrode 8. These electrodes 10, 10' are electrically connected with a conductive layer through a through hole 28. The electrodes 10, 10' are jointed by a bridge 11 while an emitter electrode, a base electrode on the transistor tip 9 are connected with a bridge 11 and an electrode 13 respectively through bridges 12, 14. A diode tip 24 is mounted as near as possible to the transistor tip 9 acting as a heat source. In this method it is possible to increase power gain in high frequency and moreover improve thermal coupling between a diode and a transistor. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-H04336434-A (JP)
Title: Manufacture of solid state imaging element
Inventor: YOSHIDA MITSUGI
IPC: H01J27/22
Filed: 1991-05-13
Abstract: PURPOSE:To provide a method of manufacturing a solid state imaging element which can reduce fluctuation in amount of ion implantation by ion beam scanning performed using an ion implantation apparatus of an electrostatic scanning system. CONSTITUTION:A photoresist pattern 5 is formed on a P-type diffused layer 2 and an oxide film 4 on a silicon substrate 1 and an N-type diffused layer 3 is then formed by the ion implantation using such photoresist pattern 5 as a mask. In this case, an ion beam spot is given a diameter ranging from 10mm to 20mm and has a circular shape to attain uniform current density. Ion implantation is performed by scanning ion beam scanning lines with such ion beam.
Patent JP-H09293687-A (JP)
Title: Laser annealing method of low-temperature polysilicon thin film transistor
Inventor: INOUE MITSUO
IPC: H01L21/20
Filed: 1996-04-26
Abstract: PROBLEM TO BE SOLVED: To realize polycrystalline Si of different mobility by annealing at a time by a method wherein a laser beam is made to form a pattern prescribed in shape on a substrate, the laser beam is relatively moved to the substrate, and all target area which is turned to polysilicon is irradiated with a laser beam. SOLUTION: A laser beam projected from an excimer laser oscillator 21 is made to form the images of points in a far field at required positions in required phase by a Fourier transform-type phase hologram provided between a lens 70 and a substrate 31, and the intensity distribution of the laser beam is optionally shaped corresponding to the required mobility of a target part which is required to turn to polysilicon. The laser beam is made to form a shaped pattern on the substrate 31, and the laser beam is relatively moved against the substrate 31 to irradiate all target area which is turned to polysilicon. By this setup, polycrystalline Si of various mobility can be obtained at the same time by annealing.
Patent JP-H09293413-A (JP)
Title: Conductive paste
Inventor: KIKUCHI JUNICHI
IPC: H01B1/22
Filed: 1996-04-26
Abstract: PROBLEM TO BE SOLVED: To provide conductive paste excellent in shaft life stability and capable of forming a wiring conductor excellent in thermosetting property, adhesiveness and conductivity by essentially incorporating, into the conductive paste, an alkyl-etherified phenol resin, amine salt of acid, conductive powder and an organic solvent. SOLUTION: A conductive paste essentially includes an alkyl-etherified phenol resin, amine salt of acid, conductive powder and an organic solvent. The conductive powder included in the conductive paste is desirably a composite conductive powder including flat conductive powder and undefined conductive powder. Furthermore, the conductive paste desirably includes an epoxy resin.
Patent JP-H08305985-A (JP)
Title: Alarm display system
Inventor: HAYAKAWA MASAHIRO
IPC: G06Q50/00
Filed: 1995-05-01
Abstract: PURPOSE: To display plural screens relating to a management point at the same time when an alarm is generated at the management point by making a multiwindow display where plural windows are displayed on one display screen. CONSTITUTION: An alarm input part 150 receives an alarm message in case of alarming from a slave station connected to a center 100, and expands the alarm message in a point management table 120. A window control part 180 sets the number of a relative screen for displaying a relative screen corresponding to information relating to the received alarm message on one screen on an alarm display device 310 by referring to the point management table 120 and a screen management table 130. A screen display part 190 displays the window specified according to the position information of the window. Relative screen data displayed in those windows are read out of a relative screen data storage part 140 and displayed on the alarm display device 310.
Patent JP-S589245-A (JP)
Title: Double cassette player
Inventor: TAKENAKA TAKASHI
IPC: G11B15/10
Filed: 1981-07-08
Abstract: PURPOSE:To simplify operation and to prevent erroneous operation by changing over an analog switch on the basis of the operation state of a playback operation button. CONSTITUTION:For the reproduction of the 1st cassette tape loaded at the 1st loading part 12a, a high-level signal appears at the reset output of an FF24 to activate an analog switch 23b. A playback button 13b, however, is not pressed so the 2nd cassette tape is not driven. When a playback button 13a pressed, the FF24 is set to make the analog switch 23b inactive, and also an analog switch 23a is made active. Through the operation of the playback operation button 13a, a cassette tape driving mechanism 21a drives the 1st cassette tape and a magnetic head 151 reproduces the tape to send its playback signal to an external output terminal 19 and the power amplifier 17 of a speaker 18 through an amplifier 152, an analog switch 23a, and an amplifier 16. Therefore, the operation is simplified and erroneous operation is prevented.