Patent GB-1179579-A (GB)
Title: Colour Television Receiver
IPC: H04N9/24
Filed: 1967-09-28
Abstract: 1,179,579. Colour television receivers. PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd. 28 Sept., 1967 [1 Oct., 1966], No. 44236/67. Heading H4F. In a colour television receiver comprising a beam-indexing cathode-ray tube and a converting circuit for deriving from the indexing signal fi a writing signal fw = αfi (where α is a a desired multiplying factor) and on which a colour signal is modulated in a manner suitable for reproduction by the tube, the converting circuit comprises a first mixing stage 19 to which the indexing signal is applied over a first path 17 and a second path 18 (termed a phase compensation circuit) which includes a frequency divider 22, and the arrangement being characterized in that the second path comprises at least two parallel branches 21, 23, one of which includes the frequency divider. The Specification includes a detailed analysis of delay conditions which must be met in the signal paths of the converting circuit if the writing signal is to maintain the phase determined by the indexing signal whereby accurate colour reproduction will be obtained. The delays are primarily determined by filters 31-35 which are included in the signal paths. The arrangement according to the invention permits the frequencies in the signal paths to be so chosen that the filters may be of large bandwidth, and hence short delay, whereby the overall system has a rapid response. The arrangement shown in Fig. 3 which has two parallel branches in the second signal path 18 may be designed to compensate for static phase error and dynamic phase error due to linear variations. It is stated that additional parallel branches may be provided for compensation for phase errors due to gradratic and higher order variations. The arrangement shown in Fig. 3 is described as applied in a receiver where the indexing signal fi = 12 mc/s. and the writing signal fw = 8 mc/s. The frequency divider 22 divides by ¥ whereby the signal at 23 equals 16 mc/s. The divider is controlled by a " running-in " signal fh in a known manner at the commencement of each scan so as to establish its operation in the correct phase. A mixer 28 combines a 4À5 mc/s. colour signal fs, chr with the 12 mc/s. signal in branch 21 to produce a sum signal of 16À5 mc/s., whilst a mixer 29 combines a colour reference signal fs with the 16 mc/s. signal from the frequency divider to produce a sum signal of 20À5 mc/s. The difference of the two sum signals is then obtained by a further mixer 20 to furnish a 4 mc/s. signal which is applied to the first mixer 19 together with the original indexing signal over the first path 17. Mixer 19 furnishes a difference signal which is at the desired 8 mc/s. for writing signal fw and which carries the colour modulation from the signal fs, chr applied to mixer 28. By consideration of the undesired signal components which arise in the arrangement, and which it is the purpose of filters 31-35 to eliminate, it is shown that the filters may be of wide bandwidth and hence short delay. The delays in the two branches of path 18 are each made equal to twice the delay around the remainder of the beam indexing control loop from the output of mixer 19 via the cathode-ray tube to the input of the converting circuit. A modification is described in which divider 22 divides by 3/2 to produce a signal of 8 mc/s. at 23. The filter requirements again permit short delays which may be identical with those described above. Reference is also made to an arrangement using a division ratio of 3/2, but in which multiplication factors of 2 are required in the first path 17 and the other branch 21. The presence of a common multiplying factors of 2 in all the signal paths may be met by a frequency doubler in the input signal path 8 to the converting circuit. Mixing stages 28 and 29 may both be inserted in one of the branches. The connections of signals fs, chr and fs to stages 28 and 29 may be transposed.