baber/WOPTO huggingface dataset:
Patent JP-H02211243-A (JP)
Title: Exothermic substance adsorbing body
Inventor: HIRAYAMA CHUICHI
IPC: B01J20/26
Filed: 1989-09-22
Abstract: PURPOSE:To enhance selective adsorbability by preparing an exothermic adsorbing body from polyamino acid having only a modifying group having an aliphatic group and/or an aryl group contained in the terminal of the side chain and/or main chain thereof according to circumstances. CONSTITUTION:An exothermic substance adsorbing body is prepared from polyamino acid having only a modifying group such as an alkyl group, an aryl group, an ether group or an ester group contained in the terminal of the side chain and/or main chain thereof and/or a modifying group having an aryl group, an aralkyl group, an ether group or an acyl group contained therein according to circumstances. There is no special limit in the polymerization degree of polyamino acid or a polyamino acid derivative but said polymerization degree is pref. 100 or more, generally, 100-1000 from the aspect of strength. The exothermic substance adsorbing body can be used in a shape of a spherical particle, a fiber, a film or a powder.
Patent JP-2000091838-A (JP)
Title: Manufacture of synthetic resin trans reflector
Inventor: VANDENDOLDER RONALD A
IPC: H01P11/00
Filed: 1999-09-01
Abstract: PROBLEM TO BE SOLVED: To realize a new method for easily manufacturing a trans reflector with high reflecting grid precision. SOLUTION: This method comprises a process for adhering plural stripes constituted of conductive members arranged in parallel at intervals on one surface 40a of a synthetic resin carrier film 40, process for placing a film 40 on the surface of a first molding half-body 24 for deciding the desired recessed inner curved surface of a trans reflector, process for deciding the desired protruding outer curved surface of the trans reflector with an interval with the film 40, and for combining the first molding half-body 24 with a second molding half-body 26 provided with a cavity 28 for molding, and process for introducing flowable synthetic resin to the cavity 28 for molding, and for forming a desired trans reflector element having the plural parallel stripes arranged on the recessed inner curved surface 12.
Patent JP-H1089381-A (JP)
Title: Clutch device
Inventor: MATSUMOTO SHOGO
IPC: F16D25/0638
Filed: 1996-09-19
Abstract: PROBLEM TO BE SOLVED: To smoothly shift from an engaged state to a released state in a clutch device adopting a cam mechanism. SOLUTION: A first clutch member 101 is spline-connected to a transmission case 100. A second clutch member 201 with frictional members applied to both sides thereof and an intermediate plate 202 with a frictional member applied only to the cam side are spline-connected to a hub 200. The second clutch member 201 is sandwiched between the first clutch members 101. The intermediate plate 202 is arranged between the first clutch member 101 and a cam member. Margin of the spline-connection between the second clutch member 201 and the hub 200 is larger than the margin of the spline-connection of the intermediate plate 202 to the hub 200.
Patent JP-2000073661-A (JP)
Title: Fixing structure of corner sash
Inventor: HATAE TOMOYA
IPC: E06B1/56
Filed: 1998-09-02
Abstract: PROBLEM TO BE SOLVED: To provide a fixing structure at a time when sash frames are butted under an orthogonal state from both sides and a projecting edge for fixing the sash frame is pinched by an independent post arranged to the butt section in a bay window and an outside angle section in the arrangement of a sash window for a residence. SOLUTION: In a structure in which sash frames 6, 7 projected from both orthogonal directions are fixed mutually onto an independent post 5 at an outside angle corner, a column-side fixture 1 is welded to the independent post 5, female-screw projecting sections, to which sash-side fixtures 2, 3 are screwed, cross at right angles to project to the column-side fixture 1, the sash-side fixtures 2, 3 are screwed to the female-screw projecting sections by clamp bolts 12, 13, and the projecting edges 6a, 7a for fixing of the sash frames 6, 7 are pinched among the sash-side fixtures 2, 3 and the orthogonal side faces of the independent post 5.
Patent JP-2000076482-A (JP)
Title: Three-dimensional computer graphics compositing method
Inventor: IKUTA MIKIO
IPC: G06T19/00
Filed: 1998-09-02
Abstract: PROBLEM TO BE SOLVED: To enhance a real world expression power, to facilitate editing job and to improve the visual point follow-up performance by compositing only a background from the light beam information and compositing an object other than the background from three-dimensional model which is produced from photographs. SOLUTION: The photographs are photographed to produce a three- dimensional model for a model production object, and the areas where the model production objects are photographed are segmented by the image processing software in regard to all photographs which are used for production of the three-dimensional model. And, the image information is developed into a light beam information by means of the photographs from which the areas are segmented. Thus, the data on a background area are obtained. Then, a three-dimensional computer graphics background shown in a diagram is composited from the light beam space information. The three-dimensional model is drawn on the computer graphics background to composite the three- dimensional computer graphics.  In such a way, only a background is composited from the light beam information and an object other than the background is composited from a three-dimensional model which is produced from photographs.
Patent JP-S62108345-A (JP)
Title: Data communication circuit
Inventor: YAMAMIZU HIDETAKA
IPC: G06F15/16
Filed: 1985-11-07
Abstract: PURPOSE:To decrease the number of parts of an equipment, and to reduce the burden of a CPU by coupling plural CPUs through a first-in first-out FIFO memory, and providing a means for initializing the FIFO memory in accordance with a command of one CPU. CONSTITUTION:A CPU selects an FIFO memory 3 having necessary and sufficient capacity in accordance with the quantity of data to be delivered, and buffering of the data is executed in the FIFO memory 3. Accordingly, each CPU can execute access to the FIFO memory 3 without having a waiting time. Also, an internal state of the FIFO memory 3 is varied automatically, and its internal state can be known by a full signal F and an empty signal E, therefore, a command register becomes unnecessary. Moreover, in order to initialize the FIFO memory 3, a reset input R which is supplied to an address pointer is supplied to the FIFO memory 3 through a register 4 from the second CPU side.
Patent JP-2000077359-A (JP)
Title: Semiconductor device and manufacture thereof
Inventor: TAKAMORI MASUNORI
IPC: H01L21/203
Filed: 1998-09-02
Abstract: PROBLEM TO BE SOLVED: To prevent changes in electro-migration(EM) life and unexpected manufacture of a product having a deteriorated wiring reliability, even when conventional step conditions such as a film formation pressure of an aluminum alloy film are controlled. SOLUTION: When a film of aluminum alloy is formed on a semiconductor substrate by a sputtering process, partial pressure ratios of nitrogen and oxygen included in an argon gas during the sputtering film formation to the entire sputtering gas are controlled to be about 51 ppm or less and about 11 ppm or less respectively to thereby form a film of aluminum alloy. Or the film of aluminum alloy is formed so that the amounts of nitrogen, oxygen and hydrogen included in the film controllably adjusted to be about 0.003 atomic % or less, about 0.01 atomic % and about 0.006 atomic % respectively.
Patent JP-H05302168-A (JP)
Title: Device for treating oxide coating applied on carrier
Inventor: TOOMASU KURUTSUKU
IPC: C23C14/58
Filed: 1992-09-17
Abstract: The invention relates to a method for the aftertreatment of an oxide coating, and specifically an SiOx coating on a synthetic film. In this aftertreatment the oxide coating is exposed to a plasma whose particles effect positive changes of the oxide coating.
Patent JP-H08113559-A (JP)
Title: 24-oxo-22-oxavitamin d3 derivative
Inventor: KUBODERA NOBORU
IPC: A61K31/59
Filed: 1995-08-22
Abstract: PURPOSE: To obtain a vitamin d3 derivative containing a carbonyl group at a part corresponding to 24-position of 22-oxavitamin D3 useful as a medicine, having strongly differentiation-inducing action. CONSTITUTION: This compound is shown by formula I [R1 is H or OH; A is a substitutable 1-4C alkylene; B is a group of formula II (R2 and R3 are each a 1-4C alkyl; R4 is H or OH) or a substitutable cyclic hydrocarbon or heterocycle] such as 1α, 3β-dihydroxy-20(S)-(3-hydroxy-3-methyl-2- oxobutyloxy)-9,10-secopregna-5,7,10(19)-triene. The compound of formula I is obtained by reacting 20(S)-hydroxy-1α, 3β-bis(t-butyldimethylsilyloxy)pregna-5,7- diene of formula III with a compound of the formula R5 X (R5 is a group of formula IV; A is a 1-4C alkylene; X is an eliminable group such a halogen or methanesulfonyloxy) in the presence of a base.
Patent JP-H1098177-A (JP)
Title: Semiconductor device
Inventor: NOZAKI CHIHARU
IPC: H01L29/73
Filed: 1996-09-19
Abstract: PROBLEM TO BE SOLVED: To enhance element characteristics and reliability, without the generation of defects and degradation in crystal quality by replacing the atoms in one atom plane and the other atom plane, facing each other with an interface in between, with different atoms, respectively to form a dipole. SOLUTION: After an n-type InP layer 12 has been grown on an n-type InP substrate 11, an InAsP layer 13 whose band gap is smaller than that of InP is grown by a few nm, then a p-type InP layer 14 is grown to form a quantum well. Then, group III atoms and group V element atoms of InP/InAsP interface and InAsP/InP interface are replaced with Si by 20%, so that energies of light emission and absorption are different because the energies between sub-bands are different for a conduction band and a valence electron band, even when band gap difference is the same. In a similar manner, by changing replacement amount with Si in the interface, a device wherein light emission or absorption is allowed with various energies (λ1-λ5) in a plane is realized.
Patent JP-H1091938-A (JP)
Title: Magnetic recording medium, reproducing method and reproducing device
Inventor: HASHIMOTO MORIMI
IPC: G11B5/00
Filed: 1996-09-19
Abstract: PROBLEM TO BE SOLVED: To provide a magnetic recording medium which embodies a high recording density without degrading regenerative amplitude signals and its reproducing method as well as its reproducing device. SOLUTION: The third magnetic layer 25 of the magnetic recording medium successively laminated with at least the first, second and third magnetic layers 23, 24, 25 consists of the magnetic layer having the magnetic wall reluctance force relatively smaller than that of the first magnetic layer 23 at a temp. near the ambient temp. and the magnetic wall mobility higher than that of the first magnetic layer. The second magnetic layer 24 consists of the magnetic layer having the Curie temp. lower than those of the first magnetic layer 23 and the third magnetic layer 25.
Patent JP-H02262221-A (JP)
Title: Method of forming conductor pattern on dielectric and its baking method
Inventor: KI SHIYOUYUU
IPC: H05K3/24
Filed: 1989-09-25
Abstract: PURPOSE: To lower the resistance of a conductor by forcibly aligning metal conductive components of the conductor printed on the substrate thereof with inductive magnetic fields generated upon the application of currents to a coil closely inserted into a calcinator. CONSTITUTION: A coil 4 having therein a thermally protective wall 5 is closely inserted into a calcinator 6 so as to be brought into contact with the whole inner wall thereof to generate inductive magnetic fields upon the flow of currents through it. A dielectric substrate 1 on which metal conductive components or metal paste components constituting electrodes have been printed is passed through the calcinator 6 to align the metal conductive components. Since inductive magnetic fields are generated from the south pole toward the north pole upon the flow of currents through the coil 4, metal dielectrics evenly arranged between the south pole and the north pole are aligned to serve to lower the resistance.
Patent JP-S62108218-A (JP)
Title: Large aperture ratio telephone zoom lens
Inventor: HAMANISHI YOSHINORI
IPC: G02B15/167
Filed: 1985-11-06
Abstract: PURPOSE:To obtain a zoom lens having good imaging performance over the entire region of zooming by forming an optical system consisting of four lens groups having positive, negative, positive and positive refracting powers successively from an object side to satisfy prescribed conditions. CONSTITUTION:This lens is made of the 4-group constitution consisting, successively from the object side, the 1st lens group G1 as the focusing group of the positive refracting power movable on the optical axis for the purpose of focusing, the 2nd lens group G2 as the variable power group of the negative refracting power movable on the optical axis for the purpose of variable powers, the 3rd lens group G3 as the correction group of the positive refracting power movable on the optical axis for the purpose of maintaining the specified image plane position, and the 4th lens group G4 as a relay group of the positive refracting power. The 2nd lens group G2 has three positive lens components L21, L22, L23, of which the two components L21, L22 are constituted by sticking. The 4th lens group G4 has two positive lens components L41, L42, aperture stop S, positive lens component L43, positive lens component L44 successively from the object side and satisfies formula I - formula V. The values fi-nP2 in the formulas are as shown in 'note'.
Patent JP-S61115582-A (JP)
Inventor: HERUMUUTO UMURAUFUTO
IPC: A63B59/00
Filed: 1985-11-06
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0787074-A (JP)
Title: Frame synchronization system
Inventor: OHATA HIROSHI
IPC: H04B7/212
Filed: 1993-09-09
Abstract: PURPOSE:To provide the frame synchronization system in which frame synchronization is set without provision of a pseudo timing generating section by applying variable control to a bit error setting value in response to a bit error with respect to the frame synchronization system to continue the synchronization timing in a processing section applying reception processing to serial data from a satellite. CONSTITUTION:A synchronization detection section 11 detects a synchronization code of a known fixed pattern added to an input PCM signal from a terminal 1 in the unit of frames based on a bit error allowable value of a bit error allowable value setting section 13 and generates a synchronization timing signal synchronously with an input timing of the synchronization code and provides bit error information. A bit error measurement section 12 measures a bit error rate based on the bit error information and provides a bit error allowable value control signal in response to the measured value. A bit error allowable value setting section 13 applies variable control to an output bit error allowable value based on the bit error allowable value control signal.
Patent JP-H0191713-A (JP)
Title: Storage tank for transportation with truck
Inventor: KUMAGAI TOSHIO
IPC: B60P1/40
Filed: 1987-10-01
Abstract: PURPOSE:To dry grains in a grain storage tank with air sucked through front porous wall, rear porous wall and right and left porous walls, by using a porous cylinder having a fan and detachably providing said cylinder in the grain storage tank. CONSTITUTION:A porous suction cylinder 21 is attached in a grain storage tank 3. When the tank is in a state filled with grain, a motor is energized to rotate a suction fan 23. Air is sucked through a front porous wall, rear porous wall and right and left porous walls by this operation to dry the grains in the grain storage tank 3.
Patent JP-2000151658-A (JP)
Title: Circuit arrangement for bias adjustment for bus level
Inventor: MORES ROBERT DR
IPC: G06F13/40
Filed: 1999-09-02
Abstract: PROBLEM TO BE SOLVED: To enhance the radiation-resistant performance even in the case of an inferior level in a system where binary data are transmitted by using the inferior level and a superior level. SOLUTION: A bias is adjusted by a terminating circuit having three sectional points in a current/voltage characteristic diagram. In the 3rd quadrant of the current/voltage characteristic diagram, the terminating circuit has a higher resistance more than a resistance of a lead terminated by a linear resistor. In the 1st quadrant, a leading of the characteristic at a voltage less than a reception threshold 22 bas a steep slope than the case with the termination by the resistor. Then in the 1st quadrant, his characteristic receives a current limit from a voltage less than the reception threshold till a value over an operating piezoelectric 23 of a superior level driver. Since the current limit is released at a point in excess of the operating point of the superior level driver, this characteristic increases steeper than the case with the termination by the resistor.
Patent JP-S63103196-A (JP)
Inventor: WATANABE TOSHIO
IPC: E21D9/06
Filed: 1986-10-20
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S61127350-A (JP)
Inventor: ITO TATSUO
IPC: B32B21/08
Filed: 1984-11-26
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S60141021-A (JP)
Title: Four value output circuit
Inventor: NEZU AKIO
IPC: H03K19/094
Filed: 1983-12-28
Abstract: PURPOSE:To increase the drive capability with load by using NMOS and PMOS transistors (Trs), flowing only when an output level is switched substantially so as to obtain a four-value output without consuming power at no load. CONSTITUTION:The substrate of NMOS-Tr1, Tr3, Tr5 is connected to a low level Vss and the substrate of PMOS-Tr2, Tr4, Tr6 is connected to a high level Vcc. Since the Tr2 is turned on and the Tr1 is turned off when both inputs A, B are 0(Vss), the potential of the Tr5, Tr6 or the Tr2 is given to Y as an output. When the Tr6 is turned on and the Tr5 is turned off, then the Vcc level is outputted. With A=0, B=1, the Tr2 is turned on and the Tr1 is turned off, the Tr5 is turned on and the Tr6 is turned off, and the output Y is obtained with the Tr2 from the potential from the Vcc by the Vth-Nch where the threshold level is changed by the substrate effect by the Tr5. With A=1, B=0 the Vss level is lifted by the change of the threshold level similarly and it is fed to the output Y. With A=1, B=1, the Vss level is outputted to the output Y similarly.
Patent JP-H0992261-A (JP)
Title: Lead-acid battery
Inventor: UEMICHI YUKIO
IPC: H01M50/541
Filed: 1995-09-27
Abstract: PROBLEM TO BE SOLVED: To form a cut out part on the upper surface of a cover, and project a fastening terminal from the vertical surface of the cut out part to lower the height of a lead-acid battery. SOLUTION: A terminal post 27 is fixed to a cover 30 in the position shifted from a cut off part 33, and a cell chamber 24a is formed in the lower part of the terminal post and the cut off part 33. A rib or a spacer is arranged between an electrode group 25 inside the cell chamber 24a and the inner wall of a battery container short side surface 20.
Patent JP-H0296156-A (JP)
Title: Method for processing silver halide color photographic sensitive material
Inventor: ISHIKAWA TAKATOSHI
IPC: G03C7/26
Filed: 1988-10-03
Abstract: PURPOSE:To prevent the generation of a stain in the subject material by developing a specified photosensitive material with a color developer contg. prescribed amounts of a chlorine ion and a bromine ion respectively. CONSTITUTION:The photosensitive material comprising a layer contg. a compd. shown by formula I, is developed with the color developer contg. the chlorine ion of 3.5X10<-2> - 1.5X10<-1>mol/l and the bromine ion of 3.0X10<-5> - 1.0X10<-3>mol/l. In formula I, R1 and R2 are each -COOR5 group and the like, R3 - R6 are each hydrogen atom or alkyl group and the like, Q1 and Q2 are each aryl group, X1 and X2 are each a single bond or a divalent linking group, Y1 and Y2 are each sulfo group and the like, L1 - L3 are each methine group, (m1), (m2) and (n) are each 0, 1 - 2, (p1) and (p2) are each 0 - 4, (s1) and (s2) are each 1 or 2, (t1) and (t2) are each 0 or 1. The generation of the stain in the photosensitive material is prevented.
Patent JP-2000074338-A (JP)
Title: Burning melting furnace, method for burning and melting and waste heat using generator system
Inventor: OKAZAKI TERUYUKI
IPC: F23G5/00
Filed: 1998-09-03
Abstract: PROBLEM TO BE SOLVED: To form a reducing atmosphere having an air ratio less than one and an oxidation atmosphere having one or more air ratio in one combustion chamber. SOLUTION: The burning melting furnace 3 comprises one combustion chamber 17 having a slag discharge port 13 and a burned gas exhaust port 15, a primary air supply nozzle 8 and a secondary air supply nozzle 10. In this case, a primary combustion area having a reducing atmosphere including less than one air ratio is formed near the port 13 by turning primary air in a swirling flow. Secondary air is supplied to the primary combustion gas to form a secondary combustion area of an oxidation atmosphere near the port 15.
Patent JP-H0590418-A (JP)
Title: Manufacture of semiconductor device
Inventor: ITO YOSHIO
IPC: H01L21/28
Filed: 1991-09-27
Abstract: PURPOSE:To provide the manufacturing method for a semiconductor device by which highly accurate contact holes wherein the effect of the reflection from a part for contact is decreased can be formed. CONSTITUTION:An element separating region 1 as a contact part, which is connected to an interconnection pattern, a gate electrode 3 and a first interconnection pattern 6 are formed on a semiconductor substrate. An interlayer insulating film 7 is formed thereon. A reflection preventing film 8 is formed on the film 7. A photoresist pattern 9 is formed on the reflection preventing film 8. Exposure is performed so as to form contact holes 10a', 10b' and 10c' at the same time for the element separating region 1, the gate electrode 3 and the first interconnection pattern 6.
Patent JP-H11231402-A (JP)
Title: Film information writing device and camera provided with it
Inventor: SERITA YASUAKI
IPC: G03B17/24
Filed: 1998-09-03
Abstract: PROBLEM TO BE SOLVED: To make easily settable a trimming magnification which is within a proper range for every printing format. SOLUTION: The printing format and the trimming magnification respectively set by a format setting switch 10 and a trimming setting switch 11 are converted into respective prescribed data by a data conversion circuit 26, and are written in the edge part of film F by executing the light emission of light emitting elements 17 and 18 by an LED light emission controlling part 27 based on the data. The trimming magnification is settable to be in subordination to the printing format, and the trimming magnification capable of selecting of respective printing formats C, H and P are set so that maximum values NC, NH and NP satisfy NC:NH:NP=1.7:1.7:1.0. The trimming magnification is set to be in subordination to the printing format and also the maximum value is limited to be at a proper value from the viewpoint of image quality, so that an effective trimming magnification can be easily set.