Patent GB-1021285-A (GB)
Title: Phase-locked pulse generator
IPC: H03D13/00
Filed: 1964-08-07
Abstract: 1,021,285. Automatic phase control systems. STANDARD TELEPHONES & CABLES Ltd. Aug. 7, 1964 [Aug. 8, 1963], No. 32221/64. Heading H3A. In a pulse code modulation receiving system a multi-vibrator is locked in phase with incoming digit pulses by a feed-back loop but if the beat frequency between the pulse trains exceeds a limit a bi-stable circuit is actuated to sweep the control voltage and multivibrator frequency through a range of values until frequency synchronism is again reached, and thus the phase control loop again rendered operative. The phase comparator may be an exclusive OR circuit (delivering a constant voltage output during intervals when only one of the pulse inputs is present, and using a pair of AND and a pair of inverter circuits feeding an OR gate) producing a trapezoidal D.C. output constant over initial, final and middle phase differences and increasing or decreasing linearly over intermediate phase differences. Alternatively, a similar circuitry may produce a similar output when both pulse inputs are simultaneously present or absent, and in a limiting case the trapezoidal output curve becomes an isosceles triangle. The phase discriminator output and the multivibrator output are both applied through identical low-pass filters to a differential amplifier. The two filters have D.C. outputs, equal when the pulses are in phase quadrature, i.e. the leaving or trailing edge of the multivibrator pulse coincides with the centre of the incoming digit signal pulses, and the phase discriminator output then has the same value for absence of incoming signal pulses or when the beat frequency is so high that it is suppressed by the filter following the discriminator. During this equality the phase difference also lies on the sloping side of the trapezoid output curve. The differential amplifier 131 (Fig. 9) comprises two pairs of complementary type transistors connected in series and forming Class B amplifiers, feeding through additional complementary type transistor amplifiers 141, 142 a positive or negative voltage to a capacitor 145 which is connected through a pair of emitter followers 146, 147 forming a high input impedance circuit with the phase-controlled multivibrator. The control voltage in the capacitor 145 cannot exceed limits ŒV. During de-synchronization and when the beat frequency is high and suppressed by the filters feeding the differential amplifier, the phase control loop produces zero output but a de-synchronization voltage may then be derived, from the discriminator and used to apply a voltage +V (instead of a normal clamping voltage - V) through diode 168 to the capacitor 145, and to switch over a bi-stable circuit so that a transistor 151, normally blocked, is rendered conducting. A voltage is then applied over diode 167 to the input line 14b leading from the filter fed by the controlled multivibrator so that a negative voltage tending to- V is applied to the capacitor 145 now charged to +V, and the multivibrator frequency is therefore swept through its control range until, when frequency synchronism is just exceeded during the sweep, the point R becomes positive to control the capacitor 145 and through diode 165 to switch over the bistable circuit to its normal condition with transistor 151 blocked.