baber/WOPTO huggingface dataset:
Patent TW-200300289-A (TW)
Title: A semiconductor memory device having a trench capacitor and a manufacturing method thereof
Inventor: NISHIKAWA KENICHI
IPC: H01L21/8242
Filed: 2002-11-01
Abstract: A semiconductor memory device having a trench capacitor, comprising a semiconductor substrate of a first conductivity type, having a trench which is formed from an upper surface of the semiconductor substrate to a predetermined depth; a capacitor formed in a lower portion of the trench and the semiconductor substrate of the first conductivity type which is adjacent to the lower portion of the trench; a first conductive layer formed in the first trench and right above the first capacitor to which the first conductive layer is electrically connected, a first insulation film formed in the trench and right above the first conductive layer; a first diffusion layer formed in the semiconductor substrate of the first conductivity type which is adjacent to the first conductive layer and the first insulation film, the first diffusion layer served as a source/drain electrode; a gate insulation film formed on a predetermined portion of the trench, the predetermined portion being located above the first insulation film; a second diffusion film formed in an upper portion of the semiconductor substrate of the first conductivity type, the second diffusion layer being adjacent to the gate insulation film and served as a source/drain electrode; a second conductive layer having a first portion formed on the gate insulation film in the trench and a second portion formed right above the first portion and extended up to a higher position than an upper surface of the semiconductor substrate of the first conductivity type, the first and the second portions served as a gate electrode and a ward line respectively; and a second insulation film covered with an upper and side surface of the second portion of the gate electrode.
Patent TW-200303855-A (TW)
Title: Method for the preparation of ethylenically unsaturated compounds with lactam-blocked isocyanate groups and application thereof
Inventor: LOONTJENS JACOBUS ANTONIUS
IPC: C08G18/67
Filed: 2003-02-21
Abstract: The invention relates to a method for the preparation of ethylenically unsaturated lactam-blocked isocyanate compounds, by reacting an unsaturated amine- functional or hydroxy-functional compound with carbonylbistactam. These compounds can be polymerised and are subsequently cured by the built-in crosslinker to form thermosetting polymers which can be applied for instance in powder coatings.
Patent TW-200305141-A (TW)
Title: Rotation control circuit, semiconductor integrated circuit, optical disk drive and method for controlling its rotation
Inventor: HAYASHI YASUHIRO
IPC: G11B21/10
Filed: 2003-03-06
Abstract: The invented rotation control circuit contains the followings: picking up apparatus control circuit, which amplifies the error signal of optical disc detected by the picking up apparatus and generates low frequency composition of the error signal and the picking up apparatus control signal; the memory control circuit, which is synchronous with the FG signal outputted from the optical disc motor that drives the optical disc and generates the memory address control signal; the memory circuit, which uses the memory address control signal to memorize the low-frequency composition at specific time; the correcting signal adder circuit, which adds the low-frequency composition memorized in the memory circuit to the picking up apparatus control signal at the specific time mentioned above; and the system controller, which controls the action time of the correcting signal adder circuit and the memory control circuit.
Patent TW-200418192-A (TW)
Title: Thin film transistor and method of manufacturing the same and display apparatus using the transistor
Inventor: LAI CHIEN-TING
IPC: H01L21/336
Filed: 2003-03-14
Abstract: A thin film transistor comprises a substrate, a gate electrode formed in the substrate, a gate insulating layer formed on the gate electrode and the substrate, a channel layer formed on the gate insulating layer, a pair of ohm contact layers, I.e, a gate ohm contact layer and a source ohm contact layer, formed on the channel layer, a source electrode formed on the source ohm contact layer and a gate electrode formed on the gate ohm contact layer.
Patent TW-200306637-A (TW)
Title: Semiconductor test device, contact substrate for testing semiconductor device, testing method of semiconductor device, semiconductor device and the manufacturing method thereof
Inventor: YAMAGUCHI NAOKO
IPC: G01R31/28
Filed: 2003-03-28
Abstract: The present invention provides a semiconductor test device which can keep good electrical contact for testing the tested electronic parts having very fine electrode structures itself, contact substrate for testing semiconductor device, testing method of semiconductor device, semiconductor device and the manufacturing method thereof. The feature of the semiconductor test device of the present invention is comprising: a testing circuit 13 to input/output the testing signal to the tested electronic parts; the testing signal wiring 12 electrically connected to the testing circuit; a contact substrate 5 having a conductive path 6 electrically connected to electrode of the tested electronic parts and that can transmit the testing signal, and formed by insulative material, having the upper and lower surfaces, and installed with at least one through holes; a multi-layered wiring substrate 7 electrically connected to the conductive path and the testing signal wiring, and allocated under the contact substrate, and disposed with at least one through hole 9; and an adhering mechanism 11 to adhere/keep the tested electronic part, contact substrate and multi-layered wiring substrate.
Patent TW-200401805-A (TW)
Title: Thermally conductive coating compositions, methods of production and uses thereof
Inventor: ZHOU XIAO-QI
IPC: C08G77/20
Filed: 2003-04-11
Abstract: A thermal interface composition is described herein that includes: (a) at least two siloxane-based compounds; (b) at least one inorganic micro-filler material; and (c) at least one thermally conductive filler material. Additionally, a method of forming a thermal interface material is disclosed herein that includes: (a) providing at least two siloxane-based compounds; (b) providing at least one inorganic micro-filler material; (c) providing at least one thermally conductive filler material; and (d) combining the at least two siloxane-based compounds, the at least one inorganic micro-filler material and the at least one thermally conductive filler material.
Patent TW-200422977-A (TW)
Title: Multi-resolution image inpainting
Inventor: SHIH TIMOTHY K
Filed: 2003-04-28
Abstract: Digital inpainting is an image interpolation mechanism, which can automatically restore damaged or partially removed image. Most inpainting mechanisms use a singular resolution approach on the extrapolation or interpolation of pixels. We propose a multi-resolution algorithm, which can take into consideration the different levels of details.
Patent TW-200425656-A (TW)
Title: Multiple antenna OFDM transceiver and method for transceiving
Inventor: LIU DER-ZHENG
IPC: H04B7/06
Filed: 2003-05-09
Abstract: An RF receiver includes a plurality of OFDM modules. The OFDM modules include receiver antennas for substantially simultaneously receiving a plurality of transmission signals transmitted via a single frequency band having a plurality of sub-channels. Further included is a channel estimation module connected to the plurality of OFDM modules, and a channel compensation module connected to the channel estimation module and the plurality of OFDM modules. For each sub-channel, the channel estimation module is capable of estimating channel frequency responses affecting the transmission signals, and the channel compensation module is capable of compensating the transmission signals according to the estimated channel frequency responses. The receiver allows an improved transfer rate per frequency band.
Patent TW-200424853-A (TW)
Title: Method and system for managing virtual memory
Inventor: CHIU YU-PING
IPC: G06F12/08
Filed: 2003-05-14
Abstract: A method and system of managing virtual memory for a flash-memory system. Logical blocks in a buffer are used to store data copied from a physical block in a flash-memory. An operating system searches data in the buffer first. If the data is in the buffer, it is accessed. If not, the operating system searches for the data in the flash memory, meanwhile writing a logical block having a dirty flag back to a logical block.
Patent TW-200402032-A (TW)
Title: Information storage medium storing information for generating DTV stream, and method and apparatus for converting DTV stream
Inventor: LEE JAE-SUN
IPC: H04N21/236
Filed: 2003-05-26
Abstract: An information storage medium storing information for generating digital television (DTV) streams, and a method and an apparatus for converting DTV streams are provided. The information storage medium includes multi-streams; interactive contents including information that enables interface with a user; and reproduction control information including conversion information for converting the multi-streams and/or the interactive contents into digital television (DTV) streams.
Patent TW-200426478-A (TW)
Title: An in-plane switching mode liquid crystal display
Inventor: WU YANG-EN
IPC: G02F1/1343
Filed: 2003-05-29
Abstract: An in-plane switching mode LCD includes a lower substrate, a plurality of parallel straight scan lines and a plurality of equally spaced zigzag signal lines disposed on the lower substrate, an upper substrate and a liquid crystal molecules layer positioned between the two substrates. The adjoining scan lines and the signal lines staggered define a pixel area with a parallelogram shape respectively. Each pixel area comprises pixel electrodes and common electrodes parallel to the signal lines.
Patent TW-200427892-A (TW)
Title: Method for preparing anti-pilling blended textile effect fabrics containing cellulose or polyester fibre and products mode therefrom
Inventor: You li-chun
IPC: D01F6/62
Filed: 2003-06-13
Abstract: A novel method for preparing blended textile fabrics with cellulose and/or polyester (PET) fibre that has anti-pilling characteristic. In this procedure, the textile fabrics containing cellulose and/or PET fibre is irradiated with γ - ray, so that the surface of the fabrics is resulted with shape change. The method uses a high energy γ - ray emitted by Co-60 to make the fabrics surface fibre to produce a breaking or reduce strength condition or a rearrangement effect by free radical and fibre molecules, thereby the original pilling phenomenon is considerably reduced and a good anti-pilling property is obtained. In the preparation of these fabric products, no initiator or any additives are required. The process is very simple and product obtained has very good anti-pilling effects.
Patent TW-200402858-A (TW)
Title: Flexible wiring substrate and method for producing the same
Inventor: KURIHARA HIROAKI
IPC: H05K3/28
Filed: 2003-07-03
Abstract: To provide a flexible wiring substrate which prevents peeling of a solder resist layer during plating with tin-bismuth alloy, whereby anomalous deposition of tin-bismuth alloy plating is inhibited, and to provide a method for producing the flexible wiring substrate. In a flexible wiring substrate 10 including an insulating substrate 11, a wiring pattern 12 formed on one surface of the insulating substrate 11, and a solder resist layer 17 covering the surface of the wiring pattern 12 excepting at least terminal sections, a tin-bismuth alloy plating layer 26 is provided on at least a part of the top surface of the wiring pattern 12 not covered with the solder resist layer 17, and the wiring pattern 12 includes a base layer 21 and a first tin plating layer 24, the base layer 21 being formed of an electric conductor, and the tin plating layer 24 being formed on the base layer 21 such that the tin plating layer 24 extends over the region that is covered with the solder resist layer 17 and also the region that is not covered with the solder resist layer 17.
Patent TW-200502761-A (TW)
Title: Secure system firmware by disabing read access to firmware ROM
Inventor: LEWIS TIMOTHY A
IPC: G06F13/00
Filed: 2003-07-11
Abstract: Systems, methods and software that use a programmable lock bit that disables read access to a firmware ROM until the CPU is reset or enters into a secure CPU mode. The present invention provides for secure system firmware by preventing access to and reading of the contents of the firmware ROM.
Patent TW-200415911-A (TW)
Title: Scanning device including an objective system formed of a single material
Inventor: HENDRIKS BERNARDUS HENDRIKUS WILHELMUS
IPC: G02B13/18
Filed: 2003-08-01
Abstract: An optical scanning device (1) for scanning an information layer (4) of an optical record carrier (2), the device (1) comprising a radiation source (11) for generating a radiation beam (12, 15, 20) and an objective system (18) for converging the radiation beam on the information layer, the information layer being covered by a transparent layer (3) of thickness td and refractive index nd. The objective system comprises a lens formed of a single material. The lens satisfies the condition: where t is the thickness of the lens, FWD is the free working distance between the lens (18) and the carrier (2), where t, td and FWD are expressed in millimetres, and where FWD+td/nd < 0.51.
Patent TW-200409778-A (TW)
Title: Process for selective production of aryl 5-thio- β-D-aldohexopyranosides
Inventor: KAKINUMA HIROYUKI
IPC: C07H15/20
Filed: 2003-08-08
Abstract: This invention provides a process for the production of aryl 5-thio-β-D- aldohexopyranoside derivatives represented by the general formula (III) by reacting, according to the following scheme, a 5-thio-D-aldohexopyranose derivative of the general formula (I) with Ar-OH (II) in the presence of a phosphine represented by the general formula: PR11R12R13 and an azo reagent represented by the general formula: R21-N=N-R22.
Patent TW-200405557-A (TW)
Title: Word and bit line arrangement for a FINFET semiconductor memory
Inventor: SCHULZ THOMAS
IPC: H01L29/788
Filed: 2003-08-25
Abstract: The invention relates to a semiconductor memory having - a multiplicity of web-like fins (FIN) made of semiconductor material which are spaced apart from one another and whose fin longitudinal directions ((FIN)) run parallel to one another, a multiplicity of channel regions and conductively doped contact regions (S/D) being formed in each of the fins (FIN) and the channel regions and the contact regions being arranged alternately one behind the other in the fin longitudinal direction ((FIN)); - a multiplicity of word lines (WL) which are parallel to one another, are arranged perpendicular to the fin longitudinal direction ((FIN)) and as gate electrodes run over a multiplicity of the channel regions for the purpose of controlling the electrical conductivities thereof, the word lines (WL) being electrically insulated from the contact regions and the channel regions; - a multiplicity of storage layers (14) designed for trapping and emitting charge carriers, at least one of the storage layers (14) being arranged in a manner surrounded by an insulator layer (16, 18) between each of the channel region and the word line (WL) assigned to said channel region; and - a multiplicity of bit lines (BL), -- which are arranged obliquely with respect to the word line longitudinal direction ((WL)) and obliquely with respect to the fin longitudinal direction ((WL)) and obliquely with respect to the fin longitudinal direction ((FIN)), -- the bit lines (BL) in each case comprising at least a first and a second bit line segment (22, 24), -- the longitudinal axes of the first bit line segments (22) running parallel to a first bit line direction ((BL1)) and the longitudinal axes of the second bit line segments (24) running parallel to a second bit line direction ((BL2)), the second bit line direction ((BL2)) being rotated through an angle that differs from zero degrees with respect to the first bit line direction ((BL)); and -- each of the bit lines (BL) being electrically connected to a multiplicity of the contact regions (S/D), there being arranged, between two contact regions (S/D) of the same fin (FIN), that are connected to one of the bit lined (BL), a contact region (S/D) that is not connected to said bit line (BL).
Patent TW-200412888-A (TW)
Title: Dispenser for rolled paper
Inventor: GREEN JONATHAN
IPC: A47K10/38
Filed: 2003-08-26
Abstract: The present invention provides an apparatus for dispensing rolled sheet material, the apparatus including a housing defining an interior adapted to rotatably support rolled sheet material and having a dispensing opening sized to allow sheet material to be dispensed therefrom. The apparatus further includes a nip within the housing such as, for example, may be formed by first and second roller. In addition, the apparatus includes a mobile the roll support system adapted to support a roll of sheet material within the housing wherein the roll of sheet material rotates to dispense sheet material and further wherein the mobile roll support system and the roll of sheet material move toward the nip as sheet material is dispensed. Furthermore, the apparatus includes a sheet material dispensing surface proximate the dispensing opening, the sheet material dispensing surface comprising at least one protrusion.
Patent TW-200512788-A (TW)
Title: Method of fabricating thin film transistor (TFT) array
Inventor: LEE CHI-SHEN
IPC: H01L21/84
Filed: 2003-09-16
Abstract: A method of fabricating thin film transistor (TFT) array discloses ions of desired-plated metal and the graphs of the desired-plated area are made by oxidation-reduction materials processes ion replacement for implementing the metal wiring layout of the TFT-LCDs. This, therefore, can overcome the problem of uneasy metal etching thereto achieves the purpose of an automatic alignment. The method uses the ability of the oxidation-reduction reaction to implement the replacement for alternating the lithography etching process in the metal wiring layout as presented in the traditional technique.
Patent TW-200512951-A (TW)
Title: Fabrication of conductive metal layer on semiconductor devices
Inventor: Kang xue-jun
IPC: H01L31/024
Filed: 2003-09-19
Abstract: A method for fabrication of a light emitting device on a substrate, the light emitting device having a wafer with multiply epitaxial layers and an ohmic contact layer on the epitaxial layers remote from the substrate. The method includes the steps: (a) applying to the ohmic contact layer a seed layer of a thermally conductive metal; (b) electroplating a relatively thick layer of the conductive metal on the seed layer; and (c) removing substrate. A corresponding light emitting device is also disclosed. The light emitting device is a GaN emitting diode or laser diode.
Patent TW-200414150-A (TW)
Title: Optical disc, method and apparatus for managing a defective area on an optical disc
Inventor: PARK YONG-CHEOL
IPC: G11B7/0045
Filed: 2003-09-26
Abstract: A method and apparatus for managing a defective area on a optical recording medium, e.g., of writable once type, permits more efficient writing and management of defect list information or temporary defect list information for managing the defective area in a minimum recording size. The method includes writing data in a defective area existing on a high density optical disc, e.g., such as a BD-WO, in a spare area in place of the defective area, producing defect list information for access to the data replacement written in the spare area and writing in a particular area for defect management. The defect entries actually corresponding to the replacement written data, and writing location information of the next available spare area are written and managed as defect list information for management, or the writing location information of a location where replacement writing is possible is written and managed as defect definition structure information.
Patent TW-200417164-A (TW)
Title: Receiver for wireless telecommunication stations and method
Inventor: GRIECO DONALD M
IPC: H04B1/7117
Filed: 2003-02-12
Abstract: The present invention is directed to an improved telecommunication receiver for receiving wireless multi-path communication signals. A novel RAKE receiver and a time diverse integration system for the calculation of the relative power of received signal samples are provided. Preferably, the receiver is embodies in a UE or base station of a CDMA wireless telecommunication system, such as a 3GPP system.
Patent TW-200407160-A (TW)
Title: Inhibitors for continuous activation of calcineurin
Inventor: TOMIZAWA KAZUHITO
IPC: A61K38/00
Filed: 2003-10-06
Abstract: It is intended to provide nerve cell death inhibitors efficacious against various diseases which inhibit the continuous activation of calcineurin while showing little side effects, namely, inhibitors for the continuous activation of calcineurin, more specifically, drugs inhibiting the cleavage of calcineurin A subunit (CaNA) by calpain. Examples thereof include peptides having the amino acid sequences FDGATAAARKEVIRNK (SEQ ID NO:1) and EESESVLTLKGLTPTG (SEQ ID NO:2).
Patent TW-200514325-A (TW)
Title: Surface-emitting laser and its fabricating method
Inventor: WU YI-TSUO
IPC: H01S5/30
Filed: 2003-10-07
Abstract: A kind of surface-emitting laser and its fabricating method are disclosed in the present invention. In the invention, the contact electrode is manufactured inside the resonant cavity of the surface-emitting laser. The invention contains the followings: the heavy concentration carrier doped contact layer inside the resonant cavity, in which the heavy concentration carrier doped contact layer is formed at the position that has the weakest optical field inside the resonant cavity; etching the Bragg reflection mirror to the top of the heavy concentration carrier doped contact layer; and forming the high carrier concentration ohmic channel for the connection between the electrode and the heavy concentration carrier doped contact layer by doping the conductive elements for the purpose of diffuse. Thus, it is capable of completing the manufacturing of surface emitting laser with its contact electrode inside the resonant cavity without the need of having precise control of etching process.
Patent TW-200516720-A (TW)
Title: Semiconductor structure avoiding polycrystalline silicon stringers formation during semiconductor processing
Inventor: ZHANG YOU-ZHI
IPC: H01L21/8246
Filed: 2003-11-04
Abstract: This invention discloses a semiconductor structure avoiding the poly stringers formation during semiconductor processing. A semiconductor substrate is divided into a memory cell area and a peripheral portion. Multiple parallel first isolation devices are positioned in the semiconductor substrate in the memory cell area. A second isolation device is positioned in the semiconductor substrate in the peripheral portion, and parallel with the first isolation device. A dummy buried doping region is positioned in the semiconductor substrate, and is positioned between the memory cell device and the peripheral portion and parallel with the second isolation device. An oxidized area is formed on the dummy buried doping region. The dummy buried doping region and the oxidized region can prevent poly strings formation during subsequent processing.
Patent TW-200517041-A (TW)
Title: Fixing apparatus for setting cassette on crane fork
Inventor: YAMAMOTO TOSHIHIRO
IPC: H05K7/14
Filed: 2003-11-12
Abstract: A fixing apparatus, used for transporting the sequential-type cassette, at least comprises a lock pin and a pinhole. The lock pin and the pinhole are formed on the bottom of the cassette and the crane fork, respectively. When the crane fork carries the cassette, the engagement between the lock pin and the pinhole makes the cassette stably set on the crane fork.