baber/WOPTO huggingface dataset:
Patent TW-I275787-B (TW)
Title: Judge method of black-lead texture in a grey casting iron, judge program record medium and judge system
Inventor: ICHIMURA HAJIME
IPC: G01N21/17
Filed: 2003-12-25
Granted: 2007-03-11
Abstract: A method is provided, which can quantitatively judge the feature of the texture by taking the black-lead number of the black-lead texture in a grey casting iron and taking the degree of the fatness constructing the black-lead. Expressed concretely, as for the image of the black-lead texture applied by a pre-processing, only the black-leads of non-ball shape with an average radius larger than 5 um are extracted and their number is calculated out (step S5 in Fig. 3). Then only the black-leads with maximal length larger than 50 um and less than 150 um are extracted and the length and area of each black-lead are measured (step S6). From such data, the black-leads with maximal length (maximal radius) 100 um which should be called as the representative of the black-lead group are assigned and its area is found. Said area is divided by the length 100 um and becomes the degree of the fatness (step S7). Said value of the degree of the fatness and the number of the black leads are displayed (step S8).
Patent TW-I245425-B (TW)
Title: Semiconductor device and method for manufacturing the same
Inventor: MAKITA NAOKI
IPC: H01L21/77
Filed: 2003-12-26
Granted: 2005-12-11
Abstract: A semiconductor device includes at least one thin film transistor including a semiconductor layer that has a crystalline region including a channel region, a source region and a drain region, a gate insulating film disposed at least on the channel region, the source region and the drain region of the semiconductor layer, and a gate electrode arranged so as to oppose the channel region via the gate insulating film. At least a portion of the semiconductor layer includes a catalyst element capable of promoting crystallization, and the semiconductor layer further includes a gettering region that includes the catalyst element at a higher concentration than in the channel region or the source region and the drain region. The thickness of the gate insulating film on the gettering region is smaller than that on the source region and the drain region, or the gate insulating film is not disposed on the gettering region.
Patent TW-I298620-B (TW)
Title: Handle assembly for a spinning reel
Inventor: NISHIKAWA TOMOHIRO
IPC: A01K89/01
Filed: 2004-01-16
Granted: 2008-07-11
Abstract: A handle assembly (1) is detachably screwed onto a master gear shaft (10), on which a master gear (11) is provided. The handle assembly includes an approximately T-shaped handle grip (7a), a handle arm (7b) on which the handle grip (7a) is rotatively mounted, and a handle shaft (7c) on which the base of the handle arm (7b) is mounted. The handle shaft (7c) has a three piece structure including a tubular main shaft unit (7d), a first shaft portion (7e) that is screwed onto one end of the main shaft unit (7d) and the master gear shaft (10), and a second shaft portion (7f) that is mounted on the other end of the main shaft unit (7d) and the base of the handle arm (7b). In a screw type handle assembly (1) for a spinning reel, it is possible to maintain rigidity of the handle shaft (7c) at a high level while reducing the overall weight of the handle shaft (7c). <IMAGE>
Patent TW-I236719-B (TW)
Title: Ball grid array package and method for manufacturing the same
Inventor: LIU SHENG-TSUNG
IPC: H01L21/60
Filed: 2004-02-11
Granted: 2005-07-21
Abstract: A ball grid array package includes a substrate, a chip, at least one surface mount device, a plurality of traces, a plurality of solder pads, at least one dummy solder pad, and at least one dummy trace. The substrate has an upper surface and a lower surface opposite to the upper surface. The chip is disposed on the upper surface of the substrate and electrically connected to the upper surface of the substrate. The surface mount device is mounted on the upper surface of the substrate and has a first terminal and a second terminal. The traces are disposed in the substrate. The solder pads are disposed on the lower surface of the substrate and electrically connected to the upper surface of the substrate through the traces. The dummy solder pad is disposed on the lower surface of the substrate. The dummy trace is disposed in the substrate. The second terminal of the surface mount device is electrically connected to one of the solder pads and the first terminal of the surface mount device is electrically connected to the dummy solder pad through the dummy trace.
Patent TW-I274322-B (TW)
Title: Magneto-optical recording medium by domain wall displacement detection, and manufacturing method thereof
Inventor: MIKI TAKESHI
IPC: G11B7/24
Filed: 2004-06-16
Granted: 2007-02-21
Abstract: The object of the present invention is to realize scan position detection of anneal light at a boundary wall surface between a land and a groove with high sensitivity, in a magneto-optical recording medium by a DWDD (domain wall displacement detection). To achieve the object, the medium in accordance with the present invention is a magneto-optical recording medium by a DWDD method in which a land 3 and a groove 4 are served as a signal recording area. When a boundary wall surface 5 between the land 3 and the groove 4 is scanned with anneal light La and quality of improving magnetic wall movement is changed, for position detection of this anneal light, a wobbling part 7 for detecting scan position deviation of the anneal light being made rugged in the width direction of a recording track is provided at a portion extending along the recording track length direction of the boundary wall surface 5. Furthermore, vibration amplitude of a period corresponding to a period of the wobbling part 7 is caused by scanning the wobbling part 7 with the anneal light, and minute variation of a scan position of the anneal light is detected and monitored with high sensitivity.
Patent TW-I245496-B (TW)
Title: Method for determining output signals of a Viterbi decoder
Inventor: CHANG CHIA-YEN
IPC: H03M13/41
Filed: 2004-07-14
Granted: 2005-12-11
Abstract: Method for determining output signals of a Viterbi decoder. The method includes: (a) receiving a plurality of digital signals through a path memory module of the Viterbi decoder with decoding an input signal; (b) comparing the received digital signals in step (a) with a default number; and (c) determining an output according to the comparison result provided by step (b).
Patent TW-I248569-B (TW)
Title: Method for detecting and eliminating errors in application data of an electronic device
Inventor: YANG PO-CHUN
IPC: G06F11/07
Filed: 2004-07-19
Granted: 2006-02-01
Abstract: A method of detecting and eliminating errors in application data stored in a section of a memory of an electronic device. The method includes providing an application program containing an error checking algorithm in the electronic device, starting the application program to access the application data, and executing the error checking algorithm to check for errors in the application data. The application data is erased if the error checking algorithm detects an error in the application data.
Patent TW-I248187-B (TW)
Title: Package structure having external nodes and the method of making the same
Inventor: LO KUANG-LIN
IPC: H01L23/488
Filed: 2004-08-04
Granted: 2006-01-21
Abstract: The present invention relates to a package structure having external nodes. The package structure comprises a substrate, a semiconductor chip and a sealing resin. The semiconductor chip is attached to and electrically connected to the substrate. The substrate has a plurality of external nodes disposed near the edge thereof. Each of the external nodes has an outer portion and an inner portion. The external nodes are used as molding gate; therefore, outer portion of the external node is exposed after encapsulated so as to electrically connect to an outer circuit. As a result, no extra molding gate is needed.
Patent TW-I284387-B (TW)
Title: Method of fabricating power MOS
Inventor: HSU HSIU-WEN
IPC: H01L21/822
Filed: 2004-08-09
Granted: 2007-07-21
Abstract: A method of fabricating a power MOS is provided. A substrate is provided, and a well is formed therein. A first dielectric layer, a first conductive layer, and a second dielectric layer are orderly formed on the substrate. An etching step is performed to for a first opening exposing the partial well. A first type doping region is formed in the exposed well. A spacer is formed on the sidewalls of the first opening. A patterned barrier layer is formed on the substrate and exposes the partial first type doping region and the second dielectric layer. The exposed first type region and the partial well are removed to formed a second opening exposing the well completely. A second doping region is formed in the exposed well. The second dielectric layer is removed to expose the first conductive layer. A second conductively layer and a third conductive layer separating each other are formed on the substrate.
Patent TW-I285647-B (TW)
Title: Prevention, treatment and detection of porcine progressive atrophic rhinitis
Inventor: CHIEN MAW SHENG
IPC: C12N15/66
Filed: 2004-08-20
Granted: 2007-08-21
Abstract: Disclosed herein is an animal vaccine directed to progressive atrophic rhinitis (PAR), comprising as active components three polypeptides capable of eliciting the production of antibodies against Pasteurella multocida associated with PAR, said three polypeptides each having an amino acid sequence that substantially corresponds to the 2-486, 486-986 or 986-1281 amino acid residues of Pasteurella multocida toxin (PMT), respectively. Also disclosed is a multivalent animal vaccine, comprising the above three polypeptides as active components against PAR, and at least a pathogenic antigen or epitope thereof associated with other animal disease(s).
Patent TW-I265581-B (TW)
Title: Semiconductor device and method for fabricating the same
Inventor: HASHIMOTO SHIN
IPC: H01L21/60
Filed: 2004-09-24
Granted: 2006-11-01
Abstract: A semiconductor device comprises a first insulating film formed on a semiconductor substrate, a first metal pattern formed on the first insulating film, a second insulating film formed on the first metal pattern, a second metal pattern formed on the second insulating film, and a third metal pattern formed in the second insulating film and connecting between the first metal pattern and the second metal pattern. The third metal pattern is a single continuous structure, and the principal orientation axes of crystals of a metal constituting the third metal pattern are parallel to the principal surface of the semiconductor substrate.
Patent TW-I244343-B (TW)
Title: Method for motion estimation
Inventor: CHEN YI-KAI
IPC: H04N19/503
Filed: 2004-11-12
Granted: 2005-11-21
Abstract: The present invention provides a method for motion estimation. The method includes (a) dividing a search area into sub-areas with different densities, (b) deriving distortions of a currently selected macroblock and its neighbors determined by the density of the current sub-area, (c) if one of the distortions of the neighbors is smallest, identifying the neighbor as the current macroblock, (d) repeating steps (b) and (c) until the current macroblock has the smallest distortion, (e) if the current macroblock having the smallest distortion is not located in the sub-area having the largest density, re-defining the search area according to the density of the current sub-area, and f)repeating steps (a), (b), (c), (d) and (e) until the current macroblock having the smallest distortion is located in the sub-area having the largest density, identified as the reference macroblock.
Patent TW-I282479-B (TW)
Title: Active device array substrate
Inventor: CHIEN CHIN-CHENG
IPC: G02F1/1362
Filed: 2004-12-09
Granted: 2007-06-11
Abstract: An active device array substrate is disclosed. The active device array comprises a substrate, a plurality of scan lines, a plurality of data lines, and a plurality of pixels. The scan lines and the data lines are disposed on the substrate. The pixels are disposed on the substrate and connected with the corresponding scan lines and the corresponding data lines. Each of the pixels comprises an active device and a pixel electrode. The pixel electrode is electrically connected with the active device. The pixel electrode has a rubbing pattern. At least a corner of the pixel electrode has a jagged profile. The jagged profile is adjacent to the rubbing pattern of the neighboring pixel. The active device array substrate can improve the display quality of the Multi-domain Vertically Alignment liquid crystal display by reducing the dark phenomenon that is caused by the rubbing pattern of the neighboring pixel.
Patent TW-I266453-B (TW)
Title: Cable assembly with power adapter
Inventor: WU JERRY
IPC: H01R27/02
Filed: 2004-12-10
Granted: 2006-11-11
Abstract: A cable assembly (100) includes a first connector (1) including a first insulating housing (10) extending in a first direction and a number of first and second contacts (11, 12) received in the first housing in a second direction perpendicular to the first direction, a cable (3) including a number of conductors(302, 304) electrically connecting with the first contacts, a second connector (2) including a second housing (20) back to back assembled to the first housing and a number of third contacts (22) electrically connecting with the second contacts of the first connector, and a pair of screw caps (5). The first insulating housing defines a pair of fitting spaces extending in the lateral direction and respectively communicating with the fitting spaces, and the pair of screw caps are respectively received in the fitting spaces in the first direction.
Patent TW-I240727-B (TW)
Title: Surface treatment of alignment layer for liquid crystals and the application of alignment layer
Inventor: LIU PING-CHUN
IPC: G02F1/13
Filed: 2004-12-23
Granted: 2005-10-01
Abstract: A surface treatment for an alignment layer of liquid crystal molecules is a process to irradiate a surface of the alignment layer, wherein the alignment layer is made of fluorinated materials coated on a substrate, and the alignment layer controls a nematics phase of liquid crystal molecules while the alignment layer has special surface properties after the treatment. Moreover, the alignment layer can apply for a liquid crystal displayer panel to control liquid crystal molecules well-ordered.
Patent TW-I251846-B (TW)
Title: Multi-directional input device
Inventor: KANZAKI YUKIO
IPC: G06F3/033
Filed: 2004-12-27
Granted: 2006-03-21
Abstract: To provide a multi-directional input device capable of detecting not only slanting direction at slanting operation, but also the amount of slanting angle. The multi-directional input device 10 is mainly composed of a housing 1, an operation body 15 slanting movement freely supported, an elastic supporting member 17 having pressing protrusions 16 formed at four positions on an almost identical circumference of a bottom face, and a flexible circuit board 18 having a laminated part 18a. On the laminated part 18a, four positions corresponding to respective pressing protrusions 16 function as the detection elements. Respective detection element is constructed so that an electrode pattern 21 on an upper sheet 18c side and a resistor pattern 19 on a lower sheet 18d side are freely contacted with and separated from each other. When the operation body 15 is operated in slanting, since the pressing area of the pressing protrusion 16 against the upper sheet 18c is changed in compliance with the amount of slanting, the contact area of both patterns 19, 21 is changed in compliance with the difference of the deflected area of the sheet 18c.
Patent TW-I270883-B (TW)
Title: A method of operating an array of memory cells, nonvolatile memory and manufacturing method thereof
Inventor: YEH CHIH-CHIEH
Filed: 2004-12-30
Granted: 2007-01-11
Abstract: A string of memory cells with a charge trapping structure coupled in series is read, by measuring current that flows between the body region of the selected memory cell and the contact region of the selected memory cell. The charge storage state of the charge trapping structure affects the measured current.
Patent TW-I351918-B (TW)
Title: Ultra-low height electromagnetic interference shie
Inventor: VINOKOR IGOR
IPC: H05K7/18
Filed: 2005-01-17
Granted: 2011-11-01
Abstract: A shielding enclosure generally includes a frame and a lid. The frame may include sidewalls, an inwardly extending horizontal lip defining an open top for the frame, generally horizontal flanges extending outwardly relative to the lip, and one or more openings disposed generally under the corresponding one or more flanges. The lid may include an upper surface to cover the frame's open top, a downwardly extending lip configured to at least partially fit generally over the frame's sidewalls, one or more openings, and one or more generally upwardly extending flanges having one or more lateral detent protrusions. The lid may be attached to the frame by the interlocking engagement of the lid's one or more lateral detent protrusions generally under the corresponding one or more flanges of the frame, which said one or more flanges of the frame are at least partially received through the corresponding one or more openings of the lid.
Patent TW-I257254-B (TW)
Title: Method for automatic detecting computer signal source for a projection device
Inventor: HSIEN WEN-CHIN
IPC: H04N5/74
Filed: 2005-04-12
Granted: 2006-06-21
Abstract: This invention provides a method for automatic detecting computer signal source for a projector device. The method comprises detecting a pin of a D-Sub connector. When a voltage of the pin is zero, the projector device confirms that the computer signal source is connected to the projection device. If there is no other signal received by the projector device, the projector device automatically switches to receive signals of the computer signal source.
Patent TW-I279397-B (TW)
Title: Erosion resistant process chamber components
Inventor: MURUGESH LAXMAN
IPC: C23C16/44
Filed: 2005-05-11
Granted: 2007-04-21
Abstract: A substrate processing chamber component demonstrates reduced erosion in an energized gas. The component has a ceramic structure composed of aluminum oxide with a surface exposed to the energized gas in the chamber. The erosion of the surface by the energized gas is substantially reduced by erosion resistant properties of the ceramic structure, which arise from a ratio of the total area of the grain GSA to the total area of the grain boundary regions GBSA in the ceramic structure of from about 0.25 to about 2.5. Also, at least about 80% of the grains in the ceramic structure have a grain size in the range of from about 1 micron to about 20 microns. The ceramic structure also has a purity of at least about 99.8% by weight to further reduce erosion of the surface.
Patent TW-I290754-B (TW)
Title: Retaining ring with conductive portion
Inventor: MANENS ANTOINE P
IPC: H01L23/00
Filed: 2005-05-12
Granted: 2007-12-01
Abstract: A retaining ring for use with electrochemical mechanical processing is described. The retaining ring has a generally annular body formed with a conductive portion and a non-conductive portion. The non-conductive portion contacts the substrate during polishing. The conductive portion is electrically biased during polishing to reduce the edge effect that tends to occur with conventional electrochemical mechanical processing systems.
Patent TW-I343463-B (TW)
Title: Light engine
Inventor: MARRA JOHAN
IPC: F21K99/00
Filed: 2005-08-03
Granted: 2011-06-11
Abstract: The invention describes a Light engine (1,2,3,4,5) comprising a chamber (6) with at least one aperture (7) and a number of LED elements (13) positioned inside this chamber, where effectively all inner surfaces of the chamber (6) are realized as high-reflective surfaces (20) which are essentially non-absorbing towards light within a desired wavelength region
Patent TW-I287298-B (TW)
Title: Flexible thin film transistor substrate and method of fabricating the same
Inventor: WU DUNG-SHING
IPC: H01L29/786
Filed: 2005-10-21
Granted: 2007-09-21
Abstract: organic material on the glass carrier and capable of being directly peeled from the glass carrier board; then forming at least an inorganic layer film on the lift film by the sequence of forming an inorganic layer film and an organic layer film with inorganic material and organic material selectively; next forming amorphous silicon thin film transistor or polysilicon thin film transistor; and finally, peeling off the lift film with thin film transistor from the glass carrier directly to thus manufacture flexible thin film transistor substrate. The invention has better chemical durability, heat stability, airtight characteristic, waterproof characteristic and high transmissibility in comparison with using plastics as carrier substrate, and has better flexibility than metal or glass.
Patent TW-I288633-B (TW)
Title: Multi-function walking auxiliary for medical treatment
Inventor: CHAI CHANG-WEI
IPC: A61G3/00
Filed: 2005-11-01
Granted: 2007-10-21
Abstract: The present invention relates to a versatile walking auxiliary for medical treatment which the body of the walking auxiliary can be used as a multilayer cabinet or as a set for sitting through the combination of a connecting base, a supporting pole and a pad. The invention is differ form anciently walking auxiliary with single function, it can avoid the torment of occupying large space while we store the walking auxiliary up The invention can be reinstate as a walking auxiliary to assist the user for walking or medical treatment when we remove the connecting base, the supporting pole and the pad. Therefore, this invention is a medical walking auxiliary with multi-function.
Patent TW-I266423-B (TW)
Title: Three-dimensional thin-film transistor nano-die memory device and manufacturing method thereof
Inventor: JENG PEI-REN
IPC: H01L29/786
Filed: 2005-12-23
Granted: 2006-11-11
Abstract: Disclosed is a three-dimensional stackable nano-die memory device, wherein a memory cell is composed of a thin-film transistor and a nano-die located in a gate dielectric layer. Upper and lower memory cells can be controlled through a common word line extending therethrough so as to facilitate increase of cell density of memory.
Patent TW-I288809-B (TW)
Title: Automatic setting method of boiling point for water dispenser
Inventor: LIN GUO-JANG
IPC: F24H1/18
Filed: 2006-02-10
Granted: 2007-10-21
Abstract: The present invention relates to an automatic setting method of a boiling point for a water dispenser. The basic temperature is set on the microprocessor, and the temperature sensor serves to detect the present water temperature of the water dispenser. Then the microprocessor compares the present water temperature with the basic temperature. When the water temperature is over the basic temperature and then maintains constant value, the microprocessor would set the present water temperature to be a boiling point and perform the water supply and temperature control according to the boiling point. The control method enables the water dispenser to flexibly and automatically detect the altitude variation to change the boiling point so as to achieve the operation safety principle and novel function.
Patent TW-I391301-B (TW)
Title: Material storage and dispensing packages and methods
Inventor: GLENN M TOM
IPC: B65D81/00
Filed: 2006-04-25
Granted: 2013-04-01
Abstract: Packages and methods for storage and dispensing of materials, e.g., high purity liquid reagents and chemical mechanical polishing compositions used in the manufacture of microelectronic device products, including containment structures and methods adapted for pressure-dispensing of high-purity liquids. Liner packaging of liquid or liquid-containing media is described, in which zero or near-zero head space conformations are employed to minimize adverse effects of particle generation, formation of bubbles and degradation of contained material.