baber/WOPTO huggingface dataset:
Patent JP-S6269982-A (JP)
Title: Penetrative bacteria
Inventor: RARUFU AARU IZUBERUGU
IPC: C12N15/09
Filed: 1986-07-31
Abstract: Novel methods and microorganisms are provided, where novel genetic mammalian cell invasive capability is imparted to a microorganism by the introduction of an exogenous inv gene. The resulting organisms are then capable of binding to mammalian cells and are transferred to the cytoplasm. Other novel genetic capabilities may be imparted to the unicellular microorganism, so that the unicellular microorganism may serve as a vaccine for one or more pathogens or may introduce genetic capabilities or foreign molecules into a mammalian host cell.
Patent JP-S6238785-A (JP)
Title: One side multilayer build-up consumable type electroslag welding method for steel material of extremely thick steel plate
Inventor: NAGAI MASAMITSU
IPC: B23K25/00
Filed: 1985-08-14
Abstract: PURPOSE:To facilitate the attachment and detachment of a water cooling patch, to reduce the using quantity of filler metals and to shorten the welding time, etc. by inserting an inserting material from one side to a butt part and by forming a beveling groove on the back face side of the inserting material by pressing the water cooling patch on the surface of the inserting material. CONSTITUTION:In case of performing welding by abutting with a column 1 and beam 2, a loose stray 4 is tacked on the back face and an inserting material 5 is inserted on the whole length of the weld line. The first beveling groove 7a is then formed by abutting an water cooling patch 6a so as to bring into contact with the surface of the inserting material 5. The first layer 9a is then formed by reinforcing the first beveling groove 7a by pressing from the back face of the inserting material 5 by a spacer 8 and by subjecting to an electroslag welding with consumable electrodes. The second beveling groove is then formed by this patch 6b and inserting material 5 by abutting the other water cooling patch 6b from the surface by removing the water cooling patch and the second layer is formed by welding over the whole length of the weld line similarly.
Patent JP-H0344772-A (JP)
Title: Graphic information producing method for graphic processor
Inventor: KOUWA MIKA
IPC: G06F17/50
Filed: 1989-07-13
Abstract: PURPOSE:To omit the complicated tasks and to improve the working efficiency by producing the graphic information on a new graphic based on the graphic information to be referred to and the information on the space between external form lines of the new graphic to the relevant graphic. CONSTITUTION:A CPU1 is prepared together with a keyboard 2, a digitizer 3, an external storage storing a system program, a design data file 5, a printer 6, a display device 7, and a memory 8 which stores temporarily the necessary one of those data stored in the file 5 for a due task. Then the graphic information on a new graphic is produced based on the registered graphic information to be referred to and the information on the space between external form lines of the new graphic to the registered one. Thus it is possible to omit the complicated tasks on the screen of a display device and to improve the working efficiency.
Patent JP-S57114532-A (JP)
Title: Fluorine-containiing cyclohexylbiphenyl derivatives, dielectric body containing them and electronic optical display element
Inventor: RUDORUFU AIDENSHINKU
IPC: C07C43/225
Filed: 1981-11-10
Abstract: A Cyclohexylbiphenyl of the formula   <IMAGE>   wherein R1 is alkyl of 1-12 C atoms; R6 is alkyl or alkoxy each of 1-12 C atoms, CN or fluorine; and R2, R3, R4 and R5 each is hydrogen or fluorine, with the proviso that at least one, but not more than two of R2, R3, R4, R5 and R6 are fluorine.
Patent JP-S5969368-A (JP)
Title: Bobbin transport system
Inventor: MORI SHIGEKI
IPC: B65H67/06
Filed: 1982-10-12
Abstract: PURPOSE:To provide possibility of simultaneous replacement of tubed yarns and empty bobbins in a spinning machine by directly connecting the winder to the spinning machine with a tubed yarn carry-in line and an empty bobbin return line, by allowing trays for tubed yarns and empty bobbins to circulate in a loop, and by furnishing an empty bobbin supply device. CONSTITUTION:Bobbins exhausted from the takeup unit are transferred onto a return line 4, and among the bobbins passing a sensor PS3 those with residue are sent to a by-pass 9 while those with little residue are togeher with empty tray being sent on a return line 5a. When an empty bobbin supply device 12 is now reached, the bobbin guides 50a, 50b are open there, and a tray T1 will stop once at the empty bobbin supply position. If a sensor PS2 senses that there is not any bobbin, a motor 39 is put in operation to cut off an empty bobbin from a storage box 30. This empty bobbin cast in a chute 47, and then the guides 50a, 50b are shut to fix the bobbin on the tray T1. Thus trays on the return line 5 traveling toward the spinning machine and all loaded with an empty bobbin.
Patent JP-S57101945-A (JP)
Title: Control system of information processor
Inventor: YOSHITAKE MASAAKI
IPC: G06F9/26
Filed: 1980-12-18
Abstract: PURPOSE:To easily change a microprogram, by designating an address of a main storage part where a pointer of the microprogram is stored, by an address part of a machine language instruction. CONSTITUTION:In case when a machine language instruction which has been read out to an instruction register 2 from a main storage part 1 is not a microprogram branch instruction, the machine language instruction is executed by a machine language instruction processing part 3. Also, in case when the machine language instruction which has been read out to the register 2 is a microprogram btanch instruction, an address of this machine language instruction is shifted to the main storage part 1, accesses the main storage part 1, and contents of the accessed address are read out by a microprogram processing part 5. The processing part 5 sets this readout contents to a start address of a microprogram which is made to branch from the machine language instruction, accesses a microprogam storage part 4, reads out a microprogram routine designated by the microprogram branch instruction, and executes the processing.
Patent JP-H0820004-A (JP)
Title: Precutting device
Inventor: TANAKA TAKESHI
IPC: B23Q3/18
Filed: 1994-07-07
Abstract: PURPOSE:To simplify a positioning means so as to make the whole structure small and reduce an installation space. CONSTITUTION:In a conveying passage A for conveying a work timber W in the longitudinal direction, vise means 8-11 for clamping the work timber W are arranged and a circular saw unit C, side face working units Da, Db and a top and bottom face working unit E are arranged correspondingly. A movement operation means 5 is provided at the vise means 8 arranged at the upstream part of the circular saw unit C for moving in the longitudinal direction. The side face working units Da, Db arranged at the downstream part of the circular saw unit C and the top and bottom face working unit E are respectively provided with movement control means Dx, Ex for controlling to move in the longitudinal direction. Also, at the downstream part of the working units Da, Db, E, a tip holding means F for clamping the tip of the work timber W and a positioning control means G for moving the tip holding means F are provided.
Patent JP-H1127293-A (JP)
Title: Communication controller
Inventor: MIZUMORI TAKASHI
IPC: H04L12/40
Filed: 1997-07-04
Abstract: PROBLEM TO BE SOLVED: To prevent bus recovery communication from being erroneously generated in a bus which is not used by discriminating whether communication is performed by using both or one of duplexed buses. SOLUTION: A single bus mode to perform communication by using one of the duplexed buses or a duplexed bus mode to perform communication by using both of the duplexed buses is set by a setting means 23. The communication is performed by controlling switchover of the duplexed buses and communication parts 21, 22 when the communication is performed in the duplexed bus mode by a communication control part 24. When the communication with one of the duplexed buses is disabled, setting contents of the setting means 23 is read, when the setting contents is the duplexed bus mode, the bus recovery communication is performed for the bus with which the communication is disabled and when the setting contents is the single bus mode, the bus recovery communication is not performed to the bus with which the communication is disabled by the communication control part 24. Consequently, when the communication with the bus at one side is disabled because only one of the duplexed buses is used, the bus recovery communication is not generated for the bus which is not used.
Patent JP-S5969413-A (JP)
Title: Furnace for manufacturing expanded graphite
Inventor: FUJITA ATSUSHI
IPC: C01B31/04
Filed: 1982-10-13
Abstract: PURPOSE:To improve the manufacturing yield of expanded graphite when graphite contg. an interlaminar compound formed by treatment with a soln. of an intensely oxidizing agent is heated to a high temp. with a flame from a burner to manufacture expanded graphite, by lining a heating furnace with a molded material of inorg. silica-alumina fiber to keep easily the furnace at said high temp. CONSTITUTION:Graphite is treated with a treating soln. of an intensely oxidizing agent such as a soln. contg. concd. sulfuric acid and nitric acid or a soln. contg. concd. sulfuric acid and potassium permanganate to form an interlaminar graphite compound. The resulting graphite powder is washed in water and converted into expanded graphite by spraying from a nozzle 4 on a flame 9 spouted from a gas burner 3 in a heating furnace. Since the yield of expanded graphite is remarkably improved by keeping the inside of the furnace at >=1,200 deg.C, the furnace is lined with a silica-alumina coating or a molded material 8 of inorg. silica-alumina fiber, and the outside is covered with a castable heat insulator. The lined heating furnace is not burned out at >=1,200 deg.C high temp., gives a high manufacturing yield, and can be used over a long term.
Patent JP-S5969669-A (JP)
Inventor: NAKAGOME HIDEKI
IPC: F25B21/00
Filed: 1982-10-15
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0713877-A (JP)
Title: Arbiter
Inventor: NAKAMURA TAKESHI
IPC: G06F13/362
Filed: 1993-06-25
Abstract: PURPOSE:To arbitrate access requests without being disordered with an unstable access request signal outputted from a corresponding processor among plural processors if its driving power source is OFF by providing a mask circuit which unconditionally masks the access request signal inputted from the processor when the driving power source of the processor is OFF. CONSTITUTION:This arbiter is provided with an AND gate 11 which arbitrates the bus use request A1 of a processor A and the bus use request B1 of a processor B. Further, this arbiter is provided with the mask circuit 10 which unconditionally masks the bus use request B1 of the processor B when the power source of the processor B is OFF. The mask circuit 10 inputs driving power source state information BB on the processor B and the arbiter outputs a bus use permission A2 to the processor A or a bus use permission B2 to the processor B.
Patent JP-S6239391-A (JP)
Title: Support structure for vertically-installed cylindrical tank for ship
Inventor: ASAI TAKAYOSHI
IPC: B65D90/12
Filed: 1985-08-15
Abstract: PURPOSE:To eliminate reinforcing of a bottom plate and to facilitate checking and repair of a bottom part, by a method wherein a distance between adjoining small bendproofing materials of a number of small bendproofing materials placed in juxtaposition to a tank bottom is decreased over a distance between supporting materials situated so as to cross the small bendproofing material at right angles, and a space part is formed between the support materials. CONSTITUTION:The empty weight of a cylindrical tank 11 and the weight of a content are supported to a double bottom top plate 2 through a support material 3, and a support reaction force from the support material 3 is exerted on the tank bottom plate 12 through a heat insulating support material 4. In which case, since the bottom plate 12 is reinforced by a number of small bendproofing materials 13 disposed at a narrow distance so as to cross the support material 3 at right angles, a load applied on the bottom plate 12 is widely dispersed to prevent production of an excessive load. This eliminates reinforcing of the bottom plate 12 by means of a large bendproofing material, and enables a tank to be manufactured lightly and in a simple structure. A worker enters or a device and a material are conveyed in a space part 18 between the bottom plate 12 and a double bottom top plate 2, and this enables facilitation of a checking and a repairing work of the tank 11 after completion of building of the bottom plate 12.
Patent JP-S6160787-A (JP)
Inventor: ROBAATO ERU YAKOBUSON
IPC: B01J29/068
Filed: 1985-08-15
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S6336735-A (JP)
Inventor: KANBE TAKAO
IPC: A21D2/22
Filed: 1986-08-01
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S6337729-A (JP)
Title: Loop back test control system for transmission line
Inventor: NAKAMURA YUZO
IPC: H04L69/40
Filed: 1986-08-01
Abstract: PURPOSE:To take the loop back test of each device connected to a transmission line by using only one kind of test code by providing a switch which connects a test circuit sending circuit to the transmission line at the time of test code detection. CONSTITUTION:A test code from a tester is sent through a line 4. When a test code detecting circuit 1 detects the test code, a test code sending circuit 2 is controlled to send out specific test codes to the tester by as many as predetermined for each device. In such a case, the changeover switch 2 is placed on a side shown by a broken line in a figure and the test codes are sent to the tester. The changeover switch 3 is switched to a full line side after the test codes are sent, and a signal inputted to a device is sent out to the tester side by a line 5. Consequently, the tester identifies a looped-back place (equipment) from the received test codes and thus takes the loop back test.
Patent JP-H0231465-A (JP)
Title: Non-volatile memory wafer
Inventor: KUBOTA MICHITAKA
IPC: G11C16/04
Filed: 1988-07-21
Abstract: PURPOSE:To simply judge the characteristic of a tunnel insulating film by a method wherein a portion of the part other than a memory forming section of a tunnel insulating film in contact with a floating gate is sandwiched in between a pair of electrodes, which is used as a characteristic testing element. CONSTITUTION:A field oxide film 4 is selectively formed through a selective oxidation on the surface of a silicon substrate 1 which constitutes a wafer. A gate oxide film 5 is formed on a region of the surface which extends from the field oxide film 4, and a tunnel oxide film 5 is provided as a tunnel insulat ing film to a part of the gate oxide film a. A floating gate 7 is provided onto the gate oxide film 6 contacting the tunnel oxide film 6. Next, a field oxide film 14, formed in the same process as a characteristic testing element 3, is provided to the testing element 3 which is formed on a different part of the same silicon substrate 1. A tunnel oxide film 15, formed in the same process as the tunnel oxide film 5, is provided to a part of the gate oxide film 16.
Patent JP-H0231572-A (JP)
Title: Electronic shutter
Inventor: TABEI MASATOSHI
IPC: H04N5/3725
Filed: 1988-07-21
Abstract: PURPOSE:To improve the picture quality and resolution by simultaneously causing all photodetector to make shuttering operations and at the same time, reading out the signal charges of the photodetector. CONSTITUTION:Signal charges of a photodetector section 1 are full-frame transferred to an accumulating section 2 by accordion transfer under the control of a driving section 3 after the signal charges produced in photodetector are moved to a vertical charge transferring path, and then, all signals are read out by means of the charge transferring operation between the charge transferring path of the section 2 and a horizontal charge transferring section 4. Or signal charges corresponding to the remaining filed are read out by means of the charge transferring operation between the charge transferring path of the section 2 and the section 4 after the signal charges corresponding to a prescribed field of the signal charges transferred to the section are moved to a capacity element and the signal charges moved to the capacity element are read out by means of the charge transferring operation between the charge transferring path of the section 2 and circuit 4 after the signal charges moved to the capacity element are returned to the charge transferring path. Therefore, the picture quality and resolution can be improved.
Patent JP-H0841353-A (JP)
Title: Curable composition
Inventor: HAGIWARA KAZUO
IPC: C08L83/02
Filed: 1994-08-01
Abstract: PURPOSE:To improve the tensile properties (increase the elongation) and residual tack (decrease the tack) of a curable compsn. while retaining a suitable curing rate. CONSTITUTION:This compsn. contains a satd. hydrocarbon polymer having a hydroxyl or hydrolyzable group bonded to a silicon atom and at least one silicon group capable of cross-linking by forming a siloxane bond, a silicon compd. having a group represented by the formula: (R)3Si (wherein each R is independently H or an optionally substd. monovalent hydrocarbon group) and capable of generating (R)3SiOH by hydrolysis, and a cure catalyst.
Patent JP-H0346299-A (JP)
Title: Superconductive wiring
Inventor: YAMANAKA KAZUNORI
IPC: H05K1/09
Filed: 1989-07-14
Abstract: PURPOSE:To raise the upper limit of a direct current which can be made to flow and to lessen a wiring in surface impedance to a high frequency current so as to decrease the wiring in energy loss by a method wherein superconductors are arranged sandwiching a non-superconductor between them and the interface between the superconductor and the non-superconductor is made to act as a substantial surface of superconductor. CONSTITUTION:Superconductor films 2 and non-superconductor films 3 are alternately laminated on a board 1, and a wiring 4 is connected between superconductor terminals 5 provided onto the board 1. Taking it into consideration that a superconductive current flows only near the surface of a superconductor, the ridgeline (contour) of a superconductor in the cross section of a wiring vertical to a current direction is increased in length, whereby the wiring can be increased in current carrying capacity. Even in a high frequency current region where the skin effect of a conductor becomes large, the more the ridgeline of a superconductor becomes large in percentage per crosssectional area, the more the surface impedance decreases, in result the wiring is decreased in energy loss. By this setup, a wiring can be increased in current carrying capacity without increasing it in crosssectional area and more decreased in energy loss to a high frequency current.
Patent JP-H0628480-A (JP)
Title: Graphic input processing system having learning function
Inventor: ARAI HIROYUKI
IPC: G06T7/00
Filed: 1992-07-08
Abstract: PURPOSE:To avoid massive programming of every graphic kind, and also, to improve a recognition rate, and to reduce burden on an operator at the time of recognition by utilizing a learning function of a neural net from geometric information. CONSTITUTION:A graphic kind input means 1 inputs the kind of a graphic, and an operator instructs one of partial graphics for constituting the graphic with a recognition start partial graphic instructing means 2. This system is provided with a means 3 for extracting a partial graphic group existing in the periphery, a calculating means 4 for geometric information, a calculating means 5 for certainty by a learning function, for calculating the certainty from the geometric information, and a display means 6 for displaying successively from a candidate which seems to be the most certain, and an instructing means 7 fir a correct answer by the operator. A learning data generating means 8 generates learning data based on an operator's instruction, in the case where a decision by a computer is not correct. A learning instructing means 9 executes learning by using learning data. Also, by introducing the learning function, a procedure for recognition can be obtained automatically.
Patent JP-H0529387-A (JP)
Title: Manufacture of semiconductor device
Inventor: ASAKURA MAKOTO
IPC: H01L21/60
Filed: 1991-07-22
Abstract: PURPOSE:To eliminate necessity of aligning a semiconductor chip, to simplify an operation, and to simultaneously hold an alignment accuracy in a method for connecting the chip by a conventional solder bump. CONSTITUTION:A second silicon substrate 1B having an opening 6 for engaging a semiconductor chip is adhered to a first silicon substrate 1A having a circuit pattern and a solder bump connecting part, the chip 5 is then engaged, heated and connected. Then, after a photoresist film 7 is formed only on the chip 5, the substrate 1B is removed.
Patent JP-S5883038-A (JP)
Title: Polypropylene resin composition
Inventor: ARAI NORIHARU
IPC: C08L77/00
Filed: 1981-11-11
Abstract: PURPOSE:To provide the titled composition with excellent moldability in high- speed molding of thin-wall molds, by mixing pp with an aliph. carboxylic acid amide and an arom. carboxylic acid (deriv). CONSTITUTION:0.01-1wt% (un)saturated aliph. carboxylic acid amide, m.p. 60-110 deg.C, (e.g., oleamide) and 0.01-1wt% arom, carboxylic acid or deriv, thereof[e.g., phthalic acid (anhydride)]are mixed with PP, isotacticity index >=89%, MI:15-60. EFFECT:It is possible to obtain a mold which is excellent in clarity and stiffness, of good release characteristics, and has superior flatness throughout the surface and finish at the gate without lowering in fluidity in a mold.
Patent JP-2000031427-A (JP)
Title: Semiconductor integrated circuit
Inventor: SCHREMS MARTIN
IPC: H01L21/8242
Filed: 1999-06-25
Abstract: PROBLEM TO BE SOLVED: To provide a trench capacitor, wherein the rough surface of a trench sidewall is suppressed. SOLUTION: In a trench capacitor 301, an epitaxial layer 365 is provided at the lower part of the trench. The epitaxial layer 365 is used as an embedded plate of the trench capacitor. Furthermore, the trench lower part is surrounded by a diffused region 367, which results in higher dopant concentration of the epitaxial layer 365. The diffused region 367 is formed through vapor-phase doping, plasma doping, or plasma infiltration ion implantation.
Patent JP-S5882596-A (JP)
Inventor: MATSUMOTO KAZUHIRO
IPC: H05K3/34
Filed: 1981-11-11
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0526953-A (JP)
Title: Apparatus for inspecting integrated circuit
Inventor: KOBAYASHI AKIHIRO
IPC: H01L21/66
Filed: 1991-07-22
Abstract: PURPOSE:To stabilize measurement by removing the adverse effect on a measuring system due to the capacitance or impedance of the cable connecting a semiconductor inspection device and an integrated circuit to be measured. CONSTITUTION:A measuring circuit constituted of a feedback circuit (buffer amplifier OP1, resistor R1) for applying 0V to the GND terminal of an integrated circuit D.U.T. to be measured and a buffer amplifier OP2 for measuring the voltage drop across both terminals of the resistor R1 to detect the GNG current of the integrated circuit D.U.T flowing n the resistor R1 is arranged on the measuring board of the integrated circuit D.U.T to be measured. A feedback loop is applied to the GND terminal P2 of the integrated circuit D.U.T to be measured so that the same potential as the applied absolute reference voltage 0V is applied to the positive input of the OP1 of the feedback circuit and the GND terminal P2 can measure the current flowing to the GND terminal as the voltage drop of the resistor R1 in the state near to the connection state to a reference GND terminal.
Patent JP-S6344477-A (JP)
Inventor: SUGIYAMA TAKUJI
IPC: B29L22/00
Filed: 1986-07-31
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。