baber/WOPTO huggingface dataset:
Patent TW-337615-B (TW)
Title: Process of integral stacking for complementary metal-oxide semiconductors
Inventor: TSAY JAW-JYE
IPC: H01L27/105
Filed: 1996-08-07
Granted: 1998-08-01
Abstract: A process of integral stacking for a complementary metal-oxide semiconductor, which comprises: forming a gate oxide on a substrate; forming a gate on the gate oxide; forming a Lightly Dope Drain (LDD) underneath the gate oxide, the gate being an implanted mask; forming a first spacer on the periphery of the gate; forming a second spacer beside the first spacer; forming a heavily dope source/drain underneath the gate oxide; the gate, the first spacer and the second spacer being implanted masks; removing the second spacer; removing the gate oxide; the gate and the first spacer being hard masks; forming a metal layer on the gate and the first spacer; forming a metal silicide layer at portions where the metal layer and the polysilicon are adjacent to each other; removing the metal layer located next to the first spacer; and reinforcing the metal silicide layer to form a metal silicide layer with low resistance.
Patent TW-439004-B (TW)
Title: Method for orienting liquid crystal
Inventor: ENDOU HIDEYUKI
IPC: G02F1/1337
Filed: 1997-03-04
Granted: 2001-06-07
Abstract: The present invention relates to a method for orienting liquid crystal. A thin polymer film formed on a substrate is irradiated with polarized UV or electron beams in a certain direction to the surface of the substrate and a liquid crystal is oriented using the substrate without rubbing the polymer film. The polymer film contains polyimide resin consisting of repeating units represented by the formula and obtained by bringing a precursor of polyimide having 0.05-3.0 dl/g reduced viscosity (0.5 g/dl concentration in N-methyl-2-pyrrolidone at 30 DEG C) into dehydration ring closure.
Patent TW-360983-B (TW)
Title: Method for growing gallium nitride and its buffer layer structure
Inventor: SHI GUANG-GUO
IPC: H01L31/0304
Filed: 1997-03-20
Granted: 1999-06-11
Abstract: A method for growing gallium nitride (GaN) and its buffer layer structure. The method comprises, prior to growing the gallium nitride layer, continuously growing two layers of buffer layer on a substrate, i.e. growing a layer of amorphous buffer layer at a low temperature, and then growing another layer of buffer layer at a high temperature, then growing a gallium nitride monolithic layer at a high temperature, thereby obtaining a gallium nitride material with high quality and low defect. Meanwhile, a dopant can be added into the growing gallium nitride to form a P-type gallium nitride material or an N-type gallium nitride material to increase the conductivity thereof.
Patent TW-409152-B (TW)
Title: Etching gas composition for ferroelectric capacitor electrode film and method for etching a transition metal thin film
Inventor: KIM JIN-HONG
IPC: H01L21/3213
Filed: 1997-06-13
Granted: 2000-10-21
Abstract: An etching gas mixture for a transition metal thin film, and an etching method using the etching gas mixture are provided. The etching gas mixture is composed of two gases. The first gas is one selected from the group consisting of halogen gas, halide gas, halogen gas mixture, halide gas mixtrue and gas mixture of halogen and halide. The second gas is one selected from the group consisting of carbon oxide gas, hydrocarbon gas, nitrogen oxide gas and nitrogen-containing gas. The etching gas mixture reacts with the transition metal thin film to form a highly volatile metal halide, so that a fine pattern can be formed with a high selectivity.
Patent TW-394918-B (TW)
Title: Apparatus and method for controlling the updating of a random access memory (RAM) that stores data for coding the activation or pixels of one or more alphanmeric characters of a liquid crystal display (LCD)
Inventor: DRAKE RODNEY
IPC: G02F1/133
Filed: 1997-06-27
Granted: 2000-06-21
Abstract: Method and apparatus for controlling the updating of a random access memory (RAM) that stores data for coding the activation of segments of one or more alphanmeric characters of a liquid crystal display (LCD), to maintain substantially a direct current (DC) voltage value of zero across transparent conductive plates of the LCD, is performed or provided in a microcontroller having internal LCD control capabilities. A type B waveform is employed for activating the LCD, the waveform being of a type in which data is transmitted over two frames, the data in the second frame of which is the inverse of data in the first frame thereof to maintain an average DC voltage value over each two-frame portion of the waveform at substantially zero volt. The RAM is allowed to be written to for updating the data therein only after completion of an entire two-frame portion of the waveform and before commencement of a new two-frame portion, to avoid a non-zero average DC voltage across The LCD glass during a two-frame portion. An error bit is set whenever an attempt is made to write to the RAM at times other than between the end of a two-frame portion and the commencement of a new two-frame portion. A response to the error bit is made by returning to the write step that prompted it, to determine whether all of the data intended to be written has been stored in the RAM.
Patent TW-325554-B (TW)
Title: Installing and calibrating method of photoelectric cavity reflection mirror of linear scanner
Inventor: WU GWO-CHERNG
IPC: G06K7/10
Filed: 1997-07-22
Granted: 1998-01-21
Abstract: A installing and calibrating method of photoelectric cavity reflection mirror of linear scanner, which is applicable to fax machine or computer scanner, comprises: (1) Making parallel beams from auto collimator penetrate into assembly position of image receiving apparatus of photoelectric cavity; (2) Installing one assembly tool with calibration lens on position corresponding to photoelectric cavity, and sending individual reflection beam of each reflection mirror installed in sequence on photoelectric cavity back to auto collimator; (3) Inspecting received beam through auto collimator to judge if step-wise assembly of each reflection mirror of photoelectric cavity in tolerance range; (4) According to tolerance one by one calibrating each reflection mirror or modifying photoelectric cavity mechanism defect.
Patent TW-349287-B (TW)
Title: A forward converter with an inductor coupled to a transformer winding
Inventor: FITZGERALD WILLIAM VINCENT
IPC: H02M3/335
Filed: 1997-09-04
Granted: 1999-01-01
Abstract: A forward converter, comprising: a transformer having a first winding and a second winding; a source of an input supply voltage; a switching transistor responsive to a periodic switching control signal for periodically applying the input supply voltage to the first winding to generate current pulses in the switching transistor; a rectifier coupled to the second winding for rectifying a transformer-coupled voltage in the second winding to generate a rectified output supply voltage coupled to a load, the output supply voltage being generated during a portion of a given period when the input supply voltage is applied to the first winding, to provide forward converter operation; which is characterized in: an inductor coupled to the second winding via the first winding for limiting a rate of change of a current flowing in the rectifier and of the current pulses in the switching transistor; a capacitance coupled to the inductor to form a resonant circuit; and a control circuit responsive to a resonant voltage developed in the resonant circuit for generating the switching control signal having switching timings that control the output supply voltage to provide zero voltage switching in the switching transistor, the control circuit being responsive to the current pulses in the transistor to control the switching transistor current pulses in a current mode, on a current-pulse by current-pulse control basis.
Patent TW-364198-B (TW)
Title: Semiconductor memory device having senses amplifiers with offset latch transistors and interleaved gate fingers
Inventor: HAUKNESS BRENT S
IPC: G11C11/4091
Filed: 1997-11-11
Granted: 1999-07-11
Abstract: A semiconductor memory device 10 having sense amplifiers where the latch transistor moat region width is increased for the same sense transistor pitch. Each sense amplifier comprises latch transistors having a moat region and a gate region comprising a plurality of gate fingers where the length of the gate fingers is determined by the pitch of the sense amplifier. Adjacent latch transistors are offset from one another in both the horizontal and vertical directions and the gate fingers of those latch transistors are interleaved such that the latch transistors have wider moat regions while maintaining the sense amplifier latch transistor pitch. The resulting structure increases the sensing performance while maintaining the pitch.
Patent TW-366670-B (TW)
Title: Method of image encoding and decoding, image encoding and decoding apparatus, and media for recording image encoding and decoding program
Inventor: BOON CHOONG SENG
IPC: H04N19/63
Filed: 1997-11-06
Granted: 1999-08-11
Abstract: A picture encoding method is disclosed in which the quantizing process is performed after the DCT process of the digital picture data, the converted quantized coefficient is processed with variable length by referring the variable length code table which denotes the distribution of the variable length code, when comparing the event from the converted quantized coefficient with the reference event included in the variable length code table, the variable length encoding can be made efficiently by performing the converting procession.
Patent TW-360966-B (TW)
Title: Method for producing conductive interconnect
Inventor: JAU LI-JR
IPC: H01L23/52
Filed: 1998-03-12
Granted: 1999-06-11
Abstract: The invention provides a method for producing a conductive interconnect, which is characterized in applying a dual damascene process to complete the production of an interconnect, and using a high silicon-content silicon oxy-nitride compound as the etching stop layer which has a relatively slower etching speed to the oxide layer, thereby solving the problem of the etch pattern being damaged, while avoiding the problem of cracking of the etching stop layer.
Patent TW-438628-B (TW)
Title: Coating film forming method and coating apparatus
Inventor: TATEYAMA KIYOHISA
IPC: B05D3/10
Filed: 1998-04-28
Granted: 2001-06-07
Abstract: In forming a resist film by supplying a resist liquid onto a surface of an LCD substrate loaded in a rotation cup, a coating liquid is coated on the surface of the substrate by spraying the resist liquid onto the surface thereof while not rotating the substrate to thus form the coating film on the overall surface of the substrate, then the substrate is sealed into the rotation cup by closing the processing vessel by a lid member, and then a film thickness of the coating film is regulated by rotating the rotation cup and the substrate.
Patent TW-399200-B (TW)
Title: Method for copy protecting a record carrier, copy protected record carrier and means for detecting access control information
Inventor: NEWMAN PETER ALFRED
IPC: G06F1/00
Filed: 1998-07-10
Granted: 2000-07-21
Abstract: A method for copy protecting a record carrier is disclosed, in which method the copy protected record carriers are provided with a pattern of logical errors which cannot be corrected by the error correcting rules predefined for said record carrier. The pattern of logical errors represents access control information. The logical errors are generated during decoding the bit sequence read from the record carrier. Bit errors may be positioned in the bit sequence so as to counteract de-interleaving  which is part of an error decoding process in a reading device and accumulate in error word which are uncorrectable. Also a method for detecting access control information and a retrieval arrangement are disclosed, which retrieval arrangement serves to detect the access control information by selecting at least one error location, but not all error locations on the record carrier, and verifying the presence of an error by reading the selected error location via the reading means.
Patent TW-385410-B (TW)
Title: Method and apparatus for interfacing a processor to a coprocessor
Inventor: MOYER WILLIAM C
IPC: G06F9/38
Filed: 1998-08-28
Granted: 2000-03-21
Abstract: A processor (12) to coprocessor (14) interface supporting multiple coprocessors (14, 16) utilizes compiler generatable software type function call and return, instruction execute, and variable load and store interface instructions. Data is moved between the processor (12) and coprocessor (14) on a bi-directional shared bus (28) either implicitly through register snooping and broadcast, or explicitly through function call and return and variable load and store interface instructions. The load and store interface instructions allow selective memory address preincrementation. The bi-directional bus (28) is potentially driven both ways on each clock cycle. The interface separates interface instruction decode and execution. Pipelined operation is provided by indicating decoded instruction discard by negating a decode signal before an execute signal is asserted.
Patent TW-450942-B (TW)
Title: Hydrogen and oxygen generation device
Inventor: WANG MIN-SHIN
IPC: C01B3/06
Filed: 1998-09-21
Granted: 2001-08-21
Abstract: The present invention relates to a hydrogen and oxygen generation device, which comprises plural electrode plates of an electrolysis tank extended from inside to the outer periphery of the tank; a region with minute uneven face, a reversely-slanting blade region with slits and blades, and a gas circulation region with plural tank slots are formed on these electrode plates. The electrolysis electrode plate region is partially immersed in the electrolyte solution of the electrolysis tank. The positive and negative electrodes on the two sides of the electrode plate enable the electrolyte solution to generate an electric dissolution effect, thereby promptly and effectively generating hydrogen and oxygen. A condenser and a heat dissipation fan set are installed outside of the electrolysis tank to reduce the temperature of the tank so that the generated hydrogen or oxygen gas at high temperature can be rapidly cooled down and filtered to remove the moisture contained to obtain high-puritied hydrogen or oxygen gas.
Patent TW-434186-B (TW)
Title: Ordered mesoporous thin films
Inventor: BRINKER C JEFFREY
IPC: C09C1/30
Filed: 1998-12-17
Granted: 2001-05-16
Abstract: This invention comprises a method to form a family of supported films film with pore size in the approximate range 0.8-20 nm exhibiting highly ordered microstructures and porosity derived from an ordered micellar or liquid-crystalline organic-inorganic precursor structure that forms during film deposition. Optically transparent, 100-500 nm thick films exhibiting a unique range of microstructures and uni-modal pore sizes are formed in seconds in a continuous coating operation. Applications of these films include sensors, membranes, low dielectric constant interlayers, anti-reflective coatings, and optical hosts.
Patent TW-466600-B (TW)
Title: Method for making semiconductor device and the semiconductor device
Inventor: KAWASAKI YOUJI
IPC: H01L29/78
Filed: 1998-10-23
Granted: 2001-12-01
Abstract: This invention describes a semiconductor device manufacturing method which enables substantial elimination of oxygen atoms or crystalline imperfections included in a gate oxide film of an element fabricated on a well which is formed in a semiconductor substrate by means of high-energy ion implantation. An element whose gate oxide film has a high degree of reliability is manufactured by combining manufacturing conditions for forming a pad film on the surface of a substrate such as the type and thickness of the pad film, the valence of ions to be implanted, an implantation energy, and ion implantation before or after removal of the pad film. If necessary, post-implantation annealing conditions or conditions for growing a sacrificial oxide film are selected.
Patent TW-377283-B (TW)
Title: Spiked shoes
Inventor: NAKAMURA YUKIYASU
IPC: A43C15/04
Filed: 1998-12-11
Granted: 1999-12-21
Abstract: Spiked shoes that enable the wearer to kick the ground with a minimum loss of power. In spiked shoes having a spike secured to the toe and heel portions of the sole to extend across the longitudinal centerline of the sole. An additional spike is mounted to the sole at its intermediate portion between the toe and heel portions to extend across the fourth metatarsal of the wearer's foot. While the wearer is walking or running, the additional spike bear the wearer's weight at the root of the fourth toe. The wearer can thus kick the ground with a minimum loss of power. As a result, this spike cooperated with the spikes at the toe and heel portions to grip the ground firmly so that the wearer can kick the ground strongly even with the heels off ground.
Patent TW-513771-B (TW)
Title: Method for detecting defects of interconnects in semiconductor manufacturing process
Inventor: JOU MING-CHIUN
IPC: H01L21/66
Filed: 1999-01-06
Granted: 2002-12-11
Abstract: The invention provides a method for detecting defects of interconnects on semiconductor substrate. In the invention, a semiconductor substrate is placed in an electroplating solution and is electrically connected with the negative electrode of DC power source. An electrically conducting metal is placed in the electroplating solution and is electrically connected with the positive electrode of DC power source. After performing an electroplating process, the electroplating deposited material formed on the semiconductor substrate is observed and is used to determine whether the contact hole of the interconnects penetrates the dielectric layer and connects to the conductor layer surface.
Patent TW-442395-B (TW)
Title: Composite copper foil, process for preparing the same, and copper-clad laminate and printed wiring board using the same
Inventor: KATAOKA TAKASHI
IPC: C25D1/22
Filed: 1999-01-15
Granted: 2001-06-23
Abstract: This invention provides a composite foil comprising an organic release layer between a metal carrier layer and an ultra-thin copper foil, and a process for producing such composite foils comprising the steps of depositing the organic release layer on the metal carrier layer and then forming an ultra-thin copper foil layer on said organic release layer by electrodeposition. The organic release layer preferably is a nitrogen-containing compound, a sulfur-containing compound, or a carboxylic acid, which provides a uniform bond strength which is adequate to prevent separation of the carrier and ultra-thin copper foil during handling and lamination, but which is significantly lower than the peel strength of a copper/substrate bond, so that the carrier can easily be removed after lamination of the composite foil to an insulating substrate. The invention also includes laminates made from such composite foils and printed wiring boards made from such laminates.
Patent TW-408403-B (TW)
Title: Manufacture method of semiconductor device
Inventor: SHR SHIUE-HAU
IPC: H01L21/322
Filed: 1999-02-19
Granted: 2000-10-11
Abstract: A manufacture method of semiconductor device is provided, which comprises the steps of: using a first thermal process to form a pad oxide on one substrate wherein the first thermal process uses hydrogen and oxygen; and, using a second thermal process to form a sacrificed oxide on said substrate wherein the second thermal process uses hydrogen and oxygen.
Patent TW-420649-B (TW)
Title: Device for hold-disk-shaped plastic substrates
Inventor: ZAISS ROLAND
IPC: B65G47/90
Filed: 1999-10-21
Granted: 2001-02-01
Abstract: The present invention relates to a device for holding disk-shaped plastic substrates for pick-up and deposit. The device includes a holding device having at least one support unit for the plastic substrates, and a pick-up and/or deposit device on which a plastic substrate is mounted and from which the plastic substrate is picked-up or deposited. The holding device has a recess and the disk-shaped base body has a cylindrical protrusion on its side facing the holding device, which can be plugged into and releasably held mechanically or in a permanent-magnetic way in the recess.
Patent TW-541632-B (TW)
Title: Semiconductor device and manufacturing method thereof, circuit board and electronic equipment
Inventor: HASHIMOTO NOBUAKI
IPC: H01L23/31
Filed: 1999-09-09
Granted: 2003-07-11
Abstract: This invention relates to a semiconductor device comprising: a semiconductor chip (10) which is subjected to face-down bonding, having a plurality of electrodes (12) aligned on a straight line (L); a substrate (20) on which is formed an interconnect pattern (22) having bonding portions (24) to which the electrodes (12) of the semiconductor chip (10) are connected and lands (26) electrically connected to the bonding portions (24); external electrodes (30) passing through the substrate (20) and connected to the lands (26); and a support formed from bumps (11, 21) provided between the semiconductor chip (10) and substrate (20), in which the connected electrodes (12) and bonding portions (24) and the support formed by the bumps (11, 21) maintain the semiconductor chip (10) and substrate (20) substantially parallel.
Patent TW-457328-B (TW)
Title: A method of building with a formwork pretiling tiles and dismantling formwork by air pressure
Inventor: SUEN JEN-TAI
IPC: E04G21/14
Filed: 1999-09-17
Granted: 2001-10-01
Abstract: This formwork pretiling tiles on the formwork by air pressure, so that the tiling work can finished with concrete cast in place at the same time traditionary, when we absorbs an objects by vacuum. The objects must have a smooth surface; otherwise the objects well be fall immediately. This creation solved the problem by using foam rubber, although on an rough surface this creation can keep sufficient vacuum and keeps objects firmly.
Patent TW-426888-B (TW)
Title: Plasma processing method
Inventor: ISHII NOBUO
IPC: C23C16/511
Filed: 1999-09-17
Granted: 2001-03-21
Abstract: This invention relates to a plasma processing method. In a vacuum chamber, a gas-supplying portion is provided to surround an area facing a wafer. A processing gas is blown toward the wafer from the gas-supplying portion. A microwave for generating plasma is applied intermittently to the vacuum chamber by a high frequency voltage generating portion that is turned on and off at a frequency of 30 Hz to 500 Hz. As such, when the microwave is off, a residual gas on the wafer is replaced by a new processing gas. Therefore, the difference of the gas dissociation degree between the center portion and the peripheral portion of the wafer will not be relatively large, and a uniform plasma process will be possible.
Patent TW-472238-B (TW)
Title: Code compaction by evolutionary algorithm
Inventor: SCHAFFER J DAVID
IPC: G06N3/12
Filed: 2000-01-13
Granted: 2002-01-11
Abstract: A code compaction based on macro substitutions is presented wherein the choice of possible macro substitutions is guided by an evolutionary algorithm process. In a preferred embodiment, a random population of sets of macro substitutions are generated and a compaction effectiveness is evaluated for each set. This random population is partitioned into pairs of ""parents"", and each pair of parents produce a pair of ""offspring"". The effectiveness of the compaction provided by each of the offspring is evaluated, and a ""survival of the fittest"" algorithm is applied to identify the individuals that have the best compaction effectiveness. These preferred individuals are partitioned into pairs of parents who produce pairs of offspring, and the most compaction-effective individuals are selected to be parents for the next generation. This process continues until subsequent generations show insignificant improvement, and the best individual is selected as the solution.