baber/WOPTO huggingface dataset:
Patent TW-I742466-B (TW)
Title: Semiconductor device, memory macro, and layout of static random access memory array
Inventor: YANG CHIH-CHUAN
IPC: G11C11/41
Filed: 2019-11-18
Granted: 2021-10-11
Abstract: A semiconductor device includes a circuit region; a first well pick-up (WPU) region; a first well oriented lengthwise along a first direction in the circuit region and extending into the first WPU region, the first well having a first conductivity type; and a second well oriented lengthwise along the first direction in the circuit region and extending into the first WPU region, the second well having a second conductivity type different from the first conductivity type, wherein the first well has a first portion in the circuit region and a second portion in the first WPU region, and the second portion of the first well has a width larger than the first portion of the first well along a second direction perpendicular to the first direction.
Patent TW-I813814-B (TW)
Title: 運動導引裝置
Inventor: NAKANO TADASHI
IPC: F16C29/06
Filed: 2019-11-20
Granted: 2023-09-01
Abstract: 提供一種運動導引裝置，其即使於作用過大之力矩之環境下使用，也可防止運動導引裝置於早期產生晃動。於移動體(3)之負載滾動體滾動面(4b)之端部形成凸面(12)，並且於凸面(12)之端部形成倒角部(13)。若將負載滾動體滾動面(4b)之長度方向之凸面(12)與倒角部(13)的全長作為L，且將滾珠(6)之直徑作為Da，則設定為L/Da>4。將倒角部(13)之最大深度D設定為作用有基本動額定負載(C)之60%以上之徑向負載時之軌道構件(2)之滾動體滾動面(2a)、移動體(3)之負載滾動體滾動面(4b)、及滾動體(6)之彈性變形量以上。
Patent TW-I739242-B (TW)
Title: System for visualized storage configuration and method thereof
Inventor: LIU LI-YI
IPC: G06Q50/28
Filed: 2019-12-19
Granted: 2021-09-11
Abstract: The present disclosure provides a method for visualized storage configuration, the method includes: providing a product basic data and a storage space data; performing normalization of the product basic data based on the characteristics of the product to generate normalized product data; generating product color information corresponding to the product state according to the normalized product data; generating storage structure information corresponding to the storage status according to the storage space data; and combining the product color information and the storage structure information and adding the product color information to the storage structure information to obtain a visual storage configuration state. The present invention further provides a system for visualized storage configuration that performs operations for the aforementioned visualization.
Patent TW-I808293-B (TW)
Inventor: YOSHIDA NOBUKAZU
IPC: B32B27/18
Filed: 2019-12-30
Granted: 2023-07-11
Abstract: 本發明提供一種具有優異的抗靜電性、耐久性、耐藥品性、耐滲透性、耐熱性、及耐蝕性等，同時溶出的金屬少之被覆膜體、及該被覆膜體之製造方法。一種被覆膜體，特徵在於：其係具有基材、形成在前述基材之表面上的基底層、以及形成在前述基底層上之1層或複數層的氟樹脂被覆膜層之被覆膜體，其中前述氟樹脂被覆膜層係含有氟樹脂與高純度石墨烯。
Patent TW-I787574-B (TW)
Title: 曝光裝置及物品之製造方法
Inventor: SANO HIROTAKA
IPC: G03F7/20
Filed: 2020-01-13
Granted: 2022-12-21
Abstract: [課題]
提供為了精度佳地就遮光構材的異常進行檢測時有利的曝光裝置。
[解決手段]
一種曝光裝置，其為就基板進行曝光者，包含具有將來自光源的光進行遮斷的第1遮光構材的遮蔽器、就通過前述遮蔽器的前述光進行檢測的檢測部、和驅動前述遮蔽器從而控制前述基板的曝光處理的控制部，前述控制部比較在前述第1遮光構材被配置於前述光的光路徑的第1狀態下的前述檢測部的檢測結果、和在不將前述第1遮光構材配置於前述光的光路徑之下往前述檢測部的前述光的入射被遮斷的第2狀態下的前述檢測部的檢測結果，從而就前述第1遮光構材的異常進行檢測。
Patent TW-I747167-B (TW)
Title: 電商約定帳戶之系統及方法
Inventor: Deng jie-ming
IPC: G06Q20/00
Filed: 2020-02-14
Granted: 2021-11-21
Abstract: 一種電商約定帳戶之系統及方法，使用者在一電商平台伺服器進行約定帳戶時，電商平台伺服器提供可約定的複數發卡銀行以供選擇；使用者透過一客戶端裝置選擇後，電商平台伺服器送出一約定請求，透過一代理銀行伺服器傳送到一跨機構平台伺服器，跨機構平台伺服器依據約定請求跳轉連線至使用者所選擇之發卡銀行所對應的發卡銀行伺服器，讓客戶端裝置上顯示發卡銀行之網頁；以及使用者於發卡銀行伺服器中輸入複數約定作業所需資料，以進行電商平台伺服器與發卡銀行伺服器之約定作業。因此使用者之約定帳號等資料不會在電商平台伺服器中輸入，可避免隱私外洩的風險。
Patent TW-I791959-B (TW)
Title: 圖像解碼裝置、圖像解碼方法及程式
Inventor: SHIMA MASATO
IPC: H04N19/61
Filed: 2020-03-09
Granted: 2023-02-11
Abstract: 解碼手段從位元流將與N×M個量化係數對應的資料解碼。反量化手段至少使用量化矩陣從N×M個量化係數導出正交變換係數。逆正交變換手段對透過反量化手段而生成的正交變換係數執行逆正交變換，生成與P×Q像素的區塊對應的預測誤差。反量化手段至少使用具有N×M個要素的量化矩陣而導出正交變換係數，逆正交變換手段生成比N×M大的尺寸的P×Q像素的預測誤差。
Patent TW-I749496-B (TW)
Inventor: LEE SU JIN
IPC: H01L21/027
Filed: 2020-03-26
Granted: 2021-12-11
Abstract: 本發明提供一種可用於半導體微影製程中具有高厚度的硬質遮罩組成物，提供一種旋塗式硬質遮罩組成物以及一種透過旋塗將該組成物塗佈於被蝕刻層上並進行烘烤程序來形成硬質遮罩層的圖案化方法。根據本發明的硬質遮罩組成物，由於優異的溶解度特性，而具有高厚度、能夠承受多重蝕刻(multi etch)過程的高耐蝕刻性及優異的機械特性的效果。
Patent TW-I729784-B (TW)
Title: 電子鎖
Inventor: WU PING-HUA
IPC: E05B81/02
Filed: 2020-04-23
Granted: 2021-06-01
Abstract: 本發明電子鎖至少包括有鎖殼、鎖體、鎖鉤、電池、電控系統及外殼，鎖殼為經熱處理而具高硬度之金屬殼體，鎖體中具有第一鎖孔、第二鎖孔、第一觸動開關、第二觸動開關、馬達、機械鎖芯及鎖舌組，本發明上鎖及解鎖時，鎖鉤將觸發第一觸動開關及第二觸動開關，並將該觸發資訊即時傳輸給遠端控制中心，讓該遠端控制中心隨時得以監控到上鎖、解鎖的時間及地點，藉此以達到全方位的防盜效果。
Patent TW-I771683-B (TW)
Title: 光反應性液晶組成物，調光元件，調光元件之製造方法
Inventor: SASAKI TOMOYUKI
IPC: G02F1/13
Filed: 2015-11-05
Granted: 2022-07-21
Abstract: 本發明係提供不使用液晶配向膜，而在液晶塊材(crystal bulk)內控制液晶之配向性而得的元件，具體而言為調光元件及/或提供製造該元件用之光反應性液晶組成物。本發明係提供具有(A)具有產生選自由(A-1)光交聯及(A-2)光異構化所成群之至少1種反應之光反應性側鏈的光反應性高分子液晶；及(B)低分子液晶；的光反應性液晶組成物，且該(A)成分與(B)成分的重量比((A)成分：(B)成分)為3：97~20：80的組成物及具有含有該組成物之液晶胞而形成的調光元件。
Patent TW-I767235-B (TW)
Inventor: REN WEIMING
IPC: H01J37/06
Filed: 2020-05-21
Granted: 2022-06-11
Abstract: 本發明揭示藉由減少一多光束裝置中之一次級帶電粒子偵測器的偵測元件之間的串擾來增強成像解析度之系統及方法。該多光束裝置可包含用於將複數個次級帶電粒子束自一樣本投影至一帶電粒子偵測器上之一電光系統。該電光系統可包括一第一預限孔徑板，其包含經組態以阻擋該複數個次級帶電粒子束之周邊帶電粒子之一第一孔徑；及一光束限制孔徑陣列，其包含經組態以修整該複數個次級帶電粒子束的一第二孔徑。該帶電粒子偵測器可包括複數個偵測元件，其中該複數個偵測元件中之一偵測元件與該複數個次級帶電粒子束的一對應經修整光束相關聯。
Patent TW-I744912-B (TW)
Inventor: DILLING GARY
IPC: B25B15/00
Filed: 2017-07-03
Granted: 2021-11-01
Abstract: Fasteners, drivers, punches, fastener systems, and methods of making fasteners, drivers, punches, and fastener systems are disclosed herein. The fasteners, drivers, punches, and fastener systems include, in one example, stabilizing ribs and corresponding recesses.
Patent TW-I739480-B (TW)
Title: Clear channel assessment policy determination method and communication system thereof
Inventor: COFFEY JOHN TIMOTHY
IPC: H04L5/00
Filed: 2020-06-17
Granted: 2021-09-11
Abstract: A method of determining CCA (clear channel assessment) policy, applied in a communication system including multiple devices, is provided. The method includes the following steps: the devices broadcasting multiple policy indications, in which the devices include a coordinating device, multiple neighboring devices and multiple local client devices, the local client devices associate with the coordinating device to form a network, and the neighboring devices operate within at least one neighboring network; the coordinating device obtaining multiple neighboring policy indications from multiple neighboring frames transmitted by the neighboring devices; and the coordinating device determining whether to change a coordinating policy indication corresponding to the coordinating device according to the neighboring policy indications. A policy indication of a device indicates a policy among multiple CCA policies. The CCA policies include a first policy and a second policy, and the first policy is less sensitive to a sensed signal than the second policy.
Patent TW-I755009-B (TW)
Title: Led array and method of forming a led array
Inventor: PINOS ANDREA
IPC: H01L27/15
Filed: 2020-07-31
Granted: 2022-02-11
Abstract: A Light Emitting Diode (LED) array precursor is provided. The LED array precursor comprises a substrate having a substrate surface, a first LED stack, a p++ layer, a n++layer and a second LED stack. The first LED stack is provided on a first portion of the substrate surface. The first LED stack comprises a plurality of first Group III-nitride layers defining a first semiconductor junction configured to output light having a first wavelength wherein a n-type side of the first semiconductor junction is orientated towards the substrate surface. The p++ layer is provided on the first LED stack, the p++ layer comprising a Group III-nitride. The n++ layer has a first portion covering the p++ layer of the first LED stack and a second portion covering a second portion of the substrate surface, wherein a tunnel junction is formed at an interface between the n++ layer and the p++ layer, the n++ layer comprising a Group III-nitride. The second LED stack is provided on the second portion of the n++ layer covering the second portion of the substrate surface. The second LED stack comprises a plurality of second Group III-nitride layers defining a second semiconductor junction configured to output light having a second wavelength different to the first wavelength, wherein a n-type side of the semiconductor junction is provided towards the n++ layer. A method of manufacturing a LED array precursor is also provided.
Patent TW-I811557-B (TW)
Inventor: LEE HSIAO WEN
IPC: H01L27/14
Filed: 2020-07-31
Granted: 2023-08-11
Abstract: 一種光學感測模組，其包含一基板、一發光晶片、一感
測晶片、至少一封裝膠體以及一殼體，基板具有一安裝面，殼體係設置於安裝面上，發光晶片與感測晶片係相互分離地設置於殼體內，至少一封裝膠體係分別包覆發光晶片以及感測晶片，且該殼體具有一發射孔及一接收孔，該發射孔以及接收孔分別位於發光晶片以及感測晶片上方。
Patent TW-I795669-B (TW)
Title: Calibration of an aligner station of a processing system
Inventor: BERGANTZ NICHOLAS MICHAEL
IPC: H01L21/677
Filed: 2020-08-19
Granted: 2023-03-11
Abstract: A method for calibrating an aligner station of an electronics processing system is provided. A calibration is retrieved, by a first robot arm of a transfer chamber, from a processing chamber connected to the transfer chamber. The calibration object has a target orientation in the processing chamber. The calibration is placed, by the first robot art, in a load lock connected to the transfer chamber. The calibration is retrieved from the load lock by a second robot arm of a factory interface connected to the load lock. The calibration object is placed, by the second robot arm, at an aligner station housed in or connected to the factory interface. The calibration object has a first orientation at the aligner station. A difference is determined between the first orientation at the aligner station and an initial target orientation at the aligner station. The initial target orientation at the aligner station is associated with the target orientation in the processing chamber. A first characteristic error value associated with the processing chamber is determined based on the difference between the first orientation and the initial target orientation. The first characteristic error value is recorded in a storage medium. The aligner station is to use the first characteristic error value for alignment of objects to be placed in the processing chamber.
Patent TW-I758887-B (TW)
Inventor: SUZAWA HIDEOMI
IPC: H01L29/786
Filed: 2016-02-16
Granted: 2022-03-21
Abstract: A semiconductor device with reduced parasitic capacitance is provided. The semiconductor device includes a first insulating layer; a first oxide layer over the first insulating layer; a semiconductor layer over the first oxide layer; a source electrode layer and a drain electrode layer over the semiconductor layer; a second insulating layer over the first insulating layer; a third insulating layer over the second insulating layer, the source electrode layer, and the drain electrode layer; a second oxide layer over the semiconductor layer; a gate insulating layer over the second oxide layer; a gate electrode layer over the gate insulating layer; and a fourth insulating layer over the third insulating layer, the second oxide layer, the gate insulating layer, and the gate electrode layer.
Patent TW-I741867-B (TW)
Title: Integrated circuit chip and manufacturing method thereof
Inventor: WANG YUN-HSIANG
IPC: H01L23/535
Filed: 2020-11-06
Granted: 2021-10-01
Abstract: Various embodiments of the present application are directed towards 
an integrated circuit (IC) chip comprising a front-end-of-line (FEOL) through semiconductor-on-substrate via (TSV), as well as a method for forming the IC chip. In some embodiments, a semiconductor layer overlies a substrate. The semiconductor layer may, for example, be or comprise a group III-V semiconductor and/or some other suitable semiconductor(s). A semiconductor device is on the semiconductor layer, and a FEOL layer overlies the semiconductor device. The FEOL TSV extends through the FEOL layer and the semiconductor layer to the substrate at a periphery of the IC chip. An intermetal 
dielectric (IMD) layer overlies the FEOL TSV and the FEOL layer, and an alternating stack of wires and vias is in the IMD layer.
Patent TW-I742918-B (TW)
Inventor: TSENG CHING-YUNG
IPC: H04L7/02
Filed: 2020-11-11
Granted: 2021-10-11
Abstract: This disclosure is related to a multi-channel timing calibration device and method thereof. The device includes multiple channel inputs, at least one relay switch, at least one comparator, at least one first multiplexer and a time measuring chip, wherein, the at least one comparator is connected to the at least one relay switch and a reference voltage, the reference voltage could be replaced by a digital analog converter. The at least one first multiplexer has a lot of inputs signals of different channel groups and outputs a signal of a designated channel. The time measurement chip calculates the timing signal difference between each of the multiple channel inputs as a basis for the timing signal delay controlling. This disclosure achieves that the timing on the channel terminal is a uniformly aligned waveform, completes accurate timing error calibration, and avoids the signal time difference. Furthermore, this disclosure has only one single circuit board be used to reduces the circuit board cost drastically.
Patent TW-I762063-B (TW)
Title: Design method for achieving near 100% of diffractive efficiency in diffractive optical element
Inventor: LIN MING-YEN
IPC: G02B3/08
Filed: 2020-12-03
Granted: 2022-04-21
Abstract: The present invention proposes a design method for achieving near 100% of diffractive efficiency in the diffractive optical element. It relates to an optical design method for the two-materials composed diffractive Fresnel lens and mainly includes theoretical equations of calculation, data base of material characteristic parameters, and computer numerical calculation processes, further taking the advantages of a rule for matching material characteristic parameters and a rule for selecting the height of Fresnel zone respectively, so as to effectively match the material characteristic parameters between two different optical materials for achieving near 100% of diffractive efficiency.
Patent TW-I773084-B (TW)
Title: 多輸出的電源供應器及其功率分配控制方法
Inventor: YE JIA-AN
IPC: G06F1/26
Filed: 2021-01-12
Granted: 2022-08-01
Abstract: 本發明的電源供應器包含電源轉換模組及二切換模組，該電源轉換模組的二電源輸出端分別通過該二切換模組選擇性的導通或不導通二個對外的輸出埠。因此，該電源供應器可以根據該二輸出埠的需求功率及二電源輸出端的額定功率，控制由哪一電源輸出端供電至哪一電源輸出埠，或者由二電源輸出端合併輸出；如此一來，該電源轉換模組的二電源輸出端可以分別針對不同的額定功率進行最佳化設計，增加最佳轉換效率之設計範圍，對使用者而言亦不須根據不同的額定功率選擇不同的輸出埠，同時達到提升使用便利性之目的。
Patent TW-I777372-B (TW)
Title: 晶粒移取吸盤及使用其之晶粒移取之方法
Inventor: WU KUOCHENG
IPC: H01L21/67
Filed: 2021-01-18
Granted: 2022-09-11
Abstract: 本發明係關於一種晶粒移取吸盤及使用其之晶粒移取之方法，該晶粒移取吸盤具有複數個磁性吸頭，能同時移取複數個晶粒且同時完成定位，該磁性吸頭的尺寸微小，可用於巨量轉移微發光二極體(Micro-LED)。該晶粒移取之方法可使用多個本發明之晶粒移取吸盤，將晶粒移取至多個載板，提升晶粒移取效率。
Patent TW-I766569-B (TW)
Inventor: YIN PING-HUNG
IPC: G06F21/32
Filed: 2021-02-02
Granted: 2022-06-01
Abstract: 本發明係關於一種影像感測方法，其係應用於顯示裝置之屏下指紋辨識的防偽辨識。該影像感測方法包括感測器感測區塊劃分及其相對應顯示裝置顯示區塊劃分、顯示區塊顯示顏色之色座標定義、感測區塊感測強度、以及特性顏色運算。首先，將影像感測器劃分為感測區塊；接著，顯示裝置依據感測區塊對應地劃分顯示區塊，顯示區塊包含發光區塊；接著，定義各個該顯示區塊的發光顏色以及各個發光顏色之色座標數值；接著，各個感測區塊感測從顯示區塊照射到基準物以及待測物後反射至感測區塊的影像光強度；接著，並經由運算產生基準物之防偽基準顏色資訊登錄於系統；之後，待測物感測時先取得各區塊感測強度，並經由運算產生待測物之顏色資訊；最後，將上述的顏色資訊與該防偽基準顏色資訊進行比對。藉此，本發明在不增加防偽辨識模組的生產成本的情況下，提供一種高效能的防偽辨識。
Patent TW-I777437-B (TW)
Title: 半導體封裝體及其製造方法
Inventor: CHANG CHIN-CHUAN
IPC: H01L23/28
Filed: 2021-03-05
Granted: 2022-09-11
Abstract: 提供一種方法，方法包含在基底中形成一組穿孔，且所述一組穿孔部分地穿過基底的厚度。多個第一連接件在基底的第一側上形成在所述一組穿孔上方。基底的第一側附接至載體。自基底的第二側薄化基底以暴露出所述一組穿孔。多個第二連接件在基底的第二側上形成在所述一組穿孔上方。元件晶粒接合至第二連接件。基底經單一化為多個封裝體。
Patent TW-I807340-B (TW)
Title: 車輛自動定位管理系統及方法
Inventor: Huang xiu-ling
IPC: G06Q50/30
Filed: 2021-06-16
Granted: 2023-07-01
Abstract: 本發明是一種車輛自動定位管理系統及方法，包括一車端裝置和一攜帶式裝置，該車端裝置安裝在車輛上，並透過無線定位方式取得該車輛的第一定位位置，再傳送給該攜帶式裝置，該攜帶式裝置透過GPS取得該車輛的第二定位位置；當多數車輛組成車隊，並分別由攜帶式裝置上傳其第一、第二定位位置至一伺服器，經過點位誤差分析、圖像翻轉疊合及點位誤差修正等運算後以修正各車輛的第二定位位置；藉此提供車隊各成員準確的定位資料，以利於車隊管理。
Patent TW-I776587-B (TW)
Title: 顯示資料存取方法及利用其之控制電路、顯示器和資訊處理裝置
Inventor: Zhang hai-chuan
IPC: G09G5/22
Filed: 2021-07-09
Granted: 2022-09-01
Abstract: 一種顯示資料存取方法，其包括：對接收到的N位元顯示資料進行一高位保留程序以產生一旗標位元值及保留N-m個高位位元的資料以產生共N-m+1個位元的位元縮減資料，並將其寫入以N-m+1個位元為儲存單位之一記憶體單元中，其中，m小於N， m、N均為大於1的整數；以及自該記憶體單元讀取所述位元縮減資料並依所述旗標位元值對所述位元縮減資料進行一位元擴充程序以產生N位元的輸出資料。
Patent TW-I748929-B (TW)
Title: 射出裝置、射出裝置的氣體溶解方法及儲存有射出裝置的程式的儲存媒體
Inventor: KUBO YOSHIKAZU
IPC: B29C45/03
Filed: 2020-10-30
Granted: 2021-12-01
Abstract: 本發明期望在射出裝置中準確地控制氣體的供給量，所述射出裝置在射出軸後退而向射出室內供給氣體後，使射出軸前進從而使氣體壓縮溶解於射出室內的成形材料。本發明的射出裝置及其氣體溶解方法進行多個循環的射出軸的後退、前進。而且，儲存有本發明的射出裝置的程式的儲存媒體儲存了能夠實現本發明的射出裝置進行多個循環的射出軸的後退、前進的射出裝置的程式。。
Patent TW-I766781-B (TW)
Inventor: CHEN CHUNG-LUNG
IPC: B23Q15/22
Filed: 2021-07-29
Granted: 2022-06-01
Abstract: 本發明方法包含模型建立步驟、標的生成步驟、模具放置步驟、模具實測步驟、誤差取得步驟以及參數取得步驟，透過在一電子裝置的一3D模型預先產生一邊界盒以及複數個接觸邊界盒及3D模型的模擬邊界點，讓一精密加工機能在取得該等模擬邊界點之後，由一接觸式探球來實際接觸一實體模具取得多個接觸點，並由該等接觸點來產生一模擬邊角點及一誤差值，後續精密加工機的接觸式探球依據誤差值及多個模擬邊界點來再次接觸該實體模具，藉以演算出實體模具的一中心點；此外，精密加工機亦會依據該模擬邊角點及邊界盒來演算出複數個演算邊角點。
Patent TW-I789854-B (TW)
Inventor: BILODEAU STEVEN M
IPC: C23F1/24
Filed: 2021-07-30
Granted: 2023-01-11
Abstract: Provided are wet etching compositions and methods for etching a surface of a microelectronic device that contains silicon nitride (SiN), silicon oxide, and polysilicon which in one embodiment is in contact with a surface comprising a compound which is electrochemically more noble than silicon, and optionally other materials which may include a conductive material, a semiconducting material, or an insulating material useful in a microelectronic device, or a processing material that is useful in preparing a microelectronic device.
Patent TW-I778732-B (TW)
Title: Multi-screen display device
Inventor: TANG SHANG-PING
IPC: G02F1/133
Filed: 2021-08-02
Granted: 2022-09-21
Abstract: A multi-screen display device is disclosed. The multi-screen display device includes a first display screen, a first driving circuit, a second driving circuit, a second display screen, a third driving circuit and an application processor. The first driving circuit is coupled to the first display screen and used to drive a first display area of the first display screen. The second driving circuit is coupled to the first display screen and used to drive a second display area of the first display screen. The third driving circuit is coupled to the second display screen and used to drive the second display screen. The application processor has a first transmission port and a second transmission port. The first transmission port is coupled to the second driving circuit and the third driving circuit respectively and the second transmission port is coupled to the first driving circuit.
Patent TW-I806141-B (TW)
Title: Processor circuit and computer readable medium
Inventor: HSIEH HAN-CHIEH
IPC: G06F1/3203
Filed: 2021-08-30
Granted: 2023-06-21
Abstract: A processor circuit includes a processor, N detection circuits and a neural network circuit. The processor is configured to provide a control signal. The control signal indicates an operational status of the processor. The N detection circuits are configured to detect N different types of variation factors affecting an operating voltage of the processor respectively, and accordingly generate N detection results respectively. N is an integer greater than one. The neural network circuit, coupled to the processor and the N detection circuits, is configured to determine the operating voltage of the processor according to the control signal and the N detection results.
Patent TW-I774546-B (TW)
Title: 超音波探傷儀輔助定位之鋼材缺陷樣品製備方法
Inventor: SU YAN-HAO
IPC: G01N29/06
Filed: 2021-09-02
Granted: 2022-08-11
Abstract: 一種超音波探傷儀輔助定位之鋼材缺陷樣品製備方法，包含：粗略定位鋼材缺陷；於鋼材表面劃缺陷標記；自鋼材樣品粗胚切出具缺陷標記的水浸式超音波探傷樣品，並於其表面鑽定位孔；對水浸式超音波探傷樣品進行探傷，以獲得C掃瞄圖；於C掃瞄圖標缺陷輪廓；調整C掃瞄圖輸出比例，使定位孔圖案的距離與定位孔的距離相符；列印C掃瞄圖之圖片；將圖片貼於水浸式超音波探傷樣品上，使定位孔圖案與定位孔完全重合；將缺陷輪廓刻於水浸式超音波探傷樣品上，再移除圖片；自水浸式超音波探傷樣品切出含缺陷輪廓之粗切割樣品；及製備缺陷剖面樣品。
Patent TW-I778873-B (TW)
Title: Camera device
Inventor: KUAN CHI-FU
IPC: H04N5/225
Filed: 2021-11-23
Granted: 2022-09-21
Abstract: A camera device includes an outer cover, a lens, a first circuit board and a second circuit board. The outer cover includes a first end, a second end, an axial hole, and a limiting column, and the limiting column integrally extends from the second end. The lens disposed at the first end. The first circuit board is fixed to the second end of the outer cover and includes an inner surface and an outer surface. The inner surface is provided with a photosensitive element. The photosensitive element is located in the axial hole and corresponds to the lens. The first circuit board is further provided with an avoidance area, which penetrates the inner surface and the outer surface and corresponds to the limiting column. The second circuit board is electrically connected to the first circuit board, the second circuit board includes a first surface and a second surface. The first surface faces the outer surface, and the limiting column of the outer cover passes through the avoidance area and extends to the first surface, so that the first circuit board and the second circuit board maintain a fixed distance.
Patent TW-I788171-B (TW)
Title: Image processing device and super resolution processing method
Inventor: LI YUNG-HUI
IPC: G06T5/20
Filed: 2021-12-30
Granted: 2022-12-21
Abstract: An image processing device is provided, which includes an image capture circuit and a processor. The image capture circuit is configured to a capture high resolution image. The processor is connected to the image capture circuit and executes a super resolution model and an attention model, and the processor is configured to perform the following operations: perform down-sampling processing on the high resolution image to generate a low resolution image; apply the attention model to the high resolution image and the super resolution image to generate an attention-weighted high resolution image and an attention-weighted super resolution image, and calculate a first loss according to the attention-weighted high resolution image and the attention-weighted super resolution image; and update the super resolution model according to the first loss.
Patent TW-I782869-B (TW)
Title: 具疏水改質纖維素纖維及油之膜
Inventor: OHSAKI KOUJI
IPC: B65D65/42
Filed: 2018-03-07
Granted: 2022-11-01
Abstract: 本發明係關於一種具有於選自纖維素纖維之陰離子性基及羥基中之1種以上鍵結有修飾基而成之疏水改質纖維素纖維及SP值為10以下之油的膜。本發明之膜可用於化妝料或食品之包裝容器之素材領域。
Patent TW-I790137-B (TW)
Title: 背光模組及其製造方法
Inventor: HO HSUAN-WEI
IPC: H01H13/702
Filed: 2022-03-08
Granted: 2023-01-11
Abstract: 一種背光模組包含蓋板、導光板、電路板、第一反射層以及光源。蓋板具有遮光區。導光板設置於蓋板下方，並具有第一開孔與遮光區相對。電路板設置於導光板下方，並包含第一基板以及導電層。導電層具有通孔。第一反射層設置於導光板與電路板之間，並具有第二開孔與第一開孔相對。第一基板至少部分與第一反射層接觸。導電層設置於第一基板與第一反射層之間。第一反射層具有凹部陷入通孔中。光源設置於電路板上並容置於第一開孔與第二開孔中。光源與導電層接觸。
Patent TW-I803257-B (TW)
Title: 控制器及控制方法
Inventor: KANNO SHINICHI
IPC: G06F9/312
Filed: 2017-07-07
Granted: 2023-05-21
Abstract: 本發明的實施形態係提供一種能夠以無晶片爭用而存取非揮發性記憶體且能夠解消不均等的消耗的記憶體系統及控制方法。
 
     實施形態的記憶體系統，將前述複數非揮發性記憶體晶片分類成複數晶片群組，使得各複數非揮發性記憶體晶片僅屬於一個晶片群組。記憶體系統，因應指定包含對應各晶片群組的至少一個區域的複數區域的任一者的來自前述主機的I/O指令，執行對於前述複數晶片群組內的一個晶片群組的資料寫入/讀出動作。記憶體系統，當從主機接收到包含指定複製源晶片群組及複製目標晶片群組的參數的指令時，執行用以將複製源晶片群組內的有效資料複製至複製目標晶片群組的動作。
Patent TW-I814450-B (TW)
Inventor: WAGENLEITNER THOMAS
IPC: H01L21/67
Filed: 2017-02-16
Granted: 2023-09-01
Abstract: 本發明係關於一種運用以下步驟、特定言之以下順序使一第一基板(2)與一第二基板(2’)接合於該等基板(2、2’)之接觸面(2o、2o’)處之方法：
        - 運用一固持力F
         H1 將該第一基板(2)固持至一第一樣本固持器(1)之一第一樣本固持器表面(1o)且運用一固持力F
         H2 將該第二基板(2’)固持至一第二樣本固持器(1’)之一第二樣本固持器表面(1o’)，
        - 使該等接觸面(2o、2o’)在一接合起始點(20)處接觸且將至少該第二樣本固持器表面(1o’)加熱至一加熱溫度T
         H ，
        - 沿自該接合起始點(20)延伸至該等基板(2、2’)之側邊緣(2s、2s’)之一接合波接合該第一基板(2)與該第二基板(2’)，
        其特徵為
        在該接合期間加熱溫度T
         H 在該第二樣本固持器表面(1o’)處降低。
Patent TW-I799306-B (TW)
Inventor: TSAI YI-LIN
IPC: G02F1/13357
Filed: 2021-03-11
Granted: 2023-04-11
Abstract: 一種背光模組，包含一光學板、一光源以及一光學膜片。光學板包含一出光面、一底面以及一側面，底面與出光面相對，側面連接於出光面及底面之間。光源設置於光學板的底面或側面。光學膜片設置於出光面的上方。光學膜片包含一本體以及至少一折射部。本體包含至少一端面，折射部設置於端面，且包含複數個微型結構。所述微型結構的尺寸實質上相同且以端面為基準往遠離端面的一側向方向堆疊，而使折射部於側向方向上相對於端面具有不同厚度，且折射部的折射率與本體的折射率相異，以使複數道光線通過折射部後朝不同方向偏折。