baber/WOPTO huggingface dataset:
Patent TW-I224444-B (TW)
Title: Digital network
Inventor: BENHAM JOHN R
IPC: H01P5/18
Filed: 2003-01-06
Granted: 2004-11-21
Abstract: The method of networking comprises connecting a first coupler to a first and second transmission line to couple the first and second transmission lines, connecting a second coupler to the second and a third transmission line to couple the second and third transmission lines, connecting a third coupler to the first and third transmission line to couple the first and third transmission lines, connecting a first end of the first transmission line to a first digital device, connecting a first end of the second transmission line to a second digital device, and connecting a first end of the third transmission line to a third digital device. A signal is transmitted through the first, second, or third transmission line, by one of the digital devices, and is received by at least one digital device different from the transmitting digital device.
Patent TW-589616-B (TW)
Title: An image-displaying device capable of processing USB data
Inventor: LEE MENG-CHE
IPC: G09G5/36
Filed: 2003-01-07
Granted: 2004-06-01
Abstract: An image-displaying device for displaying images, comprises a housing; a universal serial bus port installed on the housing, for electrically connecting to an electronic device through a universal serial bus in order to input serial data; a data converting circuit installed in the housing and electrically connected to the universal serial bus port, for converting the serial data to image data; an image processor installed in the housing and electrically connected to the data converting circuit, for converting the image data to image-generating data; and an image generator installed in the housing and electrically connected to the image processor, for forming an image on a display according to the image-generating data.
Patent TW-I249840-B (TW)
Title: Circuit structure and semiconductor integrated circuit
Inventor: OTSUKA KANJI
IPC: H01L21/82
Filed: 2003-01-24
Granted: 2006-02-21
Abstract: A bypass capacitor having a given capacitance is arranged on the power/ground line adjacently to a driver circuit in a chip to reduce an effect of transient phenomenon at switching. The capacitance of the bypass capacitor is preset so as to be larger than a parasitic capacitance of the driver circuit to prevent the characteristic impedance of the power/ground line from being higher than the characteristic impedance of internal wiring.
Patent TW-I265823-B (TW)
Title: Kneading element of kneading device, and kneading device with the kneading element
Inventor: YOSHIOKA HISAO
IPC: B01F15/00
Filed: 2003-02-19
Granted: 2006-11-11
Abstract: The present invention provides a kneading element capable of rapidly kneading a dough lump by satisfactorily kneading and continuously providing compression to the dough lump without adhering dough to the kneading element even if the dough lump has a diameter far exceeding the radius of a container bottom wall and a kneading device with the kneading element. The kneading element has a side face formed so that a distance from one point of the side face to a rotating center axis is reduced starting from a bottom part toward a top face or is constant in a cross section including the rotating center axis and so that the distance from one point of the side face to the rotating center axis is always increased during one rotation in a cross section orthogonal to the rotating center axis.
Patent TW-I252375-B (TW)
Title: Mask pattern correction method, semiconductor device manufacturing method, mask manufacturing method, and mask
Inventor: OMORI SHINJI
IPC: G03F7/20
Filed: 2003-03-20
Granted: 2006-04-01
Abstract: A mask pattern correction method by which the position of a pattern is prevented from varying because of deformation of a mask due to the gravity, a mask manufacturing method and a mask, and a semiconductor device manufacturing method by which a fine pattern with high precision is formed are provided. The mask pattern correction method comprises the steps of creating first position data representing the positions of marks that a first thin film has when the first thin film is supported with a first surface up, creating second position data representing the positions of the marks when the first thin film is supported with a second surface up, defining a transfer function for converting the first position data into the second position data, and correcting the mask pattern of the shape of an exposure beam transmitting part formed in a second thin film by using an inverse function of the transfer function. A mask manufacturing method, a mask manufactured by the method, and a semiconductor device manufacturing method using the mask are disclosed.
Patent TW-I236839-B (TW)
Title: Image processor, image processing method, recording medium, and program
Inventor: SATO NOBUYUKI
IPC: H04N5/343
Filed: 2003-04-11
Granted: 2005-07-21
Abstract: The present invention relates to an image processing system capable of executing sampling with all the pixels used, and an image processing method, a recording medium, and a program. When a (1, 0, 1, 0, 1)/3 filter is set with green pixels in a first line used us target pixels in a horizontal component low-pass filter, green pixels are multiplied by 1, red pixels are multiplied by 0, and a total of these pixel values is divided by 3 to thereby calculate a simple average of the target pixels and adjacent green pixels. When red pixels in the first line are used as target pixels, a simple average of the target pixels and adjacent red pixel is calculated in the same way. In the same way, green pixels and blue pixel in a second line are filtered. Since every three pixels of a horizontal component are sampled at a horizontal 1/3 thinning unit, a sampling pixel group composed of simple average values of every three pixels as target pixels and adjacent pixels of the same color is generated. This invention is applicable to digital cameras.
Patent TW-I235575-B (TW)
Title: Sampling error phase compensator and method thereof
Inventor: LIU JAU-SHIN
IPC: H03L7/093
Filed: 2003-06-13
Granted: 2005-07-01
Abstract: The present invention relates to a sampling error phase compensator and a method thereof for sampling multiple data signals in sequence and outputting multiple sampling data signals in sequence. Firstly, in accordance with a clock signal, sampling is performed on each data signal. In accordance with the sampling data signals, multiple corresponding phase detecting signals are output in sequence. Then, in accordance with the phase detecting signals, multiple phase regulating signals are output in sequence, where each phase regulating signal corresponds to a phase detecting signal. If the phase detecting signal are all the same, the phase regulating signals at least include multiple first-state phase regulating signals and multiple second-state phase regulating signals, where each first-state phase regulating signal corresponds to a phase detecting signal and the number of the second-state phase regulating signals is less than the number of the first-state phase regulating signals. Finally, in accordance with the phase regulating signals, multiple sampling clock signals are output in sequence, where the phase of each sampling clock signal corresponds to the phase of a phase regulating signal.
Patent TW-I221715-B (TW)
Title: Frequency offset compensation estimation system and method for a wireless local area network
Inventor: SU HSIAO-LAN
IPC: H04L27/34
Filed: 2003-06-24
Granted: 2004-10-01
Abstract: A frequency offset compensation estimation system and method for a wireless local area network. First, a preamble sequence of a frequency package is sent to a frequency offset estimation (FOE) device so that an initial frequency offset signal amount is obtained and sent to the frequency offset compensation (FOE) device for compensation. Then, the compensated signal is sent to a frequency offset residual phase estimation (FOS RPE) device so as to calculate an offset amount of the frequency and send it to the frequency offset residual phase compensation (FOS RPC) device for compensation. The present invention mainly employs a residual frequency offset estimation device (residual FOE device) to estimate the residual frequency offset signal of each of the frequency signals compensated by the frequency compensation device and feedback it to the frequency compensation device for compensation. Therefore, the operation load of the frequency offset residual phase compensation (FOS RPC) device will be reduced so as to improve the operation efficiency of the system.
Patent TW-I223870-B (TW)
Title: Method of forming capacitors having geometric deep trench
Inventor: HUANG TSE-YAO
IPC: H01L21/334
Filed: 2003-06-27
Granted: 2004-11-11
Abstract: A method of forming capacitors with geometric deep trenches. The method includes providing a substrate, sequentially forming a pad structure and a first hard mask layer on the substrate, forming a patterned second hard mask layer on the first hard mask layer to expose a first opening, forming a spacer layer on the two sides of the first hard mask layer to expose a second opening, filling the second opening with a third hard mask layer, removing the spacer layer, etching the first hard mask layer using the second hard mask layer and the third hard mask layer as masks to expose a third opening with a salient of first hard mask layer, and etching the first hard mask layer, the pad structure, and the substrate to form a geometric deep trench in the substrate.
Patent TW-I251226-B (TW)
Title: Adaptive writing method for high-density optical recording apparatus and circuit thereof
Inventor: SEO JIN-GYO
IPC: G11B7/00
Filed: 2000-01-04
Granted: 2006-03-11
Abstract: An adaptive writing method for a high-density optical recording apparatus and a circuit thereof are provided. The circuit includes a discriminator for discriminating the magnitude of the present mark of the input data and the magnitudes of the leading and/or trailing spaces, a generator for controlling the waveform of the write pulse in accordance with the magnitude of the present mark of the input data and the magnitudes of the leading and/or trailing spaces to generate an adaptive write pulse, and a driver for driving the light source by converting the adaptive write pulse into a current signal in accordance with driving power levels for the respective channels. The widths of the first and/or last pulses of a write pulse waveform are varied in accordance with the magnitude of the present mark of input NRZI data and the magnitude of the leading and/or trailing spaces, thereby minimizing jitter to enhance system reliability and performance.
Patent TW-I221561-B (TW)
Title: Nonlinear overlap method for time scaling
Inventor: WU GIN-DEV
IPC: G10L21/04
Filed: 2003-07-23
Granted: 2004-10-01
Abstract: A nonlinear overlap method for time scaling to synthesize an S1[n] and an S2[n] into an S3[n] is disclosed, the S1[n] and the S2[n] having N1 and N2 signals respectively. The method includes following steps: (a) delaying the S2[n] by a predetermined number and forming an S5[n], (b) establishing a correlogram of a crosscorrelation function of the S1[n] and S5[n], and (c) setting S3[n] as a number of S1[n] when 0 <= n < (the predetermined number + a maximum index corresponding to a maximum magnitude of the correlogram + a first threshold); as a number formed by overlap-adding the S1[n] and an S4[n] in a weighting manner when (the predetermined number + the maximum index + the first threshold) <= n < (N1 - a second threshold); and as a number of S4[n-(the predetermined number + the maximum index)], when (N1 - the second threshold <= n < (N2 + the predetermined number + the maximum index); wherein the first and second thresholds are not equal zero at the same time, and the S4[n] is formed by decaying the S5[n] by the maximum index.
Patent TW-I235038-B (TW)
Title: Filter for smoking
Inventor: INAGAKI MICHIHIRO
IPC: A24F13/04
Filed: 2003-08-29
Granted: 2005-07-01
Abstract: A filter for smoking includes a filter medium, and a means for heating the filter medium or a periphery of the filter medium.
Patent TW-I279440-B (TW)
Title: DNA extraction buffer from samples containing starch and a method for extracting the same
Inventor: CHEN YU-HSIN
IPC: C12N15/10
Filed: 2003-09-15
Granted: 2007-04-21
Abstract: This invention provides a DNA extraction buffer and a method for extracting DNA from samples containing starch. The method enhances the yield and quality of DNA extracted from plant storage tissues or organs, such as seeds, roots, stems, leafs, flowers and fruits, and their derivative processed products containing starch. The extracted DNA can be applied to subsequent analysis directly.
Patent TW-I267911-B (TW)
Title: Method of cleaning a semiconductor
Inventor: HUANG CHIH-YUAN
IPC: H01L21/302
Filed: 2003-10-28
Granted: 2006-12-01
Abstract: A semiconductor cleaning method used after an inter-gate dielectric layer of a semiconductor is formed is described. The method includes providing a semiconductor wafer, forming a first layer of oxide over the semiconductor wafer, forming a floating gate layer over the first layer of oxide, forming a second layer of oxide over the floating gate layer, etching the first layer of oxide, the floating gate layer, and the second layer of oxide to form a gate structure, wherein the second layer of oxide serving as the inter-gate dielectric layer, cleaning the semiconductor wafer including the gate structure using an ozonated de-ionized (DI) water, further cleaning of the ozonated water-cleaned semiconductor wafer using a first cleaning solution, and additional cleaning of the further cleaned semiconductor wafer using a second cleaning solution.
Patent TW-I249320-B (TW)
Title: Method and device to switch the editing format
Inventor: HUANG HSING-WEI
IPC: G10H1/00
Filed: 2004-01-08
Granted: 2006-02-11
Abstract: A method to switch the editing format is disclosed, which has a musical-tone-corresponding-table to edit the musical tone data of ring melody corresponding to different musical tone formats. Also, the method of the present invention is to detect whether the user performs a switching operation for editing the data of different musical tone formats, if the user performs the switching operation, display the musical tone data and edit the musical data of the ring tone melody based on the corresponding musical-tone-corresponding-table.
Patent TW-I273235-B (TW)
Title: PbTiO3/SiO2-gated ISFET device and method of manufacturing the same and method of forming sensing film
Inventor: CHOU JUNG-CHUAN
IPC: G01N27/00
Filed: 2004-02-05
Granted: 2007-02-11
Abstract: A PbTiO3/SiO2-gated ISFET device comprising a PbTiO3 thin film as H+-sensing film, and a method of manufacturing the same. The PbTiO3 thin film is formed through a sol-gel process which otters many advantages, such as, low processing temperature, easy control of the composition of the film and easy coating over a large area substrate. The PbTiO3/SiO2 gated ISFET device of the present invention is highly sensitive in aqueous solution, and particularly in acidic aqueous solution. The sensitivity of the present ISFET ranges from 50 to 58 mV/pH. In addition, the disclosed ISFET has high linearity. Accordingly, the disclosed ISFET can be used to detect effluent.
Patent TW-I354929-B (TW)
Title: Method and computer program product for executing
Inventor: LUNDVALL SHAWN D
IPC: G06F9/302
Filed: 2004-05-07
Granted: 2011-12-21
Abstract: A method, system and computer program product for computing a message authentication code for data in storage of a computing environment. An instruction specifies a unit of storage for which an authentication code is to be computed. An computing operation computes an authentication code for the unit of storage.
Patent TW-I250564-B (TW)
Title: Method for forming gate in semiconductor device
Inventor: PARK KYE-SOON
IPC: H01L21/336
Filed: 2004-05-21
Granted: 2006-03-01
Abstract: The present invention relates to a method for forming a gate in a semiconductor device. The method includes the steps of: sequentially forming a gate insulation layer and an inter-layer insulation layer on a substrate; patterning the inter-layer insulation layer into a predetermined configuration, thereby forming a patterned inter-layer insulation layer; forming a nitride layer on the patterned inter-layer insulation layer; simultaneously etching the nitride layer and the substrate, thereby obtaining a spacer on sidewalls of the patterned inter-layer insulation layer and a trench having a predetermined depth in the substrate; forming a conductive layer on the trench; and planarizing the conductive layer, thereby forming the gate.
Patent TW-I303604-B (TW)
Title: Vulcanized fluororubber and cushion material for hot press containing said fluororubber
Inventor: YOSHIDA AKIRA
IPC: B32B25/14
Filed: 2004-05-27
Granted: 2008-12-01
Abstract: A vulcanized fluoro rubber is provided by vulcanizing a composition comprising 100 parts by mass of mixture in which a raw fluoro rubber (A) in which appropriate amount of vulcanizing agent has been previously compounded and a raw fluoro rubber (B) in which the vulcanizing agent is not compounded are mixed at a rate of 8/2 to 3/7, 1 to 10 parts by mass of an acid acceptor and 0 to 5 parts by mass of another compounding agent which is compounded as needed. Number average molecular weight of each of the raw fluoro rubber (A) and the raw fluoro rubber (B) is 3.5 x 10 4  to 2.0 x 10 5 .
Patent TW-I256538-B (TW)
Title: New soft-start circuit
Inventor: LEE CHIEN-LUNG
IPC: G05F3/16
Filed: 2004-06-14
Granted: 2006-06-11
Abstract: The present invention provides a soft-start circuit, which comprises a current source with the input connected with a first voltage; a first current mirror with the input connected with the output of the current source, and the shared source connected with a second voltage, which is formed by coupling a first metal oxide semiconductor field effect transistor (MOSFET) and a second MOSFET; a third MOSFET with the gate connected with the shared gate of the first current mirror, the source connected with a second voltage; a second current mirror with the input connected with the drain of the third MOSFET, the output connected with the output of the first current mirror, and the shared source connected with the first voltage, which is formed by coupling a fourth MOSFET with a fifth MOSFET; and, a capacitor with one end connected with the second voltage; by suitably configuring the aspect ratio of channel area for the first MOSFET, the second MOSFET, the third MOSFET, the fourth MOSFET, and the fifth MOSFET, so as to reduce the current flowing through the capacitor, and further reduce the ratio of soft-start voltage to time for the soft-start circuit.
Patent TW-I236800-B (TW)
Title: Addressing type frequency counter circuit
Inventor: TANG DI
IPC: H03K21/38
Filed: 2004-06-15
Granted: 2005-07-21
Abstract: Disclosed is a kind of addressing type frequency counter circuit, using the addressing system to receive multiply power parameters and clocks from an external circuit; and after the addressing type frequency counter circuit computes, a resulting clock multiple value is then transmitted to the external circuit by means of the addressing. Therefore, this invention utilizes memory more efficiently, reduces circuit design complexity, and thus improves integration of the addressing type frequency counter circuit.
Patent TW-I251917-B (TW)
Title: Chip package for fixing heat spreader and method for packaging the same
Inventor: YANG CHING-HSU
IPC: H01L23/36
Filed: 2004-09-02
Granted: 2006-03-21
Abstract: A chip package for fixing heat spreader mainly includes a substrate, a stiffener, a chip, a TIM (thermal interface material) and a heat spreader. The stiffener is disposed on the substrate and has a buckle-assembling portion. The chip is disposed on the substrate. The TIM is formed on a surface of the chip. The heat spreader has a resilient-buckling portion. The heat spreader is connected to the buckle-assembling portion of the stiffener via the resilient-buckling portion in a manner that the heat spreader can touch the TIM. Therefore the BLT (bond line thickness) of the TIM between the chip and the heat spreader can be controlled. Besides, the heat spreader can be prevented from sliding during a packaging process.
Patent TW-I262363-B (TW)
Title: An assembly, a lithographic apparatus, and a device manufacturing method
Inventor: FRANKEN DOMINICUS JACOBUS PETR
IPC: H01L21/027
Filed: 2004-10-08
Granted: 2006-09-21
Abstract: A lithographic apparatus comprising a projection optics assembly PL for projecting a patterned beam onto a target portion of a substrate. The projection optics assembly comprising a first element having a predetermined functionality which is to be fixedly positioned with respect to a second element, wherein the element are arranged in a spaced relationship on a support frame, wherein the support frame has an interface surface formed on or in the support frame for receiving the first element. Wherein the interface surface determines the position of the first element with respect to the second element, and is adapted in accordance with the predetermined functionality so that the first element is positionable with respect to the second element with at least three degrees of freedom.
Patent TW-I248651-B (TW)
Title: Method for reducing the contact resistance of the connection regions of a semiconductor device
Inventor: LANDER ROBERT
IPC: H01L29/78
Filed: 2004-10-14
Granted: 2006-02-01
Abstract: The invention relates to a method for fabricating a semiconductor device having a semiconductor structure with a silicon region which forms at least one connection region in and/or on a surface of a substrate. The method comprises forming a metal cluster layer from a first, non-siliciding metal, followed by the deposition of a metal layer consisting of a second, siliciding metal. A subsequent heat treatment is responsible for forming a metal silicide from the second metal, the atoms of the first metal being displaced in a direction substantially perpendicular to the surface of the substrate. According to the invention, the atoms of the first metal are displaced by the Kirkendall effect to beneath the metal silicide. If a MOST, for example, is being fabricated, this has advantages both at the location of the source and drain region and at the location of the gate electrode.
Patent TW-I236027-B (TW)
Title: Switch device
Inventor: WANG JING-SHUEN
IPC: H01H13/52
Filed: 2004-11-22
Granted: 2005-07-11
Abstract: A switch device on the main electric circuit board is including: an electric circuit board base, which is welded on the main electric circuit board; an outer cover, which forms a container bounded with the electric circuit board base; at least a luminescent device, which is fixed at the metal elastic part of container; and a press part. The electric circuit board base can conduct current with the main electric circuit board by the first, the third metal pads and at least a second metal pad. The press part enables the activation part to switch between a conduction position having electrical contact with the first metal pad and a non-conduction position apart from the first metal pad. This invention provides a better method to fix the luminescent device at the electric circuit board base in advance. The assembling elements are fewer and the assembling operations become easier.