Patent GB-990821-A (GB)
Title: Control system for communication network
IPC: G11C15/02
Filed: 1961-07-21
Abstract: 990,821. Automatic exchange systems. STANDARD TELEPHONES & CABLES Ltd. July 21, 1961 [July 28, 1960], No. 26544/61. Addition to 977,420. Heading H4K. The slow-speed serial access register of the parent Specification comprises an originating call register REG and a supervisory register SUP, the register REG comprising 90 compartments which can cope with as many calling and clearing conditions, and the register SUP comprising 990 compartments which can cope with the maintenance of as many connections. The register REG is cycled at a speed which permits it to detect dialled impulses while the register SUP has a slower cycle which is sufficient to supervise established connections and detect release. The registers are said to be magnetic core matrices each row of which provides a storage compartment. In each of the matrices five columns store the sequence of operations to provide commands for the necessary logical operations required during the progress of a call; four columns register the type of connection involved to identify intermediate highways or to indicate the called subscriber busy or the highway channels conjested; six columns identify a free intermediate storage capacitor in the event of a call between subscribers served by the same highway; three columns provide a timing function for interrupting supervisory tones and effecting forced release of a connection; and three columns are used to time out the on-hook condition of a calling subscriber and to record the off-hook conditions of both calling and called subscribers. As in the parent Specification, columns are provided to store the calling and called subscriber's exchange locations and the identity of the time slot or slots assigned to them. Alternate cycles of the registers are devoted to the supervision of calling and called subscribers respectively. The condition of subscribers' lines is available to both registers REG and SUP of the register over a distributer TDCL from a storage circuit LILI. When the register REG has accumulated the identity of a calling and called line together with the identity of the necessary links and free channels for their connection, or records that the called subscriber is busy or that the call cannot proceed because of conjestion, it transfers its record of the call to a buffer store BUST from which it is written into a row of the register SUP. As described in the parent Specification, the information in a compartment of REG or SUP is staticized for a time which exceeds the length of one multiplex cycle so that a comparator CMP may transmit a pulse in the indicated time slot over a path set up by gates G8, and G<SP>1</SP>8 and G9 by thousands and hundreds markings to selected slave stores SL, SK or SS. The stores SL will be subjected to tens and units markings. Slave stores SL control the gates between subscribers' line circuits and their highways, slave stores SK control the gates between subscribers' highways and intermediate highways, while slave stores SS control the gates between subscribers' highways and storage devices (capacitors) where subscribers are connected over the same highway. In order that both the register REG and the register SUP may have access to the line circuit condition stores LILI a connector TDCL gates REG for the first half of the duration of staticization while it gates SUP for the second half. Whereas the register REG cycles over its 90 rows to scan the line circuit stores LILI continuously in order to test at a rate sufficient to detect dialling impulses, it is connected over the access circuit TDCS to control the slave stores SL and SK or SS, during only one cycle in every twelve cycles. This makes it necessary to provide a gap between the serial staticizations of the 990 rows of register SUP during which register REG connects with the slave stores. The cycle time of the register SUP is therefore equivalent to the cycle time of a register with 990+90 rows. Register REG detects a calling condition by the appearance of an off-hook condition over a direct path from a line circuit with no off-hook condition registered in the circuit LILI. The presence of an off-hook condition in the circuit LILI when an on-hook condition occurs over the direct path indicates that a call is being cleared. In order to monitor the condition of a line the registers REG, SUP, transfer the identity of a calling or of a called line through the connector TDCL to the storage circuit LILI which when in the process of returning the identity signal, marks lead 72 TDL if an off hook condition coincides with storage of the same condition but marks a lead 73 TDL if an on-hook condition coincides with a stored off-hook condition. A mark on lead 73 TDL is not immediately interpreted as a release signal by the register SUP in the case of a calling line but a check is made after two cycles of the register to obtain confirmation in case the condition was produced accidentally by the subscriber. If one subscriber releases and the other stays offhook the timing columns of the matrix SUP count out a period of 28 seconds to forcibly release the dilatory subscriber. Having fully released a connection the register SUP seizes the buffer store BUST to transfer all data back to the register REG which takes note of the time channels freed by release. During a connection the register SUP gates a tone source with appropriate interruptions to connect ringing and other tones to the subscribers over the multiplex highways. Some of the logical functions necessary in gating the registers REG and SUP by way of-the access circuits TDCL and TDGS are set out.