baber/WOPTO huggingface dataset:
Patent TW-I249156-B (TW)
Title: Method for matching speed of reading and writing of CD-ROM drive
Inventor: JU SHIUE-MING
IPC: G11B15/46
Filed: 2002-04-22
Granted: 2006-02-11
Abstract: A kind of method for matching speed of reading and writing of CD-ROM drive is revealed in the present invention. The invention can be applied in the readable/writable CD-ROM drive where the speed of writing data can be automatically changed to obtain more stable writing-operation. The invented method contains a control procedure, in which whether the data buffer is empty or not can be detected at the beginning of writing process and number of the empty data buffer is computed. If the number of empty data buffer does not reach the designed number, for example five times, the system continuously uses the highest writing speed to write in data. On the other hand, if the counting number of empty data buffer reaches the designed number, for example five times, the function of decreasing writing-speed is executed so as to decrease the original writing speed to the next writing speed, for example decreasing from 24X to 20X. The control procedure stated above can be formed as a software program where software is used to control the reading/writing machine. In addition, the software form can be written into the control chip in advance and directly mounted in the control circuit of the CD-ROM drive hardware.
Patent TW-555981-B (TW)
Title: Continuous single-line type touch panel and method to detect the touching position and area thereof
Inventor: YANG GE-SHIANG
IPC: G01R29/00
Filed: 2002-05-02
Granted: 2003-10-01
Abstract: The present invention is to provide a continuous single-line type touch panel and method to detect the touching position and area thereof. The touch panel has a stacked upper and lower plates with some spacing. The lower plate has a continuous curved resistor line coated on its top surface. The resistor line has plural lateral and longitudinal impedance segments alternatively connected. The upper plate is short-connected to the lateral impedance segments of a predetermined number in the resistor line when the upper plate is touched. The detection method comprises: (A) measuring the voltage at both ends of the resistor line; (B) when the touched portion is short-connected to the resistor line, dividing the resistor line into a short-circuit portion whose resistance is not calculated, and the first, second resistor portions from both ends of the resistor line to both ends of the short-circuit portion respectively; (C) finding the resistance of the first, second resistor portions; (D) finding the integer number of the lateral and longitudinal impedance segments, and the remainder number of the lateral impedance segments covered by the first, second resistor portions; (E) computing the longitudinal coordinates and lateral coordinates at both ends of the short-circuit portion based on the integer number and the remainder number; (F) estimating the area of the touch portion based on the longitudinal coordinates and lateral coordinates.
Patent TW-I267112-B (TW)
Title: Microstructure devices, methods of forming a microstructure device and a method of forming a MEMS device
Inventor: GOPAL VIDYUT
IPC: B81B3/00
Filed: 2002-05-07
Granted: 2006-11-21
Abstract: Microstructure devices, methods of forming a microstructure device and a method of forming a MEMS device are described. According to one aspect, a microstructure device includes: a semiconductive substrate; a monolithic microstructure device feature coupled with the semiconductive substrate, and wherein at least a portion of the microstructure device feature is configured to move relative to the semiconductive substrate; and a conductive structure provided directly upon the microstructure device feature.
Patent TW-564548-B (TW)
Title: Semiconductor device and the manufacturing method thereof
Inventor: ICHIGE MASAYUKI
IPC: H01L27/10
Filed: 2002-05-27
Granted: 2003-12-01
Abstract: The semiconductor device of the present invention includes: a semiconductor substrate; source and drain regions; a channel region; a gate insulating film; a charge storage layer; and a control gate electrode. The source and drain regions are formed on the semiconductor substrate, which include the first impurities of the first conductivity type. The channel region are formed on the semiconductor substrate between the source and drain regions, which includes the second impurities of a second conductivity type. The gate insulating film are formed on the semiconductor substrate, which includes the second impurities in a region thereof located immediately above at least a portion of the channel region. The charge storage layer is formed on the gate insulating film above the channel region. The control gate electrode is provided on the charge storage layer. The control gate electrode is formed on the charge storage layer, and is electrically connected to the charge storage layer by a connection portion provided on a part of the charge storage layer, which is located immediately above at least a part of the region of the gate insulating film including the second impurities.
Patent TW-I237262-B (TW)
Title: Digital magnetic memory cell device
Inventor: BOEVE HANS
IPC: H01F10/32
Filed: 2002-06-12
Granted: 2005-08-01
Abstract: Digital magnetic memory cell device for read and/or write operations, having a soft-magnetic read and/or write layer system and at least one hard-magnetic reference layer system formed as an AAF system, comprising an AAF layer composite and at least one reference layer, the reference layer system comprising at least one ferromagnetic layer arranged adjacent to a magnetic layer of the AAF layer composite, in which case the thickness of the antiferromagnetic layer (10) is dimensioned in such a way that it has a uniaxial anisotropy.
Patent TW-I229849-B (TW)
Title: Method and apparatus for defect detection in optical disc drives
Inventor: CHEN CHIH-YUAN
IPC: G11B7/00
Filed: 2002-08-09
Granted: 2005-03-21
Abstract: A defect detection method is used to generate a disc defect signal while recording or reproducing information recorded onto an optical disc. The method compares the difference between a reflected light intensity signal (SBAD) and a low-pass filtered SBAD with a predetermined level. A defect signal is generated during a period when the difference exceeds a predetermined value. The defect signal opens a switch to hold the low-passed signal of the SBAD and disconnects the low-pass filter from the SBAD at the moment a defect signal occurs. The held value of the low-passed signal effectively replaces the low-passed signal until the difference between the SBAD and held low-passed signal returns to within the predetermined limits, which re-closes the switch re-connecting the low-pass filter to the SBAD.
Patent TW-I250135-B (TW)
Title: Optical glass, glass material for press molding, optical element, and method of manufacturing same
Inventor: KASUGA YOSHIKO
IPC: G02B1/00
Filed: 2002-09-27
Granted: 2006-03-01
Abstract: Disclosed is an optical glass comprising, expressed as weight percentages, greater than or equal to 18 percent and less than 30 percent of SiO2, greater than or equal to 12 percent and less than 23 percent of BaO, 22 to 37 percent TiO2, greater than or equal to 7 percent and less than 16 percent Nb2O5, 5 to 20 percent of Na2O, 0 to 6 percent of K2O, 0 to 5 percent of CaO, 0 to 5 percent of SrO, 0 to 4 percent of ZrO2, 0 to 3 percent of Ta2O5, 0 to 1 percent of Sb2O5, and greater than or equal to 0 percent and less than 0.5 percent of P2O5, and by essentially not comprising PbO, As2O3, and F. The optical glass exhibits a refractive index (nd) greater than or equal to 1.80 and an Abbe number (nud) less than or equal to 30. A method of manufacturing a glass material for press molding is disclosed. This method comprises the steps of melting the glass starting materials, forming the glass melt obtained, and annealing the formed glass and is characterized in that: the glass melt has a composition such that, (1) when rapidly cooled to room temperature, said glass melt becomes glass that has a scattering coefficient of less than 0.005 cm<-1> at wavelengths of from 400 to 2,500 nm or comprises crystals with a volumetric ratio of less than 10<-6>, and (2) when maintained for three hours at a temperature 10 DEG C higher than the glass transition temperature, maintained for 10 min at a temperature yielding a viscosity of 10<4.5> to 10<3.5> dPa.s, and then rapidly cooled to room temperature, said glass melt becomes glass that has a scattering coefficient at at least one wavelength from 400 to 2,500 nm of greater than 0.01 cm<-1> or comprises crystals with a volumetric ratio of greater than 10<-5>; and an annealing of said formed glass is conducted at a temperature lower than the glass transition temperature.
Patent TW-561574-B (TW)
Title: Load port capable of coping with different types of cassette containing substrates to be processed
Inventor: OBIKANE TADASHI
IPC: H01L21/677
Filed: 2002-09-27
Granted: 2003-11-11
Abstract: This invention relates to a load port (1) capable of receiving different types of cassette containing substrates to be processed. The load port comprises: a body; an opening portion formed on one side face of the body (the opening is constructed to have three faces opened on front, left and right side faces respectively); a mounting seat installed in the opening portion for carrying the cassette; a first sensing mechanism installed on the mounting seat (the first sensing mechanism is used to identify the type of the cassette carried by the mounting seat); a plurality of types of clamping mechanisms installed on the mounting seat (each type of the clamping mechanism in the clamping mechanisms copes with the identification of the first sensing mechanism to clamp the identified types of cassettes respectively); and a lifter-type cover mechanism that covers the opening portion of the body (the three faces of the opening portion are opened and closed by means of the upward and downward movements of the cover mechanism).
Patent TW-594721-B (TW)
Title: Method for manufacturing multi-recording-layer optical recording medium, apparatus for manufacturing multi-recording-layer optical recording medium, and multi-recording-layer optical recording medium
Inventor: KOMAKI TSUYOSHI
IPC: G11B7/24038
Filed: 2002-10-14
Granted: 2004-06-21
Abstract: A method for manufacturing a multi-recording-layer optical recording medium is provided. It has plural layers (L1, L0) each having a recording layer within and formed on one side of a substrate (2), and a spacer layer (5) formed between the layer (L1) and the layer (L0), where the said recording layer is initialized by irradiation of an initialization laser beam (LIN). The manufacturing method comprises: (a) a spacer layer (5) is formed with light transmittance to the initialization laser beam (LIN) lower than the light transmittance to a recording and reproduction laser beam. (b) On the formed spacer layer (5), the layer (L0) is formed. The initialization laser beam (LIN) is applied to the L0 layer to initialize it. Thus, every layer including the recording layer can be uniformly initialized.
Patent TW-I229371-B (TW)
Title: Method for manufacturing semiconductor device
Inventor: SONG WOON-YOUNG
IPC: H01L21/76
Filed: 2002-12-11
Granted: 2005-03-11
Abstract: The present invention provides a method for manufacturing semiconductor device. In the method of forming semiconductor isolation, the semiconductor substrate is formed with trenches in suitable depth. In the inner sides of the trenches, the shallow trench isolation and deep trench isolation for charging insulation film are formed without other etching processes, and they are formed with one-time etching process on the same substrate in a straight line. The solution includes the following steps: preparing a semiconductor substrate 100 with specific lower structure; sequentially forming the pad oxide 110, the nitride film 120, and the first photosensitive film on the semiconductor substrate 100; patterning the first photosensitive film to have specific shapes and formed as the first photosensitive film pattern 130; using the first photosensitive film pattern 130 as the mask to etch the pad oxide 110, the nitride film 120, and the semiconductor substrate 100 to form the first and the second deep trench isolations 140, 145; removing the first photosensitive film pattern 130 to form the second photosensitive film pattern 150; after forming the area of the first deep trench isolation 140 on the resulted object, conducting the nitridation process to form a barrier on the inner wall of the second deep trench isolation 145; and, after removing the second photosensitive film pattern 150, conducting the silicon epitaxial growth process to grow the inner silicon in the area of the first deep trench isolation 145 covered by the second photosensitive film, so as to form the shallow/deep trench isolation 180.
Patent TW-565909-B (TW)
Title: Method of preventing short circuit between bit lines
Inventor: LEE YEN-HSIEN
IPC: H01L21/768
Filed: 2002-12-16
Granted: 2003-12-11
Abstract: A kind of method for preventing short-circuit between bit lines is disclosed in the present invention. The invention includes the followings: providing a semiconductor substrate, on which the first dielectric layer and the second dielectric layer with a thickness larger than the determined thickness are sequentially formed; forming a bit line contact window by passing through the first dielectric layer and the second dielectric layer on the determined position; filling the conducting material into the bit line contact window to form the first conducting layer; etching back the first conducting layer to make its surface lower than the second dielectric layer so as to form a contact plug; following the second dielectric layer, the sidewall of the bit line contact window and the contact plug surface to form a sacrifice layer; etching and removing the sacrifice layer on the second dielectric layer and the contact plug surface to form the sidewall layer on the sidewall of the bit line contact window; and removing part of the second dielectric layer so as to recover thickness of the second dielectric layer back to the determined thickness.
Patent TW-569435-B (TW)
Title: A stacked gate flash memory and the method of fabricating the same
Inventor: LIN CHI-HUI
IPC: H01L21/8247
Filed: 2002-12-17
Granted: 2004-01-01
Abstract: A stacked gate flash memory with two symmetrical memory cell in a trench comprises: a semiconductor substrate having trenches therein; a conductive layer consisting of polysilicon layers and a source material layer provided in the bottom of the trench; a pair of source area provided in the outside region of the trench and conducted through the conductive layer; a source isolation layer on the conductive layer; a tunneling oxide layer on the trench side wall; a floating gate consisting of the second polysilicon layer and the third polysilicon layer on the source isolation layer and contacting the tunneling oxide layer; an inter-gate dielectric layer on the floating gate and; a control gate locating layer on the inter-gate dielectric layer; an insulating layer in the trench to separate the two symmetrical memory cells; and a drain area in the substrate nearby the trenches.
Patent TW-I220701-B (TW)
Title: Current mirror operated by low voltage
Inventor: WU LI-DE
IPC: G05F3/26
Filed: 2002-12-26
Granted: 2004-09-01
Abstract: The present invention provides a current mirror operated by low voltage to receive an input current and generate an output current identical to the input current. It comprises: a resistor whose first terminal receives the input current; a first transistor whose base is connected to the drain; a second transistor whose base is connected to the base of the first transistor; a third transistor whose base is connected to the base of the first transistor; and a fourth transistor whose drain generates the output current.
Patent TW-I272667-B (TW)
Title: Semiconductor device and manufacture method thereof
Inventor: SHIBATA HIROSHI
IPC: G02F1/1368
Filed: 2003-04-02
Granted: 2007-02-01
Abstract: The problem is to provide a technology to reduce a light leakage current in order to obtain a good display. One kind or plurality kinds of elements chosen from argon, germanium, silicon, helium, neon, krypton, and xenon are implanted in a crystalline semiconductor layer, to distribute crystal defects due to the aforementioned element implantation by uniform and suitable density in the semiconductor film, making recombination centers of carriers, to thereby suppress a light sensitivity without spoiling a high degree of carrier movement included in a crystalline semiconductor layer.
Patent TW-568998-B (TW)
Title: Method and device for manufacturing positionable heat conductive tubes
Inventor: LIN JUNG-SHIUNG
IPC: F28D7/00
Filed: 2003-05-16
Granted: 2004-01-01
Abstract: This invention relates to a method and device for manufacturing a positionable heat conductive tube, for working on a copper tube into a heat conductive tube having a uniform sintered layer. This invention is related to forming a plurality of protrusions on a surface of a central rod for making heat conductive tubes, where the protrusions are made by sintered powered with addition of organic bonding agent, such that after inserting the central rod into the copper tube, the contact between the protrusions and an inner wall of the copper tube align the central rod at a center of the copper tube. While subjecting the copper tube to sintering, the protrusions are able to detach from the central rod and integrate into the sintered layer. As such, upon drawing the central rod, a cylindrical hole and an even sintered layer are left in the copper center. The implementation of the method and device for manufacturing a positionable heat conductive tube eliminates problems found in conventional art, to obtain a heat conductive tube allowing even heat conduction and improved quality.
Patent TW-I266766-B (TW)
Title: Process for preparing 3,4-dichloro-N-(2-cyanophenyl)-5-isothiazolecarboxamide
Inventor: HIMMLER THOMAS
IPC: A01N43/80
Filed: 2003-06-26
Granted: 2006-11-21
Abstract: According to a novel process, 3,4-dichloro-N-(2-cyanophenyl)-5-isothiazolecarboxamide is prepared by (a) reacting 3,4-dichloroisothiazole-5-carbonyl chloride with anthranilamide in the presence of an acid acceptor and in the presence of an aprotic diluent and (b) the resulting N-[2-(aminocarbonyl)-phenyl]-3,4-dichloro-5-isothiazolecarboxamide is then reacted with a dehydrating agent, if appropriate in the presence of an additional diluent. N-[2-(Aminocarbonyl)-phenyl]-3,4-dichloro-5-isothiazole-carboxamide is novel.
Patent TW-I285197-B (TW)
Title: 1H-1,2,4-triazole-3-carboxamide derivatives having cannabinoid-CB1 receptor agonistic, partial agonistic, inverse agonistic or antagonistic activity
Inventor: LANGE JOSEPHUS H M
IPC: C07D249/14
Filed: 2003-09-15
Granted: 2007-08-11
Abstract: The present invention relates to a group of 1H-1,2,4-triazole-3-carboxamide derivatives, to methods for the preparation of these compounds, and to pharmaceutical compositions containing at least one of these compounds as an active ingredient. These 1H-1,2,4-triazole-3-carboxamide derivatives are potent cannabinoid-CB1 receptor agonists, partial agonists, inverse agonists or antagonists, useful for the treatment of disorders involving cannabinoid neurotransmission. The compounds have the general formula (I), wherein R and R1-R3 have the meanings given in the specification.
Patent TW-I232544-B (TW)
Title: Semiconductor devices with reduced active region defects and unique contacting schemes
Inventor: BUDE JEFFREY DEVIN
IPC: H01L27/146
Filed: 2003-10-13
Granted: 2005-05-11
Abstract: A method of making a semiconductor device having a predetermined epitaxial region, such as an active region, with reduced defect density includes the steps of: (a) forming a dielectric cladding region on a major surface of a single crystal body of a first material; (b) forming a first opening that extends to a first depth into the cladding region; (c) forming a smaller second opening, within the first opening, that extends to a second depth greater than the first depth and that exposes an underlying portion of the major surface of the single crystal body; (d) epitaxially growing regions of a second semiconductor material in each of the openings and on the top of the cladding region; (e) controlling the dimensions of the second opening so that defects are confined to the epitaxial regions grown within the second opening and on top of the cladding region, a first predetermined region being located within the first opening and being essentially free of defects; (f) planarizing the top of the device to remove all epitaxial regions that extend above the top of the cladding layer, thereby making the top of the first predetermined region grown in the second opening essentially flush with the top of the cladding region; and (g) performing additional steps to complete the fabrication of the device. Also described are unique devices, such as photodetectors and MOSFETs, fabricated by this method, as well as unique contacting configurations that enhance their performance.
Patent TW-I245150-B (TW)
Title: Programmable distributed multiple lamps CCFL inverter system
Inventor: CHEN CHANG-YONG
IPC: G02F1/1335
Filed: 2003-11-04
Granted: 2005-12-11
Abstract: A CCFL inverter system for multiple lamps in LCD display is provided. The system is consisting of a controller and multiple drivers. The controller senses the current of each lamp and provides PWM signals for each driver. Each driver drives a transformer and delivers power to the lamps. The controller provides phase shift of lamp current as well as burst dimming pulse to reduce the power supply current ripple. The programming capability provides versatile brightness control and lamp failure management.
Patent TW-I233592-B (TW)
Title: Spectrum-exciting device
Inventor: CHEN CHIEN-LUNG
IPC: G10L21/00
Filed: 2003-11-10
Granted: 2005-06-01
Abstract: A spectrum-exciting device with functions of filtering, subdividing, and amplifying has a first aluminum oxide unit, an iron oxide unit, a second aluminum oxide unit, and an amplifying unit. The first aluminum oxide unit first filters out the noises of a sound signal. The iron oxide unit subdivides the frequencies of the sound signal to increase the alto voice and the high-pitched voice, and to compress the low-pitched voice concurrently. Wherein, the materials of the iron oxide unit have iron oxide, manganese oxide, chromium oxide, and cobalt oxide, and the iron oxide cannot be magnetized. The second aluminum oxide unit second filters out the noises of the sound signal. The amplifying unit amplifies the sound signal, and wherein the materials of the amplifying unit have kyanite, actinolite, wollastonite, tourmaline, silica, kaolinite, and petalite. The above-mentioned units are further processed by a plurality of conventional electroplating processes including a copper-plating process, a nickel-plating or a tin-plating process, and the combination processes of a gold-plating, a silver-plating, and/or a platinum-plating.
Patent TW-I257796-B (TW)
Title: Scheduling data transmission by medium access control (MAC) layer in a mobile network
Inventor: IACONO ANA LUCIA
IPC: H04L12/56
Filed: 2003-12-19
Granted: 2006-07-01
Abstract: A method and strategy for transport format combination (TFC) selection and related algorithms in wireless communications. The method provides procedures used by the MAC layer in both the UE and the RNC to schedule data transmission. In the inventive method, each time the maximum transmit power is reached in a time slot, the physical layer will send a notification to the MAC layer, including the time slot number where maximum power was reached. The invention provides a low cost method and algorithm avoiding the need for the MAC to determine the power needed by each TFC in each time slot.