baber/WOPTO huggingface dataset:
Patent JP-H06307070-A (JP)
Title: Frame scaffold
Inventor: YASUDA KEIICHI
IPC: E04G5/00
Filed: 1993-04-19
Abstract: PURPOSE:To safely perform a work for throwing and removing a handrail with a brace even in an overhead position by fixing the end parts of a handrail which can be folded in the center to be simply and easily stretched and removed simultaneously with a brace. CONSTITUTION:At the time of folding a cross-brace 3, the parts of bars to which the end parts of a handrail 9 are connected are made close to each other in such a manner that the bars overlap each other, and the handrail 9 is broken in the center and superposed on the bars. At the time of framing the upper stage, building frames 1 of the upper stage structure are added by connecting pins. In this case, the upper half part of an on-ground erecting material of building frames 1 are projected over a cloth plate 2, and the projected parts are used to fit the brace 3 and the handrail 9, so that a work is performed on the cloth plate 2. Subsequently, the brace 3 is expanded like an X-shape, the handrail 9 is extended to insert locking projections in through holes of the overlapping parts of the handrail and the brace 3, and a brace 3 is installed on the upper stage to stretch a cloth plate 2. At the time of demolition, the reverse operation is performed in such a manner that the cloth plate 2, the brace 3 and the handrail 9 of the upper stage are detached and the building frame 1 of the upper stage is removed in a working floor.
Patent JP-S60235186-A (JP)
Title: Cleaning blade device of copying machine with two process speeds
Inventor: OOTSUKA HIROHISA
IPC: G03G21/00
Filed: 1984-05-09
Abstract: PURPOSE:To prolong the life of a cleaning blade by providing a pressure changeover means which switch the pressure of the cleaning blade between a high and a low pressure side associatively with a selecting means for copy modes and obtaining two process speeds. CONSTITUTION:When the process speed is reduced in black-and-red mode, etc., a lock solenoid 17 operates before a main solenoid 14 operates with the selection signal for the copy mode, and the main solenoid 14 operates to lock the lock pin 20 of a plunger 15 in the lock recessed part 16a of a lock claw 16, so that the cleaning blade is pressed against a photosensitive body under low pressure corresponding to a process speed position. Then, when the process speed is high in black-and-white mode, the lock solenoid 17 is not in operation with the selection signal for this copy mode as shown in the other figure and only the main solenoid 14 operates to attract the plunger 15 by a full stroke, so that the cleaning blade is pressed against the photosensitive body under high pressure corresponding to the high process speed.
Patent JP-S57204732-A (JP)
Title: Electric stove
Inventor: KANBARA KATSUYUKI
IPC: F24H3/04
Filed: 1981-06-11
Abstract: PURPOSE:To elevate the heating efficiency in a room through the combination of a heating by a reflected radiant heat and that by a hot air with a fan device by sucking a room air into an electric stove in such a manner as to flow along the front of a reflecting plate. CONSTITUTION:When a main electric heater 2 and an auxiliary electric heater 11 are energized in an electric stove 1, a horizontal flow fan device 4 arranged at the inner bottom of a case is driven. A radiant heat of the heaters is reflected forward on a reflecting plate 3 to heat the room while air in the room is sucked into a casing 7 at a suction port 9, preheated with an auxiliary electric heater and flows along the front of the reflecting plate being blown to the front bottom thereof 3 from a discharge port 10. This deprives heat of the front of the reflecting plate 3 thereby heightening the efficiency of heating in a room as it is apt to become too high affected by the radiant heat of the main electric heater 2 from the reflecting plate 3 and a hot air.
Patent JP-S61249750-A (JP)
Inventor: MARUHASHI KICHIJI
IPC: B65D1/28
Filed: 1985-04-30
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S59216899-A (JP)
Title: 2'-deoxy-5-trifluoromethyluridine derivative, its preparation, and antitumor agent containing it
Inventor: FUJII SETSUO
IPC: A61K31/7042
Filed: 1983-05-23
Abstract: NEW MATERIAL:A compound shown by the formula I (R1 is H, or benzoyl; one of R2 and R3 is H, and the other is lower alkyl, or benzyl). EXAMPLE:3-Benzoyl-2'-deoxy-5'-O-ethyl-5-trifluoromethyluridine. USE:An antitumor agent. PREPARATION:1mol 3-benzoyl-2'-deoxy-5-trifluoromethyluridine shown by the formula II is reacted with preferably 3-5mol alkyl halide (e.g., ethyl iodide, etc.) shown by the formula RX (R is lower alkyl, or benzyl; X is bromine or iodine) in a solvent such as acetone, etc. in the presence of a catalyst such as silver oxide, etc. preferably at 50-80 deg.C.
Patent JP-S62248197-A (JP)
Title: Semiconductor integrated circuit
Inventor: IWATA YOSHIHISA
IPC: G11C11/34
Filed: 1986-04-22
Abstract: PURPOSE:To prevent the sensitivity of an device comprising a sensitivity amplification circuit using a MISFET from degrading, to reduce the power consumption, and to speed up the action by boosting an internal reference voltage to compensate it against the variation of the power source voltage. CONSTITUTION:An external input signal Ain to an address buffer circuit, etc., and the reference voltage VREF generated by dividing the power source voltage are bootstrapped with start clocks phi5A and phi5B respectively, and the potential difference between nodes N1 and N2 is detected by means of the difference in conductances of MISFETs. At this time, the amplitude of the potential of the clock phi5B is made smaller as the power source voltage is higher, to release the variation of the reference voltage due to the change of the power source voltage. In such a way, a malfunction due to the delayed latch of an FF circuit or the increase of consumption current is prevented from occurring and the circuit-action is speeded up.
Patent JP-H07297491-A (JP)
Title: Optical modulator
Inventor: TOYODA YUKIO
IPC: H01S3/10
Filed: 1994-04-28
Abstract: PURPOSE:To reduce chirping produced with the important modulation of high- speed light transmission, to improve linearity for an input to realize low distortion and perform the conversion of wavelength in an optical modulator. CONSTITUTION:An optical modulator is constituted by forming a DFB laser 11 for output and a optical amplifier 12 into one body. Modulated light Pin which is modulated outside is incident upon the optical amplifier 12 at first. Next, after the modulated light Pin is amplified by the travelling wave optical amplifier 12, it is injected into the laser 11 from the direction of the side surface of the output laser 11. Thereby, the linearity of output light Pout to the input modulated light Pin is improved, and superhigh modulation of low chirp and low distortion can be realized.
Patent JP-S63257388-A (JP)
Title: Solid-state image pickup device
Inventor: HIROTA ISAO
IPC: H04N5/335
Filed: 1987-04-14
Abstract: PURPOSE:To eliminate the appearance of black point representing picture defect due to a potential dip by devising the device such that a signal charge is not trapped by the potential dip even if the potential dip exists in the charge transfer region of a vertical register section. CONSTITUTION:After an electric charge being an undesired charge is swept out to a drain region section 12, a vertical register section 6 is subject to high speed positive transfer drive to transfer the electric charge stored in an electric charge storage section or an electric charge injected from a drain region section 12, then the potential dip of a charge transfer region 18 is filled by the electric charge stored in the charge storage section or the electric charge injected from the drain region section 12. Then when the electric charge being the signal charge is transferred to a horizontal register section 8, the signal charge is not trapped by the potential dip. Thus, the black spot being defect of picture caused by the potential dip in existence in the charge transfer region 18 of the vertical register section 6 does not appear.
Patent JP-H04302420-A (JP)
Title: Semiconductor substrate treatment device
Inventor: SAKAI TATSUO
IPC: H01L21/302
Filed: 1991-03-29
Abstract: PURPOSE:To make charge of an electrostatic chuck disappear in a short time by using an ionizer. CONSTITUTION:A semiconductor substrate 5 is mounted on a lower electrode 7 inside a treatment chamber 4 through an insulator 6. A high frequency power supply 9 for generating plasma and a dc power supply 10 for carrying out electrostatic attraction are connected to the lower electrode 7. An ionizer 1 is provided to a gas introducing port. Charge in the semiconductor substrate 5 is made to disappear by inert gas which passed through the ionizer.
Patent JP-H07294624-A (JP)
Title: Gps sensor
Inventor: TAKEDA HIROSHI
IPC: H04B7/15
Filed: 1994-04-28
Abstract: PURPOSE:To connect a GPS sensor to an external device in a different system by providing a GPS antenna and a receiver, and arranging integrally an operating device for converting a communications protocol between the GPS receiver and a connecting interface. CONSTITUTION:A computer as an external device having a navigation software installed therein is connected to an external connection terminal 6 of a GPS sensor 1. The sensor 1 converts at a receiver 3 a GPS signal received by a micro trip antenna into GPS data having a communications protocol of a binary code, converts further into an NMEA protocol and sends to the computer. When a command is transmitted to a microprocessor according to the NMEA protocol, the communications protocol is converted into a binary code and sent to the receiver 3. At this time, a position-measuring system of the receiver which is GPS data of the receiver, miles and world time are respectively converted into a Tokyo system, kilometers and Japan time and transmitted to the computer.
Patent JP-H03293927-A (JP)
Title: Switching power supply
Inventor: SAWAHATA SATORU
IPC: H02J1/00
Filed: 1990-04-06
Abstract: PURPOSE:To reduce a temperature drift by detecting charging currents, operating either of two error amplifiers and changing over the output voltage of a switching power supply. CONSTITUTION:When recovery charging is completed and load currents are reduced, a transistor Q2 is turned ON because the detecting voltage of a current detecting resistor R5 is made lower than reference voltage E3 on the positive side of an error amplifier IC3 and the output side of the error amplifier IC3 is at High, an error amplifier IC1 for detecting voltage is brought to the state of operation, and the error amplifier IC1 detects detecting resistance R2+R3. Consequently, the error amplifier IC1 works in the direction that output voltage is made lower than a case when the error amplifier IC1 detects the detecting resistance R3, an ON period is shortened in the switching signal of a control circuit CONT, and output voltage is lowered. The output voltage of an error amplifier IC2 is at High and is reverse-biassed by a diode D3 at that time, thus preventing an adverse effect on constant-voltage control of the output voltage of the IC2.
Patent JP-S5520007-A (JP)
Title: Interlace circuit
Inventor: YOKOTA MORITAROU
IPC: H04N3/16
Filed: 1978-07-28
Abstract: PURPOSE:To secure the accurate interlace by presetting the different initial value input of the saw-tooth wave generating counter or the A/D converter alternately with every field. CONSTITUTION:Identification 25 is given between one field and the other in the same frame with the change of the rise time of the horizontal synchronous pulse near the rise time of the vertical synchronous signal in the synchronous signals. Then the different initial value input are preset to the input of D/A converter 43 which is connected to the input or the output of counters 41 and 42 according to the output of the field identification and alternately with every field. Thus the saw-tooth wave signal are obtained with the different average value alternately with every field. In this way, the accurate interlace can be carried out.
Patent JP-S59218302-A (JP)
Title: Air-cooled blade of gas turbine
Inventor: NAKADA YUUJI
IPC: F01D5/18
Filed: 1983-05-26
Abstract: PURPOSE:To improve cooling performance in the point end part of a blade, by arranging auxiliary film cooling holes along the direction of height in the point end part of the air-cooled blade the whole of which distributes film cooling holes. CONSTITUTION:Film cooling holes 6a, 10a are distributed over the whole of an air-cooled blade 1, and its point end part arranges auxiliary film cooling holes 14a along the direction of height. In this way, cooling air is blown out in the point end part of the blade from also the auxiliary film cooling holes 14a other than the film cooling holes 6a, 10a. Accordingly, cooling performance can be improved without causing any decrease of heat transfer rate.
Patent JP-H02287257-A (JP)
Title: Method for measuring human g-csf
Inventor: TACHIBANA KATSUMI
IPC: G01N33/53
Filed: 1989-04-11
Abstract: PURPOSE: To realize a more convenient measurement with high sensitivity while suppressing fluctuation by using an antibody consuming fraction for human G-CSF and employing a nonionic surfactant and the like in a reaction system. CONSTITUTION: An antibody consuming fraction is used for a labeled antibody in the measurement. An antigen-antibody reaction is caused between an insoluble antibody and human G-CSF under presence of a nonionic surfactant. According to the method, the effect of interferential substances in plasma is eliminated resulting in the enhancement of sensitivity and reliability of measurement.
Patent JP-S5519435-A (JP)
Title: Producing apparatus of fence plate
Inventor: TAKENOUCHI TAMOTSU
IPC: B23K11/14
Filed: 1978-07-26
Abstract: PURPOSE: To manufacture fence plates at high efficiency from grating form materials by detaining the grating form materials made of multiple wires by means of stoppers, bending the end parts thereof by rotary blades and turning plates then welding both end parts.  
     CONSTITUTION: Multiple wires (a) are welded to grating form to make a grating form material (b). This is detained by the stoppers 2, 3 of the fence plate producing apparatus. One side end part of the grating form meterial (b) detained to the stopper 3 is bent by rotary blades 4 to be erected perpendicularly. Next, the stopper 3 is released, after which the right and left of the grating form material (b) is bent by turning plates 5 with the stopper 2 as a center, whereby they are erected perpendicularly. Further the front and back of the grating form material (b) are erected, by which both end parts are contacted and up to which end parts a welder 6 is moved to weld the both end parts and form the fence plate (d). Finally, the welder 6 and turning plates 5 are reset to the home position, after which the fence plate  (d) is disengaged and removed from the stopper 2 by a push-out mechanism 7. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-S5616204-A (JP)
Title: Control system for sequence controller
Inventor: SHIRAKAWA HIROSHI
IPC: G05B19/05
Filed: 1979-07-19
Abstract: PURPOSE: To enable to control the controlled system efficiently, by executing the sequence program formed per controlled system after separating those in which the operation is continuous with a given sequence and not.  
     CONSTITUTION: CPU1 performs the control for the entire unit 10, and ROM2 stores the control program for entire control of the unit 10. Further, at the sequence program of the 1st system in which the operation is continuous in a given sequence, if the value of execution is not in matching with a given condition, the address of ram 3 storing the decision program step is stored to finish the execution of the sequence program. On the other hand, in case of the 2nd system sequence program  in which the operation is dependent on the entire input information at that time, the program starts from the start step without fail. Further, if the execution value is not matched to a given condition, the reciprocal operation indicated with the succeeding operation program step is executed. Thus, the controlled system can efficiently be controlled. 
     COPYRIGHT: (C)1981,JPO&Japio
Patent JP-S60238387-A (JP)
Title: Production of pitch for carbonaceous material
Inventor: OOTA MASAKATSU
IPC: C10C3/02
Filed: 1984-05-10
Abstract: PURPOSE:To obtain pitch for carbonaceous materials of good quality suitable for producing carbon fibers with high efficiency, by introducing a carbonaceous pitch into a thin film evaporator, and heat-treating the pitch in the presence of an inert gas, etc. CONSTITUTION:A carbonaceous pitch, preferably containing 100% mesophase for producing carbon fibers is introduced into a thin film evaporator and heat-treated in the presence of an inert gas or nonoxidizing gas at 400-550 deg.C under 0.1- 50mm.Hg pressure to give the aimed pitch for producing carbonaceous materials. In case the heat treatment is carried out in two stages, the heat treatment in the first stage is carried out under the following conditions; 400-450 deg.C under 10- 50mm.Hg pressure in the first stage and 450-550 deg.C under 0.1-5mm.Hg pressure in the second stage.
Patent JP-S5327681-A (JP)
Title: Flexible resin composition
Inventor: SHISOMOTSU YUUJI
IPC: C08F299/04
Filed: 1976-07-30
Abstract: PURPOSE: A resin composition having excellent flexibility, surface gloss, and thermal properties, containing xylylene formaldehyde resin and unsaturated polyester resin. 
     COPYRIGHT: (C)1978,JPO&Japio
Patent JP-S57206869-A (JP)
Title: Transmitting device for ultrasonic pulse
Inventor: ISHIKAWA YOSHINAO
IPC: G01S7/52
Filed: 1981-06-15
Abstract: PURPOSE:To dispense with a transformer for a driving circuit for a push-pull amplifier circuit by applying pulse processing to a circuit up to the input side of the push-pull amplifier circuit and by driving the push-pull amplifier circuit also by the pulse processing. CONSTITUTION:Two pulse trains being different in phase by 180 deg. are generated by a pulse generating circuit 35. These two pulse trains are supplied to the two input terminals of an output push-pull amplifier circuit 22 through different variable voltagedividing circuits 44 and 45 respectively. On the other hand, a transmission-reception switching circuit 53 is connected to the secondary side of an output transformer 29 of the push-pull amplifier circuit 22. By this constitution, a transformer can be omitted from a driving circuit for the output push- pull amplifier circuit 22, and thereby the device can be made less expensive.
Patent JP-S57207879-A (JP)
Title: Raid homing device
Inventor: KOBAYASHI MIKI
IPC: G01S3/24
Filed: 1981-06-17
Abstract: PURPOSE:To easily execute discrimination, to elevate vibration resistance, and also to make a device small-sized, by recognizing the left and right directions by light emitting  elements corresponding to the left and right directions, respectively, and displaying a shift of the direction by a long or short flickering period of the light emitting element. CONSTITUTION:A receiving output of a radio signal R received by an antenna 31 is divided into the first direction and the second direction by a switching circuit 32. An output of this circuit 32 is detected 32, and a detected output D is held by a capacitor of a sample holding switch (SHS) 35. Subsequently, a detected output DI correspoding to the first direction and a detected output DII corresponding to the second direction are provided to a differential ampifier 37. In accrodance with whether an absolute value of an output of this amplifier 37 is large or small, oscillation frequency of an oscillator 38 is varied high or low. That is to say, when a difference between the output DI and DII is large, a pair of light emitting element 39-Ior 39-II is made to emit light for a short flickering period, and when an aeroplane, etc. are exactly directed to a station to be homed, the light emitting element is scarcely lighted. On the other hand, the light emitting element is scarcely lighted. On the other hand, in case of  a shift in the left or right direction, the output DI or DII becomes large or small, and it is displayed by flickering of the light emitting element 39-Ior 39-II.
Patent JP-H04321869-A (JP)
Title: Rotary valve for automatic transmission
Inventor: KIMURA KOICHI
IPC: F16K11/085
Filed: 1991-04-23
Abstract: PURPOSE:To rotate a spool at the position which corresponds to high speed step when an actuator is in failure and position the spool in axial direction in a rotary valve for automatic transmission which accommodates the free- rotating spool in the inside of a valve housing. CONSTITUTION:A spool 7 which is accommodated inside a valve housing 1 and rotated and driven by a pulse motor 6 is energized to rotate by a coil spring 22 whose one end is engaged with a pin 20 which is provided in the spool 7 and whose another end is engaged by a bolt 21 which is screwed in the valve housing 1. When drive force is reduced due to failure of the pulse motor 6, the spool 7 rotates at the predetermined position due to resilient force of the coil spring 22 to change over automatic transmission into high speed step or neutral step. The coil spring 22 is also energized in the direction where it presses the spool 7 on a thrust bearing 10. Thus, the spool 7 is positioned in axial direction.
Patent JP-H04323967-A (JP)
Title: Video line detection circuit
Inventor: MATSUSHITA KATSUHIKO
IPC: H04N5/10
Filed: 1991-04-23
Abstract: PURPOSE:To count correctly number of horizontal synchronizing signals based on a vertical synchronizing signal possibly having a dropout. CONSTITUTION:A synchronization detection circuit 1 receiving a reproduced video signal detects a vertical synchronizing signal, a line detection interrupt circuit 3 detects the position of a line succeedingly, a field detection circuit 5 detects a field and when field is correctly detected, a preset data of a line information generating circuit 7 is preset to a line counter 8 and then a horizontal synchronizing signal is counted up.
Patent JP-S63257270-A (JP)
Title: Semiconductor device
Inventor: TAKABE AKIO
IPC: H01L29/732
Filed: 1987-04-14
Abstract: PURPOSE:To suppress a leakage current in the reverse direction at a junction part by a method wherein a porous silicon layer is formed between a thick silicon oxide film and a base region. CONSTITUTION:A silicon oxide film 11 is formed on a substrate 1; a window is opened at the film 11; phosphorus is thermally diffused; a formation current is made to flow; a porous silicon layer 2 is formed. Then, a silicon nitride film 3 is formed in a device formation region; a thick silicon oxide film 4 whose one part is buried in the substrate is formed by a thermal oxidation method. Then, the film 3 is removed; the film 4 on the device formation region is opened selectively; impurities are doped; a base region 5 is formed. By this setup, a stress which is caused during the formation if the thick silicon oxide film is concentrated on the distortion which is caused at the porous silicon layer; the stress which is exerted on a semiconductor device region can be made very small; accordingly, the occurrence of a crystal defect can be made extremely little in the semiconductor device region.