baber/WOPTO huggingface dataset:
Patent TW-259782-B (TW)
IPC: C02F3/30
Filed: 1994-02-14
Granted: 1995-10-11
Abstract: PCT No. PCT/CZ94/00005 Sec. 371 Date Aug. 11, 1995 Sec. 102(e) Date Aug. 11, 1995 PCT Filed Feb. 7, 1994 PCT Pub. No. WO94/18130 PCT Pub. Date Aug. 18, 1994Biological activation waste water purification method is disclosed, wherein the waste water is biologically purified in an activation process. Activated sludge is pumped into a circulation circuit comprising a flow channel and at least one distribution channel. Raw waste water is added to the activated sludge to form an activation mixture which is gradually denitrified as it flows through the circulation circuit. The activation mixture is aerated so as to suspend the activated sludge in the mixture while gradually saturating the activation mixture with oxygen so as to change the denitrifying of the mixture to the nitrifying of a mixture as the mixture flows through the circulation circuit. The activation mixture then flows to a fluidized bed filter where it is separated into purified water and activated sludge. The apparatus for biological activation waste water purification comprises a tank with at least one basic module on the bottom of the tank and spaced from the walls of the tank and defining a flow channel about the module. The module has a pair of partition walls which define a pair of separation spaces with the side walls of the basic module and also define a distribution channel which communicates with the flow channel. The partitions also have at least one opening communicating with the separation space and the distribution channel. Aeration members are located in the tank between the basic module and the walls of the tank and between the pair of partitions.
Patent TW-234206-B (TW)
Title: Process for DRAM
Inventor: CHEN TZONG-REN
IPC: H01L29/92
Filed: 1994-06-16
Granted: 1994-11-11
Abstract: A method for fabricating capacitor on the semiconductor substrate owningcomponent area includes the following steps: 1. depositing the first isolation; 2. depositing the second isolation on the first isolation to form thediffusion barrier and etch stop; 3. depositing the third isolation with low flow temperature on the secondisolation, and flattening it by thermal annealing; 4. depositing the fourth isolation with etching ratio much less than thethird isolation's; 5. by the patterned first phtoresist, forming opening through the fourth,third, second and first isolation to the component area in the substratesurface; 6. lateral etching the third isolation in the opening to remove the firstphtoresist to expose the fourth isolation on the concavely third isolation; 7. depositing the first polysilicon on the substrate and opening to form thecapacitor electrode zigzagged on the bottom of vertical wall structure andmake electric contact with the component area; 8. depositing the second phtoresist to forming pattern area on the openingby photolithographic technique; 9. removing the remaining parts of the second phtoresist and etching theremaining parts of the fourth and third layer to expose the bottomelectrode; 10. forming dielectric layer on the surface of capacitor electrode; 11. depositing the second polysilicon on the first dielectric layer and forming the storage node on the second isolation to complete the capacitor.
Patent TW-360693-B (TW)
Title: An organopolysiloxane mixture for the preparation of adhesive-repellent organopolysiloxane films
Inventor: DE MONTIGNY ARMAND
IPC: C08K3/00
Filed: 1994-07-06
Granted: 1999-06-11
Abstract: An organopolysiloxane composition that can be crosslinked by addition, comprising (a) a branched organopolysiloxane having unsaturated hydrocarbon group, wherein at least 90% of the organo groups are methyl groups, the molecular weight of which is on average from 9,000 to 60,000, wherein the ratio of the number of diorganosiloxy units (D-units) to the number of branch points is on average between 15 and 40, and wherein at least one triorganosiloxy unit (M-unit) maximum half of all the M-units are free of unsaturated radicals, the remaining M-units each have only one unsaturated radical and the content of unsalted radicals is from 0.2 to 1 mmol/g and (b) linear methylhydrogenpolysiloxane, wherein the number of siloxy per mole is greater than the ratio of the number of branch points of component a), wherein at least half of the difunctional siloxy units (D-units) have hydrogen atoms directly bonded to silicon, and wherein the components (a) and (b) are present in a relative proportion such that the ratio of the number of SiH groups of component (b) to the number of unsaturated hydrocarbon atoms of component (a) is between 1.5 and 3.5, and (c) a catalyzing quantity of a platinum catalyst, thereby a single composition can be used to coat a variety of substances without need for changing the reservoir containing the coating composition.
Patent TW-340134-B (TW)
Title: A method for strengthening glass and a polymerized cross-linked siloxane coated glass container
Inventor: STEPHEN W CARSON
IPC: C09D183/04
Filed: 1994-07-15
Granted: 1998-09-11
Abstract: A sort of method of strengthening glasses, having the following steps: a) without physical existence of organic solvent, an aqueous coating composition based on siloxane selected from GPTMO, CETMO, UPTMO, DPTMO, MPTMO, BTMOSE, BTMOPE, EHTMO, HBTEO, VTMO, MTMO, MPMDEO, DBDAS, DMPTMO, MTEO, the hydrolysis and the mixture; and b) mature coating formed on the glass as a transparent layer; where the siloxane-based composition shall have (I) the strength of the glass of mature coating over that of before the mature coating, and (ii) mature coating not jeopardize the labeling property of the glass, or (iii) strengthening formed on the glass after maturing the coating with a continuous resistance at least 50% with respect to the humidity.
Patent TW-358907-B (TW)
Title: A computer system and a method of using a DRAM array as a next level cache memory
Inventor: HSU FU CHIEH
IPC: G06F12/00
Filed: 1994-12-06
Granted: 1999-05-21
Abstract: A computer system, including: a CPU; at least 1 set of fast access memory for integration of SRAM with CPU; 1 set of bus bar coupled with CPU; and 1 set of sub fast access memory coupled to the bus bar, where the sub fast access memory including at least 1 set of DRAM array.
Patent TW-346696-B (TW)
Title: Protection circuit for cells used in a series chain
Inventor: KARL KORDESCH
IPC: H02J7/00
Filed: 1995-03-04
Granted: 1998-12-01
Abstract: An overcharge protection circuit of rechargeable cells (1 to 10) charged in series and having a predetermined maximum allowable charge voltage and an open circuit voltage, the overcharge protection circuit comprising: a diode device bridging each of the cells (1 to 10) and providing a close passage if the voltage of the bridged cell exceeds the charge voltage; a charger circuit coupled to the terminals of the series chain and applying a rectification d.c. current, which is characterized in that the diode device is a light emitting diode (LED) having a forward voltage substantially equal to the maximum allowable voltage; and the charger circuit comprises current and/or voltage limiting means (R,Z) which limits the current of a semiconductor device (Z) flowing through the series chain of the cells (1 to 10), the semiconductor device limiting the current flowing through the series chain of the cells (1 to 10) to a value substantially corresponding to a value of the LED when the maximum allowable voltage is applied, the LED substantially being non-conductive when a voltage corresponding to the open voltage is applied in a forward direction such that, the LED constitutes no conspicuous load when the linked cells are storing or discharging, and completely closes the cells when the cells have reached a fully charged state, and simultaneously provides a visible indication of the linked cells being charged.
Patent TW-401295-B (TW)
Title: The composition material of inhibiting 5<alpha>-reductase activity and the method thereof
Inventor: LIAO SHU-TSUNG
IPC: A61K31/216
Filed: 1995-08-26
Granted: 2000-08-11
Abstract: Disclosed are a novel class of antiandrogenic compounds including saturated and unsaturated fatty acids, catechin gallates, their derivatives, and synthetic analogs, their method of synthesis, and their use in treating disorders associated with androgenic activities. Also disclosed is the use of known compounds not previously known for their antiandrogenic activity in treating disorders related to androgenic activities and cancers.
Patent TW-274569-B (TW)
Title: Fast analysis tint yarn arrangement method of check cloth
Inventor: WU DER-HUEI
IPC: G06F17/50
Filed: 1995-09-11
Granted: 1996-04-21
Abstract: A fast analysis tint yarn arrangement method of check cloth by using pattern recognition. The image of the cloth is taken by a CCD camera and display on a monitor. The movement of the XY Table is controlled by software for automatic image connect. Automatically calculate and multiple the number of tint yarn and its arrangement according to the selection of color tape and distance. The arrangement of the tint yarn arrangement is fast analysis by the digital pattern recognition technique. The process include: color selection, image capture, color tape selection, image connection, file and in-line CAD system. According to this pattern recognition method, we can distinguish the tint yarn arrangement from the difference of component, density and color to composite the check cloth.
Patent TW-344901-B (TW)
Title: Active matrix display device
Inventor: YAMAZAKI OSYUNPEI
IPC: G02F1/136
Filed: 1996-02-05
Granted: 1998-11-11
Abstract: An active matrix display device comprising: an image signal line; a gate signal line, the image signal line and the gate signal line forming a matrix; pixel electrodes disposed in a region encompassed by the image signal line and the image signal line; at least five serial thin film transistors located on each pixel electrode, the thin film transistors being of a same conductive type, in which the source and drain of the first thin film transistor are connected to an image signal line, the source and drain of the second thin film transistor are connected to a pixel electrode, at least the gates of the first and second thin film transistors are connected to a gate signal line, at least a gate voltage of the third thin film transistor is maintained at the required voltage so that the channel formation region of the third thin film transistor becomes a conductive type same as that of the source and drain of the third thin film transistor.
Patent TW-434025-B (TW)
Title: Oil-in-alcohol type emulsified composition containing a polyether modified polysiloxane emulsifier
Inventor: OMURA TAKAYUKI
IPC: C09K23/54
Filed: 1996-07-20
Granted: 2001-05-16
Abstract: The present invention provides an oil-in-alcohol type emulsified composition in which the oil phase is dispersed evenly and stably in the lower alcohol-based outer phase. The present composition comprises (a) an oil, (b) lower alcohols, (c) water, and (d) a polyether modified polysiloxane having the following formula (1) as an emulsifier: [wherein A is a polyoxyalkylene group of formula -C3H6O(C2H4O)a(C3H6O)bR' (wherein R' is selected from a hydrogen atom, an acyl group or an alkyl group having 1-4 carbon atoms; a is an integer of from 5 to 50, b is an integer of from 5 to 50); and where R represents a methyl group or a phenyl group, m is an integer of from 50 to 1000 and n is an integer of from 1 to 40].
Patent TW-411280-B (TW)
Title: Process for isolation of at least a proportion of the catalyst containing palladium dissolved in a solution also containing at least 3-pentenoic acid
Inventor: LECONTE PHILIPPE
IPC: B01J38/60
Filed: 1996-07-23
Granted: 2000-11-11
Abstract: Process for isolation of at least a proportion of the palladium dissolved in a solution also containing at least 3-pentenoic acid, characterized in that the said solution is acidified and stirred with an aqueous solution of hydrochloric acid, so as to obtain two liquid phases, including an aqueous phase containing at least a proportion of the palladium.
Patent TW-352459-B (TW)
Title: Process for flattening the memory cell and periphery circuit on DRAM
Inventor: LIN KUN-JI
IPC: H01L21/302
Filed: 1996-09-02
Granted: 1999-02-11
Abstract: A process for flattening memory cell and periphery circuit on DRAM includes the steps: providing a semiconductor substrate, on which an insulated field emission region is formed, a transistor with gate, source electrode and drain electrode dispersion region is built on both sides respectively to constitute the memory cell and peripheral circuit for the DRAM, and a bit line linking with the memory cell and the peripheral circuit; a first insulation layer is formed on the semiconductor substrate to shield the memory cell, the peripheral circuit and the bit line; itching the first insulation layer with the thickness equal to the sum of upper and lower electrodes which is intended to form the capacitor on the memory cell; forming a contact opening and exposing the other source/drain electrode dispersion region of the memory cell on the substrate surface, and forming a capacitor on the contact opening; and forming a second insulation layer on the first insulation layer and the capacitor.
Patent TW-340892-B (TW)
Title: Apparatus for holding a lock assembly and shearing the assembly pins thereof
Inventor: STEVEN A FANTL
IPC: E05B67/00
Filed: 1996-09-14
Granted: 1998-09-21
Abstract: A holding apparatus for articles of different sizes, including: a) a horizontal base, for defining the first support; b) a pair of guiding elements, with an upper and a lower end, and the corresponding horizontal partition surface, being the article placed on the surface for holding either of the first or the second support; c) a supporting arm, located under the first guiding element, with the arm of one of the guiding pieces toward the arm of the other one; d) being the guiding element on the base and articulated onto the base, while extending downward onto the base, for articulated movement between the first sealing position and the second opening position to the base; being the arm on the first sealing position to define the second support in perpendicular to and aligning the top of the first support; being the second opening position in transverse onto the first support, for provision of the passage between the arm and the first support, for holding of an article.
Patent TW-338027-B (TW)
Title: Process for the manufacture of 1, 1, 1, 2-tetrafluoroethane
Inventor: HSUEH SUNG TUNG
IPC: C07C17/21
Filed: 1996-09-18
Granted: 1998-08-11
Abstract: A process for producing 1, 1, 1, 2-tetrafluoroethane (HFC-134a) comprising the following: a) the first reaction including the vaporization of the first recycle comprising fluorine hydride and 1, 1, 1, trifluoro-2-ethane with Mohr of fluorine hydride and 1, 1, 1, trifluoro-2-ethane in 1:1and keeping the composition, under proper conditions, for floridation withcatalysts for forming of the first reaction mixture of 1, 1, 1, 2-tetrafluoroethane; and b) the second reaction, including the second composition of vaporization consisting fluorine hydride, ethylene trifluoride and the first reaction mixture in (a), with the Mohr of fluorine hydride to ethylene trifluoride at least 3:1 and the second reaction conducted at a higher temperature than the first one for the forming of the second reaction mixture of 1, 1, 1, 2-tetrafluoroethane, 1, 1, 1, trifluoro-2-ethane, fluorine hydride, ethylene trifluiride and chlorine hydride.
Patent TW-371770-B (TW)
Title: Gas insulation switch device and method for assembling the same
Inventor: HATSUTA MASAKI
IPC: H01H31/32
Filed: 1996-11-19
Granted: 1999-10-11
Abstract: The purpose of this invention is provide a gas insulation switch which is assembled finely adjusted outside of the oil tank instead inside of it. The construction of this invention is very simple, the disconnecting switch mechanism (16) and the gas tank (11) of the gas insulation switch is first mounted on a mounting plate (13) outside of the oil tank, the mounting plate is linked with a spiral support (14) of the gas tank (11), turning the spiral support (14) will affixed the mounting plate onto the gas tank (11).
Patent TW-374251-B (TW)
Title: Semiconductor chemical sensor device and method of forming a thermocouple for a semiconductor chemical sensor device
Inventor: LESCOUZERES LIONEL
IPC: H01L35/00
Filed: 1996-12-03
Granted: 1999-11-11
Abstract: A semiconductor chemical sensor device (2) comprises a sensitive layer (4) for detecting specific chemicals and a heater for heating the sensitive layer, which is formed by a heater portion (6) of a conductive layer (8) in the semiconductor chemical sensor device (2). The semiconductor chemical sensor device (2) further comprises a thermocouple (12) for detecting the temperature of the sensitive layer (4), the thermocouple comprising a P/N junction (14) formed as part of or adjacent the heater portion (6) of the conductive layer (8) such that a signal developed across the P/N junction (14) is representative of the temperature of the sensitive layer (4).
Patent TW-351816-B (TW)
Title: Distributed gap electrical choke
Inventor: COLLINS ALIKI
IPC: H01F17/06
Filed: 1997-01-20
Granted: 1999-02-01
Abstract: An electric choke has a magnetic core with a distributed gap. The magnetic core is composed of an iron based, rapidly solidified metallic clloy. The distributed gap configuration is produced by an annealing treatment which causes partial crystallization of the amorphous alloy. As a result of the annealing treatment, the magnetic core exhibits permeability in the range of 100 to 400, low core loss (i.e. less than 70 W/Kg at 100 kHz and 0.1T) and excellent DC bias behavior (at least 40% of the initial permeability is maintained at a DC bias field of 3980 A/m or 50 Oe).
Patent TW-319858-B (TW)
IPC: B65H5/02
Filed: 1997-02-15
Granted: 1997-11-11
Abstract: A bill handling machine includes a take-out roller whose entire circumferential surface is formed with a high friction material and which is adapted to engage with leading edge portions of stacked bills and can take out the bills, a separation roller for cooperating with the take-out roller and preventing two or more bills from being simultaneously taken out, a bill sensor provided downstream of the take-out roller and the separation roller for detecting whether or not any bill is present, transporting rollers provided downstream of the bill sensor and rotated at higher speed than the take-out roller, and a controller for temporarily stopping the take-out roller when detection signals have been continuously input from the bill sensor for a time period longer than a predetermined time period. According to the thus constituted bill handling machine, it is possible to reliably and efficiently separate and handle bills whose lengths in the bill transporting direction differ greatly. <IMAGE>
Patent TW-434870-B (TW)
Title: Ground ring for metal electronic package
Inventor: HOFFMAN PAUL R
IPC: H01L23/13
Filed: 1997-02-20
Granted: 2001-05-16
Abstract: The component for an electronic package (10) has a metallic substrate (12) with a surface (16) coated by a dielectric (32). A centrally disposed cavity (22) extends through the dielectric (32) into the metallic substrate (12) to a depth, D1. Circumscribing and abutting this cavity (22) is an annular channel (30) having a depth D2 that is less than D1. A semiconductor device (12) bonded to the base (24) of the cavity (22) is electrically interconnected (46) to both circuit traces (34) formed on the dielectric coating (32) and to the annular channel (30). A method of forming the annular channel (30) is to mechanically mill a precursor annular channel (58) having an outer wall (60) a desired distance from the sidewalls (20) of the metallic substrate (12) and a width substantially greater than the desired width of the annular channel (30). A cavity (22) is then formed in the region circumscribed by the outer wall (60) of the precursor annular channel (58).
Patent TW-426746-B (TW)
Title: Low alloy steel for the manufacture of moulds for plastics
Inventor: BEGUINOT JEAN
IPC: C22C38/54
Filed: 1997-04-19
Granted: 2001-03-21
Abstract: Steel for the manufacture of moulds for injection moulding of plastics, characterized in that its chemical composition contains, by weight: 0.35% ≦ C ≦ 0.5%, 0% ≦ Si ≦ 0.5%, 0.2% ≦ Mn ≦ 2.5%, 0% ≦ Ni ≦ 4%, 0% ≦ Cr ≦ 4%, 0% ≦ Mo + W/2% ≦ 2%, 0 ≦ Cu ≦ 1%, 0% ≦ V + Nb/2 + Ta/4 ≦ 0.5%, 0.005% ≦ Al ≦ 0.2%, 0% ≦ B ≦ 0.015%, 0% ≦ Ti + Zr/2 ≦ 0.3%, 0% ≦ S + Se + Te ≦ 0.2%, 0% ≦ Pb + Bi ≦ 0.2%, 0% ≦ Ca ≦ 0.1%, the remainder being iron and impurities resulting from the production, the analysis simultaneously satisfying the following relationships: Cr + 3*(Mo+W/2) + 10*(V+Nb/2+Ta/4) ≧ 1, R = 3.8*C + 10*Si + 3.3*Mn + 2.4*Ni + 1.4*(Cr+Mo+W/2) ≦ 11, Qu = 3.8*C + 1.1*Mn + 0.7*Ni + 0.6*Cr + 1.6*(Mo+W/2) + kB ≧ 3, with kB=0.5 if B ≧ 0.0005% and kB=0 if not, and: R ≦ Max(2.33*Qu-1, 0.9*Qu+4).
Patent TW-400519-B (TW)
Title: Method and circuit for generating internal pulse signals in synchronous memory
Inventor: OH JONG-HOON
IPC: G11C7/10
Filed: 1997-05-06
Granted: 2000-08-01
Abstract: A method and a circuit for generating internal pulse signals in a synchronous memory is provided. A first pulse signal is generated in response to a burst mode command to transfer an external column address to an internal column address line. After the generation of the first pulse signal, a second pulse signal is generated to transfer an internal column address from an internal column address counter to the internal column address line in each clock cycle until the burst mode operation is advanced by a predetermined burst length. When a burst interrupt is generated in burst mode operation to perform the burst mode operation in response to a new external column address, the first pulse signal is generated and the generation of the second pulse signal is suppressed.
Patent TW-403745-B (TW)
Title: Novel substituted -amidinobenzene derivative and pharmaceutical compositions thereof
Inventor: MATSUMOTO YUZO
IPC: A61K31/495
Filed: 1997-05-16
Granted: 2000-09-01
Abstract: A substituted-amidinobenzene derivative of the following general formula (I) or a salt thereof, and a pharmaceutical composition comprising said derivative or a salt thereof and a pharmaceutically acceptable carrier. The symbols in the above formula have the following meanings: R1: a group which can be converted into an amidino group in vivo; R2 and R3: the same or different and each represents a carboxyl group or a group which can be converted into a carboxyl group in vivo; X1 and X2: the same or different and each represents a lower alkylene group; m: 0, 1 or 2; n: 0 or 1, provided that n=1 when m=0. They have GPIIb/IIIa receptor antagonizing activity and are useful as medicines for ameliorating ischemic cardiac disorders, adminicular in cardiosurgery operations or in vascular surgery operations, medicines for ameliorating cerebrovascular disorders, and medicines for ameliorating peripheral artery disorders. In addition, they are useful as a prodrug excellent in peroral absorbability and sustainment of the effect.
Patent TW-325535-B (TW)
Title: Memory system and data transfer method
Inventor: WATANABE SHINPEI
IPC: G06F12/00
Filed: 1997-05-29
Granted: 1998-01-21
Abstract: A memory system comprising: a memory array having a plurality of memory devices; an input data pathway for inputting external data; an output data pathway for outputting data; an input data bit storage mechanism located between the memory array and the input data pathway; and an output data bit storage mechanism located between the memory array and the output data pathway; in which the data bits read from the memory array are stored in the output data bit storage mechanism to be output through the output data pathway; in which a procedure required to read the next batch of data from the memory array is performed; and in which the operation of the input data bit storage mechanism and the operation of the output data bit storage mechanism can be performed separately.