baber/WOPTO huggingface dataset:
Patent TW-515215-B (TW)
Title: Method and system for transmission of decrypting information
Inventor: KUDELSKI ANDRE
IPC: H04N7/167
Filed: 2001-01-05
Granted: 2002-12-21
Abstract: At the moment of the diffusion of pay-TV with multi-channel signals, each channel is associated to authorization messages (ECM) which allow to decrypt this channel according to the rights of the subscriber. When changing channel, a very short time is accepted before one has determined these new rights in relation with the new channel. The heavy encrypting algorithms are thus excluded. To avoid this drawback, to decrypt a channel, a system is proposed using the combination of the authorization information for a channel (ECM), and thus encrypted by a fast algorithm, with authorization information (MECM) for a group of channels. These latter are encrypted by a high security algorithm and are thus slower to decrypt.
Patent TW-533695-B (TW)
Title: Handling errors occurring in base-station of a CDMA system
Inventor: SKOOG GORAN
IPC: H04B7/005
Filed: 2001-02-06
Granted: 2003-05-21
Abstract: CDMA base-station comprising a transmit stage (2, 4, 7, 9, 10, 11, 12) and a receive stage (3, 5, 8, 13) for communicating with mobile terminals has been provided. The transmit stage comprises a multi carrier power amplifier having at least two independent power modules (10, 11) for transmitting signals on at least one traffic channel (TCH) and control and pilot signals on at least one control channel (CCH). Each power module (10, 11) is capable of being operational although the other power module is non-operational. The at least two power modules are normally operating simultaneously and each is contributing with emitting power. The CDMA base station moreover comprises a control module (16) monitoring the error status of the power modules in the base station. When an error signal is detected in a base-station indicative of an error in a power module (10, 11), the system immediately ends operation of all traffic channels associated with the erroneous power module (10, 11), but sustains operation of the at least one control channel.
Patent TW-461833-B (TW)
Title: Method for manufacturing low-oxygen copper
Inventor: ASAO HARUHIKO
IPC: B22D11/06
Filed: 2001-02-22
Granted: 2001-11-01
Abstract: A method for manufacturing a low-oxygen copper wire is provided, in which a dehydrogenating treatment can be performed without ensuring a long moving distance of molten copper, and the generation of holes in solidification is suppressed, whereby high quality low-oxygen copper wire can be obtained having superior surface quality. The method for continuously manufacturing ingots of low-oxygen copper from molten copper comprises a step of performing combustion in a reducing atmosphere in a melting furnace so as to produce molten copper; a step of sealing the molten copper in a non-oxidizing atmosphere in a casting trough; a step of transferring the molten copper to a turn-dish by using the casting trough; a degassing step of passing the molten copper through a degassing means provided in the casting trough so as to dehydrogenate the molten copper; a step of continuously feeding the molten copper to a continuous casting machine so as to continuously produce cast copper; and a step of cutting the cast copper into a predetermined length.
Patent TW-483085-B (TW)
Title: Architecture and method for patching DRAM by a slicing table of generating memory page fault distribution
Inventor: HOU JIAN-TSZ
IPC: H01L21/66
Filed: 2001-05-18
Granted: 2002-04-11
Abstract: The present invention provides an architecture and method for patching DRAM by a slicing table of generating memory page fault distribution. A memory page with a suitable size of the SDRAM is used as a basic slicing block. At each time of power-on or memory test, a slicing table of memory page fault distribution is established, and the allowable error number in the basic range is set. When error number is more than the defined range, the error quotas of other slicing table with a lower error rate can be used to compensate the excessive error of the slicing block. A patching address is encoded based on the slicing table of the error distribution, so as to redirect a new re-mapping address. Therefore, the access operation is performed on the re-mapping address to maintain the normal operation of the DRAM, thereby greatly reducing the extra cost in testing and patching.
Patent TW-557246-B (TW)
Title: Process for producing a methyl methacrylate-based resin article
Inventor: MAEKAWA TOMOHIRO
IPC: B29C48/76
Filed: 2001-04-10
Granted: 2003-10-11
Abstract: A process for producing an article of resin made from at least about 50% by weight of methyl methacrylate is provided, which comprises a step of melt-processing the resin with an extruder, wherein an oxygen concentration of a gaseous phase in a resin feed zone of the extruder falls within a range of from about 0.7% by volume to about 10% by volume. The article is excellent in curbing the coloring in melt processing.
Patent TW-504735-B (TW)
Title: Film forming method and film forming apparatus
Inventor: INADA HIROICHI
IPC: H01L21/027
Filed: 2001-04-10
Granted: 2002-10-01
Abstract: The present invention is a film forming method of forming a film of a treatment solution on the front face of a substrate in a treatment chamber including the steps of: supplying the treatment solution to the substrate mounted on a holding member in the treatment chamber in states of gas being supplied into the treatment chamber and of an atmosphere in the treatment chamber being exhausted; and measuring the temperature of the front face of the substrate before the supply of the treatment solution. The measurement of the temperature of the front face of the substrate before the supply of the treatment solution enables the check of the temperature of the front face of the substrate and the temperature distribution. Then, the measured result is compared with a previously obtained ideal temperature distribution for the formation of a film with a uniform thickness, thereby predicting the film thickness of the film which will be formed in the following processing. Further, the treatment film is formed after the temperature measurement and the film thickness of the treatment film is evaluated, thereby storing the data to find and set so-called optimal conditions. Consequently, the temperature or the like of the treatment solution or the like can be adjusted based on the measured results and corrected to make the film thickness uniform.
Patent TW-530495-B (TW)
Title: System and method for processing compressed data stream
Inventor: HUANG HE-CHAU
IPC: H04N19/91
Filed: 2001-05-16
Granted: 2003-05-01
Abstract: The invention is a system and method for processing a compressed data stream. The compressed data stream is composed of segments of first group and segments of second group. The segments of first group do not need to be decompressed during the processing, and only the status thereof, like timestamp, needs to be adjusted. The segments of second group need to be decompressed for successive operations. Then recompression is processed for the segments of second group. Next, the resulting segments of first group and second group are combined together to produce a target data stream. Because of decreasing unnecessary decompression and recompression, significant efficiency is obtained and error propagation is reduced during processing the compressed data stream.
Patent TW-I307716-B (TW)
Title: Dual specificity antibodies and methods of making and using
Inventor: GEORGE AVGERINOS
IPC: G01N33/15
Filed: 2001-06-29
Granted: 2009-03-21
Abstract: Antibodies having dual specificity for two different but structurally related antigens are provided. The antibodies can be, for example, entirely human antibodies, recombinant antibodies, or monoclonal antibodies. Preferred antibodies have dual specificity for IL-1 alpha and IL-1 beta and neutralize IL-1 alpha and IL-1 beta activity in vitro and in vivo. The antibody can be a full-length antibody or an antigen-binding portion thereof. Methods of making and methods of using these antibodies are also provided. These antibodies, or antibody portions, are useful for detecting two different but structurally related antigens (e.g., IL-1 alpha and IL-1 beta) and for inhibiting the activity of the antigens, (e.g., in a human subject suffering from a disorder in which IL-1 alpha and/or IL-1 beta activity is detrimental.
Patent TW-519613-B (TW)
Title: Structure of electrode in touch screen and flat display panel with the touch screen
Inventor: AHN YEONG-SU
IPC: G09G5/00
Filed: 2001-06-29
Granted: 2003-02-01
Abstract: The present invention relates to a resistive touch panel, and more specifically, to structure of electrodes in the touch panel capable of compensating the distortion of a potential compensating electrode and a transparent electrode, which varies the value of contact resistance between them. The structure of electrode in a resistive touch panel comprises insulators which are formed on a transparent electrode in a film forming region of the potential compensating electrodes to insulate the potential compensating electrodes and the transparent electrode from each other, and in which contact resistance with respect to a signal-supplying portion can vary according to locations thereof by making area of the insulators larger at the signal-supplying portion and smaller as they become farther from the signal-supplying portion; linear potential compensating electrodes made of low resistive metal within and along regions of the insulators formed on the transparent electrode; and a contact resistance variable layer in which the contact resistance of all regions where the potential compensating electrodes and the insulators are contacted with each other can vary according to locations thereof. In addition, the interface is placed between the insulators and the potential compensating electrodes, and the contact resistance is adjusted according to the shape of the interface. The flat panel display with the touch panel added thereto in which the electrode structure can be employed has the laminated structure in which the margin region of LCD includes the compensation electrode region of the touch panel. Therefore, the reliability, applicability, the degree of freedom of design, mass productivity and the like are improved.
Patent TW-555873-B (TW)
Title: Method of coating a substrate and vane for vane-type compressor
Inventor: HATAKENAKA KIYOHARU
IPC: C23C14/02
Filed: 2001-07-05
Granted: 2003-10-01
Abstract: A method of coating a substrate includes the step of forming a chrome layer on the substrate by using a magnetron sputtering device, and the step of forming a chrome nitride layer on the chrome layer by using an arc type ion plating device while maintaining the temperature of the substrate between 100 and 200 DEG C. A vane used for a vane-type compressor, which is subjected to a surface treatment according to the coating method of the present invention is also provided.
Patent TW-534854-B (TW)
Title: Method and apparatus for measuring a polishing condition
Inventor: HAGGART DAVID
IPC: B24B37/013
Filed: 2001-08-21
Granted: 2003-06-01
Abstract: In a method for determining the condition of the surface, such as thickness or reflectivity, of any specific location on a wafer (16) during a chemical mechanical polishing (CMP), at first, a location of a measurement site on the wafer surface is selected. Second, a picture (22) of the surface within the measurement site is taken, for example, through a window (14). Third, the picture is analyzed. This provides an exact endpointing and an exact final thickness of a specific layer on the wafer.
Patent TW-506095-B (TW)
Title: Board for forming electronic package structure
Inventor: JIAN SHENG-HUEI
IPC: H01L23/28
Filed: 2001-09-04
Granted: 2002-10-11
Abstract: A board for forming electronic package structure comprises a metal support pad and plural conducting wires surrounding the support pad. The metal support pad is used for placing a semiconductor device, for example a chip. The semiconductor device is generally fixed on the metal support pad by using the chip bonding material, for example the silver paste. Each conducting circuit is provided with a terminal portion for electrically connecting to the semiconductor device.The board surface is covered with a layer of anti-soldering agent. The anti-soldering agent layer is provided with at least the first opening such that the terminal portion of each conducting circuit is exposed to the first opening. The invention is featured with having a guiding flow groove or guiding flow opening formed on the anti-soldering agent layer of the board surface for protecting the terminal portion of each conducting circuit from being contaminated by the overflowed chip bonding material.
Patent TW-533669-B (TW)
Title: LLC series resonant DC-to-DC converter
Inventor: HUANG GUISONG
IPC: H02M3/337
Filed: 2001-09-14
Granted: 2003-05-21
Abstract: The present invention discloses a DC-to-DC converter. The DC-to-DC converter includes a square wave generator for generating a sequence of output voltages having a waveform of square wave. The DC-to-DC converter further includes a resonant tank connected to the square wave generator comprising a series capacitor connected to a series inductor and a parallel inductor. The DC-to-DC converter further includes a transformer having a primary side connected in series with the series inductor and connected in parallel to the parallel inductor. The transformer further includes a secondary side for connecting to a rectifying circuit for providing a rectified DC voltage to an output load circuit. The series capacitor functioning with the series inductor to provide a first characteristic resonant frequency represented by fs, and the series capacitor functioning with the series inductor and the parallel inductor to provide a second characteristic resonant frequency represented by fm wherein fs > fm. The converter runs at variable frequency switching to perform output regulation. The converter features high conversion efficiency at high input operation by switching at frequency between the first and second characteristic resonant frequency. In a preferred embodiment, the parallel inductor is integrated to transformer as primary magnetizing inductor and in further the series inductor may also be integrated into transformer.
Patent TW-565519-B (TW)
Title: Substrate conveying module and system made up of substrate conveying module and workstation
Inventor: BIRKNER ANDREAS
IPC: H01L21/677
Filed: 2001-10-24
Granted: 2003-12-11
Abstract: The invention is based on a substrate conveying module (1) for conveying substrates into a workstation (3) for inspection, measurement, or processing of the substrates, in which on because of connecting elements (4a, b) in at least two side walls (1a, b, c) of the substrate conveying module (1) and/or in at least two side walls (3a, b, c, d) of the workstation (3), the substrate conveying module (1) can, at the installation location of the workstation (3), be flexibly connected thereto in different orientations with respect to the workstation (3) and/or can be coupled at different points to the workstation (3).
Patent TW-531932-B (TW)
Title: Fuel processing system and improved feedstock therefor
Inventor: EDLUND DAVID J
IPC: H01M8/06
Filed: 2001-11-07
Granted: 2003-05-11
Abstract: An improved feedstock for fuel processing systems, and fuel processing systems incorporating the same. The fuel processing system includes a fuel processor adapted to produce a product hydrogen stream from a carbon-containing feedstock. The fuel processing system may also include a fuel cell stack adapted to produce an electric current from the product hydrogen stream. The feedstock is at least substantially formed of a hydrocarbon or alcohol. In an exemplary embodiment, the feedstock includes methanol. The feedstock also includes at least one odorant adapted to produce a strong and characteristic odor, even when present in only low concentrations. The odorant, or odorants, are selected to be free or at least sufficiently free from compounds that will poison the catalyst used in the fuel processor.
Patent TW-529265-B (TW)
Title: Wireless network for transmitting parameters for an encoded data transmission
Inventor: HERRMANN CHRISTOPH
IPC: H04L12/28
Filed: 2001-12-03
Granted: 2003-04-21
Abstract: The invention relates to a wireless network comprising a radio access network and a plurality of terminals which are each provided for encoding certain data to be transmitted and for forming a key in the same manner in dependence on a first and a second frame number for a connection to be set up or to be reconfigured between the radio access network and a terminal. The first frame number depends on the periodically changing number of the radio frame used for the data transmission and the value of the second frame number depends on the first frame number. Based on the value of the first frame number the terminal and/or the radio access network is provided for ascertaining whether a time delay is to take place in the formation of the second frame number in the radio access network.
Patent TW-571008-B (TW)
Title: Composite fiber with excellent post-treatment processibility and its production method
Inventor: KOYANAGI TADASHI
IPC: D01D5/30
Filed: 2002-02-01
Granted: 2004-01-11
Abstract: The present invention provides a polytrimethylene terephthalate composite fiber characterized in that the composite fiber is a plurality of single filament which comprises two kinds of polyester components laminated to each other in a side-by-side manner or an eccentric sheath-core manner, at least one polyester component is polytrimethylene terephthalate and the composite fiber satisfies the following conditions: the content of trimethylene terephthalate cyclic dimer in polytrimethylene terephthalate is 2.5 wt% or less, the fiber-fiber dynamic friction coefficient is from 0.2 to 0.4, the degree of intermingling is from 2 to 60 point/m and/or the number of twists is from 2 to 60 T/m and the fiber size fluctuation U% is 1.5% or less.
Patent TW-I270116-B (TW)
Title: Method for removing Si-needle of deep trench
Inventor: NI CHIH-JUNG
IPC: H01L21/027
Filed: 2002-03-06
Granted: 2007-01-01
Abstract: The present invention relates to a method for removing Si-needle of deep trench, which is employed to remove Si-needles formed in making deep trenches in a wafer. The method comprises the steps of: covering a photo-resistance layer on a front surface of the wafer; carrying out edge removal of the wafer to a predetermined extent to expose the Si-needles; performing a first etching process on the wafer, wherein the first etching process is a wet etching process by using an etchant for etching from the back surface of the wafer back to the front surface to remove the Si-needles; performing a second etching process on the wafer, wherein the second etching process is a dry etching process by removing SiN flakes formed in the first etching process; and removing the photo-resistance layer from the front surface of the wafer.
Patent TW-550702-B (TW)
Title: Resin coating material for semiconductor device processing and the manufacturing method thereof
Inventor: INAGI KYOICHI
IPC: C03C25/24
Filed: 2002-03-12
Granted: 2003-09-01
Abstract: The purpose of the present invention is to provide a resin coating material for semiconductor device processing, which has high etching resistance due to plasma, has no abnormal etching, will not damage the semiconductor device during cleaning the semiconductor device, and will not result in contamination due to the delamination of resin coating and particles, and the manufacturing method thereof. The material surface is covered with a film made of fluoro-resin or engineering plastic without pores. Preferably, the coating has a thickness of 50 mum or more and a surface roughness Ra of 1 mum or less.
Patent TW-I228714-B (TW)
Title: Optical information recording medium, method for manufacturing the same, and initialization device
Inventor: AKIYAMA TETSUYA
IPC: G11B7/00
Filed: 2002-06-10
Granted: 2005-03-01
Abstract: An optical information recording medium includes a plurality of recording layers, a reflectance of at least one of the plurality of the recording layers in a non-initialized state with respect to a light beam for initialization being smaller than a reflectance of the same in an initialized state with respect to the light beam for initialization. The recording layers are initialized by irradiating, among the plurality of recording layers, the recording layer positioned farther from a light beam irradiation side with the light beam prior to irradiating the recording layer positioned closer to the light beam irradiation side, so that the initialized recording layers have no initialization irregularities. In initialization, at a position at a same distance in a radial direction on the optical information recording medium, the recording layer positioned farther from a light beam irradiation side is irradiated with one light beam before the recording layer positioned closer to the light beam irradiation side is irradiated with another light beam so that the plurality of recording layers are initialized at the same time by a light beam projecting operation in which the light beams are focused at different positions. This ensures the initialization without irregularities within a short time.
Patent TW-I267084-B (TW)
Title: Nonvolatile semiconductor memory device
Inventor: SHIOYAMA KAZUTOMO
IPC: G11C16/30
Filed: 2002-06-27
Granted: 2006-11-21
Abstract: A nonvolatile semiconductor memory device of the present invention includes: a plurality of memory blocks each including a memory array including a plurality of memory cells, a plurality of word lines and bit lines provided so as to cross each other for selecting the memory cell, a row decoder for selecting the word line according to an externally-input row address signal, a column decoder for selecting the bit line according to an externally-input column address signal; and at least one internal voltage generation circuit for applying a voltage required for performing data write/erase operations on the memory array, a plurality of first switch circuits are provided such that each first switch circuit is provided between the at least one internal voltage generation circuit and the row decoder or the column decoder, and a switch selection circuit is provided for selectively operating the plurality of first switch circuits.
Patent TW-565889-B (TW)
Title: Method for batchwise etching semiconductor
Inventor: SHEU BOR-RU
IPC: H01L21/306
Filed: 2002-07-02
Granted: 2003-12-11
Abstract: The present invention relates to a method for batchwise etching a semiconductor and a structure thereof. The method comprises: preparing a substrate; sequentially forming a first conductor layer, a first dielectric layer, and a second conductor layer on the substrate; performing a first photolithography and etching to form a first trench; filling a second dielectric layer in the first trench to the location of the second conductor layer; sequentially forming a third dielectric layer and a fourth dielectric layer on the second dielectric layer and the second conductor layer; performing a second photolithography and etching to remove the third dielectric layer and the fourth dielectric layer on the second conductor layer and form a second trench; forming a fifth dielectric layer on the inside of the second trench, and forming a third conductor layer on the fifth dielectric layer, thereby completing a semiconductor structure.