baber/WOPTO huggingface dataset:
Patent TW-I227472-B (TW)
Title: Optical recording method and optical recording medium
Inventor: TSUKAMOTO SYUJI
IPC: G11B7/125
Filed: 2002-03-19
Granted: 2005-02-01
Abstract: This invention is to greatly increase the recording density of information on an optical recording medium and further to suppress the occurrence of errors during reading operation. By this optical recording method, recording marks 48A to 48G are formed by irradiating the optical recording medium 10 with a laser beam. In a recording layer 12, virtual recording cells 40 are prescribed successively in a moving direction S; and at least three stages of cleaning power, standby power, and recording power for forming recording marks 48A to 48G are so set as the irradiation power of the laser beam as to increase in this order and the time of recording irradiation with the recording medium is set to more than 5 stages. Irradiation with the cleaning power is carried out for a specific time after the irradiation with the recording power is completed and irradiation with the standby power is performed from the time when the irradiation with the cleaning power is completed until a next virtual recording cell begins to be irradiated with the recording power; and thus at least 5 kinds of recording marks 48A to 48G of different size are formed on the virtual recording cells 40 to perform the multilevel recording of information.
Patent TW-567575-B (TW)
Title: Fabrication method of semiconductor device and semiconductor device
Inventor: HASHIMOTO KOJI
IPC: H01L21/28
Filed: 2002-03-25
Granted: 2003-12-21
Abstract: The invention provides a fabrication method of semiconductor device and semiconductor device. A resist pattern (5) is formed in a dimension of a limitation of an exposure resolution over a hard mask material film (4) over a work film (3). The material film (4) is processed using the resist pattern (5) as a mask. A hard mask pattern (6) is thereby formed. Thereby a resist pattern (7), over a non-selected region (6b), having an opening (7a) through which a selection region (6a) in the mask pattern is exposed is formed. Only the mask pattern (6a) exposed through the opening (7a) is slimmed by performing a selection etching, the work film (3) is etched by using the mask pattern (6). A work film pattern (8) is thereby formed, which include a wide pattern section (8a) of a dimension width of the limitation of the exposure resolution and a slimmed pattern section (8a) of a dimension that is not more than the limitation of the exposure resolution.
Patent TW-591961-B (TW)
Title: Method and apparatus for transmission framing in a wireless communication system
Inventor: HSU RAYMOND T-S
IPC: H04L12/56
Filed: 2002-03-28
Granted: 2004-06-11
Abstract: Method and apparatus for framing in a wireless transmission system supporting broadcast transmissions. A framing format incorporates fields specific to a unidirectional transmission and reduces the overhead of the system. One embodiment employs a version of HDLC having a start of frame field and an error checking mechanism attached to the payload of each frame, wherein protocol information is not transmitted with each individual frame.
Patent TW-I234375-B (TW)
Title: Fast connection establishment method for bluetooth device
Inventor: CHEN WEN-CHI
IPC: H04L12/56
Filed: 2002-05-29
Granted: 2005-06-11
Abstract: A fast connection establishment method for a bluetooth device is used to establish a connection between two bluetooth devices in order to provide a wireless transmission function. A bluetooth module, bluetooth address memory, CPU and connection interface for outside device are installed in each bluetooth device. The method first connects the three signal contacts of a bluetooth device to the three signal contacts of another bluetooth device to interchange the bluetooth addresses with each other. Then, the bluetooth address memory of the bluetooth device is used to store the bluetooth address of the opposite bluetooth device. After this, the bluetooth address is sent out after the power source of the bluetooth device is on. Finally, a bluetooth connection procedure is started, if the bluetooth address of the opposite device is received by it in a specific time. Thereby, a wireless transmission can be established between two bluetooth devices.
Patent TW-555534-B (TW)
Title: Method for producing dry betel nut
Inventor: LIAU JAU-JIE
IPC: A23L25/00
Filed: 2002-06-06
Granted: 2003-10-01
Abstract: A method for producing a dry betel nut comprises: performing a drying operation on a green betel nut to form a dried betel nut; using a knife tool to remove the core of the dried betel nut to form a core hole wall in the betel nut; sterilizing and softening the dry betel nut by boiling it in water; performing a soaking operation on the sterilized dry betel nut to season the betel nut and soften the fibers of the betel nut, while performing a heating operation at the same time; drying the soaked dry betel nut; filling the dried and soaked betel nut with a prepared filling; and sterilizing the betel nut with a filling by an UV light to form a product. The invented steps can prolong the storage life of the dried betel nut and effectively reduce the cancer causing factors of oral cancer.
Patent TW-546805-B (TW)
Title: Bumping process
Inventor: WU TSUNG-HUA
IPC: H01L33/00
Filed: 2002-07-18
Granted: 2003-08-11
Abstract: A bumping process is fitted for fabricating many bumps on a wafer. The wafer is provided with an active surface where there are provided with a passivation layer and many contact pads. The passivation layer exposes the contact pads. The bumping process is first to form a UBM layer onto the active surface of the wafer and the UBM layer covers the passivation layer and the contact pads. Subsequent 1y, the UBM layer is patterned and only remained the UBM layer positioned on the contact pads. Next, a photoresist is formed onto the active surface layer of the wafer and the photoresist has many openings exposing the UBM layer. Afterward, a flux is filled into the openings and then many solder lumps are filled into the openings respectively. Subsequently, a reflow process is performed to joint the solder lumps with the UBM layer. Finally, the flux and the photoresist are removed.
Patent TW-587075-B (TW)
Title: Method for preparing a dialkyl carbonate
Inventor: LEWIS LARRY NEIL
IPC: C07C68/00
Filed: 2002-08-01
Granted: 2004-05-11
Abstract: Unexpected corrosion of downstream sections of a dialkyl carbonate manufacturing apparatus has been traced to alkyl chloroformate impurities, which slowly decompose to yield hydrochloric acid. An improved process and apparatus for dialkyl carbonate synthesis reduce corrosion by physically removing or chemically decomposing the alkyl chloroformate impurities within the corrosion-resistant upstream sections of the apparatus.
Patent TW-I270165-B (TW)
Title: Semiconductor device using shallow trench isolation and method of fabricating the same
Inventor: TAMURA KAZUHIRO
IPC: H01L21/76
Filed: 2002-10-01
Granted: 2007-01-01
Abstract: A semiconductor device adopting shallow trench isolation for reducing an internal stress of a semiconductor substrate. The semiconductor device is composed of a semiconductor substrate provided with a trench for isolation, and an insulating film formed to cover the trench for relaxing an internal stress of the semiconductor substrate. The insulating film includes a first portion disposed to be opposed to a bottom of the trench, and a second portion disposed to be opposed to a side of the trench. A first thickness of the first portion is different from a second thickness of the second portion.
Patent TW-556136-B (TW)
Title: Light-emitting display screen with dual-sided display and the driving method thereof
Inventor: YANG MING-SHIANG
IPC: G09F9/33
Filed: 2002-10-08
Granted: 2003-10-01
Abstract: The present invention discloses a light-emitting display screen with dual-sided display and the driving method thereof, wherein the light-emitting display screen comprises a light-emitting display module and two photo-masks. The light-emitting module is formed of plural light-emitting devices arranged in an array and bonded to a substrate. The substrate also has plural engraved portions, and the illumination portion on the side of the light-emitting device is disposed at the engraved position of the substrate. Also, the two photo-masks are installed on the front and back sides of the light-emitting display module respectively, which control the light-emitting display module to be in the state of passing or blocking light. By varying the scanning sequence of the light-emitting display module through the driving circuit of the circuit control module, and matching with the alternative switching of the light-passing modes of the two photo-masks, the viewers on both sides of the light-emitting display screen can see the correct picture.
Patent TW-591723-B (TW)
Title: Method for producing semiconductor device
Inventor: UEHARA MASAFUMI
IPC: H01L29/423
Filed: 2002-11-15
Granted: 2004-06-11
Abstract: Provided is a method for producing semiconductor device whereby the ion implanting process for adjusting the threshold voltage of a semiconductor device, which has gate insulation layers with different thickness, is rationalized. The ion implanting process for adjusting the threshold voltage comprises forming a first N type well region 2A in a P type semiconductor substrate; forming a second N type well region 2B under the forming region of gate insulation film of which film thickness is thin, the impurity concentration of region 2B is higher than that of the region 2A; forming a gate insulation film 10A, 12 having different film thickness on the N type well region 2A and N type well region 2B; implanting Boron ion into the N type well regions 2A, 2B according to the condition of penetrating the gate insulation films 10A, 12 with different thickness; and implanting boron ion into N type well region 2B according to the condition of penetrating the thinner gate insulation film 12, but not penetrate the thicker gate insulation film 10A.
Patent TW-I225746-B (TW)
Title: Device and control method allowing bluetooth earphone to freely switch signals
Inventor: JANG RU-RUNG
IPC: H04Q7/32
Filed: 2002-11-18
Granted: 2004-12-21
Abstract: The invention provides a device and control method allowing bluetooth earphone to freely switch signals, in which a control chip is installed in a bluetooth earphone and a hot keys unit is installed over one end of the control chip, while the other end is connected with a bluetooth module and a LED. When a user intends to switch or set up signals, the bluetooth earphone can be matched and connected with different bluetooth telephony voice system via the connection and operation of volume control up key, volume control down key and control chip. Alternatively, with the use of the connection and operation of the receive key of the hot keys and control chip, the user is allowed to quickly reconfigure the system. When there's an incoming call in the bluetooth telephony voice system, any press button of hot keys is used to receive the call, thereby ensuring a free call receiving function and further achieving the goal of simple and convenient operation as well as changing or switching signals of bluetooth telephony voice system at any time.
Patent TW-571440-B (TW)
Title: Semiconductor device and method for manufacturing the same
Inventor: KANEKO SATORU
IPC: H01L27/06
Filed: 2002-12-11
Granted: 2004-01-11
Abstract: This invention provides a semiconductor device suited for use in a charge pump device, to prevent the latch up from occurring and enable a large current operation. On a P-type single crystal silicon substrate 50, an N-type epitaxial silicon layer 51A and a N-Type epitaxial silicon layer 51B are deposited one over another, and a P-type well region 52C is provided in the N-type epitaxial silicon layer 51B. A P+ type buried layer 55 is provided to contact the bottom of the P type well region 52C, and an MOS transistor is provided in the P type well region 52C. The MOS transistor has a heavily doped drain N+O layer, and a lightly doped source layer N-S or/and lightly doped drain layer N-D which is/are diffused deeper than the heavily doped source layer N+S and the heavily doped drain layer N+D.
Patent TW-I237874-B (TW)
Title: Method of forming bit-line contact
Inventor: WU KUO-CHIEN
IPC: H01L21/8242
Filed: 2002-12-19
Granted: 2005-08-11
Abstract: A kind of method for forming bit line contact is provided in the present invention. At first, a semiconductor substrate is provided. On the semiconductor substrate, a transistor is provided, and the transistor has a gate and a source/drain region. Then, a dielectric layer, which has a contact-window exposing the surface of the source/drain region, is formed on the semiconductor substrate. A conductive plug is formed on the contact window, and then a metal layer is formed on the conductive plug surface. After that, an annealing process is conducted onto the metal layer to have reaction between the surfaces of the first metal layer and the conductive layer contact, so as to form a reaction layer. The first metal layer, which is not reacted, is removed; and a bit line is formed on the conductive plug that has reaction layer on its surface.
Patent TW-I279983-B (TW)
Title: Data interface circuit and data transmitting method
Inventor: FUJIMOTO TETSUROU
IPC: G06F3/00
Filed: 2003-01-17
Granted: 2007-04-21
Abstract: p-channel MOS transistors (1A, 1B) are turned on alternatively when a positive phase signal and an opposite phase signal each generated from a first voltage signal. Moreover, n-channel MOS transistors (4A, 4B) are turned on alternatively when a positive phase signal and an opposite phase signal each generated from a second voltage signal. When being turned on, the p-channel MOS transistors (1A, 1B) supply current to transmission lines (3A, 3B), respectively. When being turned on, the n-channel MOS transistors (4A, 4B) discharge current supplied from the transmission lines (3A, 3B) to a ground. A current/voltage conversion circuit (2) converts current passing through the transmission lines (3A, 3B) into a voltage signal. Another current/voltage conversion circuit (5) converts current passing through another transmission lines (3A, 3B) into a voltage signal.
Patent TW-I225251-B (TW)
Title: Disc-type optical recording medium and the method of regeneration limitation
Inventor: SABI YUICHI
IPC: G11B7/00
Filed: 2003-01-23
Granted: 2004-12-11
Abstract: The present invention provides a disc-type optical recording medium, which typically needs not to change the specification of the recording data for the disc-type optical recording medium handled by the current player, but limits the regeneration of CD driver attached on the computer to prevent the illegal copying. The present invention configures the limited reading areas composed of the special wiggling of the pit rows on the data tracks and the offset and deformed pit row; wherein, the limited reading areas are tracking by the tracking control of the optical pickup device during low-speed rotation of the disc-type optical recording medium to conduct the correct regeneration. However, during the high-speed rotation of the disc-type optical recording medium, it cannot be tracked by the tracking control of the optical pickup device for regeneration.
Patent TW-I286992-B (TW)
Title: Highly tunable CMOS compatible micro capacitor
Inventor: HUANG JUNG-TANG
IPC: H01G5/16
Filed: 2003-01-28
Granted: 2007-09-21
Abstract: This invention presents a highly tunable micro capacitor by using CMOS processes and extra post-process techniques of MEMS. Not only PN diode capacitors or MOS varactors are not expected to offer wide tuning range and large quality factor, the tunable range of prior MEM varactors are also limited by pull-in effect. This invention presents a novel structure of tunable capacitor that can control the gap of the parallel plates of varactor down to very small value, such that the varactor has a broad tuning range. The said capacitor employs layers of vias and metal used for interconnection in CMOS IC to construct its main structure. Then usage of the post-process of MEMS can etch away the sacrifice layers to obtain the final varactor. The invented highly tunable capacitor can replace the existing varactors and can also be applied to many kinds of circuits, especially the radio frequency communications.
Patent TW-I225687-B (TW)
Title: Self aligned method of forming a semiconductor memory array of floating gate memory cells with non-linear elongated floating gate, and a memory array made thereby
Inventor: KIANIAN SOHRAB
IPC: H01L33/00
Filed: 2003-03-17
Granted: 2004-12-21
Abstract: A method of forming an array of floating gate memory cells, and an array formed thereby, that includes source and drain regions formed in a substrate, and a conductive block of material disposed over the source region. The floating gate is formed as a thin, L-shaped layer of conductive material having a first portion disposed over the channel region and a second portion extending vertically along the conductive block. The control gate includes a first portion disposed adjacent to and insulated from a distal end of the floating gate first portion, and a second portion disposed adjacent to the channel region. A portion of the control gate could extend into a trench formed into the substrate, wherein the drain region is formed underneath the trench, and the channel region has a first portion extending along the trench sidewall and a second portion extending along the substrate surface.
Patent TW-I226404-B (TW)
Title: Round key and lock therefor
Inventor: PRUNBAUER KURT
IPC: E05B19/06
Filed: 2003-03-27
Granted: 2005-01-11
Abstract: The present invention relates to a round key and a lock therefor. The key (1) has a blade (3) formed with a part-cylindrical face, where at least a set of grooves including grooves (4, 5, 6) are provided on the curved surface. The set of grooves are composed of three grooves (4, 5, 6) positioned in parallel with the key-inserting direction and at least partly intersected with each other, with the depth of a groove (6) being longer than that of the other two grooves (4, 5) which are substantially parallel to each other. A cylindrical housing of the lock is provided with at least two different tumbler disks, one of which has a first pin projecting inwardly into a deep groove of the blade and the other has two pins projecting inwardly into two shallow grooves of the blade. The round lock is further provided with at least a brake (rod) which is allowed entering into a releasing position with the tumbler disks arriving at a position relative to a rotatable plug in the housing sleeve.
Patent TW-I291114-B (TW)
Title: Overlaying electronic ink
Inventor: GOUNARES ALEXANDER
IPC: G06F17/24
Filed: 2003-04-17
Granted: 2007-12-11
Abstract: Overlaying electronic ink over a document. A typical scenario may be where it would be useful to mark up a document with electronic ink, such as by making handwritten comments, drawings, and the like over the underlying document. In some embodiments, a developer may easily define an inking surface, such as a transparent or opaque window, over a document. The inking surface may act as an input interface such that a user may write onto the inking surface such that it appears that the document itself marked up.
Patent TW-I225199-B (TW)
Title: Hierarchical test methodology for multi-core chips
Inventor: PENDURKAR RAJESH Y
IPC: G11C29/32
Filed: 2003-07-03
Granted: 2004-12-11
Abstract: A multi-core chip (MCC) having a plurality of processor cores includes a hierarchical testing architecture compliant with the IEEE 1149.1 joint test action group (JTAG) standard that leverages existing standard testing architectures within each processor core to allow for chip level access to schedule built-in self test (BIST) operations for the cores. The MCC includes boundary scan logic, a chip-level JTAG-compliant test access port (TAP) controller, a chip-level master BIST controller, and a test pin interface. Each processor core includes a JTAG-compliant TAP controller and one or more BIST enabled memory arrays. The chip TAP controller includes one or more user defined registers, including a core select register and a test mode register. The core select register stores a plurality of core select bits that select corresponding processor cores for BIST operations.
Patent TW-I227480-B (TW)
Title: Magneto-optical recording medium
Inventor: MIKI TAKESHI
IPC: G11B11/105
Filed: 2003-07-04
Granted: 2005-02-01
Abstract: The present invention discloses a magneto-optical recording medium of domain wall motion detection type in the form of groove recording for recording a signal in a signal recording area within a groove formed along a recording track. The radius of curvature R1 of the shoulder portion, adjacent to a groove, of the land between grooves in the cross section taken perpendicularly to the recording track is 30 nm or less, and the radius of curvature R2 of the inner edge portion, adjacent to the land, of the groove where a signal is recorded in the cross section taken perpendicularly to the recording track is 20 nm or more. The recording power margin is increased, the jitter is improved, and the error rate is also improved.
Patent TW-I227350-B (TW)
Title: Active elements array structure
Inventor: CHANG TING-JUI
IPC: G02F1/1333
Filed: 2003-07-18
Granted: 2005-02-01
Abstract: An active elements array structure is provided. The active elements array structure comprises a base plate, and a plurality of gate lines, a plurality of data lines, a plurality of active elements, a plurality of storage capacitors and a plurality of pixel electrodes thereon. Each of the storage capacitor has an upper electrode, and the upper electrode has at least one aperture. There is an angle included by the direction of electric field that stride the aperture and the rubbing direction of optically self-compensated birefringence liquid crystal layer. When applying voltage on the optically self-compensated birefringence liquid crystal cell, the liquid crystal molecules adjacent to the apertures will be twisted and transform from splay state into bend state rapidly. After that, the spreading elastic force between liquid crystal molecules could shorten the time of transition of the liquid crystal molecules in all pixel regions. Therefore, the optically self-compensated birefringence liquid crystal display can be warmed up faster.
Patent TW-I238465-B (TW)
Title: Method of forming pattern and substrate processing apparatus
Inventor: HAYASAKI KEI
IPC: G03C5/00
Filed: 2003-07-23
Granted: 2005-08-21
Abstract: The invented method of forming pattern is featured with including the followings: the step of forming photosensitive resin film on the substrate; the step of conducting exposure onto the photosensitive resin film; the step of supplying the development solution for the photosensitive resin film to form pattern of photosensitive resin film; and the step of using activated water to contact the pattern so as to conduct the fine treatment of stripping the pattern surface layer.
Patent TW-I226098-B (TW)
Title: Multi-purpose stage in substrate inspection apparatus
Inventor: SIM JAE-SIN
IPC: H01L21/66
Filed: 2003-09-30
Granted: 2005-01-01
Abstract: Multi-purpose stage in a substrate inspection apparatus for holding, and inspecting a substrate for an external defect, including a rectangular frame, a plurality of position shifting devices on the frame, each for shifting a position thereof in correspondence to a size of the substrate to be inspected, and a holding device on each of the position shifting devices for holding or releasing a corner part of the substrate, thereby permitting to shift a position of a substrate holding device on the stage by means of simple system and operation, for stable holding of different sizes of substrates on one stage.