baber/WOPTO huggingface dataset:
Patent JP-H06294061-A (JP)
Title: Fibrous molded body
Inventor: YAMAGUCHI MICHIMASA
IPC: D04H1/58
Filed: 1993-08-19
Abstract: PURPOSE:To enhance the soundproofing, vibration-damping and cushioning properties and air permeability of a fibrous molded body, facilitate the molding operation in a form in close contact with an uneven shape such as a car body panel at a desired density, stabilize and homogenize the density of a porous layer in moldings and improve the shape dimensional accuracy of the moldings. CONSTITUTION:Staple fiber having <=30 denier median of the fiber diameter distribution is used as a material and formed into a fiber assembly having 0.04-0.15g/cm<3> average apparent density by a filling method for blowing the staple fiber together with air into a mold and, as necessary, a sheetlike sound insulating layer having 1.0-8.0kg/m<2> weight per unit area is then laminated to the fiber assembly.
Patent JP-H0758855-A (JP)
Title: Voice storage device
Inventor: SATO MITSUNOBU
IPC: H04Q3/58
Filed: 1993-08-20
Abstract: PURPOSE:To obtain a voice storage device recording automatically talking of a trunk line without revision in an existing telephone exchange installation. CONSTITUTION:The voice storage device 7 provided with a voice storage reproduction control section 8 controlling storage and reproduction of a voice received from a telephone line is provided with an incoming call detection means 10 detecting an incoming call from a trunk line 2, a reply detection means 11 detecting a reply to the incoming call, and a speech hearing means 13 extracting talking on the trunk line. The voice storage reproduction control means 8 uses a taking hearing means 13 to extract the talking content of the trunk line 2 connecting to a telephone exchange installation 1 based on a detection signal of each detection means and stores it automatically. Since the talking content of the trunk line 2 connecting to the telephone exchange installation 1 is heard and recorded automatically by the voice storage device 7 directly, a problem of interfacing with the telephone exchange installation 1 is not caused.
Patent JP-H0595942-A (JP)
Title: Bed for medical diagnostic apparatus
Inventor: TATSUZAKI HISASHI
IPC: A61B5/055
Filed: 1991-09-06
Abstract: PURPOSE:To provide a bed for a medical diagnostic apparatus which allows the placing of an object to be inspected on a top board easily and safely to reduce physical burden and pains of the object to be inspected and burden of workers in the work of placing the object to be inspected. CONSTITUTION:In a bed 1 for a medical diagnostic apparatus having a top board 3 where an object to be inspected on the top thereof, a linear guide 5 is provided to drive the top board 3 in the direction vertical to the length of the top board 3.
Patent JP-S61109614-A (JP)
Title: Wire cut discharge machining unit
Inventor: YOKOMICHI SHIGEJI
IPC: B23H7/02
Filed: 1984-10-30
Abstract: PURPOSE:To enhance both efficiency and accuracy of electric discharge machining by forcing the weight of an elevator member holding a nozzle 17 to continue contact with the upper face of a workpiece by means of said nozzle so as to get the supply of electrolytic liquid concentrated in an area subjected to electric discharge. CONSTITUTION:A nozzle 17 touches the upper face of a workpiece W at a low speed, subsequently a disk body 27 continues its descent by an offset distance before it stops. The bottom face of the nozzle 17 makes tight contact on the workpiece W constantly by means of the total weight consisting of those of the nozzle 17, a nozzle base 39, an arm part 37, an elevator 11, a horizontal arm 53, a scale 55 and so on. In addition, the nozzle 17 can move up and down while keeping the state of light contact with the workpiece W regardless of any curve formed on its upper face. Therefore, the supply of electrolytic liquid can always be connected in an area subjected to machining process.
Patent JP-S59119607-A (JP)
Inventor: KOBAYASHI SHINICHI
IPC: F21S2/00
Filed: 1982-12-27
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H07210697-A (JP)
Title: Method and apparatus for generation of subpixel mask of computer graphics system
Inventor: CHIYOU SHIYUNKOU
IPC: G06T3/40
Filed: 1994-09-21
Abstract: PURPOSE: To provide a method and a device for generating a subpixel mask. CONSTITUTION: This method is provided with a stage for directly generating the subpixel mask of a polygon edge through arithmetic, without using look-up tables and forming a sub-block by dividing the pixel into (n) pieces of sub-blocks according to gradient, stage for calculating a sub-block coverage 22 as a distance from the border lines of pixels and the intersections of (n) pieces of sub- blocks and the polygon edge, and stage for generating (n)×(n) pieces of subpixel masks through the calculated sub-block coverage 22. Thus, aliasing generated from the edge can be removed.
Patent JP-S61105118-A (JP)
Title: Josephson logic circuit
Inventor: OHORI TATSUYA
IPC: H03K19/195
Filed: 1984-10-29
Abstract: PURPOSE:To attain level-up of an effective transfer current fed to an element of the next stage by connecting magnetic field coupling terminals in series and current injection terminals in parallel when a logic circuit of the pre-stage is connected to plural logic circuits of the next stage in a current injection type Josephson logic circuit having both the magnetic field coupling terminals and the current injection terminals. CONSTITUTION:When a current is applied to an input terminal T, a current is fed to each magnetic field coupling line of logic circuits 1, 2 and a current is fed to each current injection terminal, then the logic circuits 1 and 2 are switched and an output current appears output terminals 1-5 and 2-5. In this case, the same current as the current fed to the input terminal T is fed to the magnetic field coupling line of each logic circuit and a current deviced by the ratio of a resistor R11 to a resistor R21 is fed to each current injection terminal. Thus, when any logic circuit is added in addition to the logic circuits 1 and 2, the current the same as the current fed to the input terminal T is fed to the magnetic coupling terminal of each logic circuit independently of the number of logic circuits by adopting the similar circuit constitution.
Patent JP-S6471982-A (JP)
Title: Folding door device
Inventor: TAKAHASHI RYOICHI
IPC: E05D15/26
Filed: 1987-09-10
Abstract: PURPOSE: To permit a full open state for frontage in a position of door folding by separating a runner member from a rail member and turning outward and guiding the whole of the folding door to a storage position almost in parallel to the frontage. CONSTITUTION: A runner member 5 is attached to an outer style side of the folding door constituted by coupling the inner style side of two doors 1, 2 to the runner member 5, and the door is run inside the rail member 4 and the folding door is opened or closed. And at the closed position, each door 1, 2 is connected in series along the rail member 4. Also at the folded position, the inner style side as hinge 3 coupling portion is projected out from the rail member 4, the runner member 5 is separated from the rail member 4 and turned outwardly, and the whole of the folding door is shifted to a storing position parallel to the frontage. In this way, occupying part of the frontage by the folded folding door can be avoided.
Patent JP-H1156260-A (JP)
Title: Production of jerky for pet
Inventor: YAMANOUE SHIGEHARU
IPC: A23K1/10
Filed: 1997-08-08
Abstract: PROBLEM TO BE SOLVED: To provide a method for producing a jerky for pets, excellent in nutrient balance compared to conventional ones and suitable to pets' linking. SOLUTION: This method for producing a jerky for pets comprises as follows: meat is incorporated with 10-40 wt.% of wheat flour and necessary stock(s) such as a seasoning followed by kneading to prepare a dough with the water content adjusted to 25-35 wt.%, which, in turn, is calendered, molded, and steamed, and the water content of the final product is ensured to stand at 15-25 wt.%.
Patent JP-H0276036-A (JP)
Title: Information processor
Inventor: KUSHITANI KAZUHIRO
IPC: G06F9/48
Filed: 1988-09-13
Abstract: PURPOSE:To execute the execution processing of an arbitrary program without using an external equipment and initializing an information processor by setting the program to be executed and processed in advance and executing the set program by interruption processing. CONSTITUTION:A code showing a test program, which is executed and processed in an MPU1, it set to a DIP switch 7 and the interruption processing is requested to the MPU1. Namely, when a switch 13 is in a turning-on condition and the interruption processing is commanded, an interruption requesting signal is generated and set to an F/F circuit 15. The interruption requesting signal to be set to the F/F circuit 15 is given through an INT line 17 to the MPU1. When the MPU1 receives the interruption request, the interrupting processing program is read from a memory 3 and executed by the MPU1. Thus, the arbitrary program can be executed and processed without using the external equipment and initializing the information processor.
Patent JP-H0566168-A (JP)
Title: Displacement converter
Inventor: YAMAMOTO TOSHIHIRO
IPC: G01L13/06
Filed: 1991-09-09
Abstract: PURPOSE:To improve the incapability of a displacement converter to perform highly accurate measurements due to the intervention of capacitance discharge time into measurements of time TA, TB and the nonsynchronicity of the measurements of TA, TB, the displacement converter detecting the micro displacement of a diaphragm due to pressure differential as the differential change of capacitance CA, CB between the diaphragm and a fixed electrode through the charge and discharge of CA, CB and measurements of the time TA, TB proportional to the CA, CB. CONSTITUTION:Charging of sensor capacitors CA, CB up to a predetermined voltage is detected by respective inverters 11, 12 and an RSF-F 15 is set and reset by monostable multivibrators 13, 14 and the discharge transistors 18, 19 of the CA, CB are turned on and off in response to the outputs of the F-F and thereby oscillation in which the charge time TA, TB of the CA, CB are alternately continued to each other is achieved and (TA-TB) and (TA+TB) are found simultaneously during the oscillation by an up-down counter and an up counter in a time measuring and arithmetic circuit 2A, respectively, so as to compute differential changes.
Patent JP-H0567964-A (JP)
Title: Complementary mos logic circuit
Inventor: YAMAZAKI SHIGENORI
IPC: H03K17/16
Filed: 1991-09-09
Abstract: PURPOSE:To reduce a through-current without losing the drive capability. CONSTITUTION:When an input level at an input terminal 52 is set to an H level and a level of an input signal 101 at an input terminal 51 changes from an L level to an H level, a charge of a gate capacitor 11 of an N-channel MOS transistor(TR) 9 is discharged via a series ON resistance of N-channel MOS TRs 4,5, a node B changes to an L level. A charge in a gate capacitor 10 of a P-channel MOS TR 8 is discharged through a series ON resistance of the N-channel MOS TRs 4, 5 and a resistor 6, a level of a node A changes to an L level. In this case, the P-channel MOS TR 8 changes from the interrupting state into the conductive state and the N-channel MOS TR 9 changes from the conductive state into the interrupting state. This is similar to the case when the level changes in the opposite direction.
Patent JP-2000052521-A (JP)
Title: Metal vapor deposition polyester film
Inventor: UCHIUMI SHIGEO
IPC: B29L9/00
Filed: 1998-08-12
Abstract: PROBLEM TO BE SOLVED: To provide a vapor deposition film excellent in the adhesion of a vapor deposition layer preventing stickiness and having hot water resistance or the like. SOLUTION: A coating layer containing at least a polyurethane resin or a polyester resin is provided on the single surface of a coextrusion biaxially oriented laminated polyester film consisting of at least two layers and the surface center line average roughness [Ra (μm)] of the coating layer satisfies 0.020<Ra<0.040 and the haze [H (%)] of the whole of the film satisfies 1.0<H<2.0.
Patent JP-S59124662-A (JP)
Inventor: IKEDA HIDEO
IPC: B66B3/00
Filed: 1982-12-28
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S59120506-A (JP)
Title: Car height adjustment device
Inventor: EMURA JIYUNICHI
IPC: B60G17/052
Filed: 1982-12-27
Abstract: PURPOSE:To reduce time for leveling by providing the captioned device with front and rear side air suspensions and supplying and discharging compressed air for the suspensions correspondingly to leveling up and down of car height. CONSTITUTION:Detection signals from can height detection sensors 15, 16 on the front and the rear sides are inputted to a controller 17. The controller 17 judges on whether a car height up and car height down are necessary or not on the basis of signals from car height sensors 15, 16, for example, in case of car height up of only air suspensions 1, 1' of the front side, a solenoid valve 19 is closed, while an air supply valve 6, cut valve 9 and an exhaust valve 23 are opened to supply compressed air of an air tank 4 to the air suspensions 1, 1'. At the same time, the air is directly supplied from a compressor 3 to said suspensions 1, 1' through a roundabout passage 21. An exhaust system is driven for a car height down. Similar method is taken for the rear side air suspensions. Adjustment time is thus reduced.
Patent JP-S59125374-A (JP)
Inventor: YAMAMOTO GOROU
IPC: F26B15/12
Filed: 1982-12-30
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H03206473-A (JP)
Title: Image forming device
Inventor: TAJIMA HATSUO
IPC: G03G15/06
Filed: 1990-08-31
Abstract: PURPOSE:To prevent irregularity in an image and color mixture in a superposing development by adjusting the duty and the peak value of a bias voltage in a 1st developing device and a 2nd developing device at every developing device. CONSTITUTION:Since the voltage in a direction where developer is moved from developer carriers 13-16 to an image carrier 1 is impressed in the 2nd developing device 6 higher than the 1st developing device 5, development is surely executed even when the layer thickness of a multilayer developer layer formed by moving the developer on the image carrier 1 is thick. Then, the voltage in the direction where the developer is moved from the image carrier 1 to the developer carrier 14 is impressed in the 2nd developing device 6 lower than the 1st developing device 5, so that the developer which forms the multilayer developer layer is prevented from being restored to the developer carrier side again. Since the voltage is impressed relatively long in comparison with the 1st developing device 5, fogging caused by the 2nd developing device 6 is prevented. Thus, the irregularity in the image and the color mixture in the superposing development are prevented.
Patent JP-H0761655-A (JP)
Title: Printing device
Inventor: KONO NOBUO
IPC: B65H9/08
Filed: 1993-08-21
Abstract: PURPOSE:To provide a printing device capable of easily discharging a printing medium positioned and held at a specified position on a conveyance table with simple constitution. CONSTITUTION:A lever 82 holding a card 37 on a conveyance table 33 is turned in the direction in which a holding condition on the table is released, by a lever releasing shaft 59 so as to discharge the card 37 released to a free condition, by a roller 52. Thus, a printing device capable of easily discharging the card 37 on the conveyance table 33 with simple constitution can be realized.
Patent JP-2000051888-A (JP)
Title: Water treatment apparatus and method
Inventor: SUMI AKIHIKO
IPC: C02F3/28
Filed: 1998-08-12
Abstract: PROBLEM TO BE SOLVED: To provide the subject apparatus and method capable of compactly forming the whole of an apparatus containing a reaction tank while keeping high treatment capacity. SOLUTION: A water treatment apparatus is equipped with a reaction tank 1 having a discharge part 6 packed with bacteria granules reacting with introduced raw water to form treated water and discharging the bacteria granules and treated water and a separation tank 7 receiving the bacteria granules and treated water discharged from the reaction tank 1 to separate them and a separator 12 of which the lower part is opened separating the bacteria granules into floatable granules and sedimentary granules is provided in the separation tank 7 and a movement preventing means capable of preventing the floatable granules among the bacteria granules introduced into the separator 12 from moving to the outside from the lower opening part of the separator 12 is provided.
Patent JP-S61105919-A (JP)
Title: Limiter circuit
Inventor: SEGAMI KOICHI
IPC: H03G11/00
Filed: 1984-10-30
Abstract: PURPOSE:To decrease the fluctuation of an output phase due to the fluctuation of input amplitude without losing limiter effect by providing a capacitor in parallel with an input side of an amplifier circuit of a limiter circuit comprising the amplifier circuit in which a negative feedback via a resistor is applied. CONSTITUTION:Capacitors cf16, 17 are inserted respectively in parallel with the differential input side of a differential amplifier circuit in the limiter circuit. The quantity of phase fluctuation DELTAtheta is adjusted by any of the feedback resistor Rf or the capacitors Co, Cf. While the value of the feedback resistor Rf is set to a proper value without giving adverse effect on other characteristic, the capacitors Co, Cf suppress the quantity of phase fluctuation DELTAtheta to a small value. Thus, the fluctuation of the output phase due to the fluctuation of the input amplitude is suppressed to a small value without losing the limiter effect.
Patent JP-S61106452-A (JP)
Inventor: SUMIYA KENICHI
IPC: C04B33/132
Filed: 1984-10-29
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H1074833-A (JP)
Title: Formation of contact
Inventor: KIMURA TADAYUKI
IPC: H01L21/768
Filed: 1996-08-29
Abstract: PROBLEM TO BE SOLVED: To provide a method for forming a highly reliable contact conducting between the diffusion layer and the interconnection layer formed on a substrate. SOLUTION: An insulation film 16 is deposited on a silicon substrate 14, having a heavily doped diffusion region 12. A contact hole 18 is then opened, by high density plasma etching, to expose the diffusion region through the insulation film 16. Polysilicon 32 is then deposited entirely over the substrate 14, including the bottom face and the side face of the contact hole 18. Subsequently the polysilicon 32 is removed by anisotropic etching, from the bottom face of the contact hole 18 and the surface of the substrate, except the side face of the contact hole 18. Finally, the substrate 14 is subjected to light etching of CDE(chemical dry etching), and the damaged region is removed from the bottom face of the contact hole 18 along with the polysilicon 32 from the side face thereof.
Patent JP-H0675012-A (JP)
Title: Method and system for circuit failure simulation test
Inventor: MATSUNAGA KOSUKE
IPC: G06F17/50
Filed: 1992-08-27
Abstract: PURPOSE:To enhance failure detection accuracy of logic gate including a memory element while simplifying evaluation of detected failure by storing failure mode information being held in the memory element of a semiconductor device to be tested based on set failure information. CONSTITUTION:Failure mode of a semiconductor device 12 to be tested is defined previously and then failure information mfSa0, mfSa1, qfSa0, qfSa1, fSa0, fSa1 representative of failure propagation is set. A test data DT is then fed to the signal input part IN of the semiconductor device 12. Failure information fSa0, fSa1 relevant to failure propagation at logic gates LG1, LG2, LGi...LGn being written based on the test data DT and failure mode information Sa0, Sa1 being held in a memory element MEM are then subjected to computational operation and stored. Subsequently, detection processing of failure information fSa0, fSa1 or failure mode information Sa0, Sa1 is performed from signal output part OUT toward signal input part IN of the semiconductor device 12 to be tested.
Patent JP-S60120476-A (JP)
Title: Picture processor
Inventor: KUDOU TOUICHI
IPC: G06T1/00
Filed: 1983-12-05
Abstract: PURPOSE:To prevent erroneous correction with a picture processor using an one- dimensional image sensor, by using a determined image forming address and previsously fixed reference address. CONSTITUTION:A latch circuit 43 which acts as an image forming address determining means latches a reading out address RE latched at the latch circuit 33 of an address with calculating circuit 28 by an OK signal (e) as the image forming address X indicating the image forming position of the shadow SH of a sealing line SL at the one-dimensional image sensor of a camera 7, only when the OK signal (e) is outputted from a deciding circuit 42. A deflection calculating circuit 44 finds the deflection DELTAX between the image forming address X latched at the latch circuit 43 and a reference address Xr previously written in a data register 45 and, at the same time, outputs numerical data KDELTAX which is obtained by multipying the found deflection DELTAX by K (constant) to a controller 46 which drives a pulse motor 5.
Patent JP-S60119902-A (JP)
Inventor: CHIN NORIYOSHI
IPC: A45B25/08
Filed: 1983-12-05
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0933469-A (JP)
Title: Method and apparatus for monitoring composition of medical solution
Inventor: HASE USHIO
IPC: G01N27/06
Filed: 1995-07-20
Abstract: PROBLEM TO BE SOLVED: To accurately detect concentration of peroxide hydrogen and ammonium of a medical solution composing peroxide hydrogen, ammonium and water, and prevent a detecting cell from being damaged. SOLUTION: Valves 5, 6, 7 are turned to a state indicated by a broken line and a valve 8 is set in a state of a solid line. The interior of loops 11-14, 23, 24 is filled with deionized water. The valve 5 is switched to a state of the solid line and a medical solution is filled in the loop 11. Then, the valve 6 is switched to a state of the solid line and the deionized water and medical solution are circulated in the loops 11-14 to obtain a diluted solution. The valve 7 is changed to a state of the solid line. The diluted solution filled in the loop 14 is further diluted with the ionized water and passed through a measuring part 21. A conductivity dependent on concentrations of peroxide hydrogen and ammonium is measured. The valve 7 is changed to the state of the broken line, thereby to fill the loop 14 with the diluted solution.  The valve 8 is changed to the state of the broken line and the loops 23, 24 are filled with boric acid solution. The valves 7 and 8 are switched to the state of the solid line, and the conductivity dependent only on a concentration of ammonium is measured.