baber/WOPTO huggingface dataset:
Patent TW-429593-B (TW)
Title: Semiconductor device and fabrication method
Inventor: IMAI KIYOTAKA
IPC: H01L27/12
Filed: 1999-04-13
Granted: 2001-04-11
Abstract: The invention provides a semiconductor device that has a fully depleted MOSFET and a partially depleted MOSFET having excellent characteristics on the same substrate without effecting control by means of the impurity concentration of the channel region. In Fig. 2E, semiconductor device 10 is provided with fully-depleted SOI MOSFET 12 and partially-depleted SOI MOSFET 14 on the same SOI I substrate through isolation by element isolation film 4. SOI substrate includes buried oxide film 2 and SOI layer 3 provided in succession on silicon substrate 1. Film thickness TOX1 of gate oxide film 5 is 8 nm, film thickness TSOI1 of SOI layer 3 is 56 nm, and boron concentration NA1 of the channel region is 3iD10<SP>17</SP> cm<SP>-3</SP> in fully-depleted SOI MOSFET 12. In contrast, film thickness TOX2 of gate oxide film 5 is 12 nm, film thickness TSOI2 of SOI layer 3 is 59 nm, film thickness NA2 of the channel region is 5iD10<SP>17</SP> cm<SP>-3</SP> in partially-depleted SOI MOSFET 14.
Patent TW-510082-B (TW)
Title: Dynamic CMOS register with a self-tracking clock
Inventor: HUANG EDDY
IPC: G11C7/22
Filed: 1999-04-30
Granted: 2002-11-11
Abstract: A dynamic CMOS register implemented on a silicon die that requires the use of only two input signals, a data-in signal and an inverse clock signal. Each embodiment includes a self-timed clock circuit having a CMOS PNN tier of FETs with a P channel and two N channels connected serially (sources of P channel at one end connected to bus and N channel at the other end connected to ground, and gate of end N channel connected to bus), a first inverter to receive inverse clock with output connected to gate of P channel, a second inverter connected to drain of P channel, and a NOR gate with one input receiving inverse clock, second input connected to output of second inverter and output connected to gate of center N channel. In one embodiment, a single self-timed clock circuit interfaces with and controls a plurality of CMOS registers. In each of two other embodiments, the self-timed clock circuit interfaces with one or two additional CMOS PNN tiers of FETs with a P channel and two N channels connected serially and an output latch forming a CMOS register that operates in a precharge phase and an evaluation phase.
Patent TW-412906-B (TW)
Title: Improved video processing device for dim images
Inventor: JU LIANG-CHIAN
IPC: H04N5/238
Filed: 1999-06-11
Granted: 2000-11-21
Abstract: A video processing device for dim image comprises a limiting circuit, a threshold-detection and comparison circuit, a full screen video brightness-averaging circuit, an aperture control circuit, a video accumulated-time control circuit and a gain control circuit. The limiting circuit can clamp the highly bright objects to a fixed voltage. Through the threshold-detection and comparison circuit, a full screen video brightness-averaging circuit can be used to generate the automatic brightness control signal without the excessive influence of the highly bright objects, thereby allowing the aperture control circuit, the video accumulated-time control circuit and the gain control circuit to attain the goal of automatic brightness control.
Patent TW-474042-B (TW)
Title: Electronic machine, control method of electronic machine, method for deducing the capacity of the secondary battery and method for control charging of the secondary battery
Inventor: HONDA KATSUYUKI
IPC: G01R31/36
Filed: 1999-06-25
Granted: 2002-01-21
Abstract: The electronic machine composed of the first machine and the second machine is featured with the followings. For the first machine and the second machine, through the use of electromagnetic coupling and the electromagnetic induction, the second machine side is charged from the first machine side. In addition, when signal transmission is conducted between the first machine and the second machine, the transmission of signals starts after charging is conducted at the predetermined period. Additionally, a transistor which is disposed at the position opposite to the electromagnetic coil of the electronic clock is switched by using the station side electromagnetic coil to be pulled-up by the power source voltage. The receiving circuit receives the detected result of current that flows through the magnetic coil of the electronic watch. The related positions for the electromagnetic coil of the electronic watch and the electromagnetic coil of the charge station side are detected. Charging and transmission converters convert the execution ratio of charging and data transmission in response to the detection results. Among the separated more than 2 machines, when charging and data transmission are desired to perform, through the electromagnetic coupling or the electromagnetic induction of the electromagnetic coils disposed respectively at the opposite positions, charging and data transmission are controlled in response to the position deviation of both coils. Furthermore, the voltage value of the secondary battery during the charging when the secondary battery is charged intermittently, and the secondary battery voltage value after charging is terminated and a certain time is passed are detected by the battery voltage detecting circuit to obtain the voltage raising quantity, which is then converted into the battery capacity by referencing the conversion table. Or, the secondary battery voltage value after charging is terminated and a certain time is passed, and the voltage difference value before the charging starts are obtained to have the voltage decreasing quantity, which is converted into the battery capacity by referencing the conversion table. Thus, the charged capacity of the secondary battery can be deduced by simple composition.
Patent TW-407125-B (TW)
Title: Pallet assembly
Inventor: APPS WILLIAM P
IPC: B65D19/00
Filed: 1999-06-30
Granted: 2000-10-01
Abstract: A pallet assembly includes a top deck formed of plastic which has a first opposing surface having a plurality of first flanged portions projecting downwardly therefrom. The top deck has a substantially planar upper surface upon which a plurality of objects are capable of resting. The pallet assembly also includes a bottom deck which is also formed of plastic and has a second opposing surface with a plurality of second flanged portions projecting therefrom in an upward direction. The plurality of second flanged portions correspond to and securely mate with the plurality of flanged portions to define a plurality of columns between the top deck and bottom decks, said columns having box beam cross-section for providing strength to the pallet assembly. The top deck includes a top member and a mid-top member, and the bottom deck includes a bottom member and a mid-bottom member.
Patent TW-484332-B (TW)
Title: A method for extending the range of a wireless communication system
Inventor: JIANG FRANCES
IPC: H04B7/02
Filed: 1999-07-06
Granted: 2002-04-21
Abstract: The present invention is a method for extending a cell radius or access range of a base station without incurring ASIC correlator re-design. This is accomplished using a modified timing protocol that will cause signals transmitted by mobile-telephones positioned beyond the limitations of the ASIC correlator bit limitation to be received within a search window so the signals may be detected and demodulated. In one embodiment, the modified timing protocol incorporates a timing advance technique in which the base station transmits its signals at an advanced time before frame boundaries such that signals transmitted by out-of-range mobile-telephones can be received within a search window beginning at a frame boundary and spanning a time interval corresponding to the ASIC correlator bit limitation. In another embodiment, the modified timing protocol incorporates a shifted search window that begins at an advanced time after a frame boundary and spans a time interval corresponding to the ASIC correlator bit limitation.
Patent TW-437203-B (TW)
Title: System and method for facilitating recovery from communication link failures in a digital data network
Inventor: CALLON ROSS W
IPC: G06F11/14
Filed: 1999-07-07
Granted: 2001-05-28
Abstract: A network comprises a plurality of switching nodes interconnected by communication links for transferring digital packets. At least one switching node in the network pre-establishes a bypass virtual circuit through the network to bypass an element of the network, such as a switching node or a communication link, in the network. The bypass virtual circuit defines a path to another switching node in the network. The first switching node uses the bypass virtual circuit so constructed in forwarding of a packet in the event of a failure or other malfunction of the element if the first switching node would otherwise transfer the packet over that element.
Patent TW-525241-B (TW)
Title: Method and apparatus for reuse of abrasive fluid used in the manufacture of semiconductors
Inventor: OSHIDA YU
IPC: B24B55/12
Filed: 1999-07-08
Granted: 2003-03-21
Abstract: An apparatus and method recycles the abrasive fluid of slurry effluent used in the polishing step in the manufacture of semiconductors. Agglomerations of abrasive grains built up in the slurry effluent are crushed using a mill, ultrasonic oscillation, or pressurized circulation. The slurry effluent is then regenerated and reused.
Patent TW-I239868-B (TW)
Title: Coated catalysts for the catalytic gas-phase oxidation of aromatic hydrocarbons
Inventor: HEIDEMANN THOMAS
IPC: B01J23/22
Filed: 1999-08-27
Granted: 2005-09-21
Abstract: A coated catalyst for the catalytic gas-phase oxidation of aromatic hydrocarbons comprises, on an inert nonporous support, a catalytically active composition comprising a defined amount of vanadium oxide, titanium dioxide, a cesium compound, a phosphorus compound, and antimony oxide, wherein the catalytically active composition is applied in two or more layers and where relative to the inner layer or inner layers the outer layer has an antimony oxide content which is from 50 to 100% lower and wherein the amount of catalytically active composition of the inner layer or layers is from 10 to 90% by weight of the amount of catalytically active composition, and can be used for preparing carboxylic acids and/or anhydrides, in particular phthalic anhydride; also specified is a production process for such catalysts.
Patent TW-447183-B (TW)
Title: Light emitting devices having wafer bonded aluminum gallium indium nitride structures and mirror stacks
Inventor: CARTER COMAN CARRIE
IPC: H01S5/183
Filed: 1999-08-31
Granted: 2001-07-21
Abstract: Light emitting devices having a vertical optical path, e.g. a vertical cavity surface emitting laser or a resonant cavity light emitting or detecting device, having high quality mirrors may be achieved using wafer bonding or metallic soldering techniques. The light emitting region interposes one or two reflector stacks containing dielectric distributed Bragg reflectors (DBRs). The dielectric DBRs may be deposited or attached to the light emitting device. A host substrate of GaP, GaAs, InP, or Si is attached to one of the dielectric DBRs. Electrical contacts are added to the light emitting device.
Patent TW-475957-B (TW)
Title: Viscosity system vibration-damping wall mounting structure and mounting method thereof
Inventor: ISODA KAZUHIKO
IPC: E04B1/98
Filed: 1999-09-01
Granted: 2002-02-11
Abstract: In a structure for installing a viscous vibration-damping wall 1, the viscous vibration-damping wall 1 is constructed such that a housing 20 with its upper end open is formed by uprightly setting a pair of steel-made side plates on a base plate 8 and by disposing a pair of flange plates 11 on both sides of the pair of side plates, an intermediate plate 14 is inserted in said housing, and a viscous material is placed in its gap portion. The viscous vibration-damping wall 1 is connected to base-plate connecting hole portions 9 and a pair of flange-connecting gusset plates 7 of a rising metal plate 6 fixed on a lower-floor girder 3, and the intermediate plate 14 is directly connected to a gusset plate 13 fixed to an upper-floor girder 4.
Patent TW-482794-B (TW)
Title: Organic polymer/inorganic fine particle-dispersed aqueous solution and complex having excellent stability and transparency, production process thereof, and chemicals for paper making and ink-jet recording sheet
Inventor: TAKAKI TOSHIHIKO
IPC: C08J3/00
Filed: 1999-11-11
Granted: 2002-04-11
Abstract: An organic polymer/inorganic fine particle-dispersed aqueous solution having excellent dispersion stabillty comprising a water-slightly soluble inorganic fine particle (B) having a particle diameter of 500 nm or less obtained by reacting (a) a compound of a second group element in the periodic table with (b) at least one compound selected from organic acids, inorganic acids and salts thereof in the presence of a water-soluble or water-dispersible synthetic high molecular compound (A) having a carboxyl group in a proportion of (A):(B)=10:90 to 99.99:0.01 (weight ratio). The above dispersed aqueous solution can be used as a paper-making chemical, an ink jet recording chemical, medical materials and cosmetic raw materials.
Patent TW-447014-B (TW)
Title: High temperature chemical vapor deposition chamber
Inventor: UMOTOY SALVADOR P
IPC: C23C16/509
Filed: 1999-11-24
Granted: 2001-07-21
Abstract: An apparatus for wafer processing, which comprises a chamber body and a heated liner which are thermally isolated from each other by isolating pins. During wafer processing, e.g., deposition of titanium nitride film by thermal reaction between titanium tetrachloride and ammonia, a wafer substrate is heated to a reaction temperature in the range of 600-700 DEG C by a heated support pedestal. The chamber liner and the interior chamber walls are maintained at a temperature between 150-250 DEG C to prevent deposition of undesirable by-products inside the chamber. This facilitates the chamber cleaning procedure, which can be performed using an in-situ chlorine-based process. The excellent thermal isolation between the heated liner and the chamber body allows the chamber exterior to be maintained at a safe operating temperature of 60-65 DEG C. A heated exhaust assembly is also used in conjunction with the process chamber to remove exhaust gases and reaction by-products. External heaters are used to maintain the exhaust assembly at a temperature of about 150-200 DEG C to minimize undesirable deposits on the interior surfaces of the exhaust assembly.
Patent TW-516013-B (TW)
Title: Driving method and device of plasma display panel
Inventor: TSAI CHUNG-KUANG
IPC: G09G3/28
Filed: 2000-01-11
Granted: 2003-01-01
Abstract: There is provided a driving method of plasma display panel. At a first time period of reset period, a total write pulse is sent to between a sustain electrode X and a scan electrode Yi. By the discharge between the sustain electrode X and the scan electrode Yi, wall charges are generated in each unit of the plasma display panel. The total write pulse rises from a first voltage to a second voltage by a larger sloped waveform, and from a second voltage to a third voltage by a smaller sloped waveform. The part of voltage increased by the larger sloped waveform can greatly accumulate wall charges, and the part of voltage increased by the smaller sloped waveform can prevent the display quality from being influenced by over brightness.
Patent TW-446669-B (TW)
Title: Container box
Inventor: TAMAYA SHINTARO
IPC: B65D5/44
Filed: 2000-06-02
Granted: 2001-07-21
Abstract: In a container box 1, a reinforcing board 20 inserted along with an inner surface of a box body 10, which consists of a column forming portion 21 which forms a reinforcing column 2 in cooperation with a side board 12 at a corner of said box body 10, and a connecting portion 22 which connects adjacent column forming portions 21.
Patent TW-463467-B (TW)
Title: Inspection method and apparatus for encoding rate
Inventor: KAKEMIZU TAKASHI
IPC: H04N19/68
Filed: 2000-06-27
Granted: 2001-11-11
Abstract: The invention targets at the reduction of digital noise generated upon altering synchronous signal. During the first convolutional decoding step ST11, use its frequency and the clock signal corresponding to encoding rate ri to decode the received encoding signal. Subsequently, during the first synchronous judging step ST12, determine if the decoding signal is synchronous and determine the asynchronous occasion. During the first clock signal update step ST13, set up its frequency and clock signal corresponding to encoding rate ri+1. Next during the upper limit determination step of encoding rate ST14, if the encoding rate ri+1 equals to the maximum value rk, use the clock signal already set up to decode the encoding signal in the second convolutional decoding step ST15. Again during the second synchronous determination step ST16, determine if the encoding signal is synchronous and determine the asynchronous occasion, and during the second clock signal update step ST17, set up its frequency and clock signal corresponding to encoding rate ri-1.
Patent TW-449902-B (TW)
Title: An improved ESD protection device
Inventor: LI SHU-JIUAN
IPC: H01L23/60
Filed: 2000-07-11
Granted: 2001-08-11
Abstract: An improved ESD protection device coupled to a semiconductor IC chip, said improved ESD protection device comprising first and second N-well regions in a P-substrate of the IC chip, a first N<SP>+</SP> doped region within the first N-well, a first P<SP>+</SP> doped region within the first N-well and spaced apart from the first N<SP>+</SP> doped region, a second N<SP>+</SP> doped region within the P-substrate, a third and a fourth N<SP>+</SP> doped regions positioned at least in part within the second N-well, a second P<SP>+</SP> doped region within the substrate, and a gate region on the surface of the substrate and between the second and third N<SP>+</SP> doped regions wherein a silicide layer are deposited on first, second, third, and fourth N<SP>+</SP> doped regions and on first and second P<SP>+</SP> doped region, the first and fourth N<SP>+</SP> doped regions and the first P<SP>+</SP> doped region being coupled together and to a connecting pad of the IC chip, the second N<SP>+</SP> doped region and the gate region being coupled together and to a ground terminal, and the second P<SP>+</SP> doped region being coupled to the ground terminal.
Patent TW-546789-B (TW)
Title: Dual-chip structure without die pad
Inventor: HUANG CHIEN-PING
IPC: H01L23/495
Filed: 2000-09-06
Granted: 2003-08-11
Abstract: There is provided a dual-chip structure without die pad. The present invention directly fixes the first one of the two dies in the chip to the lead, support bar, or bus, and fixes the second die on the first die. Accordingly, because there is no die pad required, it is able to increase the distance between the surface of the die and the surface of the adhesive. In the present invention, it is able to greatly reduce the possibility of generating voids without making the die thin by polishing. Furthermore, in the manufacturing process, it is able to effectively avoid the shaking or drifting phenomenon of the die pad encountered in the conventional manufacturing process, thereby avoiding the exposure of gold wire and delamination or crack of die. The present invention can effectively increase the yield rate.
Patent TW-I230176-B (TW)
Title: Antistatic composition
Inventor: LAMANNA WILLIAM M
IPC: D06M13/477
Filed: 2000-09-21
Granted: 2005-04-01
Abstract: An antistatic composition comprises (a) at least one ionic salt consisting of a nonpolymeric nitrogen onium cation and a weakly coordinating fluoroorganic anion, the conjugate acid of the anion being a superacid; and (b) at least one thermoplastic polymer. The composition exhibits good antistatic performance over a wide range of humidity levels.
Patent TW-526357-B (TW)
Title: Reflective liquid crystal display element and image display device using the same
Inventor: HATANAKA TAKAYUKI
IPC: G02F1/1345
Filed: 2000-10-16
Granted: 2003-04-01
Abstract: A liquid crystal cell and an external circuit can be connected favorably. The terminal does not require undulated layer and flattened layer. Hence, the reliability of electric connection and physical connection of the terminal and transparent electrode can be enhanced. The definition of display image can be enhanced. A reflective liquid crystal display element is used in an image display device of a personal digital assistant such as cellular phone. It includes a lower substrate, an undulated layer, a reflective layer, a flattened layer, a transparent electrode, a sealant, a liquid crystal layer, an upper transparent substrate, a liquid crystal cell, a polarizing film, a first birefringent film, a second birefringent film, an external circuit board, and an anisotropic conductive adhesive. It further comprises a liquid crystal cell filling between an upper transparent substrate and lower substrate with liquid crystal, a polarizing film disposed at the upper transparent substrate side of the liquid crystal cell, a birefringent film layer disposed between the polarizing film and liquid crystal cell, and light reflecting means disposed at the lower substrate side of the liquid crystal cell. Undulated layer is not formed in the connection terminal between the lower substrate side of the liquid crystal cell and the external circuit board. Preferably, the sectional shape of the transparent electrode in the connection terminal between the display area and external circuit is formed in three stair steps.
Patent TW-570817-B (TW)
Title: Dry sterilization system
Inventor: LIANG JE-PENG
IPC: A61L9/00
Filed: 2000-10-30
Granted: 2004-01-11
Abstract: A dry sterilization system comprises a power supply, pneumatic pressurization means, electric pressurization means, ozone generation means, UV radiation means, EMI elimination means, ozone discharge means, and wound sterilization means, in order to release negative ions as if generated in a natural thundering environment and highly concentrated ozone. The generated negative ions and ozone are discharged by pneumatic pressurization means near a wound in order to sterilize the wound and activate cells near the wound so as to accelerate the healing of the wound and keep the wound dry.
Patent TW-479424-B (TW)
Title: Transmitter for adjusting output power
Inventor: KANNO SUSUMU
IPC: H04B7/26
Filed: 2000-10-31
Granted: 2002-03-11
Abstract: The present invention provides a transmitter for adjusting output power that selectively uses a gain adjustment means and adjusts its output power depending on a range of a required transmission signal level so as to reduce the current consumption of a power amplifier stage 1 in the case of obtaining the required transmission signal level corresponding to a received signal level. To solve the problem, the transmitter is provided with a signal generating section 4 that generates a transmission signal, a variable gain drive amplifier stage 2 that amplifies the transmission signal, the variable gain power amplifier stage 1 that amplifies the power of the amplified transmission signal and outputs the transmission signal with the required transmission signal level, and a control voltage generating section 51 that generates a first gain control voltage used to adjust a signal gain of the variable gain power amplifier stage 1 and a second gain control voltage used to adjust a signal gain of the variable gain drive amplifier stage 2. The control voltage generating section 51 generates the second gain control voltage to adjust the signal gain of the variable gain power amplifier stage 1 when the required transmission signal level is below a prescribed level, or generates the 1st gain control voltage to adjust the signal gain of the variable gain amplifier stage 2 when the required transmission signal level is over a prescribed level.