baber/WOPTO huggingface dataset:
Patent JP-S6420669-A (JP)
Title: Field-effect semiconductor device
Inventor: HARADA NAOKI
IPC: H01L21/338
Filed: 1987-07-16
Abstract: PURPOSE:To prevent lowering of carrier moving velocity by providing an undoped InGaAs channel layer and an impurity-doped GaAs carrier supply layer stacked through an undoped barrier layer. CONSTITUTION:An undoped InGaAs channel layer (for example, undoped InxGa1-yAs channel layer 3) and impurity-doped GaAs carrier supply layer (for example, n-type GaAs carrier layer 4) stacked through an undoped barrier layer (for example, undoped AlyGa1-yAs barrier layer 5) to prevent spreading of bidimensional carrier gas. Since a barrier layer 5 is provided between a channel layer 3 and an electron supply layer 4, spreading of gas into a layer 4 is remarkably reduced and electron mobility is no longer lowered. The layer 5, since the material thereof is adequately selected, may be thinner and electron concentration is also not lowered. In addition, a low temperature characteristic can be enhanced by using GaAs to the supply layer 4.
Patent JP-H0927424-A (JP)
Title: Fixing device of pole mounted transformer upper part
Inventor: UCHIDA SHINGO
IPC: H01F27/06
Filed: 1995-07-12
Abstract: PROBLEM TO BE SOLVED: To reduce an operation time greatly and improve safety by carrying out operation on a pole, because it is just to fasten a supporting frame and an upper frame by rotating a single fixing bold. SOLUTION: A supporting frame is provided to protrude by fastening a band body A to a pole D. A supporting frame is enclosed with a base part piece 13 at the side of a pole, a side part piece 14 opposite to the base part piece 13 adjacent thereto and a tip part piece 15 opposite to the base piece, it is provided with a recessed part 18 wherein a screw hole 17 is provided to a bottom part piece 16 and it is constituted to tilt an upper side of the base part piece 13 and the side part piece 14 to approach a screw hole gradually in a direction from an upper end to a lower end. A fixing frame 3 is provided to project to a transformer B.  The fixing frame 3 is provided with a fitting cutout 23 wherein a tip part piece 15 of a supporting frame fits in a lower end, a tip part side from the fitting cutout 23 is made a fitting part 24 which fits to the recessed part 18, a tip surface of the fitting part 24 and a lower part of a side edge face opposite to it adjacent thereto are made tilting surfaces which gradually approach mutually in a lower end direction and the fitting part 24 is provided with a supporting part piece 27 which supports a head part of a fixing screw 28 whose tip is screwed to a screw hole.
Patent JP-S6332961-A (JP)
Title: Semiconductor storage device
Inventor: MATSUDA YOSHIO
IPC: H01L21/8242
Filed: 1986-07-25
Abstract: PURPOSE:To make it possible to reduce an area for forming a memory cell and to be strong against a software error in a semiconductor storage device by composing a transfer transistor of a polysilicon transistor made at its source, drain and channel of polysilicon layers. CONSTITUTION:N<+> type impurity regions 13, 14 formed in a polysilicon layer 15 correspond to n<+> type diffused layers 6, 7. A p<+> type impurity region 16 is a part which becomes the channel of a polysilicon transistor 17. The n<+> type region 13 of the polysilicon layer is formed continuously to a storage node 4. A bit line 12 is connected to the layer 15 in a hole 18. Since the node 4 and the region 13 of the transistor 17 are continuously formed, the area can be miniaturized. Since the connection with the line 12 is formed in the hole 18 on the layer 15, even if charge is generated in a substrate 1 by the introduction of alpha-particles, it is not collected in the node 4 and the line 12 but becomes a construction strong against the software errors of a cell mode and a bit line mode.
Patent JP-H0781034-A (JP)
Title: Positioning method for work
Inventor: USHIYAMA YUKIO
IPC: B41F15/08
Filed: 1993-06-23
Abstract: PURPOSE:To perform the positioning of a first and second works, even in the case where they are located in a place that is away from a processing position and even in the case where one of them is not visually recognizable in the processing position, by moving and positioning them with at least one of position adjusting means while checking them for a first and second positioning references on synthetic images by a first and second cameras. CONSTITUTION:A group of cameras are moved relative to a printer main body 1 while a monitor 15a is being watched, and 8 positioning pattern 10a is located at the center of an image. In this case, a positioning pattern 10b in a monitor 15b is also located at the central part of the image. Since all the cameras are simultaneously moved relative to the printer main body, positioning patterns 11a, 11b on a base plate 9, whose images are picked up by a first and second cameras 12a, 13b, are also moved in the monitors 15a, 15b, respectively. Then, a printing pattern 5 associated with a mask 3 is moved by utilizing a position adjusting means 4 associated with the mask so that deviation of the position of each of the two positioning patterns 10a/11a and 10b/11b of a synthetic image in each monitor is minimized while the monitors are being viewed.
Patent JP-S6156293-A (JP)
Title: Apparatus for producing stamper
Inventor: SASAKI OSAMU
IPC: C25D1/10
Filed: 1984-08-24
Abstract: PURPOSE:To form a stamper having a plating layer which is uniform in thickness with good reproducibility by providing a cathode cover having an insulating characterisic to the peripheral edge part of a cathode support for holding a master disk for an optical disk and forming a flow gap for a plating liquid. CONSTITUTION:An insoluble electrode 12 is immersed and installed in an electrodeposition cell 11. The master disk 14 for the optical disk formed with an electrodeposition layer on the surface of the fine rugged pattern formed on the surface of a substrate is held by a cathode supporting plate 13 and is rotated in the plating liquid. A cathode cover 23 having an insulating characteristic covering the peripheral edge part of the disk 14 is provided to the peripheral edge part of the support 13 to form the gap through which the plating liquid flows. The size of the gap is preferably set smalle than the thickness of the disk 14. The plating liquid blown to the disk 14 flows from the central part of the disk 14 toward the peripheral edge thereof and flows between the peripheral end face of the cover 23 and the disk 14 and the support 14 so as to flow toward the rear side thereof. The hydrogen foam, etc. generated from the cathode by the electrolysis are thus quickly removed.
Patent JP-H0466655-A (JP)
Title: Build-up method for boride-complexed cermet
Inventor: HAMASHIMA KAZUO
IPC: B22D17/22
Filed: 1990-07-05
Abstract: PURPOSE:To enable repairing at on-site with a simple build-up method by executing thermal-spraying of powder having the same material as cermet on the surface of a boride-complexed cermet product, and heating in inactive or reducing atmosphere. CONSTITUTION:On the surface of position to be repaired in a cermet product containing both of hardening-phase of an Mo2NiB2 series complexed boride and combining phase of Ni alloy as the essential content, a raw material powder having the same material as the cermet is thermal-sprayed and stuck. This is heated in inactive atmosphere or reducing atmosphere and integrated. As the thermal-spraying method, plasma thermal-spraying method, especially ultra sonic flame thermal-spraying method can pref. be applied. The thermal-spraying is desirable to execute under reduced pressure. After building up, if necessary, finish work is executed. By this method, repairing of worn part of a metallic mold and a small amt. of change in size of the metallic mold already machined, etc., can easily be executed.
Patent JP-2001003973-A (JP)
Title: Dust cover of shock absorber
Inventor: YAMAMURA HIROICHI
IPC: F16F9/38
Filed: 1999-06-23
Abstract: PROBLEM TO BE SOLVED: To provide a dust cover with excellent durability and productivity regarding its mounting. SOLUTION: The upper end 16 of this cover is attached to the piston rod 3 of a shock absorber 1. The lower end 18 of the cover is fastened and held by an attaching band 20 in a diameter-reducing direction while being slidably positioned on the outer periphery of a housing 2. In this mounted state, the inside diameter D1 of the lower end 18 of the cover is set to be greater than the outside diameter D3 of the housing 2 and smaller than the outside diameter D2 of a large-diameter flange part 5 provided at the upper end of the housing 2.
Patent JP-2001001580-A (JP)
Title: Imaging apparatus
Inventor: FUKUI OSAMU
IPC: G06F3/12
Filed: 1999-06-23
Abstract: PROBLEM TO BE SOLVED: To minimize rerasterization when an error is recovered or a job is stopped by managing job information, page information, and band information in hierarchic list structure. SOLUTION: When band information is outputted from a display list, a rasterizer requests a memory management section for acquisition of band information 33A-33E and band memories 34A-34E. When the band memories 34A-34E are secured, point information for the band information 33A-33E is set in page information 32A-32C where a band belongs and point information for the band memories 34A-34E is set in the band information 33A-33E thus configuring a hierarchic list of job, page and band. According to the arrangement, rerasterization can be minimized when an error is recovered or a job is stopped.
Patent JP-H0468687-A (JP)
Title: Color solid-state image pickup device
Inventor: MIYATA KATSURO
IPC: H04N9/07
Filed: 1990-07-03
Abstract: PURPOSE:To dispose the arrival order of a signal according to spatial picture element arrangement by shifting either of uneven numbered or even numbered bit in the vertical direction to be read earlier. CONSTITUTION:A shift correction circuit 9 is composed of a sampling hold circuit 10 sampling the signal of uneven numbered bit, a sample and hold circuit 11 sampling the signal of even numbered bit, a delay circuit 12 delaying the circuit 11 by one horizontal cycle, and a switching circuit 13 receiving the output of the circuit 10 and the delay circuit 12 and outputting this after switching. The circuit 13 is switched for each 1 bit, and it transmits the delayed signal only to the even numbered bit signal read out earlier, further, transmits the signal not delayed to the uneven numbered bit signal to the next step. Thus, the signal is turned to be the order according to the spatial picture element arrangement of the color filter array of a CCD 1, and the color separation is performed without fail.
Patent JP-S6333808-A (JP)
Inventor: ONO SHUICHI
IPC: H01G4/12
Filed: 1986-07-29
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S57100699-A (JP)
Title: Detector for irregular main storage address
Inventor: TSUCHIYA KANJI
IPC: G11C29/00
Filed: 1980-12-15
Abstract: PURPOSE: To eliminate the complexity of switch setting and to detect an irregular main storage address at a high speed, by providing a register for irregular-main-storage-address detection in a main storage controller.  
     CONSTITUTION: A CPU, when a power source is put to work, reads the contents of each main storage device MEM 1Wi  and checks the presence of main- storage-device presence signal ADHL at this time. Then, an irregular main storage address setting register DFF is reset when the main storage device is present and set when not. After the package state of the main storage device is set in the DFF, a main storage controller MCU generates an irregular-main- storage-address detection signal C on the basis of main storage device selection signals A and B and information in the DFF. Consequently, the irregular main storage address is detected with minimum line length, detection time is minimized and the setting ofan irregular-main-storage-address setting switch becomes unnecessary. 
     COPYRIGHT: (C)1982,JPO&Japio
Patent JP-S6236955-A (JP)
Title: Device for integrating subscriber call
Inventor: MIYAHARA AKIO
IPC: H04M15/00
Filed: 1985-08-09
Abstract: PURPOSE:To obtain the information of accumulated charging pulses by using a magnetical coupling from the common feedback line of a subscriber call meter circuit onto which charging pulses for all subscribers or partial subscribers are superimposed so as to read the superimposed charging pulses. CONSTITUTION:When a subscriber 5 hoods on and makes dialing, a crossbar exchange 1 connects an outgoing connection to an outgoing trunk 13, sets a charging index to a register of the outgoing trunk 13 to call an incoming subscriber. When an incoming subscriber responds to the call, the line is busy and a charging pulse is outputted from the outgoing trunk 13 according to the talking time and superimposed onto a common feedback line 14. The charging pulse superimposed onto the common feedback line 14 is sensed by a probe of a clip-on ammeter 2, an output is given to an A/D converter 3, which encodes an analog signal in a preset resolution (x) when a conversion instruction comes from a personal computer 4 into a digital signal and holds the result. Then the personal computer 4 gives a read instruction to the A/D converter3 to read and store the digital signal.
Patent JP-H0464446-A (JP)
Title: Ink jet recording head
Inventor: TANIGUCHI OSAMU
IPC: B41J2/055
Filed: 1990-07-04
Abstract: PURPOSE:To improve a printing speed by a method wherein a pressure generation means is driven under control so that a second pulse can be applied with a delay of a predetermined time after a first pulse is applied to the pressure generation means. CONSTITUTION:To suppress a residual vibration generated by a first pulse for jetting out an ink particle, the drive of a pressure generation means 17 is controlled by a control means 21 so that a second pulse can be applied to the pressure generation means 17 with a delay of a predetermined time. For example, the delay time for applying a second pulse is determined to be 1/2 of a vibration cycle of a first pulse. The suppression of the residual vibration in this manner can reduce the speed fluctuation of the ink particle. Therefore, with a higher particle frequency, the occurrence of a dot shift can be prevented. In this manner, a printing speed can be improved without deteriorating a printing quality.
Patent JP-2000023548-A (JP)
Title: Thresher
Inventor: OCHI RIICHI
IPC: A01F12/00
Filed: 1999-06-23
Abstract: PROBLEM TO BE SOLVED: To enhance maintenance-working efficiency by enabling to carry out sufficient maintenance of the inside of a threshing chamber even though a working space on the side of a thresher is narrow. SOLUTION: This thresher is constituted of a threshing chamber 15 having a threshing cylinder 16, an opening window 41 installed on a part of the side of the threshing chamber 15, a side cover 28 capable of opening and closing the opening window 41 for maintenance, and a cereal stem-feed and transport device 12 comprising a nipping rod 30 arranged outside of the side cover 28 and a feed and transport chain 34 ranging from the starting terminal of the threshing chamber 15 to the end of the threshing chamber. In the said thresher, the feed and transport chain 34 is constituted so as to move upward to an extent without disturbing an opening operation of the side cover 28.
Patent JP-S6157851-A (JP)
Inventor: CHIYAARUZU EDOWAADO ETSUKAATO
IPC: G01N29/22
Filed: 1985-08-13
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S57100115-A (JP)
Title: Unsaturated polyester resin molding material
Inventor: KURASHIKI TOSHIROU
IPC: C08F299/04
Filed: 1980-12-15
Abstract: PURPOSE: To provide a molding material having reduced styrene odor without deteriorating the original mechanical strength, molding shrinkage, appearance, gloss, etc., by restricting the total amount of crosslinking agents such as styrene monomer within a specific range, and using the agents together with an unsaturated polyester resin.  
     CONSTITUTION: The objective molding material is prepared by compounding (A) an unsaturated polyester resin (10W30wt%), (B) crosslinking agents comprising styrene monomer and optionally diallyl phthalate monomer (1W4wt% in totol) and if necessary, (C) a cure initiator, a releasing agent, a thickener, calcium carbonate, glass fibers, etc. 
     COPYRIGHT: (C)1982,JPO&Japio
Patent JP-H0342918-A (JP)
Title: Anti-sidetone circuit
Inventor: FURUKAWA HIROMOTO
IPC: H04M1/58
Filed: 1989-07-10
Abstract: PURPOSE:To obtain a proper side tone by estimating the gain of an echo path with an echo path gain estimating means, composing the proper side tone with an adaptive loss means according to the estimated gain of the echo path, and adding the composite side tone with an adding means. CONSTITUTION:The echo path gain estimating means 6 estimates the gain of the echo path including an echo canceler 1 from the received input signal and sent output signal of the echo canceler 1. The adaptive loss means 7 compares the gain of the echo path estimated by the estimating means 6 with the predetermined gain of the echo path by a comparing means 10. A loss quantity determining means 12 determines the loss quantity of a variable loss means by using the result. The adaptive loss means 7 composes the proper side tone according to the gain of the echo path including the echo canceler 1 and a two-wire/four-wire converter 2 when the echo canceler 1 cancels an echo sufficiecntly. Then the side tone which is composed is added by the adding means. Consequently, the proper side tone is obtained.
Patent JP-S6157020-A (JP)
Title: Side erase magnetic head
Inventor: IWATA HITOSHI
IPC: G11B5/265
Filed: 1984-08-28
Abstract: PURPOSE:To improve, magnetic efficiency and to attain sopt welding by making the connecting division of an erase back core to an erase front core parallel in shape to the back face of a slider. CONSTITUTION:The erase front core 6 is extended to the outside of the slider 2, and is bent so that its edge is parallel to the back face A of the slider 2. The erase back core is also bent so that its edge is parallel to the back face A of the slider 2. Thus, the edge of the erase front core 6 and that of the erase back core 7 can be completely connected outside. This permits the spot welding for that connection. Since a tool can be simply used to hold them because the geometry is simple, if bonding is performed, a complete bonding can be made with a thin bonding layer, reducing the magnetic resistance and providing effective erasing.
Patent JP-2000012546-A (JP)
Title: Manufacture of semiconductor device
Inventor: NAKAOKA SATOKO
IPC: H01L21/768
Filed: 1998-06-24
Abstract: PROBLEM TO BE SOLVED: To form a fine wiring structure of a semiconductor device with a good dimensional controllability to thereby improve its manufacturing yield. SOLUTION: A first etching stopper film 2, a first insulating film 3, a second etching stopper film 4, a second insulating film 5 and inorganic anti-reflection film 6 are formed on a semiconductor substrate 1 sequentially from its lower layer, on which a resist layer 7 is formed and then subjected to a photolithographical process to form a hole pattern. The substrate is etched with use of the resist 7 as a mask to form a contact hole 11. After removal of the resist 7, a groove pattern is formed on the inorganic anti-reflection film 6 by the photolithographical process with use of a resist 8. The substrate is etched with use of the resist 8 as a mask to make a groove 12 therein. After removal of the resist 8, the anti-reflective film 6, second etching stopper film 4 and first etching stopper film 2, which are exposed by the entire-surface etching, are removed. Wiring material 9a is buried in the contact hole 11 and groove 12, unnecessary wiring material 9a is removed by a CMP(chemical- mechanical polishing) process to obtain a desired wiring 8.
Patent JP-H115290-A (JP)
Title: Proof press
Inventor: HAMAGUCHI NOBORU
IPC: B41F3/20
Filed: 1997-06-17
Abstract: PROBLEM TO BE SOLVED: To position a print sheet easily and surely at the time of perfecting proof sheet by providing a fixed jig for positioning a print sheet perpendicularly to the traveling direction of frame, and an abutting means positioning the print sheet in the breadthwise direction. SOLUTION: The proof press comprises a fixed jig 18 for positioning a print sheet 12 on a sheet surface plate 4 by abutting against the side edge thereof, and a fixed jig for positioning the side edge of a print plate on a plate surface plate 3. Furthermore, a movable jig 19 is set in a groove-like space 17 between a sheet pinching plate 14 and the edge of the sheet surface plate 4. When the print sheet 12 is set, side edge thereof is abutted against the fixed positioning jig 18 and two sides at the forward corner part of the print sheet 12 is abutted against the shaft of the sheet pinching claws 15A-15G of a sheet pinching unit 13.  At the time of perfecting the print sheet 12 under registered state, the print sheet 12 is turned over after being printed on one side thereof and two sides at the forward corner part thereof are abutted against the abutting member 23 of the movable positioning jig 19 and the shaft of the sheet pinching claws 15A-15G.
Patent JP-H05337195-A (JP)
Title: Electric stimulation apparatus
Inventor: SASAKI MINORU
IPC: A61N1/32
Filed: 1992-06-12
Abstract: PURPOSE:To make an expansion period and an output of an electric stimulation pulse to coincide by providing a gate means controlling connection of the below described both means between a means oscillating a driver pulse and a driver outputting a stimulation pulse or an electric stimulation pulse and making the gate means off by means of a shrinking signal obtd. from a pulse wave. CONSTITUTION:A pulse wave of a living body obtd. by means of a pulse wave sensor 1 is amplified by means of an amplifier 2 and a shrinking period pulse sss is separately output between terminals by means of a shrinking period pulse generating means 3. An oscillator 4 outputs a pulse shown as 2c to a terminal c. A gate means 5 makes the output of the terminal c off and on in accordance with the shrinking period pulse and outputs a pulse shown as 2d. An output means 6 generates a voltage-elevating pulse in accordance with the pulse shown as 2d and outputs the voltage-elevating pulse to a terminal e. It is possible thereby to make an electric pulse adding time to coinside in a short time, with a simple constitution and surely.
Patent JP-S6160182-A (JP)
Inventor: ARI TEII MAZUMUDAA
IPC: G06K7/016
Filed: 1985-08-14
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0838462-A (JP)
Title: Fat consumption display device
Inventor: KANZAKI TAKASHI
IPC: G01C22/00
Filed: 1994-07-29
Abstract: PURPOSE:To calculate and display the fat consumption due to walk. CONSTITUTION:Number-of-steps resistors I, II are incremented (S5), respectively, while the number of steps is detected in the state where '1' is set in a resistor N (S3, S4, YES), and a walking time resistor (T) is incremented (S6). When a minute carry is detected (S7, YEs), the walking speed is calculated from the number of steps per minute (S8) to calculate the calorie consumption and fat consumption for one minute (S9, S10), and the accumulated value up to the present is also calculated (S11). The remaining walking time and remaining number of steps are calculated from the fat consumption by walk and a target fat consumption (S13). The remaining time and remaining number of steps until the calculated fat consumption reaches the accumulated value and target consumption (S14) are displayed.