baber/WOPTO huggingface dataset:
Patent TW-452938-B (TW)
Title: A logic circuit including combined pass transistor and CMOS circuits and a method of synthesizing the logic circuit
Inventor: YAMASHITA SHIYUNZOU
IPC: H01L21/82
Filed: 1998-01-05
Granted: 2001-09-01
Abstract: The present invention provides a logic circuit by combining the pass transistor logic circuits and CMOS logic circuits to have excellent performance on circuit characteristic such as the area, delay time and power consumption; a binary decision diagram is made from logic functions, each node of it is converted to a pass transistor selector with 2 inputs, 1 outputs and 1 control input to synthesize a pass transistor logic circuit; and, in the pass transistor logic circuit, one input of the two inputs other than the control signal input is fixed at logical constant ""1"" or ""0"" and used as a pass transistor selector with NAND logic or NOR logic operations and is changed into an equivalent CMOS gate such as NAND or NOR; and, if changed into CMOS gates, the predetermined value of electrical characteristic will be closer to the optimized value (for example, the area, the delay time or the power consumption will be smaller) so as to change the pass transistor selector into CMOS gate.
Patent TW-589323-B (TW)
Title: Selection of proteins using RNA-protein fusions
Inventor: SZOSTAK JACK W
IPC: C07B61/00
Filed: 1998-01-15
Granted: 2004-06-01
Abstract: Described herein are methods and reagents for the selection of protein molecules that make use of RNA-protein fusions. A method for the selection of a desired protein, comprising the steps of: (a) providing a population of candidate messenger RNA molecules, each of which comprises a translation initiation sequence and a start codon operably linked to a candidate protein coding sequence and each of which is covalently bonded or hybridized to a nucleic acid sequence that is covalently bonded to a peptide acceptor at the 3' end of said candidate protein coding sequence; (b) in vitro or in situ translating said candidate protein coding sequences to produce a population of candidate RNA-protein fusions, wherein said RNA is covalently bonded to said protein through an amide bond, wherein said in vitro translating is carried out in a lysate prepared from a eukaryotic cell or portion thereof, a reticulocyte lysate, a wheat germ lysate, or a lysate prepared from a bacterial cell or portion thereof; and (c) selecting a desired RNA-protein fusion by (i) assaying for binding or functional activity of the desired protein binding of the RNA or protein portion of the RNA-protein fusion to a desired target, wherein the target is optionally immobilized directly or indirectly on a solid support or wherein the target: RNA-protein fusion complex is optionally immunoprecipitated, (ii) assaying for a functional activity of the desired protein, or (iii) assaying for the ability of the RNA-protein fusion to catalyze a desired chemical reaction; and (d) repeating step (a) through (c), thereby selecting said desired protein.
Patent TW-400582-B (TW)
Title: Processing method of V-groove airbridge gate with etch-stop layer
Inventor: LIU SHIUE-SHR
IPC: H01L21/328
Filed: 1998-01-16
Granted: 2000-08-01
Abstract: A novel gate structure called V-groove Airbridge Gate is proposed here, as well as the processing method to fabricate it. The gate is formed by anisotropic wet etching of undoped semiconductor (e.g. GaAs, Si) layer grown on top of device active layer(s), followed by standard metal evaporation and lift-off process. Owing to the outward slope of the sidewalls of the V-groove, effective gate length that is substantially smaller than the minimum feature size of available lithographic technology can always be obtained. The vertical location of the bottom of the gate metal is controlled by introducing a layer of etch-stop material between the uppermost undoped layer and device active layer(s). Gate strip and gate pad are connected by an airbridge-like gate feeder, which is fabricated by a surface micromachining technique that etches away the semiconductor materials beneath the gate feeder. This kind of novel gate structure can shorten the effective gate length without the penalty of increased gate resistance, and can achieve smaller parasitic gate capacitances. It has been applied to the fabrication of InGaP/GaAs/InGaAs hetrojunction doped-channel FET's, and relatively good results have also been achieved compared with traditional gate structure. The introduction of the etch-stop layer leads to high yield and uniformity, which is important to the industrial mass-production applications.
Patent TW-361037-B (TW)
Title: H-size compensation control circuit and compensation method thereof
Inventor: HSIEH CHANG-FA
IPC: H04N3/223
Filed: 1998-01-26
Granted: 1999-06-11
Abstract: An H-size compensation control circuit applicable in a display for compensating the variation of H-size affected by the anode load current. The compensation control circuit comprises two parts: one being a H-size compensation circuit, and the other being a H-size control circuit. The H-size compensation circuit couples to the winding of a flyback transformer for generating a corresponding compensation signal based on the variation of the anode load current. The compensation signal is far lower than the level of the anode voltage so as to be processed by an ordinary electronic circuit. The H-size control circuit couples to the H-size compensation circuit for receiving the compensation signal. The compensation signal can combine with an offset adjustment signal sent from a microcontroller into a d.c. modulation signal, and then combine with an a.c. modulation signal for generating a modulation voltage. Since the modulation voltage on the other end of the horizontal deflection yoke comprises a d.c. compensation signal factor, a variation on the anode load current causes the anode voltage to vary accordingly and the modulation voltage to compensate the affected H-size.
Patent TW-418387-B (TW)
Title: A servo decoder for decoding an error correcting servo code recorded on a disc storage medium
Inventor: BEHRENS RICHARD T
IPC: G11B5/55
Filed: 1998-02-02
Granted: 2001-01-11
Abstract: A servo decoder is disclosed for disc storage systems that operates according to a novel coding scheme capable of accurately decoding detected codewords representing servo track address during seek operations, even when the recording head flies between two adjacent tracks, and capable of correcting errors in the detected codedwords caused by noise in the read signal, such as inter-symbol interference. In a first embodiment, the coding scheme comprises an error correcting code (ECC) capable of correcting a predetermined number of bit errors in the detected codewords. To achieve the equivalent effect of a conventional Gray code, the codewords are arranged such that adjacent track addresses differ by a number of bits equal to the minimum distance of the ECC code. In a second embodiment, the servo code corrects certain minimum distance error events associated with a trellis type sequence detector. To achieve the equivalent effect of a conventional Gray code in this embodiment, the codewords are arranged such that adjacent track addresses differ by a number of bits relative to the minimum distance error events corrected. In this manner, when the recording head spans two adjacent tracks during a seek operation, the ambiguity in the detected codeword will be resolved in favor of one of the adjacent track addresses. Further, due to the error correcting capabilities of the code, the present invention improves the performance of servo seeking and tracking operations, and allows the servo data to be recorded at a higher density.
Patent TW-374831-B (TW)
Title: Accumulator
Inventor: KODA TOSHIHIDE
IPC: F25B43/02
Filed: 1998-03-26
Granted: 1999-11-21
Abstract: An accumulator which is capable of preventing an excessive enlargement of the flow rate of a liquid refrigerant which is discharged from the accumulator, reducing the quantity of refrigerating machine oil which is accumulated in the accumulator and maintaining a required quantity of refrigerating machine oil in a compressor. Liquid and a gas which circulate in a refrigerating and air-conditioning circuit are introduced into a first space 1 by a suction pipe 3, and the gas refrigerant is discharged to a refrigerating and air-conditioning circuit through a gas passage pipe 4, a second space 2 and a discharge pipe 5. Moreover, liquid-level maintaining means 7 and 8 prevent rise in the height of the accumulated liquid introduced into the first space 1. When the height has been made to be not lower than a pre-determined height, the gas communication means 4 moves liquid in the first space from the first space 1 to the second space 2. In addition, a returning means 6 discharges refrigerating and air-conditioned circuit.
Patent TW-388948-B (TW)
Title: Method of determining the tip angle of a probe card needle
Inventor: CHEN SHU-MIN
IPC: H01L21/66
Filed: 1998-04-14
Granted: 2000-05-01
Abstract: A method is provided for determining the tip angle of a probe card needle used to measure electrical characteristics of a circuit device, such as an IC. The spatial coordinates (X1,Y1,Z1), (X2, Y1, Z2) and (X3, Y1, Z3) of three spaced apart locations A, B, and C along the outer free end of the needle tip are measured. The slopes m1 and m2 of two longitudinal sections of the needle are determined, and the tip angle is then calculated by using the slopes m1 and m2.
Patent TW-404091-B (TW)
Title: Ladder filter having edge-reflection type resonators
Inventor: KADOTA MICHIO
IPC: H03H9/25
Filed: 1998-05-11
Granted: 2000-09-01
Abstract: A ladder filter includes a plurality of series arm resonators and a plurality of parallel arm resonators. The series arm resonators are connected in series to form a series arm of a ladder circuit and are located at  a first integrated region. Each series arm resonator includes an edge-reflection surface acoustic wave (SAW) resonator which has a piezoelectric material portion and a pair of edges thereof and utilizes a shear horizontal surface acoustic wave to be excited on the piezoelectric material portion. Each of the parallel arm resonators is connected in parallel between the series arm and a ground potential to form a parallel arm of a ladder circuit. Each of the parallel arm resonators includes an edge reflection SAW resonator which has a piezoelectric material portion with a pair of edges thereof and utilizes a shear horizontal surface acoustic wave to be excited on the piezoelectric material portion. The parallel arm resonators include a first group of at least two parallel arm resonators which are located at a second integrated region which is physically isolated from the first integrated region such that the shear horizontal surface acoustic wave excited on the piezoelectric material portion in the first integrated region does not interfere the shear horizontal type surface acoustic wave excited in the second integrated region.
Patent TW-373199-B (TW)
Title: Method of manufacturing electronic components
Inventor: SASAKI TOSHIYA
IPC: H05K3/00
Filed: 1998-05-29
Granted: 1999-11-01
Abstract: This method of manufacturing an electronic component includes forming of a slit in a connecting electrode located on the surface of a mother substrate such that the slit extends in a direction intersecting a cutting line, and cutting the mother substrate along the cutting line while cutting the connecting electrode having the slit. The connecting electrode is thereby reliably exposed on two opposing cut surfaces, and the reliability of external connection of the electronic component is improved.
Patent TW-368693-B (TW)
Title: Manufacturing method for metal gate of integrated circuit
Inventor: TSAI KUAN-CHI
IPC: H01L21/28
Filed: 1998-06-15
Granted: 1999-09-01
Abstract: A kind of manufacturing method for metal gate of integrated circuit which is to form the gate oxide on the substrate and to cover a polycrystalline silicon layer on the gate oxide; and deposition of barrier on the polycrystalline silicon layer; then deposition of metal layer on the barrier. Then, proceeding the etch back process to etch the metal layer and barrier to form the metal gate of integrated circuit; then, forming the silicon nitride lining for covering on both sides of metal gate. Then, etching polycrystalline silicon layer and gate oxide to form the polycrystalline silicon gate of integrated circuit. At last, to form the sidewall of silicon nitride to cover both sides of silicon nitride lining and polycrystalline silicon gate as the insulation layer of integrated circuit.
Patent TW-527339-B (TW)
Title: Hydrocyanation of diolefins and isomerization of nonconjugated 2-alkyl-3-monoalkenenitriles
Inventor: TAM WILSON
IPC: B01J31/18
Filed: 1998-08-01
Granted: 2003-04-11
Abstract: Improved liquid phase process useful in the hydrocyanation of diolefinic compounds to produce nonconjugated acyclic nitriles and to the liquid phase process of isomerization of the nitriles to, among other things, 3- and/or 4-monoalkene linear nitriles. The improvement involves conducting the process in the presence of zero-valent nickel and a multidentate phosphite ligand. Novel multidentate phosphite ligands and catalyst precursor compositions made therefrom are also disclosed.
Patent TW-383230-B (TW)
Title: Wheel for a roller skate provided with a tread
Inventor: GALY PHILIPPE
IPC: A63C17/22
Filed: 1998-08-24
Granted: 2000-03-01
Abstract: A wheel for a roller skate, having a tread made of an adherent and flexible material reinforced, at least partially, by a reinforcement. Preferably, a dampening layer is arranged between the reinforcement and the periphery of the wheel hub. The wheel is both rigid and light.
Patent TW-446741-B (TW)
Title: Structural adhesive composition, multi-component system and process for preparing the same, and articles containing the same
Inventor: GERARD ERIC-JACK
IPC: C08G18/69
Filed: 1998-09-04
Granted: 2001-07-21
Abstract: The present invention relates to a structural adhesive compositions comprising a polyurethane which is obtainable by reacting a polyisocyanate having a functionality in the range of from 2 to 3 and a hydrogenated polybutadiene polyol having a functionality in the range from 1.5 to 2.5 and a 1,2 vinyl content prior to hydrogenation of from 30 to 70% by weight, and wherein the NCO:OH molar ratio is in the range from more than 1.05 up to 1.6.
Patent TW-434476-B (TW)
Title: Electronic device and electronic device battery
Inventor: ITO SUSUMU
IPC: H01M2/10
Filed: 1998-09-25
Granted: 2001-05-16
Abstract: A portable electronic means includes a body and a display portion which is openably and closably mounted with respect to the body, and an electronic device battery. The portable electronic means further includes a pair of hinges (opening-and-closing portions) for openably and closably mounting the display portion to the body, with a battery being mechanically and electronically mounted between the pair of hinges so as to be removable therefrom. The electronic means makes it possible to eliminate all the factors that prevent a reduction in the thickness of the electronic device due to the use of an externally mounted type battery, and has a display portion capable of being opened and closed with respect to the body by more than 180 degrees.
Patent TW-420920-B (TW)
Title: Universal voice/fax/modem line over compressed media
Inventor: JACOBI ELI
IPC: H04M11/00
Filed: 1999-02-02
Granted: 2001-02-01
Abstract: An apparatus and method for selectively compressing information to be transmitted over a communications network includes an analog line monitor connected to an analog telephone and an analog data communications device. The analog line monitor is configured for detection of carrier tone signals associated with data transmissions. An analog-to-digital/digital-to-analog (AD/DA) converter is connected to the analog line monitor to convert the information contained in transmissions from the analog telephone and the analog data communications device from an analog format to a digital format. Optionally, the AD/DA circuitry is configured for demodulating data prior to transmission over the network. Compression circuitry is responsive to detection of a carrier tone signal by the analog line monitor, such that detection of a carrier tone signal suppresses compression of data transmitted by the data communications device. A transmitting device is connected to the AD/DA converter and to the compression circuitry to transmit information generated by the analog telephone and the analog data communications device to a remotely located communications device. A preferred embodiment includes a digital line monitor connected to a digital communications device. Decompression circuitry is connected to the digital line monitor to decompress information transmitted by the digital communications device. A signaling information extractor is connected to the decompression circuitry to extract signaling information from the decompressed digital information. The transmitting device transmits the information received by the digital line monitor.
Patent TW-490672-B (TW)
Title: Bi-directional shift register having bi-directional shift function without deteriorating data with a reduced number of elements
Inventor: SUYAMA NORIAKI
IPC: G11C19/00
Filed: 1999-01-28
Granted: 2002-06-11
Abstract: A bi-directional shift register comprises flip-flops connected to first switching elements and second switching elements. Third switching elements are connected in sequence and between the respective flip-flops. The third switching elements are on-off controlled in accordance with a CLK signal in order to periodically transition from low to high or from high to low. The shift register opens the second switching elements during the low duration of the REV signal and opens and closes the first switching elements in accordance with clocking of the CLK signal to shift data in the forward direction. The shift register opens the first switching elements during the high duration of the REV signal and opens and closes the second switching elements in accordance with the clocking of the CLK signal to shift data in the reverse direction.
Patent TW-510110-B (TW)
Title: System and method for use of feature codes in a wireless communication device
Inventor: KIRBAS BILHAN
IPC: H04W88/02
Filed: 1999-09-14
Granted: 2002-11-11
Abstract: A wireless communication device (100) contains a speed-dial storage area (126) containing one or more user-entered destination telephone numbers. An additional memory area (128) contains the plurality of sets of additional digits to be added to the user-entered destination telephone number. The user associates one or more additional sets of digits to a selected user-entered destination telephone number. A control processor (102) automatically adds the associated set of additional digits whenever the user-entered destination telephone number is selected. The sets of additional digits may be pre-programmed by the service provider or programmed by the user. The sets of additional digits may include codes for features such as caller identification transmission, caller identification blocking, message waiting cancellation, and the like. In addition, other sets of digits, such as area codes and other prefixes may be pre-programmed by the service provider or the user. The additional sets of digits may be added to all subsequent calls to the selected user-entered destination telephone number until the control processor (102) is selectively disabled. The processor may be disabled by manual intervention by the user or by turning the power-off to the wireless communication device.
Patent TW-479088-B (TW)
Title: Electric washer-dryer
Inventor: FUKUMOTO MASAMI
IPC: D06F25/00
Filed: 1999-03-11
Granted: 2002-03-11
Abstract: A washer-dryer having an improved efficiency of drying up; namely, the drying time is shortened and the unevenness of drying is alleviated. Furthermore, vibration during operations, especially during spin-drying, is reduced. An inner tub of approximately cylindrical shape rotating around a substantially vertical axis and receives a washing is housed in an outer tub. The inner tub is provided with freely rotatable agitating means at the bottom part for agitating the washing. A motor rotates the inner tub or the agitating means. The air to be supplied through a hot air supply channel into the inner tub is heated by heating means, which air is advanced by a drying air blower into the inner tub. Control means controls each of the washing, rinsing, spin-drying and drying processes by controlling respective operations of the motor, the heating means, the drying air blower, etc. During the drying process, a washing is agitated by the agitating means, and exposed to the air heated by the heating means and blown by the drying air blower against the washing staying within the inner tub. The washing is thus deprived of humidity and dried.
Patent TW-423097-B (TW)
Title: Method for manufacturing capacitor of semiconductor memory device
Inventor: LEE SOO-MAN
IPC: H01L27/10
Filed: 1999-07-08
Granted: 2001-02-21
Abstract: Disclosed is a method to reduce step difference of a cell region and a peripheral region, and to increase the capacitance. A first intermetal insulating layer, a planarization layer and a second intermetal insulating layer are formed successively on the semiconductor layer including a storage node. A contact hole is formed by etching the first intermetal insulating layer, the planarization layer and the second intermetal insulating layer so that a selected portion of the storage node is exposed. A photoresist pattern in which a wave of saw-teeth shape is formed at sidewalls, is formed on the second intermetal insulating layer so as to fill the contact hole. Spacers are formed at both sidewalls of the photoresist pattern in which the wave of saw-teeth shape is formed. Herein, a wave of saw-teeth shape is formed at inner surfaces of the spacer owing to both sidewalls of the photoresist pattern. The photoresist pattern in which the waves of saw-teeth shape are formed at sidewalls thereof, is removed. A storage node electrode is formed by filling inside of the contact hole and between the spacers with a doped polysilicon layer. Herein, a wave of saw-teeth shape is formed at sidewalls of the storage node electrode owing to the spacer. The spacer and the second intermetal insulating layer are removed, and a dielectric layer and a plate electrode are formed on surface of the storage node electrode successively thereby forming a capacitor.
Patent TW-449751-B (TW)
Title: Non-volatile semiconductor memory device
Inventor: YAMASHITA MINORU
IPC: G11C16/06
Filed: 1999-10-15
Granted: 2001-08-11
Abstract: A non-volatile semiconductor memory device includes a first cell including a first floating-gate type transistor having a first threshold voltage, and a second cell including a second floating-gate type transistor having a second threshold voltage different from the first threshold voltage. Data is stored by a difference between a first current flowing in the first cell and a second current flowing in the second cell.