baber/WOPTO huggingface dataset:
Patent JP-S6342526-A (JP)
Title: Transmission line distortion equalizing device
Inventor: MURAKAMI JUNZO
IPC: H04B3/06
Filed: 1986-08-08
Abstract: PURPOSE:To cancel a distortion component in a reception demodulated waveform by allowing an estimated transmission code sequence to pass a QAM modulating circuit simulating the transmission characteristic of an actual transmission system, a band limiting nonlinear circuit, and a demodulating circuit to generate an equivalent nonlinear distortion and subtracting this distortion component from the reception demodulated waveform. CONSTITUTION:The input signal applied to an input terminal 10 is divided into two, and one is applied to a code point discriminator 20. The output of the code point discriminator 20 is led to a QAM modulator 30, which simulates the QAM modulator in a transmitter, and passes a band limiting nonlinear circuit 40 and is inputted to an orthogonal wave detector 40. The output of the code point discriminator 20 is subtracted from the output of the detector 50 by a subtracting circuit 70. The output of the circuit 70 is multiplied by a complex coefficient alpha in a coefficient multiplying circuit 80, and the output of the coefficient multiplying circuit 80 is subtracted from the input signal by a subtracting circuit 90. Thus, the nonlinear distortion generated in the transmission line is compensated.
Patent JP-H0513456-A (JP)
Title: Manufacture of semiconductor device
Inventor: SETO HIROYUKI
IPC: H01L29/812
Filed: 1991-06-28
Abstract: PURPOSE:To enable a semiconductor device of LDD structure to be manufactured through a technique similar to a T gate method and set large in an optional range of distance between a gate electrode and a source.drain region. CONSTITUTION:Three dummy gates 4a, 5a, and 6a are provided onto an N-type active layer 3 of a GaAs substrate 1, where the gates are set smaller in width as they are located closer to the surface of the substrate 1. N-type ions of high concentration are implanted using the dummy gates 4a, 5a, and 6a as a mask to form an N<+> implanted layer 8. In succession, after the uppermost dummy gate 6a is removed, ions are implanted using the dummy gates 4a and 5a as a mask to form an N' layer 9 smaller than the N<+> implanted layer 8 in dose. Lastly, a Schottky electrode 13a identical to the dummy gates 4a and 5a in shape is provided.
Patent JP-S5886983-A (JP)
Title: Detection of welding point for automatic welding robot
Inventor: TANAHASHI SAKAE
IPC: B23K9/06
Filed: 1981-11-19
Abstract: PURPOSE:To eliminate the need for electric power sources for detection and selecting  switches and to obtain good detecting sensitivity by making combination use of an  electric power source for welding for detecting of weld points as well and controlling  the output current of the power source for welding to at least the current at which a  welding wire does not melt. CONSTITUTION:A circuit 10 outputs the data for moving a torch 14 downward in a Z-axis direction to a robot body, and outputs a current command for detection of welding points and a stop command signal for wire feeding to a circuit 11 via a circuit 15. Then, the robot body controls the axis for the downward movement of the torch and the circuit 11 controls an electric power source 12 so as to make the voltage applying to the wire 17 high and the current flowing to the wire 17 small.  This current value is set within the range where the wire is not melted. The circuit 11  further stops the output of the wire feed command signal to a motor 16 and maintains  the wire length at the preceding end of the torch at a prescribed length. If there is contact or discharge between the wire and a base metal 19 on controlling of the torch  axis, the downward movement of the torch is stopped by the detection of the change  in the current value of a detector 13, and the circuit 10 takes the data on the torch  position therein. The similar operations are performed with respect to an X-axis and  the position data is calculated.
Patent JP-H0739886-A (JP)
Title: Treatment of waste liquid
Inventor: TANAKA ISAMU
IPC: C02F1/62
Filed: 1993-07-28
Abstract: PURPOSE:To practically cause the total amount of amphoteric metal ions to be deposited in a method where alkali is added to a neutralization tank to cause the amphoteric metal ions to be deposited as solid by controlling the added quantity of the alkali by the dielectric constant of liquid in the neutralization tank. CONSTITUTION:An acidic waste liquid 1 contg. amphoteric metal ions is introduced into a neutralization tank 2 and liquid 3 in the neutralization tank 2 is agitated by an agitator 9. The dielectric constant of the liquid 3 is measured by a dielectric constant meter 4. The measured value is inputted as an input signal 'a' to a controller 5. Computations are performed in the controller 5 and the opening and closing of an alkali valve 6 is controlled by an output signal 'b' from the controller 5 to control the injected quantity of alkali 7 to the neutralization tank 2. As a result, even if the inflow quantity of the acidic waste liquid contg. amphoteric metal ions to the neutralization tank 2 is changed, the quantity of alkali required for causing the amphoertic metal ions to be deposited is accurately known and the exact amount of alkali is added to the neutralization tank 2.
Patent JP-H0931225-A (JP)
Title: Readily adhering polyester film
Inventor: OKADA SHINICHIRO
IPC: C09D167/02
Filed: 1995-07-21
Abstract: PROBLEM TO BE SOLVED: To obtain a readily adhering polyester film which is excellent in coating appearance, adhesion and antistatic properties and useful as a magnetic card by combining a specific surfactant with a phosphoric ester based antistatic agent. SOLUTION: Polyester film (preferably a white film containing a white pigment, having a thickness of >=20μm) is coated, at least on its one surface, with a coating material (preferably an aqueous coating material) comprising (A) a phosphoric ester salt antistatic agent such as sodium dioctyl phosphate, (B) a surfactant with an HLB of <=12 such as polyoxyethylene nonyl ether and (C) a binder of at least one kind selected from acrylic copolymers and polyester copolymers to form the objective easily adhering coating film (preferably 0.01-1μm thick). The proportions of the components A, B and C are 5-40wt.%, 1-20wt.% and 94-40wt.%, based on the total amount, respectively.
Patent JP-H0745966-A (JP)
Title: Portable case
Inventor: MORIMOTO KAORU
IPC: H05K5/02
Filed: 1993-07-28
Abstract: PURPOSE:To provide a portable case in which the mounting and attaching direction of a belt is not limited to one direction when the case is mounted on, and attached to, the belt and in which a gap having a length through which the belt can be passed can be ensured between a case body and a belt loop even when the belt passage is not attached to the case body after one and end side of it has been turned up. CONSTITUTION:This portable case is provided with a case body 12 which houses an electronic apparatus 11 and with belt loop 13 which are formed of a flexible belt-shaped body and which are attached to the case body 12 on at least two faces out of outer circumferential faces of the case body 12 in a state that a gap through which a belt passes can be formed.
Patent JP-2000022008-A (JP)
Title: Manufacture of non-volatile semiconductor memory
Inventor: HAMASUNA EIJI
IPC: H01L29/788
Filed: 1998-07-01
Abstract: PROBLEM TO BE SOLVED: To provide a non-volatile semiconductor memory capable of rapid operation as well as avoiding the leakage of the charge accumulated on a floating gate electrode. SOLUTION: A non-volatile memory cell transistor 90 is provided with a floating gate electrode 2 formed on a silicon substrate 1 through the intermediary of a tunnel oxide film 6a likewise a control gate electrode 3 formed on the floating gate electrode 2 through the intermediary of an ONO film 7. The floating gate electrode 2 made of a single layer has a lower face 2b and an upper face 2a while the area of the lower face 2b is narrower than that of the upper face 2a.
Patent JP-2001015994-A (JP)
Title: Method for mounting ic package
Inventor: SAWAMOTO SHUICHI
IPC: H05K13/08
Filed: 1999-06-30
Abstract: PROBLEM TO BE SOLVED: To eliminate the need of any special visual inspection device by mounting an IC package on which marks are put in advance in a marking process on a board on which fixed points marked in advance while the fixed points of the board and the marks of the package are recognized. SOLUTION: Laser light is made incident to a lens and the accuracy of terminals (solder balls) formed on a substrate 10 on the backside of an IC package is discriminated through picture recognition based on the reflected light of the laser light. Then marks 2 are put on the surface of the IC package on the side opposite to the substrate 10 by means of a marker in a marking process. At the time of mounting the marked IC package on a mother board 4, fixed points 16 are marked in advance on the mother board 4, and the package is mounted on the board 4 while the fixed points 16 of the board 4 and the marks 2 of the package are recognized.
Patent JP-S57109566-A (JP)
Title: Soldering cell
Inventor: INOUE TAKAO
IPC: B23K1/08
Filed: 1980-12-26
Abstract: PURPOSE:To prevent soldering defects and obtain good quality by providing bending points to the shapes of >=2 solder outflow nozzles and inclining the angles between the faces and the faces at specific angles in a soldering cell having said nozzles. CONSTITUTION:In a soldering cell having at least >=2 solder outflow nozzles, >=1 pieces of bending points 9- are provided on the sectional view viewed from the side face as nozzle shapes, an the angle alpha formed by the faces and the faces thereof incline by 2 deg.-80 deg. with respect to the advance direction of printed substate. The yield of solder is better if the caurving directions of the 1st nozzle and the 2nd nozzle are opposite. Thereby, the reliability of wiring boards is improved and large effect is provided in terms of saving of energy and the like.
Patent JP-S6427938-A (JP)
Title: Corrosion-resistant clad steel plate
Inventor: NAKAMURA TOSHIYUKI
IPC: B32B9/00
Filed: 1987-07-23
Abstract: PURPOSE:To manufacture a clad steel plate prominent in corrosion-resistant property and jointing strength, by a method wherein an intermediate layer, consisting of two layers consisting of an insulating thin film and a heat resistant polymer thin film or consisting of inorganic polymer resin or organic polymer resin, having insulating and heat resistant properties, into which highly insulating ceramics particles are dispersed, is interposed between the surface material and the matrix steel sheet of a corrosion-resistant clad steel plate. CONSTITUTION:Surface oxidizing treatment is applied on a matrix steel sheet 1 in a furnace to produce a fine insulating thin film 2, consisting of magnetite (Fe3O4), on the surface layer thereof. Subsequently, molten resin is coated on one side of said insulating thin film 2 to form a heat-resistant polymer thin film 3. Then, a surface material 4 or a cupro-nickel sheet is supplied and superposed on said polymer thin film after pickling and degreasing to heat and press them by a normal method, whereby a clad steel plate 5 is obtained.
Patent JP-H0236473-A (JP)
Title: Japanese language analyzing device
Inventor: FUJITA KATSUHIKO
IPC: G06F17/28
Filed: 1988-07-26
Abstract: PURPOSE:To obtain a good analyzed result, and to have the advantage in point of memory capacity too by providing a displaying means to display the effect that plural candidates for the relation of connection reception exist whenever they exist, and a selecting means to select and determine the destination of connection from the candidates and to submit it for later processing. CONSTITUTION:An interactive sentence structure analyzing part 3 is provided with a processing part consisting of a processed objective clause determining part 6, a connection reception processing part 7 and a connecting destination determining part 8, and simultaneously, a dictionary/grammar 9 for syntax analysis, a candidate memory 10 and an analyzed result memory 11. When, plural candidates of the connection reception relation related to the clause behind itself appear in the course of the processing of the connection reception by a clause unit, the effect is displayed on the displaying means 4 at that stage, and when the connecting destination is selected and determined by an operator, the processing shifts to the analyzing processing of the next clause based on the result of it. Thus, the adequate and efficient analysis can be obtained, and the small memory capacity becomes enough as well.
Patent JP-H0636144-A (JP)
Title: Merchandise sales registration data processor
Inventor: OGIWARA SHIGETAKA
IPC: G07G1/12
Filed: 1992-07-14
Abstract: PURPOSE:To speedily and automatically release a machine lock state. CONSTITUTION:This device is provided with a least significant task execution storage means 13T, least significant task execution writing means 11 and 12, least significant task execution discriminating means 11 and 12, least significant task execution storage reset means 11 and 12 and machine lock clear control means 11 and 12, and it is automatically discriminated whether the device is set in the machine lock state or not corresponding to whether the task at the least significant priority is executed during prescribed time or not at every prescribed time. When the least significant task is not executed, it is regarded that machine lock is generated, the status is forcedly cleared, and the machine lock is automatically released.
Patent JP-S6246679-A (JP)
Title: Thermal recording material
Inventor: OBOKATA TAKAO
IPC: B41M5/337
Filed: 1985-08-27
Abstract: PURPOSE:To provide a coated film having high water resistance at low temperatures and excellent operability (little contamination of a thermal head and a high sticking resistance), by using a color forming substance, a color developer for developing the color of the color forming substance when being heated, a polyvinyl alcohol resin and a water-soluble reactive resin comprising a specified comonomer as an essential constituent. CONSTITUTION:A water-soluble reactive resin comprising as an essential constituent a comonomer of general formula (I), wherein l is a positive integer, m is 0 or a positive integer, n is 2 or 3, and A is -O- or -NH-, is used as a water- resisting agent for a binder. The thermal recording material is produced by the usual coating method. The color former, the color developer and the binder are suitably used in respective amounts of 5-20%, 10-60% and 20-70% based on the weight of the color forming layer. The amount of the reactive resin is suitably 5-60wt% based on the amount of the PVA resin. The coating material is applied to the surface of a base by a known coating system, and the coating amount is ordinarily 2-10g/m<2> on a dry basis.
Patent JP-S6437346-A (JP)
Title: Vessel for carrying
Inventor: GIYUNTAA PIISU
IPC: B65D90/00
Filed: 1987-07-28
Abstract: PURPOSE: To provide a container structure for emptying with a simplified means by forming a discharge passage within a movement area between an external edge of the central area of an upward warped lid in an inverted position and an external edge of the lid edge area inclined upward in the peripheral wall direction of the container. CONSTITUTION: An annular central area 4 of a top lid 2 is warped inward and furnished with an annual edge section 3 inclined downward against the peripheral wall of a container, so that a ring groove is formed in the top lid 2. Placing the container upside down makes the remaining liquid in the container flow into the ring groove in an arrow direction. A convex 9 for plunger ring of an injection-discharge plug hole 5 does not have a projection on a movement edge between the central area 4 and the edge section 3. On the other hand, an opening edge of the discharge plug hole 6 extends to a horizontal opening plane of the injection-discharge plug hole 5 while forming a ridge section 8 in an invert hopper form. The collected liquid moves into the ridge section 8 and discharges outside through the opening of the lug hole 6.
Patent JP-S6431321-A (JP)
Title: Vacuum switch tube and manufacture thereof
Inventor: UCHIYAMA OSAMU
IPC: H01H33/662
Filed: 1987-07-27
Abstract: PURPOSE:To simplify temporary assembly work and reduce a space occupied with a temporary assembly product by fixing one end of a metal plate to an electric field alleviation cylinder and causing the other end thereof to be in contact with the external surface of the cylinder so as to be further away from an electrode than from a part fixed to the cylinder for the temporary assembly of overall assembly. CONSTITUTION:When a partial assembly work is carried out, a metal plate 9 is so positioned that a minimum distance from one end 9b of the metal plate 9 to the center axis of a partial assembly product will be equal to or larger than the radius of the inner diameter of an insulation cylinder 2 in the partial assembly product as finished. Concurrently therewith, the metal plate 9 is so positioned as to be capable of deformation without any contact with other parts and a contact part 9b in contact with the internal surface of the cylinder 2 in overall assembly is further away from an electrode than from the fixing part 9b of electric field alleviation cylinders 12a and 12b until the minimum distance comes to be equal to or smaller than the radius of the inner diameter of the cylinder 2. According to the aforementioned method, it is possible to obviate facilities, a jig and a tool for maintaining a positioning condition in temporary assembly. And it is possible to reduce a space and weight occupied by a temporary assembly product in a vacuum furnace.
Patent JP-H0350932-A (JP)
Title: Store and forward system
Inventor: YOSHII EMI
IPC: H04L12/58
Filed: 1989-07-18
Abstract: PURPOSE:To facilitate the management of sheets with different validity by providing a means collating a cryptographic mark code of a sheet used for a optical mark reader(OMR) with the valid period in a store and forward exchange. CONSTITUTION:A cryptographic mark code 11 is described in an optional position of an OMR sheet 10. Then the OMR sheet 10 is sent from a terminal equipment 1 to a store and forward exchange 3 via an exchange network 2. A code collation section 31 reads the code 11 in the sheet 10, retrieves a valid period table 32 and extracts the valid period recorded in advance from the code 11 in the table 32. Then the collation section 31 references a current data information generating section 33 to collate the current data information with the validity from the table 32 to decide the propriety of communication. As a result, the communication in the valid period is executed and the communication out of valid period is rejected. Thus, the validity table of the OMR sheet is provided to each cryptographic mark code to facilitate the control of the sheet with different valid period.
Patent JP-S6080195-A (JP)
Title: Semiconductor memory
Inventor: OKAJIMA YOSHINORI
IPC: G11C11/415
Filed: 1983-10-07
Abstract: PURPOSE:To prevent the shunt of a write current to a non-selected memory cell by clamping the potential of a non-selected word line with a reference voltage source, etc. and therefore increasing the power supply margins of both holding and discharge currents. CONSTITUTION:The reference voltage VR2 is set slightly higher than a low level of voltage of the output of an address decoder, e.g., at -1.0V. Therefore, in case a word line is not selected, the base voltage of a transistor Q3 for word driver, i.e., the output voltage of the address decoder is set at -1.3V. At the same time, the base voltage of a clamping Q6 is set at -1.0V. Then a word line WL+ of the high voltage side is decided by the voltage VR2 and the base- emitter voltage of the Q6 and clamped, e.g., at -1.8V. In this case, the Q3 is virtually cut off and the output voltage of the address decoder gives no effect to the potential of the line WL+.
Patent JP-H0933604-A (JP)
Title: Method and apparatus for specification of failure mode
Inventor: SANADA KATSU
IPC: H01L21/8234
Filed: 1995-07-24
Abstract: PROBLEM TO BE SOLVED: To specify a failure mode in a short time and precisely by a configuration in which the feature of a power-supply voltage-to-power-supply current characteristic extracted by a specific procedure is compared with the similarity of a failure mode stored in a database and with that of data on the power- supply voltage-to-power-supply current characteristic. SOLUTION: The voltage-to-current V-I characteristic of a power supply used as a reference and data on a failure mode are stored at the inside of a personal computer 61 or in an external storage device 63, and a database is constituted. The singularity-point parametervalue of the V-I characteristic of a power supply for an LSI which comprises a failure is measured in advance so as to be stored in a storage device 65. The personal computer 61 takes into the parameter value of the LSI comprising the failure from the device 65, and it is compared with the parameter of the V-I characteristic of the power supply as the reference from the device (database) 63. Thereby retrieving, a similarity characteristic, specifying a failure mode comprising the characteristic, it is displayed on a display 62, and it is output to an output device 64.
Patent JP-H1023669-A (JP)
Title: System stabilizer
Inventor: IMAI MICHIHIRO
IPC: H02J3/00
Filed: 1996-06-28
Abstract: PROBLEM TO BE SOLVED: To obtain a system stabilizer which enables to judge fault phase unfailingly and to determine the control for stabilization properly. SOLUTION: A data, inputting part 2 receives the quantity of electricity and breaker information in an electric power system. A fault-detecting part 3 detects a fault from the quantity of electricity received, while a fault-phase detecting part 4 judges a fault phase from the result of detection by the fault- detecting part 3. Then, a fault-phase determining part 5 determines a fault phase from the result of the judgment by the fault-phase detecting part 4 and breaker information received, so that a stabilization controlling part 1 determines a control necessary to stabilize the electric power system based on the result of judgment of the fault-phase determining part 5.
Patent JP-S5889863-A (JP)
Title: Manufacture of semiconductor device
Inventor: KAWAJI MIKINORI
IPC: H01L21/8234
Filed: 1981-11-24
Abstract: PURPOSE:To remove the allowance of alignment, and to improve the degree of integration and yield by forming each region for forming an element in self- alignment shape. CONSTITUTION:SiO2 Layers 14 for isolation and P<+> type base sections 22 are prescribed simultaneously by common masks 8, and succeeding processes are all treated through a self-alignment system. Accordingly, since the processes of mask alignment can largely be reduced as a whole and the allowance of alignment can be removed substantially, working property is sharply improved while  the area of the element is contracted and the degree of integration can be ameliorated, and yield can also be bettered. Since a P type base section 25 and  an N<+> type emitter region 29 are also shaped severally through ion implantation  while using a Si3N4 film 6 etched in self-alignment form after a poly Si layer 19  is selectively grown as a mask, each semiconductor region forming a transistor  can be shaped in self-alignment form in every respect.