Patent GB-834722-A (GB)
Title: Improvements in magnetic tape writing system
IPC: G06Q10/08
Filed: 1957-11-22
Abstract: 834,722. Electrical digital-data-storage apparatus. GENERAL ELECTRIC CO. Nov. 22, 1957 [Nov. 26, 1956], No. 36442/57. Class 106 (1). A system for writing items of data successively on magnetic tape &c. is characterized by means for writing a locating mark at the beginning of a data item, a control circuit operative to cause a further mark to be written at the end of the item and to stop the tape, and comparison circuits for checking the correctness of the item and/or the interval between marks as the tape runs in reverse. Data items, which may consist of twelve digits, each comprising six binary signals plus a seventh for parity checking, are entered into a register before being recorded on the magnetic tape, the seven components of each digit being written in parallel tracks. During the latter process a pulse is recorded in a special marker track opposite the first digit of an item, a second pulse opposite the last digit of the item, and then a further pulse is recorded to mark the beginning of the next item and the tape drive is reversed. During the reverse movement the newly-entered data is checked for validity and parity and after the first of the three marks mentioned above has been passed, the drive is changed back to forward movement again. During this forward movement marking pulses which are no longer required are erased and then a new item is entered. Block diagram, Fig. 3.-It is assumed that the apparatus has stopped at the position in which forward driving of the tape follows the checking phase. A master pulse from a source 22 is applied to the tape speed control unit 20 via an OR gate 24 to start the tape running forward; also, via an OR gate 36, it sets a flip-flop 34 and via an AND gate controlled by a signal indicating that the validity check was good, a flip-flop 32 is set. Data from a source 26 (e.g. punched tape, magnetic drum, &c.) enters a shift register 30 via an AND gate 28 conditioned by signals from the flip-flops 32 and 34 and clock pulses from a source 40 which latter also controls a shift-pulse source 42 via an AND gate 38 and supplies pulses to a counter 44 which indicates when the register is full (after receiving 84 pulses) by sending a signal via an OR gate 46 to reset the flip-flop 34. This closes the gates 28 and 38 but opens a gate 31 to prepare the register for circulation of the data. Meanwhile marking signals picked up by a reading head 62 are fed to a counter 66 which provides outputs on lines C/1, C/2, C/3, &c. in succession provided the intervals between input signals are correct. One-shot multivibrators are employed to time these intervals (Fig. 4-not shown). An output on the line C/3 sets a flip-flop 70 which opens an AND gate 50 which allows pulses from a source 48 to be fed to a subtractive input of the counter 44 while the data in the shift register is circulated and fed into a staticizer 54. When the fourth marking signal changes the counter 66 to give an output on line C/4 a flip-flop 74 is set which, in turn, sets a flip-flop 80. Under the control of a synchronous pulse source 58 the output of flip-flop 80 opens an AND gate 84 and activates a tape data writing device 60 which copies data from the staticizer 54 on to the tape. A thirteen-step counter 82 counts the characters as they are written and, on reaching the twelfth position C/12, sends a signal through an OR gate 88 to cause a mark to be written at the end of the item by a device 90, and also resets flip-flop 80 so as to terminate the operation of the writing device 60. A further signal on line C/13 causes a mark to be written indicating the beginning of the next item and, via an OR gate 89, causes reversal of the tape movement. During the reverse movement the marking pulses picked up by the reading head 62 again step the counter 66 through its four stages. At C/1 a flip-flop 94 is set, whereby an AND gate 96 between tape data reading apparatus 98 and a validity and parity checking device 100 is opened. If an error is detected a flip-flop 102 is set; this may initiate further attempts to write the data still in the register but, if still unsuccessful, an indicator will be operated; the flip-flop 32 is reset to prevent the entry of new data into the register. If no error is detected a signal via an AND gate 104 sets a flip-flop 108. At C/4 an AND gate 106 opens to allow a flipflop 110 to be set and this activates an erase oscillator 112 which causes the removal of the marks no longer required. C/4 and the " reverse " signal from the tape control unit 20 also open an AND gate 114 to send a signal through the OR gate 24, changing the tape drive to " forward." Specification 767,431 is referred to.