baber/WOPTO huggingface dataset:
Patent SA-99200005-A (SA)
Inventor: HESS ALICE Y ROMANS
Filed: 1999-04-19
Abstract: يتعلق الاختراع الحالي بتركيب ماص يشتمل على بوليمر حمضي أو قاعدي قابل للانتفاخ وغير قابل للذوبان في الماء ، مادة ثنائية قاعدية أو حمضية، واختياريا ، عامل احتجاز حيث يظهر التركيب الماص خصائص ماصة مرغوبة . وعلى وجه التحديد ، يتعلق الاختراع الحالي بتركيب ماص يحتوي على إمكانية امتصاص كمية كبيرة من السائل مع الاحتفاظ بشكل pH مرغوب ومتوازن جوهريا فوق أو بطول السطح العلوي للتركيب الماص . يكون التركيب الماص مفيدا في المنتجات الماصة التي تستخدم لمرة واحدة ، مثل تلك المنتجات التى تستخدم لامتصاص سوائل الجسم .شكل (1)
Patent TW-200301186-A (TW)
Title: Injection compressed formation method and machine thereof
Inventor: OHSHIRO TAKEO
IPC: B29C45/77
Filed: 2002-12-19
Abstract: Disclosed is an ejection compressed formation method and its machine of sheet item using injection forming machine. The injection forming machine includes a pair of movable metal die and fixed metal die for forming a cavity, a movable die support for mounting the movable metal die, a fixed die support for mounting the fixed metal die, an injecting device for injecting a forming material into the cavity, and a die closing and pressuring device for moving the movable die support with respect to the fixed die support and for controlling a die closing force that is applied to the fixed die support by the movable die support during the time interval when the injecting device is injecting the forming material into the cavity. The present method comprises a step of load-free inflow for receiving the forming material in such a manner that prevents the die closing device from generating substantial inflow resistance to the injection of the forming material into the cavity by the injecting device. Further, in the injection forming process, a die closing process is provided to control the die closing device for applying a predetermined die closing force during the injection forming process via the material flowing into the cavity.
Patent TW-200306625-A (TW)
Title: Plasma treatment method
Inventor: FUJIMOTO KIWAMU
IPC: H01L21/3065
Filed: 2002-12-26
Abstract: The technical object of the present invention relates a method of plasma treatment which comprises etching an insulating film present on a Si-containing film (a barrier layer), conducting a cleaning within a treatment chamber, and then ashing a resist, or comprises conducting the etching of an insulating film present on the barrier layer and the ashing of a resist in separate treatment chambers, in which, in either case, the ashing of a resist is conducted with a plasma of a mixed gas consisting of a major amount of N2 and a small amount of H2. In the case that the etching of an insulating film present on the barrier layer is directly followed by the ashing of a resist on the insulating film, a material (a F radical or the like) being reactive with the barrier layer is generated from by-products having been formed in the etching step and attached to an article (a part) in the treatment chamber, which results in the etching of the barrier layer.
Patent TW-200301786-A (TW)
Title: Gettering method of transitional metal impurities in silicon crystalline
Inventor: HIROSHI YOSHIDA
IPC: C30B33/00
Filed: 2003-01-09
Abstract: Conventionally, it has been difficult to produce a silicon semiconductor device of a silicon crystal completely free of transition metal impurities diffusing ultrafast and having deep impurity levels. In a method for gettering transition metal impurities diffusing in a silicon crystal ultrafast and having deep impurities levels, silicon is simultaneously doped with two kind of impurities, oxygen and carbon, and the silicon is thermally annealed. Thereby an impurity composite of transition metal impurity atoms, C, and O is precipitated in the silicon crystal to confine the transition metal impurities in the silicon crystal. As a result ultrafast diffusion of the transition metal impurities is prevented and the deep impurities levels of the transition metal impurities are electrically inactivated. Thus, a silicon semiconductor device free of influence of the transition metal impurities such as Co, Ni, Cu mixed during the silicon single crystal production process and Cu mixed during the Cu interconnection formation can be manufactured.
Patent TW-200305008-A (TW)
Title: A pressure sensor and method of making the same
Inventor: CHEN CHIEN-HUA
IPC: G01L1/14
Filed: 2003-01-29
Abstract: A pressure sensor may include a first membrane that flexes in response to pressure, a reference cavity covered by the first membrane where the reference cavity contains a vacuum and a second membrane, adjacent to the first membrane, the first and second membranes forming a capacitor having a capacitance that varies in accordance with the flexing of the first membrane and the pressure.
Patent TW-200306032-A (TW)
Title: Flexible electrolyte membrane based on a support comprising polymer fibers, production thereof, and its use
Inventor: HENNIGE VOLKER
IPC: H01M4/86
Filed: 2003-02-24
Abstract: Proton-conductive flexible electrolyte membrane, intended for a fuel cell and impermeable to the reaction components of the fuel cell reaction, comprising a pervious flexible perforate support comprising polymer fibers, said support being pervaded by a proton-conductive material suitable for selectively conducting protons through the membrane. The invention relates to a proton-conducting membrane, to a process for producing it, and to the use thereof. The membrane of the invention constitutes a new class of solid proton-conducting membranes. The base is a porous flexible support, which comprises polymer fibers, preferably a polymer nonwoven. This support is infiltrated with a proton-conducting material, then the membrane is dried and the proton-conducting material is solidified to a gel or crystalline material so that at the end an impermeable proton-conducting membrane is obtained. The electrolyte membrane remains flexible and can be used readily as the membrane in a fuel cell.
Patent TW-200418136-A (TW)
Title: Method for forming a damascene structure
Inventor: KU TZU-KUN
IPC: H01L21/768
Filed: 2003-03-10
Abstract: A method for forming a damascene structure. An insulating layer is deposited on a substrate. A capping layer and a hard mask layer are successively formed on the insulating layer. Subsequently, the hard mask layer is etched to form at least one opening using the capping layer as an etching stop layer. A conformable metal layer is formed over the hard mask layer and the surface of the opening, and the metal layer is then anisotropically etched to form a metal spacer over the sidewall of the opening. Next, the capping layer and the underlying insulating layer under the opening are etched to form a trench therein. Next, the hard mask layer and the metal spacer are removed. Finally, the trench is filled with the conductive layer to complete the structure after the substrate is cleaned.
Patent TW-200419486-A (TW)
Title: Display mirror
Inventor: WU JIE-FARN
IPC: G09F9/30
Filed: 2003-03-24
Abstract: A display mirror, comprises a transparent substrate, a first electrode, an organic light-emitting portion, a second electrode, and a mirror plate. In this case, the transparent substrate has a first surface and a second surface which is opposite to the first surface. The first electrode is set on the first surface of the transparent substrate. The second electrode is set above the first electrode. The organic light-emitting portion is located between the first electrode and the second electrode. The mirror plate is combined with the second surface of the transparent substrate.
Patent TW-200306327-A (TW)
Title: Heterocyclic tin flame retardants/smoke suppressants and halogen-containing polymer composition containing same
Inventor: SHAH MUKUND
IPC: C08K5/3477
Filed: 2003-04-09
Abstract: Heterocyclic tin compounds, useful as flame retardants and/or as smoke suppressants for halogen-containing polymers, e.g., polyvinyl chloride resins having application as wire and cable coatings, are obtained by reacting a trisubstituted triazine such as melamine with a tin-containing compound such as tin tetrachloride.
Patent TW-200421775-A (TW)
Title: Update processing system and method for network devices
Inventor: CHEN TSUNG-HSING
IPC: H04L29/12
Filed: 2003-04-14
Abstract: An updating system of network device comprises a computer host used to transmit first packet and second packet. The first packet comprises the identification data corresponding to an updated data and the second packet comprises the updated data. A switch is coupled to the computer host and multiple network devices are used to receive the first packet to create IP addresses that correspond to the computer host and are not repeated one another. Moreover, based on the identification data of the first packet individually, the data with updated version is selectively generated in response to request of the identification data. When receiving the second packet, the updated data of the second packet and the stored non-updated data are compared respectively to generate a data to be updated and generate a new firmware for being written in corresponding memory based on the updated data to complete updating operation.
Patent TW-200405612-A (TW)
Title: Fuel cell, electrode for fuel cell, and method for manufacturing them
Inventor: NAKAMURA SHIN
IPC: H01M4/86
Filed: 2003-04-16
Abstract: The adhesion at the interface between the surface of an electrode and the solid polyelectrolyte membrane is enhanced, and the cell characteristics and the reliability of the cell are improved. A fuel cell comprising a solid polyelectrolyte membrane (114), a fuel electrode (102) provided on the electrolyte membrane, and an oxidizer electrode (108) also provided on the electrolyte membrane, in which the fuel electrode (102) has a catalyst layer containing carbon particles (140) carrying a catalyst, a first solid polyelectrolyte (150), and a second polyelectrolyte (160) having a stronger adhesion to the solid polyelectrolyte membrane (114) than the first solid polyelectrolyte (150).
Patent TW-200403933-A (TW)
Title: High-speed signal transmission system
Inventor: MURAKAWA MASAHIRO
IPC: H04B3/04
Filed: 2003-04-22
Abstract: The high-speed signal transmission system of the invention is dedicated to meet high-speed LSI chip access at digital signal clock frequency higher than GHz band to target at providing smooth digital high-speed signal of circuit external to chip. The high-speed signal transmission system of the invention is comprised by feedback of received signal, adjustment of circuit insertion based on the operator waveform of transmission loss from transmitter, pump-up of transistor carrier, pump-down device structure, transmission circuit distributed from transistor and using power eliminating circuit.
Patent TW-200406872-A (TW)
Title: Method of forming a through-substrate interconnect
Inventor: FARTASH ARJANG
IPC: H01L23/52
Filed: 2003-04-28
Abstract: Methods of fabricating a through-substrate interconnect (42) for a microelectronics device, the device including a substrate (30) having a frontside and a backside, are disclosed. Some embodiments of the methods include forming a circuit element (34) on the frontside of the substrate (30), forming a trench (38) in the backside of the substrate (34) that extends to the circuit element (34), forming a layer (40) of an insulating polymeric material in the trench (38), removing sufficient polymeric material from the layer (40) of insulating polymeric material to at least partially expose the circuit element (34), and forming an electrically conductive interconnect layer (42) in the trench (38). wherein the interconnect layer (42) is in electrical communication with the circuit element (34).
Patent TW-200400095-A (TW)
Title: Process for production of metallic powder and producing device thereof
Inventor: KAGOHASHI WATARU
IPC: C22B34/12
Filed: 2003-05-28
Abstract: The invention provides a process for production of metallic powder and producing device thereof, in which the metallic powder is obtained by discretely or continuously providing the raw metal material into a chlorinating furnace to continuously producing a metal chloride vapor through the reaction of reacting the raw metal material with a chlorine gas in the chlorinating furnace, and then reacting the metal chloride vapor with hydrogen gas in a reducing furnace in continuation. Under this circumstance, the weight of the chlorinating furnace during chlorinating reaction is measured and thereby the amount of the raw metal material fed into the chlorinating furnace is controlled based on the results of aforesaid measurement.
Patent TW-200405981-A (TW)
Title: Re-configurable streaming vector processor
Inventor: MAY PHILIP E
IPC: G06F9/355
Filed: 2003-06-11
Abstract: A re-configurable, streaming vector processor (100) is provided which includes a number of function units (102), each having one or more inputs for receiving data values and an output for providing a data value, a re-configurable interconnection switch (104) and a micro-sequencer (118). The re-configurable interconnection switch (104) includes one or more links, each link operable to couple an output of a function unit (102) to an input of a function unit (102) as directed by the micro-sequencer (118). The vector processor may also include one or more input-stream units (122) for retrieving data from memory. Each input-stream unit is directed by a host processor and has a defined interface (116) to the host processor. The vector processor also includes one or more output-stream units (124) for writing data to memory or to the host processor.
Patent TW-200401306-A (TW)
Title: Wordline latching in semiconductor memories
Inventor: GIESEKE BRUCE ALAN
IPC: G11C11/413
Filed: 2003-06-25
Abstract: A memory system, and method of operation therefor, is provided having memory cells for containing data, bitlines for writing data in and reading data from the memory cells, and wordlines connected to the memory cells for causing the bitlines to write data in the memory cells in response to wordline signals. A decoder is connected to the wordlines for receiving and decoding address information in response to a clock signal and an address signal to select a wordline for a write to a memory cell. Latch circuitry is connected to the decoder and the wordlines. The latch circuitry is responsive to the clock signal for providing the wordline signal to the selected wordline for the write to the memory cell and for removing the wordline signal from the selected wordline when the write to the memory cell is complete.
Patent TW-200406447-A (TW)
Title: Water-absorben, foam-form polymer structure
Inventor: HINTZ SANDRA
IPC: A61L15/42
Filed: 2003-07-10
Abstract: The invention relates to a process for the preparation of water-absorbent, foam-form polymer structure, wherein an aqueous composition (A) containing (A1) water, (A2) on or more polymers based at least on (α 1) from 55 to 100 wt.% of a polymerised, monoethylencially unsaturated, acid-group- containing monomer or its salt, and on (α 2) from 0 to 45 wt.% of a polymerised, monoethylenically unsaturated monomer that is copolymerisable with (α 1), wherein the sum of the amounts by weight of(α 1) and (α 2) is 100 wt.% and wherein at least 31.5 wt.% of the monomers, based on the total weight of the monomers (α 1) and (α 2), are acrylic acid or salts of acrylic acid, (A3) one or more crosslinkers, (A4) on or more blowing agents, (A5) one or more surfactants, (A6) and optionally further auxiliary substances, is foamed, and the foamed aqueous composition is then heated at temperature in a range of from 50 to 300 DEG C, so that the polymer (A2) crosslinks at least partially and the content of water (A1) is adjusted to not more than 15 wt.%, based on the total weight of the foam-form polymer structure that forms, and to a water-absorbent, foam-form polymer structure obtainable by that process, to a water-absorbent, foam-form polymer structure, to a composite comprising a water-absorbent, foam-form polymer structure and a substrate, to a process for the production of the composite, to composites obtainable by that process, to the use of the water-absorbent, foam-form polymer structure, and to chemical products.
Patent TW-200406640-A (TW)
Title: AlSixoy as a new bi-layer high transmittance attenuating phase shifting mask material for 193 nanometer lithography
Inventor: LIN CHENG-MING
IPC: G03F1/32
Filed: 2003-07-17
Abstract: A bi-layer attenuating phase shifting film and method of forming the film are described. The bi-layer film has a first layer of AlSix1Oy1 and a second layer of AlSix2Oy2. The first layer of AlSix1Oy1 and the second layer of AlSix2Oy2 are both deposited by sputtering using a sputtering system an aluminum target, a silicon target, a source of oxygen gas, and a source of argon gas. The index of refraction, n, and the extinction coefficient, k, of the deposited films are controlled by controlling the direct current, DC, power to the aluminum target and by controlling the oxygen flow rate. The values of n and k are selected to produce a bi-layer film having a transmittance of between about 15% and 45% and good chemical stability. The phase shift of the bi-layer film is determined by the index of refraction, extinction coefficient, and thickness of each of the films.
Patent TW-200418554-A (TW)
Title: Single panel golf club grip
Inventor: HUANG BEN
IPC: A63B53/14
Filed: 2003-07-28
Abstract: A grip for the handle of a golf club having a single polyurethane-felt panel that is wrapped about an underlisting sleeve. The side edges of the panel are adhesively sealed together. The unitary grip reduces impact shock and also provides a feeling of tackiness in the manner of a spirally wrapped polyurethane-felt grip.
Patent TW-200405662-A (TW)
Title: Complementary input dynamic muxed decoder
Inventor: AZAM MIR S
IPC: H03K19/00
Filed: 2003-08-22
Abstract: A muxed-decoder circuit including multiple complementary dynamic circuits and an AND logic gate. Each complementary input dynamic circuit includes a complementary P-logic AND dynamic circuit, a complementary N-logic AND dynamic circuit and a pass device. The complementary P-logic AND dynamic circuit has an output coupled to a corresponding output evaluation node, and evaluates bits of an encoded address value corresponding and bits of a digital select value having a logic state for selecting the encoded address. The complementary N-logic AND dynamic circuit has an output coupled to a corresponding preliminary evaluation node, and evaluates inverted bits of the address value and the digital select value. The pass device is coupled between corresponding the first and second evaluation nodes and drives the second evaluation node low if the complementary N-logic AND dynamic circuit fails to evaluate. The AND logic gate couples to the output evaluation nodes and provides a corresponding decoded bit.
Patent TW-200420173-A (TW)
Title: Display unit and its manufacturing method
Inventor: MORI TAKAO
IPC: H05B33/04
Filed: 2003-09-26
Abstract: The invention provides a display unit which can improve reliability and reduce a frame area by forming a protective film in a uniform film thickness over an entire display area, and its manufacturing method. An end face of the protective film is formed along a vertical plane including a corresponding end face of a sealing substrate. The end face of the protective film is formed into an approximately vertical cross section in the position of the end face of the sealing substrate, and the entire display area is covered with the protective film in a uniform film thickness. It is preferable that a distance between a lower end of the end face and the vertical plane is set to 2 mm or less. It is preferable that the end face of the protective film is formed by anisotropic etching using the sealing substrate as a mask, after the protective film is formed over a whole face of a driving substrate.
Patent TW-200512880-A (TW)
Title: Non-volatile memory and fabrication thereof
Inventor: CHANG KO-HSING
IPC: H01L21/8229
Filed: 2003-09-29
Abstract: A non-volatile memory structure and a fabricating method thereof are described. In the method, a mask layer is formed on a substrate, and a trench is formed in the mask layer and the substrate. A tunnel dielectric layer is formed in the trench, and then a floating gate is formed in the trench. The mask layer is removed. A high-voltage doped region is formed in the substrate on one side of the floating gate to serve as a first source/drain region and a control gate simultaneously, and then a second source/drain region is formed in the substrate on the other side of the floating gate.
Patent TW-200406824-A (TW)
Title: Material for pattern formation and method for pattern formation
Inventor: KIM JOO-HO
IPC: G11B7/26
Filed: 2003-10-01
Abstract: When a patterning process is performed on a processed substrate, each side of photoresist layer are formed with optical thermal converting layer, wherein a patterning process with high aspect ratio can be performed by a thermal effect on the photoresist. A material for pattern formation includes an optical and thermal sensing material layer formed on the processed substrate. At first side of the optical and thermal sensing material layer, a first optical thermal converting layer is formed between the optical and thermal sensing material layer and the processed substrate. A second optical thermal converting layer is formed on the opposite second side of the optical and thermal sensing material layer.
Patent TW-200410253-A (TW)
Title: Semiconductor memory device and control method thereof
Inventor: TAKAHASHI HIROYUKI
IPC: H01L31/109
Filed: 2003-10-28
Abstract: The present invention provides a semiconductor memory device wherein the delay by a refresh operation is insensible from outside for attempting to achieve high speed and low cost. A semiconductor memory device includes a plurality of memory cells. The memory cell includes two transistors Tr1, Tr2, connected between write-type bit line B(WF) and read-type bit line B(RF), and a data storage capacitor C wherein the control terminals of the two transistors are connected to the write-type word line W(WF) and the read-type word line W(RF), respectively. The semiconductor memory device further includes determining means (132) for comparing a refresh address with the selected address by a read/write signal among read/write addresses from input address signals contained in the address containing circuit 130. When the comparison result is different, one of the operations of the read/write types selecting the read or write address, and the refresh operation using the other type of the read/write types selecting the refresh address are executed in the same cycle. On the other hand, as the comparison result is the same, a read or write operation using the word line and bit line corresponding to one of the read and write types is executed.
Patent TW-200409827-A (TW)
Title: Plasma processing apparatus
Inventor: OSADA TOMOAKI
IPC: C23C16/26
Filed: 2003-11-13
Abstract: This application discloses a practical plasma processing apparatus capable of plasma confinement without plasma-density non-uniformity and electric power loss. The apparatus comprises a plasma shield that surrounds a plasma generation region to prevent plasma from diffusing. The shield has at least opening. The apparatus comprises a diffusion prevention electrode for preventing the plasma from diffusing through the opening of the plasma shield. The surface of the plasma shield exposed to the plasma is made of insulator. The diffusion prevention electrode is located where electrons diffusing toward the opening or having diffused through the opening from the plasma flow into itself.