Patent GB-1368013-A (GB)
Title: Method and application thereof for transmitting information over a common signal path
IPC: H04B1/713
Filed: 1972-07-13
Abstract: 1368013 Selective signalling GES ZUR FORDERUNG DER FORSCHUNG AN DER EIDG TECHN HOCHSCHULE 13 July 1972 [5 Oct 1971] 32695/72 Heading G4H Data from sensors FW ... TH, Fig. 1, in senders 1 ... n is transmitted simultaneously over a common signal wire to a central receiver with the aid of n respective orthogonal carrier signals (Walsh functions Fm(t) being chosen for this purpose) on which the data is impressed. The data is transmitted continuously from each sender as an 8-bit word (see Fig. 10), each bitlength being equal to the length of a Walsh function cycle: a binary " 1 " (from sender m) is indicated by the presence of the Walsh function Fm(t) for that sender, and " 0 " by the absence thereof. Sensors FW are variable resistors which detect e.g. oil leakage from an HT cable: they control threshold circuits SW, Fig. 6 (not shown), to produce outputs AB. The temperature in the cable is measured at spaced points by thermistors TH in multivibrator circuits AD, Fig. 4 (not shown), whose outputs are variable frequency pulse trains TE converted at C, Fig. 3 (not shown), to Graycode outputs TB. The 8-bit parallel signal TB ... AB is converted to serial form at ST, Fig. 2( not shown), and opens or closes NAND gates TA (Fig. 2) which pass or block the Walsh function WA for that sender from a generator W (Fig. 2) (symbolically : a " 1 " enables a gate which passes WA, and the oscillations of WA open and close a switch K in a circuit comprising the common signal wire and a return wire). All signals are applied to the common signal wire as current variations which develop voltage variations across a resistor R in the receiver. If the sensors in sender m produce a data signal Am(t), then the composite signal is of the form (Fm is the Walsh function of order m). Since the Walsh functions Fm(t) are orthonormal, (where a cycle of duration T begins at an instant to the T for all Fm(t), and transmission is of duration #tm). If now each cycle (bit length) is divided into s#2r#n time divisions #, then this may be written  The n data signals are obtained bit by bit by eight times building up n sums SF m  each eventually containing s terms S(#)F m (#) in a shift register 24, Fig. 8, each stage contains one such sum, these being circulated and the appropriate term being added when its sum is present at the output 22 thereof. The signal S(t) is passed through an A/D converter 20, Fig. 8 to produce binary signals representing 1S1 and the sign of S. 1S1 is fed to a shift register 21, and the sign output is combined with the incoming Walsh function and its complement WA, WA in gates 34 ... 39 to enable the 1 or 0 output from 21. Since the Fm(t) all have amplitude 1, addition of a term SF to 24 is equivalent to adding 1S1 or 1S1 from 21: this is effected by means of gates 34 ... 39 and an adder circuit 26. After ns additions and shifts in register 24 the n 1st bits have been regained; these are passed to a shift register 28 and the process is repeated seven times. When all n 8-bit words have been regained, 28 contains the n 1st to 7th bits and 21 contains the n 8th bits; the 1st bits are then shifted back into 24, and the 8th bits are shifted into 28. The whole procedure is then repeated 31 times: at the 32nd pass through register 28, the data is gated to output A.