Patent GB-1181091-A (GB)
Title: Magnetic Circuit
Inventor: SMITH JAMES LANSON
IPC: G11C19/10
Filed: 1967-02-21
Abstract: 1,181,091. Magnetic storage devices; exchange systems. WESTERN ELECTRIC CO. Inc. 21 Feb., 1967 [4 March, 1966], No. 8177/67. Headings H3B and H4K. Multifrequency input information from a subscriber is converted into dial pulses by changing each digit of the input, in turn, into a one-out-of-ten code, this code being entered into a write portion 12 of a magnetic domain wall device by reversing the magnetic direction of two adjacent reference positions and by reversing at the same time a third position spaced from the reference positions in accordance with the value of the input digit. Each digit when recorded is moved along the wire into a buffer portion 13, and when a " digit accept " signal is received, the digit is transferred to a read-out portion 14, transfer of a digit from the buffer to the read-out portion taking precedence over transfer from the write to the buffer portion. The domain wall device may comprise a magnetic wire 11 with reference positions established in the write portion 12 by energizing coils CR, the magnetized reference positions transferred to the buffer and read portions 13, 14 being located by coils 30, 31 and 62, 63 respectively. The digit wires C1 . . . C7 . . . C0 from a multifrequency to one-out-of-ten translator T are connected to respective coils (not shown) spaced along the write portion of the wire. The reversed magnetization positions are stepped from the write to the buffer portion by energization of two parallel groups of coils 16 from a 4-phase write pulser 18, and are stepped from the buffer to the read portion by 4-phase energization of similar coils 53 from a read pulser 51. The write pulser 18 becomes operative, as soon as a digit is recorded, through a differentiator 21, a set bi-stable circuit 22, a short duration delay A and a set bi-stable circuit 25, the AND gate 23 in the path being open when a bi-stable circuit 45 is in the reset state and a positive clock pulse is obtained from a source 43. When the reference positions of a recorded digit are detected in the buffer portion by coils 30, 31, bi-stable circuits 22 and 25 are reset and digit movement along the wire ceases. Reading is started by applying a " digit accept" pulse to terminal 40 which sets bi-stable circuit 41, and so enables bi-stable circuit 45 to set over an AND gate 42 when a negative clock pulse is received from source 43. Read pulser 51 is then operative and moves the digit stored from the buffer portion into the read portion. A bi-stable circuit 60 is set when the digit reference positions are detected in the read portion by coils 62, 63, and the clock pulses from source 43 are enabled to pass to the output through AND gate 66. The clock output pulses constitute the dial pulses required and are in time with the stepping movement of the recorded digit along the wire 11. When the third reversed magnetization position, representing the digit value, is detected by a coil 61, the bi-stable circuit 60 is reset and the dial pulse output terminates. Consequent upon each output pulse, bi-stable circuit 45 is temporarily reset over OR gate 70, until the next clock pulse is received so as to permit a further digit to advance from the write to the buffer portion. Resetting of bi-stable circuit 60 causes bi-stable circuit 41 to be reset over a differentiator 72 and OR gate 77. A monopulser M is provided for transmitting a resetting pulse to bi-stable circuit 45, so permitting digit writing if a " digit accept " signal is received when the domain wire is clear of information. An interdigit spacing circuit 74 is operative until disabled by a pulse from differentiator 72.