Patent GB-1089551-A (GB)
Title: Improvements relating to television systems
Inventor: DAVIS JOHN CHRISTOPHER HAMMOND
IPC: H04N7/14
Filed: 1963-12-13
Abstract: 1,089,551. Multiplex pulse code signalling; television. BRITISH TELECOMMUNICATIONS RESEARCH Ltd. Dec. 14, 1964 [Dec. 13, 1963], No. 49378/63. Headings H4F and H4L. In a television system arranged to transmit both audio and video signals of limited bandwidth, e.g. a video-telephone system, the audio and video information is combined and transmitted by pulse code modulation (P.C.M.) as a common pulse stream using pulses of constant amplitude. The P.C.M. encoder and corresponding decoder may be common to both the audio and video signals, and the timing arrangements for the video and P.C.M. equipments may also be common. The audio signals are transmitted during the line fly-back period and in addition to line interlace, dot interlace may be used, in which only alternate dots (elemental areas) are scanned in each line sweep, to double the line scan frequency and thus the audio sampling frequency. Alternatively double dot interlace may be used in which only every fourth dot is scanned in each line sweep, line interlace not then being employed. In both these methods each complete frame comprises four fields. In the system employing dot and line interlace, Fig. 2, the basic line bit rate is chosen at 1À6 x 10<SP>6</SP> bits per second (1À6 Mb/s.) and the video signals are quantized into 8 levels thus requiring three bits per video sample, and the speech signals are quantized into 64 levels corresponding to 6 bits per audio sample. Timing circuits form the major part of the equipment, the output of a 1À6 Mc/s. crystal controlled oscillator driving a pulse generator PG being first divided by 3 to give the video sampling frequency and subsequently divided (see Specification) to derive the line sweep frequency (6À06 Kc/s.), the half frame rate (24À74 c/s.) and the frame rate. The sync generation circuits LSG and FSG generate the digital synchronizing signals which are transmitted to the receiver during the line blanking period and also send sync pulses to the camera CM and to the delay circuit DL1 which is switched in during the alternate half frames (fields 1 and 2). Delay circuit DL1 is necessary in order to effect correct dot interlace since the samples of fields 3 and 4 are displayed in the gaps of fields 1 and 2 by introducing a 1À5 bit delay, which is 0À94 Ás, into the video path at the transmitter during fields 1 and 2 and at the receiver during fields 3 and 4, 1À5 bit periods being the width of each video sample applied to the display tube, i.e. half the width of each video sample period. All the necessary signals except the video information are transmitted during the line fly-back period, Fig. 1, not shown, which is chosen to last for 24 bit periods, 9 bits being used for the basic PCM sync which is also the video line sync, 2 bits for the field sync (two being required to distinguish odd and even fields because of line interlace), 1 bit to indicate which half frame is being transmitted for correct dot interlace, 6 bits for speech samples, 3 bits for a guard space and 3 spare bits. Encoder ENC is a 6-digit linear feed-back type, only 3 digits being used for the video signals. The audio signals are passed to the encoder at the appropriate time during the line blanking period, i.e. bits 4-9, Fig. 1, not shown, by means of gate G1. In the system employing double dot interlace, Fig. 4, not shown, the line scanning frequency for the same total number of lines per frame is twice that of the line and dot interlace system and thus it is possible to reduce the number of lines and increase the number of samples per line, i.e. change the aspect ratio, and still retain a line sweep frequency high enough to make audio sampling once per sweep satisfactory. In this arrangement the field sweep frequency is derived as before by means of divider circuits from the line sweep frequency and in order to obtain double dot interlace a delay of half the video sampling period is introduced into the video circuit at the transmitter so as to be effective on odd and even numbered lines in alternate fields and a delay of a quarter of the video sampling period is introduced during alternate pairs of consecutive fields, a similar delay being introduced at the receiver during periods when it is not operative at the transmitter. Provided the appropriate delay is switched in before each line, there can be any number of lines, odd or even, in the complete frame. Thus an accurately controlled number of lines is not necessary and the field sweep generator at the transmitter may be semi-free-running, Fig. 5, not shown. If the number of lines is even or not specified exactly, correct dot interlace is achieved by ensuring that the half-sample delay is switched in during lines of alternate fields and not switched in during the intervening fields.