baber/WOPTO huggingface dataset:
Patent JP-H1114606-A (JP)
Title: Measuring method of aluminum content its aluminum etching solution
Inventor: TAKARAYAMA TAKAHIRO
IPC: G03F7/40
Filed: 1997-06-26
Abstract: PROBLEM TO BE SOLVED: To facilitate management of aluminum etching solution, by calculating the aluminum content from a measured acoustic velocity value, by using the correlation between the aluminum content in the aluminum etching solution and the ultrasonic wave acoustic velocity value in the solution. SOLUTION: A glass substrate on which an aluminum thin film is stuck is subjected to etching treatment by using aluminum etching solution composed of phosphoric acid or the like, and the etching solution after treatment is sampled. The aluminum content in the sampled solution is analyzed by a high frequency plasma emission spectrochemical analysis method or the like. Ultrasonic wave oscillation is applied to the sampled solution, and the acoustic velocity is measured. High correlation exists between the aluminum content and the acoustic velocity value. The correlation between the aluminum content and the acoustic velocity value is previously obtained. By using the correlation, the aluminum content in the solution can be continuously measured, when the acoustic velocity value in the etching solution is continuously measured.  Thereby the aluminum content in the etching solution can be managed to be always lower than or equal to a set value.
Patent JP-S57111749-A (JP)
Title: Control system of data processing system
Inventor: INAO MASAAKI
IPC: G06F11/00
Filed: 1980-12-29
Abstract: PURPOSE:To continue an operation of a system even when an error has been detected in an LSI, by providing a simulating means of a CPU operation on s service processor, and also providing a triggering means for informing to the CPU of its specific state. CONSTITUTION:When an error has been detected in the course of operating a system, a service processor SVP scans out SCO an internal state of a CPU, detects a critical path CPS of the CPU, decides a logical expression for simulating a specific condition of the CPS, and stores it in a FiLE. When the CPU detects the specific condition, a trigger signal TRG is generated, the SVP stops supplying a clock CLK to the CPU, freezes an internal state of the CPU, and a necessary internal state is scanned out SCO through an SVP link. The SVP applies the SCO information to the logical expression of the FiLE, and simulates the information information corresponding to an output of the CPS. When its  result is scanned into the inside of the CPU through the SVP link and supply of  CLK is restarted, the CPU is considered to have passed through the CPU and  executes the subsequent operation.
Patent JP-S6247729-A (JP)
Title: Position detecting device
Inventor: YAMANAMI TSUGUNARI
IPC: G06F3/046
Filed: 1985-08-27
Abstract: PURPOSE:To reduce the cost and to increase the detecting output with a position detector by forming a position detecting part with the magnetic matters and the coils wound round these magnetic matters. CONSTITUTION:A position detector consists of a position detecting part 10, an input part 20, a driving signal source 30, a signal selecting circuit 40 and a position detecting circuit 50. The part 10 is formed with plural long magnetic matters 11 set in parallel with each other and the coils 12 wound round the matters 11. A bridge circuit is formed by combining two coils 12 and a prescribed impedance element. These coils 12 are switched successively for extraction of voltage out of a part between detecting terminals. Then a position designated by the pen 20 can be detected.
Patent JP-S57116450-A (JP)
Title: Digital transmissionsystem integrated with service
Inventor: KURAUSU KURURU
IPC: H04Q11/04
Filed: 1981-11-25
Abstract: A terminal device for use in a service integrated, multiplex digital signal transmission system which includes an optical fiber waveguide line connected to the terminal for conducting a light signal and a member for modulating the light signal with multiplexed narrowband signals and multiplexed broadband signals, the terminal device including narrowband signal processing devices connected to the optical fiber waveguide line for transforming only narrowband signals between a multiplexed state and a demultiplexed state, broadband signal processing devices connected to the optical fiber waveguide line for transforming only broadband signals between a multiplexed state and a demultiplexed state, a member connected for normally supplying operating power to said signal processing means from local utility mains, a charge accumulator for supplying operating power in the event of interruption of the power supply by the local mains, and elements connected for switching the terminal device to effect signal transmission at a reduced bit rate in the event of such local power interruption. The terminal device further includes a signal detector connected for monitoring signal transmission and connected to the switching elements for causing operating power to be supplied from the accumulator for signal processing only during times when signal transmission is taking place.
Patent JP-2000021482-A (JP)
Title: Slot type board assembling device
Inventor: IKEDA TOSHIHIRO
IPC: H05K9/00
Filed: 1998-07-03
Abstract: PROBLEM TO BE SOLVED: To provide a slot type board assembling device capable of electrically stabilizing the grounding of a card board and restricting the radiation of unwanted electric waves, without providing a conventional shield plate in the card board. SOLUTION: In this board assembling device, a card board 1 is provided with an elastic metal piece 5 as a conductor piece to be pushed to any one of the inside ceiling surface 3a and the inside bottom surface 3b of a card rack by the elastic force of the elastic metal piece 5 itself in the condition that the card board 1 is inserted for installation along slot guide rails 2a, 2b provided in the inside ceiling surface 3a and the inside bottom surface 3b of the card rack, and this elastic metal piece 5 is connected to a ground pattern 9 of the card board 1.
Patent JP-S6079027-A (JP)
Title: Epoxy resin composition
Inventor: SATOU SHIGEYUKI
IPC: C08K5/54
Filed: 1983-10-06
Abstract: PURPOSE:To improve the moisture resistance and rust prevention of an epoxy resin, by adding a specified silicone compound and oxidized carnauba wax to the epoxy resin. CONSTITUTION:A curing agent, an alkylarylsilsesquioxane silicone compound of the formula (wherein 1-6R are earch an alkyl or the like) and an additive comprising oxidized carnauba wax are added to an epoxy resin. Said silicone compound is added to the epoxy resin in an amount of, preferably, 0.1-5pts.wt. per 100pts.wt. epoxy resin. The resulting epoxy resin composition is throught to be effective in improving moisture resistance and rust prevention in such a way that when the composition is used as a sealing resin or the like, the above additive is sandwiched between the composition and an adherend and preventes external moisture and ionic impurities from penetrating into the surface of the adherend.
Patent JP-S6169350-A (JP)
Title: Commutator type rotary electric machine
Inventor: JORAKU FUMIO
IPC: H02K7/14
Filed: 1984-09-10
Abstract: PURPOSE:To effectively obtain connection even if the relative angle of a field core varies by interposing a repeating conductive terminal having a circular contact between a field coil and a carbon brush. CONSTITUTION:Repeating conductive terminals 16a, 17a, 16b, 17b are disposed at the positions opposite to the conductive terminal of a field assembly 5 side, and conductive pins 20 are integrally provided to be connected with insulating repeating conductive terminals 16a, 17a, 16b, 17b. A carbon brush 28 is provided in a conductive cylinder 21, and the end of a pigtail 29 electrically connected with the brush 28 is connected with conductive contact pieces 23a, 23b. The contacts of the terminals 16a, 17a, 16b, 17b are in a circular shape, and even if the press-fitting angle of the assembly 6 is slightly different, the pieces 23a and 23b are effective contacted therebetween.
Patent JP-H0632653-A (JP)
Title: Grain dispersion-type zro2-based ceramic material and its production
Inventor: MATSUKI RYUICHI
IPC: C04B35/48
Filed: 1992-07-15
Abstract: PURPOSE:To provide the subject high-toughness and high-strength ceramic material excellent in thermal shock resistance and high-temperature characteristics. CONSTITUTION:The objective ceramic material with 0.2-50vol.% of nanograins dispersed in ZrO2 crystal grains. For the nanograins, each 1-30vol.% of at least two kinds selected from nonoxide and oxide nanograins is used. This ceramic material can be obtained by incorporating (A) ZrO2 powder with (B) at least two kinds selected from nonoxide and oxide powders <=400nm in mean diameter followed by molding the resultant mixture and then sintering the resulting form at >=1200 deg.C.
Patent JP-H0352143-A (JP)
Title: Reproducing device for charge image information
Inventor: TAKANASHI RYOYU
IPC: G11B9/00
Filed: 1989-07-20
Abstract: PURPOSE:To easily obtain a reproducing device having high reproduction efficiency without using a polarizer and a detector by providing a reading head composed of an optical modulation member operating in a light scattering mode. CONSTITUTION:A laser luminous flux from a laser beam source LSl is supplied to a charge image recording medium RM through a beam deflector PDEF and a lens L4. Since the electric field of a charge image recorded in the medium RM is impressed on the optical modulation material layer part PMLd of the reading head RHd, the member PMLd scatters laser beam passing through an electric field in accordance with the strength of the field impressed on the part PMLd. Thus, the laser luminous flux from the head RHd goes to a state where the intensity of light changes in correspondence with the charge pattern of the charge image recorded in the medium RM. Thus, a picture signal corresponding to the charge pattern of the charge image recorded in the medium RM can be obtained from a photoelectric converter PD where the laser luminous flux is given through the head RHd and a lens L5.
Patent JP-H0239608-A (JP)
Title: Time-division amplifying system
Inventor: MORIYAMA EIMATSU
IPC: H03F3/68
Filed: 1988-07-29
Abstract: PURPOSE:To collectively amplify plural N-channel input signals by switching the input signals by a switching frequency having a frequency band width specific times as wide as the maximum value of the occupied frequency band width of the input signals or wider, inputting the switched input signal to an amplifier, distributing the output signal of the amplifier into plural signals, delaying and synthesizing the signals, and after that passing the synthesized signal through a filter having a specific band width. CONSTITUTION:The intermodulation between the signals of respective channels out of N- channels is prevented by switching the N-channel input signals by the switching frequency having the frequency band width 2XN times as wide as the maximum value B of the occupied frequency band width of the input signals or wider and inputting the switched input signal to an amplifier 300. At this time, as a rule, no element to limit the band is permitted to be placed between an input signal switching device 200 and the amplifier 300. Further, after the output signal of the amplifier 300 is distributed into the plural signals, and the signals are delayed and synthesized, the synthesized signal is passed through a filter 400 having a band width 0.5 times as narrow as that of the switching frequency of the input signals or narrower and a passing band width wider than the maximum value B of the occupied frequency band width of the N-channel input signals. Thus, the plural input signals can be collectively amplified.
Patent JP-S57113288-A (JP)
Title: Manufacture of semiconductor device
Inventor: MATSUMOTO KAZUNARI
IPC: H01L29/41
Filed: 1980-12-29
Abstract: PURPOSE:To derive a substrate potential from a substrate surface by permitting a direct connection between the substrate and a wiring metallic material in a semiconductor integrated circuit with a two layer wiring structure comprising a metallic material like aluminium or the like and a multicrystal silicon. CONSTITUTION:A field oxide film 2 and a gate oxide film 3 are formed on a silicon substrate 1 and the gate oxide film 3 is selectively removed to form a first multicrystal silicon 4. Subsequently, a diffusion layer 5 for a source and drain use is formed by diffusing an impurity conductive oppositely to the substrate 1. Subsequently, an insulation film 6 is formed in the area except the surface of the multicrystal silicon 4 and the second multicrystal silicon 7 is covered over the surface of the multicrystal silicon 4. Subsequently, the first multicrystal silicon 4 and the second multicrystal silicon 7 adjacent to the former are removed, after an aluminium 10 is coated on the entire surface, the aluminium 10 is selectively removed. Subsequently, the second multicrystal silicon 7 is removed by using the aluminium 10 for a mask, and there is formed an area wherein a two layer structure wiring consisting of the multicrystal silicons 4, 7 and the aluminium 10 or the like can make contact with the substrate 1.
Patent JP-H0477015-A (JP)
Title: Optical coupling type relay circuit
Inventor: MIYAJIMA HISAKAZU
IPC: H03K17/78
Filed: 1990-07-16
Abstract: PURPOSE:To attain high speed switching and to improve the control performance by integrating the control sections of two control transistors-(TRs) and eliminating the need for a resistor between a photodiode array and an output MOSFET. CONSTITUTION:When an input signal is applied between input terminals 9a, 9b, a positive charge is charged up to the gates of control TRs (FETs) 5, 6 by a photoelectromotive force generated from a photodiode array 3, the FET 5 is interrupted and the FET 6 is conductive, an output MOSFET 8 is quickly turned on and keeps the ON state while the input signal is given. When the input signal is interrupted, the positive charge charged in the gates of the FETs 5, 6 is discharged through a resistor 4, the FET 5 is conductive and the FET 6 is interrupted, the stored charge between the gate and the source of a FET 8 is discharged through the FET 5 and the FET 8 is turned off.
Patent JP-H0917101-A (JP)
Title: Recording medium, data recorder to the recording medium, and device and method for reproducing data recorded in the recording medium
Inventor: NAKAI MASATOSHI
IPC: G11B19/02
Filed: 1995-06-30
Abstract: PURPOSE: To make it possible to confirm and select readily the contents recorded in a recording body by displaying an 'i' key icon indicating the presence or absence of the menu picture plane for each item at the lower layer on the main-menu picture plane. CONSTITUTION: Video data, audio data and secondary image data are reproducibly recorded in the same time zone on a plurality of files. The reproduction for an optical disk 10, wherein the video data are recorded in a hierarchical structure of a plurality of sequences and a plurality of programs at each file, is performed. At this time, an 'i' key icon, which indicates the presence or absence of a menu picture plane for each items (the title, chapter, speech, secondary image, angle or the like) at the lower layer of a menu picture plane, is displayed on the main-menu picture plane. Thus, the presence or absence of the various kinds of the menu picture planes for every file can be readily found at the time of the reproduction, and the various kinds of the menu picture planes can be readily displayed.
Patent JP-S6432832-A (JP)
Title: Connection pipe of electric cleaner
Inventor: HAMADA KOSAKU
IPC: A47L9/24
Filed: 1987-07-28
Abstract: PURPOSE: To prevent air leakage and a rattle by placing a sealing member on either a female pipe or a male pipe which are freely removably fitted into a suction hose or an extension pipe, and forming in the other pipe an abutting surface which abut to the sealing member from the pipe fitting direction. CONSTITUTION: When a male pipe 7 is fitted to the inner periphery of one end of a female pipe 5, the taper part of a locking projection 14 is pressed against the male pipe 7 and a clamp 11 is deformed in the direction in which the locking projection 14 is released, and when a through hole 15 in the female pipe 5 coincides with a locking recess 16 in the male pipe 7, the locking projection 14 is engaged in the locking recess 16 by the force of the clamp 11 to lock the pipes 5, 7 to each other. Also, the end face 22 of the male pipe 7 is made to hermetically abut to the sealing member 33 of the female pipe 55 from the fitting direction of the male pipe 7, i.e., from the direction of the axis, to compress the sealing member 33.  Since the sealing member 33 is held by the stepped surface 21 of the female pipe 5, the female pipe 5 can be molded easily, leakage of air from between the pipes can be prevented, and a rattle between the pipes can be prevented.
Patent JP-H1132055-A (JP)
Title: Buffer controller and buffer control method
Inventor: NISHIMURA KAZUTO
IPC: H04L49/901
Filed: 1997-07-14
Abstract: PROBLEM TO BE SOLVED: To perform lowest band compensation, without increasing the capacity of a buffer and without complicating read control to the buffer by performing the storage control of a common buffer to use the common buffer virtually as an individual buffer. SOLUTION: For this buffer controller 2, the route of reception data is identified in a route identification part 3, and based on the identified result and information for the storage position inside the common buffer 1 of the reception data stored in a storage part 4, a control part 5 performs control for storing in virtual manner the reception data inside the common buffer 1 for the respective routes. Since the reception data from the plural routes are virtually stored in virtual manner in the common buffer 1 for the respective routes, the common buffer 1 is used in virtual manner as the individual buffer provided for the respective routes. Thus, fixed buffering to all the routes is easily realized.
Patent JP-H0237882-A (JP)
Title: Method for driving solid-state image pickup element
Inventor: YAJI YUKIO
IPC: H04N5/3722
Filed: 1988-07-27
Abstract: PURPOSE:To easily obtain a solid-state image pickup element corresponding to a non-interlace by dividing the photoelectric converting element of respective columns into a constant groups and successively transferring a signal charge for respective groups through a vertical transfer register and a switching gate to a memory transfer register. CONSTITUTION:An M number of photoelectric converting elements 1 for respective columns, arranged at respective vertical transfer registers 3 adjoining to this and memory transfer registers 5 and 6 arranged for N (N is integer, two or above) pieces at respective rear steps of a vertical transfer register 3 are provided. The photoelectric converting element 1 is divided into an N number of groups at the interval of (N-1) pieces, and the signal charge for respective groups is successively transferred through the vertical transfer register 3 and a switching gate 4 to the memory transfer registers 5 and 6. Consequently, the construction of the photoelectric converting part of the element driven by the non-interlace can be the completely same as the element corresponding to the interlace. Thus, without deteriorating the photoelectric converting characteristic of a photodiode 1 and the transfer charge quantity of the vertical transfer register 3, the solid-state image pickup element corresponding to the non-interlace mode can be obtained.
Patent JP-S6433658-A (JP)
Title: Computer system
Inventor: OSHIKAWA KAZUNORI
IPC: G06F13/38
Filed: 1987-07-30
Abstract: PURPOSE:To reduce the load of a system bus and to simplify the CPU software structure by checking the status part included in a command block of a memory part so that a CPU knows the status of an input/output equipment and at the same time reading the command block out of a memory part of the CPU via a bus interface. CONSTITUTION:A CPU 1 delivers the address of a command block stored in a memory part to a bus interface 4. The interface 4 gives an access to the memory part of the CPU 1 based on said address and supplies the contents of the command block to perform the processing to a controller 3. Then the interface 4 writes the status obtained at that time point into the status part of the command block in the memory part of the CPU 1. While the CPU 1 delivers an address to the interface 4 and checks said status part to carry out the necessary processing in response to said checking result. Thus it is possible to reduce the load of a system bus and to simplify the CPU software structure.
Patent JP-H0241405-A (JP)
Title: Form stand
Inventor: YOKOO TSUNESABURO
IPC: A41H5/01
Filed: 1988-07-28
Abstract: PURPOSE:To lift and lower a form stand unit up to desired height and improve operation efficiency by fitting the form stand unit in a supporting cylinder housing an air cylinder inside and then controlling compressed air poured into space between the air cylinder and supporting cylinder. CONSTITUTION:A form stand unit 2 is fitted in the outer circumference of a supporting cylinder 6 housing an air cylinder 20 inside by a cylindrical unit 4 and then placed on a fixing ring 14 which is an engaging part. Then treads 36 and 38 provided in the lower part of actuator C are operated and compressed air is poured into the inside of the above-mentioned air cylinder 20 and space between the air cylinder 20 and supporting cylinder 6 in controlled state to lift and lower the form stand unit up to desired height and improve operation efficiency.
Patent JP-H0610897-A (JP)
Title: Axial flow ventilator
Inventor: FUKUDA MASAKATSU
IPC: F04D29/70
Filed: 1992-06-24
Abstract: PURPOSE:To prevent deterioration of performance and generation of vibration by removing sediment from a blade by injecting water from a nozzle, in an axial flow ventilator used in an flow environment with much sticking matter. CONSTITUTION:In an axial flow ventilator wherein disk wheels 7 having moving blades 3 are mounted on an inner casing 5 by radially securing stationary blades 1 between the inner casing 5 and an outer casing 6, the ventilator is constituted by respectively providing stationary blade washing nozzles 2 in the upstream between the stationary blades of the outer casing 6 and moving blade injecting nozzles 4 in the upstream of the moving blade.
Patent JP-H0537688-A (JP)
Title: Facsimile repeater
Inventor: NADATANI NAOYUKI
IPC: H04N1/00
Filed: 1991-07-29
Abstract: PURPOSE:To prevent deterioration in picture quality due to difference from line density at relaying. CONSTITUTION:An analysis section 5 analyzes a communication protocol data from a receiver and stores line density data and destination information from a receiver to a memory section 1. Moreover, a communication protocol data from a transmitter is analyzed to give destination information of the receiver of a final destination from the transmitter to a collation section 2 and the collation section 2 collates the destination information from the transmitter with the destination information stored in the memory section 1. A generating section 3 adds a line density data stored in the memory section 1 to the communication protocol data based on the affirmative result of the collation section 2 and sends the result to the transmitter. A control section 4 controls each section.