baber/WOPTO huggingface dataset:
Patent TW-429485-B (TW)
Title: Metal oxide semiconductor field effect transistor with buried contact short channel recessed gate
Inventor: WU SHIE-LIN
IPC: H01L21/335
Filed: 1999-11-04
Granted: 2001-04-11
Abstract: The method of forming transistor can include the following procedures. Pad insulation-layer is formed and stacked layer is formed. The stacked layer is patterned to define the openings of gate insulation region and separation region. Gate insulation layer and field oxide separation region are formed. After that, stacked layer is removed. The first type ion is implanted to form lightly doped region and the pad layer is stripped. Silicon layer is formed on substrate. Part of the silicon layer is removed to define the first opening. Sidewall structure is formed inside the first opening. Sidewall structure is used as mask to remove part of gate insulation layer in order to form a gate opening. The second type ion is implanted to form tunneling-resist region. After that, the first dielectric layer is formed. Gate is then formed inside the gate opening. Part of the first dielectric layer that is not covered by gate is stripped. The third type ion is implanted to form junction region. The second insulation layer is formed. Thermal treatment is then performed. Finally, the metallization process of connecting conduction wire is performed so as to complete the fabrication of transistor.
Patent TW-402681-B (TW)
Title: Method of measuring slight abrasion
Inventor: JENG YOU-REN
IPC: G01B5/28
Filed: 2000-01-20
Granted: 2000-08-21
Abstract: This invention is a method of measuring slight abrasion which is applied to measure the slight abrasion of a component having an abrasive surface. The method includes the following steps: (a) measuring the roughness of the abrasive surface after abrasion; (b) calculating one parameter of abrasive surface relative to the roughness; (c) establishing a distribution pattern model based on the said parameter; (d) employing the distribution pattern model and the said parameter to calculate the maximum of the roughness; (e) establishing a roughness distribution area based on the maximum; and, (f) calculating the deviation of the roughness distributing area. The said deviation is the slight abrasion amount. Using this invented measuring method, the slight abrasion amount of a machining surface can be precisely calculated.
Patent TW-514852-B (TW)
Title: Apparatus and method for performing a gray scale display using a subfield method
Inventor: KASAHARA MITSUHIRO
IPC: G09G3/291
Filed: 2000-01-21
Granted: 2002-12-21
Abstract: The invention provides an apparatus and a method applied to a plasma display panel or other display panel, achieving a gray scale display by using a plurality of weighted subfields. The apparatus comprises a gray scale limiting/difference diffusion circuit (17) for converting gray scale levels in a supplied image signal to specific gray scale levels that do not easily create pseudo contours in moving picture areas and to intermediate gray scale levels between the specific gray scale levels, and diffusing the difference between the converted gray scale level and the original gray scale level to adjacent pixels, and a dither circuit (19) for generating a video signal to display the converted gray scale level from the circuit (17) alternately in even and odd fields. The dither circuit (19) generates the video signal in which the gray scale levels offset the dither level above and below the dithered gray scale are alternately presented when the converted gray scale level is a dithered gray scale.
Patent TW-471989-B (TW)
Title: Welding process and welded joints
Inventor: WANG YUNG-SHIH
IPC: B23K33/00
Filed: 2000-03-22
Granted: 2002-01-11
Abstract: The invention relates to a method for forming a welded joint between abutting pieces of steel. The welded joint is produced by first forming a strength weld and then depositing additional weld metal on the toe of the strength weld to form a toughness weld. The fusion interface of the toughness weld forms a minimum angle with the direction of the maximum tensile load across the welded joint. The toughness weld toe is separated from the heat-affected zone of the strength weld to effectively prevent propagation of a crack initiated at the toughness weld toe into the heat-affected zone of the strength weld. The welded joint so produced is substantially resistant to failure by brittle fracture.
Patent TW-476870-B (TW)
Title: Branch transmission line, driver circuit, and semiconductor test system using same
Inventor: MORIKAWA YUHACHI
IPC: G01R31/28
Filed: 2000-03-31
Granted: 2002-02-21
Abstract: Two-divided transmission line, two-divided driver circuit and semiconductor test system involved therein which are able to reduce unnecessary ringing waveform at each receiving point of two-divided transmission line which is divided at intermediate point of the line that is driven at one end of one-transmission line, are provided. For this aim, two-divided transmission line for providing predetermined quality of waveform signal at first receiving point and second receiving point, having serial terminated register, third transmission line with predetermined characteristic impedance, and first and second transmission line each of which has 2 times of third transmission line's characteristic impedance, wherein the end of third transmission line is connected at the common end of first and second transmission lines and fast driving waveform signal is applied at the other end of third transmission line through the serial terminated register toward each receiving point of first and second transmission lines, comprises waveform improving means between the receiving point of first transmission line and the receiving point of second transmission line.
Patent TW-429311-B (TW)
Title: Molded tissue block
Inventor: KERSCHMANN RUSSELL L
IPC: G01N21/03
Filed: 2000-07-20
Granted: 2001-04-11
Abstract: A molded block, for holding a sample to be sectioned and examined, comprising a shank region integrally tapering to a specimen chamber having said sample embedded therein. The specimen chamber corresponds substantially to the cross-sectional size and shape of an imaging field of an imaging apparatus and may have a polygonal, for example, a rectilinear cross-sectional area. The shank region has a shape adapted for engagement with securing means for securing the molded block to a sectioning instrument and for positioning the block face in an optimal orientation for imaging. A mold is provided for preparation of a molded block. The mold defines an elongated cavity, including an opening at a proximate end for introduction of a selected material from outside said mold. The proximate end defines a shape of a size and shape adapted for engagement with a securing means, and the mold tapers to a distal end that defines a polyhedron of a size and shape suitable for sectioning.
Patent TW-440710-B (TW)
Title: A high color purity three-primaries spectrometer
Inventor: HO FANG-CHUAN
IPC: H04N9/31
Filed: 2000-05-16
Granted: 2001-06-16
Abstract: A high color purity three-primaries spectrometer, including a plurality of subprisms, has optical interference filters with three wavelength domains plated and tightly connected on the side of said subprisms, so that the yellow light wavelength domain is filtered out in the preceding stage to provide the high purity red, green, blue lights. Said high purity three primaries spectrometer can further reduce the number of layers of thin film double color spectrometric film system and the difficulty of manufacturing by designing and building a spectrometric prism through the mechanism of multilayer system dichroic mirror multiple reflection by using optical film.
Patent TW-464984-B (TW)
Title: Semiconductor device and process of fabrication thereof
Inventor: INOUE TATSURO
IPC: H01L21/8234
Filed: 2000-05-16
Granted: 2001-11-21
Abstract: In a process of fabrication of a semiconductor device having its gate insulation films differ from each other in film thickness, each of a semiconductor substrate and a gate insulation film has its surface prevented from being contaminated. This enables a new gate insulation film to be normally formed on the surface of the semiconductor substrate. The process includes the steps of: forming a first gate insulation film in a device forming region on the surface of the semiconductor substrate; forming a protection film on the first gate insulation film, the film being made of an inorganic material; forming a first photosensitive etching-resistance film on the protection film; etching the film by using the first photosensitive etching-resistance film as a mask to have the first gate insulation film of a predetermined one of the device forming regions exposed; removing the thus exposed first gate insulation film by using the protection film as a mask; having the surface of the semiconductor substrate exposed; and, forming a second gate insulation film on the thus exposed surface of the semiconductor substrate in a condition in which the protection film is not removed.
Patent TW-451466-B (TW)
Title: A method of erasing a non-volatile memory
Inventor: YAN CHING-FANG
IPC: G11C16/16
Filed: 2000-06-09
Granted: 2001-08-21
Abstract: The non-volatile memory is positioned on a substrate of a semiconductor wafer and has a memory array region. The memory array region has memory cells, word lines and a substrate line electrically connected to the substrate of each memory cell in the memory array region. The erasing method is to control a potential difference between a word line not to be erased and the substrate to within a specific range, then supply a predetermined first potential to a word line to be erased, thereafter float the word line not to be erased, and finally supply the substrate line with a predetermined second potential. The potential difference between the first and the second potential drive the charges stored in the floating gate of the memory cell electrically connected to the word line to be erased to move into the channel through the tunneling oxide layer to complete the erasing. The charges stored in the floating gate of the memory cell electrically connected to the word line not to be erased will be affected by factors such as an initial potential supplied to the word line not to be erased, the floated word line not to be erased, a change of the substrate potential, and a voltage coupling effect between the substrate and the word line not to be erased. So, the potential difference between the word line not to be erased and the substrate can be controlled to a specific range, and the memory cell not to be erased is not affected.
Patent TW-451277-B (TW)
Title: Selective hemi-spherical grain manufacturing process
Inventor: WU DE-YUAN
IPC: H01L21/00
Filed: 2000-07-07
Granted: 2001-08-21
Abstract: A selective hemi-spherical grain manufacturing process used for a substrate which has a bottom electrode of polysilicon capacitor formed thereon and a native oxide layer formed on the bottom electrode of polysilicon capacitor is disclosed. The steps of the manufacturing process are as follows: first, a plasma reaction is performed for the substrate to convert the native oxide layer formed on the bottom electrode of polysilicon capacitor into a silicon halide by using a halide as a reactive gas and the silicon halide is removed under a low pressure. Next, hemi-spherical silicon grains are formed selectively on the bottom electrode of polysilicon capacitor.
Patent TW-I228587-B (TW)
Title: Automobile operation recorder
Inventor: KOBAYASHI YUICHI
IPC: G01D9/00
Filed: 2000-07-20
Granted: 2005-03-01
Abstract: An automobile operation recorder includes a power connect/disconnect mechanism (70) for making the connect/disconnect of power for rotating a recording sheet in linkage with the loading/unloading of a cartridge into a recorder body. The power connect/disconnect mechanism (70) includes a linkage plate (51), operation piece (54) and a group of power connect/disconnect gears (90). The linkage plate and operation piece move integrally to a slide frame (42) which moves in linkage with the cartridge. The operation piece (54) includes an operation pin (55). The group of power connect/disconnect gears (90) include a linkage gear 73, which rotates in linkage with the loading/unloading of the cartridge (17) while it is kept in contact with the operation pin 55, and a transmission gear (75). The transmission gear (75) is supported by a swing lever (83) which swings in linkage with the linkage gear (73). When the cartridge (17) is accommodated in the recorder body, the transmission gear (75) protrudes toward a holder (31) for holding the cartridge to connect the power for rotating the recording sheet. In this configuration, the automobile operation recorder can be provided which suppresses its depth and can be surely mounted in an instrument panel.
Patent TW-451398-B (TW)
Title: Manufacturing method of trench isolator with a side extended structure
Inventor: TZENG HUNG-HUEI
IPC: H01L21/76
Filed: 2000-07-24
Granted: 2001-08-21
Abstract: The present invention provides a method for forming trench isolator, which comprises first forming a mask layer (such as silicon nitride or polysilicon) and a photoresist layer on a substrate, wherein the photoresist layer has an opening for defining trench; then, using isotropic etching process to form an opening wider than the trench by etching in the mask layer, and using directional etching process to define a trench along the existed opening of the photoresist layer in the substrate; after removing the photoresist layer, filling insulating material into the expanded opening in the trench and the mask layer for thereby forming a trench isolator with a side extended structure. In accordance with the present invention, the formed trench isolator not only fills up the trench but also extends and covers the substrate at the periphery of the trench, thereby the possibility to have defects on the edge of the trench is reduced.
Patent TW-473735-B (TW)
Title: Semiconductor memory with function for preventing unauthorized rewriting and copying
Inventor: YAMASATO KENJI
IPC: G11C7/00
Filed: 2000-08-31
Granted: 2002-01-21
Abstract: Generally, a rewritable and nonvolatile semiconductor memory has a mechanism wherein data writing and erasing are executed when predetermined data is written in a predetermined address region. In a semiconductor memory of the present invention, in order to prevent writing the predetermined data in the predetermined address region by a malicious unauthorized user, etc., for example, at least two or more data signal lines are crossed with each other, in a data bus connect section for interconnecting a data bus comprising a predetermined number of data signal lines inside and outside a package.
Patent TW-523708-B (TW)
Title: Data processing device, method therefor and program storage media
Inventor: MORITA TOSHIHIRO
IPC: G06F3/0482
Filed: 2000-11-03
Granted: 2003-03-11
Abstract: The invention relates to a data processing device and method therefor and program storage media, particularly pertaining to the data processing device and method therefor and program storage media for processing designated contents. The topics of the invention is to simply generate multiple combination of contents. The solution is that the display operation instruction program 112 calculates the percentage of each content in terms of at least one of the data contained in the resume data file 184 and data contained in display data file 182 as well as the data contained in screened data file 181, and the contents contained in contents file 161 are selected in accordance with the calculated percentage. The display operation instruction program 112 matches the selected contents with the corresponding package of data contained in the screened data file 181.
Patent TW-491791-B (TW)
Title: Cable saver mechanism
Inventor: LIM PUAT THIAM
IPC: B62M9/127
Filed: 2000-11-16
Granted: 2002-06-21
Abstract: A cable saver mechanism is provided in a cable of a cable operated component, such as a rear derailleur, to protect the cable operated component or a part of the bicycle when the bicycle falls over and the cable operated component, e.g., the rear derailleur, hits the ground. The cable saver mechanism has a first housing portion, a second housing portion and a biasing member disposed between the first and second housing portions to urge them apart from each other. The first housing portion has a first tubular section with a first end wall and first open end spaced from the first end wall. The first end wall includes a first cable bore with an internal section becoming wider towards the first open end. The second housing portion has a second tubular section with a second end wall and second open end spaced from the second end wall. The second end wall includes a second cable bore. The first and second open ends of the first and second housing portions are movably coupled together. The biasing member is disposed between the first and second end walls to urge the first and second housing portions apart from each other.
Patent TW-527557-B (TW)
Title: Enhanced associative Chinese input method
Inventor: JENG CHIOU-HAU
IPC: G06F3/023
Filed: 2000-12-22
Granted: 2003-04-11
Abstract: The invention discloses a Chinese input method comprising to input the first character of the Chinese phrase, and then to confirm no relevant second character in the associative character selection area. If the characters displayed on the selection area contains the required second character, then pick the second character. If the said procedure determines no existence of the second associative character, then use input apparatus to input the first literal root of the second character. At this moment, display all characters in compliance with the first literal root and relevant associative phrase of the first character in sequence and ahead of the all other characters in selection area. Use such procedure to screen most of irrelevant phrases and pick the second character presented in the selection area, in that sense, the required associative character can be acquired.
Patent TW-499525-B (TW)
Title: Iron comprising a pump for mixing water and textile adjuvant
Inventor: BOULEAU JEAN-PAUL A A
IPC: D06F75/14
Filed: 2001-01-20
Granted: 2002-08-21
Abstract: The invention concerns an iron comprising a water reservoir (5), a textile additive reservoir (12), and a pump (15) comprising a mixing chamber (20) capable of sucking into the mixing chamber a dose of water and a dose of additive via an additive proportioning tap (34), so as to produce in the mixing chamber a diluted additive solution, and of conveying said solution towards a sprayer (16). The invention is characterized in that pump (15) is of the piston type mobile in a body (18) and defining the mixing chamber (20) which emerges into the water reservoir (5) via a non-return valve, and said pump (15) also serves as additive proportioning tap (34).
Patent TW-501267-B (TW)
Title: Circuit and method for trimming integrated circuits
Inventor: SHYR YOU-YUH
IPC: G11C17/18
Filed: 2001-01-20
Granted: 2002-09-01
Abstract: A programmable after-package, on-chip reference voltage trim circuit for an integrated circuit having a plurality of programmable trim cells generating a programmed sequence. A converter is provided to convert the bit sequence into a trim current. The trim current is added to an initial value of a reference voltage to be trimmed, as generated by the integrated circuit. Once the correct value of the trim current is determined, isolation circuitry is programmed to isolate the trim circuitry from the remainder of the IC, thereby freeing the logic and package pins associated with the IC for use by users of the IC. The preferred trim circuitry includes fuses which are blown in accordance with a bit value supplied to the trim cell to permanently fix a trim current value, once a best fit value is determined.
Patent TW-569324-B (TW)
Title: Method of drying after performing a semiconductor substrate cleaning process
Inventor: TU JI-CHENG
IPC: H01L21/302
Filed: 2001-02-02
Granted: 2004-01-01
Abstract: A method of drying after performing a semiconductor substrate cleaning process comprises, after performing the abovementioned cleaning process, and using two pipelines to separately introduce N2 gas and a mixture gas of N2 and IPA into a dryer to performing a drying treatment in order to remove residual moisture from the semiconductor substrate. The invention is characterized in that the IPA flow is reduced during the drying process.
Patent TW-587085-B (TW)
Title: Nanoparticle dispersed structure and laminate thereof
Inventor: SUZUKI MASAAKI
IPC: B32B27/00
Filed: 2001-05-31
Granted: 2004-05-11
Abstract: To provide a nanoparticle dispersed structure featuring a polymer having a crosslinked structure that is chemically inert with respect to the nanoparticles and that is effective in suppressing diffusion, and to provide a method for manufacturing this nanoparticle dispersion. A nanoparticle dispersed structure characterized in that nanoparticles of a substance selected from among (i) metals, (ii) metal compounds, and (iii) semiconductors are dispersed in a crosslinked polymer.
Patent TW-483972-B (TW)
Title: Jetty construction method
Inventor: JUANG REN-LIANG
IPC: E02B3/06
Filed: 2001-03-20
Granted: 2002-04-21
Abstract: This invention is of a jetty construction method. It includes: (a) setting a jetty deck; (b) setting a vertical form; (c) setting a bevel side form; (d) placing a stabilizing member: setting on the jetty deck and outside of the bevel side form; (e) placing several slope connecting rods: with their two ends respectively settled on the stabilizing member and outer end of the bevel side form; (f) grouting; (g) form removal. The stabilizing member will compress the slope connecting rods to press the bevel side form in order to stabilize the bevel side form and prevent any form explosion.
Patent TW-466330-B (TW)
Title: Precision gunnery simulator system and method
Inventor: VARSHNEYA DEEPAK
IPC: F41G3/26
Filed: 2001-03-23
Granted: 2001-12-01
Abstract: A turret mounted gun on a shooter tank with a laser scanner transmitter in its barrel emits a laser beam upon a trigger pull. The laser beam is directed toward a target tank based upon a shooter's ranging and tracking using a standard fire control computer to provide conventional ranging and tracking. The target tank is scanned with the laser beam to measure target azimuth and target elevation with respect to boresight of the gun of shooter tank. Optical receivers mounted on the turret of the target tank detect the laser beam and a system control unit determines the trigger pull time, target azimuth and target super elevation. The system control also determines a range to the target tank by comparing a set of GPS coordinates of the two tanks. Based on the target azimuth, the target super elevation, the range to the target and the time of the trigger pull, the system control unit computes an impact point relative to the target tank of a simulated ballistic shell fired from the gun of the first tank at the time of the trigger pull. Casualty assessment is made and the impact point is transmitted back to the shooter for immediate feedback.
Patent TW-506133-B (TW)
Title: Semiconductor device of SOI structure
Inventor: ADAN ALBERTO O
IPC: H01L29/786
Filed: 2001-04-04
Granted: 2002-10-11
Abstract: A semiconductor device of SOI structure comprises a surface semiconductor layer in a floating state, which is stacked on a buried insulating film so as to construct an SOI substrate, source/drain regions of second conductivity type which are formed in the surface semiconductor layer, a channel region of first conductivity type between the source/drain regions and a gate electrode formed on the channel region through a gate insulating film; wherein the surface semiconductor layer has a potential well of the first conductivity type formed therein at and/or near at least one end of the channel region in a gate width direction thereof.