baber/WOPTO huggingface dataset:
Patent TW-539585-B (TW)
Title: Nitrided valve metals and processes for making the same
Inventor: RAO BHAMIDIPATY K D P
IPC: B22F1/12
Filed: 2001-03-01
Granted: 2003-07-01
Abstract: Nitrided valve metals are described, such as nitrided tantalum and nitrided niobium. The nitrided valve metals preferably have improved flow properties, higher Scott densities, and/or improved pore size distribution which leads to improved physical properties of the valve metal and improved electrical properties once the valve metal is formed into a capacitor anode. Processes for preparing a nitrided valve metal are further described and involve nitriding the valve metal at a sufficient temperature and pressure during a heat treatment that is prior to the deoxidation step. Capacitor anodes and other products incorporating the valve metals of the present invention are further described.
Patent TW-479284-B (TW)
Title: Single tunnel gate oxidation process for fabricating nand flash memory
Inventor: HAN K MICHAEL
IPC: H01L27/115
Filed: 2001-03-07
Granted: 2002-03-11
Abstract: A single tunnel gate oxidation process for fabricating NAND memory strings where the gate oxide (24) of the select transistors and the floating gate memory transistors are fabricated in a single oxidation step is disclosed. The select gate transistors and the floating gate memory transistors have an oxide thickness of 85 Å to 105 Å. For single tunnel gate approach, a careful selection of the medium doped source/drain region (62) implant conditions is necessary for proper function of the NAND memory string. In one embodiment, the medium doped source/drain region is doped with arenic to a concentration of 10<SP>13</SP> to 10<SP>14</SP>/cm<SP>2</SP>.
Patent TW-522268-B (TW)
Title: Method for reducing strain on bragg gratings
Inventor: OLSON GRIEG ALAN
IPC: G02B6/36
Filed: 2001-03-13
Granted: 2003-03-01
Abstract: A method is provided for securing an optical fiber Bragg grating to a retaining element having a helical groove. In accordance with the method, an optical fiber Bragg grating is wrapped around the retaining element so that the optical fiber Bragg grating extends in and along the helical groove. Next, an excess length of the optical fiber Bragg grating is provided in the helical groove to substantially alleviate tension exerted upon the optical fiber Bragg grating. Finally, the first and second ends of the fiber Bragg grating are affixed to the retaining element.
Patent TW-500853-B (TW)
Title: Washing machine
Inventor: KUBOTA TORU
IPC: D06F39/00
Filed: 2001-03-20
Granted: 2002-09-01
Abstract: The present invention relates to a washing machine provided with a feed water mechanism, in which a solid made of a halogenated hydantoin compound discharging a hypohalogenous acid when brought into contact with water is provided. The water including the hypohalogenous acid, which is so called disinfectant water, is generated and fed to the washing tub to wash clothes. This disinfectant water containing hypohalogenous acid can suppress the reproduction of microbes and fungi on the laundry or the washing machine, so as to effectively suppress the occurrence of mildew, and odor, of the like. Particularly, based on the water feeding time of a water storage tub, the contact time of the solid with water can be readily controlled, to exactly obtain an effective disinfectant concentration. Thus, the present invention provides a washing machine having clean and sanitary washing performance, especially suitable for families having patients and young children that are weak in resisting diseases.
Patent TW-490685-B (TW)
Title: Magnetic powder and bonded magnet
Inventor: ARAI AKIRA
IPC: B22F3/00
Filed: 2001-04-24
Granted: 2002-06-11
Abstract: Disclosed herein is a magnetic powder which can provide a bonded magnet having high mechanical strength and excellent magnetic properties. The magnetic powder has an alloy composition containing a rare-earth element and a transition metal, wherein the magnetic powder includes particles each of which is formed with a number of ridges or recesses on at least a part of a surface thereof. In this magnetic powder, it is preferable that when the mean particle size of the magnetic powder is defined by a μm, the average length of the ridges or recesses is equal to or greater than a/40 μm. Further, preferably, the ridges or recesses are arranged in roughly parallel with each other so as to have an average pitch of 0.5 to 100 μm.
Patent TW-507206-B (TW)
Title: Semiconductor memory and controlling method thereof
Inventor: MURAI KATSUMI
IPC: G11C7/10
Filed: 2001-05-09
Granted: 2002-10-21
Abstract: The object of the invention is the provision of a semiconductor memory, having processor and memory integrally mounted on one chip. To attain the object, crossbar wirings are laid on the memory cell area and crossbar switches are disposed in the sense amplifier area or word driver area. Accordingly, memory sharing is made possible without increasing the chip area and it is also made possible to take out a large number of data continuously. Hence, a memory-embedded system with a high bandwidth can be provided.
Patent TW-520566-B (TW)
Title: Semiconductor integrated circuit device and method of manufacturing the same
Inventor: ITO FUMITOSHI
IPC: H01L27/10
Filed: 2001-05-23
Granted: 2003-02-11
Abstract: A semiconductor integrated circuit device comprises a p-channel MISFET and/or an n-channel MISFET, of which an SRAM cell is constituted and which is arranged to have an offset structure, and MISFET for selection of SRAM cells and MISFET constituting a peripheral circuit of SRAM or a logic circuit which is arranged to have a non-offset structure. At least one of MISFET's constituting an SRAM cell is arranged to take a measure against GIDL (gate induced drain leakage) current.
Patent TW-514793-B (TW)
Title: Computer system absent a parallel system bus
Inventor: SALLAM HUSSEIN
IPC: G06F13/00
Filed: 2001-07-25
Granted: 2002-12-21
Abstract: The invention is essentially a novel computer architecture which is absent the traditional parallel system bus. The computer makes use of a serial bus controller (SBC) and serial communication lines to facilitate communication between attached system components and any peripheral devices. The components themselves can be in their own enclosures, designed to and will contain BIOS-type information sufficient to characterize themselves and convey any necessary protocol for communicating with themselves. At each system boot different system components such as CPU(s), memory modules, fixed disks, etc. can be added or removed and even while in the powered on state various peripheral devices can be added and removed. This architecture permits infinite combinations of system configurations limited only by the number of available connections to the serial bus controller. Individual components are interconnected via high speed serial data transmission and thus are not subject to the distance limitations imposed by the inherent properties of the parallel system bus.
Patent TW-548366-B (TW)
Title: Newsprint paper for offset printing
Inventor: TAKANO TOSHIYUKI
IPC: D21H21/00
Filed: 2001-09-03
Granted: 2003-08-21
Abstract: The present invention is to provide a newsprint paper for offset printing having a thickness greater than 50 mum but smaller than 85 mum, excellent in printing operability and color printability. This newsprint paper for offset printing is obtained by coating a surface treatment agent comprising a water-soluble polymer, preferably starch and/or starch derivative, and an antislip agent on a newsprint base paper containing a bulkiness-imparting agent such as an ester compound from an (oxyalkylene group-containing) polyhydric alcohol and a fatty acid, followed by drying and then calendering. This newsprint paper thus obtained has a thickness greater than 50 mum but smaller than 85 mum and a dynamic coefficient of friction of 0.45-0.62.
Patent TW-518652-B (TW)
Title: Substrate defects repairing device
Inventor: MORISHITA MASAHIKO
IPC: H01L21/268
Filed: 2001-09-21
Granted: 2003-01-21
Abstract: This invention relates to a substrate defects repairing device for repairing the defect of wafers, liquid crystal substrates, etc, whose purpose is to effectively control the deterioration of defects generated on substrates such as wafers. In order to achieve the above-mentioned purpose, after a silicon wafer 1 is loaded onto a wafer positioning stage 4, a computer 9 is used to identify the positions of chipping by image signals captured by a position detection sensor 5. The computer 9 enables rotating of the silicon wafer 1 on the wafer positioning stage, a laser beam 8 coming from a laser oscillator 7 irradiates the position of chipping 6, and the rotation of the wafer is terminated to complete the positioning. Subsequently, the laser beam 8 of the laser oscillator 7 is used to irradiate the chipping 6 so that the chipping 6 and its vicinity are melted and thus the chipping 6 is repaired.
Patent TW-517401-B (TW)
Title: Separation of optical components formed on a substrate
Inventor: LIN WENHUA
IPC: G02B6/136
Filed: 2001-10-15
Granted: 2003-01-11
Abstract: A method of separating optical components is disclosed. The method includes obtaining a substrate structure having a plurality of optical components formed on the substrate structure. The method also includes performing a separation etch on a separation region of the substrate structure. The separation region is selected such that removing the portion of the substrate structure located in the separation region would separate at least one of the optical components from the other optical components.
Patent TW-556176-B (TW)
Title: Objective lens drive apparatus for use in optical pickup
Inventor: KAWANO NORIYUKI
IPC: G11B7/09
Filed: 2001-12-25
Granted: 2003-10-01
Abstract: Within the same magnetic gap of a magnetic circuit including at least one magnet magnetized in multi-polarities, there is disposed a coil unit with a focus coil, a tracking coil and a tilt coil mounted thereon.
Patent TW-548657-B (TW)
Title: Self-adaptive programming method and apparatus for flash memory analog storage
Inventor: ENGH LAWRENCE D
IPC: G11C29/00
Filed: 2002-01-29
Granted: 2003-08-21
Abstract: The self-adaptive programming method and apparatus for flash memory analog storage are disclosed in the present invention. In the method, the voltage of programmed pulse is adjusted each time based on the result of prior one pulse. The difference between the anticipated variation of the programmed value and the measured variation is used to improve each unit model after being programmed. Because the voltage of each pulse is adapted to the voltage required by the unit, the algorithm is self-adaptive. If the unit is programmed too slow, the voltage is increased dramatically to make the programming faster. On the contrary, if the result indicates that a special unit is programmed too fast, the next one voltage pulse will be increased by a small amount (or will be decreased if necessary). Because the reaction of the unit is nonlinear, a special analog circuit is required to calculate the optimum voltage for each pulse. In addition, digital-type computation can also be used to replace the programming of these units. Due to the programming speed of the demonstrated method, the voice signal of one unit can be sampled and stored in the flash memory in each time. If it is necessary, the variable program parameter can also be used in addition to the voltage parameter.
Patent TW-550521-B (TW)
Title: Method for re-building 3D model of house in a semi-automatic manner using edge segments of buildings
Inventor: CHEN LIANG-JIAN
IPC: G06T7/00
Filed: 2002-02-07
Granted: 2003-09-01
Abstract: The present invention is a method for re-building 3D model of house in a semi-automatic manner using edge segments of buildings, which uses the manual measurement for visible edge segments, or uses the metropolitan building data generated by the photogrammetric drafting with current values to build the 3D city model with the least man power requirement. The major core technique is called the Split-Merge-Shape algorithm, wherein the two steps, Split-Merge, are to rebuild the topology relation between edge segments to complete the closed polygon. The Shape step is to determine the root surface as a plane or a ramp, and the actual height using the height information of the edge. The technique is to combine the conventional digital photogrammetric drafting and the production procedure of the 3D city model to improve the efficiency and the quality of the result. The present invention can be used to establish the polyhedral building models and the prismatic building models in a semi-automatic manner.
Patent TW-523885-B (TW)
Title: Manufacturing method of electric device
Inventor: KUMAKURA HIROYUKI
IPC: H01L21/60
Filed: 2002-02-19
Granted: 2003-03-11
Abstract: In a method of manufacturing an electric device 1, an adhesive agent 12 together with a flexible wiring board 13 is heated to the first heating temperature and, after a sufficient lowering in viscosity, the positioning of a semiconductor chip 11 is conducted such that no air is carried in when the semiconductor chip 11 is placed on the adhesive agent 12. Further, during main pressure joining, the adhesive agent 12 is heated to the second heating temperature higher than the first heating temperature so as to increase the viscosity of the adhesive agent 12 such that the remaining voids are pushed out together with the excess of the adhesive agent 12. Therefore, an electric device 1 with high conduction reliability and no voids in the adhesive agent 12 is obtained.
Patent TW-579626-B (TW)
Title: A method for converting electric signals and a converter therefor
Inventor: ZAITSEV GEORGY MIKHAILOVICH
IPC: H03D1/14
Filed: 2002-04-01
Granted: 2004-03-11
Abstract: The invention relates to signal conversion devices to be used for the receiving radio devices. The attained technical result is the detection and conversion of signals in an electrical two-terminal device, a data loss level being minimal. A converting element is supplied with input signals, interaction of the fields of said signals in the converting element material is provided, which interaction is accompanied with the energy interchange resulting in appearance of the efficient electromotive force, and extracted is the converted signal complying with the following ratio: U'(t)=-gamma|Rx|{SigmaUi(t)*|U0(t)|+U0(t)*|SigmaUi(t)|}/X0l, where U'(t) is the efficient electromotive force in the converting element, Rx is Hall coefficient of the converting element conductive material (C/m<3>); l is length of the converting element along the current direction, (m); X0 is the least one of linear dimensions of the converting element cross-section that is perpendicular to direction of the current flowing therein, (m); gamma=tau*epsilon0; epsilon0 is electric constant, epsilon0≈10<-11> C/V*m, tau is dimensionless factor that represents a degree of interrelationship of the fields in a conductive medium; SigmaUi(t), where i=l...n is the combined voltage of the input convertible signals; U0(t) is voltage of the input converting signal; at that, the ratio between the physical parameters and geometric parameters of the converting element and the sum of voltages of the input signals is selected with regard to the condition 2gamma|Rx|U/X0l >= 1, where U is sum of voltages of the input signals.
Patent TW-594764-B (TW)
Title: Non-volatile semiconductor memory device
Inventor: KANAMITSU MICHITARO
IPC: G11C16/26
Filed: 2002-04-24
Granted: 2004-06-21
Abstract: A nonvolatile semiconductor storage unit capable of preventing an erroneous sense operation in a sense latch circuit while using a single-end sense method can reduce the chip areas (reduce the number of devices). A single-end sense method using a flash memory where a sense latch circuit is connected to one end of a global bit line to detect the data on the global bit line according to the threshold value voltage of a memory cell, and an NMOS gate reception sense method where data on the global bit line is received on a gate by an NMOSFET to drive a node on the sense latch circuit are used concurrently to sense a sense voltage by the NMOSFET (Q12), start the sense latch circuit (41) with a sufficient signal traffic ensured, and pre-charge the global bit line (G-BL) by an output voltage from a threshold value voltage adding power source (51), whereby the difference between a pre-charge voltage and the threshold value voltage of the NMOSFET (Q12) is kept constant.
Patent TW-552504-B (TW)
Title: Serial bus multiplexer having anti-locking device
Inventor: LEE JAMES
IPC: G06F12/00
Filed: 2002-04-26
Granted: 2003-09-11
Abstract: The present invention is a serial bus multiplexer having anti-locking device, which comprises a serial bus multiplexer and a reset unit, and which is applied in connecting a system having a CPU and a serial bus controlling unit to plural serial bus devices by serial channel multiplexer. The reset unit connects the CPU and serial bus multiplexer. When the connection among the serial bus device and serial bus multiplexer and serial bus controlling unit is open-circuited, the serial bus controlling unit sends a signal to the CPU for transmitting an open-circuit signal to the reset unit, the reset unit sends a reset signal to the serial bus multiplexer, so that the serial bus device and normal serial bus multiplexer and serial bus controlling unit are re-connected.
Patent TW-581987-B (TW)
Title: Foreign language learning system using computer for letter searching game and the method thereof
Inventor: HSIEH CHING-HWA
IPC: G09B19/06
Filed: 2002-06-13
Granted: 2004-04-01
Abstract: The present invention provides a foreign language learning system using computer for letter searching game and the method thereof, which is a system and method by providing question information and prompt information, so as to accept the control of virtual character for conducting the process of letter searching and obtaining to achieve the language learning effect.
Patent TW-550784-B (TW)
Title: Semiconductor integrated circuit device, package substrate device and the cutting method of the wire of package substrate device
Inventor: MIYABA TAKESHI
IPC: H01L21/822
Filed: 2002-06-19
Granted: 2003-09-01
Abstract: A first power wire provides a power potential to a circuit having a first function. A first ground wire provides a ground potential to a circuit having a first function. A first protection circuit connects with the first power wire and the first ground wire for protecting the circuit having the first function. A second power wire provides a power potential to a circuit having a second function. A second ground wire provides a ground potential to the circuit having the second function. A second protection circuit connects with the second power wire and the second ground wire for protecting the circuit having the second function. An element, being stored between the first power wire and the second power wire, or being stored between the first ground wire and the second ground wire, is to maintain a cutoff state of the other side.
Patent TW-563142-B (TW)
Title: Thin film capacitor, and electronic circuit component
Inventor: OGINO MASAHIKO
IPC: H01L23/64
Filed: 2002-07-11
Granted: 2003-11-21
Abstract: This invention relates to a thin film capacitor and an electronic circuit component, comprising a lower electrode formed on a predetermined surface, a dielectric layer formed of a dielectric material and formed on the lower electrode, and an upper electrode formed on the dielectric layer, characterized in that the end part of the lower electrode is covered by an insulator other than the dielectric layer.
Patent TW-541404-B (TW)
Title: Body for valve and its manufacturing method
Inventor: MIYAZOE SHINJI
IPC: F16K27/00
Filed: 2002-08-05
Granted: 2003-07-11
Abstract: The object of the present invention is to simplify and facilitate machining, polishing or the like of a valve hole interior in a body for a valve and to reduce manufacturing costs of the body for the valve. The solution of the present invention is that a body (10) for the valve provided with the valve hole for slidably inserting a valve element is divided at a dividing face (13) including an axis of the valve hole and parallel with directions of passages (12p), (12a), (12b) and (12r) connecting the valve hole with ports (P), (A), (B) and (R) opened in a body external surface. The body for the valve is formed by mutually joining individually formed body pieces.
Patent TW-557448-B (TW)
Title: Core-reactor, especially research-reactor
Inventor: ROEGLER HANS-JOACHIM
IPC: G21C1/30
Filed: 2002-08-14
Granted: 2003-10-11
Abstract: A core-reactor (1) is used as a research-reactor and has a reactor-core (2), which is arranged in a coolant flow-channel (6) surrounded by a reflector-tank (4), where in the reflector-tank (4) several test-rooms (20, 22, 24) are integrated, it is designed in a special low expense for a reliable and safe cooling of the samples (26, 28, 30) in the test-rooms (20, 22, 24). According to this invention, the test-rooms (20, 22, 24) can be supplied with coolant respectively through a corresponding branch-channel (32, 34, 36), where each branch-channel (32, 34, 36) communicates in the input-side with a flow-in-region (38) and in the output-side with a flow-out-region (40) of said flow-channel (6).
Patent TW-595053-B (TW)
Title: High data rate interconnecting device
Inventor: GUROVICH DMITRY
IPC: H01R13/6466
Filed: 2002-08-23
Granted: 2004-06-21
Abstract: An interconnect apparatus for providing a communication path for data signals in a predetermined frequency band, that comprises a first and a second sections of a transmission line, connected at one end to a first and a second data transceiving devices, respectively; a switch, such as a mechanical, electro-mechanical, electronic, electro-magnetic and electro-optical switch, having conductive/non-conductive states, for connecting/disconnecting between the other ends of the first and the second sections, for providing a data communication path between the data transceiving devices while being in its conductive state a third and a fourth sections of a transmission line, each of which connected at one end to a contact of the switch and at the other end to a first and a second connector, respectively; and a compensation circuitry for compensating, within the frequency band, parasitic effects caused by the switch and/or cord, while the switch being in its conductive state or, while the switch being in its non-conductive state and while a connection between the first and the second connectors is provided by a cord having predetermined characteristics, such that the compensation circuitry compensates the influence of parasitic effects introduced along the communication path by the switch while being in its non-conductive state and while the cord is a part of the communication path or, by the combination of the third and a fourth sections and the connectors while the switch being in its conductive state.
Patent TW-585984-B (TW)
Title: The light-guide module for producing polarized light
Inventor: TSAI MING-LANG
IPC: F21V8/00
Filed: 2002-08-30
Granted: 2004-05-01
Abstract: The light-guide module for producing polarized light includes a splitter for separating non-polarized light, a transformer for converting the polarization of the light, and a non-polarized light source. When using, the non-polarized light source emits light beams. Light beams with particular polarization pass the splitter and others reflect by the splitter. The other polarizations of the light beams reflected by the splitter and of the light beams of the non-polarized light source convert by transformer. So as to separate the light beams later. Thus the light-guide module emitting light beams with particular polarization loses fairly low-loss energy of light.