Patent GB-1262227-A (GB)
Title: Electronic multiselector
IPC: H03K17/693
Filed: 1970-07-02
Abstract: 1,262,227. Automatic exchange systems; transistor gates. INTERNATIONAL STANDARD ELECTRIC CORP. 2 July, 1970 [9 July, 1969], No. 32214/70. Addition to 1,199,119. Headings H3T and H4K. A switching matrix with metal oxide semiconductor field effect transistors at the crosspoints, each of which has a bi-stable circuit to control the on-off condition of the MOS switches and an access gate to control the state of the bistable, is operated by applying a signal to a column control wire to reset all row bi-stables while priming the access gates and opening the selected access gate if the row control wire carries a select signal and a row busy wire indicates that no other cross-point in the row is switched on, or if the row busy wire is artificially conditioned in order that more than one connection can be made in the same row. Fig. 6 shows the cross-point Xjk between the jth column and the kth row along with the column and row control circuits Lj and Gk, respectively, in a matrix of n rows and m columns. The circled references in a lead indicate the signal carried by that lead. The cross-point bi-stable Ajk is such as to be reset by a signal cj on a column control lead and is set to its 1 state by having both its reset input and its set input from access NOR gate Pjk present at the same time, and by then having the reset input removed. Column control signal C<SP>11</SP>j is applied to the column control lead over inverters La and Lb in order to reshape the control pulse, the resulting signal Cj being applied to reset all column bi-stables and, after a delay of duration t, to be applied through delay inverter Ld as signal C<SP>1</SP>j to access gate Pjk. A row select signal appears as absence of signal Sk and the row is marked accessible by absence of signal ek. After the delay t, therefore, access NOR gate detects absence of signal C<SP>1</SP>j to provide its output Pjk energizing the set input of bistable Ajk. When the column select signal Cj is removed the bi-stable takes up its set state to open the MOS cross-points T<SP>1</SP> and T<SP>11</SP> in the go and return wires of the matrix. An on-condition signal ajk from any cross-point is detected in the row control circuit Gk by NOR-gate Ga which blocks the row access gates Pjk by ensuring that NOR-gate Gd delivers the signal ek. The row available signal constituted by the absence of ek can be enforced by a control signal rk to gate Gd so that any number of columns can be connected to a row as it is suggested would be required in a method of supplying busy tone from a source connected to the row to any one or more of the columns. Connections are released by disconnection of the terminal apparatus, crosspoints in the connection path being left in the on-condition until released by a subsequent column select signal Cj. The switching matrix may be constructed as a large scale integrated circuit with all components constituted by MOS transistors, suitable such circuits for the NOR-gates and cross-point bi-stables being described, Figs. 1 and 3 (not shown). To increase the number of columns per row a number of matrices may be worked with a commoned row busy signal Wk as delivered from NOR-gates Ga by way of inverters Gb in each of the row control circuits Gk. The busy signal leads WK of a number of matrices may be commoned if the associated inverters Gb together act as a NOR-gate, see Fig. 7 (not shown). Transistor gates.-One of the NOR-gates described is shown in Fig. 2 where in order to  produce output P the inputs c, e and s, must be such to hold all of MOS-Nh transistors T<SP>1</SP>8, T<SP>1</SP>9 and T<SP>1</SP>10 non-conducting and all of MOSPh transistors T8, T9, and T10 conducting.