baber/WOPTO huggingface dataset:
Patent TW-529243-B (TW)
Title: Power initiation apparatus of peripheral device
Inventor: HUANG BA-JUNG
IPC: G06F1/26
Filed: 2001-10-22
Granted: 2003-04-21
Abstract: A power initiation apparatus for peripheral device includes a switch control circuit used for controlling the conduction of P-type or N-type transistor switch. For the P-type transistor switch, the switch control circuit includes a pull-up device, a current source and a current switch. For the N-type transistor switch, the switch control circuit includes a pull-down device, a current source and a current switch. By using the slowly decreased or slowly increased output generated by charging the capacitor through the current source, the P-type transistor switch or N-type transistor switch is controlled so as to reach the effect of slowly turning on the electric power source. In addition, for the integrated circuit, the design of a constant current source circuit is simpler and the occupied area is not too large such that the drawback of conventional technique can be solved.
Patent TW-511276-B (TW)
Title: Semiconductor device and its production method
Inventor: IWATA HIROSHI
IPC: H01L27/08
Filed: 2001-10-23
Granted: 2002-11-21
Abstract: This invention provides a semiconductor device having a two-layer well structure and a small margin required at the boundary of a well region and comprising a variable substrate-bias transistor and a DTMOS. A plural number of field-effect transistors (223) are fabricated on a P-type shallow well region (212). The depth of a shallow element-isolating region (214) over the P-type shallow well region (212) is less than the depth of the junction between an N-type deep well region (227) and the P-type shallow well region (212). Therefore, the field-effect transistors (223) share the P-type shallow well region (212). Moreover, the P-type shallow well regions (212) independently of each other are easily formed since they are isolated from each other by a deep element-isolating region (226) and the N-type deep well region (227).
Patent TW-523818-B (TW)
Title: CMOS fabrication process utilizing special transistor orientation
Inventor: ARMSTRONG MARK
IPC: H01L27/092
Filed: 2001-10-29
Granted: 2003-03-11
Abstract: Complementary metal oxide semiconductor transistors are formed on a silicon substrate. The substrate has a {100} crystallographic orientation. The transistors are formed on the substrate so that current flows in the channels of the transistors are parallel to the (100) direction. Additionally, longitudinal tensile stress is applied to the channels.
Patent TW-I265432-B (TW)
Title: Network clinical system and method with process and customer management
Inventor: CHUNG PAU-CHOO
IPC: G06F17/00
Filed: 2001-12-18
Granted: 2006-11-01
Abstract: The present invention provides a network clinical system and method with process and customer management, which comprises: a patient examine interface unit, a doctor examine interface unit, a patient database, a doctor database, a patient image capture device, a doctor image capture device, a communication channel, a central processing control unit, an identification authorization unit, a calculation comparison unit, an examination time calculation unit, a complain unit, a coupon distribution and calculation statistic unit, a pre-call/response flow control unit, a data maintenance and system management unit, and a patient credit quota check unit; with the operations of these units, it could improve or solve the problems in the prior art, such as the network clinical system could not precisely control the arrival and examining time for the patient, fake identities for the doctor and the patient, and the absence of doctor, and could greatly improve the quality of network clinical system, protect the benefits of patients, and more effectively manage the examining process flow of the doctor.
Patent TW-I234118-B (TW)
Title: Integrated semiconductor circuit device, process of manufacturing the same, IC module and IC card
Inventor: MATSUMOTO HIRONORI
IPC: H01L29/872
Filed: 2002-01-23
Granted: 2005-06-11
Abstract: An integrated semiconductor circuit device comprising a diode bridge circuit formed of a Schottky barrier diode and a periphery circuit formed of a MOS transistor which are formed on a single silicon substrate, wherein a Schottky barrier, which is a component of the Schottky barrier diode, is made of a silicide layer.
Patent TW-567729-B (TW)
Title: Method and system for compressing motion image information
Inventor: KAJIKI NORIKO
IPC: H04N19/593
Filed: 2002-01-30
Granted: 2003-12-21
Abstract: The present invention provides a method and system for compressing motion image information which is capable of compressing information such as image information or sound information by means of predictive coding, with a high compression ratio and at a high speed while maintaining high image and sound quality. In the method and system of the present invention, spatially or temporally adjacent pixels are compared to each other to output differential information of pixel values; a first area where the differential information is greater than a given parameter or a second area other than said first area are detected and stored into a form of a 1-bit/pixel bit map; and the information of the first area stored in said bit map is compressed, thereby reducing redundant information between frames.
Patent TW-I257680-B (TW)
Title: Method for monitoring particles on wafer surface and in process
Inventor: CHEN SHR-YAN
IPC: G01N21/95
Filed: 2002-02-25
Granted: 2006-07-01
Abstract: The present invention relates to a method for monitoring particles on a wafer surface and in a process is described, which uses a monitoring instrument to detect particles possibly present on a substantially effective surface of a wafer. Before the monitoring step, a substantially uniform conformal covering layer is formed on the substantially effective surface of the wafer, in which the thickness of the conformal layer is controlled so that the apparent sizes of the particles possibly present on the wafer surface can be increased moderately.
Patent TW-583482-B (TW)
Title: Liquid crystal display with control electrodes for preventing lateral leak of electric field
Inventor: SAKAMOTO MICHIAKI
IPC: G02F1/1343
Filed: 2002-02-26
Granted: 2004-04-11
Abstract: A liquid crystal display (LCD) comprises a plurality of gate lines, a plurality of data lines, and switching elements each disposed in the proximity of one of intersections between the plurality of gate lines and the plurality of data lines. The LCD further comprises a plurality of pixel electrodes disposed over the gate lines and the data lines via an interlayer insulating film, wherein, when viewed from upside, that is, from the side of a gap between adjacent pixel electrodes toward the side of the gate line, the gap between adjacent pixel electrodes at least partially overlaps with the gate line, and a plurality of control electrodes each disposed under the gap between adjacent pixel electrodes and over the gate line, wherein, when viewed from upside, the control electrode covers the gate line.
Patent TW-536492-B (TW)
Title: Automatic slack adjuster for hydraulic brake
Inventor: MAO YEN-CHIEH
IPC: F16D65/54
Filed: 2002-04-02
Granted: 2003-06-11
Abstract: An automatic slack adjuster for a hydraulic brake. The automatic slack adjuster has a cylinder, a piston and a resilient body in a braking system. The piston is drawn back in the cylinder by a predetermined force when a friction and resilience among a rod of the cylinder, the piston, and the resilient body is employed during a proper period. Therefore, a noise, a shock, and abrasion of the braking system resulted from a contact between a brake block and a disk is effectively avoided. When the piston is drawn back, the piston is able to self-adjust to a proper balance position so that a distance between the brake block and the disk is preferably kept in a predetermined range.
Patent TW-561679-B (TW)
Title: PWM converter system
Inventor: SAKAI KEIJIROU
IPC: H02M7/12
Filed: 2002-04-08
Granted: 2003-11-11
Abstract: A single-phase PWM converter system in accordance with the present invention employs a sample-and-hold circuit which samples and holds a direct current in the state wherein one of two-phase gate signals of a positive or negative side arm is ON and the other phase is OFF, determines the sign of an output of the sample-and-hold circuit according to the two-phase gate condition, detects a phase current at the input side of the converter, and controls a voltage at the input side of the converter so that the detected current value agrees with a power supply current command. Further, a three-phase PWM converter system in accordance with the present invention detects the effective current and the ineffective current of the power supply current from the direct current, and based on the values, controls the PWM converter so that the sine wave power supply current whose power supply power factor is 1 is provided.
Patent TW-564624-B (TW)
Title: Non-invasive SSL payload processing for IP packet using streaming SSL parsing
Inventor: DAVIS JOHN M
IPC: H04L29/08
Filed: 2002-05-08
Granted: 2003-12-01
Abstract: An SSL proxy receives encrypted packets of information from a computer. The SSL proxy buffers the encrypted packets until all the packets are received. Once all the packets are received, the encrypted portion of each packet is decrypted and the packet is then forwarded to its intended destination.
Patent TW-558821-B (TW)
Title: Under bump buffer metallurgy structure
Inventor: GUNG JEN-YUE
IPC: H01L23/485
Filed: 2002-05-29
Granted: 2003-10-21
Abstract: An under bump buffer metallurgy structure is provided, suitable for disposing at between zinc pads of chips or substrates and solder bumps, in which the solder bumps have Sn/Pb alloy as the main component, and the under bump buffer metallurgy structure has at least a metal layer and a buffer metal layer structure. The buffer metal structure can reduce or alleviate negative effects of the electrical and mechanical characteristics of the metal compound generated by bonding the metal layer and the solder bumps. The metal layer is disposed on the bond pads of the chip, which has metal components of Cu, Al, Ni, Ag, Au, etc., capable of chemically reacting with Sn, and the buffer metal stricture is disposed at between the metal layer and the solder bumps to reduce the possibility of forming inter-metallic compounds between the metal layer and the solder bumps.
Patent TW-584613-B (TW)
Title: Silver powder for silver clay and silver clay containing this silver powder
Inventor: HIRASAWA JUICHI
IPC: C04B33/02
Filed: 2002-06-18
Granted: 2004-04-21
Abstract: The present invention provides a silver clay which can be sintered at a relatively low temperature. The present invention also provides silver powder which includes 15-50 weight % of Ag dust in which the average grain diameter is 2 mum and Ag dust in which its average grain diameter is more than 2 mum and not more than 100 mum as the remainder. The present invention also provides silver clay which includes 50-95 weight % of the above silver powder, 0.8-8 weight % of binder, 0.1-3 weight % of oil, and water as the remainder.
Patent TW-593617-B (TW)
Title: Curable compositions for display devices
Inventor: CHAWLA CHANDER PRAKASH
IPC: C08G59/62
Filed: 2002-08-06
Granted: 2004-06-21
Abstract: Provided are curable compositions for the preparation of displays. The compositions are particularly suitable as adhesives, sealants, and/or encapsulants for displays. Compositions according to the invention include those having an epoxy resin and a hydroxy-functional compound, wherein the compositions provide good barrier properties after cure.
Patent TW-548172-B (TW)
Title: Method of forming and forming mold for a body of bicycle disc brake
Inventor: CHEN FEI-YA
IPC: B29C45/26
Filed: 2002-10-04
Granted: 2003-08-21
Abstract: This invention relates to a method of forming and forming mold for a body of bicycle disc brake, the forming mold includes: a first mold unit, a second mold unit, an insert removable and inserted into the first mold, a screw rod threadably screwed in the first mold unit and a cylinder secured to the screw rod along an axis. When the first and second mold units join, the screw rod, cylinder and the insert are all located at a first position subjecting the cylinder to pass through the insert. Material is then injected and cooled. The screw rod and cylinder are then receded to a second position and the insert is displaced to a second position. An integrally formed body for a disc brake made by a plastic material may then be obtained after opening the mold.
Patent TW-I222636-B (TW)
Title: Thin film magnetic memory device
Inventor: HIDAKA HIDETO
IPC: G11C11/14
Filed: 2002-10-08
Granted: 2004-10-21
Abstract: Each write word line has one end connected by a write drive circuit to a power supply voltage selectively and the other end to a ground voltage. The write drive circuit is staggered in arrangement and thus connected to either one or the other end of each write word line. A write drive circuit has a first transistor and a second transistor. When a memory cell row corresponding to the write drive circuit is selected the first transistor connects a corresponding write word line to the power supply voltage to supply a data writing current and when an adjacent row is selected the transistor connects the corresponding write word line to the power supply voltage. The second transistor passes a magnetic field canceling current, which cancels a magnetic field leaking from a data writing current of an adjacent row.
Patent TW-I232586-B (TW)
Title: Semiconductor device and its fabrication method
Inventor: YAMAGUCHI KEN
IPC: H01L27/11
Filed: 2002-10-18
Granted: 2005-05-11
Abstract: The present invention provides the related technique of semiconductor device and its manufacturing method. The purpose of the invention is to strengthen the tolerance of soft error caused by the high energy radiation exposure of semiconductor device so as to realize high performance of minute MOS transistor. When diffusion region of the deep source or drain gate is formed with high-concentration, between the source/drain gate diffusion layers and the semiconductor substrate having an opposite conduction type, a middle region with higher concentration than the doping concentration of the semiconductor substrate is formed. By sharing the middle region with the diffusion window used for forming source or drain gate, it is capable of realizing a low-cost middle layer having uniform concentration and uniform width.
Patent TW-I233306-B (TW)
Title: Architecture and method for fine granularity scalability video coding
Inventor: HUANG HSIANG-CHUN
IPC: H04N7/26
Filed: 2002-11-29
Granted: 2005-05-21
Abstract: A robust fine granularity scalability video encoding includes a base layer encoder and an enhancement layer encoder in which motion compensated difference images are generated by comparing an original image to predicted images at base layer and enhancement layer with motion compensation. Based on leaky and partial predictions, a high quality reference image is constructed at the enhancement layer to improve temporal prediction. In the construction of the high quality reference image, one parameter beta controls the number of bitplanes of the enhancement layer difference coefficients used and another parameter alpha controls the amount of predictive leak. A spatial scalability module allows the processed pictures at the base layer and the enhancement layer to have identical or different spatial resolutions.
Patent TW-589788-B (TW)
Title: Noise elimination circuit
Inventor: MIYAGI HIROSHI
IPC: H03H19/00
Filed: 2002-12-24
Granted: 2004-06-01
Abstract: The object of the present invention is to provide a noise suppression circuit which is integrally formed on a semiconductor substrate, and which can raise the suppression of noise component. The noise suppression circuit comprises a high pass filter which detects noise component in input signals, a pulse generating circuit which generates pulse signals in respect to the detected noise component, a delay circuit 252 which delays the input signals, an output circuit which suppresses the noise component contained in said delay signals in respect to output sequence of said pulse signals. An analog delay circuit 252 sequentially makes switches 51 to 56 turned on, and respectively remains voltages of the input signals, at their timing points, into respective capacitors 81 to 86. At the same time, before refreshing the remained voltages, the switches 61 to 66 are turned on, and then take them out, so as to delay the output sequence of the input signals.
Patent TW-I272034-B (TW)
Title: A method for manufacturing an integrated display device including an OLED display and a touch screen
Inventor: CROPPER ANDRE DOMINIC
IPC: H01L27/32
Filed: 2002-12-25
Granted: 2007-01-21
Abstract: A method of manufacturing a display device having an OLED display and a touch screen, the OLED display including components that are sensitive to high temperatures, and the touch screen including a resistive film, includes the steps of: providing a transparent substrate having two sides; forming a flat-panel organic light emitting diode display on one side of the substrate; forming a resistive film using a low temperature technique on the other side of the substrate; and forming a resistive touch screen on the resistive film.
Patent TW-587344-B (TW)
Title: Injection molded image sensor structure and its manufacturing method
Inventor: SHIE JR-HUNG
IPC: H01L31/00
Filed: 2002-12-30
Granted: 2004-05-11
Abstract: The injection molded image sensor structure of the invention includes the followings: plural metal plates arranged mutually, in which each metal plate is provided with the first plate; an injection molded structure, in which the metal plate is wrapped through an injection molding manner to form the first molded body and the second molded body having a U shape and a recessed groove such that the first plate of these metal plates is exposed by the first molded body to form a signal input terminal and a signal output terminal; an image sensing chip, which is disposed inside the recessed groove of the injection molded structure; plural conduction wires for electrically connecting the image sensing chip to the first plate of these metal plates; and a transparent layer, which is disposed at the upper edge of the first molded body for wrapping the image sensing chip. The manufacturing method includes the followings: providing plural mutually arranged metal plates where each metal plate has the first plate; using the primary injection molding manner to wrap each metal plate to form an injection molded structure having a recessed groove such that the first plate of the metal plate is exposed by the molded body to form a signal input terminal and a signal output terminal; providing an image sensing chip that is disposed inside the recessed groove of the injection molded structure; providing plural conduction wires for electrically connecting the image sensing chip to the first plate of the metal plate; and providing a transparent layer that is disposed on the first molded body for wrapping the image sensing chip.
Patent TW-I258509-B (TW)
Title: Corrosion resistant powder and coating
Inventor: TEMPLES LEWIS BENTON
IPC: B23K35/32
Filed: 2003-02-27
Granted: 2006-07-21
Abstract: The invention is a corrosion resistant powder useful for deposition through thermal spray devices. The powder consists essentially of, by weight percent, 30 to 60 tungsten, 27 to 60 chromium, 1.5 to 6 carbon, a total of 10 to 40 cobalt plus nickel and incidental impurities plus melting point suppressants.
Patent TW-588376-B (TW)
Title: Semiconductor memory device
Inventor: FUKUDA RYO
IPC: G01R31/28
Filed: 2003-03-13
Granted: 2004-05-21
Abstract: The technical subject of the present invention is to provide a semiconductor memory device having an improved redundant structure for compensating the bad data lines. The solution of semiconductor memory device for the technical subject according to the present invention includes a plurality of memory cell array blocks 31, and an array area 30 connected with k data input/output lines 41 (k is a natural number). The memory cell array block 31 is configured with k+m (m is a natural number) common internal data lines 43. Each memory cell array block 31 is configured with k+m+n (n is a natural number) individual internal data lines 45. For connecting k+m from k+m+n individual internal data lines 45 to k+m common internal data lines 43 based on the first poor information signal, so as to configure the individual line connection circuit 32; and, for connecting k from k+m common internal data lines 43 to k data input/output lines 43 based on the second poor information signal, so as to configure the common line connection circuit 34.
Patent TW-I230717-B (TW)
Title: Polyvinyl alcohol film
Inventor: ISOZAKI TAKANORI
IPC: C08J5/18
Filed: 2003-03-19
Granted: 2005-04-11
Abstract: The invention is a polyvinyl alcohol film having an YI value of at most 20, which is formed of a modified polyvinyl alcohol having a degree of polymerization of from 1500 to 5000, an ethylene unit content of from 1 to 4 mol % and a 1,2-glycol bond content of at most 1.4 mol %. The polyvinyl alcohol film gives polarizing films that contain no impurities and have good polarization performance, durability and hue stability.
Patent TW-I231620-B (TW)
Title: Fuel cell, electrodes for fuel cell and their manufacturing methods
Inventor: NAKAMURA SHIN
IPC: H01M8/10
Filed: 2003-04-17
Granted: 2005-04-21
Abstract: The present invention provides a fuel cell having an adhesion layer with a second solid polymer electrolyte provided between a solid polymer electrolyte membrane and a fuel electrode and/or oxidizer electrode including a first solid polymer electrolyte and catalyst material. Besides, the solid polymer electrolyte membrane and the adhesion layer are formed by the same type of solid polymer electrolyte. Therefore, the adhesion extent of the interface between the surface of the electrode and the solid polymer electrolyte membrane is so high that the characteristic of the cell is enhanced and also the reliability of the cell is increased.
Patent TW-588471-B (TW)
Title: Active matrix organic light emitting diode and fabricating method thereof
Inventor: MENG HSIN-FEI
IPC: H01L27/28
Filed: 2003-04-24
Granted: 2004-05-21
Abstract: A fabricating method of an active matrix organic light emitting diode is described. A thin film transistor having a gate, a source and a drain is formed on a substrate. An anode layer is formed on the substrate, wherein the anode layer is electrically connected to the source. An organic layer is formed over the substrate covering the thin film transistor and the anode layer, wherein the organic layer between the source and the drain is as a channel of the thin film transistor. A cathode layer is formed on the organic layer. Since the molecules of the organic layer are aligned in a direction from the source to the drain and perpendicular to a direction from the anode layer to the cathode layer, the mobility at the channel can be enhanced, and the emitting efficiency can also be enhanced.
Patent TW-I264959-B (TW)
Title: Transducer
Inventor: BANK GRAHAM
IPC: H04R7/18
Filed: 2003-05-02
Granted: 2006-10-21
Abstract: An electromechanical force transducer having an intended operative frequency range comprises a resonant element (10) having a periphery and having a frequency distribution of modes in the operative frequency range, characterised by support means (16) coupled to the periphery of the resonant element, the support means (16) having a substantially restraining nature in relation to bending wave vibration of the resonant element (10). The transducers may be mounted to an acoustic radiator (12) in a loudspeaker via coupling means (14) to excite the acoustic radiator to produce an acoustic output.