baber/WOPTO huggingface dataset:
Patent TW-535315-B (TW)
Title: Manufacturing method of expanded grid and its manufacturing apparatus for storage battery
Inventor: KASHIO GO
IPC: H01M4/74
Filed: 1998-08-25
Granted: 2003-06-01
Abstract: A manufacturing method of expanded grid of the invention includes: (a) a step of supplying a thin plate of band form from the longitudinal direction, (b) a step of forming a plurality of intermittent cuts parallel to the edge in a first region, excluding the central portion, of the thin plate of band form, (c) a step of bending the central portion at a desired angle, and (d) a step of expanding and developing the cuts in the width direction, while moving sequentially in the longitudinal direction the thin plate having the first region forming the plurality of cuts and the central portion not having the cuts, in which the first track distance of the outermost side portion of the first region having the cuts developed and formed is nearly the same distance as the track distance of the central portion. In such the constitution, the plane distortion of the grid is eliminated, the width dimension of the grid is stable, and the quality of the electrode plate using such grid is enhanced. Further, local stress concentration of the grid is suppressed. As a result, the battery using the grid of the invention presents an excellent life characteristic, small performance fluctuation width, and a stable performance.
Patent TW-455596-B (TW)
Title: Destaticizing thermoplastic resin composition
Inventor: NUMATA TAKAYOSHI
IPC: C08L67/02
Filed: 1998-08-28
Granted: 2001-09-21
Abstract: A destaticizing thermoplastic resin composition comprising (A) a thermoplastic resin; (B) a polymer having a surface resistivity measured at 500 V of 10<SP>8</SP> to 10<SP>11</SP> Ω, a melting point of 100 DEG C or higher, an apparent malt viscosity at an apparent shear rate at 260 DEG C of 1,000 sec<SP>-1</SP> of 10 to 1,000 Pa.s, and a ratio of the above apparent melt viscosity to the apparent melt viscosity of the thermoplastic resin at an apparent shear rate at 260 DEG C of 1,000 sec<SP>-1</SP> of 0.01 to 1.3; or a carbon fiber having a diameter of 1 nm to 1 μm, a length of 1 μm to 10 mm and a volume resistivity of less than 1 Ωcm; or a combination of the polymer and the carbon fiber; and (C) a fibrous conductive filler having a volume resistivity of 100 Ω.cm or less. The destaticizing composition is useful for preparation of a carrier jig for use in an electronic field.
Patent TW-369619-B (TW)
Title: Electronic flash module
Inventor: LO ALLEN KWOK WAH
IPC: H01J61/80
Filed: 1998-09-02
Granted: 1999-09-11
Abstract: This disclosure is concerned with an electronic flash module comprising a plurality of flash subunits to illuminate a photographed scene in flash photograph. Each flash subunits comprises a flash-tube and associated charging and triggering circuits; a modeling lamp to allow a photographer to set up the lighting pattern. Each module comprises a trip circuit to synchronously trip all the triggering circuits in the module. It is preferred that the module further comprises a photosensor to activate the trip circuit upon sensing a trigger pulse sent out by a remote device. Preferably, the module comprises connection means so that two or more modules can be linked up to form a panel with a larger illuminating source area. Furthermore, it is preferred that flash subunits can be selectively and individually disabled to allow the photographer to adjust the illuminating pattern.
Patent TW-538084-B (TW)
Title: Cross-linked polyamide binders for ceramics manufacture
Inventor: HOWLAND CHRISTOPHER P
IPC: C08F283/10
Filed: 1999-01-05
Granted: 2003-06-21
Abstract: A method for binding ceramic materials in aqueous media is disclosed. The method utilizes water-soluble polyamides prepared by condensation polymerization for binding various classes of ceramic materials. Cross-linked polyamides are also described.
Patent TW-444034-B (TW)
Title: Method and device for the recovery of linear polyester
Inventor: GERKING LUDER DR
IPC: C08J11/24
Filed: 1999-03-05
Granted: 2001-07-01
Abstract: A method and device for recovering linear polyesters, such as PET and PBT, from polyester waste of the most varied form, in a continuous manner, in which undried or not dried-through waste is melted, the polymer chains being hydrolytically degraded by adhering moisture, and in which diol, corresponding to the basic constitutional unit of the polymer, is added to the melt resulting in glycolytic degradation, and the melt so treated is further condensed to the desired degree of polymerization.
Patent TW-436543-B (TW)
Title: Process and apparatus for reducing the lead-in thread length in circular knitting machines
Inventor: LONATI FRANCESCO
IPC: D04B15/38
Filed: 1999-03-11
Granted: 2001-05-28
Abstract: A process and an apparatus for reducing the length of the lead-in thread in double-cylinder circular hosiery-making or knitting machines in which the thread, fed by a corresponding thread guide (1), is clamped at its end, before knitting begins, by a thread cutting can clamping device (2) which laterally faces the needle cylinders (4, 5) of the machine downstream of the position of the thread guide, relative to the direction in which the needle cylinders (4, 5) rotate about their own axis (6), with respect to the thread guide (1) and to the cutting and clamping device (2). The process consists in keeping the thread (12) clamped by the cutting and clamping device (2) even after the thread has been taken up by the needles (60) at the beginning of the knitting process, and in cutting the portion of thread which, at the beginning of the knitting process, lies between the first needle that took up the thread and the point where the thread is clamped in the cutting and clamping device (2). The thread is cut by means of a lead-in cutting device (3) adjacent to the first needle that took up  the thread (12) and therefore the lead-in is very short and requires no further cutting.
Patent TW-447137-B (TW)
Title: Transistor circuit, display panel and electronic apparatus
Inventor: KIMURA MUTSUMI
IPC: G09G3/32
Filed: 1999-03-18
Granted: 2001-07-21
Abstract: A transistor circuit is disclosed, which comprises: a driving transistor (110) where conductance between a source and a drain is controlled in response to voltage; and a compensating transistor (120) where a gate is connected to one of a source and a drain and wherein the compensating transistor is connected so as to supply the input signals to the gate of the driving transistor through the source and drain, the variance in threshold characteristics of driving transistors is compensated by controlling the input signals of a relatively low voltage. With the current controlled-type device (500) connecting to the source or drain of the driving transistor (110) of this transistor circuit, a display panel that can display picture images with reduced uneven brightness is achieved.
Patent TW-440825-B (TW)
Title: Data storage medium and reading device thereof
Inventor: INABA FUMIO
IPC: G11B7/24044
Filed: 1999-06-07
Granted: 2001-06-16
Abstract: The present invention relates to a data storage medium and discloses an electro-optic reading device. The data storage medium consists of at least a first and a second thin plates (12 and 14) and a safety mark. Each thin plate has a first and a second surfaces and the two thin plates are superimposed together when the first surface of the first thin plate is combined with the first surface of the second thin plate. The safety mark, made of at least one ink substance, is formed on the first surface of at least one of the two thin plates (12 and 14). When the safety mark is placed under a coherent light, the ink substance can respond to the coherent light. The electro-optic reading device is used for reading the safety mark.
Patent TW-458889-B (TW)
Title: Hot-melt sheet for holding and protecting semiconductor wafers and method for applying the same
Inventor: YAMAMOTO KAZUHIKO
IPC: C09J5/06
Filed: 1999-07-14
Granted: 2001-10-11
Abstract: A sheet for holding and protecting semiconductor wafers which can closely follow up even a wafer surface having large roughness is disclosed. The hot-melt sheet for holding and protecting semiconductor is applied to a surface of a semiconductor wafer to thereby hold and protect the semiconductor wafer in processing the semiconductor wafer. The sheet comprises a hot-melt layer A having a melting point of 105 DEG C or below. A pressure-sensitive adhesive layer B may be formed on one surface of the hot-melt layer A. A reinforcing layer C having a melting point higher by 20 DEG C or more than that of hot-melt layer A may further be formed on one surface of the hot-melt layer A, provided that when the pressure-sensitive adhesive layer B is formed on one surface of the hot-melt layer A, the reinforcing layer C is formed on the opposite surface thereof.
Patent TW-455632-B (TW)
Title: Sputtering target and part used in apparatus for forming thin film
Inventor: TAKAHASHI KAZUNARI
IPC: C23C14/34
Filed: 1999-08-05
Granted: 2001-09-21
Abstract: The present invention provides a sputtering target and a component part of thin film forming equipment including a high-purity copper alloy, which have a small wiring resistance, excel in resistance to electro-migration and oxidation, and are able to form a wiring film having excellent uniformity of film composition and film thickness. Such a sputtering target and component part of thin film forming equipment are manufactured from a high-purity copper alloy, in which the content of each of Na and K is 0.5 ppm or less, the content of each of Fe, Ni, Cr, Al, and Ca is 2 ppm or less, the content of oxygen is 5 ppm or less, the content of each of U and Th is 1 ppb or less, the content of Mg is 0.02 to 4 wt%, and the content of copper is 99.99 wt% or more in the remaining copper other than the gaseous components and Mg.
Patent TW-418439-B (TW)
Title: Method for chip alignment at the copper backend processing
Inventor: CHEN SHENG-SHIUNG
IPC: H01L21/027
Filed: 1999-08-20
Granted: 2001-01-11
Abstract: The present invention relates to a method for effectively improving the chip alignment at the copper backend processing which comprises: providing a protection layer on the chip to be completed in the copper wire process; exposing the copper wire by etching; forming a barrier on the protection layer; employing the mask to protect the window area of the chip to form an aluminum pad on the barrier so that the window area does not have deposition of aluminum pad; then, etching or oxidizing the barrier of window area to reduce the depth of barrier in the window area; employing the alignment light beam to penetrate the window area for aligning the whole piece of chip; finally, using the photolithography and etching to form the aluminum packaging wire on the device area.
Patent TW-424131-B (TW)
Title: Pump casing structure of multistage sheet steel pump and method for manufacturing same
Inventor: JIAN HUAN-RAN
IPC: F04D29/40
Filed: 1999-11-08
Granted: 2001-03-01
Abstract: Disclosed is a pump casing structure of a multistage sheet steel pump and method for manufacturing same. The pump casing is constructed by an external casing and an internal casing. The external casing is integrally formed and includes a front casing face, a step-shaped step retaining end face, an outside casing face, and a retaining end face. The internal casing is secured within the external casing and includes an inner end face, an inside casing face, and a step-shaped retaining end, such that the retaining end of the internal casing and the outside casing face of the external casing formed therebetween a receiving space for insertion of a seal ring therein. When a plurality of pump casings are assembled in series, the retaining end face of the external casing of a prior pump casing adapts to urge against the step retaining end face of the external casing of a later pump casing, and the retaining end of the internal casing of a prior pump casing set adapts to urge against the front casing case of the external casing of a later pump casing set, so as to allow axial alignment of the pump casing set along a rotary spindle and to subject the seal ring to be pressed within the concealed receiving space.
Patent TW-469728-B (TW)
Title: Method for combining warm-up and preview
Inventor: WANG GUO-REN
IPC: H04N1/04
Filed: 1999-11-19
Granted: 2001-12-21
Abstract: The present invention provides a method for combining warm-up and preview. By using the characteristic of a scanner being required to warm up when powering on, the image object to be scanned is pre-scanned and stored in the memory of the scanner. When the host needs to call and link the scanner, the image data file stored in the memory of the scanner can be immediately sent to the host and displayed in a preview window, thereby saving the time consumed for scanning operation, and retaining the original preview function for being subsequently used in replacing the draft.
Patent TW-452713-B (TW)
Title: Method using continuous space for data management
Inventor: CHEN FRED HUAI-YAN
IPC: G06F17/30
Filed: 1999-11-26
Granted: 2001-09-01
Abstract: The present invention is a method using continuous space for data management. It opens a space in either a disk or a memory where the space is simulated into a register. After indexing, data are divided into several blocks and stored in various locations of the space. By providing the user with interfaces for reading, writing, and deletion of the data, the user can freely divide the space into various small spaces of different sizes for storing a part of the data or a document in any format. Through the user's setting, the program will also automatically compress or decompress the data or document. Then, transparent and dynamic management of data in a continuous space can be realized for fast data storage, reading, and deletion so as to save memory space. Since the present invention can be used for both off-line and on-line data management, it is applicable for data management on Internet. At the same time, it can also be used as a text file management method. Furthermore, the present invention is applicable on various hand-held consumer electronic product platforms.
Patent TW-431066-B (TW)
Title: Amplifier with dynamic compensation and method
Inventor: SAKURAI SATOSHI
IPC: H03F3/45
Filed: 1999-12-04
Granted: 2001-04-21
Abstract: A differential amplifier having high gain, short settling time and capable of low voltage operation. A differential transistor pair is connected to an active load which includes two or more casocode connected transistor pairs. Gain boosting amplifiers are connected between the gate and source of one of the load pair so as to increase the effective impedance of the load pair thereby increasing the gain. A compensation capacitor is connected between the gate of each load transistor and the drain of the other load transistor, with the drains having equal and opposite voltage swings. During amplifier slewing, a charge is transferred to and from the gate of the load transistors by way of the compensation capacitors thereby reducing the output settling time.
Patent TW-451213-B (TW)
Title: A self-test device for the connection circuits of peripheral memory and its method
Inventor: CHEN GUEI-SHIANG
IPC: G11C29/00
Filed: 1999-12-10
Granted: 2001-08-21
Abstract: This invention discloses a self-test device for the connection circuits of peripheral memory and its method. It improves the drawback on the error-detection for the connection circuits of the peripheral memory, which requires a large amount of time, labor power, and instruments. The device consists of a test sample generator, a memory control module, a comparator, and an output module. The test sample generator is used to generate test samples to examine if there is an error in the connection circuits and the memory units of the peripheral memory. The memory control module is used to generate addresses and control signals for test purpose. The comparator is used to compare the test sample with the value read from the peripheral memory to see if they are the same. The output module is used to record the test status and the test results. If the comparison results show errors, the corresponding test sample and its address in the peripheral memory can be read and analyzed from the results. And then the causes of the errors can be discovered shortly.
Patent TW-550300-B (TW)
Title: Ultra-high strength triple phase steels with excellent cryogenic temperature toughness
Inventor: KOO JAYOUNG
IPC: C22C38/06
Filed: 1999-12-10
Granted: 2003-09-01
Abstract: An ultra-high strength, weldable, low alloy, triple phase steel with excellent cryogenic temperature toughness in the base plate and in the heat affected zone (HAZ) when welded, having a tensile strength greater than about 830 MPa (120 ksi) and a microstructure comprising a ferrite phase, a second phase of predominantly lath martensite and lower bainite, and a retained austenite phase, is prepared by heating a steel slab comprising iron and specified weight percentages of some or all of the additives carbon, manganese, nickel, nitrogen, copper, chromium, molybdenum, silicon, niobium, vanadium, titanium, aluminum, and boron; reducing the slab to form plate in one or more passes in a temperature range in which austenite recrystallizes; further reducing the plate in one or more passes in a temperature range below the austenite recrystallization temperature and above the Ar3 transformation temperature; finish rolling the plate between the Ar3 transformation temperature and the Ar1 transformation temperature; quenching the finish rolled plate to a suitable quench stop temperature (QST); and stopping the quenching.
Patent TW-478176-B (TW)
Title: Reduced diffusion of a mobile specie from a metal oxide ceramic
Inventor: HINTERMAIER FRANK S
IPC: H01L27/105
Filed: 1999-12-15
Granted: 2002-03-01
Abstract: A barrier layer is provided to prevent the diffusion of excess mobile specie from a metal oxide ceramic into the substrate. The barrier layer is provided below the metal oxide ceramic, separating it from the substrate below.
Patent TW-523414-B (TW)
Title: Apparatus and method for administrating certain amount of powdered material
Inventor: MATSUGI HIDEO
IPC: A61M15/00
Filed: 2000-01-14
Granted: 2003-03-11
Abstract: A multi-dose powdered medicine spraying device includes a medicine accommodation chamber (5b) capable of accommodating a single-dose powdered medicine under a bottom surface of a medicine storage chamber (5a) capable of storing multi-dose powdered medicine. A medicine supplying member (2) is kept to be in contact with the bottom surface of the medicine storage chamber (5a) and movable between a charging position and an administering position and allow, at the charging position, the medicine accommodation chamber (5b) to be opened to the medicine storage chamber (5a) and, at the administering position, the medicine accommodation chamber (5b) to be closed with respect to the medicine storage chamber (5a) and the medicine accommodation chamber (5b) to be communicated to the outside through a passage (2g, 2d, 2c). When the medicine supplying member (2) is at the charging position, the powdered medicine in the medicine storage chamber (5a) is charged into the medicine accommodation chamber (5b). During the medicine supplying member (2) is moved from the charging position toward the administering position, the powdered medicine in the medicine accommodation chamber (5b) is cut for measuring. When the medicine supplying member (2) is at the administering position, an air is supplied through a filter into the medicine accommodation chamber (5b) by operating a pump (3) so that the powdered medicine therein is injected to the outside through the passage (2g, 2d, 2c).
Patent TW-463178-B (TW)
Title: Internal supply voltage generating circuit
Inventor: JUNG KWANG-YUNG
IPC: G11C5/00
Filed: 2000-01-21
Granted: 2001-11-11
Abstract: An internal supply voltage generating circuit for providing an increased internal supply voltage by the application of an external supply voltage during a burn-in test is provided. The internal supply voltage generating circuit includes a comparator for comparing the internal supply voltage with a predetermined reference voltage and generating a driving signal for increasing the internal supply voltage to the reference voltage when the internal supply voltage is lower than the reference voltage, a comparison controller for blocking off a current path of the comparator to a ground voltage to restrain operation of the comparator during the burn-in test, an input controller for blocking off the internal supply voltage which is applied to an input terminal of the comparator in response to a burn-in control signal activated during the burn-in test, a driver unit for supplying the external supply voltage to raise the internal supply voltage in response to the driving signal and driving the internal supply voltage with the external supply voltage in response to the burn-in control signal, and an auxiliary blocking unit for blocking off a current path of the external supply voltage to the comparator to restrain the operation of the comparator during the burn-in test.
Patent TW-447182-B (TW)
Title: Smart laser with automated beam quality control
Inventor: ERIE FREDERIC G
IPC: H01S3/225
Filed: 2000-03-24
Granted: 2001-07-21
Abstract: A smart laser having automatic computer control of pulse energy, wavelength and bandwidth using feedback signals from a wavemeter. Pulse energy is controlled by controlling discharge voltage, wavelength by controlling the position of an RMAX mirror in a line narrowing module and bandwidth is controller by adjusting the curvature of a grating in the line narrowing module. Preferred embodiments include automatic feedback control of horizontal and vertical beam profile by automatic adjustment of a prism plate on which beam expander prisms are located and automatic adjustment of the RMAX tilt.
Patent TW-460809-B (TW)
Title: A symmetric filtering based VLSI architecture for image compression
Inventor: PAZMINO EDWARD A
IPC: H04N7/26
Filed: 2000-02-21
Granted: 2001-10-21
Abstract: An apparatus to perform symmetric filtering image compression is provided. The apparatus includes an N-element shift circuit, that has N shifting blocks (SB), to store and shift data elements. Each data element represents a pixel of an image. The apparatus also includes a first plurality of adder circuits to add data elements from a first plurality of pairs of SBs of the N SBs. The apparatus further includes a second plurality of adder circuits to add data elements from a second plurality of pairs of SBs of the N SBs. Additionally, the apparatus includes a first plurality of multiplier circuits, to multiply by corresponding low pass coefficients results of additions performed by the first plurality of adder circuits. The apparatus also includes a second plurality of multiplier circuits, to multiply by corresponding high pass coefficients results of additions performed by the second plurality of adder circuits.
Patent TW-449899-B (TW)
Title: Semiconductor memory device generating accurate internal reference voltage
Inventor: MIYAMOTO KENICHI
IPC: G11C17/12
Filed: 2000-03-14
Granted: 2001-08-11
Abstract: A semiconductor memory device has a memory cell array that outputs cell current to plural data sensing amplifiers and reference current to plural reference amplifiers. The reference amplifiers convert the reference current to a reference voltage. The data sensing amplifiers use the reference voltage to convert the cell current to a data voltage signal. According to a first aspect of the invention, the reference current is supplied to a reference amplifier from two parallel current paths, each having approximately equal number of transistors of two types, wherein one type is always turned on and the other type is switched on or off. Each data sensing amplifier and the reference amplifier connected thereto receive currents from parts of the memory cell array having identical layout.