Patent GB-1430270-A (GB)
Title: Transfer case for four wheel drive
IPC: F16H48/30
Filed: 1974-02-11
Abstract: 1430270 Differential gear CHRYSLER CORP 11 Feb 1974 [12 Feb 1973] 06148/74 Heading F2D [Also in Division G4] In a four-wheel drive motor-vehicle a transfer gear, for driving rear and front axle propeller shafts at 113, 133 respectively, includes a bevel differential gear with a planet carrier 95 driven through a clutched two-speed gear 19 from an input shaft 29, and side wheels 109, 107 connected respectively direct to the rear drive 113, and through a chain gear 121, 123 to the front drive 133, and a dog clutch 175 is provided for locking the differential input carrier 95 to the chain sprocket 121 when the differential slip exceeds a predetermined tolerance, the dog-clutch being engaged by energizing a solenoid 200 under control of electronic means comprising an input counter 240, responsive to speed-responsive electrical signals from an input driven speed sensor 230, for developing a sampling signal at a predetermined count, an output counter 246 similarly responsive to signals from an output speed sensor 232, driven by the rear-drive side-wheel 109, for developing a range signal between a pair of predetermined count values, and a logic comparison network comprising NAND gates for generating a solenoid energizing lock signal when the sampling signal occurs in the absence of the range signal. Means is also provided for inhibiting lock up below and above predetermined speeds. The lock clutch solenoid 200 is energized through a transistor 286, switched by a multivibrator 284 controlled by a final NAND gate 282. Outputs of the speed sensors 230, 232, amplified at 256, 271, are applied to seven-stage binary counters 240, 246, which, in addition to controlling the final NAND gate 282, control setting indicators 292 of flip-flops 252, 254 for resetting the counters. Low and high speed multivibrators 258, 288 also zeroize the counters outside lower and upper speed limits. Action is as follows. The output counter 246 has sixteen and sixtyfour count outputs 272, 274 respectively, the latter 274 supplying an inverter NAND gate 276 to deliver a positive opening pulse to the final NAND gate 282 at count sixty-four. A second NAND gate 278, supplied by both outputs 272, 274, actuates, through an inverter NAND 280, the set indicator of the flip-flop 254, which, at the next pulse from input 232, i.e. the eightyfirst, is operated to reset the output counter 246 to zero, if this has not already been done by the input counter (see below). The final NAND gate 282 receives a sampling pulse from the input counter 240, which has four, eight and sixty-four count outputs 260, 262, 264, the last two feeding through a NAND gate 266 and inverter NAND 268, positive pulses to the final NAND gate 282. At count eight the gate 282 receives a closing pulse, whilst at count seventy-two it receives an opening pulse, this same count, through a NAND gate 270, operating the set indicator 292 of the flip-flop 252, which, at the next input pulse, i.e. the seventy-third, is operated to reset the counter 240 to zero and also to operate the set indicator of the output flip-flop 254. If the output of the final NAND gate 282 is high, or positive, i.e. if the sampling pulse signal from the input counter 240 occurs within the range set by the output counter 246, differential slip is within tolerance, and the multivibrator 284 is not energized. If the sampling pulse is outside that range output of the NAND gate 282 will go negative, and the multivibrator will be operated to energize the solenoid 200 to lock the differential. The NAND gate 270 of the input counter 230 receives an additional signal from a NAND gate 290, receiving directly the eight count signal 260, and, through a high speed timing multivibrator 288, the sixteen count signal 262, and a further input to the set indicator 292 is provided directly from the sensor amplifier 256 through a low speed timing multivibrator 258. Thus below a predetermined input speed at which no additional input pulse is received by the low-speed multivibrator 258, the latter times out and sets both flip-flops 252, 254 for zeroizing the counters at the next pulse, whilst above a higher predetermined speed, the high speed multivibrator 288, which has a shorter time constant, performs the same function if the fourth count pulse 260 appears during its time constant, whereby the lock circuit is disabled outside this speed range. Zener diodes 294, 296, at the sensors, protect the circuit from high voltage transients.