baber/WOPTO huggingface dataset:
Patent JP-S58171842-A (JP)
Title: Integrated circuit device
Inventor: YAMAMOTO KEIICHI
IPC: H01L27/04
Filed: 1982-03-31
Abstract: PURPOSE:To reduce power consumption of an integrated circuit device by adequately selecting an operating voltage of function circuit block in accordance with an input clock frequency and by setting it to the optimum value. CONSTITUTION:An input clock frequency detection circuit 1 outputs digital data Q1-Qn of clock frequency from an input clock CLIN. A regulated power supply circuit 2 generates m-fixed voltages V1-Vm of a low voltage from an external power supply input VDD. A power supply selection circuit 3 outputs power supply selecting outputs S1-Sm from digital data Q1-Qn. A switch group 4 selects one voltage VDIN from the constant voltage group V1-Vm by means of the outputs S1-Sm and supplies this voltage VDIN to a functional block 5. With this structure, the circuit 1 detects the input clock frequency, operating speed of the functional block circuit and controls an operation voltage to the optimum value, thereby reducing power consumption.
Patent JP-H05221494-A (JP)
Title: Liquid distributing container
Inventor: HIYUUGO RODORIGESU
IPC: B65D25/40
Filed: 1992-02-05
Abstract: PURPOSE: To facilitate distribution operation in a quantitative liquid distribution container suitable for distributing motor oil to a engine, by providing with different valve actuators each serving as a liquid valve inlet means, a gas valve means, and a liquid valve outlet means. CONSTITUTION: In distributing oil accommodated in a compartment (16), a valve actuator (20) is pushed leftward from an indicated position in the figure, and is maintained in an indicated position in the figure by a self-locking mechanism (34). While a liquid inlet valve (44) and a gas outlet valve (62) are kept at closure position by spring force, a gas inlet valve (60) is opened. In this time, a second valve actuator (74) is moved rightward through a lever mechanism (88) to open an outlet port (70), by which the liquid in the compartment (16) is smoothly discharged through the outlet port (70). Afterwards, for stopping the discharge of the liquid, a valve actuator (20) is moved rightward and a second actuator (74) is moved leftward by pushing downward the lever of the self-locking mechanism (34).
Patent JP-H01227412-A (JP)
Title: Method and apparatus for surface treatment of plastic magnet
Inventor: HONMA SUKEHIRO
IPC: H01F41/02
Filed: 1988-03-08
Abstract: PURPOSE:To perform easy and complete burr removing and surface coating after removal of burrs automatically, by filling a barrel-like container, having on its surface a number of holes through which burrs fall and an air-blowing equipment inside, with a lot of plastic magnets and by removing the barrel-like container. CONSTITUTION:First, a barrel-like container 1 having on its surface a number of holes 5 through which burrs fall and air-blowing equipment 8 inside is prepared. The container 1 gets filled with a number of plastic magnets MG. With the barrel-like container 1 removing and pressurized air blowing inside, burrs are broken out of the surface of the plastic magnets MG by mutual corrosion of the magnets and fallen down through the holes 5. Otherwise, burrs are removed from the magnets MG by the same method as described before and then the surface coating synthetic resin is blown from a coating-material blowing equipment 11 for coating both inner and outer surfaces of the plastic magnets MG after burr removal and the resin is cured by heating. As for the barrel-like container 1, a polygonal container is used is used which has on its inner surface two parallel magnetic mixture plates 6 installed at right angles with the circumferential direction.
Patent JP-H11246580-A (JP)
Title: Phosphoric acid ester compound
Inventor: KIMURA RIYOUJI
IPC: C07F9/6521
Filed: 1998-03-06
Abstract: PROBLEM TO BE SOLVED: To obtain a new phosphoric acid ester compound not generating a toxic gas on its combustion, having a low volatility and a good thermal stability, not exhibiting a bleeding on blending with a synthetic fiber, showing an excellent fire retardant properties and useful as a fire retardant for synthetic resin. SOLUTION: This phosphoric acid ester compound is a compound of formula I [R1 , R2 are each a 1-8C alkyl or a (substituted) phenyl; R3 , R4 are each H or a 1-4C alkyl], e.g. a compound of formula II, which is obtained, e.g., by mutually reacting a phenolic compound, an isocyanulic acid and formaldehyde to produce a tris(hydroxyphenyl)isocyanulic acid compound, and then reacting the same with phosphorus oxychloride and a phenolic compound or an alcohol, etc.
Patent JP-H08249717-A (JP)
Title: Recording and reproducing head device
Inventor: ISHIKA TAKESHI
IPC: G11B7/09
Filed: 1995-03-14
Abstract: PURPOSE: To obtain an optical head device capable of accurately reproducing the information recorded in a recording medium. CONSTITUTION: In the optical disk device 2, a mirror motor for turning a galvano-mirror is turned by a prescribed angle based on the intensity of reflected laser beams which are detected by 1st and 3rd photodiodes 24A, 24C of a 1st photodetector 24. Along with this operation, both outputs from the 1st, 3rd photodiodes and 2nd, 4th photodiodes 24B,24D are composed, then signals corresponding to headers of the group are produced. By this procedure, intrusion of the laser beam having non-signal component to the laser beam having the signal component is prevented, and also the accurate tracking is attained.
Patent JP-H08248388-A (JP)
Title: Liquid crystal display device
Inventor: ITO TAKESHI
IPC: G09G3/36
Filed: 1995-03-14
Abstract: PURPOSE: To prevent line disturbance and generation of folding distortions of lateral fringes caused by it by providing a means which selectively supplies the voltages of different values to plural signal lines during the non-selective periods of each picture image. CONSTITUTION: Picture image signals outputted from a signal line driver 13 and the voltage generated in the voltage level generating section 14 during non-selective periods are switched by plural selection switches 15 to be outputted to the corresponding signal lines 32. The voltage supplied to the neighboring signal lines 32 during the non-selective period, that is to say, the voltage generated in the section 14 and supplied through each switch 15 are made to be all different from each other. Because of this, nonuniform changes in pixel voltage occur in the address line direction. Consequently a change in the luminance of pixels due to the holding characteristics of liquid crystal has periodicity no longer in space and time on the surface of the display panel 11 and does not come to the region where luminance irregularity causing picture quality deterioration is visually recognized by visual characteristics.
Patent JP-S61214200-A (JP)
Title: Record display element
Inventor: YOSHIIKE NOBUYUKI
IPC: G11B7/24033
Filed: 1985-03-19
Abstract: PURPOSE:To enable to repeat coloring-erasing by using a layer of semiconductor that generates electromotive force by light, an electrochromic layer that makes coloring-erasing electrochemically by generated electrons or positive holes and a recording element provided with an electrode necessary for erasing. CONSTITUTION:An ITO electrode z2 is provided on a glass substrate and semiconductor layers 3 are laminated on it in the order of P-i-n. Conductive bodies 4 are islanded on the surface n-layer and an EC layer 5 is laminated on it. Then, a recording element is assembled by bringing the substrate and a counter electrode 7 of ITO into contact with an electrolyte 6. External light is shaded, and the electrode 2 and the counter electrode 7 are made to a closed circuit, and under this condition, He-Ne laser is irradiated. Color is formed efficiently in spotlike form in the part irradiated by the laser beam. DC1V is applied between the electrode 2 and the electrode 7 making the electrode 2 side a positive pole. The spotlike coloring irradiating a fluorescent lamp on the element is erased perfectly. Thus, information storage by photowriting becomes possible and can be erased electrically, and writing and erasing can be made repeatedly.
Patent JP-H01230062-A (JP)
Title: Electrophotographic sensitive material for laser light
Inventor: TOYOFUKU KUNITAKA
IPC: G03G5/09
Filed: 1988-03-10
Abstract: PURPOSE:To obtain high sensitivity to laser light, more particularly semiconductor laser light by forming the above photosensitive material so as to have a conductive base body and an electrophotographic sensitive layer for laser light which is formed on one face of the base body and contains photoconductive zinc oxide, binder resin and specific sensitizer. CONSTITUTION:This photosensitive material has the conductive base body and the electrophotographic sensitive layer for laser light which is formed on one face of said base body and contains the photoconductive zinc oxide, the binder resin and the sensitizer. The sensitizer consists of at least one member selected from the compds. expressed by formula I and formula II. The conductive base body is selectable from, for example, a metallic sheet, metallic foil, etc. The zinc oxide incorporated into the conductive base body has photoconductivity and is, for example, the fine powder having about 0.3mum grain size. The binder resin incorporated into the photographic sensitive layer contains at least one kind selected from, for example, an acrylic resin, etc., and the binder resin is used in the 10-40% range of the solid content weight by the weight of the zinc oxide. The high sensitivity to the laser light, more particularly the semiconductor laser light is thereby obtd.
Patent JP-H05256716-A (JP)
Title: Semiconductor apparatus
IPC: G01L19/04
Filed: 1992-03-13
Abstract: PURPOSE:To obtain a semiconductor apparatus which can correct the temperature dependency of the sensitivity of a stress converter which converts the stress to electric signals by the piezoresistance effect, and the difference of the sensitivity among the individual apparatuses. CONSTITUTION:This apparatus is provided with a reference voltage source 18 showing the temperature dependency corresponding to the temperature characteristic of the sensitivity of a stress converter which has a bridge circuit constituted of resistances 2a-2d of the piezoresistance effect, and a voltage converter consisting of resistances 20, 21 and an operational amplifier 19. The reference voltage of the reference voltage source 18 is, via the voltage converter, applied to the stress converter. The ratio of the voltage impressed by the voltager converter to the stress converter to the reference voltage is selectively set by the resistance 20 forming an operational impedance of the operational amplifier 19. The temperature characteristic of the reference voltage compensates for the temperature characteristic of the stress converter. At the same time, the voltage converted by the voltage converter is adjusted to correct the variation of the sensitivity of each semiconductor apparatus.
Patent JP-S63221658-A (JP)
Title: Integrated circuit device
Inventor: KITAMURA MASAYOSHI
IPC: H01L21/822
Filed: 1987-03-10
Abstract: PURPOSE:To enhance the hermetical seal of an integrated circuit device, to suppress a leakage current and to prevent an electrolytic corrosion by disposing a thin film resistor on a region between first auxiliary electrodes, and forming the upper surface side in a triple hermetical sealing structure of an insulating film, a second auxiliary electrode and a protective film. CONSTITUTION:A thin film resistor 1 is formed of CrSiO or the like, and a positive electrode 2 and a negative electrode 3 are connected to both ends. A first auxiliary electrode 4 is opened at the side of the electrode 2, and surrounded in a shape in noncontact with the resistor 1. The metal electrode film 9 of the second auxiliary electrode is formed on an insulating film 8, and so coated as to cover the surrounding range of the resistor 1 of the electrode 8. Further, a protective film 10 is formed on the film 9. Since a hermetical sealing structure for preventing moisture from invading to the resistor 1 is formed of the electrode 4 opposed to the side, and a triple covering of the upper surface of the electrode, the upper side of an insulating layer 11 is sealed from all directions.
Patent JP-H03257902-A (JP)
Title: Manufacture of voltage nonlinear resistor
Inventor: IMAI OSAMU
IPC: C04B35/00
Filed: 1990-03-08
Abstract: PURPOSE:To obtain a voltage nonlinear resistor whose element uniformity and electric characteristics are improved, by pulverizing metal oxide to be equal to or smaller than specified grain size, and mixing the obtained impalpable powder with zinc oxide in a specified manner. CONSTITUTION:In a manufacturing method of a voltage nonlinear resistor wherein metal oxide like bismuth oxide is added to material whose main component is zinc oxide, and mixed and backed, the mixture of metal oxide is pulverized to be equal to or smaller than specified grain size. The obtained mixture after pulverization is mixed together with zinc oxide, binder, and dispersant at a temperature of 40 deg.C or lower for a specified time by an attritor using zirconia balls. Then granulation, molding, and baking are performed. Since the pulverized mixture, zinc oxide, binder, and dispersant are mixed at a temperature of 40 deg.C or lower for a specified time by the attritor using zirconia balls, the mixing and dispersing of zinc oxide and metal oxide are improved, the contamination from media is avoided, and the gelation of slurry is prevented. Thereby the uniformity of an element can be improved.
Patent JP-S59183449-A (JP)
Title: Memory space extending system of microcomputer system
Inventor: KOJIMA TAKASHI
IPC: G06F13/00
Filed: 1983-04-01
Abstract: PURPOSE:To extend easily a memory space by using an existing microcomputer with addition of a circuit outside of a ready-made microcomputer. CONSTITUTION:When a memory space is extended, the program memory space is allotted to 16 sets of memories (00000) with the RAM space alloted to 16 sets of memories (10000) and (20000) respectively. The instruction which gives accesses to RAM space of each 16 sets of memories (10000) and (20000) is decided among MOVE, LOAD and STORE instructions of an existing microcomputer i- 8085. This decided instruction is registered to an instruction word analysis switch indicating part 205. While an upper address (1) 16 of the 16 sets of memories (10000) is stored to a memory upper address storage part 206 with each pio instruction when an access is given to the 16 sets of memories (10000) for program production. While an address (2) 16 is stored to the part 206 with the pio instruction when an access is given to the 16 sets of memories (20000). Then the memory access is carried out by programming.
Patent JP-H05334275-A (JP)
Title: Neural network device and neural network learning conclusion deciding method
Inventor: SHIROSAKA AKIMASA
IPC: G06N3/08
Filed: 1991-03-19
Abstract: PURPOSE:To judge the reliability of the output with the small number of neural networks by deciding the learning conclusion with the levels of the output signals of output layer nerve cells and teacher signals whose level is set at the intermediate value of an input/output characteristic function. CONSTITUTION:The neural network device is provided with the neural network 12 and a learning control part 14, the neural network 12 is constituted of an input layer, an intermediate layer and an output layer and the layers are respectively constituted of 64, 15 and 10 pieces of the nerve cells 20, 18 and 16. The learning for the neural network 12 is performed by the learning control part 14 corresponding to an error reverse propagation learning method. In this case, the levels of the teacher signals for the respective output layer nerve cells 16 of the neural network 12 are respectively set at the intermediate value of the input/output characteristic function. Then, when the signals are inputted to the neural network 12 and all the corresponding output signals of the respective output layer nerve cells 16 are at the same levels of the respective teacher signals, the learning control part 14 decides the learning conclusion of input/ output relation as the entire neural network 12.
Patent JP-H06244266-A (JP)
Title: Wafer transfer carriage
Inventor: OKAWA YOSHINORI
IPC: B65G49/07
Filed: 1993-02-19
Abstract: PURPOSE:To surely transfer wafers kept in a clean room to a plurality of processing apparatuses each provided with a wafer carrier set section. CONSTITUTION:A wafer carrier transferring means 6 is provided to transfer a wafer carrier 4 on which wafers 3 are placed to a processing apparatus 5. A wafer container 2 isolated from the outside by a shutter 7 and a height controlling means 9 which controls the wafer carrier 4 in height corresponding to the processing apparatus 5 are provided. By this setup, the wafer carrier 4 can be easily and surely transferred to wafer carrier set sections 8 different in height provided to the processing apparatuses 5. The wafer container 2 inside the wafer transfer carriage 1 is isolated from outside air and kept high in cleanness, so that all clean room is not required to be kept unnecessarily high in cleanness.
Patent JP-S58172011-A (JP)
Title: Channel selector
Inventor: OKAMOTO RETSU
IPC: H04N7/16
Filed: 1982-04-01
Abstract: PURPOSE:To select a specific channel of a CATV system by providing two input operation parts, two memories, and a memory selecting circuit, and selecting the 2nd memory when special operation is performed by the combination of those two input operation parts. CONSTITUTION:When a channel selection key for a desired channel CH is operated at an input operation part 1, a number corresponding to the CH is displayed on a display 2 on the basis of information from a controller 4 and then stored in the 1st memory 3 for general CH channel selection information storage under the command of the memory selecting circuit 9 to read tuning voltage information corresponding to the CH. This information is converted by a DA converter 5 into a tuning voltage, which is impressed to a terminal VT of a tuner 6 to receive a signal over the selected desired CH. When a special operation, is carried out at an input operation part 1-7 in combination, the specification of the circuit 9 is switched from the memory 3 to the 2nd memory 8 for specific CH channel selection information storage and tuning voltage information is read out of the memory 8 and converted by the converter 5 into a turning voltage, which is supplied to the tuner 6 to receive a signal over a specific CH.
Patent JP-H01229710-A (JP)
Title: Integrated control device for suspension and steering
Inventor: YOKOTE MASATSUGU
IPC: B60G17/00
Filed: 1988-03-09
Abstract: PURPOSE:To properly control suspension and steering integrated on good and bad roads by constituting a device controlling a suspension device and a steering device, which are able to change their characteristics respectively, in accordance with a running road surface in its detected condition by a controller. CONSTITUTION:A suspension device (a) able to change the suspension characteristic is provided. While a steering device (b) able to change the steering characteristic is provided. Further a means (c) detecting a running road surface condition is provided. A controller (d), which automatically switches at least the suspension characteristic to a hard side, when the running road surface condition changes into a bad road further when the combination characteristic of 'soft' and 'light' is selected, while the suspension characteristic to a soft side further the steering characteristic to a light side respectively when the combination characteristic of 'hard' and 'heavy' is selected, is provided.
Patent JP-S58175146-A (JP)
Title: Semiconductor laser
Inventor: SUENAGA HIDEO
IPC: G11B7/126
Filed: 1982-04-05
Abstract: PURPOSE:To reduce the optical output variance noise accompanied with the longitudinal mode change of a semiconductor laser and to improve the efficiency of light use, by returning a specific quantity or more of the light of the semiconductor laser by an optical feedback material. CONSTITUTION:Since the noise is reduced rapidly when about >=10% quantity of light is fed back to a semiconductor laser chip, an optical feedback material 17 is fixed on the side of a light emitting chip 13 of a cover glass 14. This optical feedback material 17 is provided with a hollowed part 18, through which a luminous flux (part THETA) used for reading out a signal from a disc passes, and a reflective face 19 which reflects an unused light 16. As the result, if the numerical aperture NA of a coupling lens is 0.15, >=50% quantity of light emitted from the laser is fed back stably; and further, since the actually used luminous flux has no loss, the semiconductor laser which has a high efficiency of light use and has less noise is obtained.
Patent JP-H05281811-A (JP)
Title: Image forming device
IPC: H04N1/29
Filed: 1991-02-28
Abstract: PURPOSE:To easily miniaturize a device by forming both carrying paths in parallel on both sides of a drum so that the drum may be put between them. CONSTITUTION:The carrying path for reading an original 10 and the carrying path for recording paper 20 are formed on the upper surface side and the lower surface side of a photosensitive drum 4 in parallel with each other in a horizontal direction passing the tangent of the drum. A paper feeding tray 11 provided on the upper part of the right wall of the device, a feeding roller 13 used also for preventing double feeding which is arranged near the right wall in the device through a paper feeding aperture 12, a contact type reading sensor 14 which is arranged to be faced to the top face of the drum by putting the carrying path 10 between them, a paper ejecting aperture 15, and a paper ejecting part formed on the upper surface side of a covering body 1a on the left side of the device are respectively arranged and formed in the carrying path 10. On the other hand, a paper feeding roller 21 at the right end of a paper feeding cassette 2, a resist roller 22, a transfer roller 23 which rotated in contact with the lower surface of the peripheral surface of the drum 4, a fixing roller 24 arranged at a corner part on a bottom side in the device, and a paper ejecting tray 26 which is arranged on the lower step side of the right wall in the device through a paper ejecting aperture 25 are respectively arranged and formed in the carrying path 20 for forming an image.
Patent JP-H09232338-A (JP)
Title: Semiconductor device and manufacture thereof
Inventor: NASHIMOTO YASUNOBU
IPC: H01L21/338
Filed: 1996-02-19
Abstract: PROBLEM TO BE SOLVED: To improve high-frequency characteristics and reliability in a Schottky gate field effect transistor(FET) with high output and high calorific value, by radiating heat caused by an increase in power effectively. SOLUTION: An insulating plate 5 made of AlN is stuck to a GaAs substrate. The insulating plate 5 has heat conductivity higher than that of GaAs and a coefficient of thermal expansion almost equal to the GaAs. Then, the GaAs substrate is made thinner below a thickness of 10μm, and an FET is formed on a device formation layer 2a. The AlN plate is made thinner to a desired thickness and pelletized. These pellets are mounted on a heat sink of a package 11.
Patent JP-2000245773-A (JP)
Title: Liquid impermeable back sheet for sanitary napkin
Inventor: SUGIMURA TATSU
IPC: A61F13/20
Filed: 1999-03-03
Abstract: PROBLEM TO BE SOLVED: To provide a fluid-impermeable back sheet capable of keeping the air permeability and preventing the leakage of body fluid. SOLUTION: A liquid-impermeable back sheet 1 for sanitary napkin having an upper surface 2 and a lower surface 3, and made of a thermoplastic synthetic resin, has a large number of independent recessed zones 4 downwardly recessed from the lower surface 3, and a smooth plain zone 5 excluding the recessed zones 4, and each recessed zone 4 has at least one pore 6 penetrating through the sheet 1 on an area excluding a peripheral edge 7 of the zone 4.