baber/WOPTO huggingface dataset:
Patent JP-S6043673-A (JP)
Title: Mechanism for preventing toner sticking
Inventor: SAITOU TAKESHI
IPC: G03G15/08
Filed: 1983-08-20
Abstract: PURPOSE:To obtain stably an always satisfactory image by the constitution in which a toner sticking to the contact part between a toner carrying body and a toner processing member is forcibly removed by a scraping member actuated when a toner vesel is exchanged. CONSTITUTION:A toner cartridge 1 is pressed and fixed by the short side part 3c of a protective cover 3 which is freely turnable around a shaft 3a. The cartridge 1 can be exchanged when the cover 3 is turned in the direction of a blanked arrow. The toner is liable to stick near the contact part P between a doctor blade 7 and a sleve 6 but the top end 8a of a scraping member 8 advances along the surface 7a if the blade 7 and passes through the contact part P when the cartridge 1 is exchanged. The forcible scraping away of the toner T sticking to said contact part is eventually resulted. The blade surface 7a is thus maintained smooth at all times and the thin toner layer adequated fro developing is stably formed.
Patent JP-H0821293-A (JP)
Title: Control device for engine
Inventor: MINAMITANI KUNIKIMI
IPC: F02D45/00
Filed: 1994-07-01
Abstract: PURPOSE:To improve precision of a prediction value of an intake air amount both during steady operation and during transient operation by predicting an intake air equivalent at a predicted period by computation based on a detecting value of the intake air equivalent. CONSTITUTION:A control device for an engine comprises a first computing means 22 to compute a prediction filling efficiency at a period later than a computing period by a first set period when filling efficiency is predicted at a predicted period through computation based on a detecting value by an intake air equivalent detecting means 21; a second computing means 23 to compute a prediction filling efficiency at a period layer by a second set period shorter than the first set period; an operation state detecting means 24; and a prediction computing and varying means 25 to effect variation in such a manner that prediction is effected by the second computing means 23 during steady operation and prediction is effected by using the first computing means 22 during given transient operation.
Patent JP-S5674116-A (JP)
Title: Preparation of modified phenolic resin
Inventor: KODERA KOUHEI
IPC: C08G8/28
Filed: 1979-11-20
Abstract: PURPOSE: To obtain a modified flame-retardant phenolic resin suitable for a laminate having improved impact resistance stably, by using a diepoxy compound of specific structure as a plasticizing modifier for a resol phenolic resin.  
     CONSTITUTION: (B) A compound expressed by formula I [at least one of Z and Z' is formula II (X is Br or Cl), the other is formula II, ethylene, propylene or a combination of 2W18 thereof via an O atom] in an amount of preferably 10W200g per mole of a phenol constituting the component (A) is added to (A) a resol phenolic resin or the system of preparing the resin. 
     COPYRIGHT: (C)1981,JPO&Japio
Patent JP-S5941466-A (JP)
Title: High speed cutting tool coated with hard layer
Inventor: BABA HIDETOSHI
IPC: B23B27/14
Filed: 1982-08-31
Abstract: PURPOSE:To provide the titled tool having excellent anti-wear property and toughness in high speed cutting, obtained by successively coating the surface of a hard alloy substrate with four hard layers consisting of a layer comprising titanium carbide or the like, a layer comprising aluminum nitride or the like, an aluminum oxide layer and a titanium nitride layer in a proper thickness. CONSTITUTION:A first coating layer with a thickness of 1-5mum comprising one kind of titanium carbide, titanium nitride or titanium carbonitride is formed on a hard alloy substrate and a second coating layer with a thickness of 0.5-5mum comprising aluminum nitride and/or aluminum oxide nitride is provided on the outside of said first layer. A third coating layer with a thickness of 0.5-5mum comprising aluminum oxide is further provided on the outside of said second layer and a fourth layer with a thickness of 0.5-5mum comprising titanium nitride is provided on said third layer as an uppermost layer while the total thickniness of the above mentioned four layers is adjusted to 2.5-15mum. The above mentioned four coating layers are excellent in adhesiveness, heat conductivity, toughness, hardness, heat resistance, anti-wear property or the like and, by coating a hard alloy substrate with four coating layers, an excellent high speed cutting tool can be obtained.
Patent JP-S63317619-A (JP)
Title: Laser beam thermal processing device
Inventor: YAMADA TSUGIO
IPC: B23K26/082
Filed: 1987-06-19
Abstract: PURPOSE:To improve the working rate of a laser oscillator and to shorten the hardening time by changing the reflection angle of a mirror to an arbitrary angle at a high speed at the time of reflecting laser light by a mirror and hardening a work. CONSTITUTION:The laser light 1 is condensed light 5 is reflected by the mirror 4 and is projected on the work 6, by which the work is hardened. The reflection angle of the laser light 5 is changed as desired by the actuation of an operating cylinder 13 and while the laser light is oscillated at the high speed in a vertical direction at every arbitrary time, the laser light is projected on the work 6 to form hardened parts alternately in the vertical direction. The condensed laser light 5 is rotated by a motor 8 for rotating a nozzle in the same manner as heretofore and is simultaneously vertically moved by a motor 11 for vertical movement to spirally harden the work 6 at the time of the laser light irradiation so that the hardened parts are formed in checkered patterns. The working rate of the laser oscillator is thereby improved to about 100% and the hardening time is shortened by about half.
Patent JP-S5484223-A (JP)
Title: Switching power source circuit
Inventor: KOIZUMI AKIO
IPC: H02M3/335
Filed: 1977-12-16
Abstract: PURPOSE: To prevent abnormal operation at the time of connecting power source with such an arrangement that a pulse signal from an oscillating circuit is supplied to a pulse width modulator when the detection level of a voltage detection circuit reaches a predetermined value.  
     CONSTITUTION: The output side of a control circuit power source 13 is connected to a voltage detection circuit 14, which serves to detect the power source output voltage and produce a reset pulse after a predetermined period of time, and the output side of which is in turn connected through an inverter 15 to one input terminal of an AND circuit 16 having the other input terminal connected to the output side of an oscillating circuit 11 and the output terminal connected to a pulse width modulator 10. With this arrangement, switching operation of the switching power source circuit can be obtained with the oscillating circuit always in the steady state, so that it is possible to prevent abnormal operation at the time of connecting the power source and ensure stability of the circuit itself. 
     COPYRIGHT: (C)1979,JPO&Japio
Patent JP-H06337806-A (JP)
Title: Information processor
Inventor: ISHIBASHI MASAYUKI
IPC: G06F12/00
Filed: 1993-05-28
Abstract: PURPOSE:To execute a data base definition for storing input data by classification and generation of a data display screen deciding a data display area without using of a programming language and to define the data base at the time of generating the screen so as to improve operability. CONSTITUTION:A screen generation part 3 generates the data display screen and stores it in a file 4 based on the attribute values of parts sticked to the target screen 11 of application development by selecting them from an input parts designation column 12 and parts which are conversationally inputted in an attribute value setting column 16. A data base definition part 5 generates a data base item for classifying and storing input data based on the attribute values of the parts which are conversationally inputted at the time of generating the data display screen, and input data is accumulated in the data base 6 in accordance with the item.
Patent JP-2000338448-A (JP)
Title: Projection type picture display device
Inventor: SAWAI YASUMASA
IPC: G02B27/18
Filed: 1999-05-31
Abstract: PROBLEM TO BE SOLVED: To facilitate correction of the aberration of combined light by providing a projection optical system with a light shielding member transmitting only luminous flux composed by a composed optical system so as to include all of plural light beams having different components near a pupil almost conjugate to a small light source image formed by an integrator optical system. SOLUTION: A projection optical system 30 is a non-telecentric optical system and has the pupil PP between lenses 33 and 34. Dichroic mirrors 26 and 27 are arranged on an optical path leading to a lens 32 from condenser lenses 31R, 31G and 31B and combine the light made incident in the non-telecentric state. The combined light is projected to a screen from a lens 38 through the lenses 32 to 37 and formed into the image. In the projection display device, the light shielding member 39 transmitting only the luminous flux correctly combined to include all of R light, G light and B light and intercepting other luminous flux is arranged near the pupil PP of the optical system 30, whereby the light reflected on the surface of a parallel plate is prevented from being mixed in the projected light.
Patent JP-S63317289-A (JP)
Title: Silver alloy filler metal for brazing
Inventor: KASHIWAGI KOZO
IPC: C22C5/06
Filed: 1987-06-18
Abstract: PURPOSE:To obtain an Ag alloy filler metal for brazing suppressing tie surface roughening of the filler metal after brazing and also suppressing the occurrence of ruggedness, by incorporating a specified amt. of a specified component into an Ag-Cu-Sn alloy. CONSTITUTION:This Ag alloy filler metal for brazing is an alloy consisting of 20-50wt.% Cu, 3-12wt.% Sn, 0.001-1.5wt.% at least one among B, Ga and Ge and the balance Ag. Since the surface roughening of the filler metal after brazing is suppressed and the occurrence of ruggedness is also suppressed, even when a member brazed with the filler metal is subjected to acid cleaning or plating, only a small amt. of a cleaning soln. or the like enters the surface recesses in the filler metal and the tarnish and corrosion of the brazed part are inbibited.
Patent JP-H0317735-A (JP)
Title: Semiconductor arithmetic unit
Inventor: KUBOKAWA MICHIYA
IPC: G06F7/02
Filed: 1989-06-14
Abstract: PURPOSE:To increase the computing speed for the subsequent maximum value operation and to compute the maximum value at high speed by applying the maximum value arithmetic operation to the fed-back value and the MSB data of the next serial data with the same sequence. CONSTITUTION:An MSB is inputted to the input of a 3rd gate means 3 from a shift register means 1 for the 1st input data at the rise of a CLK2. Then the output of the means 3 is inputted to a 4th multi-input gate means 4 together with other similar outputs. The means 4 outputs 0 when at least one of '0' exists in either one of inputs. The 1st bit value is defined as A = B = C = 1 and therefore the output of the means 4 is equal to 1, and the value of the MSB of a 5th shift register means 5 is also equal to 1. At the next stage, A = 0 and B = C = 1 are satisfied. In this case, the output of the means 4 is equal to 0 and 0 is inputted to the means 5 at the rise of a CLK1. The output of a 6th gate means 6 of A is equal to 1, and the 2nd data masking state holding means 2 of A is active at the rise of an XCLK1. Then the subsequent data of A are masked to 'all 1'.
Patent JP-S5845739-A (JP)
Inventor: BERUNI PATORISHIA CHIYON
IPC: B01J20/00
Filed: 1982-09-02
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S5675759-A (JP)
Title: Callout system among containers
Inventor: MIYAZAKI YASUO
IPC: G08B25/04
Filed: 1979-11-22
Abstract: PURPOSE:To enable to call out the maintenance personnel with the buzzer in the system failure alarm circuit, by providing callout keys in a system failure alarm circuit. CONSTITUTION:When a CALL key of a container 1 is on, a current flows to the path of ground of container 0, make side of CALL key of container 1, stationary side of CALL key of container 1, stationary side of CALL key of container 0, break side of CALL key of container 0, buzzer of container 0 and battery, to alarm the buzzer of the container 0. Similarly, the buzzer of the container 2 is alarmed. That is, when the CALL key is on in one container, the buzzer circuit of itself is cut off, a current flows to the buzzer circuit in all other containers to energize the buzzers.
Patent JP-H091304-A (JP)
Title: Method for controlling molten metal surface level in mold at the initial stage of casting in continuous casting apparatus
Inventor: WATABE TETSUYA
IPC: B22D11/18
Filed: 1995-06-19
Abstract: PURPOSE: To provide a control method of molten steel surface level in a mold at the initial stage of casting in a continuous casting apparatus which secures holding temp. of the molten metal in the mold and can be smoothly shifted to a fixed value level control. CONSTITUTION: Pouring of the molten steel into the mold set with a dummy bar head is started by using a molten metal flow rate control device and also, pull-out of the dummy bar is started at the point of time when the molten steel surface reaches a preset pull-out starting level. Further, in the control method of the molten steel surface level in the mold at the initial stage of casting of shifting the device to the fixed value level control when reaching a preset molten steel surface level, as for a range from the preset molten steel surface level to the dummy bar pull-out starting molten steel surface level, the deviation between the preset surface rising speed and the actual molten steel surface rising speed is obtd. and a closed loop control is executed to the molten steel surface rising speed so as to eliminate the deviation.
Patent JP-S6043631-A (JP)
Title: Display panel
Inventor: SUGATA MASAO
IPC: G02F1/1335
Filed: 1983-08-20
Abstract: PURPOSE:To position color filters and drain electrodes accurately and obtain accurate color display by forming row electrodes and column electrodes on a counter substrate and a nontransmissive member made of a metallic thin film along semiconductors. CONSTITUTION:The nontransmissive member 12 and color filters 13, 13'...13'''... are formed on a substrate 7 provided with the counter electrode 8 of a liquid- crystal display panel, and covered with an insulating layer 9, and spacer members 6, 6'...6'''... are arranged on the insulating layer 9 along the nontransmissive member 12. When this substrate S is put opposite to a substrate S provided with semiconductor driving elements 2, 2'... and column electrodes 1a, 1a'..., the nontransmissive member 12 is arranged along the row electrodes 1a, 1a'.... Consequently, only when signals are inputted to the row electrodes 1a and 1a', column electrodes 3, 3'... selected among intersections of the electrode matrix conduct to drain electrodes to apply a voltage between the drain electrodes 4, 4'... and counter electrode 8. The array state of liquid-crystal molecules varies with the applied voltage to attain display.
Patent JP-H0316217-A (JP)
Title: Manufacture of semiconductor device
Inventor: UENO KOJI
IPC: H01L21/3205
Filed: 1989-06-14
Abstract: PURPOSE:To improve coating ratio at the time of wiring and enable processing in a short time by switching over gas systems in a dry etching apparatus. CONSTITUTION:An interlayer insulation film 2 of a semiconductor device is dry-etched by approximately 1/3 of an upper portion of the interlayer insulation film by using fleon gas, such as mixture of trifluoromethane (CHF3) and oxygen (O2) for example. Then with gas of 100% oxygen used, etching is performed by plasma-processing of resist. The above dry etching process and the plasma processing process are repeated. Finally the interlayer insulation film 2 is dry- etched by mixture of CHF3 and O2 to form a contact hole 4. Thus a contact hole 4 having high coating ratio at the time of wiring can be formed only by continuous operation of switching over gas systems supplied in a dry etching apparatus thereby completing the process in a short time.
Patent JP-H01318457-A (JP)
Title: Isdn communication system
Inventor: TONE MASAHIRO
IPC: H04N7/173
Filed: 1988-06-20
Abstract: PURPOSE:To realize the payment-on-delivery communication with no special control required at the network side by storing the transmitted identification number based on the set information in case a communication request is received from another terminal and performing the communication via a starter based on the stored identification number after the communication is once completed. CONSTITUTION:A facsimile equipment 290 cuts temporarily the communication connection in case it receives the call setting procedure signal and then a communication request from a facsimile equipment 200 containing the registered telephone numbers. Thus the equipment 290 once cuts the communication received from the equipment 200 and then starts a communication requests to the equipment 200 to receive the picture information from the equipment 200. Thus it is possible to attain the payment-on-delivery communication with no special control required at the network side.
Patent JP-S5483779-A (JP)
Title: Junction type field effect semiconductor device
Inventor: KANAMORI SHIYUUJI
IPC: H01L29/06
Filed: 1977-12-16
Abstract: PURPOSE: To reduce a noise voltage low by making mutual conductance (gmo) large and gate diffusion resistance RG small without deteriorating a threshold level and reverse dielectric strength.  
     CONSTITUTION: In N-type epitaxial layer 12 on P-type substrate 11, P + -type substrate extraction layer 13, P + -type gate layer 14, N + -type drain 15, and N + - type source 16 are formed. The places, where a source and drain ar expected to be formed, surrounded with gate layer 14 are shorted to substrate 11 at the same time as the formation of substrate extraction layer 13, so that the gate width for a noise- source resistance will be from substrate extraction layer 13 at the external circumference separating epitaxial layer 12 to the region where a drain or source layer is shorted to the substrate. When this distance is denoted by Z' and the sheet resistance of the gate is by Ps, RG is nearly equal to Ps×Z'/nl, so that RG can be reduced with no special process. In this way, the noise voltage can be reduced without deteriorating Vth and reverse dielectric strength, while gate width z is being made smaller. 
     COPYRIGHT: (C)1979,JPO&Japio
Patent JP-H0818178-A (JP)
Title: Production of high frequency circuit board
Inventor: ERIGUCHI HIDENORI
IPC: H05K1/03
Filed: 1994-07-04
Abstract: PURPOSE:To obtain a high frequency circuit board excel,lent in heat resistance by applying a prepreg impregnated with a curable resin to the opposite sides of a porous sheet of ultrahigh molecular weight polyethylene impregnated with a curable resin and then curing the repreg simultaneously by ha press thereby filling the pores with the curable resin. CONSTITUTION:A reinforcing sheet 2, composed of a basic fiber material impregnated with a curable resin 3, 15 applied to the opposite sides of an ultrahigh molecular weight polyethylene porous sheet 1 impregnated with a curable resin. A metal conductor layer 4 is applied thereto and hot pressed simultaneously. The ultrahigh molecular weight polyethylene porous sheet 1 is formed by sintering ultrahigh molecular weight polyethylene powdery particles and bonding the particles by fusion through a continuous air layer. A woven or nonwoven fabric of glass or plastic fibers, normally employed in the production of printed circuit board, is employed as the basic fiber material. The basic fiber material is impregnated with a curable resin varnish 3 and then dried to form a prepreg 2.
Patent JP-H0728428-A (JP)
Title: Logic circuit
Inventor: SUMI SHINOBU
IPC: G09G3/36
Filed: 1993-06-23
Abstract: PURPOSE:To provide a logic circuit capable of reducing power consumption and constituted of multistage connection of inverters by supplying an input signal to a gate electrode and on the other hand, supplying an inversed input inverting the input signal to the gate electrodes of transistors for loads of odd stages. CONSTITUTION:This circuit is constituted so that the inverter consisting of the transistor 21a for load by a MOSFET and the transistor 22a for driver by the MOSFET are multistage connected. In the logic circuit consisting of the inverter circuit successively applying the output of the inverter of a preceding stage to the gate electrode of the transistor 22a for driver of a poststage, the input signal is supplied to the gate electrode of the transistor 22a for driver of a first stage and the gate electrodes of the transistors 21b, 21d for loads of even stages, and on the other hand, the inverse input signal inverting the input signal is supplied to the gate electrodes of the transistors 21a, 21c for loads of odd stages. Thus, the occurrence of a through current in each inverter is prevented, and useless power consumption is suppressed, and the power consumption is reduced sufficiently.
Patent JP-H0444115-A (JP)
Title: Input device for multi-item data
Inventor: TAKAHASHI KOJI
IPC: G06F3/023
Filed: 1990-06-11
Abstract: PURPOSE:To display the designated item data in full spelling on a display screen if necessary by displaying with scroll a full spelling in a display area of each item data displayed with abbreviation after reception of a display switch instruction. CONSTITUTION:When the full spelling display of the item data is designated by a display instruction means 2, a display control means 3 outputs the full spelling data corresponding to the item data under display to a display means 1 to execute the display control of the data. Then the means 1 displays the full spelling data with scroll in a display area where the abbreviated characters are so far displayed under the display control of the means 3. Thus the optional one of those item data displayed in multiple items can be displayed in a full spelling with a simple operation. Then the item contents are easily confirmed.
Patent JP-S5275966-A (JP)
Title: Demodulation circuit for multi-valued carrier wave digital signal
Inventor: WASHIO MAKOTO
IPC: H04B1/00
Filed: 1975-12-20
Abstract: PURPOSE: To realize demodulation and reproduction circuit of 4-level QAM signal by adding two subtraction circuits and two discrimination reproduction circuits to ordinary 4-phase PSK signal demodulation circuit. 
     COPYRIGHT: (C)1977,JPO&Japio
Patent JP-S5942097-A (JP)
Title: Biological teratment of waste water containing organic material
Inventor: UCHIMIZU MAMORU
IPC: C02F3/30
Filed: 1982-08-31
Abstract: PURPOSE:To treat stably waste water contg. org. pollutants even if there is a change in the concn. of pollutants in a device which treats said waste water in an anaerobic tank and the 1st and the 2nd aerobic tanks and separates clean water in a settling and separating tank by accelerating the activity of the waste water in said anaerobic tank and the aerobic tanks. CONSTITUTION:The waste water contg. org. polluting components is fed to a conditioning tank 1 and an anaerobic tank 2; further the waste water treated in the 1st aerobic tank 3 is mixed with the waste water from the tank 2, and is fed successively to the 2nd aerobic tank 4 and a settling and separating tank 5; at the same time, the aerobic sludge separated in the tank 5 is mixed with the waste water from said tank 2 and the mixture is returned to the tank 3. Part of the waste water in the tank 2, the tanks 3, 4 in this case is put into respective activation tanks 8, 9, 11 where the waste water is aerated and stirred by the air sucked from a pump 6 to increase the activity of bacteria. The cleaning up of the waste water is thus accomplished stably even if the content of the org. pollutants in the waste water changes sharply.