baber/WOPTO huggingface dataset:
Patent JP-S57120867-A (JP)
Title: Appreciating device for capacity of removing incidence disturbance
Inventor: ISHINO TAKESHI
IPC: G01R31/00
Filed: 1981-01-21
Abstract: PURPOSE:To obtain an appreciating device of incidence disturbance removing capacity which is low in its manufacturing cost and compact in its size, by installing a wave absorber on the inside surface of a metallic case, and holding the electric field intensity in the inside of parallel electric conductors, within a desired frequency range. CONSTITUTION:In a metallic case 20, a lower electric conductor 1 is placed so that the center axis in the lengthwise direction coincides with one diagonal line of a lower surface 20d of the metallic case, and is connected so that the impedance between the lower electric conductor 1 and the lower surface 20d of the metallic case. To a feeding end 3a of parallel electric conductors, a coaxial line 50 for supplying a disturbance signal to the parallel electric conductors is connected. Also, to the other end 3b, a terminal resistance is connected. Since said electric conductors are operated as an antenna, a wave absorber 30 is installed to the case 20 functioning as a reflection body, which exists in its circumference, by which reincidence of an electromagnetic wave to the inside of the parallel electric conductors is prevented, and a prescribed electric field intensity is held.
Patent JP-H02186483-A (JP)
Title: Picture processor
Inventor: SUKAI KAZUAKI
IPC: G06F12/04
Filed: 1989-01-12
Abstract: PURPOSE:To simplify a procedure and to improve a processing speed by applying arithmetic to video data by a VRAM controller which receives the output of a dual port RAM. CONSTITUTION:In dual port RAMs 5-8, respective serial input/output and parallel input/output are provided and each dual port RAM is connected to a cascade by the serial input/output. For the video data plotted through a CPU bus 10 to the port 5, the arithmetic is applied by a VRAM controller 1 and the data go to be the serial output of the dual port RAM and are inputted to the RAM 6. For the data, the new arithmetic is applied by a VRAM controller 2 and the data are outputted to the RAM 7. For the data inputted to the RAM 7, the arithmetic is applied by a VRAM controller 3 and outputted to the RAM 8. Then, the output of the RAM 8 is given to a display CRT 9 as the video data.
Patent JP-H02186844-A (JP)
Title: Communication method of mobile body communication
Inventor: ITO SADAO
IPC: H04Q7/34
Filed: 1989-01-13
Abstract: PURPOSE:To improve communication quality by enabling communication with a mobile radio means which exists in a service area covered by a neighboring another radio base means to be performed by increasing transmission output within a range allowable by the speech traffic of the radio base means at the time of transferring an outgoing/incoming call to the mobile radio means. CONSTITUTION:The communication of the same communication content is performed in parallel between plural radio base stations 30-1 to 30-n and mobile radio equipment by using plural channels. At this time, when the channel (old channel) whose communication quality becomes less than a constant value occurs, a radio system controller 20 detecting the above fact completes the communication of the old channel by switching the channel to another one channel (new channel) between another one radio base station which satisfies constant communication quality, and the communication of the same communication content can be performed without generating interruption by using the plural channels including the new channel. In such a way, it is possible to secure satisfactory communication quality.
Patent JP-H03213445-A (JP)
Title: Step lock device for microshovel car
Inventor: MURAKAMI YOSHIAKI
IPC: E02F9/16
Filed: 1990-01-16
Abstract: PURPOSE:To facilitate execution of housing operation during the non-use of a step by foldably and pivotally supporting the step to the step arm of the rear part of a car body, and detachably engaging the tip part of a lock lever, inserted in the step and provided at a rear end part with a handle, with the rear end part of the step arm. CONSTITUTION:In a microshovel car contrived as to operate it by a worker standing on a step 24 or at the rear of car body, brackets 21 are suspended from both sides of a transmission case, the front end part of a step arm 22 is pivotally mounted thereto, and the step arm is vertical movable through operation of a step cylinder 23. The step 24 is rockably mounted to the rear end part of the step arm 22 by means of a pin 30, and rockable in a folded state by means of a lock lever 25 inserted in the step 24. namely, a guide plate 33 in a curved shape is secured to the pin 30 through support plates 31 on both sides, and a lock piece 37 being the tip of the lock lever 25 provided at a rear end with a handle 39 is engageable with holes 34a and 34b formed in a guide plate 33.
Patent JP-S51125311-A (JP)
Title: Aliphatic ethers
Inventor: NOORU KOOEN
IPC: C07C53/126
Filed: 1976-01-26
Abstract: A synthesis of vitamin E in racemic or optically active forms from methacryolein or beta-hydroxyisobutyric acid including intermediates in this synthesis.
Patent JP-S58126750-A (JP)
Title: Preparation of konjak having high digestibility, nutrient and moisture absorption
Inventor: WAKABAYASHI KESAYOSHI
IPC: A23L29/244
Filed: 1982-01-19
Abstract: PURPOSE:To obtain the titled KONJAK (paste made of the starch of the devil's tongue), by mixing bean-curd refuse with bean curd, freezing thawing and dehydrating the mixture to obtain particles having the size of rice grain, adding the particles to the solution of KONJAK in the course of the coagulation in the preparation of KONJAK, and making KONJAK from the solution by conventional method. CONSTITUTION:30% bean-curd refuse is mixed with 20% bean curd, frozen, thawed, and dehydrated to a water-content of about 80%. The dehydrated product is broken to amorphous particles of nearly the size of rice grain. Separately, a solution of KONJAK is mixed with lime water for coagulation, and when the coagulation proceeds about 40%, the particles are added slowly to 50% of the above solution, and the mixture is processed by the conventional KONJAK preparation process to obtain the objective product. The particles of bean-curd refuse are mixed with soybean protein or coated therewith; and the produced KONJAK gives smooth and most agreeable feeling to the palate, has deliciousness, good digestibility and nutrient value, and high moisture absorption, and is inexpensive.
Patent JP-H04252151-A (JP)
Title: Soft custard pudding having good tooth touch
Inventor: MATSUMURA NOBUYASU
IPC: A23L9/10
Filed: 1991-01-24
Abstract: PURPOSE:To produce a custard pudding slightly containing a pore and having a smooth tooth touch and a cariostatic property by adding theanderose to the pudding. CONSTITUTION:When a custard pudding is produced, a part or all parts of all saccharides used are replaced with theanderose.
Patent JP-H09199543-A (JP)
Title: Mounting device of chip
Inventor: ADACHI SATOSHI
IPC: H01L21/60
Filed: 1996-01-19
Abstract: PROBLEM TO BE SOLVED: To provide a mounting device capable of mounting chips of different kinds on a substrate by using an anisotropic conductive tape (ACF) at high speed. SOLUTION: A cutter 18 is provided above a running path of a separate tape 4 unreeled from a supply reel 2 so as to cut an ACF 5 on the separate tape 4 to a prescribed cut length. This ACF 5 is pasted on the undersurface each of chips 26 held by a head 22 and the head 22 is index-rotated by a rotary table so as to move the head 22 above a substrate and to bond the chips 26 through the ACF 5. A distance 2L between a pickup position P of the ACF 5 by the head 22 and a cut position (a) of the ACF 5 by the cutter 18 made an integral multiple of the cut length L so as to perform a cut of the ACF 5 by the cutter 18 and a pickup of the ACF 5 by the head 22 in parallel.
Patent JP-H02187936-A (JP)
Title: Optical pickup device
Inventor: KURATA YUKIO
IPC: G11B7/1353
Filed: 1989-01-13
Abstract: PURPOSE:To enhance the quality of a signal and to suppress a jitter by providing a diffraction grating generating two pieces of sub-beams from a laser beam of a light emitting element on at least one area of a recording carrier, and providing a diffraction grating condensing a return light onto a light receiving element on the remaining area. CONSTITUTION:A zero-order diffracted light of a laser beam A emitted from a light emitting element 1 passes through three areas 2a, 2b and 2c of a diffracting element 2, becomes a main beam A3 and condensed to the recording surface of a disk 5. Subsequently, return light beams B21 - B23 of beams A1 - A3 from the recording surface of the disk 5 are diffracted by both side areas 2a, 2b of the element 2, and its + or - primary diffracted light is condensed onto a photodetector 6. Next, output signals Sa, Sb, Sc and Sd are outputted from light receiving elements 6a, 6b, 6c and 6d, these outputs are added 7 - 9 and a reproducing information signal RF is subtracted 10, and a focus error signal FE is outputted. Also, light receiving elements 6e, 6f are irradiated by return light beams B22A, B22B and B21a, B21b of the sub-beams A1, A2, signals Se, Sf are outputted, and based on a three-spot method, a tracking error signal is obtained from a subtracting circuit 11.
Patent JP-H04241006-A (JP)
Title: Unmanned travel vehicle controller
Inventor: NISHIDAI HAJIME
IPC: B61B13/00
Filed: 1991-01-24
Abstract: PURPOSE:To enable an efficient and safe travel by determining a travel path according to the detection contents of a state detecting means which detects the environmental state on a path and the internal state of a vehicle. CONSTITUTION:A load-carrying platform 2 is provided in the unmanned travel vehicle 1 and loading to and unloading from the platform 2 at each station 11 are automated. An ultrasonic sensor 3 which detects an obstacle on the travel path is provided in front of the unmanned travel vehicle 1. Further, a collision sensor 4 which stops the vehicle forcibly if an inevitable collision is caused is provided. Further, an antenna 5 which receives a signal sent from each station 11 is provided, and each station 11 sends a signal radio wave which indicates its presence position at all times and sends data on the conveyance destination of a load when the unmanned travel vehicle 1 is loaded.
Patent JP-2000209267-A (JP)
Title: Network device control system and device
Inventor: NOMURA YUJI
IPC: H04L47/80
Filed: 1999-01-14
Abstract: PROBLEM TO BE SOLVED: To attain communication between a user's terminal and a communication destination server with priority which is preset by a user or an application. SOLUTION: This control system is provided with an event notice device A, that detects that a user logs in a communication terminal or the user starts a prescribed application, by using the communication terminal and informs a network device controller B about a user identifier or an application identifier and occurrence of an event, and with the network device controller B, that applies priority control of a network equipment (router) N on the basis of the information informed from the event notice device A. The network device controller B acquires the priority of the user or the priority of the application informed from the event notice device A, obtains a router N on a communication path between the communication terminal and a server, generates information required to conduct priority control in accordance with the priority and sets priority control information to the router.
Patent JP-H06216727-A (JP)
Title: Delay time variable logic circuit
Inventor: TOSAKA NORIO
IPC: H03K5/13
Filed: 1993-01-20
Abstract: PURPOSE:To obtain the delay time variable logic circuit which can vary a delay time, especially the same which can be applied to an integrated circuit device using a DCFL circuit constituted of a GaAsMOSFET especially. CONSTITUTION:This logic circuit is constituted of a depression type FET 1 operated as a load transistor, an enhancement type FET 2 operated as a switching transistor, a first resistance 3 connected between a drain and a gate of the load FET 1, and a second resistance 4 connected between a gate and a source of the load FET 1. At least one of a first and a second resistances 3, 4 is a variable resistance. In such a way, the logic circuit itself can be allowed to have a function for varying a delay time, the circuit scale becomes small, and it becomes advantageous in respect of an integration degree and power consumption.
Patent JP-S55100833-A (JP)
Title: Die interchanger
Inventor: ARAI TOSHIHIKO
IPC: B21D37/04
Filed: 1979-01-26
Abstract: PURPOSE: The titled interchanger possible to be simply set in the existing press, being constituted of the carrier and roller conveyer for carrying the die into or out of the press bolster, and the coupled two dies-truck reciprocating perpendicularly to above direction of carrying the dies.  
     CONSTITUTION: The first truck 6 and the second truck 6' are coupled with the coupler 16, and are reciprocated on the rail 2 by driving the wheel 18 with the motor 17. After locating the second truck 6' in front of the press, while the carrier 5 is being reciprocated along the guide rail 4 by running the chain 9, the used die 14 is pulled out of the bolster 13 through the locking member 11, and is placed on the second truck 6' through the roller conveyer 3. Next, the first truck 6, being previously loaded with the new die, is located in front of the press, and the new die is carried into the bolster 13 in the reverse order to above-mentioned order. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-H03212491-A (JP)
Title: Method for catalytic thermal decomposition of waste plastics
Inventor: KURATA HIROSHI
IPC: C10B53/07
Filed: 1990-01-16
Abstract: PURPOSE:To effectively convert waste plastics into oil and recover the resultant oil as light oil by treating the waste plastics in two stages for melting low- melting plastics and vaporizing plastics having the high melting point or without any melting point. CONSTITUTION:Waste plastics containing organic and inorganic refuses mixed therein are broken into the form of chips and then low-melting waste plastics are melted, taken out, neutralized, washed and subsequently vaporized in a heating furnace. On the other hand, unmolten substances are fed to a thermal decomposition treating furnace to vaporize waste plastics, organic refuses, etc., having the high melting point or without melting. Vaporized oils discharged from the aforementioned thermal decomposition treating furnace and the above- mentioned heating furnace are passed through a catalytic reaction chamber to provide a stable waste plastic light oil, which is partially detoured to a waste plastic heating vessel. All the waste plastic light oils are then passed through a condenser, liquefied, neutralized, washed, then forcibly filtered and recovered as a waste plastic light oil.
Patent JP-S60176964-A (JP)
Inventor: MAEBOTOKE TADASHI
IPC: C04B35/03
Filed: 1984-01-20
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S62165427-A (JP)
Title: Output buffer circuit for semiconductor integrated circuit
Inventor: KUBOTA JUICHI
IPC: H03K19/00
Filed: 1986-01-17
Abstract: PURPOSE:To suppress through current at the inversion of an output by applying a potential difference corresponding to the threshold voltage of a MOS transistor (TR) between the gate of a p-channel TR to be an output stage and the gate of an n-channel TR. CONSTITUTION:A potential difference generating circuit 20 constituted by connecting a PMOSTR P3 and an NMOSTR N3 which are respectively diode- connected in parallel between the drain 21 of a prestage p-channel TR(PTR) P2 and the drain of an n-channel TR(NTR) N2. The drains 21, 22 are connected to respective gates of a PTR P1 and an NTR N1 to be corresponding output stages. Voltages VA, VB having a potential difference corresponding to the threshold of a MOSTR are applied from the circuit 20 to the gates of TRs P1 and N1 to suppress the through current flowing into the TRs P1 and N1. Thereby, bad influence to be exerted upon the power supply voltage margin of another logic circuit 15 using a power supply in common with the output buffer circuit can be reduced.
Patent JP-H05197361-A (JP)
Title: Pattern output device and method therefor
Inventor: IKEDA NOBUYUKI
IPC: G06F17/21
Filed: 1992-01-20
Abstract: PURPOSE:To obtain a document preparing device capable of providing a document edition screen with the same fidelity as the one when a document is printed, and a document edition screen following the fast character input and edition operation by an expert. CONSTITUTION:WYSIWYG edition can be performed while observing the same image as the one when the document is printed in a detail mode, and all the vector fonts are displayed on an edition screen by replacing to dot fonts in a fast mode by switching the working conditions of a vector font file 10 and a dot font file 9 corresponding to two display modes of fast mode-detail mode in the display control part 8 of the document preparing device.
Patent JP-S59133779-A (JP)
Title: Picture receiving system
Inventor: NAKAZAWA ISAO
IPC: H04N5/16
Filed: 1983-01-20
Abstract: PURPOSE:To reduce the low frequency noises through a simple constitution by detecting the level fluctuation of a low frequency from the horizontal synchronizing signal of a received picture signal and then superposing the detection output on the original signal at the rear stage side of a picture receiving part. CONSTITUTION:The picture signal at the transmission side arrives at the reception side with the fluctuation generated from a horizontal synchronizing signal by the low frequency noises to the reference level of a picture signal. The horizontal synchronizing signal is extracted from said picture signal by a reproducing circuit HSR for horizontal synchronizing signal. Then only the horizontal synchronizing signal component is extracted from the arrived reception wave by a horizontal synchronizing level detecting circuit HSL. This horizontal synchronizing signal is transmitted through an LPF to obtain a signal having a smooth waveform. This signal is converted into an adverse phase and then synthesized with the received signal through a synthesizing circuit LMB. Thus the fluctuation at a part corresponding to a low frequency noise is corrected to obtain a signal free from noises at an output terminal OUT. It is possible to combine a signal phase inverting circuit and the circuit CMB into a differential amplifier.
Patent JP-H09192336-A (JP)
Title: Cashing device at game parlor
Inventor: TAKEMOTO TAKATOSHI
IPC: G07D1/00
Filed: 1996-01-19
Abstract: PROBLEM TO BE SOLVED: To enable a cashing operation to be easily performed by selectively displaying a cashing choice or a premium supply when inserting a game card into a drive part, then calculating a cashable amount in accordance with the total number of game media for the selection of cash payment and paying the cashable amount with the display of a denomination of money and the number of coins per denomination to be paid. SOLUTION: When a game medium is deposited into a counting part, the counting part of this cashing device counts the number of such game media, and at the same time, reads the number of the game media recorded on a game card inserted into a drive part 12. In addition, a selection message for either cash choice or premium supply is displayed on a selective display means 11 and a cashable amount corresponding to the total number of the game media is displayed on a means 19 for displaying the cashable amount. If an assigned cashable amount is entered from an input means 13, a calculation part 14 calculates the cashable amount in accordance with the total number of the game media and displays the number of the game media and the assigned cashable amount.  Further, a payable money display part 22 displays the denomination and the number of coins by denomination to be paid, and the assigned cashable amount is paid by a cash payment mechanism 21.
Patent JP-H08203288-A (JP)
Title: On-board writing control device
Inventor: IIZUKA YUICHI
IPC: G06F15/78
Filed: 1995-01-23
Abstract: PURPOSE: To attain a cost reduction and the miniaturization of a user board and also improvement of operability at the time of on-board writing. CONSTITUTION: An on-board writing jig 1-8 constituting an interface part of an on-board writing control device is equipped with a level conversion circuit 1-20, and a system power source l-4 on a user board supplies a system power supply voltage Vdd1 to the level conversion circuit 1-20 through a power supply output terminal 1-6 and a power supply input terminal 1-18 on the user board. In the case of rewriting flash EEPROM, the voltage level of an interface signal controlling the flash EEPROM through an interface terminal 1-5 of the user board is converted in terms of a level into a voltage level in conformity with the system power source 1-4 on the user board.
Patent JP-S58125729-A (JP)
Title: Production of prefoamed particles
Inventor: KUWABARA HIDEKI
IPC: C08J9/16
Filed: 1982-01-21
Abstract: PURPOSE:A composition consisting of polymer particles containing a volatile foaming agent and a dispersant is discharged out of a tightly sealed vessel in a specific range of the discharge rate, thus producing prefoamed particles with uniform extent of foaming and uniform bubble number without breakage and deformation. CONSTITUTION:After polymer particles, preferably of an olefinic polymer are made to contain a volatile foaming agent such as an aliphatic or alicyclic hydrocarbon or halogenated hydrocarbon in an amount of 0.04-0.33mol/mol of the polymer particles, the resultant particles are dispersed in a dispersant which does not dissolve the polymer particles such as water, ethylene glycol, methanol or the like, in a tightly sealed vessel. Then, under an atmosphere lower than the inside of the vessel in pressure, the composition is discharged at a rate of 0.5-3kg/min/mm.<2> defined by the equation to give the objective prefoamed particles. The above discharge rate is controllable, when the pressure of an inorganic gas in the vessel 1, land diameter phi of the discharge orifice 2 and land length 1 are varied.
Patent JP-H02188989-A (JP)
Title: Electrically plating method for printed circuit board
Inventor: SUZUKI KUNIJI
IPC: H05K3/42
Filed: 1989-01-17
Abstract: PURPOSE:To make a primary current distribution uniform and to suppress the irregularity in plating thickness by setting a mask plate having holes of a diameter and number determined by the relation to optimum electrically plating amount obtained in advance at holes to become through hole and at positions to become circuit conductors later between metal to become an anode and a material to be placed. CONSTITUTION:As a mask plate, an insulating material opened with holes of a diameter and number determined by the relation to optimum electrically plating amount obtained in advance at positions to become circuit conductors later is used at a contact plate superposed on the surface of a copper-plated laminated board and used to prevent the copper-plated laminated board from burring due to the opening of the holes of a copper foil superposed on the copper-plated laminated board. The number of holes to be opened at the mask plate is desirably determined according to the number of adjacent conductors within approx. 0.75mm around the conductors to become a circuits later in relation to the optimum electrically plating amount obtained in advance. Thus, a primary current distribution in the electric plating is made uniform to reduce an irregularity in thickness.