Patent GB-840761-A (GB)
Title: Improvements in data processing apparatus
IPC: G06F15/78
Filed: 1956-08-01
Abstract: 840,761. Digital electric calculating apparatus. INTERNATIONAL BUSINESS MACHINES CORPORATION. Aug. 1, 1956 [Aug. 1, 1955; Jan. 24, 1956], No. 23723/56. Class 106 (1). A data - processing apparatus comprises an instruction source store for containing a plurality of sets of instructions, a data processing device operable under control of received instructions to perform data processing operations, circuit means for reading a required set of instructions to peiform data-processing operations, circuit means for reading a required set of instructions in said instruction source store and feeding these instructions to said data processing device, control means for conditioning said circuit means to select the required set of instructions in the instruction source store in accordance with the presetting of the control means and the combined effect of an instruction read from said store to said device and a resulting state of this device produced in response to this instruction. The data processing system described comprises an arrangement of known apparatus particularly adapted for operations requiring a very large store such as maintaining a continuous stock record, printing invoices and re-ordering items when the number in stock drops below a certain figure (a complete programme for this operation is actually described) and consists of a magnetic disc storage unit, Fig. 2, having a capacity of 5,000,000 eight-bit characters, as described in Specification 819,789, which is referred to, an input record card reader and an output punch and/or printer, a core matrix buffer store, and a " process drum " for storing instructions and for use in performing addition and multiplication. Instructions can also be registered on a plug board. Input.-Input to the system is from punched record cards via a buffer drum, two tracks on which are used alternately, one being available for reading from at a relatively high speed while the other is being read into at a relatively low speed, whichever of the two buffer tracks that is not being read into has the address " S." Arithmetic unit.-The arithmetic unit, Fig. 29, contains a single serial adder and can effect addition, subtraction and multiplication. The adder (Fig. 20j, not shown) is a conventional full adder using diode gates and has an internal delay of one digit (five bit periods). One track on the drum constitutes, with the adder, an accumulator, the circulating loop for the accumulator being from a read head R on the accumulator track, which is positioned one digit early, via a one-digit delay 1796 (which restores the data from the drum to " on time ") and a switch 1798 to one input of the adder, the output of the adder passing via a switch 1800 to a writing head 1790 positioned one digit late so that data from the adder is effectively recorded in the accumulator track " on time." Data applied to the other input of the adder can be complemented if necessary to effect subtractive entiy into the accumulator. Read-out from the accumulator track is from the one-digit early head 1789, via a switch 1801 and the adder to an output lead 1802. Multiplication is effected by repeated additions of the multiplicand, suitably shifted, under control of successive digits of the multiplier. Initially the multiplicand is recorded ten times on a multiplicand track 1803 (that is once in each sector) so that in ore drum revolution the multiplicand is read out ten times and then for each multiplier digit in turn the multiplicand is entered a corresponding number of times into a partial product track 1808 and the sum accumulated therein is transferred to the accumulator. The final product thus appears in the accumulator. Method of operation and programming.-Up to 100 ten-digit instructions are stored in ten tracks 0-9, Fig. 2, of the " process drum." These instructions are normally used successively under the control of a relay instruction counter labelled " program counter." " Jump " instructions are possible, however, and after such an instruction the machine refers to a manually-plugged plug-board to determine which instruction to use next. Each instruction is of the following form The characters T 1 A 1 B 1  represent the address from where data is coming and the characters T 2 A 2 B 2  the address to where data is going. The available addresses for T 1  and T 2  are as follows :- The two digits AB which complete the two address portions of each instruction, indicate, where applicable, the character position from where a transfer is to begin, e.g. to transfer from or to track A of general storage the transfer beginning at character position 59 (each track stores 100 characters) an address of " A59 " is used. The two digits MN indicate the number of characters to be transferred. For example the instruction transfers 11 characters from track A, starting at character position 59 to track B starting at character position 70. The digits 00 for MN causes 100 characters (i.e. a complete track) to be transferred. Every transfer takes place via the core buffer store. The P and Q positions of each instruction indicate, if present, a further operation to be performed after the transfer. A complete list of the available instructions is not given in the Specification but the following P instructions are :- Instructions 2 and 3 refer to the disc store. It is only possible to read blocks of 100 characters from the disc store and before this can be done the address of the block required (referred to as a sector) must be entered into the disc store address buffer and the instruction " seek " given. This causes the read/write head of the disc store to be appropriately positioned. A transfer from or to the disc store will then be from or to the address stored in its address buffer. For example, if it is desired to transfer the block of 100 characters at address 12340 into track A, and if the address 12340 is, at present, stored in track B in positions 21 to 25 thereof, then the following two instructions would effect the desired transfer:- The instruction (a) first transfers the address of the desired block to the disc memory address buffer (the digits " 99 " after " Y " are filler digits of no significance) and then causes the read/write head of the disc store to be appropriately positioned, and instruction (b) causes the required transfer (the digits " 99 " after " R " again being filler digits). As the head of the disc store takes a considerable amount of time to assume its desired position it is normal to separate these two instructions by other instructions not involving the disc storage so as not to waste any time. The instruction 3 for P causes the units digit of the address stored in the disc store address buffer to be increased by unity but carry from the units position to the tens position is inhibited. (Tens carry is inhibited because the units digit of a disc store address specifies one of ten blocks of 100 characters each, which are available to the read/write head at each of its physical positions which are specified by the other four digits). Thus once the disc store head is positioned it is possible to read out quickly, in succession, ten blocks each of 100 characters by using a sequence of instructions such as:- The instruction " A " for P causes the machine to stop its sequential performance of the instructions store on the drum in tracks 0-9 and causes a pulse to be emitted by a hub " A." This pulse, by appropriate plugging, can be used to cause the machine to perform a further sequence of operations by again taking instructions from the drum sequentially but starting at an instruction position determined, for example, by whether or not the accumulator is positive, or by one of many other events. Thus the instruction " A " for P is in effect a conditional jump instruction.