Patent GB-788080-A (GB)
Title: Electrical apparatus for transferring data between a record card and a recirculatingregister
IPC: G06F3/08
Filed: 1955-07-06
Abstract: 788,080. Digital electric calculating-apparatus. NATIONAL CASH REGISTER CO. July 6, 1955 [Aug. 17, 1954], No. 19483/55. Class 106 (1). In electrical apparatus for transferring data between a multi-word-field record card and a multi-word-period recirculating register, a oneword-period recirculating register has inserted in all digit positions signals corresponding to data (to be recorded) at predetermined locations on the card (e.g. in a digit row), the data in the oneword-period register being entered in a currently synchronized word period of the multi-word register or recorded on the card, under control of data read from the card or multi-word-period register respectively. The multi-word-period register may be a buffer register between the card and the main magnetic drum store of a digital computer. General. The computer described is generally similar to that of Specification 770,952, only the arrangements for transferring data between the magnetic storage drum 101, Fig. 1, and punched record cards being described in detail. Each of the main memory channels 113 of the drum can store 100 words in arcs defined by arc address channel 114. Each word period is divided into 11 groups D0-D10 of 4 binary digit periods P0-P3 by counters 125, 124 controlled by clock pulses from channel 113. The drum provides also G and E one-wordlength recirculating registers 116, 117 and a V (buffer) re-circulating register of 10 word lengths, the recirculating loops including bistable trigger circuits or " flip-flops " G1-G5, E1-E5 and V1 and a logical diode gating network 137, Fig. 5, in arithmetic unit 103. The operating sequence is controlled by a programme counter 105 which steps to the next count, or skips or stays in the same condition, at the end of each word period, according to whether a flip-flop Nd is in its " true " or " false " state. Special series or routines of programme counter steps are provided for reading data from a punched card into the V register (" read routine ") and for punching a card with the contents of the V register (" punch routine "). Word code in the computer. Each period D0-D10 within a word contains a decimal digit in the excess three binary code. Periods D10, D0 identify the word as a number or command, and contain the sign for a number (4, 0 for "+" and 3, 0 for " - ") with 9 decimal digits in D1- D9, and an instruction 11, 12, Fig. 2, for a command, with addresses m1, m2, m3 in D9- D1, as shown, each address comprising a twodigit " a (arc) portion and a one-digit " c " (channel) portion. The instructions are divided into alphabetical groups A-I, J-R and S-Z identified by " 1," " 3 " and " 0 " respectively in D10, with D0 containing one of the digits 1-9. Card code. A record card 233, Figs. 1 and 16, comprises 8 groups of 10 columns, each group containing a word. The identifying matter (corresponding to periods D0, D10 in the computer) for each word is punched in a single column 1 in which a hole in position R, X or O corresponds to " 1," " 3," " 0 " respectively in D10, and no hole corresponds to " 4." Thus words two to six, Fig. 16, are respectively, a positive number, a negative number and commands in instruction groups A-I, J-R and S-Z respectively. Columns 2-10 in a word correspond to periods D9-D1, respectively. Read routine. The main memory address to receive the first word on the card 233, Fig. 1, is previously placed in periods D7-D9 in the G register. During the first programme counter step, PC281, of the routine, the card feed motor 209 of card handling unit 205 is started, the V register is filled with 4's (see Fig. 17) and flip-flops A1-A8, Fig. 5, are prepared to act as a counting chain. When row R is positioned to be sensed by brushes B1-1 to B8-10, a projection on gear 223 closes switch 219 whereby a pulse is sent over line 220 to trigger Nd true whereby the programme counter is stepped on. The E. register is filled with 1's and, after a delay determined by counter A1-A8, the V register is synchronized by comparing the units digits of the address at G5 with the arc addresses on 114 supplied to flip-flop Wc; upon comparison agreement, entry into V commences. A " 1 " from E is entered into D10 of V for each word period for which there is hole in row R, column 1 in the corresponding word on the card (word four, Figs. 16 and 17), and the word periods are counted by A1-A8. Rows X and 0 are similarly read, E being filled with 3's and 0's respectively (see words five and six, Figs. 16 and 17). During the " 0 read, 0's are entered into D0-D9 of all the words in V. During the sensing of each of the rows 1 to 9, for each hole sensed in a column 1, 2-10, the contents of E are sent to the corresponding position D0, D9-D1 in V, and " 1 is added in each decimal digit position in E in preparation for the sensing of the next row. When E is filled with 9's, the programme counter steps to a further routine (not described in detail) which transfers the contents of the V register to the main memory. Punch routine. This is generally similar to the read routine, words from eight successive addresses in the main memory having been transferred to the V register before the first step PC433 of the routine which starts the card handling unit 205. The card rows are punched in the same order as that in which they are read, by supplying pulses at appropriate times via lines T1-1 to T8-10 to corresponding thyratrons and punch relays, one for each card column.