Patent GB-1237053-A (GB)
Title: Circuit for adding codes resulting from non-linear coding
IPC: H04M3/56
Filed: 1969-04-02
Abstract: 1,237,053. Automatic exchange systems. INTERNATIONAL STANDARD ELECTRIC CORP. 2 April, 1969 [11 April, 1968], No. 17327/69. Heading H4K. To conference n subscribers in a PCM system in which the codes are non-linear, each subscriber is sent the sum of the codes sampling the other n-1 subscribers, the sum of any set of n-1 codes being formed by decoding the subscriber's codes one by one in a cycle of operations whereby the decoded subscriber's code at any step of the cycle is added to the decoded sum of such codes accumulated code by code in preceding steps of the cycle. The circuit of Fig. 1 controlled by the pulses of Figs. 3a to 3d conferences six subscribers the codes of which from any one multiplex cycle are set up on six registers and read out cyclically five times in succession by the S1 pulses r1, r2 &c., Fig. 3a. Representing the codes of the subscribers as a, b, c, d, e, f, a, b, c, d, &c. as read in succession, the first code a is written in store Rg1, Fig. 1, decoded to analogue form by Dl, added to the zero output of decoder D2, and the result passed to the feedback decoder comprising register Rg3, decoder D3, comparator C, and a logic circuit L in the feedback loop. In the result the code a is registered in Rg3. Just before the next S1 pulse, r2, an S2 pulse, Fig. 3b, gates the code a from Rg1 to Rg2. At r2 the code b is written in Rg1. In this step of the cycle the b code in Rgl is decoded and added to the a code in Rg2 and the sum is recoded from analogue form and registered in Rg3. At pulse r3 the S3 pulse train, which is the S1 train missing every fifth pulse, gates the a + b sum from Rg3 to Rg2 while the c code is written in Rgl. At this step the a + b + c sum is formed and placed in Rg2 with the d code in Rg1 and the sum a + b + c + d is formed. At the next step with pulse r6 the sum a + b + c + d+e is formed and is gated by pulse train S4, Fig. 3d, into the system for connection to the subscriber F whose code is not included in the sum. With pulse r6, however, the code f is placed in Rg1 and the total of all six subscriber codes appears in Rg3. At pulse r7, however, the S3 pulse is missing and the S2 pulse is present so the total of all six codes is discarded and the code f is transferred to Rg2 while the code a appears in Rg1 The process of summing, therefore, starts once more but from a position slipped back one in the cyclic order of codes. Thus the next sum to be formed and transmitted by the S4 pulse is f + a + b + c + d. The following sum will be e+f+a+b+c, and so on until all six sets of five sums have been dispatched whereupon the S pulse train generator H is disconnected until a further set of subscriber codes is accumulated in the exchange. The non- linearity of the codes may be symmetrical and consequent on a companding law the curve of which is constituted by 7 linear intervals, Fig. 5, (not shown). Decoders of the type described in Specification 1,154,828 are employed, Fig. 4 (not shown). The most significant bit of each non-linear code indicating sign and, along with the second and third bits, indicating the amplification factor by gating a point of entry to one or other of two ladder networks one of which produces positive and the other negative output. Within any linear range the datum level and amplification factor of which is established by the first three bits, the code point is established by the remaining four bits which gate a corresponding set of constant current generators to the selected point of entry of the selected ladder network. As applied to the conferencing arrangement of Fig. 1 the ladder networks may be provided in common for each of the decoders D1, D2, D3.