baber/WOPTO huggingface dataset:
Patent JP-H0676673-A (JP)
Title: Manufacture of insulating resin molding and device therefor
Inventor: SHIMIZU TOSHIO
IPC: H01B17/26
Filed: 1992-08-26
Abstract: PURPOSE:To manufacture an insulating resin molding whose field/stress concentrated portion has its electrical and mechanical characteristics improved by pouring an insulating resin casting material of different filler mixing ratios into plural divisions of a metal mold, and curing the material after removal of the divisions. CONSTITUTION:A metal mold 5 is partitioned into plural divisions by partition plates 4. An insulating resin casting material 2, retained in a heat-resisting container 3 and comprising a curing agent and a filler 1 mixed in a main agent, is poured into each of the divisions. In that case, the insulating resin casting material 2 differs in the mixing ratio of filler 1, and when necessary this mixing ratio is controlled continuously or plural different kinds of filler are employed. After the casting material 2 is poured, the divisions are eliminated by removal of the partition plates 4 and the resin is cured and molded. The boundaries among the divisions are therefore eliminated and the divisions are integrated together, and also, desired amounts of filler are put in each portion, whereby an insulating resin molding which can exhibit characteristics corresponding to service conditions which vary with its portions is obtained.
Patent JP-H0756715-A (JP)
Title: Date management system
Inventor: TAKADA KAZUHIRO
IPC: G06F9/06
Filed: 1993-08-20
Abstract: PURPOSE:To simplify a date acquiring program in each batch processing and to prevent the generation of contradiction between dates on which the contents of respective batch processing in the same job are acquired by preparing a date management module for determining an instruction sentence for setting up a date by a specified parameter and executing the instruction sentence. CONSTITUTION:This date management system is provided with the date management module 6 for specifying an optional parameter, determining an instruction sentence for setting up a date by the specified parameter and executing the instruction sentence. When the module 6 is executed, a date management record 7 is prepared in a date management file and the specified parameter part in the record 7 is written in a date acquiring area 41 as shown by a solid line 8. Then, a CALL date management module 52 is executed by batch processing 2 shown by a code 5, and since the record 7 has been already prepared when the module 6 is accessed, the module 6 reads out only the date management file and writes the file in the area 51.
Patent JP-S63153675-A (JP)
Inventor: DONARUDO EFU FUUPAA
IPC: G06F17/30
Filed: 1987-09-11
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0395092-A (JP)
Title: Tool for maintenance of elevator door rail
Inventor: KATSUKI HIDENORI
IPC: B66B13/00
Filed: 1989-09-01
Abstract: PURPOSE:To remove dust and dirt and enable oil supply without soiling the hand certainly till the end of a door rail while the operating easiness and the safety are secured, by furnishing a maintenance apparatus such as a cleaner and oil coating device at the bent part, which is formed at the top of a shank whose bottom is equipped with a grip. CONSTITUTION:When a door rail tool is used, a cover 4 remains at a hanger case 2, and an operator comes into a cage which is stopped at a certain place with its door opened and holds the gip 11a of a shank 11 by hand. This shank 11 is inserted from below in a gap 21 between the get-on place door 1 and the cover 4, and attachments to the oversurface of a door rail 3 within a case 2 are wiped off with the cleaning element 14 of a cleaner 13. The solids which can not be wiped by this cleaning element 14 are removed by taking off a tube 19 from the bent 11c of the shans and tearing with the cutter part 11d provided on the shank 11. After cleaning the oversurface of the rail 3 till the end, the oversurface of the rail 3 is rubbed with the coating element 17 of an oil coating device 15 held at the bent part 11c of the shank, and the lubricant, etc., stored in a retaining cylinder 16 of the oil coating device 15 is applied to the oversurface of the rail 3. Thus oil supplying is performed.
Patent JP-S6286442-A (JP)
Title: Data processor
Inventor: SUEOKA MAMORU
IPC: G06F11/28
Filed: 1985-10-14
Abstract: PURPOSE:To minimize a hardware by recording the low-order 16-bit of an instruction head address just after branching to a trace memory and storing the high/low order 16-bit of the address of the instruction head into the trace memory in case of a 32-bit branch instruction. CONSTITUTION:A PC tracer consists of a jump flag 71, a 32-bit jump flag 72, a trace address counter 73, a memory 74, a 32-bit register 174 storing the content of a program counter, a selector 175 selecting whether low-order 16-bit or high- order 16-bit and a bit 176 reflecting a 32-bit jump flag 72. The level of the 32-bit jump flag reflection bit 176 is 0 at 16-bit jump and 1 at 32-bit jump. Since the storage capacity of a trace memory is decreased without losing effective trace information, the program counter trace device capable of wide range trace is formed without increasing the hardware.
Patent JP-H0784162-A (JP)
Title: Optical element mounting structure and its mounting method
Inventor: OGAWA MARI
IPC: G02B6/30
Filed: 1993-09-13
Abstract: PURPOSE:To realize a new optical element mounting structure and its mounting method by which the laminated optical elements having plural input/output ends and an optical fiber matrix are automatically aligned to be mounted with high density, a mounting area is made small, and the problem of the congestion of the optical fiber is solved. CONSTITUTION:The optical elements 6 having plural input/output ends are laminated in a longitudinal direction on a sub mount 5 by setting an optical unit 18 bonded with its face down as the unit of one layer, and the optical fiber matrices 1 arrayed in a matrix state are connected to the laminated optical elements by using a fiber guide 2 being a positioning substrate. A hole 12 for fixing a fiber and a hole 11 for a guide pin are bored on the fiber guide 2. The optical fiber array 1 and a guide pin 3 are inserted in the holes 12 and 11, and the guide pin 3 is aligned with a guide groove 10 formed on an optical switch, so that the optical fiber matrix 1 and the optical element 6 are automatically aligned in an X-axis and Y-axis directions. They are aligned in a Z-axis direction by using a proper spacer 4 between the fiber guide 2 and the optical element 6.
Patent JP-S59111822-A (JP)
Title: Method and device for forming double wall type thermoplastictube
Inventor: MANFURETSUDO EE EE RUPUKE
IPC: B29C48/32
Filed: 1983-12-02
Abstract: Double-walled thermoplastic tubes, with corrugated outer walls (18) and smooth inner walls (24) are formed with integral bell sections spaced along the tube. The outer, corrugated wall is formed with a bell section. One of the walls (18) is pierced between the ends of the bell section (34) to allow the escape of air, and the inner wall (24) is pressed outwards into engagement with the bell section (34) of the outer walls (18).
Patent JP-H0841588-A (JP)
Title: Steel plate excellent in surface characteristic
Inventor: TSUYAMA AOSHI
IPC: C22C38/14
Filed: 1994-08-01
Abstract: PURPOSE:To reduce scale defects by incorporating specific amounts of C, Mn, P, S, Al, N, Ti, Si, B, O, and Fe. CONSTITUTION:A composition, containing, by weight, :0.003% C, 0.05-2.2%Mn, <=0.1% P, <=0.015% S, 0.01-0.06% SOL..Al, <=0.003% N, and 0.005-0.12% Ti, also containing 20-80ppm Si and 2-9ppm B in the range satisfying O<=-0.1XSi+25, and having the balance essentially Fe, is provided. Scale defects are caused by fayalite (SiO2-FeO) formed into wedge shape by the preferential oxidation of grain boundaries in the slab heating stage at the time of hot rolling. The amounts of Si and O in the steel are reduced and also a small amount of B is added to prevent grain boundary oxidation. Scale peeling from the base material can be accelerated. By this method, the steel plate excellent in surface characteristic can be obtained while obviating the necessity of setting up new equipment or changing the manufacturing process.
Patent JP-S61105074-A (JP)
Inventor: NAGANO YUKINOBU
IPC: F25D17/08
Filed: 1984-10-29
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S6470641-A (JP)
Title: Air-conditioning machine
Inventor: SUGIYAMA AKIYOSHI
IPC: F24F11/02
Filed: 1987-09-10
Abstract: PURPOSE:To improve operability and reliability, by a method wherein an identifying means for machine kind data, transferred from indoor units and an outdoor unit, and a means for effecting operation control in accordance with the content of setting and the result of identification of an operation control unit, are provided in an air-conditioning machine. CONSTITUTION:The control circuit 10 of an indoor unit 1 reads machine kind data from the control circuit 50 of an outdoor unit 5 upon throwing a power source, identifies the contents of the data, and transfers the result to the control circuit 30 of a remote control unit 3 and displays the corresponding plural kinds of operation modes on a display unit 31 as operation mode display 31a, 31b. Then, the control circuit 30 inputs the operations of the group 32 of operating condition setting keys in accordance with the display modes 31a, 31b, sends them to the control circuit 10 as operating condition setting data whereby the operations of the indoor unit 1 and the outdoor unit 5 are controlled in accordance with the operating condition setting data. According to this method, the operation control unit may be used commonly for respective kind of machines of the outdoor unit, whereby cost may be reduced and operability as well as reliability may be improved.
Patent JP-S60118858-A (JP)
Title: Electrophotographic method
Inventor: NIMURA EIJI
IPC: G03G15/05
Filed: 1983-11-30
Abstract: PURPOSE:To obtain an image excellent in contrast by implanting bias charge simultaneously with exposure to a toner which is made conductive by exposure thereby providing a substantial difference in the quantity of electrification between the toner in the region where light is irradiated and the region where the light is not irradiated. CONSTITUTION:A photoconductive toner 1 is exposed 3 by a light image and at the same time the bias voltage reverse from the static charge in polarity of the toner is impressed to a conductive base body 2 to implant the charge reverse in polarity to the toner irradiated with the light. The static charge of the toner in the region where the light is irradiated is therefore made zero or the toner has the charge reverse from the static charge in polarity. A large difference is thus generated in the quantity of static charge and/or static charge between the toner in the region where the light is irradiated and the toner in the region where the light is not irradiated and the contrast of the resulted image is high with less photographic fog.
Patent JP-S60117776-A (JP)
Title: Semiconductor device
Inventor: NAKANO MOTOO
IPC: H01L21/331
Filed: 1983-11-30
Abstract: PURPOSE:To obtain a lateral type bipolar transistor, by whichhigh performance of the entire IC is to be implemented, by including one conductive type impurity concentration, which is lower than one conductive type impurity concentration in a semiconductor substrate, in a base region, thereby enhancing transport efficiency furthermore. CONSTITUTION:In a P type silicon single crystal film 3, an N type impurity ions are implanted, and an emitter region 4 and a collector region 5 are formed. The emitter region 4 is provided on the upper surface of an SiO2 film 2. The collector region is provided on an exposed surface 10 of a silicon substrate 1. Therefore, the P type silicon single crystal film 3 in the intact crystallized state covers the exposed surface and the SiO2 film. This part becomes a P type base region 6. The impurity concentration of the P type silicon substrate 1 is made higher than the impurity concentration of the P type base region 6. Thus, of the electrons, which have entered the base region 6 from the emitter region 4, the electrons, which have gone toward the silicon substrate 1, are pushed back by a potential barrier. The most of the injected electrons reach the collector region 5, and the transport efficiency is improved.
Patent JP-S61105987-A (JP)
Title: Conference system among many places
Inventor: SUMIDA MITSUO
IPC: H04M9/00
Filed: 1984-10-29
Abstract: PURPOSE:To enable to hold a conference having various services among many places by using sound signals, image signals and controlling signals in the signal band of the same communication circuit digitalizing and multiplexing the signals. CONSTITUTION:Request for conference, terminal number of conferee, designation of conference mode (number of places, conference/multiple address, service etc.) etc. are inputted to a center 30 by using the operation board 15i of a terminal 10i. A conference system controlling device 34 decodes information relating to the conference, and offers the connection process of terminals entered as members of the conference and service for conference according to the contents. An image signal editing device 33 sends out the picture of other person in case of two persons conference, and in case of three persons' conference etc., further divides the picture signal band, and sends out the required picture signals.
Patent JP-H04109805-A (JP)
Title: Method for mounting switchboard for circumferential electrical product
Inventor: KIMURA TOKUJI
IPC: E04B1/70
Filed: 1990-08-28
Abstract: PURPOSE:To make a switchboard look more attractive and further to easily take off electric power in the case that an electrical product is used out of doors by mounting the switchboard to a ventilating hole in a foundation part made very difficult conspicuous in a building. CONSTITUTION:A switchboard 5 is mounted to a net 14 in a manner wherein bolts 6, protruding in a reverse side of the switchboard 5, are inserted to a space of the net 4 and fixedly tightened by nuts 7. A spacer 8 is interposed in the bolt 6 in the reverse side of the switchboard 5 so that it is placed in a condition that the switchboard 5, even when it is fixed by the nuts 7, is in a fixed space apart from the net 4 by existence of the spacers 8. A power supply itself is wired previously in the case of constructing a building from the indoor to a port of a ventilating hole 3 in a foundation part 2 via the underfloor 9, and the concerned wiring is only required connected to the mounted switchboard 5. The foundation part 2 is formed by concrete, and normally after the net 4 is mounted to the ventilating hole 3, a wooden material 11 for use of the base is executed by a metal fixture.
Patent JP-S6470488-A (JP)
Title: Novel 3-aroyl-6,7-dihydro-5h-pyrrolo(1,2-c)imidazole-7-carboxylic acid derivative
Inventor: TSUJI MASAYOSHI
IPC: A61P29/00
Filed: 1987-09-10
Abstract: NEW MATERIAL:A compound expressed by formula I [R1 is H, halogen, trihalomethyl, alkyl, alkoxy, alkylthio, etc.; Ar is (substituted)phenyl or (substituted)heterocyclic ring; R2 is hydroxyl group, ester residue or amino group]. EXAMPLE:3-Benzoyl-6,7-dihydro-5H-pyrrolo[1,2-c]imidazole-7-carboxylic acid. USE:A nonsteroidal anti-inflammatory and analgesic agent. PREPARATION:For example, 2-benzimidazole expressed by formula II is treated with a halogenating agent, such as bromine, to provide a halogeno derivative, which is then reacted with 6,6-dimethyl-5,7-dioxaspiro[2.5]octane-4,8-dione and subsequently decomposed with methanol, etc., containing hydrogen chloride to afford a compound expressed by formula III (R is lower alkyl). The resultant compound is then hydrolyzed and simultaneously decarboxylated to afford a carboxylic acid expressed by formula IV, which is, as necessary, esterified to provide the aimed compound expressed by formula I.
Patent JP-H04109662-A (JP)
Title: Semiconductor integrated circuit device
Inventor: MIYAZAWA MAKOTO
IPC: H01L21/822
Filed: 1990-08-29
Abstract: PURPOSE:To prevent latchup of a parasitic transistor by detecting variation in a substrate potential due to a substrate current, regulating the capacity of a substrate potential generating circuit, and holding the potential constant. CONSTITUTION:A substrate potential (SUB) and the potential of a contact A are proportional. Accordingly, if the substrate potential rises, the potential of the contact A also rises. Since the potential is inputted to the gate of an oscillating frequency regulating MOSFET in a second block 2 by a signal line phi, if the potential of the contact A above the threshold value of the MOSFET rises, MOSFETs Q5, Q10, Q15 are turned ON, the period of an oscillation fre quency is shortened from t to t', the capacity of a substrate potential generator in the block 2 is raised to prevent rising of the substrate potential. Thus, latchup due to a parasitic transistor can be prevented.
Patent JP-S61108420-A (JP)
Title: Strip tracting device
Inventor: KANI YASUNORI
IPC: B65H20/24
Filed: 1984-10-31
Abstract: PURPOSE:To quicken a work and to reduce a labor by providing the sheave for shifting the direction of a wire rope, also by supporting the guide frame of the wire rope rotatably and vertically movably. CONSTITUTION:The wire rope guiding frame 12 having a swiveling center 8 at the position off from the traveling path width of a loop car 1 is provided. The frame 12 equips the sheaves 10, 11, 11' for shifting the direction of a wire rope 9, also the one end is fixed via a cotter 14 to the bracket 13 of a frame 3. A strip 2 is tracted by a which 15 via the sheaves 10, 11 with connecting the tip of the wire rope 9 to the one end of the ruptured strip 2. The other end of the strip 2 is tracted with re-winding the rope 9 on the sheaves 10, 11'. Further the frame 12 is made freely movable vertically with the ascent and descent of the bracket and rotated upto a position (a) at the normal operation time of the loop car 1. With this method the work is quickened and labor can be reduced.
Patent JP-S60119826-A (JP)
Title: Hollow concrete stack block
Inventor: KATAOKA AKIRA
IPC: E04B2/02
Filed: 1983-11-30
Abstract: PURPOSE:To enable three sides of a block to be utilized as faces by using a block whose surface is shaped into a nearly trapezoidal form and the side face is shaped into a rectangular form of a fixed dimensional ratio. CONSTITUTION:In a hollow concrete stack block 1, the upper face and lower 11 has a nearly trapezoidal form and the side faces 12-15 have a rectangular form, the side faces 12 and 13 are crossed to each other and each of the sides has the lengths G and H. The side faces 13 and 14 are crossed to each other and the side face 14 has a high (1/2)H. The side face 15 adjacent to the side face 14 has a trapezoidal slant form. The block 1 has a hollow 19. A noth 18 is provided on the trapezoidal side of the face 12 for providing drip hole and bar arrangement. The effective thickness of a retaining wall having a large stay length can be increased and draining work can be made easier.
Patent JP-H0566398-A (JP)
Title: Liquid crystal display device
Inventor: YAZAWA SATORU
IPC: G02F1/1335
Filed: 1991-09-09
Abstract: PURPOSE:To improve portability and to reduce power comsumption by switching plack-and-white display and color display and using a reflecting plate or the like instead of a fluorscent tube as a backlight unit. CONSTITUTION:A liquid crystal panel 12 for controlling rotatory polarization is installed at the front part of a first polarizing plate 11. At the front part thereof, a circuit substrate 25, a first transparent substrate 13, a second transparent substrate 14 and a second polarizing plate 13 are provided. Besides, a black matrix 15, a multicolor filter 16 having polarizing property, a transparent electrical conductive film 17, an oriented film 211 and a liquid crystal layer 210 are provided. In such a case, the backlight unit 115 of the fluorescent tube can be removed from the liquid crystal panel part. Then, the arrangement of a reflectign plate or an EL backlight unit can be used instead of the unit 115. Besides, either of the color display or the black-and-white display can be executed by lighting the panel 12.
Patent JP-2001017001-A (JP)
Title: Transparent sheet provided with transmittance-adjusting function
Inventor: OFUJI MASAYASU
IPC: B32B7/02
Filed: 1999-07-07
Abstract: PROBLEM TO BE SOLVED: To provide a transparent sheet provided with a transmittance-adjusting function, which adjusts transmittance of solar ray for three-dimensional sections in a house facility, e.g. roof, side and lining, to improve production environments for plants and reduce expenses for plant cultivation. SOLUTION: This transparent sheet 6 is provided with a light-shielding material 5 by an adequate method, e.g. incorporation, insertion, deposition or coating, to form the monolithic body, in such a way to reduce difference between the calculated light-shielding rate and that observed by an illuminometer by finely adjusting width or the like of the light-shielding material 5.
Patent JP-H0895229-A (JP)
Title: Photomask for exposure device and its pattern plotter
Inventor: NAKAYAMA YASUHIKO
IPC: G03F1/68
Filed: 1994-09-22
Abstract: PURPOSE: To suppress the curvature of field and image distortions on the imag ing planes of the projecting lenses of reduction steppers and to absorb the difference from one stepper to another by forming the pattern previously distorting the shape and pattern of a photomask. CONSTITUTION: The metallic pattern 3 of the photomask 1 for correcting distortions are plotted with distortion in some places in such a manner that the image distortions of the projecting lenses using the photomask 1 are offset on a wafer at the time the pattern is plotted by a reticle plotter. For example, the photomask is provided with a pattern 4 plotted in such a manner that the image distortion generated at the time of assembling the respective projecting lenses in the stepper offset on the wafer by the pattern shape (distortion correcting patterns) plotted to offset the image distortion intrinsic to the projecting lenses on the wafer.  On the other hand, the surface shape of a photomask 2 is so worked as to form an aspherical surface that the curvature of image intrinsic to the projecting lenses and the curvature of image field generated at the time of assembling the respective projecting lenses are offset on the wafer.
Patent JP-S6289410-A (JP)
Inventor: OKADA TADASHI
IPC: H02G3/03
Filed: 1985-10-14
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-2000058587-A (JP)
Title: Semiconductor device and manufacture thereof
Inventor: TAKIGAWA YUKIO
IPC: H01L21/60
Filed: 1998-08-12
Abstract: PROBLEM TO BE SOLVED: To provide a method for simply manufacturing a semiconductor device such as a chip size package comprising a sealing material layer formed to cover a surface of an element forming bumps and to expose an edge of the bump. SOLUTION: A wafer having an reactive sealing material on it is put on a supporting body for molding, the reactive sealing material is covered by a film for stripping, and the sealing material is spread over the surface of the wafer by heating and pressurizing through the wafer and the film for stripping. The sealing material is molded for the time required more than 30% to less than 100% of a reactive rate of the sealing material under this molding temperature, the sealing material is cooled, the sheet for stripping is stripped off, the wafer is sealed by the sealing material so that an end face of a bump is exposed, and the wafer is cut into individual elements. The sealing material desirably comprises a composition of an epoxy resin, hardener solvent, filler, and hardener catalyst.