baber/WOPTO huggingface dataset:
Patent TW-445568-B (TW)
Title: Substrate fixing adhesive tape for semiconductor package carrier and the manufacturing method thereof
Inventor: SHIE WEN-LE
IPC: H01L23/495
Filed: 2000-05-18
Granted: 2001-07-11
Abstract: The present invention relates to a substrate fixing adhesive tape for semiconductor package carrier and the manufacturing method thereof, which is applied to a semiconductor package process. The present invention uses a recyclable carrier to carry the substrate and employs the adhesive tape to fix the substrate so as to position the substrate on the carrier frame. The substrate is secured by the structures including the positioning chamfer, anti-polluted gap at the flange and the corner of the window edge of the carrier frame, so as to achieve the purpose of adhering the substrate without polluting the substrate surface in the whole subsequent package process.
Patent TW-440499-B (TW)
Title: Method for on-line monitoring removal rate in CMP by means of curve approximation
Inventor: LIN JR-LUNG
IPC: B24B37/04
Filed: 2000-05-31
Granted: 2001-06-16
Abstract: Disclosed is a method for on-line monitoring removal rate in CMP, comprising at least the steps of: placing a controlled wafer into a machine bed; directly calculating the CMP polishing rate by curve approximation; inputting the measured removal rate into the polishing machine bed to calculate the polishing time of next batch; and proceeding with polishing of the next batch.
Patent TW-447129-B (TW)
Title: Array type SOI transistor layout
Inventor: CHEN SHIAU-SHIAN
IPC: H01L27/02
Filed: 2000-06-30
Granted: 2001-07-21
Abstract: An array type SOI transistor layout is disclosed, which comprises the body contact of the first conduction type and polysilicon gate structure. The array type polysilicon gate structure is allocated in the body contact of the first conduction type, and separates several array-like ion-doped regions in the body contact of the first conduction type, and form several sources of the second conduction type and drains of the second conduction type interlaced disposed. The present invention not only can achieve the goal of increasing the effective conduction area, but also can improve the performance and heat dissipation characteristics of the device.
Patent TW-454345-B (TW)
Title: A novel method to implant NMOS polycrystalline silicon in embedded flash memory applications
Inventor: MEHRAD FREIDOON
IPC: H01L27/115
Filed: 2000-08-03
Granted: 2001-09-11
Abstract: A method to implant NMOS polycrystalline silicon in embedded FLASH memory applications is described. In the method the polycrystalline silicon region (130) that will used to form the gate electrode of the NMOS transistor is doped simultaneously along with the source line in the FLASH memory array.
Patent TW-498186-B (TW)
Title: Self-modifying clock generator circuit
Inventor: SATORU MIYABE
IPC: H03L7/197
Filed: 2000-10-11
Granted: 2002-08-11
Abstract: To restrain cycle-to-cycle jitter in a clock generator subjected to EMI measure, in a 2nd order PLL having a loop filter 7 including a first capacitor and a first resistor, a reduction in a comparison frequency is restrained by using a clock modulating circuit 2 controlled by a signal 16 provided by dividing an oscillation signal of a voltage control type oscillator 13 and recurrently controlling a divider 15, generation of high frequency noise is minimized by using a 1st order ΔΣ modulator 21 in the clock modulation circuit 2 and the system is constituted by a 3rd order PLL by using a second capacitor 3 having a capacitance value of about 1/10 or more of that of the first capacitor in parallel with the loop filter 7 to thereby restrain the intercycle jitter by effectively removing the high frequency noise.
Patent TW-I288639-B (TW)
Title: Treatment of emphysema using RARgamma selective retinoid agonists
Inventor: BELLONI PAULA NANETTE
IPC: A61P11/00
Filed: 2000-11-08
Granted: 2007-10-21
Abstract: This invention provides the use of RARgamma selective agonists for the manufacture of a medicament containing one or more such agonists for the treatment of emphysema and other diseases associated with alveolar damage. In another aspect, this invention provides the use of RAR agonists, preferably a RARgamma selective agonist for the manufacture of medicaments for promoting tropoelastin gene expression and alveolar matrix repair.
Patent TW-471114-B (TW)
Title: Method for stabilizing low-k material
Inventor: TSAI JENG-YUAN
IPC: H01L21/76
Filed: 2001-02-16
Granted: 2002-01-01
Abstract: The present invention provides a method for stabilizing low-k material in a semiconductor structure which at least includes the following steps: providing a semiconductor structure; spin-on a dielectric layer such as a polymer layer on the semiconductor structure; and a water solution, such as ammonium hydroxide solution, for processing the dielectric, in which the surface of processed dielectric layer will have a passivated layer for stabilizing the low-k material.
Patent TW-I241398-B (TW)
Title: Eddy current loss measuring sensor, film thickness measuring device, film thickness measuring method and recording medium
Inventor: NAGANO OSAMU
IPC: G01B7/06
Filed: 2001-03-02
Granted: 2005-10-11
Abstract: The present invention provides an eddy current loss measuring sensor capable of measuring partial film thickness, a thickness measuring device capable of quickly measuring film thickness with high precision, and a computer accessible recording medium. In the film thickness measuring device 1 of the present invention, an opening 16 with exposed coil 12 is disposed on the bottom part of a magnet containing the coil 12. The film thickness measuring device 1 includes an eddy current loss measuring sensor 20 having a coil 24 for receiving a high-frequency current, exciting a high-frequency magnetic field and exciting an eddy current on a conductive film 9; a coil 22 for outputting a high-frequency current that is influenced by an eddy current loss resulting from an eddy current; an impedance analyzer 48 for measuring an eddy current loss value with an impedance variation of an eddy current loss measuring sensor 20, a current value variation of the high-frequency current, or a phase variation of the high-frequency current measured according to an eddy current outputted from the coil 22 and a phase variation; an optical displacement sensor 32 for measuring the distance between the conductive film 9 and the eddy current loss measuring sensor; and a computer control part 42 containing a film thickness computation part 54 for calculating a film thickness of the conductive film 9 in accordance with the respective measuring result of the impedance analyzer 48 and the optical displacement sensor 32.
Patent TW-478160-B (TW)
Title: Chip structure with embedded inductance device
Inventor: PAN RUEI-SHIANG
IPC: H01L29/00
Filed: 2001-03-26
Granted: 2002-03-01
Abstract: A chip structure with embedded inductance device is provided, which comprises a substrate, a plurality of active devices, a dielectric layer with smooth upper surface and an inductance device. The substrate is provided with an active region and a field device in grid structure. The field device in grid structure is consisted of a plurality of field oxides arranged on the substrate, a plurality of first type ion doped regions arranged in the substrate under the field oxide, and a plurality of second type ion doped regions arranged in the substrate between the field oxide. A bonding region will be formed between the first type ion doped regions and the second type ion doped regions and the bonding region is used to block the parasitic current loss in the substrate. Further, the dielectric layer is arranged on the substrate to cover the active devices and the field devices. The inductance device is arranged on the dielectric layer above the field devices.
Patent TW-I291074-B (TW)
Title: Optical proximity correction
Inventor: CHEN JANG-FUNG
IPC: G03F1/00
Filed: 2001-04-06
Granted: 2007-12-11
Abstract: Method for utilizing halftoning structures to manipulate the relative magnitudes of diffraction orders to ultimately construct the desired projected-image. At the resolution limit of the mask maker, this is especially useful for converting strongly shifted, no-0th-diffraction-order, equal-line-and-space chromeless phase edges to weak phase-shifters that have some 0th order. Halftoning creates an imbalance in the electric field between the shifted regions, and therefore results in the introduction of the 0th diffraction order.
Patent TW-574325-B (TW)
Title: Composition comprising combination of carbon clack and surface treating agent, method for producing surface treated carbon black, and method of dispersing carbon black in polymer composition
Inventor: LAMBA RAKSHIT
IPC: C09D17/00
Filed: 2001-05-28
Granted: 2004-02-01
Abstract: The invention comprises a composition comprising a combination of carbon black and at least one surface treating agent selected from the group consisting of quinone compounds, quinoneimine compounds and quinonediimine compounds, as well as methods of obtaining the composition and the use of the composition in dispersing carbon black in a natural or synthetic polymer. The composition achieves increased dispersibility and improved mixing characteristics of the carbon black and improved processability of the carbon black containing polymer.
Patent TW-576928-B (TW)
Title: Process and system of coupled real-time GPS/IMU simulation with differential GPS
Inventor: LIN CHING-FANG
IPC: G01S1/00
Filed: 2001-07-06
Granted: 2004-02-21
Abstract: A coupled real-time GPS/IMU simulation method with differential GPS includes the steps of receiving real-time trajectory data from a 6DOF trajectory generator and generating GPS simulated measurements (rover and reference) and inertial measurement unit simulated electronic signals based on the real GPS models and IMU models, respectively, and injecting those simulated data into an on-board integrated GPS/INS (global positioning system/inertial navigation system). Therefore, the coupled real-time GPS/IMU simulation method with differential GPS can be applied to evaluate the performance of the integrated GPS/INS in the area of high accuracy positioning in addition to the regular evaluation (one receiver mode).
Patent TW-546932-B (TW)
Title: Method and apparatus for reducing transmission overhead in a communication system
Inventor: ROSEN ERIC
IPC: H04L12/56
Filed: 2001-09-20
Granted: 2003-08-11
Abstract: A method and apparatus for reducing transmission overhead in a wireless communication system. In one embodiment, the apparatus is directed to a communication device comprising a processor for transmitting a data origination message, the data origination message initiating a data communication with a receiving station. Information needed to construct datagrams are also transmitted by the apparatus to the receiving station. The receiving station receives the data origination message and the information needed to construct datagrams and configures a packet data generator for sending datagrams to a destination device. Data network header information is constructed from information provided by the information needed to construct datagrams.
Patent TW-546814-B (TW)
Title: Voltage switching circuit
Inventor: NAKAMURA HIROSHI
IPC: H01L27/092
Filed: 2001-10-16
Granted: 2003-08-11
Abstract: The invented voltage switching circuit is featured with using two series-connected D-type transistors, which are different in gate insulating film or threshold voltage, to share high-voltage cutoff and supply voltage transfer functions, which are performed by a single D-type transistor previously, so as to make it capable of preventing the threshold voltage margin from being lowered and using a minimum number of transistors to form a voltage switching circuit. Thus, without using the enhancement transistors involving an increase in a pattern area, it is able to provide a voltage switching circuit, which is small in chip area, low in cost and high in yield and reliability, and is capable of providing a stable operation with a low supply voltage that can not be reached with one D-type transistor.
Patent TW-527848-B (TW)
Title: Light-emitting element and display device and lighting device utilizing thereof
Inventor: SUGIURA HISANORI
IPC: H01L33/00
Filed: 2001-10-25
Granted: 2003-04-11
Abstract: A light-emitting element is provided having a layered structure composed of at least a light-emitting layer having a light-emitting region and a reflective layer for reflecting light emitted by the light-emitting region. Emitted light is extracted at the light-emitting region by a light-extracting surface distanced from the light-emitting region. In a portion of the reflective layer there is a light-scattering portion.
Patent TW-550363-B (TW)
Title: Low NOx premix burner apparatus and methods
Inventor: VENIZELOS DEMETRIS
IPC: F23D14/74
Filed: 2001-10-29
Granted: 2003-09-01
Abstract: Low NOx axial premix burner apparatus and methods for burning fuel gas are provided by the present invention. The methods of the invention are basically comprised of the steps of mixing a first portion of the fuel gas and all of the air to form a lean primary fuel gas-air mixture, discharging the lean primary fuel gas-air mixture into the furnace space whereby the mixture is burned in a primary combustion zone therein, discharging a second portion of the fuel gas into the primary combustion zone to stabilize the flame produced therein and discharging the remaining portion of the fuel gas into a secondary combustion zone in the furnace space.
Patent TW-I240714-B (TW)
Title: Dielectric ceramic composition and stacked layer ceramic capacitor using such dielectric ceramic composition
Inventor: TOKITA KOJI
IPC: H01B3/12
Filed: 2001-12-14
Granted: 2005-10-01
Abstract: This case is to provide a dielectric ceramic composition and a stacked layer ceramic capacitor using such dielectric ceramic composition, which has high electric capacitance, high capacitance efficiency and can satisfy X7R characteristics. The main ingredient comprises barium titanate and sub-ingredient which is selected from magnesium oxide, dysprosium oxide, barium oxide, calcium oxide, vanadium oxide, silicon oxide, manganesium oxide and molybdenum oxide, and when barium titanate is equal to 100 moles based on BaTiO3 magnesium oxide is equal to 1.5-3 moles based on MgO, dysprosium oxide is equal to 1-5 moles based on Dy2O3, barium oxide and calcium oxide are equal to 0.1-5 moles respectively based on BaO and CaO, vanadium oxide is equal to 0.01 to 0.1 based on V2O5, silicon oxide is equal to 1-5 based on SiO2, manganesium oxide is equal to 0.1-1 moles based on MnO, molybdenum oxide is equal to 0.05-0.2 based on MoO3.
Patent TW-535428-B (TW)
Title: Home entertainment system
Inventor: APPLEWHITE PAUL
IPC: H04N5/00
Filed: 2001-12-28
Granted: 2003-06-01
Abstract: A home entertainment system has a hub with a plurality of TV tuners. Ports for consumer devices are provided around the home and in the hub, with a number of the ports allocated a respective TV tuner. Remote control sensors are associated with one of the allocated ports, for providing remote control signals to the port. The hub includes a switching matrix, and all ports are connected to the switching matrix which enables different ports to be coupled together and wherein remote control signals provided to a port enable control of the TV tuner allocated to the port. The hub can be provided with the UHF or VHF TV signal, typically over a coaxial cable. All of the TV tuners used by the entertainment system are in the hub, so that the distribution of signals around the system can take place at baseband frequencies. The switching matrix enables consumer devices, such as video recorders or cable or satellite decoders, to be positioned in one location, but enables the signals to be connected to any chosen location in the home. The remote control sensors enable the tuners to be controlled by a remote control, despite their location in the system hub.
Patent TW-516151-B (TW)
Title: Test device and method of flash memory tunnel oxide
Inventor: FAN TZUO-HUNG
IPC: G11C29/50
Filed: 2002-01-11
Granted: 2003-01-01
Abstract: Test device and method of flash memory tunnel oxide are provided. The method comprises first providing a test device that has a diffusion area, a floating gate formed on the diffusion area and a tunnel oxide layer formed between the floating gate and diffusion area; next, forming several contact windows on the floating gates and on the diffusion areas around the test device; then applying a first bias on the floating gate contact windows and a second bias on the diffusion contact windows to test the tunnel oxide quality.
Patent TW-I244762-B (TW)
Title: Single chip high-density layout of GaAs hetero-junction bipolar transistor
Inventor: CHI YOU-MING
IPC: H01L29/73
Filed: 2002-01-14
Granted: 2005-12-01
Abstract: This invention discloses a single chip high-density layout of GaAs hetero-junction bipolar transistor; and the disclosed layout is to use two transistors as a set combined with one metallic heat-dissipation area, onto the substrate of which the via penetrating through the substrate is formed and the metal layer is covered onto areas of the substrate with no components on. Because the disclosed transistor contains ∩-shaped collectors surrounding besides the two rectangular bases, and the rectangular emitters are located in between the two bases, which can easily adjust the size of transistor. By means of the metal layer on the backside of the device, the heat-dissipation capability of transistor can be greatly enhanced and with enhancement of the heat-dissipation capability, the size of transistor can be increased according to the demand, which hence not only boosts the efficacy of transistor, but also increases the density of single-chip layout in transistor.
Patent TW-583560-B (TW)
Title: Modeling and scheduling of a semiconductor wafer fab
Inventor: FU LI-CHEN
IPC: G06F17/50
Filed: 2002-03-01
Granted: 2004-04-11
Abstract: In this patent, we propose a simulation/scheduling system for semiconductor wafer fab. The underlying model is basically constructed with colored timed Petri-net. The resource contention subnet in this model is modified with the help of the queueing theory. We apply the queueing theory to simplify the simulation process and to reduce simulation time. Besides, an arrival-rate-updating module is designed to reflect the dynamic flows of lots in the fab. This module can be used to improve the accuracy of simulation. Furthermore, real system behaviors such as machine breakdown, machine maintenance and lot transportation are involved in our detailed model. Our simulator is built on this model. The genetic algorithm is adopted in our scheduler for its well-known efficient searching ability in a huge solution space. The evaluation process in the genetic algorithm is completed by our simulator. We also propose a gene encoding method which can provide versatile scheduling strategies and support traditional rules.
Patent TW-I223066-B (TW)
Title: Electrochemical sensor
Inventor: JONES IVOR W
IPC: G01N33/20
Filed: 2002-03-27
Granted: 2004-11-01
Abstract: In one aspect, the present invention relates to an electrochemical sensor for determining the concentration of a group IA metal in a fluid such as molten metal. The sensor comprises a substantially pure quantity of the group 1A metal as a reference electrode (13) contained in a sensor housing (3), and a solid electrolyte constituting at least part of the sensor housing (3). The electrolyte is in electrical contact with the reference electrode (13) and the sensor is capable of operating at temperatures in excess of 973K. In a preferred arrangement, the sensor comprises a two part elongate conductor (15), a first part (17) of which extends from the reference electrode (13) into a refractory seal (11a), and second part (19) of which extends from within the refractory seal (11a) externally of the sensor, the parts (17, 19) being welded together.
Patent TW-583520-B (TW)
Title: Carbon powder and image forming device
Inventor: NAKAJIMA YOSHIHIRO
IPC: G03G9/08
Filed: 2002-04-03
Granted: 2004-04-11
Abstract: The present invention is to prevent the occurrence of selective displaying. The first aspect of the present invention is to use the coverage of mid-resistance additive with equal particle diameter as surface roughness of the display roller or the average particle diameter of carbon powder for the parent carbon powder particles in the synchronous distribution curve of equal particle diameter of synchronous mid-resistance additive relative to the equal particle diameter of parent carbon powder particle as the reference, and use the coverage of mid-resistance additive obtained from that value as a certain virtual reference line to make the coverage of mid-resistance additive in the equal particle diameter range smaller than the surface roughness of display roller or the equal particle diameter of the average carbon powder particle diameter of parent carbon powder particles above the reference line. The second aspect of the present invention is to set the equal particle diameter of parent carbon powder particle as the surface roughness of roller as d1 in the synchronous distribution curve of synchronous mid-resistance additive relative to the equal particle diameter of parent carbon powder particle, and set the equal particle diameter of parent carbon powder particle as the average carbon powder particle diameter as d2 (d1 < d2), and uses the coverage of mid-resistance additive for the equal particle diameter of parent carbon powder particle between d1 and d2 as the reference, so that the coverage of mid-resistance additive for the equal particle diameter of parent carbon powder particle in the range below d1 and above d2 is above the reference line. The third aspect of the present invention is to use the coverage of mid-resistance additive with equal particle diameter as surface roughness of the display roller or the average particle diameter of carbon powder for the parent carbon powder particles in the synchronous distribution curve of equal particle diameter of synchronous mid-resistance additive relative to the equal particle diameter of parent carbon powder particle as the reference, and use the coverage of mid-resistance additive obtained from that value as a certain virtual reference line, so as to make the coverage of mid-resistance additive in the equal particle diameter range larger than the surface roughness of display roller or the equal particle diameter of the average carbon powder particle diameter of parent carbon powder particles above the reference line. The fourth aspect of the present invention provides a display means including at least the photosensitive object for forming electrostatic latent image and for displaying the electrostatic latent image on the sensing object, and the transfer means for transferring the image on the photosensitive object, and the developing means for developing the transferred carbon powder image, and the carbon powder image forming device using the above-mentioned inventions.