Patent GB-1145991-A (GB)
Title: Improvements in and relating to methods of manufacturing electrical circuit arrangements
Inventor: BEALE JULIAN ROBERT ANTHONY
IPC: H01L27/07
Filed: 1965-03-12
Abstract: 1,145,991. Circuit assemblies; resistors. MULLARD Ltd. 11 March, 1966 [12 March, 1965], No. 10591/65. Headings H1K, H1R and HiS. In the manufacture of a circuit on an insulating support, the partly completed circuit is placed in a low pressure chamber and a part of the circuit-a conductor or an electrical device - is tested and subsequently further circuit metallization is provided by electron beam activated deposition using an electron gun provided in the chamber. In general, the circuit, which may be a printed circuit or comprise tracks on a passivated semi-conductor body, may comprise inductive, resistive, and capacitative portions and may also contain semiconductor devices. In a particular embodiment three transistors T1, T2, T3 and a resistor R are provided in a semi-conductor body. The first one of the transistors is connected by metal deposition to a test conductor 7 and the transistor tested. If the transistor is unsatisfactory, part of the connection is electron beam machined away and the second transistor connected by metal deposition and also tested. If this transistor also proves unsatisfactory the connection is again broken and a third transistor connected by metal deposition. Assuming this transistor to be satisfactory, the connection is left intact and tests are then made on the resistor R which is connected to the transistor by surface metallization. The resistor is initially formed to have a higher resistance than is necessary and, after testing, metal is deposited by electron beam activated deposition to extend one contact 5 and successively short out portions of the resistor until the desired resistance value is reached. (In a variant further resistors for load and biasing, Fig. 2, not shown, and a decoupling capacitor-with redundancy-may also be provided.) The semi-conductor body may be of silicon and the passivation of silicon dioxide. The bulk of the conductive tracks may be formed by the vapour deposition of aluminium and the linking portions are provided by tin deposited at the electron beam bombarded areas from tetraethyl tin. Crossover connections may be formed by depositing silica by electron beam activated deposition of tetraethoxy silane. Removal of deposited tin may be achieved by subjecting the device to an atmosphere of chlorine which attacks the tin only in the areas struck by the electron beams. The apparatus is continuously pumped during the removal of tin to ensure removal of tin chloride vapour from the apparatus. Another component which may be used in the circuit is an insulated gate fieldeffect transistor. After testing of such a transistor, a portion of the gate metallization may be machined away by electron beam bombardment until a satisfactory mutual conductance is achieved. A semi-conductor wafer containing many devices forming one or more circuits may be mounted on a carrier fitted with sidewalls. These sidewalls allow the stacking of carriers so that several carriers may be fed sequentially into the apparatus through airlock ports, or instead several carriers may be stacked within the apparatus and presented successively to the operating site. To carry out the electrical tests, conductors in the apparatus clip over conductors moulded into the carriers. An additional connection may be provided by a low voltage electron beam. The apparatus may be automated by computer controls. In the manufacture it may be necessary to cool the substrates during deposition or machining of metal. This may be conveniently achieved by a Peltier effect device in contact with the substrate. This device may also be used for heating necessary in an annealing step or instead a susceptor device may be placed in contact with the substrate.