baber/WOPTO huggingface dataset:
Patent JP-H11292017-A (JP)
Title: Tape winding apparatus interlocked with conveyer
Inventor: FUKADA KAZUMITSU
IPC: B65B27/00
Filed: 1998-04-02
Abstract: PROBLEM TO BE SOLVED: To enable unattended operation as much as possible by taping without a drop in working efficiency. SOLUTION: A head driving mechanism 12 driving a taping head 20 between a working posture and a release posture is provided. A head control means 30 for controlling the head driving mechanism 12 to displace the taping head 20 at the release position as a home position to the working posture is provided. A speed detecting means 5 for detecting moving speed of a wiring board 2 by a conveyer 1 is provided. Further, a speed adjusting means 30 for adjusting rotation speed of a rotary board 22 corresponding to the detected moving speed is provided to apply taping by the taping head 20 during movement of the wiring board 2.
Patent JP-S61248650-A (JP)
Title: Call-pickup system
Inventor: NOZAKI TADAO
IPC: H04M3/42
Filed: 1985-04-26
Abstract: PURPOSE:To enable elimination of transfer operation at an answering extension after picking up for a call by discriminating the picking up card to start the main memory in case a call for incoming to an incoming extention is answered by a different extention and a call-pickup code is dialed. CONSTITUTION:The call-pickup code is dialed at the answering extension 112. A CPU 35 analizes the dial information received from a transmission register 33, and identifies the call as a call-pickup code, then starts the main memory (MM)36. The CPU 35, further, reads out the answering extension 112 and the number of an extension included with a call-pickup group by using a caller's information received from the register 33. The CPU 35 also checks the state of the extension of respective extension number read out from the main memory 36, and identified the location of the incoming extention 111 to which a call signal is being transmitted, then restores a link B and the transmission register 33. Thereafter, a link C is closed, and the answering extension 112 is connected with an incoming trunk 32.
Patent JP-S63278923-A (JP)
Inventor: UIRIAMU II SUTAANAA
IPC: C08G18/65
Filed: 1988-04-14
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S5213535-A (JP)
Title: Hot-melt type colored traffic paint
Inventor: FUJITANI AKIFUMI
IPC: E01F9/518
Filed: 1975-07-24
Abstract: PURPOSE: A hot-melt type colored traffic paint having excellent adhesion, weatheving resistance, reflectivity at night and anti-staining properties. 
     COPYRIGHT: (C)1977,JPO&Japio
Patent JP-H0690786-A (JP)
Title: Double specific antibody determinant
Inventor: PAULUS HENRY P
IPC: C07K16/00
Filed: 1993-03-26
Abstract: A homogenous sample of identical bispecific antibody determinants, each determinant being composed of two L-H half-molecules linked by disulfide bonds, each L-H half-molecule being specific for a different antigenic determinant and including at least the F(ab') portion of a monoclonal IgG antibody. The bispecific antibody determinants are useful, e.g., in the formation of multilamellar assemblies and enzyme electrodes.
Patent JP-H11274739-A (JP)
Title: Multilayer wiring board
Inventor: KURAMOCHI SATORU
IPC: H05K3/46
Filed: 1998-03-20
Abstract: PROBLEM TO BE SOLVED: To provide a multilayer wiring board which can respond to the micromachining in wiring and high volume production and also can respond to the increase in terminals of a mounted semiconductor device, and to narrower pitches between terminals. SOLUTION: From a plurality of original masks for transfer formed with a wiring section constituted of a conductive layer formed on a supporter by plating in a specified shape, the wiring sections of the original masks for transfer are transferred sequentially to a base substrate for a wiring board through adhesive layers 130 constituted of conductive resin layers to fabricate a multilayer wiring board formed with laminated wiring sections.  In a pin terminal region 110 formed with a group of pin terminals 115 for mounting a semiconductor device and the like, the wiring for extraction are fixed through the adhesive layers 130 constituted of insulating resin layers, and overlap each other in specified regions so that the distance between wiring 120 for extraction from the pin terminals 115, and all the pin terminals 115 is set to the minimum one or above for securing the insulation between the wiring 120 for extraction and the pin terminals 115, and the distance between the wiring 120 for extraction adjacent to each other in the direction toward the surface of the base substrate is also set to the minimum one or above for securing the insulation between the wiring 120 for extraction.
Patent JP-H08289582-A (JP)
Title: Controller of electric power supply circuit
Inventor: ONISHI YASUTOMO
IPC: H02P6/06
Filed: 1995-04-17
Abstract: PURPOSE: To enlarge the change width of output voltage without reducing motor efficiency by controlling the output voltage of a DC-DC converter and switching circuit with a signal to control the revolution of a motor, and putting the coil used in the DC-DC converter in common to one for use of power supply to each control part. CONSTITUTION: A revolution control means (Rc) 15 outputs control signals of frequency and output voltage for controlling the revolution of a motor 14. A RAM controller 16 controls the output voltage of a DC-DC converter (DC) 11 with the control signal of RC15. A PWM control means 17 controls a switching circuit 12 with the control signal of RC 15. A primary coil 18 is used for as a reactance inserted on the positive side between output terminals of a full wave rectification circuit 1. A transformer 19 uses the primary coil 18. Therefore, the amplitude of the pseudo sine waves and the frequency of pseudo sine waves of the switching circuit 12 can be varied with DC 11, so the change with of the output voltage can be enlarged without reducing motor efficiency.
Patent JP-H09280077-A (JP)
Title: Exhaust braking device
Inventor: KANEKO MASAHIRO
IPC: F16K17/04
Filed: 1996-04-12
Abstract: PROBLEM TO BE SOLVED: To prevent the breakage of a sealing surface for a valve seat in a relief valve by slowing a relief valve element to stabilize the exhaust pressure. SOLUTION: A relief valve 24 has a relief valve body 29 which contacts with or parts from a relief valve seat 18, relief springs 36 for urging the relief valve body 29 in its seated direction, and a damper 32 which slows the relief valve element 29 to cause the relief valve body 29 to be seated slowly when the relief valve 24 returns to its closed state from its open state by the urging force of the relief springs 36. The damper 32 has a damper chamber 37 formed by the sealing of air in the relief valve 24 and a piston 33 which moves together with the relief valve body 29 as to divide the damper chamber into two chambers 37a and 37b. The piston 33 has an orifice 34 by which those two chambers are communicated with each other.
Patent JP-H02272113-A (JP)
Title: Method of creating concrete pile body
Inventor: TAKAHASHI MORIO
IPC: E02D5/34
Filed: 1989-04-12
Abstract: PURPOSE:To reduce the cost of creating by filling a space prepared through drilling with an auger shaft, etc., with a mixture composed of reinforcing fiber- loaded mortar or reinforcing fiber-loaded concrete, aggregate and water. CONSTITUTION:The ground is drilled up to desired depth by a spiral auger 1 in a casing 3 through a dry type spiral auger excavation system. When the auger 1 reaches a desired position, the auger 1 is no-load turned, and the mud of a pit bottom is cleaned and discharged 5. The inside of a pit is filled with fiber-mixed concrete or fiber-mixed mortar 0 through the discharge pipe 9 of the auger 1. The auger 1 is pulled up together with the casing 3 without being rotated while being interlocked with the grouting of mortar or concrete. Accordingly, the cost of creation can be reduced.
Patent JP-S5517874-A (JP)
Title: Skew detection circuit of magnetic tape device
Inventor: FURUYA TSUKASA
IPC: G11B20/20
Filed: 1978-07-24
Abstract: PURPOSE: To detect accurately skew in a simple constitution by counting the reproducing output by a counter, which corresponds to each track of multiple tracks, and subjecting the counted value to a logical processing.  
     CONSTITUTION: Counters C 1 , C 2 ... corresponding to respective tracks of multiple tracks count reproducing outputs; and when counted values of counters C 1 , C 2 ... reach a prescribed value, counters C 1 , C 2 ... are reset by the output of OR circuit OR 1  simultaneously, and the similar operation is repeated. In this case, in case of a little skew of counters C 1 , C 2 ..., the output to OR circuit OR 2  does not appear through counters C 1 , C 2 ... where counted values are over a constant smaller than the prescribed value, and AND circuit AND does not generate the AND output. In case of a large skew, counted values of counters C 1 , C 2 ... do not reach the constant, and the OR output is generated in circuit OR 2  through counters C 1 , C 2 ..., and circuit AND is opened, and the OR output of circuit OR 1  is generated as the skew detection output from circuit AND, so that skew can be detected accurately in a simple constitution independently of the operation of a deskew memory. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-S63258043-A (JP)
Title: Manufacture of semiconductor device
Inventor: KAUCHI KAZUYA
IPC: H01L21/3213
Filed: 1987-04-15
Abstract: PURPOSE:To prevent an inverse taper from occurring in a through hole while effectively forming the second metallic interconnection to provide the title semiconductor devices with excellent reliability, reproducibility and massproductivity by a method wherein, after making the through hole, plasma silicon nitride films are repeatedly formed to be etched away for leaving a part thereof inside the through hole. CONSTITUTION:In order to manufacture a semiconductor device with multilayer interconnection insulated by insulating films, the first layer metallic interconnection 12 is formed on a substrate 1 while a plasma silicon nitride film 13, a spin on glass layer 14 and another plasma silicon nitride film 15 are respectively laminated on the interconnection 12 to form three layer insulating films. First, a through hole is made in said insulating films 13-15 by plasma etching process and active ion etching process using a photoresist pattern as a mask. Second, plasma silicon nitride films 16 repeatedly formed are etched away by rective ion etching process to leave a part of plasma silicon nitride films 16 only inside the through hole. Later, the second metallic interconnection 17 is formed on the through hole.
Patent JP-H11289462-A (JP)
Title: Picture processor
Inventor: OIZUMI MITSUHIRO
IPC: H04N19/00
Filed: 1998-04-03
Abstract: PROBLEM TO BE SOLVED: To eliminate the waiting time of a processing and to realize a high speed parallel processing by installing decoding means for the respective color components of an original picture. SOLUTION: An original picture constituted of a plurality of components is divided into a plurality of blocks and a parallel processing is executed for the respective components of respective blocks by using a plurality of decoding devices 13-15 and a plurality of header reading parts 12. The header reading parts read headers added for the respective blocks. When picture data of the whole blocks of the respective color components are decoded, the picture is outputted to the output device 16 of a display and the like. Since the processings are executed in parallel for the respective components of the respective blocks by using a plurality of decoding devices 13-15, a decoding processing can be executed at high speed. The number of the decoding devices 13-15 is set to be n-times as much as the number of components and n-pieces of header reading parts 12 are used.  Thus, the highly efficient processing can be executed without vacant processing time.
Patent JP-H01262598-A (JP)
Title: Utterance speed control circuit for voice synthesizing device
Inventor: KITAHARA YOSHINORI
IPC: G10L21/043
Filed: 1988-04-13
Abstract: PURPOSE:To generate a composition voice being natural and easily listenable to a listener even in case when an utterance speed has been varied by calculating a spectrum variation rate by analyzing an hourly variation of a spectrum and providing a function relation between the spectrum variation rate and the utterance speed. CONSTITUTION:The title circuit is provided with a spectrum variation analyzing means 4 for converting a digital sound signal which has been brought to A/D conversion by an A/D converting means 1, to a spectrum by an analyzing means 3, and calculating a spectrum variation rate by analyzing an hourly variation of its spectrum, and a function relation is provided between the spectrum variation rate and the utterance speed by an utterance speed control part 6. In such a way, in case of varying the utterance speed of a composite voice, a degree of shrinkage is varied in accordance with magnitude of a spectral variation, and a sound source and a composite frame period of a spectral parameter are determined, therefore, decay caused by time expansion and contraction of a phoneme whose spectral variation is violent can be prevented, and a voice being natural and easily listenable can be obtained.
Patent JP-S57205164-A (JP)
Title: Ink jet head for ink jet printer
Inventor: TOYA KAZUMI
IPC: B41J2/055
Filed: 1981-06-13
Abstract: PURPOSE:To make the flying speed of ink particles accurate by eliminating positional deviation between ink particles and an electricity-mechanical conversion element by such an arrangement wherein a recessed portion for positioning the electricity-mechanical conversion element is formed in a flexible wall forming part of an ink chamber and the conversion element is adhered to the recessed portion. CONSTITUTION:On the internal surface of a plate 21 forming a part of an ink chamber, a recessed portion 24 for forming a projection chamber is formed by etching, and a flexible wall 30 is formed in the thinly formed portion at the bottom of the recessed portion 24. Moreover, on the outer surface of the plate 21, a recessed portion 31 is formed at the portion of the flexible wall 30. This recessed portion 31 is designed for positioning a piezoelectric crystal.
Patent JP-S57205805-A (JP)
Title: Autotuning type tape recorder
Inventor: TAKAHASHI KENJI
IPC: G11B5/027
Filed: 1981-06-12
Abstract: PURPOSE:To vary the high band characteristics of a recording signal, by optionally setting a setting condition of a recording bias by a manual control,  when automatically setting the recording bias and a recording equalizer, etc. in  accordance with a kind of a magnetic tape. CONSTITUTION:Before entering into autotuning, changeover switches 6a, 6b are switched to the side (b), respectively. A control signal is inputted to a microcomputer 1 by the switch 6b, and the microcomputer is switched to an input operation of a data which becomes a target for setting a bias. Subsequently, a data corresponding to optional voltage is inputted and stored through an A/D converter 2 by a variable resistor 5. An output of this A/D converter becomes a target for deciding that a bias should be set to a value to what extent it has dropped from the maximum level against a reference signal by a position of the variable resistor 5. Subsequently, when the switches 6a, 6b are switched to the side (a), respectively, a regular autotuning operation is executed.
Patent JP-H02294191-A (JP)
Title: Television scanning line doubler
Inventor: JIYATSUKU JIEI KIYANBURU
IPC: H04N11/04
Filed: 1990-04-05
Abstract: PURPOSE: To avoid an undesirable artifact in an obtained image by interpolating ordinary pixels on the basis of a median value generated in a time area. CONSTITUTION: An interpolated pixel F1i is selected out of a group including an actual pixel value from a current field F0, a pixel mean value of an F1 field of F1(a+b)/2 as a pixel on a scanning line where (a) is above the position of a pixel (i) and (b) is below the position of the pixel (i) and an actual pixel value from a two-field delayed field F2.  This doubler is equipped with an actual pixel time compressor 14 which reduces the pixels on each scanning line of the F1 field to a half of an original scanning time and outputs them during a 1st doubled scanning speed line scanning interval, an interpolated pixel time compressor 24 which reduces the interpolated pixels (i) to a half of the original scanning time and outputs them during a 2nd doubled scanning speed line scanning interval and a switch 16 for the actual pixel time compressor 14 and interpolated pixel time compressor 24. Consequently, a double image artifact generated in an inter-field interpolating process can be removed.
Patent JP-2000282720-A (JP)
Title: Mounting structure of lever handle
Inventor: YAMAUCHI SUSUMU
IPC: E05B3/04
Filed: 1999-03-31
Abstract: PROBLEM TO BE SOLVED: To provide a mounting structure of a lever handle, capable of surely fixing a lever handle to an axial body. SOLUTION: In this mounting structure of a lever handle where an axial body 3 is inserted into and locked to a insertion hole 2 installed on the base part of a lever handle 1, a screw body 4 penetrates and screws to the base part of the lever handle 1 so as to project into the insertion hole 2 for pressing the axial body 3 against the internal surface of the insertion hole 2, a fitting part 5 is installed on the internal surface of the insertion hole 2 opposed to the screw body 4, and the axial body 3 is provided with a fitting part 6 of the axial body to be fitted to the fitting part 5 in a mounting state.
Patent JP-H05287890-A (JP)
Title: Structure of displacement absorbing part in earthquake-free floor
Inventor: SHOJI TATSUO
IPC: E04F15/00
Filed: 1992-04-13
Abstract: PURPOSE:To enhance safety with respect to structure of a displacement absorbing part in an earthquake-free floor. CONSTITUTION:An earthquake-free floor possesses the fixed floor 1 of a building, a movable floor 3 capable of moving on a floor base 2, a release panel 5 that blocks a displacement absorbing clearance (D) formed between these fixed floor 1 and movable floor 3, and a supporting member 4 that supports the back face of the release panel 5. Wall surfaces of the fixed floor 1 and the movable floor 3 facing the release panel 5 are formed in inclined surfaces 1a, 3a inclined downward toward their top ends, and the wall surfaces of the release panel 5 facing the fixed floor 1 and the movable floor 3 are formed in inclined wall surfaces 6 coinciding with the inclined surfaces 1a, 3a.
Patent JP-H11287879-A (JP)
Title: Inclination correction device
Inventor: UCHIDA JUNZO
IPC: G12B5/00
Filed: 1998-04-03
Abstract: PROBLEM TO BE SOLVED: To obtain deformation correction of an object to be corrected automatically and accurately with a simple structure. SOLUTION: To an object to be corrected 11, a base stage 10 is placed corresponding to the reference axis, and to this base stage 10, 4 PLZT elements 121 to 124 having different extension quantity according to the reference axis of the object to be corrected 11 are attached and arranged. Light corresponding to the inclination of the base stage 10 is introduced to the PLZT elements 121 to 124 to drive the extension of the PLZT elements 121 to 124 and correct the angle of the stage 10 so as to correct the inclination of the object to be corrected 11.
Patent JP-H07295498-A (JP)
Title: Driver for el element
Inventor: TAMURA TOSHIYA
IPC: H05B44/00
Filed: 1994-04-28
Abstract: PURPOSE:To provide a driver for an EL element which can adjust the brightness in light emission of a plurality of EL elements and especially, can drive individual EL elements with desired brightness in light emission, regardless of the number of EL elements driven. CONSTITUTION:In case of driving an EL element EL1 or an EL element EL2 singly so as to put the brightness in light emission of individual EL elements in desired values regardless of the number of driven EL elements, a capacitor C1 is connected to the output terminals OUT1 and OUT2 of a power circuit 1 so as to be equal to the capacity connected to the output terminals OUT1 and OUT2 of a power source at the time of driving the EL elements EL1 and EL2 at the same time. That is, the frequency of AC voltage is set by adjusting the capacity connected to the output terminals OUT1 and OUT2 of a power circuit 1, according to the number of driven EL elements, whereby the brightness in light emission of the driven EL elements is controlled.
Patent JP-H01264192-A (JP)
Title: Power source for driving magnetron in microwave oven
Inventor: NOGUCHI SHOICHI
IPC: H02M7/04
Filed: 1988-04-15
Abstract: PURPOSE:To improve withstand voltage characteristics at the time of dew condensation by enclosing a capacitor and a diode in a single case for composing a rectifier circuit and sealing it with resin. CONSTITUTION:A high voltage capacitor 50 and a high voltage diode 60 for composing a rectifier circuit part of a power source for driving a magnetron connected with a diode 61 for prohibiting charge and discharge of a through capacitor of the magnetron by means of a connecting part 2 are contained in a case 1, then sealing resin 3 is filled in the case 1 to enclose and seal these high voltage circuit elements in the case 1, and only extended terminals (a), (b), (c) are taken out of the case 1. Direct exposure of these high voltage circuit elements to open air can thus be prevented, and the surface of the elements are prevented from direct dew condensation, thereby withstand voltage characteristics of a power source circuit for driving a magnetron can be improved much.
Patent JP-S59217359-A (JP)
Title: High withstand voltage planar type semiconductor device
Inventor: MIMURA AKIO
IPC: H01L29/73
Filed: 1983-05-26
Abstract: PURPOSE:To make the increase in withstand voltage compatible with the improvement of the reduction of leakage current or the reliability by a method wherein the titled device is so constructed that the main junction is protected by the composite laminated film of an oxide film, a semi-insulation film, and an oxide film, or the composite laminated film of an oxide film, a phosphorus glass film, a semi-insulation film, and an oxide film, and that said main junction is by-passed or bridged by a semi-insulation film. CONSTITUTION:In an example of a thyristor, a p-type emitter 17 is so formed as to expose to the lower main surface of a semiconductor substrate (n-type base 3) to which an n-type emitter 2 exposes, which p-type emitter is extended to the upper main surface through the end of said substrate. In the upper main surface,a channel stop (n<+> type) type diffused layer 5 is formed in the middle between a p-type base 4 and the p-type emitter 17. Besides, thermal oxide films 6A, 6B, a semi-insulation film 12, and a vapor reacted oxide film 13 are successively formed by lamination between the p-type base and the diffused layer 5, and between the diffused layer 5 and the p-type emitter 17. Thereby, the p-type and the diffused layer 5, and the layer 5 and the p-type emitter 17 are bridged by means of the semi-insulation film 12. Accordingly, the increase of withstand voltage can be made compatible with the reduction of leakage curent.