baber/WOPTO huggingface dataset:
Patent JP-S61214543-A (JP)
Title: Gate array
Inventor: KIMURA KENJI
IPC: H01L23/52
Filed: 1985-03-20
Abstract: PURPOSE:To obtain a gate array, according to which the layout can be dividedly designed without reducing the utilization factor of the fundamental cells, by a method wherein the widths of the wiring region, which is used as the wiring region among the divided blocks, are made wider in the vicinity of the center of the chip and are made narrower in the vicinities of the peripheral sides of the chip. CONSTITUTION:A gate array 10 is constituted of a CMOS two-layer metal wiring structure, where fundamental cell columns 1 and wiring channels 2 are alternately aligned in a band shape and input/output-cells 3 are aligned on the peripheral sides of the chip. Four pieces of regions 4 and a cross-shaped wiring region 5 are provided, cells to use the fundamental cells and a wiring are provided on each region 4 and the region 5 is utilized as the metal wiring region among the regions 4. The band regions of the region 5 are made to transpose in the lengthwise and lateral directions on the region 5 and the band widths in the center of the chip are made wider in a stair form than those in the peripheral parts of the chip. As this way is one to coincide with a tendency that the wirings among the regions 4 are generally congested, wirings having little dead space can be constituted, and moreover, wirings can be distributed to the input/output-cell groups 3 as well. According to this gate array, the layout is dividedly designed and the efficiency of the computational technique can be enhanced, and furthermore, the design can be done without reducing the utilization factor of the fundamental cells.
Patent JP-S61216243-A (JP)
Title: Cell
Inventor: TAKAHASHI YUZURU
IPC: H01M4/583
Filed: 1985-03-20
Abstract: PURPOSE:To obtain a very high energy density per unit mass of the positive electrode of a cell, and a high discharge voltage, and to keep it at a high constant value for a long time, by making the positive electrode with a composite of carbonaceous materials adhere and deposit onto a porous electro-conductive carrier. CONSTITUTION:In an organic electrolyte cell consisting of a negative electrode composed of active material of light metals a separator impregnated with organic solvent solution of light metal salts and a positive electrode, the positive electrode is made with a composite of carbonaceous materials adhered and deposited on a porous electro- conductive carrier. There is no special restriction as to the carbonaceous materials to be used, and they are not necessarily pure, and so a carbonaceous material of which carbon content is higher than 90wt% and electro-conductivity is less than 10<6>OMEGAcm is practically used. By making the positive electrode with a composite of carbonaceous materials adhered and deposited on a porous electro-conductive carrier, a very high energy density per unit weight of the positive electrode and a high discharge voltage can be obtained, the high discharge voltage can be kept constant for a long time, and there is no problem concerning public nuisance and recovery of resource, and furthermore it is inexpensive.
Patent JP-2000253203-A (JP)
Title: Image sensor
Inventor: OSATO YOICHI
IPC: H04N1/04
Filed: 1999-03-04
Abstract: PROBLEM TO BE SOLVED: To provide a thin, small and inexpensive image sensor with an organic EL element light source. SOLUTION: In the image sensor, a solid-state image pickup element 10 to which the reflected light of an original 28 is imputed and the reading driving circuit 20 of the solid-state image pickup element 10 are formed on a substrate 1. A thin film organic EL element 30 having a thickness almost equal to the substrate 1 and irradiating the original 28 with line light emission is formed on a transparent substrate 21. The transparent substrate 21 of the thin film organic EL element 30 is fixed to the side of the substrate 1 on a solid-state image pickup element 10 so that the surfaces of both substrates become almost coplanar. Then, a transparent thin plate 32 is integrated on the solid-state image pickup element 10 and the transparent substrate 21 by transparent adhesive 27.
Patent JP-S53141963-A (JP)
Title: Heat-resistant fexible pipe and sprinkler piping laying work using the pipe
Inventor: YAMAMOTO TAKEO
IPC: F16L59/153
Filed: 1977-05-17
Abstract: PURPOSE: To effectively lay down the sprinkler piping which is excellent in durability and reliability by using a heat-resistant flexible pipe not generating corrosion, freezing, etc. 
     COPYRIGHT: (C)1978,JPO&Japio
Patent JP-H05215946-A (JP)
Title: Optical fiber cable
Inventor: KANEKO TAKASHI
IPC: C03C25/24
Filed: 1992-02-06
Abstract: PURPOSE:To enable to reduce a friction coefficient in the case that a polyethylene pipe is used as a pneumatic pipe, to improve wire passage characteristics and to hardly increase the transmission loss of an optical fiber at low temp. CONSTITUTION:The cable has a primary covering layer 4, a secondary covering layer 5 and a tertiary outermost covering layer 6. The outermost covering layer 6 is made from a foamed product of a mixture of a high density polyethylene and a low density polyethylene and the average thickness T is extremely thin such as 0.005mm-0.20mm thick. The secondary covering layer 5 is made from a foamed product of a low density polyethylene.
Patent JP-S62214582-A (JP)
Title: Power supply control circuit
Inventor: KATSURA YASUFUMI
IPC: G11C11/14
Filed: 1986-03-17
Abstract: PURPOSE:To prevent one of two currents arisen from being leaked to a reference circuit by providing the 1st and 2nd transistors (TRs) between two positive/ negative power supplies and the reference circuit. CONSTITUTION:The 1st TR1 and the 2nd TR2 are arranged between the positive power supply +VCC and the negative power supply -VEE of a reference ON- OFF circuit 32 of a function selector. In the circuit above, when both the power supplies VCC, VEE rise, the TR1 is turned on and the TR2 is turned off. Then a TR4 of the reference circuit 33 is turned off, the circuit 33 is operated to attain the normal operating state. Thus, even when one of the two power supplies rise, the leakage to the circuit 33 is prevented with simple constitution.
Patent JP-H11254778-A (JP)
Title: Device and method for printing control
Inventor: HATORI TORU
IPC: G06T11/60
Filed: 1998-03-09
Abstract: PROBLEM TO BE SOLVED: To carry out efficiently the printing control in consideration of after- processing by eliminating the necessity of complicated information control required for the after-processing difference for respective different image forming devices and preventing the layout collapse following the after-processing. SOLUTION: An area affected by the after-processing instructed by a user is computed by an after-processing area obtaining section 24 before an electronic document is spread by outputting into a printer 40, and a printed area of an object constituting the electronic document is computed by a printed image forming section 22. Then whether any section is overlapped or not is judged by comparing the after-processing area with the printed area of the object by an overlap judging section 23, and based on the result, the recovery processing is carried out by a recovery processing section 21, and printing is carried out by utilizing the result of applying the recovery processing.
Patent JP-S51132976-A (JP)
Title: Semiconductor device
Inventor: MIKOME KOUICHI
IPC: H01L27/092
Filed: 1975-05-14
Abstract: PURPOSE:The structure of CMIS-IC is simplified and the degree of its integration is improved by providing a guard ring to also act as a protection diode.
Patent JP-H09244360-A (JP)
Title: Document read-out control system for image forming device
Inventor: SETO TAKESHI
IPC: H04N1/10
Filed: 1996-03-14
Abstract: PROBLEM TO BE SOLVED: To improve a read-out speed for documents when copied. SOLUTION: In reading out, before copying, documents reduced one from the number of copies set by a copy number setting means 6, a document scanning means 1 is set to a fixed document read-out mode, where it is moved along an operation route in the fixed document read-out mode to read out the documents placed on a platen. If a next document detecting means 5 detects the existence of the next document when the document scanning means 1 finally reads out the number of copies set by the copy number setting means 6, the document scanning means 1 is fixed to an operation position in a moving document read-out mode to read out the first one of the next documents to be copied. When the subsequent ... ones are copied, it is controlled to be moved along an operation route in the fixed document read-out mode.
Patent JP-S621028-A (JP)
Inventor: DEEBITSUDO AASAA BUREATON
IPC: G06F13/12
Filed: 1986-03-17
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H01230218-A (JP)
Title: Treating method for terminal of solid-state electrolytic capacitor
Inventor: NIKI MASATOSHI
IPC: H05K3/34
Filed: 1988-03-10
Abstract: PURPOSE:To prevent the yield of cracks at the outer surfaces of bent parts and to prevent breakdown due to vibration, by bending the base parts of protruding anode terminal and cathode terminal in a round pattern. CONSTITUTION:Terminals 2 and 3 protruding from a packaged part 1 are bent downward at the central parts of the terminals at right angles. Auxiliary members 6 are arranged vertically with respect the paper in contact with the packaged part 1. Then the tips of the terminals 2 and 3 are bent along the lower surface of the packaged part 1. Thereafter, the auxiliary members 6 are removed from bent parts 5a and 5b. In this constitution, the terminals 2 and 3 are bent along the outer surfaces of the cylindrical auxiliary members 6. Therefore, cracks due to plastic deformation are hard to occur on the outer surface sides of the bent parts 5a and 5b. Even if the terminals receive vibration after mounting and stress is concentrated to the bent parts 5a and 5b, the terminals are not broken since there is no crack.
Patent JP-H10249714-A (JP)
Title: Polishing device and method, magnetic head and magnetic recording and reproducing device
Inventor: MAETA HIROSHI
IPC: B24B37/12
Filed: 1997-03-12
Abstract: PROBLEM TO BE SOLVED: To improve and stabilize a lap rate by polishing the surface of a work while burying the polishing powder which is included in the grinding stone member to be pressed to an opposite face of the work on a surface plate, into the surface of the surface plate. SOLUTION: A tin board grind stone 7, for example, is pasted on a face opposite to a surface plate 2, of a correction ring 6 installed in a condition that it is pressed to a lap surface plate 1. In the case when a surface of a work 4 is polished by using a lapping device, the work 4 is placed on the surface plate 2, and is pressed by a weight 5, and the surface plate 2 is rotated, while dropping or spraying the working fluid. The surface of the work 4 is polished by the polishing powder buried in a metallic layer 3 on the surface of the surface plate 2 by the rotation. On this occasion, the tin bond grind stone 7 pasted on the correction ring 6 is also worn. Whereby the new polishing powder is buried into the metallic layer 3 on the surface of the surface plate 2.  As mentioned above, the fixed abrasive grain polish working is executed while burying the new polishing powder into the metallic layer on the surface of the surface plate 2.
Patent JP-S59182564-A (JP)
Title: Power transistor
Inventor: SHIMOJIYOU YOSHIHISA
IPC: H01L29/73
Filed: 1983-03-31
Abstract: PURPOSE:To expand an area of safety operation by forming a large number of emitter regions in a base region and mutually connecting each adjacent emitter region by the same impurity diffusion layers as emitters having shallow diffusion length in a semiconductor device of structure in which a p-n junction terminates on the surface of an element. CONSTITUTION:An n<-> type layer 21 as a collector region is grown on an n<+> type Si substrate 22, a p type base layer 1 is formed on the layer 21, a large number of n<++> type emitter regions 12 are diffused and shaped in the layer 1, and the terminals 16' of formed p-n junctions 16 are exposed to the surface of the base layer 1 projecting among the regions 12. Consequently, when planar type npn structure is formed, n<+> type emitter connecting regions 13, which are shallower than the regions 12 and impurity concentration thereof is also low, are shaped previously among the mutually adjacent regions 12. The whole surface is coated with a laminated film consisting of an SiO2 film 17 and an insulating film 18 through a normal method, and windows are bored and an Al electrode 19 being in contact with each region 12 is applied extended onto the laminated film. Accordingly, crystal defects under the regions 12 are reduced.
Patent JP-S62215495-A (JP)
Inventor: KOJIMA MITSUHIRO
IPC: F21V21/36
Filed: 1986-03-16
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H10248704-A (JP)
Title: Water absorbing mat
Inventor: KINOYAMA TAKEHISA
IPC: A47G27/02
Filed: 1997-03-12
Abstract: PROBLEM TO BE SOLVED: To substantially improve water absorptivity in a simple structure by sewing the entire outer peripheral edge in the state where base cloth is folded into two so as to make back surfaces face each other and a space is present between the back surfaces facing each other. SOLUTION: After tufting pile thread 1 to the base cloth 3, an adhesive material 2 is coated on the back surface of the base cloth 3, dried and hardened. Thus, the pile thread 1 is fixed, and in the state where the base cloth 3 is folded into two so as to make the back surfaces face each other and the space 4 is present between the back surfaces facing each other, the outer peripheral edge is sewn together. Relating to this water absorbing mat, when water or oil is stuck to the pile thread 1, the water or the like is moved to the layer of the adhesive material 2 by a capillary phenomenon, passed through it and stored in the space 4. That is, the space 4 functions as the storage space of the water or the like.  Thus, relating to the water absorbing mat, since the water or the like is held not only by the pile thread 1 but also by the space 4, water holding ability and water absorbing performance are improved.
Patent JP-H06275092-A (JP)
Title: Recording and reproducing device
Inventor: MURATA YASUKI
IPC: G11B19/00
Filed: 1993-03-17
Abstract: PURPOSE:To continuously record for a long time without interruption of sound exchanging successively an IC card by storing temporarily sound data in a buffer memory, even if only one connectors of the IC card exists. CONSTITUTION:An audio signal inputted in an audio input section 3 is coded in a audio coding circuit 4 and converted to audio data. This audio data is ordinarily stored in an IC card 2. when remainder capacity of the IC card 2 is reduced, audio data is temporarily stored in a buffer memory 1 incorporated in a storage device. After the IC card 2 is exchanged, audio data temporarily stored in the buffer memory 1 is transferred to a new IC card 2.
Patent JP-2000245490-A (JP)
Title: Preparation of high molecular material apr-3, and preservation of producing strain
Inventor: KURANE RYUICHIRO
IPC: B01D21/01
Filed: 1999-03-04
Abstract: PROBLEM TO BE SOLVED: To obtain high molecular material APR-3 which is excellent in oil separating property and flocculating activity to kaoline, simply in an industrial scale by culturing and accumulating a microorganism having new high molecular material APR-3 productivity in a medium including thiamine. SOLUTION: This high molecular material (APR-3) useful for liquid-waste treatment or flocculating agent in oil pollution environment, oil separating agent or the like is obtained by culturing a microorganism [e.g.; Cellulomonas cellulans KYM-7 strain (FERMOP-11339) or the like] in a medium including thiamine, producing and accumulating APR-3 in the medium. The APR-3 has oil separating property, flocculating activity, having 64±2 wt.% of the saccharide content (measured in phenol. sulfuric acid method), free from amino acid, uronic acid and protein, the molar ratios of the saccharides and organic acid are galactose; 1, glucose; 5.6±0.1, succinic acid; 0.6 ±0.1, pyruvic acid; 2.5±0.1, and the molecular weight >=2×106.
Patent JP-S63223809-A (JP)
Title: Method and device for diagnosing abnormality of plant
Inventor: ONO TOSHIHIKO
IPC: G05B23/02
Filed: 1987-03-12
Abstract: PURPOSE:To diagnose the abnormality of a plant with reduction of an arithmetic load by directly identify the fluctuation of the parameter of a steady model in an on-line system. CONSTITUTION:The fluctuation values of diagnosing parameters are identified in an on-line system by filter parts F1-Ft based on the control input u(K) and the observation value y(K) of a diagnosing system. Based on the fluctuation value of each identified parameter, an abnormality detecting part 3 obtains the deviation value, i.e., the index value showing the parameter fluctuation. This deviation value is compared with the threshold value set previously for detection of the abnormality. The abnormality if detected is displayed at an abnormality occurrence display part 4 and the operation is shifted to an off-line mode. The liklihood calculating parts C1-Ct calculate the liklihood ratio showing the possibility of abnormality for each parameter from the input u(K) and the value y(K) which are cyclically stored in a cyclic memory part 2. An abnormal parameter identifying part 8 decides the parameter corresponding to the calculated maximum liklihood ratio as the abnormality. A diagnosing result display part 9 displays an abnormal parameter and its estimated fluctuation value.
Patent JP-H01231691-A (JP)
Title: Stepping motor
Inventor: SASAKI MASAHIRO
IPC: H02K37/04
Filed: 1988-03-11
Abstract: PURPOSE:To simplify a circuit configuration and to reduce its power loss by incorporating a diode between the source and the drain of a field effect transistor, and connecting a diode in anti-parallel with a chopper transistor. CONSTITUTION:Insulated gate field effect transistors FETs 10a, 10b, 10c, 10d are connected in series with first, second, third and forth windings 2a-2d, respectively. Diodes (P-N junction) are incorporated between the sources and the drains of the FETs 10a-10d. When the FET 10c is turned ON and a transistor 6a is turned OFF, energy is discharged in a closed circuit of the winding 2c, the FET 10c, the built-in diode of the FET 10a and the winding 2a. When the FET 10c is turned OFF, energy is discharged in a closed circuit of the winding 2a, a diode D1, a power source 1, a diode D3 and the built-in diode of the FET 10a.
Patent JP-S58175652-A (JP)
Inventor: KURASAWA TOSHIAKI
IPC: A41D31/02
Filed: 1982-04-07
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-2000246446-A (JP)
Title: Method of preventing spatter deposit in welding torch
Inventor: HONDA DAIZO
IPC: B23K9/32
Filed: 1999-03-05
Abstract: PROBLEM TO BE SOLVED: To easily apply a spatter deposit preventive liquid during the idle time of a welding torch by mixing the liquid in mist form in the blow air and making this mixed air act on the inside of the torch nozzle and the contact tip. SOLUTION: A shielding gas passage 7 is communicated with a gas injecting passage 9 inside the nozzle through an orifice member 8 which is mounted on the tip end of a tip body 2. A blow air passage 10 is formed on the outer circumferential face of the tip body 2, the base end of the blow air passage 10 is communicated with the gas injecting passage 9. The blow air supplied to its introducing passage 11 which is formed in the blow air feed block 3, is a gas-liquid mixed air in which a spatter deposit preventive liquid is mixed in a high pressure air in mist form. This mixed air is supplied from the blow air passage 10 to the gas injecting passage 9 inside the nozzle, atomizing and applying the spatter deposit preventive liquid on the inner circumferential face of the nozzle 6 and on the outer periphery of the contact tip 4.
Patent JP-S54148871-A (JP)
Title: Production of door panel
Inventor: TAKENAKA SEISUKE
IPC: B32B37/00
Filed: 1978-05-15
Abstract: PURPOSE: To produce a door panel having unevenness on its surface while a process of its production being abbreviated, by putting a surface material on a core material with an adhesive laid between them and a decorative sheet on the surface material with an adhesive placed between them, followed by evacuating the space between the surface materials from the core part.  
     CONSTITUTION: A rubber adhesive is applied to the inner surface of the surface material 2 made by boring holes for evacuation through a steel plate on its whole surface and the plastic decorative sheets 3 and 3 coated with an adhesive are placed on the outer surfaces of the surface materials 2 and 2. The resulting materials are put between the heating device 7, and evacuated by the suction pipe 8 connected with a vacuum pump, etc. inserted between the surface materials 2 and 2. The surface material 2 and 2 are applied to the both sides of the core material 1 by the suction force. A door pannel wherein the surface materials 2 and 2 are applied to the both sides of the core material 1 and the decorative sheets 3 and 3 are stuck on the both surface materials 2 and 2 by vacuum molding can be obtained. 
     COPYRIGHT: (C)1979,JPO&Japio
Patent JP-H10256603-A (JP)
Title: Electrode of nitride compound semiconductor and semiconductor device
Inventor: NOMURA YASUHIKO
IPC: H01L33/32
Filed: 1997-03-12
Abstract: PROBLEM TO BE SOLVED: To obtain a strong adhesion to a semiconductor film by making the electrode of a nitride compound semiconductor out of a metallic nitride. SOLUTION: A metallic nitride is chosen out of Ti, Zr, Hf, V, Nb, Ta, Cr, Mo, and W. Besides, a nitride compound semiconductor is chosen out of Ga, In, Al, GaIn, GaIl, InAl, and GaInAl. An n electrode 7 is formed on the exposed- by-mesa-etching surface of a p-type GaN layer 3. And a p electrode 8 is formed on a p-type GaN layer 6. Since the metal nitride has a low specific resistance and is usable as an electrode, and both the nitride compound semiconductor and the electrode contain nitrogen in common, it bocomes possible to increase the adhesive force of the electrode to the nitride compound semiconductor.
Patent JP-S56155340-A (JP)
Title: Solar energy collector
Inventor: BENNO JIYUNICHI
IPC: F24J2/04
Filed: 1980-04-30
Abstract: PURPOSE: To make a solar energy collector light, to obviate leakage or freezing of water, and to improve the safety and reliability by employing air as a heat medium.  
     CONSTITUTION: A solar energy collecting plate 1 has spaces comprising a plurality of air passing holes 14, and adjacent holes 14 of them are communicative. The solar energy collecting plate 1, for instance, is arranged on a substrate 12 of a roof 7, and thereon a roofing 13 laid. In this arrangement, the solar energy collecting plate 1 together with a hot air supplying pipe 6, a hot water reservoir 3, and a cold air supplying pipe 2 are connected to complete a closed circuit, and by the operation of a blower 11 air is circulated through the closed circuit. The end of the hot air supplying pipe 6 connected to the hot water reservoir 3 has a plurality of holes 15 through which the hot air is released into the water in the reservoir 3 to heat the water. 
     COPYRIGHT: (C)1981,JPO&Japio