Patent GB-827008-A (GB)
Title: Improvements in or relating to railway signalling systems
Inventor: ATKINSON GEORGE GEOFFREY
IPC: B61L7/08
Filed: 1957-02-04
Abstract: 827,008. Electric remote control and indicating systems. METROPOLITAN - VICKERS ELECTRICAL CO. Ltd. Feb. 4, 1958 [Feb. 4, 1957], No. 3778/57. Class 40 (1). An electronic remote control and indication data transmission system in which transmitters and receivers operate synchronously comprises means for detecting a change in said data and means for generating a serial pulse train in response to said change, a portion of the train representing data from a particular transmitter, including the changed data, and another portion consisting of receiver station identifying signals. The system described employs V.F.T. (voice frequency telegraph) equipment and uses a four-wire communication system (two out and two return wires), a frame of binary digital information comprising sixteen " slots " (digit periods), slots 1-4 defining an address, slot 5 being a parity digit which is 0 or 1 to make the sum of the first five digits odd, slots 6-13 containing information and slot 14 being a second parity digit slots 15-16 being unfilled. Transmitter, Fig. 11.-The transmitter shown is situated at the control office and comprises control switches divided among sixteen " address groups " each group corresponding to the equipment at a particular field station or to a particular group of controlled equipment at such a station. Only one address group 22, corresponding to control pulse time A1, is shown. Clock pulses from a source 55 are transmitted after division by two at a stage 56 and also cause a counting chain 54 to apply pulses A1, A2 . . . A16 successively to the various address groups. Assuming that the control switch 18 is in the position shown, a binary counter 15 keeps the potentials on lines 82, 83 as " UP," " DOWN " respectively, so that the potential of lines 81 and 77 is " UP." The A1 pulse therefore does not open a gate 12. If the position of the switch 18 has been changed over, however, the line 81 will be " DOWN " so that the A1 pulse opens the gate 12, the potentials on lines 82, 83 being reversed at time P4 by a pulse applied to " AND " gate 16 which changes over the counter 15. A line 37 therefore becomes " DOWN " to change over a bi-stable stage 50, the outputs from which change over the supply of clock pulses from the " A " counting chain 54 to a " P " counting chain 45 which produces P1-P16 pulses until the stage 50 is restored, which occurs after a signal over a line 99 from the remote station during period P15 to restore the stage 38 and hence the stage 50. Connections to an " OR " gate 9 carry pulses during periods P1-P5 for the remote address and parity digit associated with address group 22, a " DOWN " output on a line 78 effecting transmission of a pulse for the duration of the " Down " state. If any of the control switches such as 18 have been switched over, the gates such as 1 are opened during periods P6- P13 to transmit a timed pulse. The " 1 "s transmitted are counted by a counter 27 so that at time P14 a gate 28 is opened to send the appropriate parity digit. Thus the control signals transmitted in periods P6-P13 will be " 1 "s or "0 "s depending on the state of the counters such as 15. Incorrect reception. If no signal indicating correct reception has been received over the line 99, the transmission cycle is repeated, but after three transmissions of identical frames as counted by stages 58, 60 an alarm relay 66 is actuated. Receiver, Fig. 5.-Clock and data signals are transmitted by modulation of different frequencies, receiving units 2 and 3 respectively being provided therefor. A strobe generator 14 is adapted initially to reset a " P " counting chain 6, address decoding stages such as 53, temporary data decoding stages such as 23 and binary counters 29, 30 so that outputs 31, 32 are " UP." Strobe generators 59, 63 are adapted to step on the counting chain 6 in response to the leading and trailing edges of received clock pulses, so that the " P " chain 6 is stepped synchronously with that of the transmitter. The data input is fed to an inverter 16 whose output is sampled at times corresponding to the midposition of each digit by an " AND " gate 18, the sampling pulses being obtained from the clock signals. The outputs from the four address decoding bi-stable stages such as 53 are fed to a diode matrix decoder 73 to produce a " DOWN " state on one particular lead out of sixteen, one of the leads being connected to an " AND " gate 40 in a storage unit 49 corresponding to the associated address. Eight bistable stages such as 23 are arranged to be fed during pulse times P6-P13 with the sampled data which is temporarily stored until the parity check has been made. Binary counting stages 30 and 29 respond to the " 1 "s in periods P1-P5 and P1-P14 and are left with outputs 32, 31 " DOWN " if the number of " 1 "s is odd so that a gate 38 is opened only if both counts are correct. At time P15 a gate 37 is opened to pass a strobe pulse to enable the gate 40, only if the parity check is correct. The gate 40 opens gates such as 43, 44 which are fed also with the outputs of the temporary storage stages such as 23 to transfer the data to final storage stages such as 42, which have relays such as 47 in their outputs. The parity check stages 29, 30 also feed an " AND " gate 80 which sends a " correct " signal back to the transmitter during time P15. Operating arrangement, Fig. 6.-If all or some of the transmitters in a system use the same frequency, there is provided at each station 10-13 a receiver 9 adapted to inhibit its associated transmitter should it detect transmission from any other field station, the field stations each having an associated different time delay T1- T4 before they reply on the receipt of a clear line to obviate simultaneous commencement of transmission. A logical circuit of a station embodying delay means if described (Fig. 8, not shown). In a modification (Fig. 9, not shown), a clock signal is generated locally in the receiver.