baber/WOPTO huggingface dataset:
Patent EP-0433936-A2 (EP)
Inventor: LAPACK MARK A
IPC: B01D53/22
Filed: 1990-12-17
Abstract: A combination of a membrane (18), such as a silicone rubber membrane, and a valve (11) having a chamber (13) within it, such as a solenoid valve. The present invention is suitable, for example, for use with a mass spectrometer. The membrane partitions the chamber into a first chamber portion and a second chamber portion. The valve has at least three passageways (15, 16, 17) into it. The first two passageways (15, 16) lead to the first chamber portion. The third passageway (17) leads to the second chamber portion. A solenoid plunger (25) located within the chamber is used to close off the third passageway (17) when desired. When used with a mass spectrometer, the third passageway (17) is connected to the vacuum inlet of the mass spectrometer and a sample is flowed into and out of the first chamber portion via the first two passageways (15, 16). A component of interest in the sample can permeate across the membrane into the second chamber portion and can flow via the third passageway to the mass spectrometer.
Patent EP-0391503-A2 (EP)
Inventor: YOSHIHAMA MAKOTO
IPC: C12P33/12
Filed: 1988-02-05
Abstract: 7β-hydroxy-4-pregnene-3,20-dione derivatives are prepared by use of  Acremonium sp.   
     The group of these compounds has possibility of being utilized as an intermediate for the synthesis of progesterone derivatives having ovulation-inhibiting activity. These compounds themselves have also cell differentiaition activity for Ml cells.
Patent EP-0382472-A2 (EP)
Inventor: KIRST HERBERT ANDREW
IPC: A61P31/04
Filed: 1990-02-06
Abstract: Novel 12-membered lactone and 11-membered lactone derivatives of erythromycin of formula (A), having antimicrobial activity against certain Gram-positive pathogens such as Streptococcus pyogenes and Gram-negative cocci such as Haemophilus influenzae, and useful as intermediates to other macrolide derivatives, are disclosed. 
wherein 
R is a) 
or b) acetyl; 
R¹ is hydrogen or C₁-C₅-alkanoyl; 
R² is -N(CH₃)₂ or -N(CH₃)₂→O and either a) R⁵ and R⁶ taken together form a bond, and R³ and R⁴ are 1) either both hydroxyl or 2) taken together form a bond; 
or 
b) each of R³ and R⁵ taken together and R⁴ and R⁶ taken together form a keto group; 
R⁷ is hydrogen or methyl; and 
R⁸ is hydrogen or hydroxyl; 
provided that, 1) when R is an (a) group and R² is -N(CH₃)₂, both R³ and R⁴ together and R⁵ and R⁶ together cannot form a bond; and 2) when R⁷ is methyl, R⁸ must be hydrogen; or a salt thereof.
Patent EP-0405896-A2 (EP)
Inventor: YAMAGATA KENJI C O CANON KABUS
IPC: C30B25/18
Filed: 1990-06-25
Abstract: A process of growing a monocrystal on an insulating film provided on a metal electrode, which comprises: providing a semiconductor film on a substrate having a metal electrode and an insulating film; causing the semiconductor film and the insulating film to undergo the solid phase reaction at the interface therebetween; forming a monocrystalline cohering body of the semiconductor film at the opening of the insulating film by applying annealing for cohesion of the semiconductor film on the metal electrode; and allowing a monocrystal to grow with the monocrystalline cohering body as a seed. 
     A process of growing a semiconductor monocrystal on an insulating film having an opening provided on a metal electrode, which comprises: providing a non-­monocrystalline semiconductor thin film so as to cover over a substrate having the insulating film and a metal electrode surface exposed from the opening of the insulating film with a thickness which is thinner than that of the insulating film; annealing the semiconductor thin film to effect the solid phase reaction between the insulating film and the semiconductor film, thereby removing only the semiconductor thin film existing on the insulating film, and also allowing the semiconductor thin film on   the metal electrode to cohere so that a monocrystallized cohering body is formed; and permitting a monocrystal to grow with the cohering body as a seed. 
     A process of growing a monocrystal on an insulating film provided on a metal electrode, which comprises: providing a semiconductor film which is non-­monocrystalline and subjected to patterning, on the insulating film of a substrate having the metal electrode and the insulating film; annealing the semiconductor film to effect the solid phase reaction between the semiconductor film and the insulating film, thereby removing the insulating film at the portion where the semiconductor film subjected to patterning is provided, and effecting cohesion of the semiconductor film on the metal electrode to form an monocrystallized cohering body; and permitting a mono crystal to grow with the cohering body as a seed.
Patent EP-0411915-A2 (EP)
Inventor: NAGATA YUJI
IPC: G11B5/31
Filed: 1990-07-31
Abstract: There is disclosed a thin film magnetic head which requires less recording current, and is capable of recording and reproducing with a high sensitivity. To achieve this magnetic head, a third yoke (15,21) of a high permeability is bridged across a notched portion of a second yoke (12) between front (10) and back (11) portions of the second yoke constituting part of a magnetic circuit. With this construction, the third yoke serves to extremely reduce a magnetic resistance between the front and back portions of the second yoke, so that the record­ing current can be smaller, thereby enhancing the recording efficiency.
Patent EP-0424086-A2 (EP)
Inventor: TANIGUCHI TAKASHI
IPC: G06F7/02
Filed: 1990-10-16
Abstract: An approximate solution Ya of a function F with respect to a given value X is derived by referring to a relation Y=F(X) at an accuracy at which an error between the approximate solution Ya and an infinitely precise solution Y is smaller than a weight of a digit in a place lower than a lowest place of significant digits for a final solution by two places. The approximate solution Ya is rounded to an interim solution Yr equal to one of possible interim solutions which is closest to the approximate solution Ya. A value Xr is derived from the interim solution Yr and an inverse function F⁻¹ by referring to a relation Xr=F⁻¹(Yr). A sticky digit S is set to 0, 1, or -1 in response to the relation between the magnitudes of the values X and Xr and other information. The sticky digit S is added to a place immediately lower than a lowest place of the interim solution Yr. A result of this addition is rounded in a designated rounding mode to obtain the final solution.
Patent EP-0428391-A2 (EP)
Inventor: HORI OSAMU C O INTELLECTUAL PR
IPC: G06T11/00
Filed: 1990-11-13
Abstract: A method of beautificating a graphic pattern approximated by line segments divided by knots, includes the step (H) of moving each knot under a predetermined limited condition, the step (G) of obtaining a quality evaluation value for the graphic pattern corresponding to the moved knot, and the step (I) of obtaining a graphic pattern which corresponds to the moved knot and has a largest quality evaluation value as a beautifi­cated graphic pattern. For all combinations of movable knots, quality evaluation values of graphic patterns corresponding to the moved knots are obtained and are compared with each other to obtain a graphic pattern having the largest quality evaluation value. Alternatively, quality evaluation values of graphic patterns are obtained upon sequential movement of the knots, and a graphic pattern having the largest quality evaluation value is obtained while sequentially selecting the moved knots corresponding to higher quality evaluation values. This invention provides a method and apparatus for beautificating line drawings.
Patent EP-0435601-A2 (EP)
Inventor: ROBERTSON GEORGE G
IPC: G06F3/048
Filed: 1990-12-21
Abstract: A processor presents a sequence of images of a hierarchical structure that is perceived as three-dimensional. The hierarchical structure includes conic substructures (12, 14, 16, 18, 20) that can have vertical or horizontal axes. Each cone (12, 14, 16, 18, 20) has a parent node at its vertex and children nodes along its base, each with a link to the parent node. Each child can in turn be at the vertex of another cone. The cones (12, 14, 16, 18, 20) can be rotated in steps that produce the perception of object constancy for each node. For example, if the user requests that an indicated node be moved to a primary viewing position, each of the cones along the path from the indicated node to the root node is rotated in the direction that most directly moves the indicated node to the primary viewing position. Each node can include a selectable unit for indicating it, and a node can also include a grow tab that can be selected to request presentation of its children nodes and links to them. The user can request that the children nodes of a node be replaced by a grow tab. To reduce the computation necessary for each step of rotation, the position relative to a cone's axis for each of 80 points on the base of a cone (12, 14, 16, 18, 20) is computed for a level of the hierarchy and is then stored in an array for subsequent use in positioning nodes on that level. The base point (52) of each node on a rotating cone can then be changed in a linked node data structure, and its new position can then be obtained by simple arithmetic operations using the axis coordinates and the appropriate data from the array. The base of each array can be a polygon whose vertices are nodes, and the base shape can be presented as a shadow to provide additional information and strengthen the perception of three dimensions, or, the profiles of the cones can be presented as a shadow.
Patent EP-0424301-A2 (EP)
Inventor: AICHELMANN FREDRICK JOHN JR
IPC: G11C29/00
Filed: 1990-09-04
Abstract: A system for refreshing and scrubbing data contained in a DRAM during each and every refresh cycle is disclosed. Briefly stated, a standard refresh address counter has its bit length extended with the result that the-extended bits are used as a column address which when used with a conventional row address during a refresh cycle are used to select memory locations which are refreshed and scrubbed while adjacent memory locations are refreshed only. The read/write enable lead is deactivated during the refresh cycle. The DRAM is in effect forced into performing a read operation with the result that data is refreshed and scrubbed contemporaneously as normally done during a read or write.
Patent EP-0439025-A2 (EP)
Inventor: LAAKSO PAMELA S
IPC: G06F12/08
Filed: 1991-01-10
Abstract: A data processing system (10) is provided having a secondary cache (34) for performing a deferred cache load. The data processing system (10) has a pipelined integer unit (12) which uses an instruction prefetch unit (IPU) (12). The (IPU) (12) issues prefetch requests to a cache controller (22) and transfers a prefetch address to a cache address memory management unit (CAMMU) (24), for translation into a corresponding physical address. The physical address is compared with the indexed entries in a primary cache (26), and compared with the physical address corresponding to the single cache line stored in the secondary cache (34). When a prefetch miss occurs in both the primary (26) and the secondary cache (34), the cache controller (22) issues a bus transfer request to retrieve the requested cache line from an external memory (20). While a bus controller (16) performs the bus transfer, the cache controller (22) loads the primary cache (26) with the cache line currently stored in the secondary cache (34).
Patent EP-0444637-A2 (EP)
Inventor: BANKAR VILAS GAJANA
IPC: D02G3/24
Filed: 1991-02-27
Abstract: This invention relates to a process for combining a low melting binder fiber (17) with a continuous filament base yarn (11) to form a composite yarn (20) having good bulk and a high level of interlace. More particularly, the process involves bulking a continuous filament yarn (11), combining it with the low-melting binder fiber (17), interlacing the combined yarn, and then fixing the interlace.
Patent EP-0458049-A2 (EP)
Inventor: JUERGENS WOLFRAM
IPC: F16L9/16
Filed: 1991-04-10
Abstract: A hollow body for conveying fluids, in particular sound absorbers, filters or the like, with essentially oval or circular cross-section over its longitudinal extent, with an outer pipe made of metal (21) which is formed by sheet metal strips (10) which are wound helically and interconnected at their abutting outer edges by folds (11), is characterised in that the outer pipe (21) is designed with at least two walls and is made by joint helical winding and folding (11) of a number of endless sheet metal strips (10) of identical width, which corresponds to the number of outer pipe walls; a process for manufacturing such hollow bodies and their applications are also described. <IMAGE>
Patent EP-0459397-A2 (EP)
Inventor: MIYASHITA NAOTO
IPC: H01L21/762
Filed: 1991-05-28
Abstract: A device-isolating trench (28) having a taper at its upper portion is formed in a silicon semiconductor substrate (22). Then, a silicon oxide film (32) is formed on the inner wall of the trench (28) and the surface of the semiconductor substrate (22) near the trench (28) by an oxidizing method, and polycrystalline silicon (33) is buried in the trench (28).
Patent EP-0470462-A2 (EP)
Inventor: BAASNER BERND DR
IPC: C07C45/40
Filed: 1991-07-27
Abstract: Halogenated methylketones are prepared from nitro compounds by treating the latter in alcoholic solution with sodium or potassium alkoxide solution, cooling to a temperature in the range -10 to -100 DEG C and then allowing the mixture to react at -10 to -100 DEG C with ozone. The process is particularly suitable for the preparation of 1,1,1-trifluoroacetone from 1,1,1-trifluoro-2-nitropropane.
Patent EP-0470519-A2 (EP)
Inventor: WIGNOT LEROY SAMUEL
IPC: H04N5/44
Filed: 1991-08-02
Abstract: 5 A television receiver includes a single tuner (102) for tuning both television channels and broadcast FM stations. The tuner (102) is operated at a fixed gain setting in FM reception mode. The tuner (102) serves as the first conversion stage of a double conversion FM receiver, wherein the mixer (180) of an FM radio integrated circuit serves as the second conversion stage. The arrangement operates at a specific and non-arbitrary first IF frequency. The FM receiver is also capable of automatically receiving National Weather Service broadcasts on that one of NWS's seven allocated frequencies which is operating in a listener's area. The receiver provides an on-screen display of the currently tuned FM channel number.
Patent EP-0483501-A2 (EP)
Inventor: GROELLMANN PETER DIPL-ING
IPC: G01C19/72
Filed: 1991-09-18
Abstract: The fibre-optic Sagnac interferometer for rotation rate measurement has a light source keyed ON and OFF at predetermined intervals, whereby, after filtering of the read-out signal during demodulation, a substantially lower carrier signal for the read-out signal and thereby correspondingly fewer demodulator requirements can be achieved. According to the invention, a closed-loop configuration is proposed, in conjunction with a scale factor control circuit for rotation rate sensors with light sources keyed in such a way. The invention is particularly suitable for fibre-optic rotation rate sensors with short sensor coil fibre length. …<IMAGE>…
Patent EP-0486931-A2 (EP)
Inventor: BIANCHI ALESSANDRO
IPC: H04B10/272
Filed: 1991-11-13
Abstract: In an optical communication system with a passive star coupler, the measurement should not interfere with the operation of other stations. 
     Distance measurement by determining the echo delay. 
     Use other wavelength. 
     System using combined wavelength- and time-division multiplexing. One wavelength is always kept free for measurements if possible. For the measurement, the same data format as that employed during normal operation can be used. 
     Measurement can be continuously repeated unchanged during operation.
Patent EP-0472230-A2 (EP)
Inventor: WEIL EDWARD D
IPC: C08L101/00
Filed: 1991-07-30
Abstract: A flame retardant polyamide composition including flame retardant effective amounts of (a) an iron compound and (b) a char forming thermoplastic polymer having aromatic groups in the backbone. A char stabilizing compound (c) may also be present. In a preferred embodiment (b) is a polyphenylene ether. In a preferred embodiment, (c) is anhydrous zinc borate or a wollastonite.
Patent EP-0472268-A2 (EP)
Inventor: EDWARDS CHARLES O
IPC: C08J7/04
Filed: 1991-06-03
Abstract: A glass run channel composite (1) of the type utilised in vehicle applications for sealing against window glass, includes a cured elastomeric substrate (2) having one or more sealing surfaces, and a polyolefin compound having a low melt index and a high density, and optionally containing a softening compound and other additives. The polyolefin compound is solvent-free and substantially melted when contacted with the sealing surfaces of the elastomeric substrate prior to cure, and upon cure of the elastomeric substrate, the polyolefin compound adheres to the substrate and provides a solid, low-friction abrasion-resistant coating (5) on the sealing surfaces of the substrate for sealing against a window introduced into the glass run channel.
Patent EP-0462794-A2 (EP)
Inventor: PAREKH RAJESH BHIKHU
IPC: G01N35/00
Filed: 1991-06-18
Abstract: An instrument capable of automatically releasing and isolating saccharides from glycoconjugates. 
     The instrument carries out all the necessary process steps, including bringing together all the required reagents with the sample, heating the sample in the presence of the reagents for the required time and at the required temperature, passing the resultant mixtures through chromatographic columns and delivering the separated material to a collection point, which can be a remote collection point. 
     The instrument is capable of performing this release and separation on two samples of glycoconjugate simultaneously, even when the samples are of different glycoconjugates requiring different processing parameters. In doing this the material of one sample does not mix with or otherwise contaminate the material of the other sample.
Patent EP-0484125-A2 (EP)
Inventor: RICHARDS CHARLES N
IPC: B23K9/028
Filed: 1991-10-30
Abstract: An orbital welding apparatus comprises a modular weld head unit (B) whose weld head (52) includes an annular rotor (98) carrying a welding electrode (126) for rotation about an axis for welding abutting ends of tubular members positioned in alignment on the axis. A drive assembly (A) for driving the rotor includes a motor unit (18) carried in a separate modular housing (10) for ready manual connection to and disconnection from the weld head unit (B). In the preferred form, a transmission module is connected with the motor unit and connects to the weld head unit by a flexible drive shaft assembly (54) to allow the motor unit to have substantially any desired orientation relative to the weld head (52). A separate clamping assembly (C) is received in the weld head (52) for holding the tubular members relative to the weld head (52).
Patent EP-0489514-A2 (EP)
Inventor: HENNING MICHAEL LAURENCE
IPC: G01H9/00
Filed: 1991-11-18
Abstract: An optical fibre coil assembly comprising two optically interconnected optical fibre coils or coil parts (22,23) rigidly supported in predetermined positional relationship by respective rigid support means so constructed and arranged that static or quasi-static pressure (P) applied to the assembly produces a decrease in the path length of one of the coils or coil parts, and an increase in the path length of the other.
Patent EP-0490504-A2 (EP)
Inventor: FISHER DAVID ANTHONEY
IPC: H04L25/49
Filed: 1991-11-20
Abstract: A digital data transmission system wherein binary coded data to be transmitted over the system is converted into a five-level (penternary or quinternary) line code prior to transmission over the system and is reconverted to binary data after transmission over the system. The choice of penternary word is conditional on the previous penternary word.
Patent EP-0465328-A2 (EP)
Inventor: SITES RICHARD L
IPC: G06F9/318
Filed: 1991-06-28
Abstract: A high-performance CPU of the RISC (reduced instruction set) type employs a standardized, fixed instruction size, and permits only simplified memory access data width and addressing modes. The instruction set is limited to register-to-register operations and register load/store operations. Byte manipulation instructions, included to permit use of previously-established data structures, include the facility for doing in-register byte extract, insert and masking, along with non-aligned load and store instructions. The provision of load/locked and store/conditional instructions permits the implementation of atomic byte writes. By providing a conditional move instruction, many short branches can be eliminated altogether. A conditional move instruction tests a register and moves a second register to a third if the condition is met; this function can be substituted for short branches and thus maintain the sequentiality of the instruction stream. Performance can be speeded up by predicting the target of a branch and prefetching the new instruction based upon this prediction; a branch prediction rule is followed that requires all forward branches to be predicted not-taken and all backward branches (as is common for loops) to be predicted as taken. Another performance improvement makes use of unused bits in the standard-sized instruction to provide a hint of the expected target address for jump and jump to subroutine instructions or the like. The target can thus be prefetched before the actual address has been calculated and placed in a register. In addition, the unused displacement part of the jump instruction can contain a field to define the actual type of jump, i.e., jump, jump to subroutine, return from subroutine, and thus place a predicted target address in a stack to allow prefetching before the instruction has been executed. The processor can employ a variable memory page size, so that the entries in a translation buffer for implementing virtual addressing can be optimally used. A granularity hint is added to the page table entry to define the page size for this entry. An additional feature is the addition of a prefetch instruction which serves to move a block of data to a faster-access cache in the memory hierarchy before the data block is to be used.
Patent EP-0465406-A2 (EP)
Inventor: SEILER NIKLAUS
IPC: F23G5/00
Filed: 1991-06-04
Abstract: During the continuous melting, heterogeneous solid or viscous residues are first heated to a preheating temperature (T1) in a preheating and fractionation stage (4), volatile components being expelled and being fed as a waste gas (8) for further treatment, then heated (T2) at least to the flow temperature in a melting stage (10) and thereafter brought to an inert solid final state by cooling. A small melt volume and a short residence time (t2) in the melting stage (10) are thus achieved. This ensures better conversion of the residues into an inert state and optimally controllable fractionation of all material components. <IMAGE>