Patent GB-1276270-A (GB)
Title: Cumulative enhancement signal processor
Inventor: BROWN BUCK CHRISTIAN
IPC: G01S7/28
Filed: 1970-05-12
Abstract: 1276270 Pulse radar and the like PRESEARCH Inc 12 May 1970 22945/70 Heading H4D In an arrangement for enhancing repetitive, similar signals which exist briefly during each of several repetition periods in an input signal containing noise, an average value #N n  of the input signal during the complete n the repetition period and the average value N ni  of the input signal during i time increments ('bins') in each of the n repetition periods are determined; the average N n  is then subtracted from each of the N ni  averages to afford a residual signal R and the procedure is repeated for each repetition interval (e.g. residue R 31  = N 31 -N 3 +R 21 ). Since the total energy in bins containing the repetitive signal is practically always greater than that in bins with noise alone, the presence of the repetitive signal is detected by accumulating the residual signals, Fig. 2 (not shown). In an embodiment a ring counter 32 provides a number Q + 1 of time increment signals. Simultaneously, the desired signal plus associated noise is applied to Q number of sample and hold circuits 34-40 characterized in that the leading edge of a time increment pulse from the ring counter 32 immediately destroys all information which may be stored in the sample and hold unit. In addition, each sample and hold unit integrates the input signal for the duration of the pulse it receives from ring counter 32. This integral is then held by the sample and hold units until another time increment pulse is received from the ring counter 32. Thus, the input sample and hold units 34-40 are each utilized to obtain an integral value of a different increment of the input signal, there being Q increments. The outputs from each of the sample and hold circuits 34-40 are then added and the sum is multiplied by 1/Q by operational amplifier 42. Thus, an average value N of the input signal exists at the output of operational amplifier 42 and is directed to sample and hold circuit 44 where the average signal value is stored at a time corresponding to a ring counter pulse of Q + 1. The ring counter pulse at time Q + 1, which is provided on output line 46 of the ring counter 32, is delayed twice by delays 48 and 50 to provide additional data processing intervals. The first delayed interval provided by delay 48 enables the storing of current information while the second delay 50 enables the storing of information from the previous data gathering interval. The outputs from sample and hold circuits 34- 40 are added at the inputs 54-60 of operational amplifiers 64-70, respectively. The average value of the input signal as provided from the sample and hold circuit 44 is simultaneously subtracted at inputs 74-80 of operational amplifiers 64-70, respectively. At the same time, signals from the previous trace which have already been processed by the amplifiers 64-70 are added at amplifier inputs 84-90 of amplifiers 64-70, respectively. As a result, the outputs of the operational amplifiers 64/70 represent the average of the input signal for each time increment minus the average of the entire input signal during the repetition interval plus the signals in each time increment which have accumulated from prior operations of the amplifiers 64-70. The outputs of these amplifiers are then stored in sample and hold circuits 92-98 and represent the results of current processing. The next set of sample and hold circuits 102- 108 are driven by the second delayed Q + 1 pulse from ring counter 32 and are updated to current processing after the delay provided by delay 50. Thus, the sample and hold circuits 102-108 are up-dated to store the most recent accumulation of signals for each respective time increment upon the occurrence of each delayed Q + 1 pulse from ring counter 32, and these sample and hold circuits store the information for display and for successive processing by amplifiers 64-70, respectively. One data presentation uses a storage oscilloscope 110. The processed data present in sample and hold circuits 102-108 is presented sequentially as a function of time to provide a display as represented by the output waveforms, Fig. 2 (not shown). Appropriate sequencing is obtained by commutating the outputs of sample and hold circuits 102-108 with gates 112-118, respectively, that are driven by ring counter 32. The gate outputs are connected in parallel and are coupled to the vertical input of display or oscilloscope 110. A horizontal input 120 provides a time sweep voltage that is produced by digitally counting pulses from timer 30 by means of a binary counter 122. The output of the counter 122 is then converted to an analogue voltage by means of digital-to-analogue converter 124.