baber/WOPTO huggingface dataset:
Patent TW-539773-B (TW)
Title: The palladium-removing solution and the removing process
Inventor: KONDO OSAMU
IPC: H05K3/18
Filed: 2001-07-26
Granted: 2003-07-01
Abstract: The present invention is the pallladium-removing solution characterized by containing (a) the nitrate, (b) the water-solvent which can dissolute pallladium oxide in water, (c) water. The pallladium-removing solution further contains (d) the wetting agent and/or (e) the chelating agent. The pallladium-removing solution of the present does not result in eroding the copper routing, and roughing on the surface of the insulating substrate, as well as removes the residual pallladium on the insulating substrate to increase the insulating ability of the circuit pattern.
Patent TW-506129-B (TW)
Title: Semiconductor device
Inventor: IWASAKI TOMIO
IPC: H01L29/788
Filed: 2001-08-02
Granted: 2002-10-11
Abstract: A semiconductor device has a gate dielectric film formed of zirconium oxide or hafnium oxide as a chief material and a gate electrode film in contact with the gate dielectric film on one principal surface side of a silicon substrate. The gate dielectric film contains an addition element to prevent diffusion of oxygen.
Patent TW-553962-B (TW)
Title: Graft copolymer pigment dispersants
Inventor: MA SHEAU-HWA
IPC: C09D7/45
Filed: 2001-08-03
Granted: 2003-09-21
Abstract: A polymer dispersant for pigments based on an acrylic graft copolymer wherein the graft copolymer has a weight average molecular weight of 3,000-100,000 and comprises a polymeric backbone and macromonomer side chains attached to the backbone, wherein (1) the polymeric backbone is formed of polymerized ethylenically unsaturated monomers and (2) the side chains are macromonomers that are attached to the backbone at a single terminal point and are formed from polymerized ethylenically unsaturated monomers and have a weight average molecular weight of about 1,000-30,000 wherein the graft copolymer contains about 2 to 70% by weight, based on the weight of the graft copolymer, of polymerized ethylenically unsaturated monomers containing acetoacetate groups that are polymerized into the backbone, side chains, or both, and the acetoacetate groups are reacted with a primary amine to form a pendant acetoacetyl amine group on the graft copolymer which serves as the pigment anchoring group. These materials are effective in dispersing and stabilizing a wide range of pigments in solvent based systems and are particularly useful in forming pigment dispersions that are used in a variety of solvent borne coating compositions for automobiles and trucks, where they provide improved efficiency of pigment use, lower paint viscosity, and reduced emission of volatile organic solvent.
Patent TW-567107-B (TW)
Title: Device and method for low-deformation precision welding of 0.2 to 0.5 mm thin sheets
Inventor: LIN SUNG-LING
IPC: B23K26/00
Filed: 2001-08-07
Granted: 2003-12-21
Abstract: This invention provides a device and method for low-deformation precision welding of 0.2 to 0.5 mm thin sheets, which adopts the measures of laser welding of continuous and overlapping high frequency impulse dots, while controlling the energy for the laser welding to allow uniform melting and high evenness at the welding joints without any apertures. Clamping devices are used to secure two steel sheets to a dedicated med. Laser is used to radiate towards the welding joint of the two steel sheets so as to result in instantaneous vaporization and melting of the steel sheets thereby naturally fusing the gaps at the welding joint of the two steel sheets. This invention makes use of the steel sheets per se as the welding agent to achieve the objective of welding two steel sheets with enhanced strength to prevent breaking and to eliminate the use of welding material.
Patent TW-502359-B (TW)
Title: Semiconductor integrated circuit with local monitor circuits
Inventor: SHIN YOUNG-MIN
IPC: G01R31/3185
Filed: 2001-08-21
Granted: 2002-09-11
Abstract: The disclosed is a semiconductor integrated circuit including a boundary scan register and a plurality of local monitor circuits. The local monitor circuits are arranged individually around peripheral circuit regions of a semiconductor integrated circuit, being spaced from the boundary scan register, in order to measure and predict operation speeds in accordance with local on-chip process variations at a plurality of locations on the peripheral circuit regions. The operational speed of the semiconductor integrated circuit is determined by taking correlations between an overall signal delay time measured by the boundary scan register and local signal delay times measured by the respective local monitor circuits into account.
Patent TW-525184-B (TW)
Title: Stackable modules with clustered connections
Inventor: LI CHE-YU
IPC: G11C5/00
Filed: 2001-09-28
Granted: 2003-03-21
Abstract: The present invention provides a method for improving the performance of high speed, impedance-controlled bussed data subsystems through the reduction of the data path lengths between high speed semiconductor devices such as high speed control elements (e.g., memory controllers, small computer system interface (SCSI) drivers, peripheral component interconnect (PCI) chipsets and bridges and their intended target devices on the channel (e.g., SDRAM, DDR SDRAM, RAMBUS, FLASH, static RAM, SCSI drives, PCI devices, I/O cards and mezzanines), and an optimized electronic package for interconnecting the devices. The clustered shape and relatively centered placement of the interconnection pads on the circuit members in the electronic package, as well as the potential stacking of multiple circuit members, further enhance the performance and reduce costs.
Patent TW-523604-B (TW)
Title: Apparatus and method for testing semiconductor integrated circuit
Inventor: MORI HISAYA
IPC: H03M1/66
Filed: 2001-10-09
Granted: 2003-03-11
Abstract: There are provided a test apparatus and method for testing a semiconductor integrated circuit which enables improvements in the ease of operation and convenience of a BOST device and shortening of a test time. Numeric codes are assigned to tests. A test apparatus is equipped with memory and an analysis section. A test requirement table-in which hardware requirements required for conducting a test are set on a per-numeric-code basis-is stored in the memory. Test requirements corresponding to a numeric code are read from the memory, whereupon a test is performed. The analysis section analyzes a digital test output and sends the result of analysis to an external controller.
Patent TW-I253227-B (TW)
Title: DC-to-AC voltage converting circuit and its controlling method
Inventor: BAI FU-SHENG
IPC: H02M7/44
Filed: 2001-10-23
Granted: 2006-04-11
Abstract: This invention provides a DC-to-AC voltage-converting circuit and its controlling method. The DC-to-AC voltage converting circuit connects with a DC voltage. Furthermore, it coverts DC voltage into AC voltage, and provides a stable AC output voltage. It mainly comprises a power class transistor switch, an inductor-capacitor filter, a current sensor, a voltage-feedback controller, a loading current sensor, a pulse width modulation (PWM) generating circuit, and a current order compensator. The goal of this invention is to mainly use the current sensor to feedback the induction current of the LC filter, and carry on the voltage regulation, so as to increase the controlling bandwidth and voltage-regulation precision of DC/AC voltage converting circuit. Finally, it provides a stable AC output voltage.
Patent TW-543065-B (TW)
Title: Cathode ray tube
Inventor: SANTOKU MASATAKA
IPC: H04N5/65
Filed: 2001-12-04
Granted: 2003-07-21
Abstract: The present invention provides a cathode ray tube in which a reduction in weight can be contrived and scattering of glass upon implosion can be prevented effectively. The feature of cathode ray tube (1) comprises: an HS band (2) surrounding the peripheral edge of a panel (11); and a resin panel (3) disposed in the state of covering the surface of the panel (11) and connected to the HS band (2). The surface of the panel (11) and the resin panel (3) may be fixed with an adhesive, the resin panel (3) and the HS band (2) may be fixed with an adhesive, the resin panel (3) and the HS band (2) may be mechanically fixed by use of bolt/nut pairs, a wire or the like, and the resin panel (3) and the HS band (2) may be connected through fitting members (21) for fitting to a display device casing which are provided on the HS band (2).
Patent TW-552427-B (TW)
Title: Enhanced loopback testing of serial devices
Inventor: PANIS MICHAEL C
IPC: G01R31/30
Filed: 2001-12-06
Granted: 2003-09-11
Abstract: A system and method for economically yet thoroughly testing serial ports of electronic devices includes a receiver and a transmitter. The receiver is coupled to a TX line of a device under test for receiving an input serial bit stream from the device under test. The transmitter is coupled to a RX line of the device under test for providing an output serial bit stream to the device under test. The receiver is coupled to the transmitter for establishing a loopback connection. A time distortion circuit is interposed between the receiver and the transmitter, for adding predetermined amounts of timing distortion to the output serial bit stream. In addition, a selector is interposed between the receiver and the transmitter, for selecting between the receiver and a direct input. The direct input provides an algorithmic test signal that differs from the input serial bit stream received by the receiver. The direct input thus allows a tester to exercise the device under test with a test signal that differs from the signal that the device under test generates. A time measurement circuit measures timing characteristics of the device under test, and a parametric measurement circuit measures steady-state characteristics of the device under test.
Patent TW-536887-B (TW)
Title: A bandwidth control device and method
Inventor: CHEN JIUN-RU
IPC: H04L29/08
Filed: 2001-12-28
Granted: 2003-06-11
Abstract: A bandwidth control device and method are used in a switch controller of a network switch to achieve the goal of simplifying circuit and precisely controlling bandwidth with counting operation required by bandwidth control simplification and double counter design. The bandwidth controller includes a first counter, a control logic performing operation of plus or minus one in accordance with the incremental/decremented signal packet and determining if packet can enter the queue of switch controller in accordance with the value of the first counter, an activator executing packet in/out action to queue, adding one in the embedded second counter for every input of a bit and resetting it to zero after accumulating to a unit bit, then sending incremental signal to the control logic, a timer generating decremented signal to the control logic every other unit time. The bandwidth control method primarily utilizes the said control device to input packet, by means of subtracting one from the first counter through each passed unit time, for purpose of limiting transmission of only one unit bit of data amount in a unit time.
Patent TW-569197-B (TW)
Title: Optical recording medium and optical recording method
Inventor: HORAI TAKASHI
IPC: G11B7/00
Filed: 2002-02-21
Granted: 2004-01-01
Abstract: The present invention relates to an optical recording medium and optical recording method suitable for multilevel recording. The optical recording medium 10 can have information recorded by being irradiated with a laser beam and a plurality of virtual recording cells 40 of specific length are prescribed successively in the relatively moving direction of the optical recording medium 10. The characteristics of the virtual recording cells are so set that (X-Y)/X is larger than 0.3 and, preferably, larger than 0.4, where X% is the initial reflection factor of a virtual recording cell 40 which is not irradiated with the laser beam and Y% is the limit lowest reflection factor when the largest recording mark is formed while the cell is already irradiated with the laser beam, and one of the irradiation time and irradiation power of the laser beam is switched in more than 5 stages for the virtual recording cell to obtain a multilevel recording function.
Patent TW-583504-B (TW)
Title: A method for forming master masks, a method for exposing pattern by using master masks, a device mask and a method for manufacturing semiconductor device
Inventor: KYOH SUIGEN
IPC: G03F1/68
Filed: 2002-04-09
Granted: 2004-04-11
Abstract: There is provided a method which forms master masks used when a pattern of size larger than a region which can be exposed at one time is exposed on a to-be-exposed object. The pattern of the size larger than the region which can be exposed at one time is divided into a region of low repetitiveness and a region of high repetitiveness. A pattern of the region of low repetitiveness is drawn on at least one first master mask. Further, a pattern of the region of high repetitiveness is drawn on at least one second master mask.
Patent TW-561434-B (TW)
Title: Foreign language listening and speaking training system with random read-along and expository and method thereof
Inventor: WEN SAY-LING
IPC: G09B5/06
Filed: 2002-04-18
Granted: 2003-11-11
Abstract: A foreign language listening and speaking training system with random read-along and expository and method thereof can provide diversified foreign language listening comprehension of learning subject contents with random exam style and in the meantime provides learner to set up adaptive read-along learning process in terms of individual preference. Furthermore, target foreign language contents to provide instant explanation as a help after read-along learning process, allowing learner to acquire complete listening and speaking training of foreign language.
Patent TW-591405-B (TW)
Title: Non-copy shared stack and register set device and dual language processor structure using the same
Inventor: MA RUEY-LIANG
IPC: G06F9/318
Filed: 2002-04-19
Granted: 2004-06-11
Abstract: The present invention provides a non-copy shared stack and register set device and a dual language processor structure using the same, which achieve non-copy data share by controlling a selector and the stack pointer of a data stack. The selector is connected to each item of the data stack and a register of the register set, such that, when the register set requires to exchange data with the data stack, the selector is controlled and the stack pointer is updated thereby the selector switching the stack item pointed by the stack pointer to be connected to the register.
Patent TW-554347-B (TW)
Title: Method to protect the component of the primary system of a boiling-water reactor especially from stress-crack corrosion
Inventor: STELLWAG BERNHARD
IPC: C23F11/12
Filed: 2002-05-13
Granted: 2003-09-21
Abstract: This invention relates to a method to protect the component of the primary system of a boiling-water reactor especially from stress-crack corrosion, in which a reduction-medium is fed into the primary cooling-medium, so as to reduce the concentration of oxidization-causing substances or to move the electro-chemical potential of the component-surfaces coated with an oxide-layer towards negative values. According to this invention, it is suggested that an alcohol oxidizable under the conditions of a reactor is fed into the primary cooling-medium preferably in fluid form as reduction-medium, where the component-surfaces are blank or coated only with an eigen-oxide-layer.
Patent TW-563170-B (TW)
Title: Method and apparatus for identifying process variables and sample for evaluation
Inventor: MASUDA HIROO
IPC: H01L21/82
Filed: 2002-05-22
Granted: 2003-11-21
Abstract: A multi-layer interconnect structure includes the first interconnect layer, the second interconnect layer, in which a plurality of pitch wires having a width W are disposed with pitches P; the third interconnect layer; and a plurality of interlayer insulating layers for insulating the first to the third interconnect layers from one another. The invented method comprises the step (S101, S102) of calculating interlayer capacitance from a process variable including a structure variable and a material constant of each interlayer insulating film in this multi-layer interconnect structure; the step (S103, S104) of modeling a relation by using the process variable as a variable and the interlayer capacitance as a response variable from the relation between the obtained interlayer capacitance and the process variable; the step (S106) of creating a plurality of multi-layer interconnect structures with different widths and pitches of the pitch wires and measuring interlayer capacitances from the created multi-layer interconnect structures; and the step (S107) of identifying the process variable of the actually formed multi-layer interconnect structure from the measured interlayer capacitances based on the modeled relation.
Patent TW-548101-B (TW)
Title: Package for sanitary napkin
Inventor: KASHIWAGI MASAHIRO
IPC: A61F13/472
Filed: 2002-07-09
Granted: 2003-08-21
Abstract: The object of the present invention is to hardly give a fold on a folded leakage preventing wall in the case of folding and packaging a sanitary napkin which has an elastic member and the stereoscopically erected leakage preventing wall. The solution of the present invention is that a sanitary napkin 10 is folded at a score 62 to form a package body, a reinforcing sheet 42 is internally arranged and a bending part 42b is formed in the reinforcing sheet 42 at the inner side of the score 62. A leakage preventing wall 12a of the sanitary napkin 10 is made to be the package body in a pressurized state onto the outer surface of the bending part 42b. Thus, fold is not formed on the leakage preventing wall 12a when the package body is opened so that the leakage preventing wall 12a is surely erected on the inner surface of the sanitary napkin 10.
Patent TW-I224248-B (TW)
Title: Microprocessor with multiple low power modes and emulation apparatus for said microprocessor
Inventor: TRIECE JOSEPH W
IPC: G06F1/32
Filed: 2002-08-07
Granted: 2004-11-21
Abstract: A microprocessor comprises a central processing unit receiving a first clock signal, a plurality of peripherals receiving a second clock signal a first select unit for selecting the first clock signal out of a plurality of clock signals and a second select unit for selecting the second clock signal out of the plurality of clock signals. The central processing unit comprises an execution unit which controls the select units upon execution of a low power mode instruction to select a clock signal for the central processing unit and the peripheral units.
Patent TW-I222615-B (TW)
Title: Cholesterol liquid crystal display device and the driver
Inventor: OKAFUJI MASAHARU
IPC: G09G3/36
Filed: 2002-10-22
Granted: 2004-10-21
Abstract: The present invention relates to a driver suitable for the cholesterol liquid crystal display device with manners of dynamically driving passive matrix. The driver comprises: a shift register for shifting the row data or column data inputted by the shifting clock shifter; a data latcher for latching the data of shift register by the latching pulses; and, the driving voltage selection output circuit for selecting multiple driving power sources to output the row driving voltage or column driving voltage with the row data or the column data latched by the data latcher.
Patent TW-577728-B (TW)
Title: Removal partial denture free of palatal bar or lingual bar
Inventor: LIN LUH-YUAN
IPC: A61C13/00
Filed: 2002-10-23
Granted: 2004-03-01
Abstract: The present invention involves a removable partial denture that does not have a palatal or lingual bar, strap or plate connecting both sides of an arch of the partial denture. In addition to the rests and/or clasps, it is held in position by the shape of the linguoplate, which conforms to the shape of the lingual surface of the teeth and alveolar mucosa, and the shape of a portion of the adjacent gum tissue of the patient.
Patent TW-569316-B (TW)
Title: Method for fabricating a MOSFET
Inventor: MAYUZUMI SATORU
IPC: H01L21/316
Filed: 2002-10-24
Granted: 2004-01-01
Abstract: The disclosed invention provides a method for fabricating a MOSFET comprising the steps of forming a first insulation layer over a semiconductor substrate; forming a trench which bottoms on the semiconductor substrate in the first insulation layer so that the semiconductor substrate is exposed at the bottom of the trench; injecting impurities selectively under at least one end of the exposed surface of the semiconductor substrate; forming a second insulation layer to cover the bottom surface of the trench by oxidizing the exposed surface of the semiconductor substrate; forming a gate electrode over the second insulation layer inside the trench; removing the first insulation layer; forming a drain region under the surface of the semiconductor substrate so that the drain region contacts with one end of the second insulation layer, the end under which the impurities were injected; and forming a source region under the surface of the semiconductor substrate so that the source region contacts with the other end of the second insulation layer, the end opposite to the end under which the impurities were injected.
Patent TW-595250-B (TW)
Title: Method of repairing active matrix OLED
Inventor: LEE HSIN-HUNG
IPC: H05B33/10
Filed: 2002-11-15
Granted: 2004-06-21
Abstract: A method of repairing an active matrix OLED is described. A thin film transistor array substrate having an anode layer, an emitting layer and a cathode layer thereon for forming a plurality of pixel structures is provided. When a defect from the short between the anode layer and cathode layer in a pixel structure occurs, a laser beam is used to remove the cathode layer of the defect or remove the cathode layer, the emitting layer and the anode layer of the defect.
Patent TW-582032-B (TW)
Title: Magnetic random access memory
Inventor: KAJIYAMA TAKESHI
IPC: G11C11/15
Filed: 2002-11-29
Granted: 2004-04-01
Abstract: The magnetic tunneling junction (MTJ) elements of the present invention are accumulated in a plurality of portions on a semiconductor substrate. A first conductive line functioning as a read line and extending in the X direction is connected to pin layers of the MTJ elements. A second conductive line functioning as a write line and read line and extending in the X direction is connected to free layers of the MTJ elements. A write line extends in the Y direction and is shared with two MTJ elements present above and below the write line. The two MTJ elements present above and below the write line are arranged symmetric to the write line.
Patent TW-I265086-B (TW)
Title: Die height adjusting device for pressing machine
Inventor: TERAOKA KENICHI
IPC: B30B15/06
Filed: 2003-01-14
Granted: 2006-11-01
Abstract: A die height adjusting device for a pressing machine, which withstands high vibrations and high impacts during pressing work, and realizes high precision of a slide position, is provided. For this purpose, the die height adjusting device includes an induction motor (9), which performs die height adjustment of a slide (3), and an inverter (17) which performs a speed control of the induction motor (9). Voltage is applied to the induction motor (9) for a predetermined period of time, and thereby a predetermined amount of die height adjustment is performed. Alternatively, the induction motor (9) is driven at a first constant speed to a position at a predetermined distance in front of a target slide and the induction motor (9) is then driven at a second constant speed that is slower than the first constant speed to the position of the target slide.