Patent GB-1252526-A (GB)
IPC: H04Q11/04
Filed: 1969-04-14
Abstract: 1,252,526. Automatic exchange systems. MARCONI CO. Ltd. 6 April, 1970 [14 April, 1969], No. 19090/69. Heading H4K. In a PCM, TDM exchange including a multistage matrix switching network having inlets and outlets multiplied over one side thereof and junctors connected to the other side thereof, a path between a calling inlet and a called outlet is determined by injecting markings into the inlet and outlet such that they traverse all possible free paths through the network, selecting a junctor at which both markings appear and then, in turn, reverting markings from this junctor to the inlet and outlet (or vice versa) and selecting at each stage a switch in which both forward and backward markings appear during a same time slot. The junctors may provide zero, fixed or variable delays to allow time slot interchange. The system allows the processor to delegate virtually the entire path finding operation to network peripherals. Particular description.-The network comprises two stages of four-wire matrices Al ... Bn. Concentrator junctions 10, interexchange junctions 11, and digit receiving registers 1a are multipled via distribution frame 1 over the A switches while groups of junctors 14 are connected via another distribution frame 2 to the B switches. Each matrix switch comprises 15 (4- wire) rows for carrying speech and one row 16 for the marking signals, and sufficient columns as to provide full availability linking. Each switch inlet is provided with a detector 13 for detecting the presence of and type of marking which occurs during a data portion of each time slot. A special bit position is reserved for indicating the type of information i.e. marking or dialling, which occurs during the data portion. In setting up a call a known calling party has initially to be connected to an allocated register. To this end, so-called interrogators 7 and 9 transmit codes 01X and 0X1 respectively during the free time slots available to the caller and the register to the corresponding appearances on frame 1. (The initial digit 0 signifies that an interrogation mark occupies the following eight information bits of the time slot, the last i.e. the tenth bit being reserved for external signalling e.g. dialling.) The marks are detected by devices 13 so as to enable OR gates 3. (If the connection may pass via the same switch, as for example in the case of the final calling-called party connection, the gate adds the two different codes such that their individual identities are still distinguishable.) The output of gate 3 is connected to the 16th row of a respective A switch so that the code may be passed-on to each of the AB links during free time slots thereon. The relevant crosspoints are operated by control circuits individual to each A switch, the individual crosspoints of the 16th row being opened whenever no crosspoint in the columns corresponding thereto is operative. A similar process occurs at the inlets to the B switches whereby interrogation code marks eventually appear at every free junctor 14. A multistage junctor selector 15 (Figs. 3 and 4, not shown) then chooses a junctor at which both code marks appear. Two time frames are allowed from the start of interrogation to ensure that all possible paths and junctors are exploited. The junctors are chosen in the order of preference zero, fixed, and variable delay facility. This order may be investigated in a single frame or (more cheaply) in three successive frames (one per junctor facility type). Whichever junctor is chosen it is ensured that this becomes the last choice for the next subsequent connection or connection attempt. If no junctor is found the processor is called in to possibly restart the hunting process. However with a junctor selected and a decision made as to whether to set up the calling or called side connection first, a path setting mark is supplied therefrom to its appearance on the frame 2. During each free time slot this mark is passed via the operative crosspoints in the 16th row of the B switches to a device 6 which in conjunction with the appearance of the interrogation marks on the B switch inlets selects one crosspoint for use. The switch control circuit closes this crosspoint in the next frame so that the mark is conveyed to the A switches and also so that a mark for the other half connection may be transmitted by the junctor. The effect of the mark in the A switch is similar, so that finally the desired connection is set up. The correct establishment of the connection is checked by transmitting in each direction a special digit pattern. The delay time for the transmission should lie within known limits. The inverse pattern is then reverted as a final check. The processor is called in to clear the interrogators.