baber/WOPTO huggingface dataset:
Patent TW-451054-B (TW)
Title: Cleaning method and device for heat exchanger
Inventor: TAU JIAN-JUNG
IPC: F28G13/00
Filed: 1999-06-16
Granted: 2001-08-21
Abstract: This invention provides a cleaning method and device for a heat exchanger. A close-type cleaning liquid reservoir is linked to circulation valve and return valve which are connected to the circulation circuit and return tube via inlet tube and return tube of the heat exchanger to form a closed-type circulation cleaning device. By closing the washing water stop valves and return water stop valve and then opening cleaning valve and air valve, the cleaning liquid in the reservoir is removed. The residual air in the reservoir is removed by adding cleaning liquid into the reservoir, closing the input valve, opening the second water stop valve and then slowly opening the return valve. After closing air valve, fully opening circulation valve, return valve, cleaning water stop valve, the heat exchanger can be washed by activating circulation pump to enable circulation of cleaning liquid within pipeline, heat exchanger and cleaning liquid reservoir. This can achieve effective circulating for cleaning heat exchanger and prevent overflow of cooling water, dilution of cleaning liquid and sudden injection of gases and thus effectively conserve cleaning liquid.
Patent TW-426854-B (TW)
Title: Semiconductor storage device
Inventor: KOSHIDA GEN
IPC: G11C11/401
Filed: 1999-06-29
Granted: 2001-03-21
Abstract: According to one embodiment (100), a semiconductor storage device can include a timing specification (tRWL) for the time between a first transition in an external signal (/WE) and a second transition in an external signal (/RAS). The timing specification can be tested without relying on the second transition in an external signal (/RAS). When a row address strobe signal (/RAS) is activated (transitions low) an internal /RAS signal (i/RAS) can be activated (transition low), and a word line (WL) can be activated (transition high). A write enable signal (/WE) can then be activated, starting a write operation. Following a predetermined delay, the i/RAS signal is reset (returns high). Consequently, a word line (WL) can be deactivated, ending a write operation. The /RAS signal can then be deactivated (returns high). In this way, the tRWL specification can be measured by the predetermined delay, and not be dependent upon the low-to-high transition in the external /RAS signal.
Patent TW-516263-B (TW)
Title: Method for controlling a position sensorless motor and its control device, and method and device for frequency-to-voltage conversion which is mainly used for position sensorless motor
Inventor: MIYAZAKI SHINICHI
IPC: H02P6/182
Filed: 1999-07-16
Granted: 2003-01-01
Abstract: The invention is a method and a device for controlling a position sensorless motor having a function of synchronous operation with a position sensorless operation, wherein during the position sensorless operation, a rotating position of a rotor is detected based on a counter-electromotive force generated in a stator coil, and the stator coils is excited in synchronous with the detected rotating position of the rotor thereby to rotate the rotor. A deviation between a target position and the current position is obtained from a target rotating position set by a position instruction signal and from the detected rotating position, and, based on the thus obtained deviation, a position sensorless closed loop drive is carried out. Further, at the time of synchronous operation, the stator coil is excited in synchronous with the position instruction signal, to rotate the rotor.
Patent TW-454186-B (TW)
Title: Memory device having redundancy array
Inventor: HSU HUI-MIN
IPC: G11C11/00
Filed: 1999-08-11
Granted: 2001-09-11
Abstract: A memory device having redundancy array is disclosed, which comprises a row word line, a column selective line to make selection based on plural row address signals and column address signals respectively, and a memory region having the first block and the second block, wherein the first block and the second block are driven based on different logic values of the first row address signal respectively. In addition, plural pairs of odd arrays and even arrays, and plural spare rows and spare columns corresponding to odd arrays and even arrays are located in the first block and the second block. Each of the odd arrays and even arrays are individually driven based on different logic values of the second row address signal, the rest of the row address signal are used to select each row word line in the odd arrays or even arrays. When the selected row word line is a defective row, it is replaced by a spare row, and when the column selective line selected by plural column address signal is a defective line, it is replaced by one of the spare columns.
Patent TW-492845-B (TW)
Title: Chocolate coating apparatus
Inventor: KURT BUSSE
IPC: B05C5/02
Filed: 1999-09-13
Granted: 2002-07-01
Abstract: An apparatus and process for preparing chocolate coatings having a marbled appearance, and confectionery products having a component provided with a chocolate coating having a marbled appearance thereon. A chocolate coating apparatus comprising: at least one feed device for supplying chocolate; a positioning device for receiving the chocolate from each feed device and for directing the chocolate onto a confectionery in a desired arrangement as a coating, said positioning device being rotated at a speed of about 50 rpm to 2500 rpm; and an enclosure for recirculating chocolate that does not remain on the confectionery said enclosure being heated to maintain the chocolate at a temperature from about 28 DEG C to 60 DEG C thereby facilitating application and recirculation of the chocolate.
Patent TW-I237641-B (TW)
Title: Process for polymerization of vinyl chloride monomer and optional further monomers by continuous dosing of peroxides
Inventor: WESTMIJZE HANS
IPC: A01G9/02
Filed: 1999-09-30
Granted: 2005-08-11
Abstract: The invention pertains to a process wherein peroxides are dosed to a polymerization mixture, with essentially all of the organic peroxide that is used in the polymerization process having a half-life from 0.05 hour to 1.0 hour at the polymerization temperature. The dosing of such peroxide allows for accurate control of the polymerization rate, and the process will render a polymer with a low residual peroxide level.
Patent TW-494487-B (TW)
Title: Semiconductor wafer and method for fabrication thereof
Inventor: KISHIMOTO JUN
IPC: H01L21/304
Filed: 1999-11-19
Granted: 2002-07-11
Abstract: There is disclosed a semiconductor wafer obtained, at least, by removing a mechanical damage layer by etching both surfaces of the wafer, flattening one of the surfaces by a surface-grinding means, polishing both of the surfaces, and then subjecting a front surface of the wafer to a finishing mirror-polishing when defining the surface subjected to surface-grinding as a back surface of the wafer, and a method for fabricating it. There can be provided a method for fabricating a semiconductor wafer wherein grinding striations which remain on a semiconductor wafer even when double side polishing and finishing mirror- polishing are conducted after a conventional step of surface-grinding of the front surface or the both surfaces, are eliminated to improve quality of the front surface of the wafer, and the back surface having a quality suitable for the device process can be obtained, and a semiconductor wafer obtained thereby.
Patent TW-434874-B (TW)
Title: Semiconductor device including a repetitive pattern
Inventor: AKITA HIRONOBU
IPC: G11C8/14
Filed: 1999-12-24
Granted: 2001-05-16
Abstract: The present invention provides a structure of DRAM in which a first repetitive unit including a plurality of decoders for selecting a plurality of word lines and a second repetitive unit having the same arrangement as that of the first repetitive unit are arranged in mirror symmetry with respect a boundary region therebetween. The first and second repetitive units have a wire and a contact located on a boundary portion therebetween in common.
Patent TW-492931-B (TW)
Title: Rotor system for a bicycle
Inventor: GORING THOMAS
IPC: B62L3/02
Filed: 1999-12-31
Granted: 2002-07-01
Abstract: In a rotor system for a bicycle (1) for supporting a fork (8) and for transmitting actuations of brake cable lines (60, 71) with at least two transmission elements (44, 55), which are rotatable relative to each other and arranged in the region of a support (23, 31) of fork (8), a casing (21) surrounds the transmission elements (44, 55) at least in radial direction.
Patent TW-440922-B (TW)
Title: Process with four photomasks for thin film transistor liquid crystal display
Inventor: TSAI JIUN-WEI
IPC: H01L21/027
Filed: 2000-01-04
Granted: 2001-06-16
Abstract: A process with four photomasks for thin film transistor liquid crystal display is provided, wherein the ratio of length and width of the channel circuit pattern of the second photomask is larger than a certain value. The source/drain circuit can be completely developed by controlling the exposure energy and the developing time in the photolithography process, but the channel circuit is partially developed. That is, there is no photoresist layer in the source/drain, but a thinner photoresist layer is remained on the channel circuit. At this time, if the etching step is proceeded, only the source/drain circuit will be etched, and the channel circuit will remain to have the original shape due to the protection of thinner photoresist layer. Then, if the channel photoresist layer is removed, and the etching step is executed again, a reaction will take place in the source/drain circuit and the channel circuit. Thereby, different etching depths can be obtained in a single photomask process.
Patent TW-447002-B (TW)
Title: Semiconductor device
Inventor: MORIFUJI EIJI
IPC: H01L21/336
Filed: 2000-01-29
Granted: 2001-07-21
Abstract: This invention provides a semiconductor device having good noise characteristics. In the semiconductor device having a signal input pad (116) and an amplification stage for amplifying a signal input to the signal input pad on a semiconductor substrate (101) or on a well, a low resistance layer (121), especially a silicide layer which is applied with the same potential as that of the semiconductor substrate or the well, is provided below the input pad and an interconnection (115) between the input pad and an element in the amplification stage. The potential of the resistance layer is reduced to ground, therefore the resistance of the substrate is reduced, thermal noise in the substrate is reduced, and noise entering the amplification stage via an interlayer film capacitance can also be reduced, reducing the noise of the entire semiconductor device. The low resistance layer (121) does not contact with the substrate directly but may be a silicide layer (142) formed on a gate polysilicon film (141).
Patent TW-468307-B (TW)
Title: Stator flux estimate midpoint correction
Inventor: NIEMEL MARKKU
IPC: H02P21/00
Filed: 2000-02-17
Granted: 2001-12-11
Abstract: A method of correcting the stator flux estimate midpoint in alternating-current systems, the method comprising the step of determining a stator flux estimate (Ψs,est). The method is characterized in steps of forming the sum of the squares of the rectangular components (Ψsx,est, Ψsy,est) of the stator flux estimate to obtain a reference variable (k), low-pass filtering the reference variable (k) in order to obtain a low-frequency component (kfilt) of the reference variable, subtracting the low-frequency component (kfilt) from the reference variable (k) in order to obtain a difference variable (e), determining rectangular correction term components (Ψsx,corr, Ψsy,corr) of the stator flux estimate (Ψs,est) by multiplying the difference variable (e) by the rectangular components (Ψsx,est, Ψsy,est) of the stator flux estimate and a correction coefficient (KΨcorr), and forming a midpoint-corrected stator flux estimate (Ψs,fin) by adding the correction term components to the components of the stator flux estimate.
Patent TW-475947-B (TW)
Title: Process for recovering acids from metallic solutions of these acids
Inventor: LEBL ALBERT
IPC: C23G1/36
Filed: 2000-03-20
Granted: 2002-02-11
Abstract: The invention refers to a process for recovering acids from metallic solutions of these acids, preferably HF, HNO3, Fe, Cr, Ni compounds, as well as mixtures of these compounds, by evaporation and pyrolytic splitting into acids and metal oxides. It is mainly characterised by the process including a heated reactor which is split into two zones by built-in parts, with evaporation taking place at low temperature in the upper, first zone and decomposition at high temperature in a further zone immediately adjoining the first.
Patent TW-533276-B (TW)
Title: Turbo-molecular pump
Inventor: KAWASAKI HIROYUKI
IPC: F04D19/04
Filed: 2000-03-21
Granted: 2003-05-21
Abstract: A turbo-molecular pump has a casing, a stator fixedly mounted in the casing, and a rotor supported in the casing for rotation relatively to the stator. A turbine blade pumping assembly and a thread groove pumping assembly for discharging gas molecules are disposed between the stator and the rotor. The rotor comprises at least two components constituting the turbine blade pumping assembly and the thread groove pumping assembly. The components are separable from each other at a predetermined position, and joined to each other to form the rotor.
Patent TW-I234820-B (TW)
Title: Process for the formation of silicon oxide films
Inventor: MATSUKI YASUO
IPC: H01L21/316
Filed: 2000-03-29
Granted: 2005-06-21
Abstract: A process for forming silicon oxide films useful as electrical insulating, dielectric or protective films for LSI, thin film transistors, photoelectric conversion devices, photoreceptors and so on, which comprises forming a coating film made of a polysilane compound represented by the general formula: SinRm (wherein n is an integer of 3 or above; m in an integer of n to 2n+2; and Rs are each independently hydrogen or alkyl) and oxidizing this coating film into a silicon oxide film.
Patent TW-436578-B (TW)
Title: Crescent hinge
Inventor: FORD JAMES J
IPC: E05D11/06
Filed: 2000-07-07
Granted: 2001-05-28
Abstract: This invention relates to hinges in general. More particularly, the invention is concerned with hinges wherein it is desired to have no parts of the hinge visible on the outside of a door or enclosure, where, typically in prior art hinges, a hinge pin is located about which the door rotates about the enclosure frame. The hinge of the present invention is visible from only one side of a door and has a first crescent member having a mounting means for mounting to the door and an arcuate cutout, the arcuate cutout describing a radius about a point that is an actual hinge point of the door relative to the frame, a second crescent member having a mounting means for mounting to a frame, and a pair of protruding cylindrical members adapted to be received within the arcuate cut out, the cylindrical members adapted to secure the first crescent member to the second crescent member. The first crescent member is movable about the actual hinge point with respect to said second crescent member.
Patent TW-452973-B (TW)
Title: Method for manufacturing floating gate of split-gate flash memory
Inventor: HUNG JR-WEI
IPC: H01L21/28
Filed: 2000-04-18
Granted: 2001-09-01
Abstract: The present invention discloses a method for manufacturing the floating gate of split-gate flash memory, which includes forming a sacrificial layer on the substrate and then forming a doped polysilicon layer and an insulating layer on top of the sacrificial layer; then, removing the doped polysilicon layer and the insulating layer that are higher than the sacrificial layer by individually or together performing chemical mechanical polishing (CMP) method; after that, stripping the exposed polysilicon layer and removing the sacrificial layer so as to complete the fabrication of floating gate for the split-gate flash memory.
Patent TW-I285636-B (TW)
Title: Method for preparing tribromomethylsulfonylpyridine
Inventor: FUJISAWA EIJI
IPC: C07D213/71
Filed: 2000-05-12
Granted: 2007-08-21
Abstract: The present invention features a method for preparing a tribromomethylsulfonylpyridine by a heterogeneous reaction between a methylthiopyridine and a hypobromite in the presence of a base and water. According to the present invention, a tribromomethylsulfonylpyridine can be obtained in high yield and high purity and with industrial advantages.
Patent TW-502397-B (TW)
Title: Memory cell
Inventor: KUNIKIYO TATSUYA
IPC: H01L21/8242
Filed: 2000-05-16
Granted: 2002-09-11
Abstract: A DRAM memory cell includes a cell transistor (91a) having a source/drain region (6a) connected to a lower electrode (15) of a capacitor (18a) through a pad (10a) and a storage node (11a). During a pause, the lower electrode (15) is not depleted, but at least one of the pad (10a) and the storage node (11a) is depleted to increase a voltage drop therein. The voltage drop alleviates an electric field at a gate end of the transistor (91a) to reduced a TAT (trap assisted tunneling) induced leakage current. The DRAM memory cell is provided which decreases a leakage current from the capacitor and increases time intervals between refresh operations, or refresh pause time.
Patent TW-434722-B (TW)
Title: Method of aligning wafer in a plasma cleaning machine
Inventor: LIN FENG-BIN
IPC: H01L21/302
Filed: 2000-06-21
Granted: 2001-05-16
Abstract: A method of aligning wafers in a plasma cleaning machine so that the etching rate of the photoresist can be distributed uniformly. The method comprises: aligning a plurality of wafers on a boat such that the front face of a wafer will face the front face of an adjacent wafer, and the back face of a wafer will face the back face of an adjacent wafer; and feeding the boat loaded with the wafers into a plasma cleaning machine to remove a photoresist layer with an oxygen plasma.
Patent TW-531432-B (TW)
Title: Method and device for disposing chips
Inventor: HIRANO TAKAO
IPC: B23Q11/00
Filed: 2000-07-06
Granted: 2003-05-11
Abstract: This invention provides a method for disposing chips to rapidly and safely dispose chips and also remove oily smoke and oil mist, and realize a comfortable work site. Chips are conveyed by suction and the chips are shredded at in the middle of conveyance. Thereafter, by rapidly spreading flow passages to reduce the suction force, the shredded chips are settled under gravity for natural drop and separating for different sizes during the drop. By means of the forcible suction, oily smoke and oil mist of the dropping chips are removed and the air is released to the atmosphere after being filtered.
Patent TW-457658-B (TW)
Title: Method for packaging a thermoelectric chip
Inventor: CHEN TSUNG-JR
IPC: H01L23/28
Filed: 2000-08-02
Granted: 2001-10-01
Abstract: A method for packaging a thermoelectric chip includes the following steps: forming top and bottom substrates made from ceramic and resin materials; screen printing the top and bottom substrates to form a plurality of conductive pastes; arranging, attaching and positioning conductive plates on the conductive pastes, and coating a layer of flux on the conductive plates; arranging, attaching and positioning antimony bismuth dies in different polarities respectively to each end of the conductive plates attached on the bottom substrate; testing the polarities of the positioned antimony bismuth dies on the bottom substrate with probes; aligning and pressing the top substrate with the bottom substrate to form the combined thermoelectric chip; drying up the combined thermoelectric chip to complete the product. By following the above-mentioned steps, the thermoelectric chip can be formed by electrically bridging the positive and negative ends of a plurality of antimony bismuth dies in series between the top substrate and the bottom substrate. The invention can complete multiple operations at a time in the assembly of dies to effectively shorten the process duration, and avoid the erroneous assembly from the manual arrangement of the dies, which can tremendously elevate the yield of packaging, thereby facilitating the rapid mass production.
Patent TW-476956-B (TW)
Title: Photorecording media
Inventor: USAMI YOSHIHISA
IPC: G11B7/24091
Filed: 2000-09-02
Granted: 2002-02-21
Abstract: The present invention provides photorecording media which allow correct reading of the address information and cause no damage to the recording and reproducible characteristics. In the photorecording media according to the present invention, grooves in spiral or concentric round shape32 are formed, lands 34 have adjacent grooves, only one side wall of the adjacent grooves is provided with openings, and a land prepit 38 is preformed for recording the address information of one of said groove.
Patent TW-473787-B (TW)
Title: Multiple sided robot blade for semiconductor processing equipment
Inventor: SHANMUGASUNDRAM ARULKUMAR
IPC: H01L21/683
Filed: 2000-09-05
Granted: 2002-01-21
Abstract: The present invention generally provides a processing system having a robot assembly which includes a multiple sided robot blade that can support a substrate on at least two sides thereof and associated methods to transfer one or more substrates in a processing system. An unprocessed substrate can be supported on the blade while a processed substrate is retrieved from a location to which the unprocessed substrate is to be delivered. The processing throughput rate is increased by reducing the movements required by the robot to exchange processed substrates and unprocessed substrates, thus decreasing the swap time.
Patent TW-472300-B (TW)
Title: L-shaped TEOS gas injector for LPCVD TEOS within-wafer uniformity improvements
Inventor: QUAN WU QIAN
IPC: H01L21/31
Filed: 2000-09-13
Granted: 2002-01-11
Abstract: A new apparatus is provided for the deposition of one or more layers of TEOS. The apparatus of the invention provides an L-shaped TEOS gas injector that is provided with a multiplicity of openings around its circumference and extending in a longitudinal direction along the surface of the L-shaped gas injector. The longitudinal direction of the L-shaped gas injector is mounted parallel to the vertical direction of the TEOS reaction chamber. The apparatus of the invention therefore allows for an even distribution of the TEOS gas in a vertical direction of the reaction tube thus eliminating different conditions of processing for wafers that are stacked at different vertical levels within the vertical reaction tube.
Patent TW-516015-B (TW)
Title: Energy recovery circuit of plasma display panel driving circuit
Inventor: WU TSAI-FU
IPC: G09G3/28
Filed: 2000-11-24
Granted: 2003-01-01
Abstract: The present invention provides an energy recovery circuit of plasma display panel driving circuit, which includes a plurality of switching devices. With different control states in the driving signal cycle of the switching device, and the effect of inductors connected in series, the circuit is able to decrease the current stress on the switch and decrease the influence of parasitic devices in the process of withdrawing energy stored in the plasma display panel, thereby improving the conventional circuit design, decreasing the cost, and reducing the switching loss.
Patent TW-563300-B (TW)
Title: Programmable buffer circuit
Inventor: VOLK ANDREW M
IPC: H03K19/00
Filed: 2000-12-16
Granted: 2003-11-21
Abstract: A first buffer impedance value is established by electronically adjusting a first impedance between a first voltage source and a first reference point until the potential at the first reference point has a predetermined relationship to a reference voltage. A second buffer impedance value is established by adjusting the impedance between a second reference point and a second voltage source, until the potential at the second reference point has a predetermined relationship with the reference voltage.