Patent GB-1091857-A (GB)
Title: Beacon identity display
IPC: G01S13/78
Filed: 1965-05-14
Abstract: 1,091,857. Radio navigation. INTERNATIONAL STANDARD ELECTRIC CORPORATION. May 14, 1965 [May 18, 1964], No. 20427/65. Heading H4D. The Specification describes an improvement in a TACAN system, whereby signals identifying the beacon to the aircraft are transmitted at least once a second, immediately after the North reference burst. The beacon is identified by three characters, each of which is represented in the identifying signals by six pulses. The eighteen character pulses are spaced forty-eight microseconds apart and are preceded by thirty microseconds by a pair of start pulses, twenty-one microseconds apart and following the end of the North reference burst by eighty microseconds. The various pulses are generated by pick-up coils suitably spaced along a nickel ribbon delay line along which a pulse is passed, generated by a drive circuit on detection of the end of the North reference burst. The drive circuit also starts a blanking pulse, which is terminated by the last pick-up coil along the tape, which stops the transmission of the normal TACAN pulses during the transmission of the identifying signals. After reception on the aircraft the North reference burst and identifying signals are fed to a start recognition circuit 15, which recognises the North reference burst and passes a pulse to a sequence circuit 16 when such a burst is quickly followed by an identifying signal. The identifying signal is fed to a nineteen cell shift register having shift pulses fed thereto forty-eight microseconds apart from the sequence circuit. At the end of the transmission of the identifying signal the eighteen character pulses are stored in the last eighteen cells of the shift register and the first character pulse of the next indentifying signal will appear in the first or input store cell. To test for identity of consecutive identifying signals, corresponding characters in the two signals are compared, by means of comparison circuit 18 comparing at each shift pulse the contents of the input store cell and the last or eighteenth cell. Each character is separately compared and any difference sends a pulse to an error register 19, which inhibits the indication of the character in question. Alternatively, the indication of all three characters may be inhibited, if one character is in question. The characters are indicated on an identity indicator 29, comprising, for each character, a tape having characters printed thereon and moved by sprocket wheels having printed circuitry thereon co-operating with pick-off brushes, such that the character being indicated is identified as an electrical signal. These electrical signals allow comparison in comparison logic 24, of the three characters being indicated and those stored in the shift register. Any difference causes the activation of the appropriate sprocket wheel drive 21-23 until equality is restored. If no new identifying signal is received within a certain time, flag reset 25 will clear the shift register, if however, the aircraft is continuously tracking the beacon during this certain time, the shift register is not cleared. The start recognition circuit comprises a delay line of thirty microseconds delay and an AND gate. The two inputs of the AND gate are respectively fed with the North reference burst directly and via the delay. The AND gate thus gives as output, twelve pulses thirty microseconds apart. These pulses trigger a ringing circuit, tuned to 33 kc./s., such that each ring is higher than the last and twelve consecutive triggers is just sufficient to cause the amplitude of the ringing circuit output to rise to the triggering level of a multivibrator. The delay tune is tapped at a twenty-one microsecond delay time point such that the first start pulse taken therefrom coincides at a second four input AND gate with the second undelayed start pulse, the third input of the gate being fed with the output of the multivibrator, and the fourth with a pulse present when the identity indicator is steady. The output of the four input AND gate feeds the sequence circuit 16.