Patent GB-1137812-A (GB)
Title: Improvements in or relating to data processing systems
IPC: G06F13/12
Filed: 1967-03-08
Abstract: 1,137,812. Computer input/output control. INTERNATIONAL BUSINESS MACHINES CORP. 8 March, 1967 [19 April, 1966], No. 10808/67. Heading G4A. A data processing system comprises a CPU (central processing unit), main storage and a plurality of peripheral units, the peripheral units being grouped under the control of subcontrol units controlled in turn by a common control unit associated with enough local storage to contain control words for each peripheral unit and arranged so that data transfer between a peripheral unit and main storage can be established by execution of an instruction by the CPU causing the common control unit to retrieve a unit control word from main storage and put it in the local storage, the control word being updated as transfer proceeds. A system comprising CPU and main core storage has input/output channels, each as follows. Input/output units are connected in groups to control units which are connected in groups to sub-channels. Four of the subchannels relate to high-speed input/output units, e.g. magnetic tape units, and operate in burst mode i.e. transfer a complete multi-byte message at each link-up, whereas a fifth subchannel relates to low-speed input/output units, e.g. card readers and punches, and operates in multiplex mode i.e. transfers one byte per link-up. The five sub-channels are connected to a common control unit having a 1024-word local storage and this control unit is connected to the CPU and main storage. Priority arrangements (not described) are in operation at each level of the communication system. Burst mode transfer.-An input/output instruction specifies the channel and input/output unit and causes the common control unit of the channel to access a channel address word from main storage. The common control unit then accesses a channel command word from main storage at an address specified by the channel address word. The channel command word specifies the operation to be performed by the input/output unit, the first main storage address (word and byte) to deliver or receive transferred data and the number of bytes to be transferred. The channel address word has its address field incremented by 8 bytes (one word), to specify the next channel command word when needed, and is then stored in the local storage as a first unit control word for the particular input/output unit concerned. The channel command word (with its operation field replaced by conventional tags from the channel address word) is also stored in the local storage as a second unit control word. The input/output unit recognizes its address sent from the common control unit and sends its address back for a check comparison. In the case of agreement, the message is transmitted between main storage and the common control unit, serially by 8-byte word, and between the common control unit and the input-output unit serially by byte, the unit control words being updated as appropriate. Multiplex mode transfer.-Since only one byte is transferred per link-up in this mode, the mode differs from burst mode as follows. Two unit control words are stored in the local storage under programme control as before. Thereafter, whenever the input/output unit is ready to supply or receive a message byte it sends its address to the common control unit to access its second unit control word from the local storage. The message is transferred serially by word between the main storage and the common control unit as before, and between additions or removals of bytes to or from the current message word in the common control unit, this message word is stored as a third unit "control" word in the local storage. A fourth unit control word in the local storage is constituted by the next channel command word prefetched from main storage. Interruption.-Apart from interruption for data transfer, the CPU can also be interrupted for other unspecified purposes by a channel, the common control unit thereof supplying to the main storage the address of the input/output unit involved and a channel status word partly constituted by the channel address word (updated) and partly by input/output unit status bits.