baber/WOPTO huggingface dataset:
Patent JP-H0894720-A (JP)
Title: Method for specifying test impossibility flaw in logic circuit
Inventor: MIRON ABURAMOBUISHII
IPC: G06F17/50
Filed: 1995-09-14
Abstract: PROBLEM TO BE SOLVED: To specify a more than ore defects contained in both first and second detect sets, as a defect impossible to test so as to efficiently specify a defect impossible to test. SOLUTION: When a circuit conductor in a given circuit is selected, the circuit conductor is marked to a logic value 0 as impossible control (hypothetically). Then, an agreement procedure is applied, and similarly, a node in another circuit so as to be set to a suitable logic value, that is, it is marked as impossible control or impossible observation. Accordingly, a first set of defects which cannot be tested is hypothetically delivered. Next, the selected circuit conductor is marked to a logic 1 (hypothetically) as impossible control. Then an agreement procedure is applied, and similarly, a second set of defects which cannot be tested is hypothetically delivered. Further, defects exhibited in both defect sets are automatically impossible in testing. Thus, a defect impossible to test delivered due to defects exhibiting in both defect sets can be specified.
Patent JP-H08101796-A (JP)
Title: Data processor
Inventor: AOKI TOMOKAZU
IPC: G11C29/34
Filed: 1994-09-30
Abstract: PURPOSE: To easily check a product by diagnosing a cache memory part in the defective cell detection mode by a memory diagnostic circuit to output at least position information of a defective cell as the diagnostic result. CONSTITUTION: A diagnostic circuit 6 diagnoses a cache memory 3 in the defective cell detection mode and outputs defect position data indicating the position of the defective cell, which should be substituted with a redundant cell block, by the address or the bit flag as the diagnosis result. Therefore, the logic tester which tests a logic part like a CPU core 2 is used to set the defective cent detection mode at the time of product check of a data processor, thereby obtaining the defect position data in the same form as the logic part. Thus, not only it is unnecessary to prepare a memory tester for the test or the memory 3 but also the test of the CPU core 2 and the test of the memory 3 are continuously performed. That is, products of the data processor are easily checked, and the time required for check of a large quantity of products is shortened.
Patent JP-H1090303-A (JP)
Title: Probe incorporating high frequency circuit
Inventor: KIYOTA SHIGEO
IPC: H01L21/66
Filed: 1996-09-11
Abstract: PROBLEM TO BE SOLVED: To avoid various losses and the like by holding an electrode and a ground formed of metallic sheets interposing an insulating material and incorporating a microwave circuit at a specific part of a conduction line constituted of the electrode and ground. SOLUTION: A metallic thin sheet electrode 1 having spring properties is held between thin sheet grounds 3 and 3' having spring properties via an insulating body 2. A microwave circuit is incorporated at a part of a transmission line constituted of the electrode 1 and grounds 3, 3' where influences by an electric field are negligible. The incorporated microwave circuit is a circuit utilizing a distribution constant theory, e.g. a filter, an impedance conversion circuit, a transmission line, an amplifier, a comparator, etc. A single or a plurality of the circuits are incorporated. If the electrode 1 and grounds 3, 3' are not required to be movable, these are not necessary to be formed of metallic thin sheets of spring properties. The insulating material 2 may be air.  Since the electrode 1 and grounds 3, 3' are sheet-like parts, there is no restriction to a space in a plane direction, so that the microwave circuit can be arranged easily in a probe.
Patent JP-H06204161-A (JP)
Title: Method for forming source/drain on semiconductor element
Inventor: UU BON RII
IPC: H01L21/265
Filed: 1993-10-19
Abstract: PURPOSE: To form a source and a drain of a shallow bond by a method wherein after impurity ions for forming the source and the drain are implanted in a semiconductor substrate, Ar<+> ions are implanted under an impurity ion implanted layer to form an amorphous layer and thereafter, a heat treatment is performed. CONSTITUTION: Impurity B11 or BF12 ions for forming a P<+> source and a P<+> drain are implanted in a semiconductor substrate and thereafter, Ar<+> ions are implanted under this P<+> impurity non implanted layer. An amorphous layer is formed and a heat treatment is performed to obtain the source and the drain of a shallow bond. If the Ar<+> ions are implanted in such a way and the amorphous layer is formed, holes are abundantly formed in this layer and the degree of diffusion of boron within the substrate during the heat treatment is reduced. Thereby, the source and the drain of the shallow bond are formed. That is, the diffusion of the boron within the substrate is prevented by the armorphous layer formed by the implantation of the Ar<+> ions and the source and the drain of the shallow bond are formed.
Patent JP-S61138277-A (JP)
Title: Control device for fixing temperature
Inventor: SOUMA TAKATAMI
IPC: G03G15/20
Filed: 1984-12-10
Abstract: PURPOSE:To make possible fixing to various kinds of recording paper with stable quality by an image recorder in such a manner as to detect the manual feeding of paper and the feeding of multiple sheets from a cassette and to set the fixing temp. to keep said temp. high during the manual insertion. CONSTITUTION:The output of a temp. sensor is inputted to a bridge circuit. A slight change component is amplified by an amplifier AMP1 and is inputted to a relational amplifier AMP2. The reference voltage of a comparator is regulated by variable resistors VR1, VR2 and is set at the temp. for the feeding of desired multiple sheets, for example, 175 deg.C. The detection sensor from a manual insertion sensor and paper discharge sensor is inputted to a set-reset flip-flop RSFF which turns off transistors Tr1 and Tr2 to keep the reference temp. higher by, for example, 10 deg.C from the start of the manual feeding of the paper until the discharge of said paper. A relay SSR is turned on to pass electric current to a heater and to control the temp. of a fixing device when the AMP2 detects the reference temp. difference and outputs the same. The fixing with the stable quality is thus executed even if the paper of a different kind is inserted manually to the machine.
Patent JP-H06108022-A (JP)
Title: Production of self-adhesive tape
Inventor: YAMANO KOICHI
IPC: C09J7/02
Filed: 1992-09-30
Abstract: PURPOSE:To produce a single- or double-coated self-adhesive tape with a smooth self-adhesive surface or surfaces at a productivity not lower than that of the conventional process. CONSTITUTION:A single-or double-coated self-adhesive tape is produced by laminating an incompletely aged self-adhesive layer 1 formed from a two- component crosslinkable acrylic compsn. and a release sheet 2 to at least one side of the base 3, winding the resulting laminate a, and almost completing the aging reaction of the self-adhesive layer 1 in a state of being kept wound.
Patent JP-H01105594-A (JP)
Title: Printing method for cream solder
Inventor: KATO HIROYASU
IPC: H05K3/34
Filed: 1987-10-19
Abstract: PURPOSE:To accurately position an electronic component on a pattern by removing part of the lead of an electronic component along the lead of the component on the patterns of a printed substrate, coating it with cream solder, and exposing parts of the patterns. CONSTITUTION:The lead of an electronic component A to be placed on the pattern 15 of a printed substrate 14 is coated with cream solder 16 while retaining the part. Since the parts of the pattern 15 are exposed, the exposed parts can be recognized by a recognition unit, and the leads of the component A are accurately positioned on the substrate 14 without employing a reference mark at the time of placing the component A.
Patent JP-2000091423-A (JP)
Title: Multilayer wiring semiconductor device and its manufacture
Inventor: YAMADA NAOTO
IPC: H01L23/522
Filed: 1998-09-16
Abstract: PROBLEM TO BE SOLVED: To sufficiently enlarge the contact area of multilayer wiring structure without changing etching conditions. SOLUTION: This device is formed of a first wiring layer 2 and a second wiring layer 4, which are insulated by a first inter-insulating layer film 3. An opening 4c is formed in the center area of the second wiring layer 4 through patterning. The opening 4c is used as a mask in subsequent processes. Since there is no need for the opening 4c to be formed by etching, the change of etching conditions is not required. Furthermore, a second inter-insulating layer film 5 is formed on the surface side of a second wiring film, a first contact hole 6 is formed in the second inter-insulating layer film 5, and a second contact hole 7 is formed in the first inter-insulating layer film 3. The second contact hole 7 is formed with the second wiring layer 4 as the mask, and the first contact hole 6 is connected to the second contact hole 7 through the opening 4c.  The cross sectional area of the first contact hole 6 is larger than the cross sectional area of the opening 4c. All the wiring layers are connected with sufficiently large contact areas without changes in the etching conditions.
Patent JP-H08120683-A (JP)
Title: Earth lifting and removing device in pneumatic caisson method and method therefor
Inventor: KAMIO MASAHIRO
IPC: E02D23/06
Filed: 1994-10-26
Abstract: PURPOSE: To eliminate pneumatic caisson work with a pneumatic caisson method under compressed air, make it possible to carry out work under high compressed air at great depth, carry out earth lifting work in succession, make it possible to reduce the number of reduced pressure/pressurization to promote earth lifting efficiency and to enable the whole device to make compact without requiring extension of pressure vessels in a material lock. CONSTITUTION: A floor board 10a is provided to the bottom of a caisson 10, excavation is made under the floor board 10a as an air-tight pneumatic operation room 11 while supplying compressed air thereto, and in a pneumatic caisson method for settling the caisson 10, material lock pressure vessels 4b are installed on the upper part of the floor board 10a. Traveling hoppers 2 movable to the outsides of the pressure vessels 4b are provided to the insides of the material lock pressure vessel 4b and, at the same time, conveying trucks 3 connected to the traveling hoppers 2 are provided to the outsides of the material lock pressure vessels 4b at the upper part of the floor board 10a. A clamshell 1 is provided to the inside of a material lock 4 connected to the pneumatic operation room 11 in a liftable manner.
Patent JP-H06224521-A (JP)
Title: Integrated short-cavity laser
Inventor: RUUBEN SEODOA KORINZU
IPC: H01L33/30
Filed: 1993-10-20
Abstract: PURPOSE: To manufacture a single-mode semiconductor laser of low power consumption which is capable of being integrated with an OEIC and easily coupled with fiber at low cost. CONSTITUTION: On a substrate 200 of an InP or GaAs or the like, the P<+> -layer 205 of AlInAs or GaAlAs or the like, an active layer 207 of InGaAsP, an n<+> - layer 209 of AlInP or InP or the like and an (n)-contact 113 are formed. By etching, a length is made to be less than ten times an oscillation wavelength, surface edges 215 and 217 at both ends are formed vertically with respect to the layer surface of the active layer 207, Bragg reflectors 107 and 109 are formed on it, and a resonator is formed. Also, an optical fiber is fixed by utilizing a groove which is worked on the substrate 200 and the edge 127 of the groove, so as to bring the end face of the optical fiber 120 into a close distance of 1-5 μm from the surface of an output side Bragg reflector 107.  Thus, structurally this laser is manufactured by a normal planar semiconductor manufacturing technique at a low cost and efficiently performs low power consumption operation in a single mode, because of a short resonator.
Patent JP-H01102566-A (JP)
Title: Film splicing device
Inventor: URA HIRONAGA
IPC: G03D15/04
Filed: 1987-10-16
Abstract: PURPOSE:To surely eliminate bubbles left in a spliced tape, and also, to improve the workability by providing a tape pressing member which can press the splicing tape for connecting a film and a leader, so as to be slidable along the upper face of a leader supporting base. CONSTITUTION:On a leader supporting base 1 which can position relatively the tip of a film F drawn out of a film containing container P, and one side of the outer periphery of a leader L connected to the film F by sticking a splice tape T, the leader L and the film F are positioned relatively and the splicing tape T is stuck. Subsequently, a tape pressing member 10 is pressed against the spliced tape T and brought to reciprocating motion along the upper face of the leader supporting base 1, and the spliced tape T is pressed extending over the whole. In such a way, when the bubbles left in the spliced tape T, the bubbles can be removed, and also, the splice can be executed efficiently.
Patent JP-H01102580-A (JP)
Title: Image forming device having internal cooling device
Inventor: YAMASA HIDEO
IPC: G03G15/00
Filed: 1987-10-16
Abstract: PURPOSE:To miniaturize the title device, and also, to prevent a developer from being scattered due to a ventilation by utilizing a thermoelement which has utilized a semiconductor, as a cooling source. CONSTITUTION:An internal temperature detecting means 1 is attached to a part where a temperature detection is necessary, of an image forming device 10, and a control means 2 compares an actual internal temperature which is detected by the internal temperature detecting means 1 with a temperature set in advance and decides whether it is higher or not, and outputs a temperature control signal based on its decision. As for a thermoelement 3, a semiconductor is utilized, and in accordance with a temperature control signal from the control means 2, a cooling process is executed. In such a way, the device is miniaturized, and also, it does not occur that a developer is scattered due to a ventilation.
Patent JP-H0977078-A (JP)
Title: Packaging box
Inventor: GOTO HIROSHI
IPC: A45C11/00
Filed: 1995-09-14
Abstract: PROBLEM TO BE SOLVED: To simply fit a sheet in and demount the same from a packaging box without using a pressure-sensitive adhesive tape. SOLUTION: Slits 26 in one-fourth circular arc are formed at least at diagonal corner parts of a bottom wall 3 of a packaging box 1, and corner parts of a sheet 27 made of cardboard, whose planar shape is smaller than that of the bottom wall 3 of the packaging box 1, are inserted into the slits 26.
Patent JP-H02109670-A (JP)
Title: Correcting device for adjusting wheel in centerless grinder
Inventor: MAEDA MICHIO
IPC: B24B5/30
Filed: 1988-10-18
Abstract: PURPOSE:To easily perform grinding and the re-correction of an adjusting wheel by providing a correction means equipped with a correction tool correcting the adjusting wheel on the revolving base fixed to a revolving shaft. CONSTITUTION:At correction time, a bearing housing 9 is fixed to an adjusting wheel base 4 so that an adjusting wheel 1 is inclined by the desired inclination first, also a revolving shaft 8 is fixed to the adjusting wheel base 4 so that the moving direction of a correction tool 33 is inclined by the desired correction angle for this inclined adjusting wheel 1 and correction is executed in the state like this. Grinding is then performed in the state of as it is and at the re- correction time, the correction is performed in the state of as it is. By the way the machine rigidity is increased and high accuracy can be obtd. by fitting a correction device 2 not to a bearing housing 9 but to the adjusting wheel base 4.
Patent JP-H09222596-A (JP)
Title: Liquid crystal display
Inventor: CHIYANDORASEKAARU NARAYAN
IPC: G02F1/13
Filed: 1996-10-03
Abstract: PROBLEM TO BE SOLVED: To obviate the occurrence of the disturbance of the adequate function of a liquid crystal material by providing an optical flat substrate with sufficient hardness in order to prohibit the deformation which impairs the flatness of a wafer. SOLUTION: A base material 4 constitutes the supporting layer of a reflection layer 2. An electro-optically active liquid crystal liquid medium 6 is arranged on the upper part of this reflection layer 2. A transparent conductive layer 8 and a transparent insulating layer are respectively successively arranged on this liquid medium 6. The wafer 4 has a front surface 3 and a rear surface 5, respectively. The reflection layer 2 is formed in the form of Miller pixels on the front surface 3 of the semiconductor wafer 4 and, thereafter, the wafer 4 is cut to a required size. This cut wafer is laminated on the substrate having the optically flat surface 15 in such a manner that the entire part of the array is made flat. In such a case, the substrate needs be sufficiently hard to withstand the deformation to impair the flatness of the wafer 4.
Patent JP-H02111024-A (JP)
Title: Manufacture of semiconductor device
Inventor: YAMAZAKI AKIRA
IPC: H01L21/316
Filed: 1988-10-20
Abstract: PURPOSE:To obtain a semiconductor element whose breakdown strength is high ad whose leakage current is low and to execute an etching operation easily by using a hydrofluoric acid-based aqueous solution by a method wherein a silane is reacted chemically with dinitrogen oxide and the content of oxygen in a polycrystalline silicon film is 46 to 60atomic%. CONSTITUTION:A silane is reacted with dinitrogen oxide; a polycrystalline silicon film 6 is formed; oxygen in the polycrystalline silicon film 6 is set at 46 to 60atomic%. Accordingly, a concentration of oxygen in the polycrystalline silicon film 6 becomes high. Thereby, it is possible to obtain a semiconductor element whose breakdown strength is high and whose leakage current is low; at the same time, the polycrystalline silicon film can be etched easily by using hydrofluoric acid-based aqueous solution; a process can be simplified.
Patent JP-S63116555-A (JP)
Title: Thermal transfer recorder
Inventor: KOMATA YASUKUNI
IPC: B41J2/325
Filed: 1986-11-04
Abstract: PURPOSE:To decrease a device cost by equalizing essentially the arranging interval of a thermal head and the interval of a reading position on an original by respective image sensors. CONSTITUTION:The rays of light from respective beams 2a-2c irradiate an original A, and an interval L, in which respective reading positions P1-P3 on the original A by respective line sensors (CCD) 4a-4c are adjoining, and respective intervals (l), in which respective thermal heads 18a-18c are provided, are formed essentially to be L=l. Since the traveling speed of an original platen 1 and the circumferential speed of a platen roll 14, namely, the carrier speed of a recording paper 12 are coincident, the color separating signal of an original image read from respective CCD4a-4c is outputted to thermal heads 18a-18c one by one line and a color printing can be executed. Thus, it is sufficient only to use a memory to store the image information by one line and the device cost with a simplified constitution can be decreased.
Patent JP-H0686231-A (JP)
Title: Video signal recording and reproducing device
Inventor: SATO KOICHI
IPC: H04N9/896
Filed: 1992-09-04
Abstract: PURPOSE:To reproduce a video signal in recording with fidelity even when jitter is generated in a disk driving device in the recording and reproduction of the video signal by adding a burst signal on the addition signal of a luminance signal and a synchronizing signal. CONSTITUTION:The addition signal Y+S of the luminance signal Y and the synchronizing signal S is inputted from a camera part to a synchronizing signal separation circuit 10, and a horizontal synchronizing signal is separated. A burst gate pulse is generated at a prescribed timing at a pulse generation circuit 20. A burst signal outputted from a circuit 40 and the burst gate pulse are inputted to a gate circuit 30. The burst signal is inputted to an adder 35 in a period where the burst gate pulse is turned on, and the burst signal is added on the Y+S signal. A start flag is added on the signal at an adder 47, and frequency modulation processing, etc., is applied to the signal at a processing circuit 50, and it is recorded on a magnetic disk 70 by a magnetic head 60. The head 60 reads a recording signal, and it is demodulated at a circuit 90, and reproduction is performed by applying A/D and D/A conversion to the signal via a clock signal generated from an extracted burst signal.
Patent JP-H11103492-A (JP)
Title: Portable communication terminal
Inventor: NAKAGAWA JUNJI
IPC: H04B7/26
Filed: 1997-09-29
Abstract: PROBLEM TO BE SOLVED: To make it possible to communicate to a user that an electric field intensity lowers without making the user or those around the user feel unpleasant in a portable communication terminal. SOLUTION: When a signal from a base station is received by way of an antenna 1 and its electric field intensity is measured by a reception level detection part 3, a control part 11 compares the measured electric field intensity with a reference value and when it is judged that the measured electric field intensity is lower than a first reference value as the result of comparison, a driving signal is transmitted and a vibrator driving circuit 8 drives a vibrator 7 on the basis of the driving signal.
Patent JP-H10112009-A (JP)
Title: Production of composite type thin-film magnetic head
Inventor: KOBAYASHI SHINJI
IPC: G11B5/31
Filed: 1996-10-04
Abstract: PROBLEM TO BE SOLVED: To improve the yield of production stages in a process for producing a composite type thin-film magnetic head which is formed with the surfaces of upper core layers as flat surfaces and obviates the occurrence of distortions in recording patterns. SOLUTION: Plural stock removal detecting layers 7, 70, 71, 72 varying in the height in a film thickness direction are formed by a resist layer forming stage forming resist layers 6 having plural openings 6a, 6b, 6c, 6d varying in the opening areas on a substrate 1 and a plating stage for applying plating by an electroplating method on the opening regions of the resist layers 6. The plural stock removal detecting layers 7, 70, 71, 72 are so formed that the height of the stock removal detecting layer 72 having the lowest height in the film thickness direction is lower than the surface of the lower core layers 5 before plane polishing and that the height of the stock removal detecting layer 7 having the highest height is higher than the surfaces of the lower core layers 5 after the plane polishing. The surfaces of the lower core layers 5 and the stock removal detecting layers 7, 70, 71, 72 are simultaneously subjected to the plane polishing while the number of the stock removal detecting layers 7, 70, 71, 72 appearing on the polished surfaces is detected.
Patent JP-S63117364-A (JP)
Title: Magnetic disk device
Inventor: HAMADA TAIZO
IPC: G11B17/34
Filed: 1986-11-05
Abstract: PURPOSE:To position a pad accurately on the center of rotation of a magnetic disk at all times by providing a 1st horizontal positioning means which is fitted onto at least one of pad height determining pins and a 2nd horizontal positioning means which fits a pad plate and a spindle to each other. CONSTITUTION:This device is equipped with a magnetic head 13 for recording and reproducing information on and from the magnetic disk, the spindle 42 for rotating the magnetic disk, and the pad 46 for holding the contact between the magnetic disk and magnetic head 13 excellent. In this case, the pad 46 is fixed to the pad plate 44 and two pad height determining pins 47a and 47b are provided to a substrate where the spindle 42 is fixed; and the pad 46 or pad plate 44 is provided with the 2nd horizontal positioning means which is fitted onto at least one of the two pad height positioning means 47a and 47b and the 2nd horizontal positioning means which is fitted to the pad plate 44 and spindle 42. Consequently, the pad is accurately positioned in both the height direction and horizontal direction in an operation state at all times.