baber/WOPTO huggingface dataset:
Patent TW-509896-B (TW)
Title: Tray for a CD or DVD drive
Inventor: AL-ASKARI RAAD
IPC: G11B17/04
Filed: 2000-12-27
Granted: 2002-11-11
Abstract: The is put forward a tray for a CD/DVD drive. The usual drive tray comprises a receiving location for CDs with a normal format and also for mini-CDs. The receiving location is formed by a receiving surface. The receiving surface is provided with a multitude of pin receivers. By way of positioning pins, which may be inserted into the pin receivers there are formed bearing edges. Special shapes of CD/DVD may now be precentered and held by the positioning pins until the drive tray is retracted into the drive and the drive is ready for operation.
Patent TW-I232241-B (TW)
Title: Method of regenerating a phase change sputtering target for optical storage media
Inventor: WEN ALEX JYH-CHUNG
IPC: C23C14/34
Filed: 2001-03-13
Granted: 2005-05-11
Abstract: A method of regenerating a phase change sputtering target for optical storage media. First, recycle a used sputtering target composed of a powder-metallurgy material, an adhesion material, and an alloy backing plate. Then, separate the powder-metallurgy material from the alloy backing plate. Next, scrape the adhesion material from the recycled powder-metallurgy material. Thereafter, process the surface of the recycled powder-metallurgy material. Finally, place the alloy backing plate, a new adhesion material, the separated sputtering target, and a new powder into a vacuum thermal-pressure furnace in sequence to perform a thermal-pressure process. This completes a new sputtering target.
Patent TW-517494-B (TW)
Title: Image processing apparatus and image display apparatus using same
Inventor: YOSHIDA YASUHIRO
IPC: G09G3/20
Filed: 2001-03-14
Granted: 2003-01-11
Abstract: An image processing apparatus of the present invention comprising (a) a first signal processing circuit for applying gamma correction to an n-bit (n: a natural number) digital signal inputted as a video signal and for converting the n-bit digital signal into an m-bit (m > n, m: a natural number) digital signal, and (b) a second signal processing circuit for adding a noise signal, which is used for pseudo contour reduction, into the m-bit digital signal from the first signal processing circuit and for outputting a Q-bit (Q: a natural number) digital signal, which is obtained from rounding off a less significant (m-Q) bit (Q ≤ n) from the m-bit digital signal, to a display section.
Patent TW-509919-B (TW)
Title: Magnetic recording media with antiferromagnetically coupled host layer for the magnetic recording layer
Inventor: FULLERTON ERIC EDWARD
IPC: G11B5/66
Filed: 2001-03-22
Granted: 2002-11-11
Abstract: A magnetic recording disk has a magnetic recording layer formed on a special multilayered ""host"" layer. The host layer is a ""synthetic antiferromagnet"", i.e., at least two ferromagnetic films that are exchange-coupled antiferromagnetically (AF) to one another across a nonferromagnetic spacer film so that their magnetic moments are oriented antiparallel. The magnetic recording layer has a different composition from the top ferromagnetic film in the host layer and is ferromagnetically coupled to the top ferromagnetic film of the host layer. The magnetic volume V of the composite structure (magnetic recording layer and host layer) that determines the thermal stability will be approximately the sum of the volumes of the grains in the magnetic recording layer and the AF-coupled ferromagnetic films of the host layer. However, the magnetic moment of the composite structure is primarily just the moment from the magnetic recording layer because the host layer is designed to have essentially no net magnetic moment.
Patent TW-548255-B (TW)
Title: Method for heat-treating ceramics and tunnel furnace therefor, method and apparatus for manufacturing ceramic electronic components and carriers for use in heat-treating ceramic electronic components
Inventor: NAKANISHI HARUO
IPC: C04B35/64
Filed: 2001-04-26
Granted: 2003-08-21
Abstract: A method for effectively heat-treating ceramics and a tunnel furnace (200) therefor, a method and an apparatus for manufacturing ceramic electronic components (50) and carriers (20) for use in heat-treating same are provided. When ceramic products (50) containing therein a ceramic raw material is heat-treated in the tunnel furnace (200), an atmospheric gas is supplied to the tunnel furnace (200) through atmospheric gas supply pipes (5) from sides with respect to a transferring direction of the products (50) passing through the tunnel furnace (200); and concurrently gas in the furnace (200) is evacuated through an exhaust pipe 6 through a bottom portion of the tunnel furnace (200). Accordingly, a stable gas flow is made from the products (50) toward the bottom of the furnace (200) so that fresh atmospheric gas can be continuously provided to the products (50) being heat-treated.
Patent TW-548207-B (TW)
Title: Solid state fuel level sensing
Inventor: BENJEY ROBERT P
IPC: F02M37/00
Filed: 2001-05-07
Granted: 2003-08-21
Abstract: A pair of solid state pressure sensors are disposed near the bottom of a fuel tank vertically spaced with one a unit distance above the other. A third solid state sensor is disposed in the tank at the highest point under the upper wall. The apparent hydrostatic pressure is computed from the difference in pressure sensed by the highest and lowest sensors. The density is computed from the difference in pressure sensed by the pair of sensors near the tank bottom; and, the difference normalized for the vertical distance therebetween. The liquid level height is then computed from computed density and apparent pressure. The reserve volume of liquid fuel is then found for the computed height from a lookup table of values of liquid height and corresponding liquid volume.
Patent TW-I226024-B (TW)
Title: Method of establishing a security policy, and apparatus for supporting establishment of security policy
Inventor: SUGIMOTO TAKAHIRO
IPC: G06F1/00
Filed: 2001-05-30
Granted: 2005-01-01
Abstract: The purpose of the present invention is to provide a method of efficiently establishing a security policy and an apparatus for supporting establishment of the security policy. To achieve the object, a security establishment method is constructed according to six steps. Firstly a simple security policy draft is prepared, then proceeding adjustment of the realities of an organization if required, thus completing a security policy stepwise. Therefore, a security policy can be established in consideration of a schedule listing or budget of the organization.
Patent TW-493223-B (TW)
Title: Solder bump rework manufacture method of flip chip package
Inventor: LIOU FANG-CHANG
IPC: H01L21/28
Filed: 2001-06-29
Granted: 2002-07-01
Abstract: This invention provides a solder bump rework manufacture method of flip chip package. The solder bump of the inventive structure contains under bump metallurgy (UBM) formed between aluminum solder pads. The UBM contains a barrier layer and an under bump conductive material (conductor layer). The barrier layer is formed between the under bump conductive material and metal pads, in which the barrier layer contains titanium and the UBM contains copper. The invention also provides a kind of etching liquid containing solution of hydrogen peroxide and sulfuric acid used to peel off solder bumps so that rework process can proceed. The etching liquid has a high selectivity of the barrier layer to the under bump conductive material, which leads to a higher etching rate for the under bump conductive material than that of the barrier layer to peel of solder bumps. Because the barrier layer is used as an etching stop layer, the metal pads will not be damaged by the etching liquid during the solder bump peel-off process.
Patent TW-557375-B (TW)
Title: Optical substrate and method and apparatus for producing optical substrates
Inventor: KLIPPE LUTZ
IPC: G02B1/115
Filed: 2001-07-02
Granted: 2003-10-11
Abstract: In order for an optical substrate on which one or more layers are arranged, by which the propagation of light is influenced, to be less time-consuming to fabricate, and for this optical substrate preferably to exhibit significantly lower surface strains, the use of an application method and an optical substrate produced in this way are described, in which at least one of the layers comprises halogen atoms or a halogen compound as a result of the production process.
Patent TW-552266-B (TW)
Title: Method for preparing saturated polyester with excellent mechanical properties
Inventor: JO DEOG-JAE
IPC: C07F5/06
Filed: 2001-07-27
Granted: 2003-09-11
Abstract: Disclosed is a method for preparing saturated polyester used in various molded products, such as films, synthetic fibers, vessels and housings. In particular, the method improves mechanical properties, including tensile strength or impact resistance, of saturated polyester. In DMT method or TPA method, the saturated polyester is synthesized through transesterification or esterification and polycondensation, in which metal compounds, such as metal acetate compounds, metal metal hydroxides, and metal oxides, are added in the larger amounts upon synthesis, and thus crystalline internal grains are formed, thereby improving the mechanical properties. As such, the metal compound can be used alone or in combination with a phosphorous-based compound.
Patent TW-522369-B (TW)
Title: Picture display device
Inventor: OUCHI TAKAYUKI
IPC: G09G3/20
Filed: 2001-08-27
Granted: 2003-03-01
Abstract: A practical-purpose structure of an active-matrix display device digitally driven with vertical scanning being multiplexed includes a vertical driver having sequential circuits and logic circuits provided on a bit-by-bit basis and arranged for adding sequentially products of outputs of the sequential circuit/logic circuit and a control signal for dividing a horizontal scanning period, and a horizontal driver having line latches provided on a bit-by-bit basis and arranged for adding sequentially products of outputs of the line latches and the control signal for dividing the horizontal scanning period. Enhanced luminance of display, manufacturing at low cost and high image quality can be realized with a reasonable wiring density.
Patent TW-515101-B (TW)
Title: Method for fabrication of field-effect transistor
Inventor: HIGASHI SEIICHIRO
IPC: H01L29/49
Filed: 2001-09-04
Granted: 2002-12-21
Abstract: In the present invention relating to method for the fabrication of a field-effect transistor, after forming a semiconductor layer serving as an active layer on a substrate, the substrate temperature is set at no higher than 100 DEG C, a gate insulating film is formed on the semiconductor layer. Then, the gate insulating film is heat treated in an atmosphere containing water. By heat treating in the atmosphere containing water, OH bonds in the vicinity of the insulating film interface are reduced and, therefore, the CV characteristic thereof is improved.
Patent TW-531854-B (TW)
Title: Wafer level fan-out packaging process
Inventor: YANG WEN-KUEN
IPC: H01L23/02
Filed: 2001-09-25
Granted: 2003-05-11
Abstract: The present invention is a semiconductor packaging technology, especially relating to a method of wafer level fan-out packaging process. The present invention comprises selecting the die after dicing, gluing the die on the glass base, and the I/O connector of metal pad glued on the die is processed through a special material/way, i.e. the position of I/O connector is extended in the way of fan-out so that the contact point is extended into the die edge and even the exterior of die, the fan-out of contact point has a larger range to implant the I/O implanted ball, therefore, the number of I/O implanted ball is increased to add more I/O contact points, and also the problems of signal coupling due to too close pitch and solder bridge due to too close solder connector are decreased. The characteristic of the present invention is to use the original packaging machine without additional cost. At the same time, the present invention can be applied to the 8 inch and 12 inch packaging process, and comprises die, capacitor and multi-chip or plural passive devices, such as CPU, DRAM, SRAM packaging processes on the packaging base. In addition, since the base selected is glass base, the unbalanced stress problem due to different materials used between different layers do not occur, so as to enhance the reliability.
Patent TW-560018-B (TW)
Title: A wafer level packaged structure and method for manufacturing the same
Inventor: LI JENG-GUO
IPC: H01L23/13
Filed: 2001-10-30
Granted: 2003-11-01
Abstract: A kind of wafer level packaging structure capable of completing packaging structure for the corresponding device in the wafer stage and its manufacturing method are composed of two or more than two pieces of substrates. On the substrate, the manufacturing process for each kind of semiconductor devices or optical devices (such as microlens and so on) or MEMS devices or bio-medical devices or the passive devices such as inductor, resistor, capacitor, and the process related to each kind of thin film and thick film materials such as coating, film deposition, dry etching, wet etching, electroplating, planarization and so on, are conducted. In the wafer stage, the operation of wafer scale assembling and integration between each kind of bare chips and the functional substrates are conducted. In the wafer stage, the alignment and initial attachment for wafer-to-wafer is conducted, so as to form a compound wafer structure having the initial interface bonding strength through the assistance of a microstructure. In the wafer stage, a wafer scale encapsulation operation is conducted onto the compound wafer having the initial interface bonding strength, so as to form a completely sealed interface for the packaged interface in between the devices corresponding to each system package module or the wafer scale package. The package structure corresponding to the individual system package module is provided with the design and function of electric connection and thermal transmission path. Under the wafer stage, for each system package module with the completed sealing interface, the individual system package module can be separated by the acquainted procedures such as the semiconductor chip dicing procedure and so on.
Patent TW-517357-B (TW)
Title: Chipset packaging framework with ball grid array package
Inventor: JANG NAI-SHUEN
IPC: H01L23/31
Filed: 2001-11-02
Granted: 2003-01-11
Abstract: A kind of chipset packaging framework with ball grid array package is disclosed in the present invention. In the invention, the front side layout layer at least includes plural inner ring power source regions and outer ring power source regions. These inner ring power source regions are adjacent to and located at the periphery of the center region for bonding chips. And, each inner ring power source region has about the same width. The outer ring power source regions also have the same width and adjacently surround the entire inner ring power source regions. Correspondingly, the backside layout layer also has many interface power source soldering balls and core power source soldering balls. These interface power-source soldering balls are divided into plural inner ring power source soldering ball groups; and each inner ring power source soldering ball group corresponds and connects to one of the inner ring power source regions. The core power source soldering balls are connected to the outer ring power source region; and these core power-source soldering balls surround the entire interface power-source soldering balls. The present invention is capable of effectively reducing the inductance effect, so as to provide more stable power transmission quality.
Patent TW-508696-B (TW)
Title: Method for etching of mask layer and passivation layer of metal contact windows
Inventor: HUANG TSAI-YU
IPC: H01L21/033
Filed: 2001-11-06
Granted: 2002-11-01
Abstract: The present invention relates to a method for etching mask and fuse passivation layers, which includes the following procedures: first, forming a mask layer and a patterned photoresist on a semiconductor base and some parts of the mask layer surface, respectively; then forming, in compliance with the formations, a sacrifice layer of thickness less than the thickness of the photoresist on the surface of the patterned photoresist thereby forming a ramp-shaped pattern on the side wall of the patterned photoresist layer; and finally using the patterned photoresist and the ramp-shaped sacrifice layer as masks to etch the mask layer to form several metal contact windows. In accordance with the present invention, undercut that generally occurs can be avoided.
Patent TW-550855-B (TW)
Title: Triple-band compact planar monopole antenna
Inventor: WENG JIN-LU
IPC: H01Q1/38
Filed: 2001-11-09
Granted: 2003-09-01
Abstract: The present invention is related to a new design of triple-band compact planar monopole antenna. The invented antenna is manufactured on a ceramic layer and mainly includes the first metal line and the second metal line. The first metal line can generate two resonance modes, which are close to 900 and 1900 MHz, respectively. In addition, the length of the metal line is smaller than 0.18 wavelength of the 900MHz, and is much smaller than the conventionally required 0.25 wavelength. The second metal line can generate one resonance mode close to 1800 MHz; and the length of the metal line is smaller than the conventionally required 0.25 wavelength. Through the use of the combination of three resonance modes generated by the first and the second metal lines and having an antenna with an area only 20x11 mm<2>, the invented antenna is very suitable for use in GSM/DCS/PCS three-band operated mobile phone.
Patent TW-I234432-B (TW)
Title: Formula for suppressing growth of crops
Inventor: GUO SHUEI-JIU
IPC: A01N25/00
Filed: 2001-12-05
Granted: 2005-06-21
Abstract: This invention relates to a formula for suppressing growth of crops. It mainly comprises certain proportion of camphor oil, citronella oil and potato starch. The mixture is sprayed upon the crops to suppress the growing speed of them and delay their recovery time. Because the formula is completely composed of natural substances easily obtained, the land and the crops would not be polluted after applying the formula. Thus, the formula can concurrently achieve dual merits of decreasing the cost, and ensures environmental protection and safety.
Patent TW-I226780-B (TW)
Title: Method for enabling a mobile phone to automatically dial multiple sets of phone numbers of same contact person
Inventor: HE DAI-SHUEI
IPC: H04M1/00
Filed: 2001-12-13
Granted: 2005-01-11
Abstract: The invention relates to a method for enabling a mobile phone to automatically dial multiple sets of phone numbers of same contact person, which creates a database in the memory of a mobile phone used to store a phone book. The database can be used to store multiple phone numbers of any contact person set up by the user so as to record all the phone number of each contact person. When detecting the dialing signal of one set of input keys inputted by the user targeting at any contact person, a CPU of the mobile phone proceeds a dialup connection with one set of phone number in setup. If the dialed number is detected to be busy, it automatically searches other sets of phone numbers of the contact person in the database and automatically shows the searched phone numbers on a display device so that the user can keep choosing to dial other set of phone number. As such, it can effectively diminish the trouble of the user in repeatedly searching other sets of phone numbers of contact person so as to surely attain the goal in transmitting mutual messages at the first timing.
Patent TW-536412-B (TW)
Title: Game execution method where player replaces the role of a conventional game device computer and a device thereof
Inventor: YANG NAN-PING
IPC: G07F17/32
Filed: 2001-12-26
Granted: 2003-06-11
Abstract: The present invention provides a game execution method where a player replaces the role of a conventional game device computer and a device. The method mainly comprises allowing a player to play a leading character on the game device and selecting at least a pseudo-supporting-actor, such that the leading character can perform a game competition with said at least one pseudo-supporting actor in a one-to-many mode, and the game device determines the victory or defeat according to the competition result. Afterwards, the leading character conducts an addition/reduction operation on said at least one pseudo-supporting-actor, and the game device reviews whether the leading character has a sufficient score to support the maximum score of said at least one pseudo-supporting-actor; if yes, the game will be repeated; if no, the game will be terminated.
Patent TW-I223213-B (TW)
Title: Multiplierless pyramid filter
Inventor: ACHARYA TINKU
IPC: G06T1/20
Filed: 2001-12-27
Granted: 2004-11-01
Abstract: Embodiments of a multiplierless pyramid filter are described. An integrated circuit for image processing comprising a pyramid filter; said pyramid filter comprising a sequence of scalable cascaded multiplierless units, each of said units producing a different order pyramidally filtered output signal sample stream. The integrated circuit of claim 1, wherein at least one of said multiplierless units comprises a delay unit and three adders, said delay unit and adders being coupled to produce a higher order pyramidally filtered output signal sample stream and state variable signal sample stream from an input signal sample stream and a lower order pyramidally filtered output signal sample stream and state variable signal sample stream.
Patent TW-592026-B (TW)
Title: Electronic apparatus containing cooling unit for cooling heat generating component
Inventor: NAKAMURA HIROSHI
IPC: H01L23/36
Filed: 2002-02-05
Granted: 2004-06-11
Abstract: A cooling unit (23) comprises a heat sink (24) arranged adjacent to a heat generating component (17), the heat sink (24) having area dimensions greater than the heat generating component (17). A heat diffusing member (45) is arranged between the heat generating component (17) and the heat sink (24). A first heat conducting member (56) is interposed between the heat generating component (17) and the heat diffusing member (45), and a second heat conducting member (57) is interposed between the heat diffusing member (45) and the heat sink (24). The heat diffusing member (45) has a thermal conductivity higher than the second heat conducting member (57) and area dimensions greater than the heat generating component (17).
Patent TW-508278-B (TW)
Title: Setting device for sawblades
Inventor: ALBINSSON GORAN
IPC: B23D63/00
Filed: 2002-02-20
Granted: 2002-11-01
Abstract: Setting device for sawblades, where a saw tooth (10) to be set is bent by contact with a ridge (17) on one among two conical settlng rollers (14, 15), while the sawblade is squeezed between two cylindrical pressure rollers (12, 13) with axes which are parallel to the setting rollers but controllably displaceable, and the rotation of the setting rollers is adapted to the velocity of the sawblade by measuring the passage of the saw teeth past a measuring device and comparing with the angular position of the setting rollers.