baber/WOPTO huggingface dataset:
Patent JP-S624891-A (JP)
Title: Smut processing device for stainless steel strip
Inventor: TSUCHINAGA MASAMITSU
IPC: C23G3/02
Filed: 1985-07-02
Abstract: PURPOSE:To completely prevent the generation of the intergranular corrosion which becomes a cause of a gold dust flaw by providing a polisher polishing and cleaning the surface of a steel strip cleared off the pickling having a wet state to the outlet side of a pickling tank of the stainless steel strip. CONSTITUTION:A hot-rolled steel strip 1 is pickled with a pickling liquid 2 incorporated in a pickling tank, strained and conveyed with the support rolls 6 via the rubber rolls 3 for shielding the picking liquid. The polisher 5 is provided between the outlet side of the pickling tank and the support rolls 6 and the sprays 4-1, 4-2 of water or hot water are provided back and forth thereof. The polisher 5 is constituted by providing in parallel the acid-resistant brush rolls up and down. After diluting the acidic liquid on the steel strip 1 with the front spray 4-1 and polishing and cleaning it with the polisher 5, it is polished and cleaned with the rear spray 4-2 to remove a smut.
Patent JP-H0232078-A (JP)
Title: 4-amino-3-carboxy-naphthylidine derivative, production thereof and pharmaceutical composition
Inventor: ECHIENNU MANDESU
IPC: A61K31/44
Filed: 1989-06-05
Abstract: The compounds according to the invention correspond to the formula 
<IMAGE>
 in which R1 and R2 independently of each other denote the hydrogen atom, a C1-C6 alkyl group, a phenyl or benzyl group, or R1 and R2 with the nitrogen atom to which they are attached may form a saturated C4-C8 heterocyclic ring, R3 and R4 independently of each other denote the hydrogen atom or a C1-C6 alkyl group, R5 denotes a hydrogen or halogen atom or a C1-C4 alkyl, C1-C4 alkoxy, nitro or trifluoromethyl group, n is 1,2 or 3, and one of the symbols A, B, C and D denotes N and the others denote CH, and the N-oxides and their addition salts with phamaceutically acceptable acids and bases. 
<??>Medications.
Patent JP-S5569067-A (JP)
Title: Semiconductor test equipment
Inventor: CHIYOUKAI ISAMU
IPC: H01L21/66
Filed: 1978-11-21
Abstract: PURPOSE: To prevent an element from breaking down by preventing an abnormal voltage appearing between its gate and source by measuring thermal resistance by detecting a forward voltage by flowing a forward current to a Schottky barrier or PN junction only in a cooling period.  
     CONSTITUTION: Between the drain and source of gate Schottky barrier type or junction type FET20, pulse current 21 is flowed to rise the temperature of FET20. Here, a heating period is denoted (t 1 ), and a cooling period (t 2 ); only in cooling period (t 2 ), forward current IF is flowed between the gate and source and a forward voltage is measured for the measurement of thermal resistance. Therefore, an abnormal potential appearing between the gate and source can be prevented and an element breakdown caused by it can also be prevented. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-S61296122-A (JP)
Inventor: MAIKERU DEEBITSUDO TEIRAA
IPC: C04B35/622
Filed: 1986-06-21
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S5667854-A (JP)
Title: Photoreceptor for electrophotography
Inventor: UEDA HIROO
IPC: G03G5/05
Filed: 1979-11-07
Abstract: PURPOSE: To obtain good electrostatic images free from any decrease in charge potential at the uniform charging despite repetition of image reproduction by containing specific bisphenol compound into a resin layer dispersed with a phthalocyanine pigment which generates light carriers.  
     CONSTITUTION: A resin layer P consisting in containing the phthalocyanine pigment particles G which generate light carriers into a resin contained with the bisphenol compound expressed by the formula (R, R' are alkyl) is provided to a conductive substrate C, whereby the photoreceptor for electrophotography is obtained. As a result, the rate at which the carriers are trapped in the resin layer is low, and the carriers after exposure transfer rapidly to the photoreceptor surface and conductor layer; therefore, in the next uniform charging process, there are virtually no residual carriers owing to the trap in the resin layer, thus such as inconvenience that the uniformly charged charge in the photoreceptor surface couples to the residual carriers and lowers the surface charge potential as in conventional photoreceptors does not occur. 
     COPYRIGHT: (C)1981,JPO&Japio
Patent JP-S60175560-A (JP)
Inventor: UIRIAMU TEII BAARETSUTO
IPC: B03C1/22
Filed: 1984-07-11
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S5667720-A (JP)
Title: Zero adjuster of electronic weighing machine
Inventor: ITANI MORIKAZU
IPC: G01G23/37
Filed: 1979-11-06
Abstract: PURPOSE: To permit the zero adjuster of an electronic weighing machine to properly cope with the restrictions on the drawing range of the zero adjustment by directing the second memory to renew its content through the operation of the zero adjustment directing switch only when the output of the first subtracter is less than the set weight.  
     CONSTITUTION: The pulse P 1  generated immediately after a power is supplied causes the contents of first and second memories 6 and 12 to be set to an output value D of a load converter 1 at the time when the pulse P 1  is generated. The second memory 12 and the second subtracter 13 actuate a weight display means 2 to first perform a weight display of load value zero. Afterwards, when a zero adjustment directing switch 4 is operated because the zero point has moved, a discriminator 14 directs the second memory 12 to renew its content only when the output of the first subtracter 7 is less than a given set weight. Thus, the weight display means 2 displays a load value of zero again. When the output of the first subtracter 7 is more than the given weight, the discriminator 14 denies the operation of the switch 4 and directs a selective zero adjustment to be performed because the zero point has no reliability. 
     COPYRIGHT: (C)1981,JPO&Japio
Patent JP-S63797-A (JP)
Inventor: WAKABAYASHI YASUAKI
IPC: G07G1/12
Filed: 1986-06-20
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S5368938-A (JP)
Title: Interface circuit by serial transmission
Inventor: FUJITA MITSUAKI
IPC: G06F3/00
Filed: 1976-12-01
Abstract: PURPOSE: To reduce the number of signal lines and parts by reducing the number of signal lines and making line drivers and line receivers-which correspond to signal lines-needless and replacing them with a series-parallel converter, a parallel-series converter and a serial transmission line. 
     COPYRIGHT: (C)1978,JPO&Japio
Patent JP-S5932929-A (JP)
Title: Mixing apparatus
Inventor: SAKAI KUNIHITO
IPC: B01F15/04
Filed: 1982-08-18
Abstract: PURPOSE:To provide a mixing apparatus capable of obtaining a high quality electric material without generating pollution of an ambient environement caused by powder floated in air, by mounting a means for measuring a powder mixing ratio from the liquid level height of a mixture to the mixing apparatus for mixing a liquid and the powder. CONSTITUTION:Liquid resin 7 is introduced into a mixing container 13 from an introducing pipe 17 while a valve provided to the pipe 17 is closed directly after the liquid level thereof is gradually raised to contact with the leading end of a liquid detector 15 to enable the easy measurement of the resin amount. In the next step, the stirrer 14 is rotated and a feeder 1 is operated to gradually supply a silica powder 1 into the container 13. At this time, the powder 1 is floated in the container 13 but, because the space between the container 12 and the container 13 is closed perfectly and hermetically, ambient pollution caused by the leakage of the powder to the outside is prevented. As the powder 1 is mixed in the resin 7 within the container 13, the inner liquid level of the container 13 is raised along with the amount of the powder 1 and brought into contact with the leading end of a mixture detector 16. At the same time, the operation of the feeder 11 is stopped and a mixing ratio can be measured freely and accurately by adjusting the distance (l) between the leading ends of the detectors 15, 16.
Patent JP-S5570855-A (JP)
Title: Electrostatic recording method
Inventor: OONISHI MASARU
IPC: B41J2/40
Filed: 1978-11-21
Abstract: PURPOSE:To prevent fluctuations of recording concentration and occurrence of ghost due to  humidity conditions, by electrostatically recording by specifying the first and second control pulse  volatges applied to the control electrode and recording pulse voltage applied to the record pointer. CONSTITUTION:When a negative control pulse VC1 is applied to a control electrode 2, the potential VP in an electrostatic recording paper 6 having a dielectric layer suddenly attenuates when the humidity is high. Therefore, after extinction of pulse VC1, the capacity of the dielectric layer on  the paper 6 is inverted by the portion of the charged voltage, so that the potential VP is higher when the humidity is high than at the time of low humidity. After lapse of specified time td, a  control pulse VC2 of the reverse polarity as VC1 is applied and superposed on the potential VP, then the inverted potential VP on the paper 6 becomes higher when the humidity is high then at the  time of low humidity. When applying pulse VP2, if a recording pulse VN of the reverse polarity of voltage VC2 is applied to a recording pointer 1, the concentration of the electrostatic latent image  recorded when the humidity is high does not drop, so that fluctuations of recording concentration  due to humidity may not occur. When the control voltage pulse voltage is made longer in pulse  VC1 than in VC2, ghost occurring due to adjacent electrode may be similarly removed.
Patent JP-S5477176-A (JP)
Title: Measurement of approach effect coefficient of cable conductor
Inventor: SUGIYAMA KOUICHI
IPC: G01R27/02
Filed: 1977-11-30
Abstract: PURPOSE: To easily obatain the approach effect coefficient from the current flowing through a closed circuit and the induced voltage of a lead wire by feeding a current to a closed circuit, in which two cable conductors laid in parallel have their both terminals short-circuited, and by two voltage lead wires having opposite winding directions.  
     CONSTITUTION: Two cable conductors 1 and 2 are laid in parallel and are short- circuited at their terminals through short-circuiting wires, respectively, to form a closed circuit. A ring transformer 3 is used to establish a current I so that the current value is measured by a current transformer 4 and a current measuring  device 5. Voltage lead wires 9 and 10, which are spirally wound on the surfaces of  the cable conductors 1 and 2 at a preset pitch of distance l, are short-circuited at  their both terminals. An AC potentiometer 8 is connected between the other terminals so that the induced voltage V c  to be induced between the lead wired 9 and 10 when the current is flown between the conductors 1 and 2 is measured. The desired approach effect coefficient F p  is deduced from Equation (2). Here, ϕ stands for the phase difference between V c  and I, and RDC stands for the DC resistance per unit length of the conductors 1 and 2. 
     COPYRIGHT: (C)1979,JPO&Japio
Patent JP-S5572419-A (JP)
Title: Driving structure of cart
Inventor: FUKADA AKIO
IPC: B60K17/06
Filed: 1978-11-21
Abstract: PURPOSE: To widen a speed change range under a condition that power efficiency is heightened, by mounting one gear transmission between an engine and a non- stage speed change driving gear, in a cart that integrally drives not less than three  wheels left and right.  
     CONSTITUTION: A gear transmission 12 for stage speed change is interlocked and connected to an output shaft of an engine 5, two pairs of oil pressure system non- stage speed change gears 13, 13 consisting of variable capacity type oil pressure pumps 13a and oil pressure motors 13b connected to said pumps by means of closed circuits are interlocked and connected to the speed change shaft while gear system final reduction gears 14, 14 are interlocked and mounted to each speed change gear, and these output shafts 10, 10 and axles 7, 7 are interlocked and connected by means of chain transmission mechanisms 11, 11. According to such constitution, a speed change range can be widened heightening entire power efficiency by further speed-changing each of mechanical stage speed change ranges in a non-stage shape. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-H09330615-A (JP)
Title: Luminaire
Inventor: NAKAO HIROKI
IPC: F21V23/04
Filed: 1996-06-06
Abstract: PROBLEM TO BE SOLVED: To improve the light receiving performance of an optical signal receiving section, in an illuminator which controls the on and off or illuminance of illumination, based on the optical signal that the optical signal receiving section has received. SOLUTION: The lower body 3 is connected to the upper body 1 through a pipe 2. A fluorescent lamp 4 and an incandescent lamp 5a for spot are arranged at the bottom side of the lower body 3. An upper globe 7a and a lower globe 7b are arranged on the bottom side of the lower body 3 so as to cover the fluorescent lamp 4 and the incandescent lamp 5a, and the top of the upper globe 7a is made as far as the outside more than the peripheral end of the lower body 3, and as far as the upper part more than the topside of the lower body 3.  The light receiving axes of remote control light receiving sections 8a and 8b are roughly parallel with the topside of the lower body 3, and the distances L1 and L2 between the peripheral end of the lower body 3 on the side facing the light receiving windows 9a and 9b and the light receiving windows 9a and 9b are severally longer than the radius r of the lower body 3.
Patent JP-H04368561-A (JP)
Title: Earthquake-proof isolation floor
Inventor: TAKAMATSU NAOTAKA
IPC: E04B1/62
Filed: 1991-06-17
Abstract: PURPOSE:To constitute the performance and function of a quake-free floor system to be required in time of an earthquake so as not to be impaired. CONSTITUTION:A quake-free floor system 4 is set up in a building floor 5, setting up a quake-free floor frame 1 on this quake-free floor system 4, and an assemble floor 2 is installed on this quake-free floor frame 1, then an earthquake-proof apparatus 3 is mounted on this assemble floor 2. In this quake-free floor constituted like this, a dust layer 8 for interrupting an external ambience is installed in the quake-free floor system 4.
Patent JP-S6037340-A (JP)
Title: Power transmitter of construction machine
Inventor: UEHARA KAZUO
IPC: E02F9/20
Filed: 1983-08-10
Abstract: PURPOSE:To relieve shock to be encountered at the time of gear change by controlling a digital valve for controlling pressure and flow rate, provided between a clutch cylinder and a pump, by a signal of modulated pulse width according to information from detectors for a change lever and a change gear. CONSTITUTION:Command of a change lever 22 is put in a controller 23 ito which revolving numbers before and behind each switching clutch 4 and the temperature of a clutch plate are put from detectors (not illustrated). Digital signals of modulated pulse width are sent out to a digital valve 111 for controlling pressures. At the same time as oil pressure A is generated from the valve 111, oil pressure B is discharged from the digital valve 113 for controlling flow rates by output of the controller 23, and the pressure oils A and B are joined in a pipeline 12 to give oil pressure C to the clutching cylinder 13. The piston 13a is stroked to right before the clutch connection, and then the clutch 4 is connected by oil pressures which gradually rise thereafter.
Patent JP-H01314052-A (JP)
Title: Telephone equipment
Inventor: HIROTA KIYONORI
IPC: H04M1/00
Filed: 1988-06-13
Abstract: PURPOSE:To reduce the speech time by sending a voice signal of a level over a prescribed value to a telephone equipment in the holding state from an opposite side so as to release the holding an sending a message via a speaker of the telephone equipment. CONSTITUTION:When a holding release level detection circuit 23 does not detect a voice signal of a level over a prescribed level, a holding start/release circuit 22 applies the start of holding or its release according to the start of holding or its release of a holding key detection circuit 21, and when the holding release level detection circuit 23 detects a voice signal of the level over the prescribed level, the holding start/release circuit 22 applies holding release independently of the operation of the holding key detection circuit 21. Then a voice signal of a prescribed level or over is sent to the telephone equipment in the holding state from the opposite party to release its holding and a message is sent via a speaker of the telephone equipment. Thus, the speech time is reduced.
Patent JP-H01313773-A (JP)
Title: Fault diagnosis supporting device for on-vehicle electronic device
Inventor: HIRANO SHIGEAKI
IPC: G01M17/007
Filed: 1988-06-13
Abstract: PURPOSE:To easily execute an objective fault diagnosis by calculating the data of a sensor and an actuator, etc., obtained by an electronic controller which have been received by a tester by a computer, and providing a CRT screen for bringing the data to image display and a printer. CONSTITUTION:An electronic controller 1 to which a sensor 4 has been connected and which has an actuator, etc., and a tester 2 having a storage device 8 are connected by a wiring 7, so that data can be transmitted and received mutually by using a serial transmission system. Subsequently, a host computer 9 which is provided with a CRT screen 11 for graphing and displaying the data, and to which a printer 12 has been connected is connected to the tester 2 through an RS-232C communication circuit 10. In such a way, analog data information of the sensor and the actuator, etc., obtained from the electronic controller 1 can be brought to image display on the CRT screen 11, and data information can be printed, therefore, an objective fault diagnosis can be executed.
Patent JP-S63310551-A (JP)
Title: Manufacture of tube type incandescent lamp
Inventor: ODAGAKI TORU
IPC: H01K3/00
Filed: 1987-06-12
Abstract: PURPOSE:To prevent a filament coil from being hung down by raising an applied voltage gradually from that of less than a rated voltage, conducting flashing in which current is applied in a very short time at each voltage and rotating a sealing body about half turn in every flashing. CONSTITUTION:A sealing body 7 enclosing a filament structure 1 is held horizontally and flashed with a voltage such as 80V in a very short time. In this case, the filament coil 2 is hung down a little by gravity, so that the sealing body 7 is rotated by about half turn to make the filament coil 2 in upward-bow shape. Then, when flashing is conducted with a voltage such as 100V, the filament coil 2 is hung down a little to the opposite side, so that the filament coil 7 is rotated by about half turn. After repetition of this operation, current is applied at the rated voltage in a last stage and re-crystallization and aging are thus completed. By composing the lamp in the caption in this way, the filament coil 2 is prevented from being hung down.
Patent JP-2000339631-A (JP)
Title: Magnetic head, its manufacturing method and magnetic recording and reproducing device using the head
Inventor: ISHIWATA NOBUYUKI
IPC: G11B5/39
Filed: 1999-05-25
Abstract: PROBLEM TO BE SOLVED: To provide a composite magnetic head that the occurrence of dielectric breakdown in the tunnel barrier layer of a magnetic reluctance effect element is suppressed and narrow track width high density recording is made possible on a magnetic recording medium. SOLUTION: Relating to the composite magnetic head, a first magnetic layer 3 which is magnetically coupled to a magnetic yoke film 2, is laminated on the film 2 that forms a closed magnetic path including a magnetic gap. Moreover, a magnetic separation layer 4, a second magnetic layer 5 and an antiferromagnetic layer 6 are laminated. A pair of electrodes 1 and 7 are formed while holding the laminated bodies between them. A permanent magnetic film 8 is arranged to apply bias magnetic field to the layer 3. The layer 4 is made of an insulation body. Magnetic signals in the film 2 is detected by the ferromagnetic tunnel magnetic reluctance effect that a tunnel current flows between the electrodes 1 and 7 through the layer 4 and the current varies in accordance with the changes of the difference in the magnetization directions of the layers 3 and 5.
Patent JP-S5478011-A (JP)
Title: Muting circuit
Inventor: HORIIKE YOSHIO
IPC: H04B1/10
Filed: 1977-12-02
Abstract: PURPOSE:To eliminate noise at a switching time from a sub-channel to a main channel, by controlling a switch according to the slippage output of a discriminator in a FM receiver. CONSTITUTION:When the discriminator output is slipped to the positive or negative direction, this output is detected and amplified by circuit 6; and when the output has become over a prescribed value, the output is generated from circuit 7 to turn off switch 1 and cut off the input to sub-channel detector circuit 2. As a result, the noise at the time when switch circuit 4 has been just switched from circuit 2 to main channel circuit 3 can be eliminated.
Patent JP-H05343355-A (JP)
Title: Sputtering apparatus
Inventor: HARADA KAZUYUKI
IPC: C23C14/35
Filed: 1992-06-05
Abstract: PURPOSE:To form a thin film having uniform film thickness, film quality and step coverage on a surface of a wafer by improving a simple and easy structure in a sputtering apparatus which is so improved as to limit an incident angle of particle to be sputtered to form the thin film on the surface of a substrate to be treated to the substrate. CONSTITUTION:A sputtering apparatus has a placing base 3 for placing a target 2 on an upper part of a chamber 1 and a wafer 7 on a lower part to form a thin film of the material of the target 2 on a surface of the wafer 7, and comprises a pair of shielding plates 5 for limiting an incident angle of particles to be sputtered to be radiated from the target 2 to the wafer 7, a pair of magnets 4 for generating lines of magnetic force between the plates 5, a holding plate 6 for holding fixedly the plates 5 and the magnets 4, and driving means for reciprocating the plate 6.
Patent JP-2000338461-A (JP)
Title: Driving circuit, driving circuit system, biasing circuit, and driving circuit device
Inventor: TSUCHI HIROSHI
IPC: G02F1/133
Filed: 1999-05-26
Abstract: PROBLEM TO BE SOLVED: To drive a capacitance load with a simple circuit structure and a high current supply capability by controlling the currents between the drains and sources of both transistors. SOLUTION: An output voltage Vout becomes equal to an input voltage Nin when I1 and I3 are controlled so that the gate voltages Vgs1 (I1) and Vgs2 (I3) of the respective transistors 1, 2 become equal to each other. It is possible to obtain a highly accurate voltage output uninfluenced by the variations in the characteristics of the transistors by setting the element sizes and the currents I1, I3 of the transistors 1, 2 to be equal and setting the I1, I3 according to the ratio of the channel width ratio so that Vgs1 (I1)-Vgs2 (I3) will not change even though the transistor characteristics vary. Moreover, if the current I2 is controlled to be equal to the current I1, the driving circuit can easily be operated even when an external circuit for supplying the input voltage Vin has a low current supply capability.