Patent GB-1359315-A (GB)
Title: Fluid pressure braking system
IPC: B60T8/58
Filed: 1971-09-10
Abstract: 1359315 Antiskid braking systems BENDIX-WESTINGHOUSE AUTOMOTIVE AIR BRAKE CO 10 Sept 1971 [30 Sept 1970] 42249/71 Heading F2F An antiskid braking system comprises means such as a wheel speed counter 78 for generating a signal proportional to wheel speed, means such as differentiator 86 for generating a signal proportional to acceleration or deceleration of the wheel, means operable to relieve braking pressure in response to a predetermined value of wheel deceleration and means operable to restore braking pressure in response to a predetermined value of wheel acceleration subsequently and a cycle rate timer 110 generating a signal which overrides and disables the antiskid control device in response to the predetermined deceleration value G1 when a subsequent deceleration of the same value is not produced within a predetermined period of time, the pressure relieving means being operated and the cycle rate timer 110 being rendered inactive by means responsive to simultaneous low values of wheel speed and deceleration signals. Signals from a comparator 80 which produces a positive signal when the wheel speed signal indicates imminent wheel lock and from a comparator 84 responsive to a predetermined deceleration Go lower than G 1  are fed to an 'AND' gate 82 the output of which is fed to a flip-flop 90 and to an OR gate 88 the output of which in turn is fed to a second flip-flop 92 whose output is connected to an output control box 93 from which are derived the signals to operate solenoids 42, 60 of exhaust valves 52, 70 controlling the brakes. The differentiator 86 is also connected to a comparator 95 responsive to deceleration G 1  and whose output is fed to an AND gate 96 together with an output of timer 110, the AND gate 96, whose output is connected to the input of timer 110, becoming non-conducting when a G 1  signal is not received at the timer input within the set period of the timer, for example one second. A positive signal at the output of the timer is transferred to a differentiator 130 which produces a signal to OR gate 106 to reset flip-flops 90, 92 and extinguish the signal to control box 93 to effect closing of valve 52. As shown in Fig. 4 the brake actuator comprises a pressure chamber 24 containing a diaphragm piston 22 and compressed air is supplied thereto via a passage 28 and valve 38 so long as a chamber above the valve is vented to atmosphere via a passage 36 under the control of a solenoid-operated valve 34, closing of passage 36 causing the compressed air to close valve 38 so that air can only enter the chamber 24 via a bleed port 41. Two exhaust ports 56, 68 are provided, the former being larger and either or both can be opened by means of valves 52, 70 to give three different rates of exhaustion of chamber 24. If the vehicle runs on to an unusually slippery road surface the system operates earlier to open exhaust valve 52. A peak detector 116 senses maximum wheel acceleration rate from the differentiator 86 and transmits a signal permitting an acceleration signal G 2  to pass through the reset inputs of flip-flops 92, 90 to close the exhaust valve and as long as the Go signal (5 m.p.h.) is generated the system repeats the override until the vehicle stops or a better road surface is encountered. A second timer 140 has an output which remains at zero so long as a signal received at its input is extinguished within a relatively long period of time, say four seconds, its input being connected to the output of flip-flop 92 so that whenever the latter transmits a signal to the output control box to open exhaust valve 52 this signal is also received at the input of the timer 140 to trigger a timing cycle. If the signal be not extinguished because of a failure of the system the output of the timer becomes positive and is transmitted to OR gate 99 and reset inputs of flip-flops 90, 92, 132 and the disable input of cycle rate timer 110. To ensure that the system cannot be re-enabled by the operator a disable memory device permanently disables the system until the cause of breakdown can be ascertained.