baber/WOPTO huggingface dataset:
Patent TW-I246986-B (TW)
Title: Method of producing titanium dioxide film
Inventor: LU FU-HSING
IPC: C23C14/06
Filed: 2003-05-15
Granted: 2006-01-11
Abstract: A kind of method of producing a titanium dioxide film with nano structure comprises plating a titanium film onto a substrate surface, placing the titanium film plated substrate into an electrolytic liquid which can be either a strong base or strong acid solution, and using the titanium film as an anode to synthesize a titanium dioxide with an anatase phase on the titanium film surface by the electrochemical anode oxidation method. This method can be carried out under room temperature, which has a fast reaction and can be applied to either a homogenous substrate or a heterogeneous substrate.
Patent TW-I264647-B (TW)
Title: Configurable multi-port multi-protocol network interface to support packet processing
Inventor: VINNAKOTA BAPIRAJU
IPC: G06F13/14
Filed: 2003-05-21
Granted: 2006-10-21
Abstract: A network interface between an internal bus and an external bus architecture having one or more external buses includes an external interface engine and an internal interface. The external interface engine (EIE) is coupled to the external bus architecture, where the external interface engine communicates over the external bus architecture in accordance with one or more bus protocols. The internal interface is coupled to the external interface engine and the internal bus, where the internal interface buffers network data between the internal bus and the external bus architecture. In one embodiment, the internal interface includes an internal interface (IIE) coupled to the internal bus, where the IIE defines a plurality of queues for the network data. An intermediate memory module is coupled to the IIE and the EIE, where the intermediate memory module aggregates the network data in accordance with the plurality of queues.
Patent TW-I271070-B (TW)
Title: Shaped PSD design for DSL systems
Inventor: REDFERN ARTHUR J
IPC: H04L27/26
Filed: 2003-07-01
Granted: 2007-01-11
Abstract: ADSL systems with a power cutback by imposition of a power ceiling; this reduces the range of transmitted power across frequencies.
Patent TW-I278866-B (TW)
Title: Semiconductor storage device, control method therefor and portable electronic equipment
Inventor: YAOI YOSHIFUMI
IPC: G11C7/00
Filed: 2003-10-03
Granted: 2007-04-11
Abstract: A memory cell array employs a memory element as a memory cell. The memory element is constructed of a gate electrode formed via a gate insulation film on a semiconductor layer, a channel region arranged under the gate electrode, diffusion regions that are arranged on both sides of the channel region and have a conductive type opposite to that of the channel region, and memory function bodies that are arranged on both sides of the gate electrode and have a function to retain electric charges. When first and second power voltages VCC1 and VCC2 supplied from the outside are lower than a prescribed voltage, a rewrite command to a memory circuit 34 that includes the memory cell array is inhibited by a lockout circuit 33a. With this arrangement, there are provided a semiconductor storage device capable of achieving storage retainment of two bits or more per memory element and stable operation even if the device is miniaturized and preventing the occurrence of a malfunction of rewrite error and so on attributed, to a reduction in the power voltage supplied from the outside and a control method therefor.
Patent TW-I298697-B (TW)
Title: Method of producing sterilized packed pasta
Inventor: TETSUYA FUKAYA
IPC: A23L5/10
Filed: 2003-10-08
Granted: 2008-07-11
Abstract: A sterilized packed pasta is produced by filling a container (3) with pasta and water; boiling the pasta in the container inside a retort of 0.1-1.5 while repeatedly increasing and releasing pressure inside the retort under conditions where the water is evaporated; and sealing the container inside a clean booth.
Patent TW-I234534-B (TW)
Title: Vehicular under-seat compartment mechanism
Inventor: MIZUNO KOJI
IPC: B60N2/90
Filed: 2003-11-05
Granted: 2005-06-21
Abstract: To utilize limited space in a vehicle cabin, a vehicular under-seat compartment mechanism includes a hinge mechanism (4), a compartment (51) and a lock mechanism (30). The hinge mechanism (4) interconnects a seat-frame (13b) and a seat-cushion (12) in such a manner that the seat-cushion (12) is pivotally rotatable with respect to the seat-frame (13b). The compartment (51) is disposed in the under-seat space under the seat (1) and is formed an opening upwardly. The lock mechanism (30), integrated with the hinge mechanism (4), locks the seat-cushion (12) at an upright position, at which the seat-cushion (12) is pivotally flipped up about the hinge mechanism (4) so that the compartment (51) is accessible.
Patent TW-I275888-B (TW)
Title: Display liquid for electrophoresis display medium
Inventor: KOIZUMI HIROAKI
IPC: G02F1/167
Filed: 2003-11-25
Granted: 2007-03-11
Abstract: This invention provides a display liquid for an electrophoresis display medium which exhibits an excellent contrast with improved electrostatic characteristics by adding an alkenyl succinic anhydride in the display liquid to prevent the pigment from coagulation. The display liquid for an electrophoresis display medium contains an electrical insulation solvent, particles having at least one kind of positive static charge and being in a state of dispersion in the solvent, and an alkenyl succinic anhydride, the alkenyl having a number of carbon atoms of 4-40.
Patent TW-I244930-B (TW)
Title: Inflatable isolation chamber
Inventor: SHIH TUNG-SHENG
IPC: A62B31/00
Filed: 2004-01-30
Granted: 2005-12-11
Abstract: This invention relates to an inflatable isolation chamber. It comprises a base, a housing, and a coupling structure. The coupling structure combines the base and the housing. The characteristic is that: the housing material contains flexibility, and at least one inflator supporting structure on the top end of the housing. Therefore, when inflated, the top end of the housing props up and separates from the base. At least one inflator supports the structure on the bottom end of the housing. Consequently, when inflated, the bottom end of the housing props up and separates from the base.
Patent TW-I248910-B (TW)
Title: Tray transferring apparatus
Inventor: HAN JUNG-UG
IPC: B65G49/05
Filed: 2004-02-06
Granted: 2006-02-11
Abstract: The present invention discloses a tray transferring apparatus for transferring a handling tray on which semiconductor devices are mounted. The tray transferring apparatus stably transfers the semiconductor devices not to be scattered or separated from the handling tray. The tray transferring apparatus includes a fixing means installed on a main frame, for supporting a fixed tray, a correcting means installed on the main frame, for correcting the fixed tray supported by the fixing means, a gripping means installed on the main frame, for gripping a handling tray, and at least one sensor installed on the main frame, for sensing gripper plates and the handling tray. As a result, the tray transferring apparatus prevents the semiconductor devices from being scattered or separated from the handling tray, by fixing the fixed tray by first and second fixing members, correcting right/left inclination of the fixed tray by the correcting means, and precisely covering the upper portion of the handling tray.
Patent TW-I242856-B (TW)
Title: Wafer level chip scale package and fabrication process thereof
Inventor: LIU SHENG-TSUNG
IPC: H01L23/29
Filed: 2004-02-12
Granted: 2005-11-01
Abstract: A fabrication process of wafer level chip scale package mainly comprises the following steps. First, a wafer having a plurality of wafer pads and a passivation layer exposing the wafer pads is provided. Next, each under bump metallurgy layer is formed on each of the wafer pads. Then, a stress-buffer layer is formed above the wafer to expose each under bump metallurgy layer through each of the vias formed in the stress-buffer layer. Afterwards, a plurality of solder bumps are separately disposed in the vias so as to be located above the wafer pads. Finally, a reflow step is performed so that each of the solder bumps is connected to each of the under bump metallurgy layer. In addition, this invention also provides a wafer level chip scale package which is formed by the fabrication process as mentioned above.
Patent TW-I238434-B (TW)
Title: Plasma display panel device
Inventor: OTANI EISHIRO
IPC: G09G3/20
Filed: 2004-02-16
Granted: 2005-08-21
Abstract: A plasma display panel includes a front substrate and a rear substrate, with a discharge space therebetween. Row and column electrodes extend on an inner surface of the front substrate. Each display line is defined by paired two adjacent row electrodes. A dielectric layer covers the row electrodes. Unit light-emission areas are formed in the discharge space at intersections of the row and column electrodes. A partition wall matrix comparts the unit light-emission areas from each other. A separation wall divides each unit light-emission area into a first discharge cell, in which discharge occurs across the paired two adjacent row electrodes associated with that unit light-emission area, and a second discharge cell, in which discharge occurs across one of the paired two adjacent row electrodes and the column electrode concerned. The first discharge cell communicates with the second discharge cell via a passage in each unit light-emission area.
Patent TW-I239609-B (TW)
Title: Method for manufacturing multi package module
Inventor: YANG CHAUR-CHIN
IPC: H01L23/28
Filed: 2004-03-18
Granted: 2005-09-11
Abstract: According to a method for manufacturing multi package module, firstly a substrate is provided. The upper surface of the substrate includes a plurality of mounting regions for chip scale packages (CSPs). Minimum width from the mounting regions to edges of the upper surface is not more than 1.0 mm. Before mounting the CSPs, a plurality of non-flow underfill materials is symmetrically applied on peripheries of the mounting regions, then the CSPs are mounted on the mounting regions. Solder balls of CSPs are re-flowed and the non-flow underfill materials are cured to symmetrically fix the CSPs, wherein the gap between the CSPs and the substrate don't need to fully fill with the non-flow underfill materials.
Patent TW-I249925-B (TW)
Title: Orthogonal modulation apparatus, orthogonal modulation method, program recording medium and modulation apparatus
Inventor: KATO TAKASHI
IPC: H04L27/36
Filed: 2004-03-23
Granted: 2006-02-21
Abstract: Proceed I(Q) signal calibration without stopping the modulation action of orthogonal modulation. Provide the adder 14 (24) that outputs the overlapped signal of false signal by adding I(Q) signal and the false signal PN, the signal conversion part 16 (26) that mixes the overlapped signal of false signal and the area signal in the preset frequency area to output the converted signal, the phase shift area signal multiplier 54 that multiplies the phase shifted zone signal done by phase shifter 50 and the converted signal, the false signal multiplier 56 that multiplies the output of the phase shift area signal multiplier 54 and the false noise of the false noise multiplier 56, the integrator 58 that takes the integral of the output of the false noise multiplier 56 and the error calculation part 70 calculating the I(Q) signal based on the output of the integrator 58. As the IF signal output can be used by the output of the adder 52 instead, it is not necessary to stop the modulation action of orthogonal modulation for calibration.
Patent TW-I234292-B (TW)
Title: The product of layer type solar cell
Inventor: NAKATA JOSUKE
IPC: H01L31/042
Filed: 2004-03-30
Granted: 2005-06-11
Abstract: The lamination type solar cell (200) which is including four solar cell modules (90, 100, 70, 60) which have a different sensitivity wavelength band, and those four kinds of modules are laminated so as to position on the incidence side of the sun light in the order from the module with the more shorter central wavelength in the sensitivity wavelength band, and each of three kinds of solar cell modules (90, 100, 70) is made of a cell group module which has a plurality of spherical solar cells (30, 40, 10) with a plurality of rows and columns, and the solar cell module (60) at the bottom layer is made of a light receiving planar module.
Patent TW-I275560-B (TW)
Title: Sealing device for elevator door
Inventor: SOMEYA SEIICHI
IPC: B66B13/00
Filed: 2004-05-13
Granted: 2007-03-11
Abstract: A sealing member (20) that can be brought into contact with a standup wall (8a) of an upper frame (8) of a three-sided frame (3) by an elastic force of a plate spring (18) to seal a gap (G1) created between a hall door (2) and the three-sided frame (3) is provided in the hall door (2). During the opening or closing operation of the hall door (2), rollers (22a, 22b) are brought into contact with a roller rolled portion (10a) provided on a side surface of a hanger rail (10) to rotate thereon, and thus the sealing member (20) and the standup wall (8a) are maintained in a non-contact state. When the hall door (2) is in a closed state, the rollers (22a, 22b) drop in recess step portions (24a, 24b). Thus, the sealing member (20) is brought into contact with the standup wall (8a) to seal the gap (G1).
Patent TW-I246083-B (TW)
Title: Method for programming single-bit storage SONOS type memory
Inventor: LEE TZYH-CHEANG
IPC: G11C16/12
Filed: 2004-07-19
Granted: 2005-12-21
Abstract: A method for programming a single-bit storage nonvolatile memory cell includes the steps of: providing a single-bit storage nonvolatile memory cell having a channel region between a left bit line and a right bit line, a composite dielectric layer for storing digital data, and a word line overlying the composite dielectric layer; performing a left side electron injection on the single-bit storage nonvolatile memory cell by applying a relatively high word line voltage (VWL, HIGH) to the word line, applying a relatively high left bit line voltage (VLBL, HIGH) to the left bit line, and applying a relatively low right bit line voltage (VRBL, Low) to the right bit line; and performing a right side electron injection on the single-bit storage nonvolatile memory cell by applying the relatively high word line voltage (VWL, HIGH) to the word line, applying a relatively low left bit line voltage (VLBL, Low) to the left bit line, and applying a relatively high right bit line voltage (VRBL HIGH) to the right bit line.
Patent TW-I235812-B (TW)
Title: Cooking stove and assembling method of support member of optical part in cooking stove
Inventor: MIZUTANI YOSHIHIRO
IPC: F24C7/04
Filed: 2004-07-22
Granted: 2005-07-11
Abstract: The present invention provides a cooking stove and an assembling method of a support member of an optical part in the cooking stove, having excellent fitting performance of an optical part to a top plate (a glass plate). A top face of a body case accommodating a gas burner in the gas cooking stove is covered with the glass top plate. The surface of the glass top plate is flat, and the back is rugged. A support frame to which a light emitting element is fitted is fixed to the lower side of the glass top plate, and a lubricating film is applied to the back of the glass top plate. The support frame is installed in the state of coming into contact with the back of the glass top plate in an area where the lubricating film is not applied.
Patent TW-I272510-B (TW)
Title: APS multiple version analysis system and method thereof
Inventor: HU SHIOU-HUA
Filed: 2004-08-27
Granted: 2007-02-01
Abstract: The invention provides a versioning analysis system and method used in an advanced planning and scheduling system. The versioning analysis system comprises an option interface for providing modeling parameter items and version data items. A version data receive different versions of tables according to the selected modeling parameter and the selected version data in the option interface. And a version data analysis module analyze the tables according to a chosen function option item and a chosen modeling parameter from the option interface.
Patent TW-I246356-B (TW)
Title: New organic compound and organic light emitting device using the same
Inventor: KIM KONG-KYEOM
IPC: C07D487/22
Filed: 2004-10-15
Granted: 2005-12-21
Abstract: Disclosed is a compound represented by formula 1: wherein each of A, X, Y, Y' and Y"" has the same meaning as described herein. When used in an organic light emitting device, the compound represented by formula 1 has at least one function selected from the group consisting of hole injection, hole transport, light emitting, electron transport, electron injection, etc., depending on the type of each unit forming the trimer or substituents in each unit. An organic light emitting device is also disclosed. The organic light emitting device includes a first electrode, an organic film having one or more layers and a second electrode, laminated successively, wherein at least one layer of the organic film includes at least one compound represented by formula 1.
Patent TW-I250766-B (TW)
Title: Mobile phone having a master/slave operation mode
Inventor: HSU CHE-CHEN
IPC: H04M1/02
Filed: 2004-10-27
Granted: 2006-03-01
Abstract: The present invention provides a mobile phone having a master/slave operation mode for a user to operate the mobile phone with a basic operation mode or an advanced operation mode. When the user operates the mobile phone with the advanced operation mode, the user has authority to perform all functions provided by the mobile phone, including setting up the basic operation mode and displaying an edit interface to set up the basic operation mode. When the user operates the mobile phone with the basic mode, the user has authority to perform only the functions set up by the advanced operation mode.
Patent TW-I254947-B (TW)
Title: Data managing method and data access system for storing all management data in a management bank of a non-volatile memory
Inventor: FU HUNG-SHIUN
IPC: G06F17/30
Filed: 2004-11-18
Granted: 2006-05-11
Abstract: A data managing method and data access system for storing all management data in a management bank of a non-volatile memory. The data managing method includes: dividing the non-volatile memory into a plurality of banks, wherein each of the banks contains an attribute field; and when an attribute field of a first bank stores a first value and the first bank is full, the data management method proceeding to following steps: finding a second bank with an attribute field storing a second value; copying available data stored in the first bank into the second bank; assigning the first value to the attribute field of the second bank; and erasing all data originally stored in the first bank.
Patent TW-I263124-B (TW)
Title: Voltage regulator circuit with low quiescent current
Inventor: CHIEN HUNG-JEN
IPC: G05F1/46
Filed: 2004-11-19
Granted: 2006-10-01
Abstract: A voltage regulator circuit with low quiescent current for generating a stable output voltage. The voltage regulator circuit comprises a standby mode controller for receiving a standby signal and generating a control signal, which is kept enabled when the standby signal is disabled and is periodically enabled when the standby signal is enabled, a reference voltage generator for generating a reference signal, an error amplifier controlled by the control signal for generating an amplifying signal according to the reference signal and the output voltage, and a switch unit controlled by the control signal for generating the output voltage according to the amplifying signal. Because the control signal is periodically enabled when the standby signal is enabled and the error amplifier and the switch unit are working when the control signal is enabled, the quiescent current of the voltage regulator circuit can be greatly reduced.
Patent TW-I281247-B (TW)
Title: Anti-static circuit board structure and fabrication method thereof
Inventor: HSU SHIH-PING
IPC: H01L23/60
Filed: 2005-01-24
Granted: 2007-05-11
Abstract: An anti-static circuit board structure and a fabrication method thereof are proposed. The circuit board structure includes: a circuit board having at least one circuit layer thereon, wherein the circuit layer has a plurality of electrical connection pads; a dielectric layer formed on at least one surface of the circuit board to cover the circuit layer, and having a plurality of first openings corresponding to the electrical connection pads such that the electrical connection pads are exposed; a protection layer formed on the dielectric layer, and having a plurality of second openings corresponding to the electrical connection pads such that the electrical connection pads are exposed; and a solder mask layer formed on the protection layer and the dielectric layer, wherein the solder mask layer has a plurality of third openings corresponding to the electrical connection pads of the circuit board such that the electrical connection pads are exposed, and the solder mask layer further has at least one fourth opening for exposing a portion of the protection layer, such that static on the protection layer can be connected to an external structure and grounded. Therefore, the protection layer can attract static and direct the static to the external structure so as to release the static and prevent damage to a semiconductor chip mounted on the circuit board.
Patent TW-I350868-B (TW)
Title: Sewing machine with function switch
Inventor: SEIBERT HORST
IPC: H01H9/06
Filed: 2005-02-02
Granted: 2011-10-21
Abstract: A sewing machine has a series of switches (12) linked (61) to a central controller (62) that can activate various functions that may be required during the sewing cycle. Each switch is associated with a selector plug, which, if locked in an active position, allows the switch to be activated by a lever (57) that extends into the normal work area (A) near the needle (9). The switch assembly is mounted on the arm (4) of the sewing machine. Each of the switches and plugs can be connected electrically in series by a switch on the activating lever (57). The position of the selector plugs is visible from the outside. As an alternative the plugs can be replaced by grub screws with the direction of the screwdriver slot indicating their position.
Patent TW-I253848-B (TW)
Title: Pixel interpolation method and related pixel interpolation device
Inventor: SHAN PEI-MIN
IPC: H04N3/00
Filed: 2005-03-21
Granted: 2006-04-21
Abstract: A pixel interpolation method includes: utilizing a plurality of pixel pairs on two successive scan lines to determine at least one first possible angle; utilizing a plurality pixel value distribution trends of the two successive scan lines to determine at least one second possible angle; comparing pixel values of a plurality of pairs of successive pixels to detect whether the pixel values are larger than a threshold value in order to determine at least one third possible angle; determine a most appropriate angle according to the first, second, and third possible angles; detecting whether the most appropriate angle is correct by examining that the most appropriate angle is in a group; and utilizing a first pixel on the upper scan line of the two successive scan lines and a second pixel on the bottom scan line of the two successive scan lines to interpolate the a target pixel.
Patent TW-I279935-B (TW)
Title: Composition for electrolyte, polymer electrolyte, and battery using the same
Inventor: UCHIDA YUJI
IPC: C08F2/44
Filed: 2005-03-22
Granted: 2007-04-21
Abstract: The subject of the present invention is to provide a composition for electrolyte and polymer electrolyte capable of suppressing the lowering of capacity when a battery is preserved in a charged state, and to provide the battery. The polymer electrolyte 23 contains electrolyte liquid and polymer compound. The electrolyte liquid contains a compound having P-O-Si bonding or B-O-Si bonding. Thus, the increase of resistance caused by the reaction of an un-reacted polymeric compound on an electrode is prevented, and the lowering of capacity can be prevented.