Patent RU-2345203-C2 (RU)
Inventor: KOTURANOV ANTON ALEKSANDROVICH
IPC: E05B49/00
Filed: 2006-08-15
Granted: 2009-01-27
Abstract: FIELD: information and technology. 
     SUBSTANCE: invention refers to the sphere of objects and facilities unauthorised access protection techniques immediately dealing with electronic locks design. The electronic lock controller includes the following components: timer tick counter (1) (TTC), code match counter (2) (CMC), code mismatch counter (3) (CMMC), read-only memory (4) (ROM) the first and the second RS-triggers (5&6), the first, second, third, fourth, fifth and the sixth AND-elements (7, 8, 9, 10, 11&12), the first and the second the "EXCLUSIVE OR" (EO) elements (13&14), Schmitt trigger (15), capacitance integrator (16), data (17) and timer (18) input buses, output bus (19). The complementing input of the timer tick counter (1) is connected to the timer input bus (18) and the first inputs of the fourth, the fifth and the sixth AND-elements (10, 11&12) with the timer tick counter (1) R-input connected to the Schmitt trigger (15) output and to the R-inputs of the RS-triggers (5&6) and the code match counter (2). The timer tick counter (1) output is connected to the capacitance integrator (16) input, the second inputs of the first and the second AND-elements (7&8) and the fourth input of the third AND-element (9). The timer tick counter (1) output group is connected to the group of corresponding inputs of the read-only memory (ROM) (4). The complementing input of the code match counter (2) is connected to the output of the fifth AND-element (11) with the code match counter (2) output connected to the second input of the third AND-element (9). The complementing input of the code mismatch counter (3) is connected to the output of the third AND-element (9) with the code mismatch counter (3) R-input connected to the output of the first AND-element (7). The inverting output of the code mismatch counter (3) is connected to the first input of the third AND-element (9) and the third input of the second AND-element (8). The first and the second outputs of the read-only memory (ROM) (4) are connected to the second input of the first "EXCLUSIVE OR" element (13) and the second input of the second "EXCLUSIVE OR" element (14) accordingly. The S-output of the first RS-trigger (5) is connected to the output of the fourth AND-element (10). The true and the inverting outputs of the first RS-trigger (5) are connected to the third input of the third AND-element (9) and the first input of the second AND-element (8) accordingly. The S-intput of the second RS-trigger (6) is connected to the output of the sixth AND-element (12). The inverting output of the second RS-trigger (6) is connected to the first input of the first AND-element (7). The output of the second AND-element (8) is connected to the output bus (19). The second inputs of the fourth and the fifth AND-elements (10&11) are connected to the true and the inverting outputs of the first "EXCLUSIVE OR" element (13). The second input of the sixth AND-element (12) is connected to the output of the second "EXCLUSIVE OR" element (14). The first input of the first "EXCLUSIVE OR" element (13) is connected to the first input of the second "EXCLUSIVE OR" element (14) and the data input buses (17). The Schmitt trigger (15) input is connected to the capacitance integrator (16) output. 
     EFFECT: minimisation of the risk of the lock being unlawfully opened through code cracking . 
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