baber/WOPTO huggingface dataset:
Patent TW-I222907-B (TW)
Title: Method for making a press-fit barrel
Inventor: JANG TU-HUO
IPC: B21D53/00
Filed: 2003-05-26
Granted: 2004-11-01
Abstract: This invention relates to a method for making a press-fit barrel, comprising the steps of: trimming a rod, extruding and compressing a lower side to form a reduced body with smaller diameter; punching a central bore from opposing ends thereof; forming a block at the intersection between different diameter portions; reversing and punching the workpiece to form a flared configuration at an upper side of the reduced body by punching the reduced body from an upper side and forming tiny slits at a lower portion of the reduced body.
Patent TW-580608-B (TW)
Title: Liquid crystal projection device capable of being used in standing and lying
Inventor: TZUNG RUEI-YAU
IPC: G03B21/00
Filed: 2003-07-15
Granted: 2004-03-21
Abstract: There is provided a liquid crystal projection device capable of being used in standing and lying. A first shell has a first mounting opening, and a lamp module is mounted on the first shell. An array lens is arranged between the lamp module and the first mounting opening. A second shell has a second mounting opening, and a chassis body is mounted on the second shell. The length of each edge of the first mounting opening is equal to that of the second mounting opening, and they are mounted together to enable the liquid crystal projection device to overcome the restriction in space.
Patent TW-I230828-B (TW)
Title: Method of manufacturing liquid crystal display device
Inventor: KIDA TETSUYA
IPC: G02F1/1339
Filed: 2003-07-23
Granted: 2005-04-11
Abstract: A plurality of main seal patterns and dummy seal patterns are formed by a sealant on one of substrates. The plurality of main seal patterns individually enclose each of a plurality of display areas. The dummy seal patterns individually enclose the plurality of main seal patterns, and sides of the dummy seal patterns facing sides of the one substrate are all interconnected. These formations enable constant vacuum levels to be maintained the inside and the outside of the main seal patterns when the inside of a chamber of an assembling device is recovered to atmospheric pressure. Therefore, distortion of substrates is impeded in the vicinity of the main seal patterns, and degradation of display quality can be prevented.
Patent TW-I276849-B (TW)
Title: Polarizer, optical film and image display device
Inventor: KAMIJO TAKASHI
IPC: G02B5/30
Filed: 2003-09-08
Granted: 2007-03-21
Abstract: The polarizer of this invention is formed by a film having fine regions distributed in a matrix. The matrix is formed by a light-transmittable thermoplastic resin containing absorption dichromatic dyes. In addition, the transmissivity for the linear polarization in the transmission direction is over 80%, the haze value is lower that 10%, and the haze value for the linear polarization in the absorption direction is over 50%. The polarizer of this invention is a dye-based polarizer of a good heat resistant reliability that has a high transmissivity and high polarizability and that can suppress the uneven of transmissivity when performing a black display.
Patent TW-594965-B (TW)
Title: Power supply layout structure of integrated circuit
Inventor: CHUNG CHING-YAO
IPC: H01L23/528
Filed: 2003-09-10
Granted: 2004-06-21
Abstract: A power supply layout structure of integrated circuit is disclosed in the present invention. The invention contains plural power source pads, plural grounding pads, plural first-type conduction wires directly and electrically connecting to the power source pads, plural second-type conduction wires directly and electrically connecting to the grounding pads, and one core circuit. The core circuit is electrically connected to the first type conduction wire and the second type conduction wire to obtain the required power source. The integrated circuit is composed of multiple metal layers; and the first type conduction wire and the second type conduction wire are located at different metal layers. The invented power source layout structure is capable of preventing from using power source ring or grounding ring so as to save chip area occupied by power source ring or grounding ring.
Patent TW-I278279-B (TW)
Title: Sprinkler system, method for producing the sprinkler system, affusion, method for producing the affusion, and method for cooling by fine brume
Inventor: HOSHIKA MAKOTO
IPC: F16L11/04
Filed: 2003-10-22
Granted: 2007-04-11
Abstract: The present invention provides a pipe for irrigation enabling uniformly sprinkling water to a wider area and having water spray holes enabling securing at low water spray height proper irrigation strength in a place near the tube for irrigation, and to provide a method for producing the pipe for irrigation. The water spray body 1 has a plurality of water spray holes 10. The water spray holes 10 are each composed of water spray holes 10A and 10B adjacent to each other. The water spray holes 10A and 10B adjacent to each other are formed so that the centerlines LA and LB intersect on a side from which water is flown in the air by water pressure P.
Patent TW-I220560-B (TW)
Title: NAND flash memory cell architecture, NAND flash memory cell array, manufacturing method and operating method of the same
Inventor: HSU CHENG-YUAN
IPC: H01L21/8247
Filed: 2003-10-27
Granted: 2004-08-21
Abstract: An NAND flash memory cell array consisted of a plurality of memory cell architecture is provided. Each of memory cell architecture includes a plurality of memory cells set up between first selecting transistor and second selecting transistor with series connection. Each memory cell is consisted of substrate, tunneling dielectric layer, floating gate, inter-gate dielectric layer, controlling gate and source/drain regions, and a erasing gate is set between two adjacent memory cells. A plurality of word lines is set to connect the memory cells in the same rows. A source line is set to connect the source region of first transistor in the same rows. A plurality of bit lines is set to connect the drain region of second transistor in the same rows. A first selecting gate line and a second selecting gate line are set to connect the gate of first transistor in the same rows and the gate of second transistor in the same rows, respectively. A plurality of erasing gate lines are set to connect the erasing in the same rows.
Patent TW-I236570-B (TW)
Title: Electro-optical device encased in mounting case, projection display apparatus, and mounting case
Inventor: KOJIMA HIROYUKI
IPC: H04N9/31
Filed: 2003-12-04
Granted: 2005-07-21
Abstract: An electro-optical device cased in a mounting case comprises: an electro-optical device having an image display region on which projection light from a light source is incident, and a mounting case comprising a plate disposed to face one surface of the electro-optical device and a cover for covering the electro-optical device, a portion of the cover abutting against the plate, wherein the mounting case accommodates the electro-optical device by holding at least a portion of a peripheral region located at the circumference of the image display region of the electro-optical device with at least one of the plate and the cover. In addition, the cover comprises a cooling air introducing portion, and the cooling air introducing portion is characterized in having a cooling air guiding portion for allowing the cooling air which is blown to the electro-optical device encased in the mounting case to flow toward the image display region.
Patent TW-I267127-B (TW)
Title: Illumination optical system and exposure apparatus
Inventor: TSUJI TOSHIHIKO
IPC: G21K1/00
Filed: 2004-01-29
Granted: 2006-11-21
Abstract: An exposure apparatus includes an illumination optical system for illuminating a reflection mask that forms a pattern, by using light from a light source, wherein the illumination optical system includes a field stop that defines an illuminated area on the reflection mask, and has an opening, and an imaging system for introducing the light from the opening in the field stop into the reflection mask, the imaging system being a coaxial optical system, wherein a principal ray of the imaging system at a side of the reflection mask forming an inclination angle to a common axis of the coaxial optical system, the inclination angle being approximately equal to an angle between a principal ray of the projection optical system at the side of the reflection mask and a normal to a surface of the reflection mask.
Patent TW-I234756-B (TW)
Title: Dissipation method and structure for backlight inverter
Inventor: LEE WEN-SHU
IPC: G06F1/16
Filed: 2004-02-24
Granted: 2005-06-21
Abstract: A dissipation structure is designed in an outer housing for an LCD monitor. In this dissipation structure, a coil of the backlight inverter contacts a dissipation plate to diffuse the heat generated by the coil. In order to increase the efficiency of diffusion, a piece of thermal adhesive is attached between the coil and the dissipation plate. The dissipation plate is a good thermal conductor, which can be replaced by an EMI shield housing or a Aluminum and Magnesium alloy, or Titanium alloy outer housing.
Patent TW-I270474-B (TW)
Title: Managing bubbles in a fluid-delivery device
Inventor: YILDIRIM OZGUR
IPC: B67D7/76
Filed: 2004-05-04
Granted: 2007-01-11
Abstract: Methods and systems for managing bubbles (602) in a micro electro mechanical systems device are described. One exemplary system includes a fluid-feed channel (330) configured to supply fluid to a plurality of ejection chambers (318), individual ejection chambers (318) comprising a resistor (313) configured to eject fluid from the individual ejection chamber (318). The system further includes a processor (102) configured to cause an individual resistor (313) to be energized at a first intensity sufficient to eject fluid from a respective ejection chamber (318), the processor (102) further configured to cause the resistor (313) to be energized at a second lower intensity which heats the resistor (313) but does not cause fluid to be ejected from the respective ejection chamber (318), and wherein the processor (102) can energize, at the second lower intensity level, individual resistors (313) in a pattern designed to detach a bubble (602) from a surface (604) defining a portion of the fluid-feed channel (330).
Patent TW-I272113-B (TW)
Title: Gaming machine and computer-readable program product
Inventor: MACHIDA MATSUZO
IPC: G06F19/00
Filed: 2004-06-18
Granted: 2007-02-01
Abstract: A gaming machine includes: an operation unit that allows the player to enter the action command; a display controller that displays a plurality of characters including the ally character and at least one enemy character on a display for displaying the progress of the game and displaying a battle between the ally character and the enemy character; and an enemy parameter storage that stores a parameter concerning the enemy character when the ally character encounters the enemy character and a predetermined condition is satisfied.
Patent TW-I285773-B (TW)
Title: Cooling-fastening device and method for cooling
Inventor: CHEN CHUN-YUAN
IPC: G02F1/1335
Filed: 2004-07-07
Granted: 2007-08-21
Abstract: A backlight module and a method for cooling a light module of the backlight module are provided. The present backlight module includes a cooling-fastening element to hold a fastened portion of a light source. Heat produced by the light source is conducted via the cooling-fastening element and the fastened portion for cooling.
Patent TW-I279775-B (TW)
Title: Audio apparatus with active noise cancellation
Inventor: LEE YI-BING
IPC: G10L21/02
Filed: 2004-07-14
Granted: 2007-04-21
Abstract: An audio apparatus with active noise cancellation (ANC) can be coupled to a stereoheadset has an analog ANC control module and an audio processor. The audio processor is applied to process an audio data to make the stereoheadset broadcasting audio. The analog ANC control module cancels the noise in the stereoactively based on an audio feedback signal. In addition, the present invention further has a power amplifier and a feedback processor. Wherein, the power amplifier coupled to the outputs of the audio processor and the analog ANC control module. The power amplifier is used to amplify the outputs of the audio processor and the analog ANC control module, and send the outputs to the Stereo headset. The feedback processor receives a noise sensed by the stereoheadset and generates the audio feedback signal to the analog ANC control module.
Patent TW-I239059-B (TW)
Title: Chip packaging method chip package structure
Inventor: LIU CHIEN
IPC: H01L21/56
Filed: 2004-08-17
Granted: 2005-09-01
Abstract: A chip packaging method is provided. First, a conductive layer is provided, and pluralities of leads are formed on a surface of the conductive layer. Then, a chip having pluralities of bumps on a surface thereof is provided. The chip is disposed on the conductive layer by flip chip technique so that the chip is electrically connected to the leads. Next, a molding compound is formed over the conductive layer to encapsulate the chip and the bumps. Afterwards, the conductive layer is removed to expose the leads and the molding compound. As mentioned above, the size of the chip package structure formed by the chip packaging method is smaller, and the electrical performance of the chip package structure is enhanced.
Patent TW-I256089-B (TW)
Title: Ultra-shallow junction MOSFET having a high-k gate dielectric and in-situ doped selective epitaxy source/drain extensions and a method of making same
Inventor: WANG CHIH-HAO
IPC: H01L29/51
Filed: 2004-10-29
Granted: 2006-06-01
Abstract: A MOSFET includes a gate having a high-k gate dielectric on a substrate and a gate electrode on the gate dielectric. The gate dielectric protrudes beyond the gate electrode. A deep source and drain having shallow extensions are formed on either side of the gate. The deep source and drains are formed by selective in-situ doped epitaxy or by ion implantation and the extensions are formed by selective, in-situ doped epitaxy. The extensions lie beneath the gate in contact with the gate dielectric. The material of the gate dielectric and the amount of its protrusion beyond the gate electrode are selected so that epitaxial procedures and related procedures do not cause bridging between the gate electrode and the source/drain extensions. Methods of fabricating the MOSFET are described.
Patent TW-I246206-B (TW)
Title: Light emitting diode holder and the manufacturing method thereof
Inventor: WU CHING-YI
IPC: H01L33/00
Filed: 2004-11-04
Granted: 2005-12-21
Abstract: The present invention provides a light emitting diode holder, which comprises two carrying portions in opposite but having a specific height difference, so that the carrying portion at higher position is used to place the light emitting chip, and the other carrying portion at lower position is used to place the anti-electrostatic chip, thus the light source generated by the light emitting chip will not be blocked by the anti-electrostatic chip, and the present invention is particularly suitable for the light emitting diode with anti-electrostatic function.
Patent TW-I265525-B (TW)
Title: Early CRC delivery for partial frame
Inventor: VOGT PETE
IPC: G06F11/10
Filed: 2004-11-11
Granted: 2006-11-01
Abstract: Memory apparatus and methods transmit and receive a CRC code for a first portion of a frame before the second portion of the frame is finished being transferred. The CRC may be used to check the first portion of the frame before the second portion of the frame is completely received. A command or other information in the first portion of the frame may be used without waiting for the rest of the frame. Other embodiments are described and claimed.
Patent TW-I250597-B (TW)
Title: Method for manufacturing multi-chip package having encapsulated bond-wires between stack chips
Inventor: LIN CHUNG-HUNG
IPC: H01L21/60
Filed: 2004-12-31
Granted: 2006-03-01
Abstract: A method for multi-chip package is disclosed. A first chip is disposed on a chip carrier. A first chip adhesive layer is formed on an active surface of the first chip and exposes pads on the first chip. Then, a wire-bonding step is processed to electrically connect the pads on the first chip to the chip carrier through a plurality of first bonding wires. At least a second chip is provided with a second chip adhesive layer formed on backside of the second chip in wafer form. Utilizing picking and placing, the second chip is stacked on the first chip adhesive layer, and the second chip adhesive layer is combined with the first chip adhesive layer to seal portions of the first bonding wires above the active surface of the first chip. It could package a plurality of central pads chip and protect the first bonding wires.
Patent TW-I267148-B (TW)
Title: Package structure of stack dies and wafer-level formation thereof
Inventor: YANG KUO-PIN
IPC: H01L21/56
Filed: 2005-04-01
Granted: 2006-11-21
Abstract: In wafer-level formation of a package structure of stack dies, multitudes of conductive connection structures are formed protruded out of a transparent substrate. Multitudes of holes are formed in an integrated structure of wafer and dies and adhesive layer is filled therein. The transparent structure and the integrated structure are jointed in which each of the conductive connection structures is positioned in one of the holes and exposed outside of the active surface of the die. The conductive connection structures play a role on transmitting electrical signals from the active surface of the wafer to the active surface of the dies. The stack dies by sawing the wafer have electrically connection from one active surface to another active surface through the conductive connection structures.
Patent TW-I273631-B (TW)
Title: Microelectronic device, method for fabricating the same, and integrated circuit device
Inventor: TSENG BOR-MIN
IPC: H01L27/06
Filed: 2005-05-20
Granted: 2007-02-11
Abstract: A microelectronic device including a plurality if active devices located at least partially in a substrate, at least one dielectric layer located over the plurality of active devices, and an inductor located over the dielectric layer. At least one of the plurality of active devices is located within a columnar region having a cross-sectional shape substantially conforming to a perimeter of the inductor. The at least one of the plurality of the active devices may be biased based on a desired Q factor of the inductor or and/or an operating frequency of the microelectronic device. The present invention also relates to methods of fabricating and tuning the microelectronic device and an integrated circuit device using the same.
Patent TW-I291727-B (TW)
Title: Plasma processing system
Inventor: SUGATA MASARU
IPC: H01L21/3065
Filed: 2005-06-21
Granted: 2007-12-21
Abstract: A plasma processing system comprising a processing chamber (10), first and second electrode units (5, 11) provided in the processing chamber (10) and arranged opposite to each other, and a quartz plate (13) provided on the second electrode unit (11) side of the first electrode unit (5) for protecting the first electrode part (5). The plasma processing system plasma-processes an article to be processed which is provided on the first electrode unit (5) side of the second electrode unit (11) by generating plasma between the first electrode unit (5) and the second electrode unit (11) and exciting a reaction gas in the processing chamber (10). The quartz plate (13) has a roughened surface on the second electrode unit (11) side.
Patent TW-I279842-B (TW)
Title: Method of manufacturing multi-layered wiring board, electronic device, and electronic apparatus
Inventor: MIURA HIROTSUNA
IPC: H01L21/02
Filed: 2005-08-15
Granted: 2007-04-21
Abstract: There provided a method of manufacturing a multi-layered wiring board having at least two conductor layers, an interlayer insulation layer provided between the conductor layers, and a conductor post that electrically connects the conductor layers, on a substrate. In the method, the conductor post is formed by repeatedly performing: coating a droplet containing a conductive material, applying light energy to the coated droplet, and accumulating and coating a subsequent droplet on the droplet to which the light energy is applied.
Patent TW-I274697-B (TW)
Title: Braking and parking assembly device
Inventor: SHIU PEI-SHIUAN
IPC: B62K23/02
Filed: 2005-08-31
Granted: 2007-03-01
Abstract: The present invention relates to a braking and parking assembly device, which includes a positioning base and a clipping base and can be mounted on the handgrip of a motor vehicle. A net slot is defined in the positioning base and a parking handle is pivotally arranged in the net slot. A braking sheet is provided on the parking handle, and a blocking member is pivotally arranged on the parking handgrip. The blocking member has a stirring plate, and a fastening sheet is arranged on the upper side of a vertical sheet. The fastening sheet has a side formed thereon a plurality of adjacent inlay slots with unequal depths. A braking handle is pivotally arranged in the clipping base. With this design, the braking device and parking device are independently arranged so that the braking operation and parking operation do not interfere with each other. Furthermore, in parking operation, said plurality of adjacent inlay slots with unequal depths of the blocking member can be selected to achieve better stability of parking function according to the condition of the parked vehicle.
Patent TW-I411622-B (TW)
Title: Anti-reflective coating-forming composition containing nitrogen-containing aromatic ring structure for lithography
Inventor: ENOMOTO TOMOYUKI
IPC: H01L21/027
Filed: 2005-10-06
Granted: 2013-10-11
Abstract: An antireflection film that exhibits a high antireflection effect, being free from any intermixing with photoresist, and that has a dry etching rate greater than that of photoresist, being available in a lithographic process for production of semiconductor devices; and a composition for forming of such an antireflection film. There is provided a composition for forming of lithographic antireflection film, comprising a reaction product, a crosslinking compound, a crosslinking catalyst and a solvent, wherein the reaction product is obtained by polyaddition reaction between an epoxy compound having two glycidyl groups and a nitrogenous aromatic compound having two thiol or hydroxyl groups.
Patent TW-I288590-B (TW)
Title: Method of forming solder mask and circuit board with solder mask
Inventor: TSENG TZYY-JANG
IPC: H05K3/12
Filed: 2005-10-31
Granted: 2007-10-11
Abstract: A method of forming a solder mask configured to form the same on a surface of a circuit board is provided. The surface of the circuit board comprising a circuit pattern thereon has a first region and a second region. The method includes the forming of a first sub solder mask on the first region of the surface of the circuit board through the use of screen-printing or photolithography, and the forming of a second sub solder mask on the second region of the same through the use of the ink-jet printing. The method can not only improve the alignment precision of the solder mask of the circuit board manufactured thereby and reliability, but also enhance the quantity of the mass production of the same and lower the manufacturing cost.
Patent TW-I274620-B (TW)
Title: Leadfree solder alloy composition resistant to high temperature vibration damage
Inventor: LIU CHUAN-SHENG
IPC: C22C13/00
Filed: 2005-12-19
Granted: 2007-03-01
Abstract: This invention relates to a leadfree solder alloy composition resistant to high temperature vibration damage, comprising 1.0 to 7.0 wt.% of copper (Cu), 0.0001 to 2.0 wt.% of zinc (Zn), 0.0001 to 2.0 wt.% of nickel (Ni), 0.0001 to 1.0 wt.% of rare earth elements (Re), and tin (Sn) together with the aforementioned elements to be 100 wt.%. By controlling the use range of the copper metal, and adding suitable amount of zinc, nickel, and rare earth elements, the tin-copper alloy solder can have better vibration life when used in a high temperature environment.