Patent GB-794171-A (GB)
Title: Electronic calculating apparatus
IPC: G06F15/08
Filed: 1954-11-18
Abstract: 794,171. Digital electric calculating-apparatus; electric digital-data-storage apparatus. INTERNATIONAL BUSINESS MACHINES CORPORATION. Nov. 18, 1954 [Jan. 15, 1954], No. 33426/54. Class 106 (1). In electronic calculating apparatus comprising an electronic calculator, and a programme device for controlling the sequence of calculator operations, including electronic elements each having active and inactive conditions, any selected element may be initially activated to produce a first programme step, and is deactivated upon completion of the calculator operation controlled thereby whereupon an activating pulse is emitted which may be transmitted to any selected one of the other elements. As described, the programme elements are connected by plugboard wiring. General. The electronic computer illustrated in Fig. 1A and 1B includes an arithmetic unit 700, store 718, input/output mechanism 732, auxiliary input mechanism 741 and a control section 722. The elements are connected by diagrammatically shown electronic switches such as 720. The C.R.T. storage system is generally similar to that described in Specification 758,495, corresponding references being used (below 700) for like elements. The store has four sections 724-726 and 728 holding 20, 20, 10 and 100 numbers respectively. Each number comprises 7 decimal digits plus a sign stored in parallel on eight C.R.T. pairs, the digits being represented in the 1, 2, 4, 8 code. The input and output stores 725, 724 are divided into halves X and Y which are alternately coupled to the remainder of the computer via memory register 131, and to the input/ output mechanism 732 by related switches 730, 736 and 729, 740. Thus, e.g., data can be entered from 732 into part X of store 725 while part Y is feeding previously entered data to the computer. The data is obtained from 80- column record cards, each containing 10 7-digit decimal numbers with sign (corresponding to the capacity of X or Y), which are sensed in device 738 (a known type of tabulator, as particularly described), the numbers being coded in input transducer 734. Similarly, data read out from store 724 is decoded in output transducer 737 and printed or punched in device 738. Entry and read-out of data can both occur during the same tabulator cycle. Single 7-digit numbers also may be selected and entered into the computer from auxiliary card feed device 744 or keyboard 742, each having a capacity of ten numbers. The memory or buffer register 131 stores a single 7-digit number with sign and may be connected to " entry " and " exit " main channels 507, 529, in which digits are represented by differentially timed potential changes. A number on channel 529 may be sent via channel 710, and shift unit 702 to channel 711 and 507, on to channel 707 and the 14-order accumulator 701. Also, a number in the accumulator may be sent to channel 711 via channel 709 and the shift unit. Numbers are represented in the accumulator in complementary form, and an add-subtract control unit 703 determines the form in which a number is entered. 0 to 7 denominational shifts may be selected by making one of eight input lines to shift control unit 839. During multiplication and division, which are performed by repeating methods, unit 839 is connected by switches 838 or 841 to shift control distributer 813 comprising an octal ring counter which is stepped on after each zero multiplier digit is set up, or new quotient digit formed, in multiplier quotient distributer 812. The distributer 813 may be controlled also by a significant figure trap 847 which determines the order of the highest significant digit in the first 7 orders of the output of the shift unit. The control section 722 which includes a clock circuit 126 comprising a multivibrator and various delay networks, and a 24-step primary timer 133, each step being divided into halves A and B, also comprises a programme device 750, selectors 752 and a plugboard 753. The device 750 comprises 120 programme steps or bi-stable units, only one of which is operative or ON at a time; half of the steps can be used to control multiplication and division when an advance to the next step occurs only after multiply-divide controls 705 are released.at the end of the operation; for the other 60 steps a programme advance normally occurs at the beginning of each primary cycle. The step sequence and the operations controlled by each step are determined by the plugboard connections. The 60 bi-stable selectors or switches 752 enable the programme sequences to be modified, e.g. in accordance with calculation results; 30 two-input diode coincidence circuits also are provided for this purpose. The plugboard receives signals from circuit 706 indicating the state of the accumulator. Address selection and read-in or -out from stores 724-726 is controlled by the plugboard. For the addressed storage 728 addresses are set up on two-order decimal accumulators or registers A, A<SP>1</SP>, B, B<SP>1</SP>, into which numbers may be entered from plugboard-controlled emitter 797 or from the 1st and 2nd or 6th and 7th orders of channel 507, and may be added to values already in the registers. Numbers may be read out to the 1st and 2nd or 6th and 7th orders of channel 529. Also, the address of one of stores 724-726, instead of being selected directly on the plugboard, may be set up in the units order of a register. Emitter control of the registers may occur simultaneously with other calculator operations effected via main channels 507, 529. The values in A and A<SP>1</SP> and in B and B<SP>1</SP> may be compared in two devices 802. Examples of plugboard wiring are given, e.g. for filling the addressed storage 728 from 10 consecutive cards via the input storage 725; for performing floating point arithmetic employing the significant figure trap; and for obtaining square roots. Programme device. A bi-stable trigger circuit 965, Fig. 113, is provided for each programme step- and, when ON (right output positive) applies a positive operative potential through one or more cathode followers to plug hubs 759 which may be connected to the devices to be controlled during the step. The triggers for the multiply-divide steps, such as 1 and 2, also controls a double cathode follower and gate 974 whereby the left or right side, and corresponding plug hubs 760 or 761 are rendered operative according to whether line 978 or 977 is negative. If the programme step is not connected to perform multiplication or division, lines 977, 978 are both rendered positive, and the hubs 760, 761 are operative in the same manner as common hubs 759. The trigger which is ON is normally switched OFF after one primary cycle, by a programme advance pulse at time 2AB on line 969, and then applies a positive pulse to a corresponding OUT hub 756 which may be connected, directly or via a selector to the IN hub 754 of the next programme step to switch ON the trigger therefor. For programme steps 21-40, a special advance line is provided (969A, not shown), which does not receive 2AB pulses if a STOP-GO trigger (Fig. 113A, not shown) is switched to the STOP condition. Selectors. Each selector comprises a bistable trigger circuit 986, Fig. 115, which controls double cathode follower and gate 987, whereby impulses applied to common (C) hub 991, normally directed to N hub 989, appear on T hub 990 if the trigger is switched by a pulse on PU hub 755 applied through double inverter 985, the trigger being reset by a pulse to DO hub 766. The selectors may be reset in blocks of ten by pulsing a corresponding reset hub connected to lines such as 993. Shift unit. Fig. 122 diagrammatically shows the connections between the shift unit and the accumulator 701 and entry and exit channels 507,529. In Figs. 1A and 122, the unit is in the " home " or " IN 1-OUT 8 " position in which the units order of channel 710 is aligned with the input circuit to the units order of the accumulator, while the 8th order of the output circuit of the accumulator is aligned with the units order of channel 711. The unit may be shifted from the home position, 1 to 7 steps to the left (" IN 2-OUT 7 " to " IN 8-OUT 1 positions), and comprises a pyramidal network of electronic coincidence switches (Figs. 123A and 123B, not shown), the 14 output lines 1264 being connected to bi-stable trigger circuits 1266, Fig. 124, in the add-subtract control unit 703. Accumulator. This comprises 14 decimal counter denominations of which the first two are shown in Fig. 124. Each denomination comprises trigger circuits 1269-1272 representing 1, 2, 4, 8 respectively, and a carry trigger 1277. The control trigger 1266 is normally in the True Add (TA) condition in which it renders a corresponding (left or right) section of double triode coincidence switch 1275 inoperative. For entry into the accumulator, 9 read-in pulses at primary cycle times 11B-19B are applied via line 1312 to all switches 1275. The entered value is represented by time-differentiated potential changes, on shift unit exit lines 1264, which switch over triggers 1266 to the Complement Add (CA) condition in which they allow the remaining pulses on 1312 to pass to the units triggers 1269 of the associated counters. If a carry is stored in a trigger 1277, it allows a 20B-23B carry gate pulse to pass through the left-hand section of switch 1275A to the units trigger 1269 of the next higher denomination. For Complement Add entry, the triggers 1266 are set to CA by a 10A pulse applied via line 1282 and diode circuits 1279, so that the B- pulses on line 1312 are allowed to pass to the counters until the triggers are reset to TA by the times-differentiated pulses on lines 1264. The counters thus receive a number of pulses corresponding to the 9's complement of the number to be entered. The type of entry (True or Complement Add) is controlled by a trigger circuit 1284 (Fig. 125, not shown) which is set to the CA or TA