baber/WOPTO huggingface dataset:
Patent TW-200919477-A (TW)
Title: Efficient erase algorithm for SONOS-type NAND flash
Inventor: LUE HANG-TING
IPC: G11C16/14
Filed: 2008-08-18
Abstract: A method for operating a dielectric charge trapping memory cell as described herein includes applying an initial voltage from the gate to the substrate of the memory cell for a predetermined period of time to reduce the threshold voltage of the memory cell. The method includes applying a sequence of voltages from the gate to the substrate of the memory cell to further reduce the threshold voltage of the memory cell, wherein a subsequent voltage in the sequence of voltages has a lower magnitude from the gate to the substrate than that of a preceding voltage in the sequence of voltages.
Patent TW-200918431-A (TW)
Title: Withdraw assistance system of cut-tape for automatic tape cutter
Inventor: HONG SEONG-MAN
IPC: B65H35/06
Filed: 2008-08-18
Abstract: The invention relates to an automatic slitter for slitting package belt into required length automatically, in particular a slitter educing auxiliary device of automatic slitter capable of educing cut belt easily with minor force so as to provide convenience for operators. A lifting mechanism making the back part higher than the front part of the main body is arranged in the main body whose back part has a rolling belt disposing groove and whose front part has a discharge hole for discharging the cut belt.
Patent TW-201013691-A (TW)
Title: Error correcting code circuit
Inventor: Lin shi-han
IPC: G11C29/44
Filed: 2008-09-25
Abstract: The error correcting code circuit of the present invention mainly accesses a correction function selection register through a firmware program in order to activate the debug capability provided by the ECC circuit, and to generate the polynomial coefficients according to the correction function selection value from a coding control module when the user information is written into the flash memory by a flash memory controller, then a programmable encoder loads the said polynomial coefficients in real time and encodes the user information to generate the ECC redundancy checking code; when the flash memory controller reads the user information in the flash memory chip, it conducts the encoding procedure at the same time. When a programmable decoder determines that the user information is correct, it completes the decoding procedure; conversely, when the user information is determined to be erroneous, the error correcting module inside the programmable decoder will initiate the data debugging procedure, and to send out control signal to write the corrected data into memory, then completes the decoding procedure.
Patent TW-200925670-A (TW)
Title: Color filter, method for producing the same, and solid-state imaging device
Inventor: KIKUCHI TOMOYUKI
IPC: G02B5/20
Filed: 2008-10-17
Abstract: A pattern of a color filter is formed by forming a layer (16) containing an oxide of at least one metal selected from Ti, Ta, Zn and Zr on a supporting body (12), forming a colored layer (18) on the layer containing a metal oxide, and then removing a part of the colored layer by dry etching. Consequently, there is obtained a color filter which is characterized in that a layer containing an oxide of at least one metal selected from Ti, Ta, Zn and Zr is formed on a supporting body, and a colored layer is formed through the layer containing a metal oxide. Also disclosed is a solid-state imaging device (10) comprising such a color filter.
Patent TW-201017843-A (TW)
Title: Window-type semiconductor package and method for fabricating the same
Inventor: HUANG CHIH-MING
IPC: H01L23/488
Filed: 2008-10-29
Abstract: A window-type semiconductor package and a method for fabricating the same are provided. The method includes: forming a first opening in a dielectric carrier board having a first surface and an opposing second surface; forming a first conductive via and a second conductive via to flank the first opening; forming, on the first surface of the dielectric carrier board, a conductive trace layer for electrical connection with a conductive material disposed in the first conductive via and the second conductive via; mounting a chip on the conductive trace layer, wherein a die pad for the chip is exposed from the first opening; connecting electrically, by a plurality of bonding wires and through the first opening, the die pad for the chip to a portion of the conductive material in the first conductive via, wherein the portion of the conductive material is close to the second surface of the dielectric carrier board; and implanting a plurality of solder balls on a portion of the conductive material in the second conductive via, wherein the portion of the conductive material is close to the second surface of the dielectric carrier board.
Patent TW-201019545-A (TW)
Title: Universal connecting device
Inventor: Bao zhen-yi
Filed: 2008-11-06
Abstract: A universal connecting device includes a connector mounted on a plane, two first guiding members symmetrically mounted on the plane and two second guiding members also symmetrically mounted on the plane. The connector has a first jack provided for a first PCB inserting therein, and a second jack located upon the first jack along the altitude of the connector and provided for a second PCB inserting therein. The two first guiding members are respectively located two sides of the first jack of the connector and adapted to guide the first PCB to insert into the first jack. The two second guiding members connected to the first guiding member are respectively located two sides of the second jack and adapted to guide the second PCB to insert into the second jack. The distance of the two second guiding members equal to the width of the second PCB is larger than the distance of the two first guiding members equal to the width of the first PCB.
Patent TW-200932392-A (TW)
Title: Sheet material
Inventor: DEELEY GEOFFREY THOMAS
IPC: B21B1/28
Filed: 2008-11-07
Abstract: A sheet of cold rolled material having on both of its surfaces rows of projections and rows of depressions, the projections on one surface corresponding with the depressions on the other surface, the relative positions of the projections and depressions being such that lines drawn on a surface of the sheet between adjacent rows of projections are non-rectilinear, the sheet having a base gauge G, wherein each projection has a substantially continuous region of peak plastic strain at, toward or about its apex and/or is thinned by no more than 25% of its base gauge G. Methods of forming the sheet material and tools for forming the sheet material are disclosed.
Patent TW-200937540-A (TW)
Title: Integrated circuit package system with package integration
Inventor: KO WON-JUN
IPC: H01L23/28
Filed: 2008-11-20
Abstract: An integrated circuit packaging method includes: providing a base substrate; attaching a base integrated circuit die over the base substrate; forming a support over the base substrate near only one edge of the base substrate; and attaching a stack substrate over the support and the base integrated circuit die.
Patent TW-200937460-A (TW)
Title: Chip resistor and method of making the same
Inventor: TSUKADA TORAYUKI
IPC: H01C1/148
Filed: 2008-12-12
Abstract: A chip resistor includes a metal resistor element made in the form of a chip that includes an upper surface, a lower surface, two end surfaces, and two side surfaces. Two electrodes are formed on the resistor element to be spaced from each other in a longitudinal direction of the resistor element. Each of the electrodes is formed directly on the resistor element and extends continuously from the lower surface onto the upper surface via a corresponding one of the two end surfaces.
Patent TW-200916720-A (TW)
Title: Improved structure for distance-measuring wheel
Inventor: LAI YING-WU
IPC: G01B3/12
Filed: 2008-12-26
Abstract: The invention provides an improved structure for distance-measuring wheel, which includes: a rotating wheel that is pivotally installed at the ends of two sided arms under the base that joined with the handle bar, and is linked and coupled with the counter on the joining base through an adjustable transmission member and an adjusting base; one of the side arms is equipped with a protruded joining base having high and low two-stepped surface, on which two sets of combining holes are configured respectively at the upper and the lower parts for presenting two different measurement units respectively; the adjustable transmission member comprises an upper and a lower transmission members that are fitted together so that the length are adjustable, wherein the lower transmission member is engaged with a bevel gear on the axle of the rotating wheel, and the end of the upper transmission member is equipped with a bevel gear; the adjusting base is a block that is formed in a two-stepped surface by connecting an upper and a lower surfaces, of which the top surface is integrated with a bevel gear having ring surface and respectively engaged with a bevel gear at the end of the upper transmission member and a gear at the edge of the rotating axle of the counter, and two sets of combining holes representing two different measurement units are respectively disposed at two sides of the upper and the lower surfaces. By this way, the adjusting base can be pushed upward or downward so as to change the connection between two sets of combining holes at the connection base; therefore the manufacturer only needs to manufacture different sizes of gear on rotating axle of the counter for mutually engagement with the gear on adjusting base in order that the distance-measuring structures with different measurement units can be assembled. It has the advantages of effectively saving the cost with mold, stocks, and material preparation.
Patent TW-201027210-A (TW)
Title: Active device array substrate and liquid crystal display panel and liquid crystal display thereof
Inventor: HSIEH CHIH-YUNG
IPC: G02F1/136
Filed: 2009-01-08
Abstract: An active device array substrate and liquid crystal display (LCD) Panel and liquid crystal display (LCD) thereof are disclosed. The main manner of the present invention is increasing a set of bias lines provided the bias signals to the storage capacitance of the pixel units with the bright zone and the dark zone on the active device array substrate. Thus, when the layout type of the bias lines is adopted to the horizontal layout type, no matter the LCD panel is adopted to the driving manner of the dot inversion, the column inversion, or the row inversion, the LCD has not the color washout and display brightness unevenness phenomenon.
Patent TW-200947659-A (TW)
Title: Semiconductor apparatus and method for manufacturing the same
Inventor: HARADA YOSHIMICHI
IPC: H01L21/768
Filed: 2009-01-09
Abstract: A semiconductor apparatus including a semiconductor substrate, an insulating layer, a via hole, and a through-hole interconnection is provided. The insulating layer is formed on the semiconductor substrate. The via hole is formed through the semiconductor substrate and the insulating layer. The through-hole interconnection has a conductive layer formed on an insulating layer in the via hole. The surface of the insulating layer formed on the inner surface of the via hole is substantially planarized by filling a recessed portion on a boundary between the semiconductor substrate and the insulating layer formed on the semiconductor substrate.
Patent TW-201030629-A (TW)
Title: Method and system for testing RFID tags
Inventor: KO MING-HSIEN
IPC: G06K19/077
Filed: 2009-02-13
Abstract: The present invention provides a method and a system for testing RFID tags, which utilizes a way of adjusting the distance between the RFID tags and interrogator or adjusting the power of the interrogator accompanied with a shielding procedure for testing and classifying the RFID tags. By means of the method and the system of the present invention, it is capable of judging the efficacy and good and bad of the RFID tags, while the interrogatable distance of the RFID tags is capable of being tested effectively.
Patent TW-201036379-A (TW)
Title: WWAN to Ethernet converter and communication system thereof
Inventor: LI CHENG-YEN
IPC: H04L12/28
Filed: 2009-03-27
Abstract: A WWAN to Ethernet converter and its communication system are disclosed. The converter includes: a SIM interface for reading data of a SIM card; a RF circuit is used to receive RF signal associated with the data of the SIM card, and is used to convert between the RF signal and a baseband signal; a digital signal processor (DSP), coupled to the RF circuit, processes the baseband signal; and an Ethernet control device, coupled to the DSP, converts between the processed baseband signal and an Ethernet signal.
Patent TW-200948835-A (TW)
Title: β-pipene based copolymer and producing method thereof
Inventor: NAKAHARA ATSUHIRO
IPC: C08F8/04
Filed: 2009-04-09
Abstract: The prevent invention provides a β -pipene based copolymer and the mold article thereof having the excellent heat-resistence and lightfastness, low water-uptaking, and high transparency. The β -pipene based copolymer is consisting of 30 to 80 mass% of β -pipene units and 70 to 20 mass% of aromatic based units such as α -methylstyrene and the like, 80 mole% of olefinic double bonds of which are hydrogenated, preferably, 50 mole% of aromatic cycles derivated from aromatic units is hydrogenated. A mold article is formed from the said β -pipene based copolymer.
Patent TW-200952525-A (TW)
Title: System and/or method for reducing initial position uncertainty in SPS operation
Inventor: ISCHE MARC
IPC: G01S5/14
Filed: 2009-04-20
Abstract: The subject matter disclosed herein relates to a system and method for reducing an initial position uncertainty of a mobile station. In one example, although claimed subject matter is not so limited, a process to improve an initial position estimate comprises identifying the locations of a serving cell and at least one other landmark proximate to a receiver and determining an initial estimate of the location of the receiver based, at least in part, on the identified locations of the serving cell and the at least one other landmark.
Patent TW-201005980-A (TW)
Title: Thin film solar cell module and method of making same
Inventor: UCHIDA HIROTO
IPC: H01L31/18
Filed: 2009-05-14
Abstract: This invention provides a thin film solar cell module and a method of making the same, which is capable of securing highly reliable dielectric strength voltage features. The method of making a thin film solar cell module according to the present invention comprises the steps of: forming first electrode layer 11 upon insulating transparent substrate 10; forming first separating trenches 21X, 21Y in a depth reaching the surface of transparent substrate 10 to separate peripheral areas 30X, 30Y of transparent substrate 10 from electric generating area 50 located therein; forming semiconductor layer 13 upon transparent substrate 10; forming second electrode layer 12 upon transparent substrate 10; forming second separating trenches 22a, 22X, 22Y in a depth reaching the surface of transparent substrate 10 upon a location closer to peripheral areas 30X, 30Y than first separating trenches 21X, 21Y; and blasting peripheral areas 30X, 30Y to remove first electrode layer 11, semiconductor layer 13 and second electrode layer 12 upon peripheral areas 30X, 30Y.
Patent TW-201006659-A (TW)
Title: Pattern forming method
Inventor: UCHIDA HIROSHI
IPC: B29C59/02
Filed: 2009-05-14
Abstract: A pattern forming method which comprises: a first step of forming a first ultraviolet curable resin layer on a substrate, a second step of pressure-bonding the substrate and a first mold subsequent to facing the first ultraviolet curable resin layer to a pattern formed surface of the first mold having a predetermined pattern, and a third step of irradiating diffused ultraviolet rays to the first ultraviolet curable resin layer, to which the pattern of the first mold is transferred, by using a member which diffuses ultraviolet rays and exists between the ultraviolet curable resin layer and an ultraviolet ray source.
Patent TW-201042304-A (TW)
Title: Splitter module
Inventor: OHTSUKA KENICHIRO
IPC: G02B6/26
Filed: 2009-05-20
Abstract: This invention is to provide a compact and easy-to-handle splitter module. The splitter module (1) comprises: an optical splitter (S) which splits an inputted optical signal for output; a lower chassis (10) containing the optical splitter (S) and a plurality of output sockets (40) which are connected to the optical splitter (S) via optical fiber cores (C2) and which have insertion openings (41) formed at one end; an upper chassis (20) which is provided on an upper surface (10c) of the lower chassis (10) and which stores a plurality of output sockets (40); and anchor parts (30) mounted on the lower chassis (10). The output sockets (40) are mounted rotatably with respect to the anchor parts (30) so that the insertion openings (41) of the output sockets (40) can come closer to or get farther away from the anchor parts (30).
Patent TW-201044838-A (TW)
Title: Phone number authentication method and system for network identification
Inventor: LIN CHI-YUAN
IPC: H04L9/32
Filed: 2009-06-04
Abstract: The invention relates to a phone number authentication method and system for network identification. A set of phone number is provided to users by a network system service provider. The phone number can be interoffice phone or free phone. A user logging in the network system first inputs his account number and uses interoffice phone or mobile phone to call at the phone number provided by a service provider for identification. The phone number to be authenticated for the user to dial is registered in advance during the user's enrollment. After the user calling at the phone number to be authenticated, the system receives the phone number to be authenticated and decodes and converts it to the binary data to be verified. Then the data to be verified is transmitted to the server host of the network system for comparison so as to complete the identification of the user. Thereby the purposes of logging in the network system conveniently and verifying network identity which effectively prevents the account from stealing can be achieved.
Patent TW-201032296-A (TW)
Title: Compact power semiconductor package and method with stacked inductor and integrated circuit die
Inventor: FENG TAO
IPC: H01L23/28
Filed: 2009-06-05
Abstract: A power semiconductor package is disclosed with high inductance rating while exhibiting a reduced foot print. It has a bonded stack of power IC die at bottom, a power inductor at top and a circuit substrate, made of leadframe or printed circuit board, in the middle. The power inductor has a inductor core of closed magnetic loop. The circuit substrate has a first number of bottom half-coil forming conductive elements beneath the inductor core. A second number of top half-coil forming conductive elements, made of bond wires, three dimensionally formed interconnection plates or upper leadframe leads, are located atop the inductor core with both ends of each element connected to respective bottom half-coil forming conductive elements to jointly form an inductive coil enclosing the inductor core. A top encapsulant protectively encases the inductor core, the top half-coil forming conductive elements, the bottom half-coil forming conductive elements and the circuit substrate.
Patent TW-201009576-A (TW)
Title: Memory system, access control method therefor, and computer program
Inventor: TANAKA HIDEO
IPC: G06F12/00
Filed: 2009-06-08
Abstract: A memory system includes: a memory that has plural banks; a memory controller that includes a request queue and a bank monitor and controls access to the memory; a master group including plural masters that can request access to the memory; and a system bus which is connected between the memory controller and the master group and in which an arbiter is arranged, wherein the request queue has a scheduling function for receiving access requests issued from the master group through the system bus and appropriately rearranging the received access requests and provides the arbiter with queue information, the bank monitor monitors information concerning respective banks of the memory and provides the arbiter with the bank information, and the arbiter arbitrates requests issued in parallel from the masters of the master group on the basis of the queue information and the bank information provided thereto and transmits the information to the memory controller as access control information.
Patent TW-200951364-A (TW)
Title: LED light source machine
Inventor: LIN SHU-WEI
IPC: F21V29/00
Filed: 2009-06-18
Abstract: The present invention is an LED light source machine which comprises an empty housing, a heat-dissipation component, and a light-emitting module. The housing has a containing space inside, a wall of the housing has an light-exit outlet. The heat-dissipation component is disposed inside the containing space, the light-emitting module is an LED light-emitting component and is assembled on the side surface of the heat-dissipation component facing the light-exit outlet. Since said LED light-emitting component will not generate high-temperature to damage a fiber component sleeved on the light-exit outlet, besides, there is no need to assemble any light-condensing component and color filter sheet between the LED light-emitting component and the light-exit outlet, so the spacing between the LED light-emitting component and the light-exit outlet can be minimized, the intensity of the original light source will not lose by passing through the spacing. Furthermore, the light-emitting module is installed on the heat-dissipation component, therefore, it can assist the light-emitting module to dissipate the heat for achieving good heat-dissipation effect.
Patent TW-201022142-A (TW)
Title: Graphene and hexagonal boron nitride planes and associated methods
Inventor: Song jian-min
IPC: C01B35/14
Filed: 2009-07-08
Abstract: Graphene layers, hexagonal boron nitride layers, as well as other materials made of primarily sp2 bonded atoms and associated methods are disclosed. In one aspect, for example, a method of forming a graphene layer is provided. Such a method may include mixing a carbon source with a horizontally oriented molten solvent, precipitating the carbon source from the molten solvent to form a graphite layer across the molten solvent, and separating the graphite layer into a plurality of graphene layers.
Patent TW-201004968-A (TW)
Title: Removal of trace arsenic impurities from triethylphosphate (TEPO)
Inventor: MAYORGA STEVEN GERARD
IPC: B01J20/28
Filed: 2009-07-20
Abstract: A method of removing trace levels of arsenic-containing impurities from raw triethylphosphate (TEPO) is disclosed. The method uses adsorption, or adsorption followed by a flash distillation. The method comprises contacting raw triethylphosphate (TEPO) with an adsorbent which selectively adsorbs the arsenic-containing impurities in the raw triethylphosphate (TEPO). The adsorbent is a base promoted alumina containing adsorbent represented by a formula: ZxWy; where x is the weight percentage of Z in the adsorbent ranging from 30% to 99. 999%; y is the weight percentage of W in the adsorbent, and x+y=100%; Z is selected from the group consisting of alumna (Al2O3), magnesium-alumina based layered double hydroxide (MgO-Al2O3), alumina-zeolite, and mixtures thereof; and W is selected from the group consisting of at least one basic metal oxide, at least one basic metal carbonate, and mixtures thereof. The method will result in a final triethylphosphate (TEPO) with a few ppb to less than 1ppb arsenic containing impurities.