Patent WO-2021259536-A3 (WO)
Title: Method for contacting a power semiconductor with a substrate, and power semiconductor module having a power semiconductor and a substrate
Inventor: WAGNER CLAUS FLORIAN
IPC: H01L23/58
Filed: 2021-04-30
Abstract: In order to achieve improved switching behavior and a higher maximum current density, it is proposed that, in a method for contacting a power semiconductor device (2) with a substrate (4), the power semiconductor device (2) has, on a side (8) facing the substrate (4), at least two contact regions (10, 12) which are electrically isolated from each other, wherein the at least two electrically isolated contact regions (10, 12) of the power semiconductor device (2) are integrally bonded to the substrate (4) by means of a structured, in particular metal, connecting layer (26) which comprises at least two sintering layers (20, 24, 36), wherein the at least two sintering layers (20, 24, 36) are substantially closed, i.e. are applied, in contrast to screen printing, with a stencil without a supporting screen so that there are no functionally detectable cavities in the connecting layer (26). The power semiconductor (2) can be contacted by the connecting layer (26) at a distance of at least 70 μm, in particular at least 200 μm, from the substrate (4). The effect of such a distance is that electromagnetic fields which occur on the power semiconductor (2) and which occur, for example, in the region of a guard ring (2b) do not noticeably interact with the substrate (4), and the switching behavior of the power semiconductor (2) and an insulation in the edge region are not noticeably influenced by too large a proximity to the substrate (4), which leads to an increase in the service life. A first sintering layer (20) can be applied to the substrate (4) and at least partially dried, and at least one second sintering layer (24) can be applied to the first sintering layer (20) and at least partially dried, wherein the at least two electrically isolated contact regions (10, 12) of the power semiconductor (2) are contacted with the second sintering layer (24), in particular by pressing, and are then integrally bonded to the substrate (4) by sintering of the at least two sintering layers (20, 24, 36). The first sintering layer (20) can be applied by means of a first stencil (18) and the second sintering layer (24) can be applied by means of a second stencil (22), the second stencil (22) being thicker than the first stencil (18). Alternatively, a first sintering layer (20) can be applied to the substrate (4) and at least partially dried, wherein at least one second sintering layer (24) is applied to a transfer unit (38) and at least partially dried, wherein the at least partially dried second sintering layer (24) is transferred by the transfer unit (38) to the first sintering layer (20), wherein the at least two electrically isolated contact regions (10, 12) of the power semiconductor (2) are contacted with the second sintering layer (24), in particular by pressing, and are then integrally bonded to the substrate (4) by sintering of the at least two sintering layers (20, 24). The first sintering layer (20) can be applied to the substrate (4) by means of a first stencil (18) and the second sintering layer (24) can be applied to the transfer unit (38) by means of a stencil (40) that is mirror-symmetrical to the first stencil (18). Still alternatively, a first sintering layer (20) can be applied to the substrate (4) and at least partially dried, wherein at least one second sintering layer (24) is applied to a molded metal body (42) and at least partially dried, wherein the molded metal body (42) is placed, with a side facing away from the at least partially dried second sintering layer (24), on the first sintering layer (20), wherein the at least two electrically isolated contact regions (10, 12) of the power semiconductor (2) are contacted with the second sintering layer (24), in particular by pressing, and are then integrally bonded to the substrate (4) by sintering of the at least two sintering layers (20, 24). The molded metal body (42) can comprise at least two metal plates (42a, 42b), the at least one second sintering layer (24) being applied to the at least two metal plates (42a, 42b) of the molded metal body (42) by means of at least one first stencil (18). The power semiconductor (2) can have, on the side (16) facing away from the substrate (4), a third contact region (14) which is integrally bonded to an additional, in particular multi-layered, substrate (48), wherein the two electrically isolated contact regions (10, 12) are each connected, in particularly integrally, to the additional substrate (48) via at least one connecting element (50, 52). The power semiconductor (44) can be included in a power converter.