Patent ES-367355-A1 (ES)
Title: Plural operating mode automatic gain control system
IPC: H04N5/53
Filed: 1969-05-17
Abstract: The invention comprises an A.G.C. system for use in a television receiver including signal processing means for deriving composite signals including video components and sync. components extending in amplitude beyond the video components. The arrangement includes a noise suppression circuit coupled to the signal processing means and to both an A.G.C. and sync. separator circuits, and comprises means for supplying from a first voltage source a first fixed reference voltage to the signal processing means and a second fixed reference voltage to both the noise suppression circuit and the A.G.C. circuit. In an embodiment the signal processing means comprises a detector circuit 19 including rectifier diode 20 and filters 22, 23 which feeds composite signals in which the sync. pulses comprise the most positive component to an emitter-follower 35. The emitter follower 35 feeds luminence and chrominance channels and also a noise-suppression circuit in which the complete signal is passed over resistor 50 to combine with inverted components slightly more positive than the peaks of the sync. pulses which pass via diode 54 and phase inverter 51. The combined noise-suppressed signals are fed to a sync. separator 46 and also via resistor 61 to the base of an A.G.C. gate transistor 60. A resistance network 30, 31, 32 feeds from source + Vt a first fixed bias to the detector diode 20 and a second fixed bias to both the noise suppression circuit via resistor 52 and to the emitter of transistor 60. Gating pulses are applied to the collector of transistor 60 from deflection circuits 45 via capacitor 70, damping network 73, 74 and series divider 71. An A.G.C. voltage is derived across capacitor 70 which is fed to the R.F. tuner 11 via a network with adjustable delay. The R.F. tuner 11 utilizes a field-effect transistor 12 with two gates, the signal being applied to the one and the A.G.C. voltage to the other. Delay is provided by means of Zener diode 96, the gain-control signal being applied, together with a fixed positive voltage via resistor 93, to its anode: a fixed positive voltage is also applied to its cathode from source + Vt via resistors 98, 99, 97 and stabilizing Zener diode 100. The delay may be adjusted by means of variable resistor 87 which varies the voltage applied to the anode of Zener diode 96 over resistors 86, 90, 76 the arrangement is such that when the A.G.C. voltage reaches a predetermined level, Zener diode 96 again becomes conductive by Zener action and clamps the voltage applied to R.F. stage 11, to protect FET transistor 12 against reverse voltage breakdown. An amplified forwardacting A.G.C. bias is applied to the I.F. amplifier 15 via transistor 72. A diode 47 is also provided with switch 49 in its "normal" position this diode is biased non-conductive and does not affect the operation of the circuit. If switch 49 is reversed, however, to " service " position, diode 47 becomes conductive and applies a positive bias to transistor 60 this causes a large A.G.C. voltage to be developed, causing the picture to be eliminated for servicing of the receiver.