Patent GB-950462-A (GB)
Title: Memory systems
IPC: H01L39/18
Filed: 1960-07-05
Abstract: 950,462. Superconductor devices. RADIO CORPORATION OF AMERICA. July 5, 1960 [July 10, 1959], No. 23540/60. Heading H1K. [Also in Divisions G4 and H3] A matrix store comprises superconducting elements each of which comprises a closed loop in which the direction of current flow represents 1 or 0. Adjacent each loop is a sensing conductor of superconducting material, these conductors being arranged in a series-parallel circuit. Individual loops, Fig. 1. Loop 10 carries current circulating in the clockwise or counterclockwise direction according to whether it represents 1 or 0. Data is entered by likedirected currents in selecting conductors 12, 14 in the one or other direction as the case may be. A thin sensing conductor 16, which may be of tin, is in resistive condition when the loop 10 is in superconducting condition. An interrogating conductor 18 of niobium remains always in superconducting condition. A current Ir applied to conductor 18 aids the magnetic field produced by clockwise current in loop 10 and conductor 16 remains resistive. However it appears counterclockwise current in the loop 10 so that conductor 16 then becomes superconducting. Such read-out is non-destructive. AND-gate. During the sensing of stored information the element acts as an AND gate i.e. the sensing conductor changes to super-conducting only when the interrogating signal and the loop current are of the appropriate polarity at the same time. Random access to matrix store. An array, Fig. 5, is used to store 4 words each of 6 binary digits, information being entered over column and row selecting lines 22, 24. The sensing conductors 30 for each loop in a row are connected in parallel across a related pair of busbars 32-35, the bus-bars being connected in series via conductors 38-40 between a sensing source 41 and a sensing device 42. If it is to be determined whether a word is stored in the memory; that word is set up on word select source 29 to apply +ve or - ve pulses in respect of each 1 or 0 in the word to interrogation conductors 27. The interrogation pulses are applied to the associated columns of loops and any loop which agrees with the interrogation changes its sensing conductor 30 to resistive condition. When 41 applies a sensing current to the sensing network the resistance between each pair of bus-bars is negligible unless all the loops 10 in one row are in agreement with the word set-up in 29. The device then marks one or other output 49 according to whether the required word is present or absent. Random access with read-out, Fig. 6. Each loop has an auxiliary storage element 54. A word select source 29 applies interrogation signals simultaneously or successively to the interrogation conductors 52. According to the polarity of the interrogating current so a clockwise or counter-clockwise current is set up in the associated auxiliary loops 54. If the desired bit is stored in a loop a resistive impedance is offered to a sensing signal Is applied subsequently from 41. By repeating a successful presence testwith successive additions of a further location-indicating column the location recorded alongside the address word can be read out, " yes " and " no " corresponding to 1 and 0, respectively. When the location has been established the relevant information can be read out. The address of a located word can be determined in one step by an encoder circuit, Fig. 7. Each of the windings 64 is in parallel with the sensing conductors of the matrix. When a row of sensing conductors becomes resistive the associated winding 64 energizes and whichever windings 66-70 are associated with the energized winding become resistive to indicate on the binary principle the location of the wanted word.