Patent GB-1067157-A (GB)
Title: Method of operating a magnetic memory apparatus
IPC: G11C11/06
Filed: 1963-10-16
Abstract: 1,067,157. Circuits employing bi-stable magnetic elements. SPERRY RAND CORPORATION. Oct. 16, 1963 [Oct. 29, 1962], No. 40842/63. Heading H3B. In a coincident current magnetic memory noise pulses due to half-select current pulses coupled to half-selected cores are effectively reduced by utilizing a pre-write disturb pulse. Memory system 28 is composed of a plurality of square loop cores 12 arranged in two rows and two columns in two planes of four cores per plane. Drive pulse sources 30, 38 are coupled to drive wires 34X, 36X and 42Y, 44Y, respectively, inhibit pulse source 46 is coupled to wires 50Z, 52Z and stages 54, 56 of output register 58 are coupled to sense lines 60S, 62S. With the magnetic state of core 12a, for example, initially at point 14, Fig. 5, representing a stored " 0 " pulses 148 150, Fig. 4, are applied to drive wires 34X, 42Y to generate field pulse 152 which causes the state of core 12a to follow the loop 14-154-26-154-14. Next a prewrite disturb pulse 156 is applied to line 50Z producing a field pulse 158 which causes the state to follow the path 14-154-14. Write pulses 160, 162 which overlap with the disturb pulse 156 are then applied to wires 34X, 42Y so as to generate field pulses 164, 166 which cause the core 12a to follow the loop 10 and come to rest at the point 16 representing a stored " 1." If an "0" is to be written instead of a "1"  inhibit pulse 168 coacts with pulses 156, 160, 162 to generate field pulses 164, 170, 172 to cause the magnetic state of the core to follow the minor hysteresis loop 14-174-176, point 176 representing a Disturbed " 0 " write state. If after the completion of the read-write cycle which results in the writing of a " 1 " a half select pulse 180 is applied to the core 12a the state of the latter follows hysteresis loop 16-184- 186-188-190, point 190 representing a Disturbed " 1 " read state. The next pre-write disturb pulse 156a applied to line 50Z causes the magnetic state to follow the loop 190- 194-186-188-190 and this disturb pulse then coacts with half-select write pulse 196 to cause the core to follow the loop 190-202-204- 206-208 point 208 representing a write " 1 " Disturbed state which is nearer the Undisturbed " 1 " state than the Disturbed " 1 " read state. The subsequent pre-write disturb pulse 156b causes the state to return to the Disturbed " 1 " read state 190 and the next subsequent halfselect read-restore operation, pulses 214, 216 and disturb pulse 156c, causes the state of core 12a to be moved from point 190 through point 208 and back to point 190. If the magnetic state of core 12a is at point 176 after the completion of the full select read write cycle then the core during the half-select cycle is placed first in the Disturbed " 0 " read state 226, then in the Undisturbed " 0 " read state 14 and finally in the Disturbed " 0 " write state 176. During the No Select period the core comes to rest in the Disturbed " 0 " read state 226. The next subsequent half-select read-restore operation causes the magnetic state of the core to be moved from point 176 through 226 and back to 176. The noise induced in sense wire 60S due to the change of the magnetic state of halfselected cores from the write " 1 " Disturbed state to the read " 1 " Disturbed state is substantially less than the output induced in 60S due to the change of the magnetic state of the single full selected core from the write " 1 " Disturbed state to the read " 0 " Disturbed state. In addition by preceding a half-select operation by a no-select operation a further reduction in noise is achieved. Figs. 3b, 3c (not shown) show how a reduction of memory system cycle time over a conventional memory system 3a (not shown) is achieved using a prewrite disturb pulse.