Patent GB-1411719-A (GB)
Title: Multiterminal digital signal transfer systems
IPC: H04L7/04
Filed: 1973-10-23
Abstract: 1411719 Loop communication systems; Synchronizing INTERNATIONAL BUSINESS MACHINES CORP 23 Oct 1973 [26 Dec 1972] 49240/73 Headings H4K H4P and H4L Synchronization in a unidirectional loop system is effected by clock pulse which traverse the loop in the opposite direction to information signals. At each terminal the two types of signal are distinguishable by directional couplers which consist of a printed circuit strip line transformer sandwiched between two grounded copper sheets. Such couplers have the virtue that they produce a positive and a negative pulse in their secondary strip line in response respectively to the rising and falling edges of a pulse in the primary strip line, the secondary pulse pair propagating in the opposite direction to the primarypulse. Pulses on the loop are ofsinusoidal waveform, each full period of which represents a 1 bit while absence of any waveform indicates a 0 bit. Reciver of a terminal 14 comprises an input coupler 32, an amplifier 42 and an intermediate coupler 58. The output of the latter is supplied to a sawtooth generator driver 68 which via coupler 70 despatches incoming information to the terminal 14 in a suitable format for reception thereby. Transmitter comprises a first coupler 81 which transfers signals emanating from the terminal 14 to a latch 88 and also to a receiver latch 87. The former in conjunction with counter 90 develops an anti-phase cancelling signal for eliminating that information arriving for this terminal and which is still passing along the loop. The cancellation is effected at coupler 92. Delay circuits 63, 41 ensure that only the incoming time slot information relevant to this terminal is cancelled. In the vacated time slot, the receiver latch 87 gates oscillations corresponding to the data provided by terminal 14 on to the loop via coupler 51. For more information on the receiving and transmitting functions cf Application 49241/73. Repeating.-Samples of all the signals passing along the loop are amplified by amplifier 42 and then with the aid of coupler 48 are superimposed in phase on to the signals still traversing the loop. Delay circuit 54 compensates for delays to the branched-off signals passing through the amplifier. For more information on the repeating function cf Specification 1,410,842. Synchronization.-Clock pulses in the form of an A.C. waveform identical in shape to the information signal waveform traverse the loop from right to left. They are sampled by coupler 101, amplified at amplifier 110 and then superimposed on the original signals by coupler 116. The receiver circuit driver 68, and the transmitter circuit gate 132 and counter 90 are synchronized by the sampled clock signals appearing on lead 124. Due to the directional nature of the couplers clock and information signals do not clash. For example in incoming coupler 32 any sampled clock signals go to earth via terminating resistor 40 while in clock output coupler 116 any sampled information signals (which in any case are of very low amplitude) are faced with the output impedance of the amplifier 110.