Patent GB-1232108-A (GB)
IPC: H04N7/12
Filed: 1968-08-01
Abstract: 1,232,108. Television systems. INTERNATIONAL STANDARD ELECTRIC CORP. 1 Aug., 1968 [3 Aug., 1967], No. 36740/68. Heading H4F. The Specification describes a multiplexed sequential dot interlaced television system having a plurality of television cameras 12, 13, 14 and 15, Fig. 1, at the transmitting station with common sources 16 and 18 of line and frame synchronizing signals, Fig. 4B, supplying all of the cameras. A clock pulse generator 24, generates a train of clock pulses, Fig. 4A, having a frequency f c =f e n 2 , where f e  is the sampling signal frequency where f v  is the frequency of the frame synchronizing signals, L is the number of lines in one frame, D is the number of clock pulses occurring during one line, n 1  is the vertical interlace ratio (if any, and n 2  is a predetermined dot interlace ratio, it being required that the quotient be irreducible and that there are no more cameras than the dot interlace ratio. A shift register 32 having n 2  output channels 33 is coupled to the clock pulse generator and sequentially switches successive ones of the clock pulses to successive ones of its output channels so that a train of sampling pulses, Fig. 4C, having a frequency f e  is provided at each said output channel, said trains of sampling pulses being respective phase-displaced by the period of the clock pulse frequency f c . A plurality of sampling gates 38, 39, 41 and 42 respectively couple the output circuits of the cameras to a video signal transmission facility, each of the sampling dates having a control input coupled to a different output channel of the shift register. Each of the sampling gates thus passes a train of sampled video signals, Figs. 4H, 4I, 4J and 4K from the respective camera to the transmission facility, the trains of sampled video signals thereby being multiplexed (Fig. 4L) in the transmission facility by reason of the phase-displacement of the trains of sampling signals. The line and frame synchronizing signals are also applied to the transmission facility.  At the receiving station, Fig. 2, a plurality of video monitors 75, 76, 77 and 78 is provided equal in number to the cameras, each having line and frame sweep means and a video signal input circuit. A synchronizing signal detector circuit 63 coupled to the transmission facility separates the line and frame synchronizing signals which are applied to all of the video monitors. A clock pulse generator 66 generating a train of clock pulses having said frequency fc, is synchronized with the clock pulse generator at the transmitting station by the separated line synchronizing signals. Shift register 68 is coupled to the receiving station clock pulse generator and has n 2  output channels, thereby producing sampling pulse trains synchronous with respective ones at the transmitting station. A plurality of sampling gates 58, 59, 61 and 62 equal in number to the video monitors, respectively couple the monitors to the transmission facility and are provided with a control inputs coupled to respective, ones of said output channels. The four multiplexed video sample trains are thereby separated out into their respective channels and displayed on the respective monitor. In the transmitter station of Fig. 5 (not shown) and the receiver of Fig. 6 (not shown), the clock pulse generator is started by a pulse generated by line sync. pulse, and is stopped when D clock pulses have been produced. In the receiver station of Fig. 8 (not shown), an individual clock pulse generator, as described in the preceding paragraph is provided for each monitor and is controlled as to its time of starting by the line sync. pulses, via a respective variable delay. Variation of said delays thereby determines which video signal is displayed by which monitor.