Patent GB-532109-A (GB)
Title: Improvements in or relating to calculating machines
IPC: G06F7/46
Filed: 1939-06-09
Abstract: 532,109. Calculating machines; recordcontrolled. BRITISH TABLULATING MACHINE CO., Ltd. June 9, 1939, No. 16969. Convention date, June 10, 1938. [Class 106 (i)] In a machine adapted for multiplication and division, three factors A, B, and C are entered respectively as multiplicand, multiplier, and as a third term in a register, A and B are multiplied together, the product AB (or factor C) is entered as a divisor and factor C (or product AB) as a dividend, and division thereafter effected ; the multiplication employs a predetermined standard series of multiples of the multiplicand, from which the appropriate one are selected according to the multiplier digit and being increased by a power of ten according to the denomination of the multiplier digit; and the division employs a pre-determined standard series of multiples of the divisor, and the dividing mechanism compares and selects the largest multiple that is not greater than the appropriate part of the dividend, registers the selected multiple as a quotient digit, and registers the difference between said multiple and part dividend as part of a fresh dividend, in a manner simulating long division. Specifications 456,367, 456,368 and 457,136 are referred to, for machines multiplying by means of standard multiples of the multiplicand. Specifications 497,039 and 502,958 also are referred to, for machines dividing by using standard multiples of the divisor. The invention is described in a record-card-controlled statistical machine having card-feeding means as in Specification 405,031. There are five accumulating units SP, LQ, RD, ML and MP. ML is a multiplicand (or divisor) unit consisting of six accumulators ML1-2, ML3-6 &c. as set out below, Fig. 37. MP is a register to receive the multiplier entry in multiplying calculations. Units LQ and RD receive components of the products, that in RD being transmitted to LQ to give the final product in the latter. In division LQ receives the quotient and RD the dividend. Accumulator SP is used for computations which involve checking or which involve both multiplication and division. The comparing units CV, Figs 12-15 (not shown), are as described in Specification 523.652. Accumulators. A constantly rotated, square shaft 57, Figs. 3 and 7, carries a yoke 61 holding a winding 313 for each denomination. The ends of a winding 313 are connected to two rings 62 on which contact two stationary brushes 64, Fig. 2 (not shown), connected to the cardreading circuits. A bush 60 is fitted on shaft 57 and freely rotatable on the bush is the denominational register wheel 65, to which is pinned the tens transfer cam 66. Also pinned to parts 65, 66 are holders 88 for the read-out brushes 89. There is a slight air space between parts 66 and 61 so that when the winding is energized by a card-hole the register wheel 65 is magnetically clutched to the yoke 61 for rotation until all wheels are simultaneously held again at the end of the entry part of the cycle. Although the above construction is preferred, the accumulators may be of the type described in Specification 289,068, [Class 106 (i)], having electric reset devices as modified in Specification 422,135 and having total transmitting means according to Specification 422,135. The read-out mechanism associated with each counter wheel consists of ten fixed electric segments spaced over a half-circle, Fig. 9 (not shown), and coacting with a pair of brushes geared to the numeral wheel. In any position one brush rests on a segment and the other on a common segment. The segments are so wired that successive segments represent the numerals 0, 5, 1, 6, 2, 7, 3, 8, 4, 9. The two brushes are not diametrically opposite so that one brush coacts with the series 0, 1, 2, 3, 4 and then the other brush coacts with the interposed series 5, 6, 7, 8, 9. A variable plugboard of known type is used, Fig. 18 (not shown). Of two coacting parts hinged together, one carries a plug base device which is slid into position so that it may be replaced at will by other slides already preplugged for different operations. Figs. 23-30 (not shown) illustrate plugging for various computations. Multiplication. The multiplicand unit ML consists of six accumulators ML1-2, ML3-6, ML4-8, ML-5, ML-7, ML-9, Fig. 37, of which the first three have doubling read-out means as in Specification 456,367. The multiplicand, say, 32 is entered into all the accumulators in the entry cycle except ML4-8. In the next machine cycle, twice the multiplicand is read from the doubling read-out of the first accumulator ML1-2 and entered into ML3-6, ML4-8, ML-5, and ML-9. In the next cycle twice the multiplicand is transmitted from ML1-2 to ML4-8 and ML-5, and in the same cycle six times the multiplicand is transmitted from the doubling read out of ML3-6 to accumulators ML-7 and ML-9. At the end of this building-up operation, the 1, 3, 4, 5, 7, and 9 multiples of the multiplicand stand on the six counters and the doubling readout of the first three counters will give the other three multiples to complete the series of nine. By using two product accumulators RD and LQ multiplication by two orders of the multiplier may be effected concurrently during the same machine cycle. For a multiplier of, say, 27 the seven multiple of the multiplicand is transmitted from the read-out of ML-7 to counter RD at the same time that the two multiple is transmitted from the second read-out of counter ML1-2 to counter LQ. Computing occurs for other columns of the multiplier and in a gathering cycle the amount in counter RD is entered into counter LQ to give the final product which is then punched in the factor-hearing card. Division. On dividing there is a building-up of multiples of the divisor in the counters ML-1-2 &c. similar to the above-described operation for multiples of the multiplicand, except that a column shift device ensures that the highest significant digit always appears in the extreme left hand order of the accumulator ML1-2. The dividend is entered into counter RD, also to the left thereof. This shift to the left saves operating cycles during dividing. A comparison portion of the dividend, say the three highest denominations, is transferred from RD to each section of the comparing units. At the same time different multiples of the divisor are set up in each of said sections. Comparison is effected, as in Specification 523,652, to find the greatest divisor multiple which is not greater than the portion of the dividend being used at this moment. The complement of this greatest divisor multiple is passed from its related read-out to counter RD to effect subtraction from the said portion of the dividend, the appropriate quotient is entered into counter LQ, and the remainder is added to the next comparison portion of the dividend. The final quotient is punched in the factor card. Calculating AB/C. Factor A is entered into the ML unit as a multiplicand and multiples thereof are built up in counters ML1-2, &c. as in "Multiplication" above. Factor B is entered into the multiplier register MP. Amount C is presensed and entered to the left in register SP. The multiplication of A and B is effected, the final product standing in counter LQ. All the ML and RD counters are reset. The amount C is transferred from register SP to the ML unit and its multiples set up therein. The product AB is transferred from counter LQ to counter RD and LQ is reset. The machine circuits are automatically switched from a multiplying to a dividing setting. Dividing takes place and the final result appears in counter LQ and is punched in the card. Calculating A/B.C. As in the previous problem, multiplication is performed before division. Factor B is entered into unit ML and the multiples built up. Factor C is entered into register MP, amount A is pre-sensed and entered to the left in register SP. The product BC appears in counter LQ, and ML and RD are reset. The circuits are shifted to dividing condition and product BC is transferred from counter LQ into unit ML and the multiples thereof built up as a divisor. Counter LQ is reset. Amount A is transferred from counter SP to counter RD. Thereafter dividing is effected and the result from LQ is punched in the factor-bearing card. Rate multiplying is effected by a master or rate card (with a special " X" control hole) which carries the multiplier and is followed by multiplicand-bearing cards. The related product is punched on each multiplicand card. Multiplying and punching cycles are eliminated for the master cards. Similarly, for rate dividing the master card bears the division common to the following dividend-bearing cards. For checking multiplying the cards are turned over 180 degrees about an axis transverse to the card columns so that the " 0 " holes lead instead of the " 9 " holes, and multiplicand and multiplier are treated as multiplier and multiplicand respectively. In checking dividing, the divisor multiples are built up in the ML unit, but the dividend is entered into counter SP instead of counter RD. The quotient punched at division is entered into counter LQ and the component of the dividend is transferred from counter SP to counter RD. Division then ensues, as before, except that complements are compared in the units CU instead of true amounts. Rounding-off mechanism is also provided to record amounts to the nearest one-half unit. In the present machine, punching overlaps reset of the counters ML and RD and also overlaps feeding of the next card. Circuits are traced in full for multiplication, for division, and for the computations AB/C and A/BC.