Patent GB-1390400-A (GB)
Title: Data stores
IPC: G06F12/08
Filed: 1972-08-24
Abstract: 1390400 Data stores SIEMENS AG 24 Aug 1972 [25 Aug 1971] 39374/72 Heading G4C An addressable data store includes a plurality of data storage locations each comprising an associative and a non-associative part, the non- associative part being arranged to store a data item and the associative part the low order portion of the address of the corresponding non-associative part, and a preselection store which comprises a number of associative storage locations each corresponding to a group of data storage locations having a common high order address part and each storing the common high order address part of their corresponding group. The non-associative part of each data storage location is driven by the output of a respective AND gate having one input provided by the "match" output of the corresponding location in the preselection store, the high order part of a desired address being applied to the preselection store one of whose locations provides a match output to enable a group of AND gates, and another input provided by the "match" output of the associative part of the corresponding storage location, the low order part of the address being applied to the associative parts of the data storage locations, one of which provides a "match" output. One of the AND gates conducts and the required location is accessed. In a second embodiment the preselection store VWS has a number of storage locations each including an associative -SZA and a non- associative SZN part. The main store (not shown), is the same as in the first embodiment. Each data storage locations is assigned a number, the numbers being consecutive for consecutive locations. The associative parts SZA of the preselection store contain the high order address parts of groups of data storage locations as before. The non-associative parts SZN contain a value 1 greater than the highest data storage number of the data storage locations associated with the corresponding associative part, which value is equal to the lowest data storage location number of the data storage locations associated with the next storage location in the preselection store. Each data storage location is driven as before by an AND gate UG one of whose inputs is provided by the associative part of the same data storage location but whose other input is provided by a respective one bit store in a limit indicator GZ. The high order part of the desired address is supplied to the preselection store VWS. The associative part of one of whose locations provides a "match" output as before. The contents of the non-associative part of the selected preselection store location are supplied via selector switch AWS2 to a decoder DK2 and the contents of the non-associative part of the preceding location of the preselection store are applied via selector switch AWS1 to decoder DK1. The decoders act to set the one bit stores in the limit indicator GZ whose corresponding data storage locations are assigned numbers smaller than the contents of the non- associative part of the "matching" preselection store location and greater than or equal to the contents of the non-associative part of the preceding preselection store location. Thus AND gates UG associated with a group of data storage locations in the main store are enabled. A gating circuit is described, Fig. 3 (not shown), for setting the 1-bit stores in response to the decoder outputs.