Patent EP-2288013-A1 (EP)
Inventor: COULIBALY PEYOFOUGOU
IPC: B23K9/10
Filed: 2010-06-25
Abstract: The multilevel inverter with quasi-resonant soft-switch, comprises a connection unit with a power source (2) of electrical energy, a first switching cell comprising first and second switches, a second switching cell comprising third and fourth switches, a voltage conversion device, a pole of passive switch associated with the first switching cell, a pole of active switch associated with the second switching cell, and a voltage divider connected in parallel with the power source and comprising two capacitive elements in series defining a first midpoint. The multilevel inverter with quasi-resonant soft-switch, comprises a connection unit with a power source (2) of electrical energy, a first switching cell comprising first and second switches, a second switching cell comprising third and fourth switches, a voltage conversion device, a pole of passive switch associated with the first switching cell, a pole of active switch associated with the second switching cell, and a voltage divider connected in parallel with the power source and comprising two capacitive elements in series defining a first midpoint. The switches are controlled by the devices delivering signals following a logic having dual thyristor. The power supply is connected to a terminal of the first switch connected in series with the fourth switch by a second midpoint, where the fourth switch is connected in series to the third switch by a third midpoint and the third switch is connected in series to a terminal of the second switch by a fourth midpoint. A balancing device comprising a flying capacitor is connected to two midpoints of the first, second and fourth midpoints. The pole of passive switching is connected to the first, second and fourth midpoints. The pole of active switching is connected to the second, third and fourth midpoints. The first and third midpoints are connected with the voltage transformation device. The passive switching pole comprises a capacitive divider comprising two capacitive elements laid in series between the second and fourth midpoints, an intermediate feed terminal taken between two capacitive elements and connected to the first midpoint through an inductive element and of which the potential varies between zero and potentials of second and fourth middle points, and two diodes connected in series between the second and fourth midpoints and in parallel with each capacitive element. The active switching pole comprises a capacitive divider formed by two capacitive elements, arranged in series between the second and fourth midpoints, an intermediate feeding terminal taken between the two capacitive elements and connected to the third midpoint through an inductive element in series with a head-to-tail assembly of a first and second switches connected to a first and second controllers, and two diodes connected in series between the second and fourth midpoints and in parallel with each capacitive element. The devices for controlling switches of switching cell comprises a controller issuing control signals corresponding to orders of booting or locking, a circuit for detecting the voltage between the electrodes of each power switch supplying voltage signals having two logical states comprising a high state corresponding to a voltage between the electrodes of zero power and a low state corresponding to a voltage substantially non-zero, and a control circuit receiving the control signals and voltage signals and delivering to each switch of switching cells. A control signal corresponding to an order of locking the control signal corresponds to a locking order when the voltage between the power electrodes is different from zero, or corresponds to authorization of booting when the control signal corresponds to a booting order. The voltage between the power electrodes is zero. The switches of the switching cells are MOSFET type and driven in dual thyristor mode. The switches of the active switching pole are insulated gate bipolar transistor type and controlled in thyristor mode. A capacitive element is connected in parallel with each switch of the switching cells and the two switches of each switching cell are controlled in a complementary manner with respect to one another and without dead time. The device for controlling switches of the first switching cell produces control signals in advance of a given duration with respect to the signals delivered by the device for controlling switches of the second switching cell. The booting sequence transmitted by the first control device of the first switch of active switching pole is ahead of given period or time in advance on the order of locking transmitted by the control device of the fourth switch. The duration of the control signal of the first switch of the active switching pole is greater than or equal to two times the ahead step and less than a half cycle of operation. The booting order transmitted by the controller of the second switch of the active switching pole is ahead of duration equal to the time in advance on the blocking order transmitted by the control device of the third switch. The duration of the control signal of the second switch of the active switching pole is greater than or equal to twice the time in advance and less than a half-period of operation. Independent claims are included for: (1) an arc welding station; and (2) a process for controlling a multilevel inverter.