Patent GB-908605-A (GB)
Title: Improvements in or relating to methods of fabricating semi-conductor devices
IPC: H01L21/00
Filed: 1960-05-04
Abstract: 908,605. Semi-conductor devices. FAIRCHILD SEMICONDUCTOR CORPORATION. May 4, 1960 [June 30, 1959], No. 15713/60. Class 37. In a double diffused junction transistor in order that the same material may be used for both emitter and base contact undesired impurities are neutralized by an excess of those of opposite conductivity type and control of the alloying procedure eliminates the regrowth layer under the contacts. The invention is described with reference to aluminium emitter and base contacts in silicon transistors. The Specification explains that although aluminium is a P- type impurity it may be used to form the emitter contact in an NPN transistor because the saturation limit of aluminium is about 10<SP>18</SP> atoms per c.c. so that the formation of an undesired P-type layer can be avoided by using phosphorus as the N-type dope which may be present in up to 10<SP>20</SP> atoms per c.c. Over-compensation of undesired impurities is not always possible and control of the alloying procedure may also be adopted to eliminate regrowth regions. This is achieved by fairly rapid heating of the silicon crystal carrying a vacuum-deposited layer to an alloying temperature between the aluminium-silicon eutectic temperature of 577 ‹ C. and the melting point of pure aluminium, preferably 600‹ C. A liquid mixture of aluminium with a small amount of silicon forms at the interface since silicon goes into solution only slowly. The alloying temperature is maintained only long enough to form sufficient alloy for a good bond and is then cooled promptly so that little regrowth into beta silicon occurs. The Specification describes in detail the construction of NPN and PNP double diffused silicon switching transistors. Example I.-Prepared wafers of N-type silicon are coated with an oxide layer by heating for 16 hours in an oxygen flow in a quartz furnace at 1200 ‹ C. This oxide layer is 1 micron thick. The base is now produced by placing gallium oxide in a boat adjacent the wafer and replacing the oxygen flow after flushing with nitrogen with a hydrogen flow. The gallium diffuses through the oxide. The emitter layer is then formed by using a master photographic plate made by photographic reduction. Where a hundred transistors are made simultaneously the master contains a 10 by 10 array of opaque dots which by usual photo-engraving techniques enable the oxide to be reduced to form a similar array of emitter areas each 15 mils. in diameter. Phosphorus is then deposited on the areas from which oxide has been removed by using a boat containing P 2 O 5  in a 200‹ C. region of a quartz tube furnace and the wafer in a region at 2000 ‹ C. A flow of 200 c.c.'s per minute of dry hydrogen is maintained through the furnace for 150 minutes. The wafers are then removed, nickel-plated on their backs and rinsed. Diffusion takes place in a quartz tube furnace at 1108 ‹ C. through which an oxygen flow is maintained. Diffusion is completed in 45 minutes. The wafer is then de-oxided in hydrofluoric acid and rinsed in methyl alcohol after which the surface is metallized by vacuum coating with pure aluminium. Unwanted metal is then removed by photo-engraving leaving a small dot forming the emitter, 10 mils. diameter, and surrounding circular band of 20 mils. inside diameter. Next contacts are alloyed by heating in an argonfilled diffusion furnace at 600‹ C. for about 5 minutes and then withdrawn to a cool portion of the furnace where they remain in the argon atmosphere until cool (about 5 minutes). The back side of the wafers are now lapped to 60 microns, cleaned and metallized, for example by nickel-plating. Wax dots are deposited to allow etching to form mesas and the wafers are diced to form separate transistors. Leads are attached by thermal compression bonding and the metallized back is soldered to a header. The devices are then washed, vacuum-baked and welded to a metal envelope. Example II.-Prepared wafers of P-type silicon have antimony diffused into the wafer surfaces by predeposition and subsequent heating. Sb 2 O 3  is used as the source and is deposited in a low-temperature zone at 605 ‹ C. in a flow of dry nitrogen. After 25 minutes the source boat is removed and the furnace temperature adjusted to 1205‹ C., the gas flow being changed to dry nitrogen. Diffusion persists 15¢ hours, gives a concentration of 2 x 10<SP>18</SP> atoms of antimony per c.c. and an oxide layer one micron thick is built upon the wafer surfaces. These oxide layers are removed from the emitter areas by a photo-engraving technique and baron deposited from BCl 3 . Attack on the silicon by the chlorine is avoided by small quantities of oxygen and hydrogen in the nitrogen flow. The hydrogen and nitrogen flows are shut off and the flow of oxygen is re-established. Three minutes later the wafers are removed. The emitter zones are then masked with black wax masked with a glass slide and the back side cleaned with hydrofluoric acid before an homogeneous nickel layer is deposited. The wafers are then placed in a quartz boat and diffused in a separate furnace at 1230‹ C. for 11 minutes with a flow of 400c.c per minute of oxygen. Next the wafers are removed from the hot zone slowly and cooled to about 200‹ C. in a uniform way over one minute. Contacts are formed as described in Example I. It is suggested that the contact metal may be aluminium containing some phosphorus also silver phosphorus alloys with about 10% aluminium evaporated underneath are suggested.