baber/WOPTO huggingface dataset:
Patent TW-337017-B (TW)
Title: Optical recording medium
Inventor: KINOSHITA MIKIO
IPC: G11B7/258
Filed: 1997-03-26
Granted: 1998-07-21
Abstract: A sort of optical recording medium, including: a substrate; the first protective layer formed on the substrate; the recording layer formed on the first protective layer; the second protective layer formed on the recording layer; and reflective light radiaion layer formed on the second protective layer; being the recording layer of phase shift mode, where, by projection of a laser light onto the recording layer, and through temperature raise and cooling, the recording layer becomes crystalline from non-crystalline, having the recording layer an interface in contact with either the first or the second protective layer, being the interface of a heat conductance lower than that of the rest of the recording layer.
Patent TW-383447-B (TW)
Title: Capacitor structure and manufacturing method for DRAM
Inventor: SHIU JEN-TSUNG
IPC: H01L21/02
Filed: 1997-04-02
Granted: 2000-03-01
Abstract: A kind of capacitor structure and manufacturing method for DRAM includes as follows : providing a semiconductor substrate with MOS transistors formed thereon and with gates and source/drain areas; covering the first insulation layer on the semiconductor substrate and stacking alternately at least a second insulation layer and a third insulation layer on the first insulation layer to form a multi-layered structure; then, forming opening in the multi-layered structure and the first insulation layer to expose the source/drain area; then, etching the multi-layered structure to define the pattern of multi-layered structure and expose the first insulation layer; etching the second insulation layer to form a plurality of trenches on the sidewall of multi-layered structure in horizontal; forming the bottom electrode layer structure on the multi-layered structure and exposed surface of source/drain area; forming the dielectric on the bottom electrode layer and the top electrode structure on the dielectric.
Patent TW-330337-B (TW)
Title: Semiconductor package with detached die pad
Inventor: HWANG JIANN-PYNG
IPC: H01L23/28
Filed: 1997-05-23
Granted: 1998-04-21
Abstract: A semiconductor package with a detached die pad includes: - An integrated circuit chip with multiple bonding pads on the surface; - A die pad, for bonding a chip onto its upper surface, comprising two separately arranged pieces and a paste film attached to the bottom surfaces of the first piece and the second piece, where each of the first piece and the second piece has a hollow portion; - Multiple leads with the near end of each lead being conductively connected to a bonding pad on the chip and the far end protruding out of the outer wall of the semiconductor package material; and - Package body which encapsulates the chip, the die pad and the near-end part of leads.
Patent TW-429178-B (TW)
Title: Method for predicting length of tail tapering tube of continuous cast blank
Inventor: LU MU-RUNG
IPC: B22D11/00
Filed: 1997-06-18
Granted: 2001-04-11
Abstract: This invention is related to a method for predicting length of tail tapering tube of continuous casting blank, comprising the sequential steps of inputting and calculating, wherein the inputting step inputs numerical data including the carbon content, width, thickness, and casting speed into a computing device, such as a computer, the computing device including a corresponding module that obtains the solidification constant and linear shrinkage of the cast blank based on the carbon content, while the length of the tapering tube, is highly related to the length of the liquid core, the rate of volume change, and a solidification factor. Because the length of the liquid core can be calculated from the casting speed in accompany with the casting thickness and the solidification constant, the volume change of the cast blank liquid core can be calculated from the linear shrinkage of the cast blank, and the solidification factor is determined by the cooling, solidifying state of the liquid core, the above relationships are stored as a computing mode in the computing device. Based on the above numerical data being inputted, the length of the tapering tube can be predicted such that cutting operation may be performed based on the length of the tapering tube thereby conserving time, energy, and materials.
Patent TW-556263-B (TW)
Title: Semiconductor device and method of manufacturing the same
Inventor: YAMAZAKI SHUNPEI
IPC: H01L21/77
Filed: 1997-06-30
Granted: 2003-10-01
Abstract: A semiconductor device having a CMOS structure, wherein, in manufacturing a CMOS circuit, an impurity element which imparts p-type conductivity to the active layer of the p-channel type semiconductor device is added before forming the gate insulating film. Then, by applying thermal oxidation treatment to the active layer, the impurity element is subjected to redistribution, and the concentration of the impurity element in the principal surface of the active layer is minimized. The precise control of threshold voltage is enabled by the impurity element that is present in a trace quantity.
Patent TW-335589-B (TW)
Title: A movable data catcher
Inventor: WANG JYH-MING
IPC: H04N1/04
Filed: 1997-07-11
Granted: 1998-07-01
Abstract: The device includes an image sensor array, a light board and a controller. The sensor array is produced in transparent flexible material. The light board is installed under the array as light source. They compose an image pick-up device. The controller controls the image pock-up and storage.
Patent TW-350979-B (TW)
Title: Method to produce a condensator in a semiconductor arrangement
Inventor: LEHMANN VOLKER
IPC: H01L21/02
Filed: 1997-07-21
Granted: 1999-01-21
Abstract: A sort of method to produce a condensator in a semiconductor arrangement, having the light shade structure (11) in statistical distribution on the substrate (S) for forming of the statistical light shade (M), forming of a layer formed by silicone and/or germanium for forming this statistical light shade (M), as long as this layer reaches a specific thickness, stopping the formation of the layer, adjustment of size of the layer by means of the selective crystal of silicone and/or germanium, forming the cylindrical structure (91) by means of this statistical light shade (M), which bottom shall be connected to the connecting element (92), at least the cylindrical structure (91) having the surface and the surface of the connection element conductive, for forming of the capacitor dielectric (14), forming an edge coating dielectric having conform to at least cover the surface of the cylindrical structure (91), for forming of the capacitor plate (5), sediment of a conductive layer with the edge coated by conform.
Patent TW-340226-B (TW)
Title: Rotary variable resistor
Inventor: HONMA TOSHIO
IPC: H01C10/24
Filed: 1997-09-03
Granted: 1998-09-11
Abstract: A sort of rotary and variable resistor, having: an insulation substrate with the surface formed in resistor, te sliding element connected to said resistor and the metal rotary unit for rotary mounting on said substrate; a terminal board at the proximity going on on said rotary unit, with terminal board mounted on the back of said substrate, with opening on te back as a top wall , having the bending plate of said terminal board facing the top wall and said bending plate in said opening.
Patent TW-385338-B (TW)
Title: Low stress electroformed nickel-tungsten alloy
Inventor: WU SHIAN-MING
IPC: C25D1/10
Filed: 1997-09-13
Granted: 2000-03-21
Abstract: With the addition of stress reducers, soluble benzene sulfonyl imides, not only the stress of the electroformed Ni-W alloy was decreased to zero, but also the Vicker hardness of the nickel-tungsten alloy electroform was increased. Besides, these hard alloy electroforms retain their hardness after thermal treatment. The studied electroforming bath of nickel-tungsten alloy contains at least nickel sulfamate, tungstate salt, organic buffer, and stress reducer.
Patent TW-364097-B (TW)
Title: SIMD correction circuit for arithmetic/shift operations
Inventor: DINKJIAN ROBERT MICHAEL
IPC: G06F9/34
Filed: 1997-09-23
Granted: 1999-07-11
Abstract: A microprocessor circuit is disclosed for instructions on an arithmetic/shift function performing standard operations (e.g., ALU instructions or shift instructions) on instructions in a first cycle of operation, and a correction circuit responsive to the arithmetic/shift function for modifying the standard results provided by the arithmetic/shift function to results required by a SIMD instruction being executed. The arithmetic/shift function is an instruction provided by either an arithmetic logic unit (ALU) or by a shift instruction. The correction circuit passes data, unchanged for logical instructions but provides condition codes according to the SIMD instruction.
Patent TW-370753-B (TW)
Title: Input buffer circuit
Inventor: HEDBERG MATS
IPC: H03K19/0175
Filed: 1998-02-11
Granted: 1999-09-21
Abstract: An input buffer circuit for receiving digital data signals from a transmission line, comprises a monitor section for monitoring data signals at the input of the buffer circuit. A power control section receives a control signal from the monitor section depending on where the data are detected at the input of the input buffer circuit. The power control section can switch the input buffer into a low power standby mode, if no data are detected by the monitor section, and otherwise into an operating mode.
Patent TW-396636-B (TW)
Title: Page-mode floating-gate memory device a multi-bit storage unit
Inventor: HUNG JIUN-SHIUNG
IPC: H01L29/78
Filed: 1998-04-29
Granted: 2000-07-01
Abstract: Page-mode floating-gate memory device for one multi-bit storage unit is composed of a floating-gate memory array, a word-line voltage source, several bit latches and a logic circuit. The floating-gate memory array contains several word lines and bit lines used to connect with one of the memory units. The bit-line voltage source supplies voltage to bit lines and a buffer page, which is composed of several bit latches. The bit latch contains several circuits and changes from first state to second state according to the corresponding bit-line signal. The logic circuit controls the bit-line voltage source and bit latch to produce a series of word line voltage and subsequently detects the state of bit latch to determine the threshold voltage of the memory unit.
Patent TW-411660-B (TW)
Title: Method for estimating induced electromotive force and speed of induction motor, method for correcting misalignment of shafter thereof, and induction motor controller
Inventor: OGURO RYUICHI
IPC: H02P21/00
Filed: 1998-06-10
Granted: 2000-11-11
Abstract: A three-phase-to-two-phase converter (10) detects two-phase currents of three-phase stator currents, converts the stator currents into a <gamma>-<delta> coordinate system to derive a <gamma>-axis current and a <delta>-axis current. The <gamma>-axis current, the <delta>-axis current, and voltage command values outputted respectively from a <gamma>-axis current controller (2) and a <delta>-axis current controller (3) are entered to a stator current and induced electromotive force estimator (9), which determines estimated values of the stator currents and estimated values of an induced electromotive force in the <gamma>-< delta> coordinate system.
Patent TW-580408-B (TW)
Title: Supernucleophilic 4-substituted-pyridine catalysts, and processes useful for preparing same
Inventor: CURTIS JOE W
IPC: B01J35/02
Filed: 1998-08-01
Granted: 2004-03-21
Abstract: Described are preferred processes for producing extrusion-granulated supernucleophilic 4-amino-substituted pyridine catalysts, and granular products obtainable therefrom. Also described are preferred activation-substitution-deactivation processes for producing 4-aminopyridine compounds, which involve the use of acrylic acid or acrylamide or analogs thereof for activation, and substitution steps conducted under mild basic conditions in an excess of the amine reagent for 4-substitution. Such processes provide improved reacted masses which are more readily processed to recover the products in pure, heat-stable form. Further, described are processes for preparing 4-substituted-pyridines via pyridine betaines.
Patent TW-467927-B (TW)
Title: Process for preparing polyamides
Inventor: BLANCHARD ELWOOD NEAL
IPC: C08G69/28
Filed: 1998-09-04
Granted: 2001-12-11
Abstract: Disclosed is a process for the preparation of polyamide polymers via prepolymer formation in a reactor system comprising a reactor, flasher and separator, crystallization of the prepolymer under controlled temperature conditions and the subsequent conversion of these crystallized prepolymers to high molecular weight polymer. A process for the preparation of polyamide prepolymers, possessing less than 6% of extractable impurities, comprising the steps of: (a) prepolymerizing a polyamidation precursor selected from the group consisting of a polyamidation monomer, a mixture of polyamidation monomers, and a mixture of polyamidation monomers and comonomers in a polyamidation reactor, in the presence of a flowing vapor phase for between 10-600 minutes at pressures between 10 bar (145 psia, 130.3 psig, 1000 kPa) and the system vapor pressure so that boiling occurs resulting in operation in a two phase (vapor phase/liquid phase) region to form a polyamide prepolymer; (b) flashing excess dissolved liquid water and reaction product volatiles into the vapor phase by passing the liquid prepolymer solution/vapor stream through a flasher stage that follows the reactor to let down the pressure to approximately 1 atmosphere (101 Kpa) and to strip off the extractable impurities; and (c) passing the flasher effluent through a very low holdup time separator at approximately 1 atm. (101 kPa) that follows the flasher.
Patent TW-539855-B (TW)
Title: System and method for inspection of a sheet of glass
Inventor: WEISS ADAM
IPC: G01B11/00
Filed: 1998-11-03
Granted: 2003-07-01
Abstract: An inspection system for a sheet of glass. The system comprises a first laser and a second laser, each of which provide a sheet of light, a cylindrical lens system, and a first light detection system and a second light detection system. The first laser is located at the focal point of the lens system. The second laser is located at a distance from the lens system that is greater than that of the first laser, and off of the axis of the lens system. The first light detection system receives light from the first laser and the second light detection system receives light from the second laser. The inspection system is adapted to position a sheet of glass between the lens system and the detection systems. A method is also described.
Patent TW-428231-B (TW)
Title: Manufacturing method of self-aligned silicide
Inventor: CHEN SHU-REN
IPC: H01L21/8242
Filed: 1999-01-16
Granted: 2001-04-01
Abstract: A manufacturing method of self-aligned silicide is applied to a semiconductor substrate having an embedded structure. First, a substrate having memory region and logic circuit region is provided. A gate oxide layer and a polysilicon layer are sequentially formed on the substrate, and a gate, a spacer and a source/drain are formed in the memory region and logic circuit region, respectively. Next, a self-aligned silicide is formed on the gate and source/drain of the logic circuit region. Then, a dielectric layer is formed on the substrate, and the top of the gate of the memory region and the gate of the logic circuit region covered with the silicide is exposed. Subsequently, a metal layer is formed on the substrate, and a thermal processing step is executed to form self-aligned silicide on the gates of the memory region and the logic circuit region, respectively.
Patent TW-451097-B (TW)
Title: Liquid crystal device and electronic device
Inventor: MAEDA TSUYOSHI
IPC: G02F1/1337
Filed: 1999-01-28
Granted: 2001-08-21
Abstract: In a dark environment, while a back light (15) is operated, white light emerging from the surface of a light guide plate (15b) passes through a polarizer (12) and a phase difference plate (14), enters a liquid crystal cell, passes through an opening of a reflecting electrode (7), enters a liquid crystal layer (3), passes through a color filter (5), exits the liquid crystal cell, passes through a phase difference plate (13) and polarizer in order, and goes outside. In a bright environment, the light from the polarizer (11) passes through the liquid crystal layer (3), is reflected from the reflecting electrode (7), passes again through the polarizer (11), and goes outside.
Patent TW-584677-B (TW)
Title: Method for producing silicon single crystal
Inventor: IINO EIICHI
IPC: C30B15/00
Filed: 1999-03-29
Granted: 2004-04-21
Abstract: There is disclosed a method for producing a silicon single crystal by Czochralski method which comprises bringing a seed crystal into contact with a melt, performing a necking operation and growing a single crystal ingot characterized in that concentration of interstitial oxygen incorporated during the necking operation is 1 ppma (JEIDA) or more. There can be provided a method of producing a silicon single crystal wherein the rate of success in making a crystal dislocation free is improved in a seeding method wherein a necking operation is performed.
Patent TW-419557-B (TW)
Title: Structure and assembling method of sound-absorption wall panel
Inventor: WANG CHAO-SHUN
IPC: E04B1/86
Filed: 1999-06-22
Granted: 2001-01-21
Abstract: This invention is of a kind of sound-absorption wall panel structure and its assembling method. The wall panel includes rectangular framework with several convex bases pre-set on its inner bottom, cone-shaped or tube-shaped absorption tube, and slab with several neighboring hole-cones on it. Put several absorption tubes counter to the convex bases in parallel then mix them together with high-frequency vibrations before covering and mixing the slabs to combine as one sound-absorption wall panel. With these easy manufacturing processes, good result of noise reducing is ensured.
Patent TW-477121-B (TW)
Title: Method and means for invertibly mapping binary sequences into rate 2/3 (1,k) run-length-limited coded sequences with maximum transition density constraints
Inventor: HASSNER MARTIN AURELIANO
IPC: H03M5/14
Filed: 1999-07-22
Granted: 2002-02-21
Abstract: A method and means for reducing high-duty-cycle unconstrained binary signal sequences in storage and communications processes and systems by invertibly mapping such sequences into a (1,k) rate 2/3 RLL codestream constrained to a duty cycle substantially approximating one-third. That is, binary sequences ordinarily mapping into high-duty-cycle RLL-code sequences are either inhibited from repeating indefinitely or excluded.
Patent TW-418288-B (TW)
Title: Circuit-arrangement to regulate the rotation speed of a ventilator
Inventor: BUSCH PETER
IPC: H02P7/288
Filed: 1999-07-27
Granted: 2001-01-11
Abstract: In order to regulate the rotation speed of a ventilator (L) without influence by the oscillation- and interference-effect, a circuit-arrangement which can evaluate the commutation-impulses on the power-supply lines of said ventilator (L) is provided, said circuit-arrangement has a second triggerable one-shot circuit (MF2) between a rotation-speed evaluation-circuit (DAS) and a first triggerable one-shot circuit (MF1) having a first time-constant (ZK1), said second one-shot circuit (MF2) has a pre-given fixed adjusted second time-constant, and said first triggerable one-shot circuit (MF1) is triggerable conditionally. Alternatively the triggerability of the first one-shot circuit (MF1) can't be carried out, if the second time-constant (ZK2) of the second triggerable one-shot circuit (MF2) is adjusted parallel to the first time-constant (ZK1) of the first triggerable one-shot circuit (MF1) on the rated rotation speed of said ventilator (L).
Patent TW-508506-B (TW)
Title: Computer system capable of playing DVD movie and control method of its TV analog signal output
Inventor: SHING FENG-YAN
IPC: H04N5/775
Filed: 1999-10-21
Granted: 2002-11-01
Abstract: There is provided a control method of TV analog signal output, which makes a computer system having a DVD player output the VGA image signals only in playing DVD movie, thereby ensuring the protection of Macrovision and the like, and further enhancing the integrity in computer system application. In addition, there is also disclosed a computer system capable of playing DVD movie by applying a control method of TV analog signal output.
Patent TW-414860-B (TW)
Title: Large inclined angle compensation mechanism with a precise reproducibility
Inventor: WU CHI-YING
IPC: G01C9/00
Filed: 1999-10-25
Granted: 2000-12-11
Abstract: A large inclined angle compensation mechanism with a precise reproducibility, including an upper ring set, a lower ring set, and a heavy plumb, is characterized in that: the inner ring of the upper ring set and the outer ring of the lower ring set are fixed and combined; using the upper ring set for compensation of a large angle, the lower ring set for compensation of a small angle, such that the interference factor caused by the working difficulty at each pivot between ring sets can be effectively eliminated, thereby enhancing the exact reproducibility of the compensation mechanism.
Patent TW-460765-B (TW)
Title: Low power voltage reference circuit
Inventor: AHN SUNG-TAE
IPC: G05F3/24
Filed: 1999-11-22
Granted: 2001-10-21
Abstract: A bandgap voltage reference circuit according to the present invention generates a constant reference voltage and is not affected by variations in a power supply voltage and in a manufacturing process. In the bandgap voltage reference circuit, a constant voltage supply unit supplies a constant voltage, a first current mirror mirrors a first current flowing through the constant voltage supply unit to generate a second current, and a second current mirror controlled by the constant voltage from the constant voltage supply unit mirrors the second current to generate a third current and outputs the third current to an output node. A voltage reference unit is connected to the output node to provide a reference voltage to the output node. The voltage reference unit includes at least one PMOS transistor and at least one NMOS transistor which are connected to each other in series or in parallel. Ion implantation processes for determining threshold voltages of the PMOS transistor and the NMOS transistor are simultaneously performed.
Patent TW-498658-B (TW)
Title: A contention-free signaling scheme for shared control signals
Inventor: DEMONE PAUL W
IPC: G06F13/40
Filed: 2000-04-11
Granted: 2002-08-11
Abstract: A contention-free transition-based signaling scheme in which a plurality of controlling units and one or more controlled units are connected to a shared bus line, which is also connected to a bus holder cell. Each of the controlling units includes an output circuit that asserts a control signal on the bus line by synchronously asserting a logic level transition on the bus line, and each of the controlled units includes an input circuit that detects assertion of the control signal by detecting that a logic level transition has occurred on the bus line. The synchronous nature of the scheme avoids the possibility of contention because all of the controlling units that intend to assert a logic level transition in a given clock cycle sampled the current logic level at the same time (within the same prior clock cycle). They therefore all agree on the current logic level and will all assert the same opposite logic level when asserting their logic level transition. In addition, detection by the controlled unit input circuits of logic level transitions can be made synchronous as well.