baber/WOPTO huggingface dataset:
Patent TW-I234599-B (TW)
Title: Method for producing a durable acoustical panel
Inventor: PUTT DEAN L
IPC: E04B1/86
Filed: 2001-04-04
Granted: 2005-06-21
Abstract: A process and apparatus for creating an acoustically absorbent porous panel comprises the steps of dispensing cement and fibers with a dry mixer to create a dry mix and aqueous mixing water, surfactant and air with an aqueous mixer to create a foam. The process and apparatus provides for combining and mixing the foam and dry mix in a combining mixer to form a foamed cementitious material comprising on a wet basis about 53% to about 68% by weight cement, about 17% to about 48% by weight water, about 0.05% to about 5% by weight fibers, and about 0.01% to about 10% by weight surfactant. The foamed cementitious material is then dried or cured in a drying chamber. The dried foamed cementitious material may then textured with an embossing roller. The cementitious material provides good acoustical performance with enhanced durability and moisture resistance.
Patent TW-523980-B (TW)
Title: Amplifier
Inventor: WATANABE SHINICHI
IPC: H03F3/185
Filed: 2001-04-20
Granted: 2003-03-11
Abstract: To provide an amplifier excellent in temperature characteristic and providing an output signal having small crossover distortion in a wide power source voltage range, voltage values provided to positive phase input terminals of a second and a third amplifier 2 and 3 are made to correspond to voltages between sources and drains of a second P-channel MOS transistor Tr3 and a second N-channel MOS transistor Tr4, a first P-channel MOS transistor Tr1 and a first N-channel MOS transistor Tr2 constituting a power buffer 4, are driven by an output signal of a first operational amplifier 1 via the second and the third amplifiers 2 and 3 and therefore, there can be provided idling currents independently from power source voltage from low power source voltage, there can be provided an output signal having small crossover distortion in a wide power source voltage range and temperature dependency thereof can be improved.
Patent TW-519650-B (TW)
Title: Row decoder for a nonvolatile memory device
Inventor: CHUNG HWI-TAEK
IPC: G11C16/08
Filed: 2001-05-11
Granted: 2003-02-01
Abstract: The invention provides decoder circuits for selecting a word line in a semiconductor memory device which comprises a plurality of memory cell sectors including a plurality of word lines and bit lines and a plurality of memory cells which each is electrically erasable and programmable. The decoder circuits comprise a pull-up and pull-down transistors connected to global word lines which are connected to the word lines via connecting means, the decoder circuits turning on pull-down transistors before a high voltage according to an operation mode is supplied to one selected from the global word lines and pre-charging the gates of the pull-up transistors to the high voltage. The invention enables the decoder circuits to supply the word line drive voltage to the global word lines connected to memory cells by using the self-boosting method to thereby reduce the boosting load.
Patent TW-546390-B (TW)
Title: A method of producing a ceramic body by coalescence and the ceramic body produced
Inventor: OLSSON KENT
IPC: A61L27/42
Filed: 2001-07-25
Granted: 2003-08-11
Abstract: A method of producing a ceramic body by coalescence, wherein the method comprises the steps of (a) filling a pre-compacting mould with polymer material in the form of powder, pellets, grains and the like, (b) pre-compacting the material at least once and (c) compressing the material in a compression mould by at least one stroke, where a striking unit emits enough kinetic energy to form the body when striking the material inserted in the compression mould, causing coalescence of the material. A method of producing a ceramic body by coalescence, wherein the method comprises compressing material in the form of a solid ceramic body in a compression mould by at least one stroke, where a striking unit emits enough energy to cause coalescence of the material in the body.
Patent TW-567602-B (TW)
Title: Multi-chip module
Inventor: TSUDA HIROYUKI
IPC: H01L25/18
Filed: 2001-08-21
Granted: 2003-12-21
Abstract: The purpose of the present invention is to provide a multi-chip module smaller than the conventional chips, in which a stacked chip can be mounted on the mother chip. In the invention, a digital cell 5 is arranged at the center of the mother chip 1 and a stacked chip 10 is mounted thereon. Analog cells 4 are arranged around the mother chip, and a group of I/O cells 22 are arranged between the analog cell 4 and the digital cell 5. Conducting wires 23 for connecting the stacked chip 10 to the mother chip 1, and the wiring 125 of digital cell are connected to the group of I/O cells 22 without crossing the analog cell 4. Thus, the number of I/O cells provided in an I/O cell region 6 can be reduced to reduce the I/O cell region 6 such that the size of mother chip is reduced.
Patent TW-517251-B (TW)
Title: Resistor and method of manufacturing resistor
Inventor: HASHIMOTO MASATO
IPC: H01C1/142
Filed: 2001-08-30
Granted: 2003-01-11
Abstract: A resistor has an increased reliability of a electrical connection between an upper electrode and an edge electrode, has an increased adhesivity between a first thin film and a second thin film, an thus has a high reliability. The resistor includes the first upper electrode formed on a main surface of a substrate, an adhesive layer on the first upper electrode, and the edge electrode electrically coupled with the first upper electrode. The edge electrode includes the first thin film positioned at an edge of the substrate, the second thin film being made of a thin alloy film including copper and electrically coupled with the first thin film, a first plate film being nickel-plated and covering the second thin film, and a second plate film covering the first plate film.
Patent TW-533429-B (TW)
Title: Semiconductor memory device
Inventor: YAGISHITA YOSHIMASA
IPC: G11C29/00
Filed: 2001-11-13
Granted: 2003-05-21
Abstract: A semiconductor memory device that reduces the probability of the penalties of wirings arising. An address input circuit receives an address signal input. A drive circuit drives a memory array in compliance with the address signal. A signal line connects the address input circuit and the drive circuit. A redundant circuit is located near the drive circuit and substitutes other lines including a redundant line for a defective line in the memory array. A defective line information store circuit stores information showing the defective line. A supply circuit supplies information stored in the defective line information store circuit to the redundant circuit via the signal line. This structure enables to transmit an address signal and information regarding a defective line by a common signal line and to reduce the number of wirings and the probability of the penalties of wirings arising.
Patent TW-526509-B (TW)
Title: Circuit breaker
Inventor: KATSUBE SHUNICHI
IPC: H05K5/02
Filed: 2001-11-29
Granted: 2003-04-01
Abstract: Provided is a circuit breaker having good heat resistance, arc resistance and feature of over travel between contacts, and being adapted to recover or reuse, comprising a switching means (7, 28, 29, 31, 31) for opening and closing the retaining holder (6, 26) which are rotatably holding the movable contact (5, 25), and a base (2, 21) for rotatably holding the retaining holder (2, 26) and for holding the contact of fixed side (10, 23). The movable contact acts when over current is detected, and the arc generated between contacts is extinguished by the extinguishing apparatus (9, 34). The base (2, 21) is made of an insulative molded article which uses crystal thermal plastic resin as a main resin, and is subjected to an electronic beam irradiating.
Patent TW-545003-B (TW)
Title: Antenna diversity communications device
Inventor: KISHIMOTO MICHINORI
IPC: H04B7/08
Filed: 2001-12-27
Granted: 2003-08-01
Abstract: An antenna diversity communications device comprising: a switching means for alternatively selecting one antenna out of a plurality of antennas; a receiving information measuring means for measuring the receiving condition of the selected antenna; a memory means for storing frequency difference information between the current channel and the next channel; and a switching control means for controlling the switching means is provided, wherein the antenna is switched based on the frequency correlation between the current channel and the next channel. It also stores the signal information measured by the receiving information measuring means and selects the antenna based on the stored signal information.
Patent TW-I263302-B (TW)
Title: Method of preventing the surface of the copper metal layer from oxidizing
Inventor: LIU CHI-WEN
IPC: H01L21/768
Filed: 2001-12-28
Granted: 2006-10-01
Abstract: A method of preventing the surface of the copper metal layer from oxidizing is provided. First, a semiconductor substrate with dual damascene structure is provided. Then, the electro-plating is used to fully form a copper metal layer, and said copper metal layer is filled in said dual damascene structure. Then, on the surface of said copper metal layer is formed a film with hydrophobic material like benzotriazole to prevent the upper surface of the copper metal layer form oxidizing.
Patent TW-I226488-B (TW)
Title: Liquid crystal device
Inventor: TOWLER MICHAEL JOHN
IPC: G02F1/13
Filed: 2002-01-17
Granted: 2005-01-11
Abstract: A pi-cell liquid crystal device comprises a nematic liquid crystal layer (17) disposed between alignment layers (14, 15) which provide a pretilt such that, at a zero applied field, the energy of the H-state is less than the energy of the V-state, which is less than the energy of the T-state. A drive arrangement (18) switches the pi-cell by applying a first electric field, at which the energy of the V-state is less than the energy of each of the H-state and the T-state, or a second smaller electric field, at which the energy of the H-state is less than the energy of each of the V-state and the T-state. The T-state may thus be avoided while maintaining high switching speeds.
Patent TW-552633-B (TW)
Title: Adhesive tape and process for removing resist
Inventor: TOYODA EIJI
IPC: C09J7/35
Filed: 2002-01-30
Granted: 2003-09-11
Abstract: An adhesive tape for the removal of a resist includes a curing adhesive layer having an initial tensile modulus of not smaller than 10 MPa at 100 DEG C after cured provided on a supporting base material, and/or an adhesive layer provided on a supporting base material having a flexural stiffness of not smaller than 1x10<-4> (Nxm) per unit width.
Patent TW-593112-B (TW)
Title: Apparatus, method or system for controlling mobile body
Inventor: KANEKO DAIGO
IPC: H02P29/00
Filed: 2002-03-26
Granted: 2004-06-21
Abstract: In order to control the position of a mobile body without using a position detector, a magnetic pole position of a rotor of a synchronous motor is estimated based on electrical quantities in relation to electric power supplied to the synchronous motor and then the mobile body position is estimated based on the estimated magnetic pole position.
Patent TW-554373-B (TW)
Title: Noise sound reduction structure and method
Inventor: JUANG GUO-SHIAN
IPC: H01J29/06
Filed: 2002-03-26
Granted: 2003-09-21
Abstract: The present invention is a noise sound reduction structure which is applied in the inner shield of cathode ray tube (CRT), the structure at least comprises: a frame; an inner shield; a rib disposed in one of the frame and the inner shield; and at least a fixing element to fix the frame and the inner shield. By contacting the rib with the one of the frame and the inner shield, the contact area of the frame and the inner shield can be reduced, thereby the noise sound generated by the frame and the inner shield during vibration can be inhibited.
Patent TW-I222123-B (TW)
Title: Method for removing polysilane from a semiconductor without stripping
Inventor: LU ZHIJIAN
IPC: H01L21/027
Filed: 2002-05-07
Granted: 2004-10-11
Abstract: A method for removing polysilane from a semiconductor substrate without stripping during manufacture of a semiconductor device, comprising: (a) coating a polysilane on a semiconductor substrate and coating a resist on the polysilane; (b) patterning the resist with exposure and development; (c) transferring the pattern from the resist to the polysilane using an etch process selective to the resist; (d) stripping the resist; (e) transferring the pattern from the polysilane to a hardmask using an etch selective to the hardmask; (f) subjecting the polysilane to thermal or plasma/thermal oxidation to convert the polysilane to silica; and (g) etching the substrate and stripping off the hard mask.
Patent TW-552618-B (TW)
Title: Method for manufacturing semiconductor device
Inventor: TOMIOKA YUGO
IPC: H01L27/08
Filed: 2002-05-16
Granted: 2003-09-11
Abstract: A method for manufacturing a semiconductor device enables the formation of a well optimized for a fine MOS transistor and a well formed deep with a relatively low concentration for a high voltage MOS transistor without increasing the number of manufacturing steps. The method for manufacturing a semiconductor device includes the steps of: forming a first ion implantation expendable film and an etching mask film on a first conductive type semiconductor substrate; patterning the etching mask film into a shape of an active and field region; introducing dopant into the substrate; forming a trench groove on the substrate; forming an insulation film in the trench groove; forming a first well; flattening the insulation film; removing the etching mask film; removing the expendable film; forming a second ion implantation expendable film on the substrate; forming a mask pattern; and forming a second well by introducing dopant into the substrate.
Patent TW-557643-B (TW)
Title: Inductively coupled plasma processor
Inventor: MATSUSHITA ATSUSHI
IPC: H01L21/205
Filed: 2002-05-16
Granted: 2003-10-11
Abstract: To provide an inductively coupled plasma processor equipped with a Faraday shield which enables the improvement of ignition quality of plasma and the suppression of capacitively coupled type plasma generation in parallel. The inductively coupled plasma processor comprises: a chamber for plasma processing; a coil electrode which is provided at the periphery of the chamber for plasma processing; and the Faraday shield which is arranged between the coil electrode and chamber for plasma processing. Its feature is: the Faraday shield has a plurality of longitudinally long cuts which are arranged in the circumferential direction of the chamber for plasma processing, and a dielectric is inserted between a chamber surface for plasma processing which is exposed through the cuts and the coil electrode.
Patent TW-558917-B (TW)
Title: Work feeder
Inventor: KOJIMA TOMOYUKI
IPC: B65G47/68
Filed: 2002-07-24
Granted: 2003-10-21
Abstract: The subject of the present invention is to provide a work feeding apparatus that is capable of equally dividing works sent from a single-row feeder and sending them to a double-row feeder. The work feeder 1 is provided with the followings: single-row feeder 2 for feeding the works in one row; the double-row feeder 3 for feeding the works in two rows; and a work dividing device 4 provided between the single-row feeder 2 and the double-row feeder 3. The work-dividing device 4 is composed of a single-row track 6 provided on the side of the single-row feeder 2 and a double-row track 7 provided on the side of the double-row feeder 3. Compressed air exhaust nozzles 8a and 8b are provided in a connecting part 10 between single-row track 6 and the double-row track 7 corresponding to the respective tracks 7a and 7b of the double-row track 7. The compressed air exhaust nozzles 8a and 8b exhaust the compressed air fed from a compressed air adjusting mechanism 13 and the compressed air adjusting mechanism 13 is controlled by a control part 11.
Patent TW-546130-B (TW)
Title: Arteriosclerosis evaluating apparatus
Inventor: NARIMATSU KIYOYUKI
IPC: A61B5/022
Filed: 2002-07-29
Granted: 2003-08-11
Abstract: An apparatus (10) for evaluating arteriosclerosis of a living subject, including a blood-pressure measuring device (35, 86) which measures at least one blood-pressure value of the subject, a pulse-wave detecting device (54) which detects a pulse wave from a portion of the subject, a relationship determining device (88) for determining a relationship between pulse-wave magnitude and blood pressure, based on at least one magnitude of the pulse wave detected by the pulse-wave detecting device and the at least one blood-pressure value measured by the blood-pressure measuring device, an incident-wave-peak determining device (90) for determining a magnitude of a peak point of an incident-wave component which is contained in the pulse wave detected by the pulse-wave detecting device, a reflected-wave-occurrence-time determining device (92) for determining a time of occurrence of a peak point of a reflected-wave component which is contained in the pulse wave, a pressure-difference determining device (94) for determining, according to the relationship between pulse-wave magnitude and blood pressure, a pressure difference corresponding to a magnitude difference between a magnitude of the pulse wave at the time of occurrence of the peak point of the heeled-wave component, and the magnitude of the peak point of the incident-wave component, and a display device (76) which displays the pressure difference determined by the pressure-difference determining device.
Patent TW-595273-B (TW)
Title: Memory module
Inventor: KO KI-HYUN
IPC: H05K1/02
Filed: 2002-08-02
Granted: 2004-06-21
Abstract: A memory module preferably includes a printed circuit board (PCB) panel having multiple memory chip pad groups arranged on both sides thereof. Each memory chip pad group preferably includes multiple pads that correspond to lead lines of multiple memory chips arranged on the PCB panel. Connectors are preferably formed along an edge of the PCB panel to electrically connect the memory chip pad groups to an external device. Multiple damping chip pad groups preferably include built-in damping chips. One or more of the damping chip pad groups are preferably arranged adjacent to a lateral edge of one or more of the memory chips. The damping chip pad groups can electrically connect the connectors to the memory chip pad groups and dampen the signal noises.
Patent TW-I233608-B (TW)
Title: Disc recording medium, disc driving apparatus, reproduction method, and disc manufacturing method
Inventor: KOBAYASHI SHOEI
IPC: G11B7/24035
Filed: 2002-10-08
Granted: 2005-06-01
Abstract: A recording and reproducing area and a reproduction-only area are formed by wobbling a groove formed in a spiral fashion to form a track to be tracked on a disk. The recording and reproducing area has address information recorded by wobbling of the groove and information recorded and reproduced by phase change marks on the track formed by the groove where the address information is recorded. The reproduction-only area has prerecorded information recorded by wobbling of the groove.
Patent TW-578374-B (TW)
Title: A sweep system for wide band VCO
Inventor: KUO CHIN-JUNG
IPC: H03J7/32
Filed: 2002-12-20
Granted: 2004-03-01
Abstract: A sweep system for wide band VCO. The sweep system comprises a RF receiver, a PLL circuit, an open loop reference frequency source, a frequency counter and a microprocessor. The RF receiver receives a RF signal, detects electric parameters of the RF signal and transforms the electric parameters to digital signals for output. The open loop reference frequency source controlled by a saw-toothed sweep voltage generates a reference frequency. The PLL circuit comprises a local oscillator providing a sweep frequency to the RF receiver. By the PLL circuit, the local oscillator locks the reference frequency quickly. The microprocessor controls the frequency counter to count the sweep frequency and the ranges of the saw-toothed sweep voltage, records the digital signal output from the RF receiver and the sweep frequency of the frequency counter simultaneously, and processes them to generate linear sweep data.
Patent TW-I285964-B (TW)
Title: White light emitting device with thin layer fluorescent glue
Inventor: WANG BILY
IPC: H01L23/28
Filed: 2003-01-28
Granted: 2007-08-21
Abstract: Thin layer of fluorescent glue covers the top and peripheral of a light emitting diode that emits short wavelength light to enhance the light efficiency of colorless light that is transformed by the fluorescent layer. Protection transparent glue is then applied over the fluorescent layer to protect the product.
Patent TW-I238115-B (TW)
Title: Method and apparatus for expanding, adhering, shaping and making honeycomb board insert
Inventor: LIANG SHAO-HUI
IPC: B31D3/02
Filed: 2003-03-14
Granted: 2005-08-21
Abstract: This invention relates to a method and apparatus for expanding, adhering, shaping and making honeycomb board insert, including the followings that are provided in order, a pressing and placement device, an expanding device, and an upper and a lower adhering device. A continuous honeycomb board insert is gradually pressed and released downstream in a section by section manner. Plural pin rods provided on an endless conveyor belt are inserted upwards into a release sections of the expanded board insert so as to expand the board insert to have honeycombs of various dimensions. The board insert is then continuously transported downstream. A layer of face sheet is then applied to each of the upper and lower faces of the advancing honeycomb board insert by rollers. A medium layer may also be further adhered. The board insert is then subject to baking, drying, shaping and then trimmed to form a honeycomb board of a predetermined length.
Patent TW-I275362-B (TW)
Title: Studded footwear
Inventor: KELLY PAUL ANDREW
IPC: A43B13/22
Filed: 2003-04-09
Granted: 2007-03-11
Abstract: An outsole for an article of studded footwear in which said outsole (1) includes receptacles (2) for specifically-oriented studs (5). The outsole (1) also includes traction elements (7) formed integrally with the outsole (1). The studs (5) and traction elements (7) being so constructed and arranged to interact in use of the footwear. The traction elements (7) are designed to complement the spike configuration of the stud (5).
Patent TW-589486-B (TW)
Title: Semiconductor device and display panel module incorporating thereof
Inventor: SUZUKI TAKEHIRO
IPC: H01L23/52
Filed: 2003-05-09
Granted: 2004-06-01
Abstract: The semiconductor device contains multiple semiconductor elements mounted on one carrier tape by COF. Here, the semiconductor elements are substantially rectangular and laid out so that the longitudinal directions thereof are aligned with, and lined up along, the longitudinal direction of the substantially rectangular carrier tape. The wires on the carrier tape interconnect adjacent semiconductor elements. This enables the size and cost of a display panel module to which the semiconductor device is mounted to be reduced, while avoiding characteristics abnormalities and a loss in signal transfer speed caused by added wiring distance of input signal wiring.