Patent GB-1148721-A (GB)
Title: The analysis of rhythmic biological processes
Inventor: NATCHEV CHUDOMIR KIRILOV
IPC: A61B5/04
Filed: 1966-04-04
Abstract: 1,148,721. Analysing pulse trains, electro-medical measurements. BULGARSKA AKADEMIA NA NAUKITE, April 4, 1966 [April 2, 1965], No.14979/66. Headings G1N and G1U. In a system for detecting deviations from a standard pulse repetition rate, the pulses being derived at the occurrance of biological events, the width of each pulse is standardized and the standardized pulses are passed to a circuit which operates to establish a timing pulse of predetermined width, commencing at a pre-selected finite time after the end of the first standardized pulse and to provide an output indicating the position of the start of the next standardized pulse relative to the time interval occupied by the timing pulse. The biological process may provide pulse sequences showing several different types of irregularity. The pulses may be too widely or too closely spaced throughout a group containing a minimum number of pulses. Alternatively just an isolated pulse may be out of its proper position. Very wide spacing of pulses indicates failure of the process under investigation or of the test equipment. A pulse of wrong polarity may indicate an abnormality in the process. The system is designed to analyse, count and record the occurrence of these different types of irregularity. Pulses, derived in response to heart beats, respiration or peristaltic movements in a body 1 by e. g. an electro-cardiograph 2, are passed to a standardizing circuit 3 which by means of a symmetrical amplifier, appropriate logic circuitry and pulse forming Schmitt triggers, converts all input pulses to standard width pulses of given polarity Fig. 2 (not shown) which are passed via line X to the interval defining circuits 5. Output pulses are also provided on line X o  indicating input pulses of inverse polarity, and these are counted at 4. In the interval definition circuit Fig. 3 an arrangement of NEGATOR circuits 15, 18, and NOR circuits 16, 17, 19, 20 logically interconnects the input pulses on the line X to output lines Z 1 , Z 2  and D and to the series of flip-flop timing circuits T 0 , T 1 , T 2  . T 0  times a period corresponding to the standardized input pulse width, T 1  a pre-selected time following this and T 2  times the period during which the next standardized pulse should occur if the process is proceding normally. The operation of the circuit depends on how many of the timing circuits have timed out in response to a preceding pulse when a further pulse arrives on the X line, and the coded arrangement of pulses appearing on the lines X, Z 1 , Z 2  and recorded at 6, indicates the relative position of this pulse relative to its normal position. An output is obtained on line D when a pulse becomes overdue and remains until the pulse arrives. An alternative arrangement of logical elements is described Fig. 8 (not shown) which indicates the degree of earliness or lateness of the following pulse. The coding is such that the appearance of a pulse on line Z 1  indicates that an irregularity of some sort has occurred, and the frequency of occurrence of all such irregularities is determined by the circuit 9 Fig.6 (not shown) to provide an output on line Y 1  when this exceeds a given amount, to actuate an alarm. The output D controls a counter in a failure monitoring circuit 10 Fig. 7 (not shown) which counts to a predetermined value and then actuates an alarm, unless reset by the appearance of a late pulse on the line Z 1 , to indicate that an excessive time has occurred between consecutive pulses. The coded output on lines X, Z 1 , Z 2 , is passed to an analysing circuit 10 which incorporates a logic circuit 7 which distinguishes between individual early and late pulses, and sequences of early and late pulses indicating too fast or too slow progress of the process. Count signals in accordance with the number of times such conditions are detected are passed via appropriate corresponding lines m, n, 1, q, to counter circuits 8. The logic circuit 7 incorporates appropriate sequential circuits and memories to store the minimum numbers required to distinguish isolated irregular pulses from irregular sequences.