baber/WOPTO huggingface dataset:
Patent JP-S59193755-A (JP)
Title: Gate breaking method
Inventor: NODA KAZUO
IPC: B22D31/00
Filed: 1983-04-20
Abstract: PURPOSE:To perform exact gate breaking by teaching preliminarily the hammering position and direction where a gate breaking tool hammers risers into a storage device by using a pattern for molding a casting mold for the casting product and operating the tool according to the taught data. CONSTITUTION:A pattern 1 installed with a prototype 2 to be made into a casting mold and risers 3a-d is set on a molding board 4, and the pattern 1 and the plate 4 are fixed onto the base plate 5 of a teaching device. A hammering position arm 8 is attached to the end of a teaching arm 7, and the arm is three- dimensionally moved to the X-axis, Y-axis and Z-axis and is rotated within the plane parallel with the X-Y plane around the two axes by operating manually a handle 9 to teach the hammering position and direction where the gate breaking tool hammers the risers 3a-d. The gate breaking tool is operated in conformity with the teaching by the arm 7 and the arm 8 to accomplish gate breaking.
Patent JP-H10268827-A (JP)
Title: Cordless afterimage interpolating type scroll display system and display unit therefor
Inventor: TOKIMOTO TOYOTARO
IPC: G09G3/20
Filed: 1997-03-21
Abstract: PROBLEM TO BE SOLVED: To enhance the practicality, flexibility and versatility in the case of concretely constructing a system matching with various purposes by lining up/arranging lots of pole type display units at a proper interval. SOLUTION: A function for recognizing/acquiring one column part of image data allocated to own unit among demodulating signals based on a unit ID is realized by a counter 9, a unit ID setting device 10, a comparator circuit 11 and a gate 12. A data signal and a clock signal outputted from a demodulator circuit 6 are inputted to a shift register 1, the image data of every one column part are distributed in order to 32 sets of display units and held in the shift register 1, respectively. Each of the display units/detects a synchronizing sign signal transmitted from a display controller 60, the data in the shift register 1 are latched to a latch circuit 2 with this timing in all the display units and a driver 3 controls to drive lamps L1-L16 according to the latched data.
Patent JP-2000269266-A (JP)
Title: Manufacture of semiconductor package
Inventor: ONDA MAMORU
IPC: H01L21/60
Filed: 1999-03-15
Abstract: PROBLEM TO BE SOLVED: To obtain a semiconductor package on which the inner lead of a TAB chip and the electrode of a semiconductor chip can be connected excellently by forming a stress alleviating layer of specific height, and the height of package can be made uniform. SOLUTION: The original plate 13 of a stress alleviating layer is placed on a die 10, and the punched stress alleviating layer 12, which is punched out by a puncher 11, is pressed to the wiring layer 6 of a TAB tape 8 and it is glued. The wiring layer 6 is heated up by the heat of a heating stage 9, the stress alleviating layer 12 becomes soft and allowed to flow, and it is adhered through the wiring layer 6. As the working end, which constantly maintains the working range of the stress alleviating layer, is set, the height of the adhered stress alleviating layer 12 is always in a constant state, the junction between the electrode of the semiconductor chip to be mounted on the stress alleviating layer 12 can be excellent, and the height of package can also be made uniform.
Patent JP-H05273232-A (JP)
Title: Monitoring method for deterioration of sensitivity of acceleration sensor
IPC: G01P21/00
Filed: 1992-03-26
Abstract: PURPOSE:To obtain a monitoring method of the sensitivity deterioration of an acceleration sensor which reduces costs for calibration and confirmation of functions and also reduces the amount of radiation dose of a worker. CONSTITUTION:For the monitoring method, an acceleration sensor 1 set at a measuring surface 2 where the vibration is to be measured, means 3 for applying shocks to the measuring surface 2, a recording means 7 for recording/preserving the output signal or frequency response data obtained when the shock signal transmitted through the measuring surface 2 is detected by the acceleration sensor 1, a frequency analyzing means 8 for analyzing the frequency of the preserved data, and a comparing/evaluating means 9 for comparing/evaluating the frequency spectrum or power and a transmission function of the preserved data. The frequency spectrum or power and the transmission function before and after driving of the acceleration sensor among the data preserved when the shock signal generated from the shock applying means 3 before and after driving of the acceleration sensor is detected by the acceleration sensor are compared with preset threshold values, etc., allowing the deterioration of the sensitivity of the acceleration sensor. Accordingly, the deterioration of the sensitivity of the acceleration sensor is evaluated.
Patent JP-H08241583-A (JP)
Title: Multitrack recorder and system using the same
Inventor: NAKATANI TAKAO
IPC: G11B19/02
Filed: 1995-03-02
Abstract: PURPOSE: To provide a multitrack recorder which is capable of mutually connecting its plural bus lines through external terminals. CONSTITUTION: When analog input signals S1 of each channel are inputted into an input circuit section 2, their characteristics are adjusted in each internal circuit to be selectively supplied to bus lines G1, G2 or buslines G3, G4. Analog signals, S2 to S4, to be inputted to other channels are also redundantly fed to bus lines, G1 to G4, through input circuit sections, 3 to 5, and subjected to mixing by summing amplifiers(SUM), 21 to 24, to be inputted into a recorder section 26. The inputted mixing signals, M1 to M4, are converted to digital signals in a specified recording format by an A/D converter 31 so as to be recorded in specified tracks, TR1 to TR4, in the recording medium 33. Since the bus lines, G1 to G4, are connected to the bus terminals 25 which allow the connection to external devices, they are shared by other MTRs.
Patent JP-S63254441-A (JP)
Inventor: RANDOORU HAAMAN HERANDO
IPC: G03C1/498
Filed: 1988-03-23
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S56165420-A (JP)
Title: Logical circuit device
Inventor: KATOU SHIYUUICHI
IPC: H03K19/086
Filed: 1980-05-23
Abstract: PURPOSE:To improve the depedance of the power supply voltage having a low output level, by adding a compensating circuit consisting of a diode and a resistance and thus clamping the collector potential. CONSTITUTION:The 1st compensating circuit consists of the 1st diode D1 and a resistance R6; and the 2nd compensating circuit is constituted with the 2nd diode D2 and a resistance R7. Both the 1st and 2nd compensating circuits clamp the output level by making use of the nonlinearity of the current/voltage characteristics of the diodes D1 and D2, and at the same time give a temperature compensation to the output level by the resistance R6 or R7.
Patent JP-H03269482-A (JP)
Title: Display device
Inventor: UEDA TOSHIO
IPC: G09G3/28
Filed: 1990-03-19
Abstract: PURPOSE:To reduce the power consumption at the time of a high display rate without decreasing the easiness of seeing a display by varying the alternation rate of a high and a low contrast image plane at the time of the high display rate with the display rate signal of a plasma display panel (PDP) based upon an external gradation control signal. CONSTITUTION:A display rate recognition part 4 recognizes the display rate of the PDP according to the external gradation control signal 2 and outputs the display rate signal 3 to a display control part 6. Then the control part 6 generates a display control signal 5 for varying the alternation rate of the high contrast image plane and low contrast image plane to less than one vertical period at the time of the high display rate and outputs the signal to a PDP driving part 7. Consequently, the ratio of the high contrast image plane decreases at the time of the high display rate and the number of light pulses is decreased to reduce the power consumption to half. An intermediate and a low gradation brightness image plane, on the other hand, are controlled so that the number of light pulses does not decrease and the power consumption at the time of the high display rate is reduced to half without decreasing the easiness of seeing the display.
Patent JP-H09103383-A (JP)
Title: Bathing device for nursing
Inventor: SUGIHARA KIMIMASA
IPC: A47K3/022
Filed: 1996-02-28
Abstract: PROBLEM TO BE SOLVED: To easily move a person to be nursed between a bed and a bathtub without a vertical movement, make the person to be nursed bathe, and also, perform a bathing work by easily moving the person to be nursed to another place, and in addition, prevent the face of the person to be nursed from sinking in hot water. SOLUTION: A base 11 is arranged next to a bed 30, and the height of the base 11 is adjusted so that the upper surface of a bathtub 12A under a housed state and the upper surface of the bed 30 may become approx. the same height. Then, a person to be nursed C is placed on a second sheet 17, and in addition, a first sheet 15 is bridged between the bed 30 and the bathtub 12A, and the end of the first sheet 15 on the bed 30 side is inserted under the second sheet 17. Then, the second sheet 17 is moved onto the top of the bathtub 12A by making it slide on the first sheet 15. After that, the first sheet 15 is removed, and the bathtub 12A is formed by pulling up a bathtub supporting frame 121A, and hot water is fed, and the person to be nursed C is bathed. A moving means 114 is provided on the base 11. Together with this, (or separately), a bathtub 12A holding surface of the base 11 may be constituted to be tiltable.
Patent JP-S61228661-A (JP)
Title: Semiconductor device and manufacture thereof
Inventor: KIMURA TAKEMI
IPC: H01L21/822
Filed: 1985-04-02
Abstract: PURPOSE:To make it possible to perform miniaturization and to reduce the fluctuation of a resistance value, by coating the surface of high-resistance polycrystalline silicon, which is used as a resistor element, by a silicon nitride film, which is deposited by a chemical vapor deposition method. CONSTITUTION:An insulating film 2 is deposited on the surface of a semiconductor substrate 1. Polycrystalline silicon (high resistance part) 3 is deposited on the film 2. Impurity ions are implanted in order to control the resistance value of the polycrystalline silicon 3. A silicon nitride film 5 is deposited to a thickness of about 200Angstrom  by a CVD method. A silicon oxide film 6 is deposited by the CVD method. Thereafter, PSG and the like are deposited as an interlayer insulating film 7. A contact hole is provided, and metal electrode 8 is formed by aluminum and the like. A surface protecting film is further formed, and the element is completed. In this way, even if the PSG is used as the interlayer insulating film 7, diffusion of phosphorous in the PSG into the polycrystalline silicon by the following heat treatment can be blocked, and the high resistance polycrystalline silicon can be miniaturized.
Patent JP-S52152447-A (JP)
Title: Organic photoconductive material compositions
Inventor: YAMAGUCHI YASUHIKO
IPC: C08L25/02
Filed: 1976-06-15
Abstract: PURPOSE: An organic photoconductive materail composition which satisfied both improved electrophotographic characteristics and improved flexibility, comprising a polymer containing 9-(p-vinylphenyl) anthracene and a specific polyarylene compound. 
     COPYRIGHT: (C)1977,JPO&Japio
Patent JP-H10270754-A (JP)
Title: Semiconductor light-emitting device and light-emitting lamp
Inventor: YAGI KATSUMI
IPC: H01S5/00
Filed: 1997-03-24
Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor light-emitting device having improved optical output. SOLUTION: There are formed on a sapphire substrate 1, in the following order, an AlGaN buffer layer 21, an n-type GaN clad layer 2 which also serves as an n-side contact layer, an n-type InGaN active layer 3, a p-type AlGaN clad layer 4 and a p-type GaN contact layer 5. A portion of layers covering from the p-type GaN contact layer 5 to a predetermined depth of the n-type GaN clad layer 2 is removed to permit the n-type GaN clad layer 2 to be exposed. An n-side electrode 6 is formed on the exposed n-type GaN clad layer 2, while a p-side electrode 7 is formed on the p-type GaN contact layer 5. Then, a metal reflection film 8 is formed on the reverse side of the sapphire substrate 1.
Patent JP-S63234711-A (JP)
Title: Signal processor
Inventor: TACHIBANA YASUO
IPC: H03H17/00
Filed: 1987-03-24
Abstract: PURPOSE:To obtain a peaking filter to be able to execute the self-regression type operation equally and process without depending on the number of taps and the number of peak frequencies by providing a signal processing part between A/D and D/A converters and being composed of a buffer memory and a complex arithmetic means. CONSTITUTION:An input x(t) is A/D-converted 1, a signal processing 2 is received and thereafter, the input is D/A-converted 15 and outputted. At the processing part 2, a buffer memory 3 up dates the memory with a real number and a variable at period TS. For a memory 4, the present value of the memory is a real part and an imaginary part is ''. For a memory 5, a past value is a real part by (2N+1) TS only and the imaginary part is '0'. Memories 6-8 store a complex constant, the complex number operation is executed by multipliers 9-11 and subtracters 12 and 13 and a buffer memory 14 stores up to the past value by TS only every period TS. By this constitution, a finite impulse response type filter is operated as a self-regression type. For this reason, a peaking filter to be able to process for a constant operation time without depending on the number of taps and the peak frequency can be obtained.
Patent JP-S61268480-A (JP)
Title: Layout sheet for printing using removable material
Inventor: FUKUHARA KOJI
IPC: B41M5/00
Filed: 1985-04-01
Abstract: PURPOSE:To print copies in a plurality of kinds at a time on a plurality of sheets of paper, by drawing lines lengthwise and breadthwise on paper sized on the JIS standard, and by applying removable adhesive rubber thereon to form several similar measures. CONSTITUTION:Lines 2 for forming measures 4 of printing paper 5 are drawn on paper 1 in conformity with the JIS standard, and adhesive rubber 3 or the like, which is easy to remove, is so applied thereon that the lines 2 can be seen clearly through the coating. This is designed aimed to facilitate an operation along the lines when the printing paper 5 is put on the papr 1 manually. If sixteen sheets of the printing paper 5 are not on a layout sheet, copies of sixteen kinds can be printed on each sheet at a time according to this method. In the case of printing New Year's cards, for instance, sixteen copies can be printed at a time by using one layout sheet.
Patent JP-H0795886-A (JP)
Title: Human renin
Inventor: MURAKAMI KAZUO
IPC: C12N9/64
Filed: 1994-04-07
Abstract: PURPOSE:To obtain a human renin or its precursor capable of being induced from cDNA coding the human renin or its precursor, contained in a kidney in a fine amount, playing an important role for the control of blood pressure, etc., and capable of being produced in a large amount by a genetic engineering means. CONSTITUTION:A kidney piece extracted from the kidney of a renal vascular hypertension patient is homogenized in a buffer solution, and RNA is isolated from the homogenized product by a guanidine thiocyanate method. The RNA is passed through an oligo(dT)cellulose column to obtain mRNA. While the mRNA is used as a template, cDNA is synthesized, and the library of the cDNA is furthermore produced by a conventional method. The cDNA library is screened, while the renin cDNA is used as a probe. A positive clone is selected and its DNA is recovered. The DNA is treated with a restriction enzyme, and subsequently bound with a vector. A host cell is transformed with the vector, and the produced transformant is cultured to obtain the human renin having a specific amino acid sequence or a human renin precursor protein.
Patent JP-S6323416-A (JP)
Title: Pulse timing error detection circuit
Inventor: KOGA IZUMI
IPC: G01R31/28
Filed: 1986-03-27
Abstract: PURPOSE:To detect a minute timing error by extracting a fundamental wave component and a prescribed harmonic component of an output signal of a differential amplifier receiving a pulse signal of the same frequency so as to detect the amplitude of each extracted signal. CONSTITUTION:The fundamental wave f0 component D is extracted from a differential output C of a differential amplifier 1 receiving two signals A, B with different duty ratio by the 1st band pass filter 2 and the 2nd harmonic E to the fundamental wave f0 is extracted by the 2nd band pass filter 3. The amplitude of the 2nd harmonic E is changed proportional to the difference of the duty ratio of the signals A, B. Thus, a changeover switch 6 is thrown to the position of an output of the 2nd tuning amplifier 11 to adjust the duty ratio of the pulse signal B to minimize the detection output thereby making the delay time of the leading and trailing between both the signals A and B. On the other hand, since the amplitude of the fundamental wave component D is changed proportional to the delay time between both the signals A and B, the changeover switch 6 is thrown to the position of the output of the 1st tuning amplifier 4 to adjust the delay in the pulse signal B thereby correcting the timing error of both the signals A, B.
Patent JP-H07281636-A (JP)
Title: Driving device used for liquid crystal display device, semiconductor integrated circuit for driving column electrode and semiconductor integrated circuit for driving row electrode
Inventor: MOGI HIROYUKI
IPC: G09G3/20
Filed: 1994-04-07
Abstract: PURPOSE:To miniaturize the device as a whole and to reduce power consumption by providing a semiconductor integrated circuit for driving column electrode with a memory part having a control circuit outputting data and an arithmetic circuit part arithmetically processing a voltage applied to a liquid crystal output circuit part. CONSTITUTION:A column driver 101 comprises a memory part 10, a signal line 11 for outputting column data to a liquid crystal display panel 20, an arithmetic circuit part 12 inputting selected data from a row data generating circuit 41 and performing a prescribed calculation, a latch circuit 13 inputting the output of the arithmetic circuit 12 through a signal line 15 and latching it and a liquid crystal output circuit part 14 inputting the latch data through a signal line 16 and outputting a voltage complied with the latch data to an output line 17. Data are simultaneously outputted from the memory part 10 every time when one of selected data is given from the row data generating circuit 41. The arithmetic circuit part 12 also performs calculation at the same time. Consequently, the clock frequency is made low and the power consumption is reduced.
Patent JP-S59194816-A (JP)
Title: Preparation of gas-barrier sheet
Inventor: INOUE RIYOUSUKE
IPC: B29C45/00
Filed: 1983-04-20
Abstract: PURPOSE:To prepare the titled sheet free from outer defects or delamination by applying anchor coat adhesives to a specific composite film or sheet and laminating a molten sheet on said item. CONSTITUTION:Anchor coat adhesives are applied to nonstretched PP film or sheet and dried, then, polyvinylidene chloride emulsion is applied to the film or sheet and dried to obtain composite film or sheet 1. Then, this sheet 1 is coated with anchor coat adhesives 3 through a gravure roll 4 and the solvent is volatiled in a drying oven 6 to obtain composite sheet 7 coated with anchor coat adhesives. Molten sheet 9 extruded from an extruding die 8 is calendered and laminated by a rubber roll 11 and chill roll 10 on this sheet 7. In this manner, it is possible to prepare in low cost a thick sheet excellent in transparency and adhesive strength, suitable for deep drawing and gas barrier properties.
Patent JP-S55165800-A (JP)
Title: Production of immunologically active enzyme tagging conjugate
Inventor: BUINFURIITO ARUBAATO
IPC: G01N33/58
Filed: 1980-05-27
Abstract: A process for the preparation of immunologically active tagged conjugates by covalent linking of an enzyme with an antigen or haptene, which process comprises placing a solution of a mixture of immunologically active and inactive conjugates in contact with an insoluble complex former able to form a non-immunological complex reversibly with the untagged antigen or haptene component of the conjugate, separating the insoluble complex former, and eluting with a desorbent for untagged antigen or haptene.
Patent JP-H09254304-A (JP)
Title: Laminated steel plate excellent in press moldability
Inventor: FUJII YASUSHI
IPC: C25D5/26
Filed: 1996-03-26
Abstract: PROBLEM TO BE SOLVED: To obtain an excellent corrosion resistance and press moldability by a method wherein the coverage of a Fe-Ni-O-based film and its oxygen content are set to be specified values under the condition that the Fe-Ni-O-based film is formed on a zinc-based plated layer, which is formed on the surface of one side of one steel plate not contacting with a polymer resin layer pinched between two or an upper and a lower steel plates. SOLUTION: This laminated steel plate is produced by pinching polymer resin between two or a front and a rear steel plates, between which at least one steel plate or a zinc-based plated steel plate with a zinc plated layer and a predeterminedly constituted Fe-Ni-O-based film formed in the order named is used as one surfacing steel plate. The coverage of the Fe-Ni-O-based film formed on the zinc-based plated layer is set in total within the range from 10mg/m<2> or more to 1,500mg/m<2> or less in metal equivalent. At the same time, the oxygen content in the Fe-Ni-O-based film is set to be from 0.5-30wt.%.  Since the Fe-Ni-O-based film is rigid and has high melting point, the sliding resistance between the surface of the zinc plated layer and a press mold at press molding lowers and the laminated steel plate easily slides on the press mold, resulting in improving the press moldability of the laminated steel plate.
Patent JP-H04305869-A (JP)
Title: Dropout correcting circuit
Inventor: YAMAMOTO TAKESHI
IPC: G11B20/06
Filed: 1991-04-02
Abstract: PURPOSE:To correct a dropout with a small impulsive noise irrespective of the kind of a reproducing signal and the length of the dropout. CONSTITUTION:The through rate peak value of a demodulation output signal detected at an inclination detector 8 is held at a peak holding circuit 11, two positive and negative currents are generated from voltage/current conversion circuits 12 and 13 in accordance with its holding voltage, the potential of the above-mentioned demodulation output signal and center potential Vref are compared at a comparator 14 and the positive and negative currents outputted from the voltage/current conversion circuits 12 and 13 are selected by a switch 15 with a value corresponding to a maximum slew rate and in accordance with the outputs of the comparator 14.
Patent JP-S60221555-A (JP)
Title: Extremely high-tension steel having superior resistance to melt fracture due to al
Inventor: TSUTSUMI HIRONAGA
IPC: B23K35/30
Filed: 1984-04-06
Abstract: PURPOSE:To obtain a steel having superior resistance to melt fracture due to molten Al by adding specified amounts of Ni, Cr, Mo and Ti to a low carbon steel or further adding Co. CONSTITUTION:An alloy steel contg., by weight, <0.05% C, 0.1-1.0% Al, 10- 20% Ni, 1-7% Cr, 3-7% Mo and 0.5-3% Ti or further contg. 3-30% Co is used as an extremely high tension steel having superior resistance to melt fracture due to molten Al and suitable for use as the material of dies for die-casting Al or a welding rod for repairing the dies. The steel causes hardly melt fracture due to molten Al and has superior thermal fatigue resistance.