Patent GB-1380409-A (GB)
Title: Scr inverter circuit
IPC: H02M7/515
Filed: 1971-11-26
Abstract: 1380409 Inverting MITSUBISHI DENKI KK 26 Nov 1971 55078/71 Heading H2F [Also in Division H3] Commutation of at least one of two semiconductor controlled rectifiers in an inverter circuit is effected by a capacitor connected via a transformer winding across the controlled rectifier to apply reverse bias thereto, the alternating output current of the inverter being applied to another winding of the transformer to control the commutation current. In a basic commutation circuit (Fig. 4) a commutating capacitor 12 is charged, by means (not shown), in the polarity indicated and connected across the thyristor through a winding 16P of a saturable core transformer. Bias current from source 20 normally holds the core saturated but the discharge brings it out of saturation and thus limits the commutating current to a steady given value. The voltage across the capacitor decays and builds up in the opposite direction, the small excess current being passed through diode 14. The thyristor is thus switched off. During the commutation the magnetic flux in the core rises towards an opposite value and then returns to its original saturating state and the voltage across the thyristor remains throughout in the reverse polarity. Accordingly the charge in the capacitor is more efficiently used. The bias current may be provided by the thyristor load current in which case the transformer may be of auto-transformer type and connected as shown in Fig. 6C. Fig. 7 shows one application to an inverter in which 10a and 10b are the main thyristors and 22a and 22b are the commutating thyristors. Firing 22b when 10a is conducting switches off 10a in the manner previously described. The saturated state of the transformer 16 being positive or negative depending upon whether thyristor 10a or 10b is conducting. Fig. 8 shows an alternative inverter in which when thyristor 10a is conducting and 10b is fired the output potential at 0 tends to an intermediate value so that capacitors 12b and 12a discharge and charge respectively through thyristor 10b producing across a transformer 42 a voltage which at its upper terminal switches off thyristor 10a, transformer 16 operating to limit the commutating current in the manner previously described. 40a and 40b are inductors which saturate when the associated thyristor is conducting. Fig. 9 is a similar circuit in which separate windings of transformer 16 are connected in series with the respective commutating capacitors and in which the commutating transformer 42 and saturating inductor 40 are combined in the form of transformers 40<SP>1</SP>a and 40<SP>1</SP>b. Fig. 10 shows a bridge arrangement of thyristors while in Fig. 11 a separate voltage source Ec is connected to add to the commutating voltage across the commutating capacitors so that the circuit may be used with a low and variable supply voltage Ed. In Fig. 12 (not shown) a plurality of circuits similar to Fig. 11 are connected to form a threephase inverter and the separate voltage supply Ec is arranged to vary inversely with the main voltage supply so as not to overload the thyristors. The transformer 16 may be in the form of a conductor wound around the output lead or may be formed by connected windings respectively around the capacitor lead and the output lead (Figs. 19a and 19b, not shown).