Patent GB-1447084-A (GB)
Title: Channel selector including a tuning element
IPC: H03J5/02
Filed: 1973-11-16
Abstract: 1447084 Code conversions MATSUSHITA ELECTRIC INDUSTRIAL CO Ltd 16 Nov 1973 53294/73 Heading G4H [Also in Division H3] A channel selector comprises a tuning circuit 21 including a variable reactance element, a non-volatile memory 12 for storing first coded signals from 2 representing channel numbers and second coded signals from 6 representing channel selecting voltages or currents corresponding to the first coded signals, a channel selector 1 comprising a read out means 16, 22- 25 for reading out from the memory 12 a desired second coded signal by use of the first coded signals and means 20 for converting the read out second coded signal into the corresponding voltage or current for application to the variable reactance element to control the tuning frequency. To store the channel selecting voltage in a magnetic bubble memory 12 keys 1 corresponding to the desired channel are selected. A timingpulse generator 11 controls AND gates 7, 8 and 9 so as to read into a shift register 10 coded information from encoders 2 and 4 and reversible counter 6 corresponding to the channel selection number, whether this channel is to be read out later or not, as determined by the channel jump controller 3, and the channel selecting voltage to be applied to a variable capacitance diode as determined by the reversible counter 6. The memory control circuit 30 is operated to drive the write circuit 18, the magnetic bubble generator 13 and the magnetic field generator 15 for transferring magnetic bubbles and to memorize the above information signals from the shift register 10. The magnetic bubble memory 12 holds the memory regardless of the disconnection and reconnection of the power source. When selecting a channel using the signals memorized in memory 12 operation of the keys 1 writes the channel into the shift register 10 as above and the output of the register 10 is fed to a comparator 24. An output from the keyboard 1 is fed to gate signal generator 22 which opens an AND gate 25 so that the channel number signal memorized in the magnetic bubble memory 12 is read out by a magnetic bubble sensor 16 and is applied to the other input of the comparator 24. When the two channel numbers fed to the comparator from 10 and 12 do not correspond no output is obtained from the comparator 24 and the next channel number in the magnetic bubble memory 12 is successively read out. This continues until the channel selected corresponds to the channel signal output memorized by then memory 12. Then an output from the comparator 24 opens AND gate 29 and passes the digital pulse train signal of the channel selecting voltage memorized to a dynamic-static converter 23 and to a D-A converter 20 which applies the selected tuning voltage to the tuner 21. Channels may be successively selected by operating key 101. The channel jump controller 3 then functions to allow certain channels to be skipped, i.e. channels where no broadcast is made, the tuning then being stopped on the next channel corresponding to a jump control signal being received from the controller 3 and written in the register 10. A magnetic bubble erase circuit 19 and eraser 17 for erasing the memory 12 and provided. The memory 12 may be a memory which holds the memory contents regardless of the disconnection and reconnection of the power source such as magnetic disc or magnetic tape, ROM (Read Only Memory) and core memories. Specification 1,208,849 is referred to.