baber/WOPTO huggingface dataset:
Patent TW-512348-B (TW)
Title: EEPROM memory chip with multiple use pinouts
Inventor: CERNEA RAUL-ADRIAN
IPC: G11C16/30
Filed: 2001-06-07
Granted: 2002-12-01
Abstract: The present invention reduces the demand on the number of pins of an EEPROM memory chip or flash EEPROM chip by multiplexing a subset of the pins between the high voltage generator circuit of the chip and the chip select circuit. When the chip receives an enable signal, the subset of pins are connected to the chip's charge pump circuit allowing it to be connected to an external set of capacitors through these pins. When the enable signal is de-asserted, the subset of pins are connected to the chip select circuit. When the chip is part of an array of chips, this allows tins subset of pins to be used to assign a chip address for determining the chips position in the array. When a number of chips are placed in an array, one (or more) of the chips supplies the other chips in the array with the high voltage and current needed for erasing and programming. To be able to do this, this chip is enabled and connected through the subset of pins to the external capacitors. The other chips are not enabled and use the subset of pins to determine their array address. As the enabled chip (or chips) can not have its address specified in this way, it is placed in a predetermined location within the array and this predetermined address is supplied to the chip select circuit in response to the enable signal.
Patent TW-503547-B (TW)
Title: Method of forming high bump to increase the bump reliability of in flip-chip device
Inventor: CHEN YAN-MING
IPC: H01L23/488
Filed: 2001-06-29
Granted: 2002-09-21
Abstract: The present invention proposes a method of forming high bump process by using a translucent region with different levels to irradiate the photoresist with different light intensities, obtain two layers of different patterns after being developed. Thus, the thickness of photoresist can be increased to obtain a higher bump height, and also avoids the linewidth limitation of size of the under bump metallurgy (UBM). It comprises the following steps: firstly, form the metal bonding pad, passivation layer and under bump metal sequentially on the chip, then form photoresist on the under bump metal, use said mask to define a T-shaped opening which is wider on the top at the bump position, then remove the photoresist, do reflow finally, remove the exposed under bump metal layer to form the solder ball.
Patent TW-508286-B (TW)
Title: Auxiliary polishing device
Inventor: LEE CHI-HUNG
IPC: B24B37/005
Filed: 2001-07-27
Granted: 2002-11-01
Abstract: The present invention relates to an auxiliary polishing device, suitable for proceed local polishing to a wafer, which has been polished by a chemical mechanical polishing machine, with a first polishing parameter obtained from an monitoring device proceeding monitor on the wafer. The auxiliary polishing device comprises a polishing platform for placing the wafer; a polishing slurry feeding device for providing the polishing slurry needed for polishing; a polishing parameter control structure for receiving the first polishing parameter, and outputting a first control signal regarding a regional location where auxiliary polishing is required on the wafer based on the first polishing parameter; and, a polishing head, electrically connected to the polishing parameter control structure, which is used to polish the regional location of the wafer placed on the polishing platform associated with the polishing slurry in response to the control of the first control signal.
Patent TW-I227304-B (TW)
Title: Centrifugal compressor
Inventor: MASUTANI JOO
IPC: F04D29/46
Filed: 2001-07-31
Granted: 2005-02-01
Abstract: The centrifugal compressor of the present invention is equipped with a plurality of vane groups (A, B) comprised of a plurality of vanes (16A, 16B) disposed in the peripheral direction of an impeller (12) so as to be concentric about the center of an axis of rotation (15) of the impeller, and the individual vanes (16A) belonging to vane group (A) nearest to the impeller are able to rotate. Since diffuser efficiency decreases if the intake flow volume of the impeller changes and the flow of gas is unable to easily continue from the vanes (16A) to vanes (16B), the vanes (16A) are rotated to change the inclination of the direction of a wing center line on their front edges so as to coincide with the direction of the flow of gas discharged from the impeller. As a result, diffuser efficiency is maintained at a high level even if the intake flow volume of the impeller is changed.
Patent TW-563049-B (TW)
Title: Method and apparatus for a mixed-media messaging system
Inventor: ARCHIBALD EDWARD
IPC: G10L25/93
Filed: 2001-10-05
Granted: 2003-11-21
Abstract: A method for creating a mixed media message on a client node coupled to a host node over a network such as the Internet is disclosed. The method comprises choosing a soundscape; recording a message; and mixing the soundscape and the message in a predetermined manner. A host node is disclosed which is configured to provide a client node with the means for performing the method is disclosed. A client node is disclosed which is configured to receive means for performing the method is disclosed.
Patent TW-538319-B (TW)
Title: Antireflective composition, method for forming antireflective coating layer, and method for manufacturing electronic device
Inventor: GALLAGHER MICHAEL K
IPC: G02B1/11
Filed: 2001-10-09
Granted: 2003-06-21
Abstract: Disclosed are new antireflective compositions including organo polysilica materials including one or more chromophores. Also disclosed are methods of forming relief images using these antireflective compositions.
Patent TW-525298-B (TW)
Title: Manufacturing method of stacked-gate flash memory array
Inventor: WU CHING-YUAN
IPC: H01L27/115
Filed: 2001-11-05
Granted: 2003-03-21
Abstract: A manufacturing method of stacked-gate flash memory array is disclosed, wherein a shallow trench isolation (STI) structure that comprises plural parallel arranged STI lines and plural active region lines among the STI lines is formed on a semiconductor substrate. Each active region line has a main floating gate put on a thin tunneling dielectric layer and each STI line has two separated extending floating gates put on the sides of a planarized field oxide layer. The main floating gate and two extending floating gates are connected to be a self-aligned integrated floating gate layer to greatly increase the coupling ratio of the stacked gate flash memory cell. The plural word lines and STI lines are vertically arranged by each other on the STI structure, wherein the control gates are composed by a complex conduction layer that consists of a metal or metal silicide, a barrier metal and a highly doped polycrystalline or amorphous silicon and the top, bottom and two sides are enveloped by a dielectric layer. The word line parasitic capacitor is greatly reduced. The common source/drain of the stacked flash memory cell uses self-aligned source/drain landing island to form contacts and proceed a self-aligned shallow/heavy doped ion implantation. The contacts problem of shallow source/drain area and punch-through of short channel length are then prevented. The self-aligned source/drain landing island is composed by a silicide heavy doped polycrystalline or amorphous silicon. The inter-connection resistance among stacked flash memory cells is also greatly reduced. The self-aligned source/drain lines are composed by a silicide heavy doped polycrystalline or amorphous silicon and located on the flat plane that is formed by a common source/drain area and a field oxide layer to be the contact and self-aligned shallow/heavy doped source/drain area. The contact issue of shallow source/drain is thus solved. Besides, the self-aligned common source/drain resistance, parasitic capacitor between the source/drain and substrate and junction leakage are greatly reduced.
Patent TW-510033-B (TW)
Title: Under bump metallurgy structure and its manufacturing method
Inventor: WANG JUNG-YU
IPC: H01L23/28
Filed: 2001-11-06
Granted: 2002-11-11
Abstract: The present invention provides an under bump metallurgy structure and its manufacturing method. The under bump metallurgy structure of the present invention is formed by using a first mask to perform a pattern definition on a wetting layer, and then using a second mask to perform a pattern definition on an adhesion layer below the wetting layer, wherein the pattern dimension of the first mask is smaller and the pattern dimension of the second mask must be larger than the cap layer dimension of the under bump metallurgy. Therefore, when etching the adhesion layer, the etchant does not come into touch with cap layer, and thus cannot damage the cap layer, thereby no gap is generated between the adhesion layer and passivation layer below the cap layer. Accordingly, it is able to achieve the object of protecting the cap layer and increasing the manufacturing reliability without using additional material to protect the cap layer.
Patent TW-I224216-B (TW)
Title: Side light type optical fiber
Inventor: IRIE SHINICHI
IPC: B29C48/06
Filed: 2001-12-05
Granted: 2004-11-21
Abstract: A side light type optical fiber, includes a core and a cladding disposed around the core, the cladding including a transparent first layer contacting the core, and a light diffusive second layer formed around the first layer, the layers being integrally molded.
Patent TW-508679-B (TW)
Title: Field effect transistor structure of horizontal channel gate and its manufacturing method
Inventor: WU CHUNG-CHENG
IPC: H01L21/28
Filed: 2001-12-07
Granted: 2002-11-01
Abstract: The present invention provides a method for manufacturing field effect transistor structure of horizontal channel gate, which comprises the steps of: forming an insulating layer on a semiconductor substrate; forming a source region on the insulating layer, wherein the source region protrudes from the surface of the insulating layer; forming a drain region on the insulating region, wherein the drain region is opposed to the source region and the drain region protrudes from the surface of the insulating layer; forming a gate wire between the source region and the drain region for connecting the source region to the drain region, wherein the gate wire protrudes from the surface of the insulating layer by a height not larger than those of the source region and drain region; performing an isotropic etching on the contact surface between the gate wire and the surface of the insulating layer, thereby forming a gap section; performing an oxidization step on the surface of the gate wire; performing an etching step on the surface of the gate wire to smooth the surface of the gate wire and make the outlook of the gate wire surface close to a cylinder, thereby uniformly forming a dielectric layer surrounding the surface of the gate wire surface and uniformly forming a conductive layer surrounding the dielectric layer.
Patent TW-I289970-B (TW)
Title: Smoothing circuit
Inventor: MIYAGI HIROSHI
IPC: H03H11/48
Filed: 2001-12-21
Granted: 2007-11-11
Abstract: It is object to provide a smoothing circuit capable of realizing miniaturization and integration of a circuit, and making its attack time and release time different with each other easily. A smoothing circuit includes a capacitor 10, a voltage comparator 12, a charging circuit 14, and a discharging circuit 16. The voltage comparator 12 compares terminal voltage and input voltage of the capacitor 10, and makes operations of the charging circuit 14 or the discharging circuit 16 effective according to a result of the comparison. The charging circuit 12 charges the capacitor 10 by supplying charging current intermittently. The discharging circuit 16 discharges the capacitor 10 by discharging current intermittently.
Patent TW-591710-B (TW)
Title: Substrate flat finder and rotation monitor for semiconductor substrate cleaning system
Inventor: BROWN BRIAN
IPC: B08B7/04
Filed: 2000-05-04
Granted: 2004-06-11
Abstract: A modular semiconductor substrate cleaning system is provided that processes vertically oriented semiconductor substrates. The system features a plurality of cleaning modules that may include a megasonic tank-type cleaner followed by a scrubber. An input module may receive a horizontally oriented substrate and rotate the substrate to a vertical orientation, and an output module may receive a vertically oriented substrate and rotate the substrate to a horizontal orientation. Each of the modules (input, cleaning and output) has a substrate support and may be positioned such that the substrate supports of adjacent modules are equally spaced. The modules are coupled by an overhead transfer mechanism having a plurality of substrate handlers spaced the same distance (X) as the substrate supports of the modules therebelow. The transfer mechanism indexes forward and backward the distance X to simultaneously transport semiconductor substrates through the cleaning system, lifting and lowering substrates from the desired modules wafer rotation/orientation sensors, an input module cart for transporting wafers between a substrate handler of a previous tool (such as a semiconductor substrate polisher) and a substrate handler of the cleaning system are also included.
Patent TW-510100-B (TW)
Title: Commonly used electronic signing task generation platform and method therefor
Inventor: LIN KUANG-SHIN
IPC: H04L12/22
Filed: 2001-12-28
Granted: 2002-11-11
Abstract: A commonly used electronic signing task generation platform and method are disclosed, which can provide user's operation interface commonly used, perform development and maintenance of signing task, operation and preview test. The system in the invention includes signing task database, rules setup module, contents editing module, preview test module and receiving/forwarding interface module. The method of the invention includes the following procedures: perform general signing rules setup via user's operation interface, go through user's operation interface to conduct editing processing of signing contents and follow the receiving/forwarding status of signing procedure to perform the corresponding signing task processing.
Patent TW-559746-B (TW)
Title: Method of driving an organic electroluminescent display device and display device suitable for said method
Inventor: FRANSISCUS COEN THEODORUS HUBE
IPC: G09G3/3225
Filed: 2002-01-08
Granted: 2003-11-01
Abstract: This invention relates to a method of driving a display device (8) comprising a layer of organic electroluminescent material (4, 5), said layer being sandwiched between an anode (5) comprising a plurality of separated anode segments (5') and a cathode (6), said method comprising the steps of dividing the anode segments (5') into N subgroups (5a, 5b), each anode segment in each subgroup being surrounded by anode segments which are not members of the same subgroup, dividing an image signal IStot into corresponding N subgroups IS1, IS2, ... ISN, so that the i:th subgroup comprises the information which is intended to be fed to the anode segments of the corresponding i:th anode segment subgroup, 1 <= i <= N, and, during a first time period t1, feeding a first subgroup (i=1) of said image signal IS1 to a corresponding first subgroup of first anode segments (5a), meanwhile holding all other anode segments at essentially equal potentials. This invention also relates to a device for use in the above method.
Patent TW-I243194-B (TW)
Title: Article comprising printable layer and composition used therein
Inventor: BACON CHESTER ARTHUR JR
IPC: B41M5/00
Filed: 2002-03-01
Granted: 2005-11-11
Abstract: The present invention relates to articles having a printed surface as well as flexible coating and film compositions that are printable in combination with exhibiting stain resistance. The composition comprises a hard component having an elongation of less than about 150%, a soft component having an elongation of greater than about 200%, and a cross-linking agent. The hard component preferably comprises a thermoplastic polyurethane, acrylic polymer, polymeric polyol or mixture thereof. The soft component preferably comprises a thermoplastic urethane, polymeric polyol, or mixture thereof; whereas the cross-linking agent is preferably an isocyanate.
Patent TW-529987-B (TW)
Title: Spattering apparatus
Inventor: COTTIER JOHN SYDNEY
IPC: E04F13/02
Filed: 2002-03-01
Granted: 2003-05-01
Abstract: An apparatus (1) for applying a slurry to a substrate (2). The apparatus includes a delivery drum (4) incorporating a delivery surface (5) disposed to support a layer of slurry. A spattering roller (8) is positioned closely adjacent the delivery drum and is rotatable so as to spatter the slurry from the delivery surface onto the substrate. Regulation means selectively vary or interrupt the flow of slurry from the delivery surface onto the substrate.
Patent TW-I222520-B (TW)
Title: Device for and method of testing semiconductor laser module
Inventor: ONO HARUYOSHI
IPC: H01S5/06
Filed: 2002-05-16
Granted: 2004-10-21
Abstract: In the semiconductor laser module testing device, a temperature control power source changes a temperature of a wavelength locker module, and a wavelength monitoring bias circuit detects an output of a wavelength monitor in the changed temperature range and computes a correlation between a temperature of a semiconductor laser and a wavelength of light output therefrom. Moreover, the wavelength of the output light is locked by controlling the temperature of the wavelength locker module while feeding back the output of the wavelength monitor by a wavelength feedback circuit based on the obtained correlation between the temperature and the wavelength.
Patent TW-589640-B (TW)
Title: Method of manufacturing an optical information recording medium
Inventor: HAYASHI KAZUHIRO
IPC: G11B7/24094
Filed: 2002-06-05
Granted: 2004-06-01
Abstract: In an optical recording medium having, on one principal plane of a signal substrate (100), a signal recording layer (110) and a transparent cover layer (125) which includes a first transparent layer (115) and a second transparent layer (120) which is harder than the first transparent layer (115), the first transparent layer (115) is formed so as to have a predetermined thickness distribution, and the second transparent layer (120) is formed so as to have a predetermined thickness distribution that provides a uniform thickness of the transparent cover layer (125). The first transparent layer (115) may be composed of a plurality of stacked thin layers.
Patent TW-I221906-B (TW)
Title: Measuring devices
Inventor: MURRAY MARTIN ANTHONY
IPC: G01R19/25
Filed: 2002-06-07
Granted: 2004-10-11
Abstract: A combined toroid/shunt device for detecting residual current in an electrical installation comprising a plurality of conductors such as a live conductor 2 and a neutral conductor 3 is described. The device comprises a toroid means 1, 4 for detecting an AC residual current within a first range and a plurality of resistive shunts 6a to 6d for connection in respective ones of the plurality of conductors. A current detection means 5, 7, 13 responsive to current flowing in each of said shunts for detecting a DC residual current and/or an AC residual current within a second range is described. The first range of AC residual current is an AC residual current resulting from earth leakage or cross-leakage between conductors up to a saturation level at which the toroid or electronic means associated means therewith becomes saturated. The second range includes an AC residual current of said saturation level.
Patent TW-592778-B (TW)
Title: Method and device for assaying activities of trace elements and extracting trace elements
Inventor: LIN SUNG-HUEI
IPC: B01D11/00
Filed: 2002-06-10
Granted: 2004-06-21
Abstract: The present invention relates to a method and a device for assaying activities of trace elements and extracting trace elements. The invented device includes: a filtering device; a preheating device in communication with the filtering device; an extraction tank in communication with the preheating device and containing materials therein; an activation tank in communication with the extraction tank and being introduced with ozone; an ozone generator in communication with the extraction tank and the activation tank for providing an ozone source; a high pressure oxygen generator in communication with the extraction tank for providing a high pressure oxygen source; a filtration storage tank in communication with the activation tank for filtering and storage; and a packaging device in communication with the filtration storage tank for packaging a filtrate solution. The extraction method used includes mixing ozone and high pressure oxygen with water; and using ultrasonic wave heat transmission at room temperature for the high decomposing power and the forced osmosis power to produce an extracted material with stable properties, high retention of nutrients, higher extraction components, and complete pharmaceutical properties.
Patent TW-552368-B (TW)
Title: Actuator
Inventor: MCHENRY WILLIAM J
IPC: E05B17/20
Filed: 2002-07-29
Granted: 2003-09-11
Abstract: An actuator mechanism is defined by a lever arm that is integrally connected to resilient spring members. The lever arm is movable between first and second positions and is normally biased into the first position in which the actuator may engage an adjacent member, for example to provide a fluid-tight sealing relationship of to lock the adjacent member in a stationary position relative to the lever arm. Movement of the lever arm into the second position releases the engagement with the adjacent member. In one embodiment the actuator is defined by a pair of overlapping, oppositely oriented slots cut into a monolithic member to define both the lever arm and the spring members. The lever arm rocks in a teeter-toter fashion when actuated and both ends of the lever arm can be utilized to perform work.
Patent TW-I277927-B (TW)
Title: Display apparatus capable of maintaining high image quality without dependence on display load, and method for driving the same
Inventor: OOE TAKAYUKI
IPC: H01J17/49
Filed: 2002-11-07
Granted: 2007-04-01
Abstract: A driving method for a display apparatus produces light emission by applying a sustain discharge pulse repeatedly. A pulse width of the sustain discharge pulse is varied within one subfield and is controlled in accordance with the amount of voltage drop of a sustain discharge voltage. A display apparatus has a display panel section, a data converter, a power supply section, and a sustain discharge pulse control circuit. The data converter receives an image signal and supplies image data suitable for the display apparatus to the display panel section, and the power supply section supplies power to the display panel section. Further, the sustain discharge pulse control circuit varies a pulse width of sustain discharge pulse within one subfield and controls the pulse width of the sustain discharge pulse in accordance with the amount of voltage drop of a sustain discharge voltage.
Patent TW-I250166-B (TW)
Title: Method of physicochemically producing glycogen and glycogen obtained by the same
Inventor: MATSUNAGA KAZUYOSHI
IPC: C08B37/00
Filed: 2002-12-06
Granted: 2006-03-01
Abstract: A method of producing glycogen is provided. The method comprises the step of heat- and pressure-treating a sugar-containing material under acidic conditions. The sugar-containing material is a polysaccharide or an oligosaccharide. Alternatively, the sugar-containing material is a plant material selected from the group consisting of Panax notoginseng, Yun Nan San-chi powder (trademark), Panax ginseng, wheat flour, soy bean, soy flour, shiitake, and coffee extract residue. Representatively, the glycogen includes a molecule having a molecular weight of 10,000 or less. The glycogen has a specific rotation of [alpha]D+197 DEG and anomeric proton peaks at 5.37 ppm and 4.95 to 5.33 ppm in 1H NMR spectra.