Patent GB-1004514-A (GB)
Title: Circuit enabling series connection of transistors
Inventor: STONE John
IPC: G05F1/595
Filed: 1961-12-29
Abstract: 1,004,514. Transistor amplifying circuits. FRANKLIN INSTITUTE OF THE STATE OF PENNSYLVANIA. Dec. 29, 1961, No. 46581/61. Heading H3T. [Also in Division G3] In a circuit in which two transistors of the same conductivity type are connected with their emitter - collector paths in series the voltage across one of the transistors is held to a predetermined ratio of the voltage across the other by connecting the series combination of the transistors in parallel with a pair of resistors having resistances in proportion to the predetermined ratio of voltages and coupling the junction between the series resistors with the common series connection of the transistors and the base of one of the series transistors by means of an error transistor of opposite conductivity type to the series transistors. The arrangement is such that when a signal is applied to one of the series transistors an error signal is produced in the error transistor which corrects the voltage across the other transistor through its base connection thereto. As shown in Fig. 2, if the base of one of the series-connected PNP transistors 11 is driven negative by an input signal e s  so that its impedance is lowered the base of error NPN transistor 14 becomes more positive than its emitter resulting in the impedance of this transistor to be lowered and consequently the base of transistor 10 becoming more negative and its impedance reduced until the bridge comprising transistors 10, 11 and series resistors 12, 13 is again balanced. In the circuit of Fig. 3 four transistors 20, 21, 30, 31 are connected with their emitter-collector paths in series and each pair is provided with two series resistors and an error correction transistor as shown. Each pair of transistors together with its associated resistors and error transistor thus forms one arm of a bridge of which the remaining arms are constituted by resistors 26, 27; error transistor 28 being connected as shown. The ladder circuit of Fig. 4 (not shown) shows how five transistors with their emitter collector paths in series are connected in accordance with the invention. Fig. 8 shows a variation of the circuit of Fig. 2 which permits operation of the series transistors close to cut off, i.e. when there is no input signal applied to transistor 11<SP>11</SP> and the voltage at the point 66 is more positive than the voltage at point 67. In order to control this initial condition the base of transistor 11<SP>11</SP> is made more negative than point 66 by connecting the base of this transistor to the point 67 through diode 68. As long as the initial conditions prevail current will flow through resistor 69 making the base of transistor 11<SP>11</SP> more negative than the point 66. The impedance of transistor 11<SP>11</SP> then decreases until there is no voltage difference between the points 66 and 67. The voltage drops across the two series transistors will then divide up as the voltages across resistors 12<SP>11</SP> and 13<SP>11</SP>. The diode may be replaced by a PNP transistor having its emitter connected to the base of transistor 11<SP>11</SP>, its base connected to the base of transistor 1411 and its collector connected to the collector of transistor 11<SP>11</SP>. The circuit of Fig. 4 may be used in a voltage regulator, Fig. 9 (not shown).