Patent GB-799918-A (GB)
Title: Improvements in or relating to circuits for frequency division
IPC: H04N5/073
Filed: 1957-03-01
Abstract: 799,918. Pulse frequency-divider circuits. FERNSEH GES. March 1, 1957 [March 1, 1956], No. 6855/57. Class 40 (6). A pulse frequency-divider circuit comprises a closed ring of individual dividers which are fed simultaneously with the incoming pulse train the overall division ratio being equal to the sum of the individual divisers. The Figure shows a pulse frequency divider for dividing by thirteen comprising a ring of multivibrator stages all of which are fed by the pulse train to be divided which is applied at input terminal 21. The amplitude of the input pulses is such that synchronization takes place only on the pulse corresponding to the desired prime number the time constant determining the duration of anode current cut-off of one tube of each multivibrator is such that after a time equal to the appropriate multiple of the period of the applied synchronizing pulses the next pulse overcomes the residual negative voltage on the grid to cause anode current to flow in that tube. The other tube of the pair has a negative bias such that it is cut-off until a positive pulse is applied to its grid from the anode of the first tube, the grid being held sufficiently negative to prevent the negative synchronizing pulses which are applied to it during this period having any effect. At the commencement of a cycle of operations grid of tube 1a which has previously been conductive receives from tube 3a a negative-going pulse via capacitor 20<SP>11</SP>, this is amplified by tube 1a and at the grid of tube 1b appears as a positive pulse to cause this tube to conduct. The resulting negative pulse at the anode of tube 1b is fed via capacitor 22 to the grid of tube 1a and thereby the tube is cut off. The negative synchronizing pulses on the grid of tube 1b are amplified and applied as positive pulses to the grid of tube 1a the time constant 22, 23 being such that the tube would not conduct in the absence of synchronizing pulses applied at terminal 21 until after a later period. The positive voltage at the grid of tube 1a causes the tube to conduct, the negative pulse at its anode cutting off tube 1b and is amplified in tube 2a appearing at its anode at the positive pulse. This is applied to 2b and causes it to pass anode current. The resulting negative pulse at the anode of tube 2b and thus at the grid of tube 2a cuts-off tube 2a until condenser capacitor 22 has charged sufficiently to allow a pulse from terminal 21 which has been amplified by tube 2b to drive the grid positive to cause current flow in tube 2a. A negative pulse then appears at the anodes of tube 2a and triggers the multivibrator including tubes 3a, 3b. The time constant of network 22<SP>11</SP>, 23<SP>11</SP> has a value differing from that of the two previous dividers so that tube 3a passes anode current only on the arrival of the fifth synchronizing pulse after the time of cut-off. This conduction causes a negative pulse to appear at its anode and thus to the grid of tube 1a to commence a new cycle of operations. Thus the three stages enable a division ratio of 4 + 4 + 5, i.e. 13, to be obtained. The positive potential to which resistors 23, 231, 23<SP>11</SP> are returned may be varied with the frequency of the applied synchronizing pulses so that the divisors are kept constant despite large changes in the frequency of these pulses. This control voltage may be obtained in known manner, for example by means of a frequency discriminator in which the frequency of the master generator is compared with the synchronizing frequency. In a modification a circuit for frequency division comprises a chain of serially connected frequency-divider stages such that the overall division ratio is equal to the product of the individual divisors, one at least of the stages consisting of a closed ring of dividers as described in connection with Fig. 1.