Patent GB-1325187-A (GB)
Title: Delta encoders
IPC: H04L1/20
Filed: 1970-12-22
Abstract: 1325187 Pulse discriminating circuits INTERNATIONAL BUSINESS MACHINES CORP 22 Dec 1970 [9 Jan 1970] 60723/70 Heading H3T In order to extract desired data pulses (E, Fig. 2, not shown) from a noisy input (A) the latter is fed to a peak detector channel 51, 23, Fig. 8, and also to a slope detector channel 63-74 which gates at 61 only those peaks from the peak detector channel which correspond to a significant slope, a latch 67 making the slope detector alternately responsive to positive and negative slopes. The peak detector channel 51 includes a differentiator (45, Fig. 4, not shown) supplying a pulse for every positive peak of the input signal to a squarer (49) which drives a detector (51) producing an output for each positive edge; output monostables (53) being driven thereby to feed the gate through a delay line 23 which compensates for delays in the slope detector channel. The peak detector channel also receives on a second input the complement of the input signal and therefore produces also output pulses corresponding to negative peaks in the input signal, the two outputs being applied together or separately to the gate 61, Fig. 8 (or 39, 43, Fig. 3, not shown). The slope detector responds to a sufficient steepness and duration of the input signal pulses to enable the gate, and as shown in Fig. 9 has two similar circuits receiving respectively at 200, 201 the differentials of the input signal and its complement. The differential pulses at 200 (representing slope) charge the capacitor in T204 base circuit to give an average level. They also pass from T202 emitter to T206 base so that a pulse exceeding the average, turns on T206 to give a pulse at T206 collector; it also, however, charges a capacitor between the emitters of T204, T206 so that the next pulse to turn on T206 must be even greater, its magnitude being determined by how much later it occurs, due to the discharging of the emitters' capacitor. Thus an output at T206 collector depends upon pulses at 200 of sufficient amplitude and spacing, which means input pulse slopes of sufficient steepness and duration to be recognized as data bits. A shaper T208, T210 drives inverters T212, T214, the inverter T214 driving a bi-stable T220, T222, T221, T223; and the inverter T212, as well as the bi-stable, driving and-gate diodes 227, 229. The antiphase circuit 201 &c. similarly drives the bi-stable and gate, such that an output is applied from T232 to the gate T240 &c. only when an input signal peak of a given polarity follows one of the opposite polarity. In a simpler form of slope detector (Fig. 6, not shown) the input pulses and their complement charge and discharge capacitors in the base circuits of respective transistors (T12, T10) in e-c pairs (T12, T14 and T10, T14), the resulting base voltages being compared with a preset reference voltage (at T14 base), instead of with an average voltage. A cross-coupled bi-stable (24, 26) again ensures response only to alternate polarities. Alternatively (Fig. 5, not shown), a capacitor (316) is charged by input pulses fed through a circuit (27, Fig. 3, not shown) which slows the edges, and then through an emitter follower (T301) and a capacitor (302). Comparison is made between the resulting stored voltage (on C316) and a preset reference (#V). In both of the simpler detectors, an output occurs only if the input pulses are large enough and fast enough to cause the capacitor voltage to exceed the reference.