baber/WOPTO huggingface dataset:
Patent JP-S5984388-A (JP)
Title: Tape running position display device
Inventor: YAMAMURA KAZUMASA
IPC: G11B27/34
Filed: 1982-11-06
Abstract: PURPOSE:To facilitate tape editing by peforming absolute address indication utilizing absolute address indicated in the body side of a VTR. CONSTITUTION:Absolute address of a tape is indicated in the display device 4 of the body of a VTR through a control pulse counter 3 and a CPU. This absolute address is supplied to the device 10 side through a processor 2 and the processor 11 of an operating device 10, and stored in the register 12 of a memory 15 successively. When the reset switch 17 of an operation key switch section 16 is operated, the content of a register 12 at that time is carried and stored in a register 13. When a preroll key 18 is operated, a key 17 is linked with it and relative address obtained by calculation of difference from later absolute address is stored in a register 14, and relative address is indicated in a display 19. By indication of this absolute address and relative address at desired time, tape editing can be performed easily and surely.
Patent JP-S6087537-A (JP)
Title: Digital signal channel distributor
Inventor: HAINRIHI NIRUSHIYURU
IPC: H04Q11/04
Filed: 1984-09-19
Abstract: A digital signal distributor for time division multiplex signals having the same frame format and for discrete channel signals has frame adaptors for synchronizing and storing the time division multiplex signals, and memories for the discrete channel signals, the frame adaptors and memories being provided following the inputs for the time division multiplex channels. The circuit further includes a distributor unit having an operator interface connected to the frame adaptors and the memories by first bus lines and first discrete lines. A clock pulse generator controls cyclical feeding of the stored code words into the first bus and first discrete lines. Second bus and second discrete lines are connected to an output of the distributor unit and transmit the time division multiplex output signals and the discrete signals to outputs of the circuit.
Patent JP-H05126381-A (JP)
Title: Radiation air-conditioner
Inventor: NAKANO AKIO
IPC: F24D19/10
Filed: 1991-07-10
Abstract: PURPOSE:To obtain an air-conditioner in which comfortable feeling is always obtained even if the room temperature and the resident's position from the air-conditioner are varied. CONSTITUTION:A radiation air-conditioner comprises an indoor temperature sensor (4), a sensor (3) for sensing an infrared ray generated from a resident, a unit for calculating a geometric factor for a resident's radiation air-conditioner panel from the output of the sensor (3), and a unit for calculating a heat dissipation amount of a radiation panel from the output from the sensor (4) and the geometric factor.
Patent JP-S6255105-A (JP)
Inventor: NIWA TAKAHITO
IPC: B27M1/08
Filed: 1985-09-04
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0244808-A (JP)
Title: Acoustic device
Inventor: KURONUMA REIJI
IPC: H04B7/00
Filed: 1988-08-04
Abstract: PURPOSE:To eliminate a tuning operation by specifying the relation of two frequencies transmitted from a transmission device, the reception frequency of a reception device at the time of silence and the lead-in frequency of an AFC circuit. CONSTITUTION:The AFC circuit is integrated in the reception device 7 receiving a ration signal transmitted from the transmission device 1 which is constituted in such a way that it transmits signals obtained from a tape recorder and the like by the radio waves of two different frequencies F1 and F2. When the lead-in frequency of the AFC circuit is assumed to be fc, and the reception frequency at the time of silence to be F0, the relation of F1>=F0-fc, F2>=F0+fc and F2-F1>fc is assumed. The frequency of the radio wave signals transmitted from the transmission device 1 are switched to two different frequencies, and two frequencies are set within the lead-in frequency of the AFC circuit integrated in the reception device 7. Thus, the tuning operation in the reception device is eliminated.
Patent JP-H0728310-A (JP)
Title: Electrifying wire cleaner
Inventor: AOKI RYUJI
IPC: G03G15/02
Filed: 1993-07-12
Abstract: PURPOSE:To prevent soiling from concentrating on a part of a cleaning member and to clean the nearly entire periphery of an electrifying wire in the case of cleaning the electrifying wire by providing a joint surface for cleaning the electrifying wire on the cleaning member and making the cleaning member freely slant with respect to the electrifying wire. CONSTITUTION:An electrifier cover 2 having a nearly U-shaped cross section is set in parallel with the electrifying wire 1, a barlike guiding part 3 is obliquely set on the surfaces on both sides of the electrifier cover 2 at a specified angle with respect to the electrifying wire 1, and a slot 2a long lengthwise is provided in a longitudinal direction on the upper surface of the cover 2. A nearly U-shaped supporting part 4a engaged with the cover 2 is provided on a cleaner 4, and a sagging down part 4b is provided on the supporting part 4a in parallel with the side surface of the supporting part 4a from a central part perpendicularly downward. The supporting part 4a is placed on the guiding part 3 so as to slide with respect to the guiding part 3, and the sagging part 4b is inserted in the slot 2a of the cover 2. The rectangular cleaning member 5 is provided on the end of the sagging part 4b, and the joint surface 5a is perpendicularly provided along the electrifying wire 1 on the central part of the member 5.
Patent JP-H1014917-A (JP)
Title: Ultrasonic imaging apparatus
Inventor: KUBOTA JUN
IPC: G01B17/00
Filed: 1996-07-08
Abstract: PROBLEM TO BE SOLVED: To improve an image display luminance value by a method wherein the distribution of an image signal level is computed corresponding to an interest area set by an ROI setter to control the display luminance value with respect to a received signal level based on the results. SOLUTION: An ROI setter 14 sets ROI about a reflection echo signal stored in a line memory 11. A depth gain control curve computation memory 15 extracts a part representing a depth and the direction of a beam of the reflection echo signal corresponding to the set ROI to compute the histogram of the luminance of the signal. The center and an average luminance of a luminance occurrence frequency distribution are determined for the histogram. Then, an absolute value of a difference between both the values is compared with a fixed value to judge the presence of correction. In other words, when the absolute value is large, a display dynamic range set value is referred to correct a luminance/echo level function coefficient generated by an arithmetic processing section 16. When the absolute value is small, no correction is needed.
Patent JP-H0247480-A (JP)
Title: Electronic key
Inventor: SASAKI TAKESHI
IPC: E05B49/00
Filed: 1988-08-04
Abstract: PURPOSE:To raise the exactness of unlocking by using a password number by a method in which many sets of jumper wires are provided in parallel with a dip switch groups for setting recitation numbers, and specific ones of them are cut off to set up a password number. CONSTITUTION:Output signals are sent to a judgement circuit 5 by operation of a key board 3 to match it with a preset recitation number or password number. When they coincide with each other, unlocking is made. The recitation number is set up by operation of dip switches 6 whose number is equal to the digit number by means of driver, etc. The password number is set up by cutting off desired ones of many sets of jumper wires 7 set in parallel with the dip switches 6. After the password number is once set up, disappearance or alteration based on error can be avoided to ensure the fulfillment of function.
Patent JP-H0244269-A (JP)
Title: System for analyzing trouble of lsi
Inventor: SUGANO YUKIO
IPC: G01R31/28
Filed: 1988-08-04
Abstract: PURPOSE:To automatically display a trouble place within a short time on the basis of the data table and trouble analyzing program of a memory device by a CPU when a test pattern is inputted to an LSI and trouble is detected from output. CONSTITUTION:The trouble data by a tester 1 is sent to a CPU 12 through an interface 3. The CPU 12 executes a trouble analyzing program 62 on the basis of the trouble analyzing data of a memory device 6 to calculate a trouble position and automatically displays the logical and physical positions of the trouble place on a display device 5. Concretely, when fail is performed by a test pattern number 1 and the output pin number 10 of an LSI, trouble numbers 1, 2 are obtained from trouble data 8 and number corresponding data. Next, the logical positions A001, A002 of the trouble place are obtained from a trouble number 9 and the corresponding data of the logical position of the trouble place to be displayed on a display device 5. Continuously, the physical positions 0001, 0201 of the trouble place are obtained from the trouble number 10 and the physical position corresponding data of a place to be displayed on the display device 5.
Patent JP-H11111700-A (JP)
Title: Enhanced magnetic field plasma-etching reactor
Inventor: CHENG DAVID
IPC: H01L21/302
Filed: 1998-07-10
Abstract: PROBLEM TO BE SOLVED: To ensure high etching rate and high uniformity of etching by generating a reactive etching plasma between an electrode and a gas manifold, forming an electrically controlled DC magnetic field, in parallel with the wafer supporting surface of the electrode and varying the magnitude and direction of magnetic field selectively applied to a wafer on the electrode. SOLUTION: By means of a vertically movable wafer elevating/lowering finger 79, a wafer 75 is picked up from an externally inserted blade 76 and transferred onto a cathode 72. After being processed, the wafer 75 is returned to the blade 76 and taken out to the outside of a chamber. Furthermore, power is supplied from an RF power supply system, and gas plasma for etching is formed from a gas flowing into a processing region. In addition, a large number of pair electromagnets, e.g. four electromagnets 116, 118, 120 and 122, are provided such that they cooperate with two pairs of coil to generate pseudo- electrostatic multi-directional magnetic field around which the wafer is made step movable or rotatable. According to the arrangement, etching is carried out uniformly at high and low voltages and the etching rate can be selected.
Patent JP-S6351994-A (JP)
Title: System for treating drainage
Inventor: KITAGAWA MASAMI
IPC: C02F3/12
Filed: 1986-08-22
Abstract: PURPOSE:To efficiently treat drainage by sufficiently forming a blanket zone of sludge, properly fluidizing sludge in a settling part and smoothly performing the return of sludge to an aeration part. CONSTITUTION:Drainage is introduced to the bottom part of an aeration part 2 through an inflow pipe 1 of drainage and is allowed to flow to an aerator 3 along the bottom from the lower part of a side wall of the space wherein a settling part 4 and an aeration part 2' communicate with each other. Sludge introduced into the aeration part 2 is aerobically treated in the aerator 3. The flow of mixed liquid of drainage and sludge passes through the upper part of a partition wall 7 from the aeration part 2, enters an aeration part space 2'', flows down along a partition wall 6 partitioning the settling part 4 from the aeration part 2'', and enters the space 2' under the settling part. The amount of the mixed liquid equivalent to drainage to be introduced is allowed to flow to the settling part 4 and it is separated into sludge and treated water and treated supernatant water is discharged as treated water through an overflow part 9.
Patent JP-S6352482-A (JP)
Title: Manufacture of gallium arsenide semiconductor device
Inventor: KUDO SUMIHISA
IPC: H01L21/28
Filed: 1986-08-22
Abstract: PURPOSE:To realize a low-noise state by a method wherein a gate electrode is formed by making use of a mask in the form of a photoresist film which protrudes from both edges at the bottom of a recess so that a depletion layer cannot be extended in a manner to creep up along a side wall of the recess. CONSTITUTION:When a gate electrode 7 is formed, an oxide film 4 acting as a protective film for etching is provided on an ohmic contact layer 2 and, in addition, a photoresist film 5 for patterning this oxide film 4 and for forming the gate electrode 7 by a lift-off method is provided on the oxide film 4. The oxide film 4 is dry-etched by means of a mask obtained by the development of the photoresist film 5 exposed to be a desired shape, and is etched in a groove shape. In addition, the oxide film 4 at the lower layer of the photoresist film 5 is side-etched by a distance l. An etching process for a recess at the outer layer of a semi-insulating GaAs substrate 3 is carried out by making use of the oxide film 4 as a mask. As a result, the width at the bottom of a recess 6 is almost identical with the width of the opening at the oxide film 4, and the gate electrode 7 can be formed at the bottom of the recess 6 by a life-off method.
Patent JP-H0244511-A (JP)
Title: Production of thin film magnetic head
Inventor: ISHIBASHI NAOCHIKA
IPC: G11B5/31
Filed: 1988-08-05
Abstract: PURPOSE:To shorten the time for film formation of a mask layer consisting of an inorg. material by etching the inorg. mask layer and upper core to a prescribed shape down to the position in the middle of the thickness direction thereof with a resist mask layer as a mask, then irradiating the layer again with an ion beam. CONSTITUTION:The thin film magnetic head is produced by forming a lower core 2 consisting of a magnetic material and an insulating layer 3 on a nonmagnetic material 1, then providing an insulating layer 5 interposed with a coil 4 consisting of a conductive material therein, laminating the upper core 6 consisting of a magnetic material connecting at one end to the lower core 2 thereon and forming the upper core 6 to the prescribed shape. The mask layer 23 consisting of the inorg. material covering the core is formed on the upper core 6 and the resist mask layer 8 of the prescribed shape is formed on the mask layer 12. The layer is then irradiated with the ion beam 9 by which the mask layer 23 and the upper core 6 are etched down to the prescribed position in the thickness direction thereof. The remaining mask layer 8 and the thin film 13 are removed and the upper core 6 is again irradiated with the ion beam 9, by which said core is etched to the prescribed shape. The time for the film formation of the mask layer 12 consisting of the inorg. material is shortened in this way.
Patent JP-2001017631-A (JP)
Title: Glass frame for game machine
Inventor: MORI NORIO
IPC: A63F7/02
Filed: 1999-07-09
Abstract: PROBLEM TO BE SOLVED: To easily form a glass plate insertion groove for attaching a glass plate and to secure the strength of a glass frame as well in the glass frame attached to the front surface of a pachinko game machine or the like. SOLUTION: This glass frame of the pachinko game machine is constituted of a frame member and a cover member. The frame member is composed of the glass frame of a metal material and the glass rail 22 of a synthetic resin material such as POM and nylon is attached to the glass attaching part 21 of the glass frame. At the glass rail 22, the glass plate insertion grooves 62 and 63 for holding the glass plate with a prescribed gap are formed. Since the glass rail 22 is composed of the synthetic resin material, the glass plate insertion grooves 62 and 63 are easily formed compared to the glass rail made of a sheet metal.  Also, since the glass rail 22 is manufactured with excellent dimensional accuracy compared to the metal material, the glass plate is not caught in the glass plate insertion grooves 62 and 63 of the glass rail 22 and thus, the glass plate is smoothly attached to the glass frame.
Patent JP-H0999206-A (JP)
Title: Filter discharge layer attachment
Inventor: DEIIN MATSUKU PURUTSUTO
IPC: B01D46/42
Filed: 1996-07-05
Abstract: PROBLEM TO BE SOLVED: To obtain a filter system utilizing an aggregated filter element by arranging a filter discharge sleeve placed outside a filter medium at one end of the filter element. SOLUTION: A gas current is sent into a filter system 160 by an intake pipe 162, and the intake pipe 162 is introduced into a filter tank intake 172. The gas current contaminated with various grains is sent into a filter element 15 through a top cap 60. When the gas current continues to move outward in the element 15, a contaminant which has been filtered off and aggregated is pulled downward in the element by gravity and continues to move to the outer lower part in the sleeve 50. The aggregated contaminant introduced into the sleeve 50 keeps moving downward in the sleeve 50 and is finally discharged from the system 160 through a filter vessel discharge pipe 185.
Patent JP-H1136996-A (JP)
Title: Method and device for controlling air-fuel ratio of engine
Inventor: KONDO KENTARO
IPC: F02D41/02
Filed: 1997-07-22
Abstract: PROBLEM TO BE SOLVED: To learn purge density according to a temperature of an engine and to use it for the precise control of fuel injection amount when the engine is cool, in a case where evaporated fuel from a fuel tank is led to the intake side of the car engine for combustion. SOLUTION: An engine air-fuel ratio control device comprises a water temperature sensor 7 to detect the temperature of cooling water in an engine 1, an oxygen sensor 8 to detect the density of oxygen contained in an exhaust manifold 3, an controller 9 which determines the purge density of evaporated fuel based on the output signal values from both sensors 7 and 8, and a vacuum switching valve(VSV) 6 which controls the evaporated fuel passing amount by the output signals from the controller 9. When the engine 1 is cool, the controller performs purge density learning accurately using a water temperature table set by the test performed beforehand.
Patent JP-H1022220-A (JP)
Title: Method and device for applying coating liquid to substrate and applicator
Inventor: YAMASHITA TETSURO
IPC: G03F7/16
Filed: 1996-07-04
Abstract: PROBLEM TO BE SOLVED: To improve the embedding property of coating liquid to the fine recessed part of a pattern formed on a substrate surface by turning a substrate at a low speed or stopping and holding it for a predetermined time after a coating liquid is applied to the surface of the substrate while rotating the substrate at a high speed and the entire surface there is covered with the coating liquid. SOLUTION: A substrate W is rotated at a high speed, for example, at 2,000 to 4,000rpm. Then an SOG material is discharged to the surface of the substrate W through a discharging nozzle 18 by operating a piezoelectric pump while the substrate W is rotated at a high speed. The substrate W is kept rotating for a few seconds after the SOG material is discharged, and when the surface of the substrate W is entirely covered with the SOG material, the rotating of the substrate is stopped, or its rotating speed is changed to low speed. Then, the substrate W is kept being stopped or rotated at a low speed for about 5 seconds, for example. During such a period, the SOG material is embedded to the fine recess of a pattern formed on the surface of the substrate W.
Patent JP-S6441700-A (JP)
Title: Centrifugal blower
Inventor: ITO KOJI
IPC: F04D29/44
Filed: 1987-08-05
Abstract: PURPOSE:To improve the extent of fan efficiency as well as to aim at the promotion of low noise by setting a winding angle in a scroll casing down to a specified large angle, while expanding axial scroll width at the discharge side gradually from a specified position. CONSTITUTION:A centrifugal blower has each multiblade fan 3 in a logarithmic spiral-form suction side scroll casing 1 and a discharge side scroll casing 2, and discharges air, inhaled from a suction port 11, out of a discharge port 21. In this case, a winding angle (an angle in a fan rotational direction from a point B to a point C) thetas of the scroll casing 1 should be set to 300 or 330 deg.. And, at the discharge side of this casing 1, scroll width W in the axial direction along a direction of rotation of the multiblade fan 3 from a position (position of thetao) at 60 or 180 deg. in front of a tongue part 5 is made so as to be gradually expanded.
Patent JP-H0361358-A (JP)
Title: Copper material for vapor deposition
Inventor: SANKI SADAHIKO
IPC: C22C9/00
Filed: 1989-07-28
Abstract: PURPOSE:To obtain a copper material for vapor deposition capable of stabilizing film forming velocity and increasing vapor deposition velocity by adding trace amounts of rare earth elements to high purity copper. CONSTITUTION:By adding 10-40ppm rare earth elements to copper of 99.999-<99.9999 purity or adding 2-20ppm rare earth elements to copper of >=99.9999 purity, the desired copper material for vapor deposition is obtained. Moreover, as to the rare earth elements, all the twelve elements can be used, but Ce, La, and Nd, in particular, can be advantageously used because they have marked effects of cleaning and settling the surface of a molten material as well as of inhibiting splashing and stabilizing film forming velocity in particular. By this method, the copper material for vapor deposition minimal in the occurrence of splashing in the course of vapor deposition operation and having superior yield of vapor deposition material can be obtained while obviating the necessity of using a zone refining method and a vacuum degassing method which require much labor and are impractical.
Patent JP-H0843121-A (JP)
Title: Electronic type odometer
Inventor: TAMURA SHIGEAKI
IPC: G01C22/00
Filed: 1994-07-27
Abstract: PURPOSE:To provide a means for reducing the circuit scale on the occasion when a BCD counter for computing and calculating an added distance of traveling distance executes a simultaneous addition processing of all digits. CONSTITUTION:A traveling distance computing means is so designed that a distance data value is held in a counter part 21 divided into prescribed digits and traveling distance data are processed by an addition processing of the lowermost digit 21a alone and that the data on the existence or nonexistence of the necessity of carry at the time of the addition processing are held in a carry flip-flop 233 and a carry processing is executed sequentially from the lower digit to the upper, thus a time-sharing processing being executed without conducting the addition processing of each digit simultaneously.
Patent JP-H0199130-A (JP)
Title: Stack controller for computer
Inventor: OTSUTOO MIYUURAA
IPC: G06F7/00
Filed: 1988-08-05
Abstract: PURPOSE: To reduce number of registers by forming sets of registers to an uppermost part of the stack and keeping stacks of later generations in the sets of the registers. CONSTITUTION: Registers 0-63 form a stack register part and they are addressed in relation to bits 5-0 of a frame pointer FP. The frame pointer FP is further incremented by a frame length FL, which is set to 6, and new stack frames are formed. A saved old status register SR is addressed as a local register LO from the new stack frame, and a saved old program counter PC is addresses as a local register L1. Since the FL is set to 6, remaining registers L2-L6 are idle and used optionally. Thus, a register read/write time is decreased and number of the registers is decreased.
Patent JP-2000025062-A (JP)
Title: Molding of thermosetting resin
Inventor: INADA MORIKAZU
IPC: B29C33/44
Filed: 1998-07-10
Abstract: PROBLEM TO BE SOLVED: To obtain a thin-walled plate-shaped product comprising a thermosetting resin of high accuracy excellent in flatness by a simple means. SOLUTION: In a mold for molding a thermosetting resin wherein an ejection pin 2 or an ejector is provided to the bottom surface of a cavity 1, the flat molding plate 4 covering the entire bottom surface of the cavity 1 is prepared to be received in the cavity 1 in a freely detachable manner and a thermosetting resin material is charged in the cavity 1 to be pressed and molded.