baber/WOPTO huggingface dataset:
Patent JP-H03149747-A (JP)
Title: Organic electrolyte battery
Inventor: KATO TAKASHI
IPC: H01M2/12
Filed: 1989-11-07
Abstract: PURPOSE:To obtain an explosion-proof mechanism which is kept at good airtightness when no explosion is feared and is satisfactorily operated when explosion is feared by providing a lower cover, a film-shaped valve body with a specific melting point by the differential scanning calorimetry, and an upper cover. CONSTITUTION:A lower cover 8 with a valve hole 8a, a film-shaped valve body 9 constituted of a heat deposition resin film with the melting point 130 deg.C or above by the differential scanning calorimetry and a metal thin plate, and an upper cover 10 surrounding the film-shaped valve body 9 and having a cutting edge 10a faced to the film-shaped valve body and a gas vent hole 10b are provided. An explosion-proof mechanism is obtained which is kept at good airtightness when no explosion is feared even if the battery temperature is increased and is satisfactorily operated when explosion is feared due to the abrupt external short circuit or the like.
Patent JP-H11112873-A (JP)
Title: Image processing method and device
Inventor: MIYAGUCHI YUTAKA
IPC: G06T1/20
Filed: 1997-10-03
Abstract: PROBLEM TO BE SOLVED: To cope with various applications by small-scale circuit constitution and to efficiently perform a high-grade image processing. SOLUTION: An image processor as this device is provided with an input part 40 for fetching image data from the outside, an SVP 14 for inputting, processing and outputting the image data by a scanning line unit, an image memory 50 for writing and reading the image data by the scanning line unit, an output part 70 for outputting the processed image data to the outside and a data path 72 for mutually connecting the input part 40, the SVP 14, the image memory 50 and the output part 70. A program memory 10 stores a program for the SVP 14 and an instruction generation circuit 12 supplies the control signals of a microinstruction or the like to the SVP 14. A timing control unit 74 supplies required timing control signals to the input part 40, the SVP 14, the image memory 50, the output part 7 and an IG 12. A ROM loader 76 and an I<2> C bus interface circuit 78 distribute program data through an internal bus 80 to program data holding parts (memory and register, or the like), distributed and arranged at respective parts inside the image processor.
Patent JP-H04162509-A (JP)
Title: Choke coil provided with terminal pedestal and its manufacture
Inventor: SATO HIDEYUKI
IPC: H01F27/28
Filed: 1990-10-24
Abstract: PURPOSE:To enhance the dimensional accuracy of a terminal pitch and to easily execute an automatic loading operation by using a robot when this choke coil is mounted on a board or the like by a method wherein a terminal is inserted into a cutout groove in a terminal stand, the position of the terminal is fixed, a resin molding operation is executed and a terminal pedestal which is rectangular and which is provided with a groove for chucking use on the side face is formed. CONSTITUTION:Terminals 4 are inserted into cutout grooves 14 in a terminal stand 13 for a choke coil provided with the terminal stand; terminal positions are fixed; a resin molding operation is executed by using a molding resin; a terminal pedestal 1 which is rectangular and which is provided with grooves 3 for chucking use on side faces is formed. A cylindrical case 11, an outer lid and the terminal stand 13 provided with the cutout grooves 14 into which winding ends are inserted and to which they are fixed are molded collectively by using a resin in such a way that the terminal stand 13 and the cylindrical case 11 are connected by a neck part. A ring-shaped magnetic core is housed in the cylindrical case 11; the outer lid is closed; a winding 5 is executed on the outer circumference; the terminals 4 of the winding ends are inserted into said cutout grooves 14; after that, the terminals are positioned and fixed; the terminal stand 13 is molded collectively by using a molding resin; a terminal pedestal 2 is formed; at the same time, the grooves 3 for chucking use are formed on side faces of the terminal pedestal 2.
Patent JP-H07141545-A (JP)
Title: Coin processor
Inventor: ARIGA TOSHIO
IPC: B65G47/28
Filed: 1993-11-17
Abstract: PURPOSE:To provide a coin processor which prevents coins from being jammed and can excellently convey the coins without kicking the operation of a conveying means. CONSTITUTION:This processor is equipped with a conveyor belt which conveys a coin K discharged from a stacker for each kind of money, a hopper 50 which stores the coin K carried out of the conveyor belt, a conveyor 31 which picks up the coin K stored in the hopper 50 with ribs 57 and 57 and conveys it, and coil springs 58 and 59 which put coins, carried in an disorder state by the conveyor 31, in order by kicking them in the opposite conveyance direction and are elastically displaced if the coins in the disorder state are caught between the ribs 47 and 57, to pass the coins in the disorder state.
Patent JP-2000121729-A (JP)
Title: Multibeam radar device
Inventor: ISHIZAKA HIROYUKI
IPC: H01P1/383
Filed: 1998-10-09
Abstract: PROBLEM TO BE SOLVED: To manufacture a homogeneous article which is made small-sized and hardly gets out of order at low cost by switching the direction of a radiated electromagnetic wave without using any mechanical component. SOLUTION: Coils (L1, L2...Ln) are provided which apply magnetic fields to circulators (C1, C2...Cn) connected to (n) antennas (A1, A2...An), and the directions of currents flowing to the coils are switched by individually provided switches S1, S2...Sn) to invert the signal rotating directions of the circulators (C1, C2...Cn) according to the directions of the applied magnetic fields. Consequently, the need for a mechanically movable component for scanning forward by radiating electromagnetic wave beams from the antenna is eliminated and the device can be made small-sized. Further, the occurrence of a fault is therefore reducible and the homogeneous article with high reliability can be manufactured at low cost.
Patent JP-S62145869-A (JP)
Title: Manufacture of thin film transistor
Inventor: TOKUNAGA HIROYUKI
IPC: H01L29/786
Filed: 1985-12-20
Abstract: PURPOSE:To form a semiconductor layer made of a polycrystalline ZnSe having good orientation by introducing two types of specific compounds and an active species chemically reacting with at least one of the compounds in a film forming space. CONSTITUTION:Compounds A, B and an active species chemically reacting with at least one of the compounds are introduced into a film forming space to form a semiconductor layer made of a polycrystalline ZnSe having good orientation. Here, the compound A is ZnRa, the compound B is SeBb, where (a) is equal to or positive integer number times of the valency number of zinc Zn, R is hydrocarbon group, (b) is equal to or positive integer number times of the valency number of selenium Se, B is hydrogen H, halogen X or hydrocarbon group. Thus, since the semiconductor layer can be formed at low temperature of 300 deg.C or lower, the polycrystalline ZnSe layer having good crystallinity, less defect and high quality can be obtained, and a TFT having less threshold value shift of a transistor operation, less deterioration of electric characteristics and excellent characteristics is obtained.
Patent JP-H04161353-A (JP)
Title: Toner jet recording device
Inventor: IWAO NAOTO
IPC: G03G15/05
Filed: 1990-10-25
Abstract: PURPOSE:To prevent aperture parts from being clogged up with toner by a method wherein an aperture electrode is excited by an exciting device in a vibration mode in which the maximum amplitude point exists near the aperture part. CONSTITUTION:When an electric signal of a predetermined frequency (f) [kHz] is applied from a driving circuit to the piezoelectric elements 2 attached to an aperture electrode 1, this aperture electrode 1 is excited by a zeroth bending vibration in the direction X and a third bending vibration in the direction Z. Of a series of apertures 12 in a row, the apertures 11 are provided near the loop of the vibration, i.e., the position in which the maximum vibratory acceleration is obtained. This method eliminates the possibility of toner adhering to near the apertures 11 of the aperture electrode 1, thereby preventing the clogging of the aperture with the toner.
Patent JP-2000114356-A (JP)
Title: Manufacture of semiconductor substrate with protective film
Inventor: SAKAMOTO TAKAO
IPC: C09J7/02
Filed: 1998-10-09
Abstract: PROBLEM TO BE SOLVED: To simplify the manufacture of a semiconductor substrate with protective film, by sticking a laminate tape in desired shape whose area is smaller than the area of a semiconductor substrate to the underside of the semiconductor substrate with a protective film formed thereon, removing the protective film from the area not coated with the tape by etching, and then stripping off the tape. SOLUTION: A semiconductor substrate 1 with a protective film 2 formed on its underside 3 is prepared. Then a circular, thin laminate tape 10 the size of which is equal to the size of the flat main part 9 equivalent to a portion obtained by removing an annular peripheral part 8 of the circular flat part 7 on the underside 3 of the semiconductor substrate 1 from the flat part 7, is stuck to the underside 3. Then etching is performed by acid treatment to remove the protective film 2 from the side face 5, chamfered part 6 and peripheral part 8 not coated with the laminate tape 10. Thereafter, the laminate tape 10 is removed to obtain the semiconductor substrate 1 with protective film 2. As a result, formation of nodules is prevented with reliability without need for a large number of processes, precise and expensive processing equipment or high-purity materials.
Patent JP-H09135131-A (JP)
Title: Variable gain amplifier
Inventor: ICHIHARA MASAKI
IPC: H03G3/20
Filed: 1995-11-07
Abstract: PROBLEM TO BE SOLVED: To provide a constituting method of a variable gain amplifier where relation between a control voltage and a gain decibel value is near to a straight line. SOLUTION: Unit variable gain amplifiers 1, 2, 3 and 4 are connected serially. An input control voltage Vc is inputted to a control signal generator 6 and amplified or attenuated in a D.C. amplifier 61. Its output is branced to four in accordance with the respective single variable gain amplifiers and only prescribed D.C. voltage values are respectively voltage-shifted in level shift circuits 62, 63, 64 and 65. The output of the level shift circuit is, moreover, voltage- limited to a fixed D.C. voltage range by voltage limiting circuits 66, 67, 68 and 69 so as to be outputted as the control voltages Vc1, Vc2, Vc3 and Vc4. Vc1 is the control voltage of the amplifier 1, Vc2 is of the amplifier 2, Vc3 is of the amplifier 3 and Vc4 is of the amplifier 4.
Patent JP-H03148859-A (JP)
Title: Semiconductor device
Inventor: NOUZUMI ATSUO
IPC: H01L21/52
Filed: 1989-11-06
Abstract: PURPOSE:To enhance adhesive properties with resin and to improve reliability by adhering a plate having an uneven part or a through hole onto the rear surface of a semiconductor chip pacing part. CONSTITUTION:A copper plate having 0.1-0.25mm of thickness is pressed to form an uneven part or a through hole, and a close contact reinforcing plate 20 is formed. The plate 20 is adhered to the rear surface of the die pad 11 of a lead frame through a polyimide resin P. A semiconductor device is completed through mounting of an element chip, wire bonding and resin sealing. In the case of resin sealing, the resin is filled in a small hole, and cured to be desirably adhered in close contact. Since the plate enhanced in adhesion is formed separately from the semiconductor chip mounting part, it can be easily formed.
Patent JP-H1092930-A (JP)
Title: Method of forming wiring structure of semiconductor device
Inventor: KAWASHIMA KOICHI
IPC: H01L21/302
Filed: 1996-10-30
Abstract: PROBLEM TO BE SOLVED: To easily obtain a wiring structure having a low contact resistance by preventing upper wiring layers from bridging with residues of wiring metals for plugs and raise the step coverage of the upper wiring layers. SOLUTION: A tightly contact film 14 is formed on a main plane of a layer insulation layer 12, exposed surface of an Si substrate 11 and inner walls of the insulation layer 12 in contact holes 13. On the surface of the film 14, W is deposited to form a first wiring metal film 15. This film 15 is etched to form plugs 16 such that the surface of the metal film 15 located above the exposed surface of the substrate 11 is flush with or on a virtual plane passing the edges of the film 14 on the edges of the insulation layer 12 defining the contact holes 13. On the insulation layer 12 a second wiring metal film 18 is formed and patterned to form a second conductive layer. Etching is performed under the condition that allows etching of W, thereby removing residues 17.
Patent JP-H06203645-A (JP)
Title: Water-resistant insulated and covered conductor and its manufacture
Inventor: DABURIYUU BAANAADO WAAGOTSUTO
IPC: G02B6/44
Filed: 1993-10-26
Abstract: PURPOSE: To provide a submarine cable using no conventional coal tar oil-coal tar pitch mixture, or coal tar oil-natural asphalt mixture. CONSTITUTION: This conductor is formed of a core 12 having at least one conductor element, a polymer-made jacket 13 arranged around the core, a textile covering 14 put on the polymer-made jacket, and a waterproof coating 15 put on the textile covering. In such a waterproof insulating coated conductor 10, the waterproof coating 16 contains a mixture of 40wt.% of pine tar oil from 15 and the remainder of natural Trinidad asphalt.
Patent JP-S63277786-A (JP)
Title: Two-ply plated steel sheet for soldering
Inventor: KANDA KATSUMI
IPC: B32B15/01
Filed: 1986-12-05
Abstract: PURPOSE:To obtain a two-ply plated steel sheet for soldering having superior solderability, corrosion resistance, workability, aging stability and economical efficiency by forming a specified amt. of an Sn layer as a lower layer on a steel sheet by tinning and a specified amt. of a layer based on Zn, Ni or Co as an upper layer on the lower layer by plating. CONSTITUTION:An Sn layer as a lower layer is formed on a steel sheet by tinning by 0.3-5g/m<2>. A layer based on one or more among Zn, Ni and Co and having lower electric potential than the standard electrode potential of Sn as an upper layer is formed on the lower layer by plating by 0.1-3g/m<2>. An alloy layer contg. one or more among Sn, Fe, Pb and Cu besides one or more among Zn, Ni and Co and having lower electric potential than the standard electrode potential of Sn may be formed as the upper layer. The ratio between the lower and upper layers is regulated to (1:5)-(50:1). The corrosion resistance of the Sn layer having superior solderability is improved by the baser upper layer and a two-ply plated steel sheet for soldering having superior characteristics is obtd.
Patent JP-H10134633-A (JP)
Title: House
Inventor: HOSHIKAWA TAKAHIRO
IPC: F21V33/00
Filed: 1996-10-31
Abstract: PROBLEM TO BE SOLVED: To improve comfortability and safety without impairing economic efficiency by arranging a power-saving line-of-sight guiding luminescent body at an optional position on the surface along a passage where the movement of a person is obstructed on the inside or outside of a house. SOLUTION: A deformable power-saving luminescent object may be used for this lineofsight guiding luminescent body 1. The line-of-sight guiding luminescent body 1 is arranged at the place having a large meaning to emphasize its location, e.g. the end section of a stairway 2 or the upper face section or end section of a handrail 3. It is lighted when necessary, and at least safety is secured or movement is facilitated. A thin-plate long electroluminescence generating light in response to the applied electric signal, for example, is used for the line-of-sight guiding luminescent body 1. The electroluminescence is easily deformed, it has a thin film shape, its wiring is simple, it can be easily arranged at any place, it has a sufficient luminescent quantity while saving power, and comfortableness and safety can be secured.
Patent JP-H03152312-A (JP)
Title: Heat source device of hot water space heater
Inventor: NOMA KOICHI
IPC: F24D3/10
Filed: 1989-11-07
Abstract: PURPOSE:To make it possible to complete water replenishing work without direct monitoring the water level of a water replenishing tank by providing a drain port with a cap at an intermediate position of the replenishing water tank and projecting the drain port and a filler to the outside of an outer fitting case. CONSTITUTION:A filler 14 is provided at a hot water circuit 8 which is between a circulation pump 5 and a heat exchanger 6, and on the side face of a replenishing water tank 12 a drain port 26 is provided at its intermediate height. And, the volume V3 below the drain port 26 is set up to correspond to the volume of the discharged water from a hot water tank 4 to the replenishing water tank 12. Accordingly when water is replenished, water is discharged from the drain port 26 of the replenishing water tank. With this arrangement it is possible to confirm the finish of the water replenishing work without directly watching the water level of the replenishing water tank 12, and the water replenishing work can be done simply and surely.
Patent JP-H01132122-A (JP)
Title: Pattern forming method
Inventor: SHIRAISHI HIROSHI
IPC: G03F7/00
Filed: 1987-11-18
Abstract: PURPOSE:To enable a high-precision pattern formation and to reduce charge-up caused by charged particles by preforming a water-soluble antistatic film on the upper surface of a radiation sensitive agent layer before the application of a charge beam without affecting the characteristics of the high-performance radiation sensitive agent layer. CONSTITUTION:A latent image 5 of a predetermined pattern is formed in a radiation sensitive agent layer 2 using a charged particles beam 4, and then, the predetermined pattern is developed in the sensitive agent layer 2 by a development process. In such a case, before the application of the charged beam 4, a water-soluble antistatic film 3 is preformed on the upper surface of the radiation sensitive agent layer 2. For instance, a positive type electron beam resist is applied on a silicon substrate 1 by a spin coating method, and baked, forming a resist layer 2 having a thickness of 2mum. A water-soluble antistatic film 3 is applied thereon by a spin coating method, and heat-treated for 10 minutes at 60 deg.C, thereby forming a film having a thickness of 0.08mum. Thereafter, an electron beam 4 is applied to form a latent image 5 in the electron beam resist layer 2. After removing the antistatic film 3 in a rinsing process, the image 5 is developed to obtain a positive type resist pattern.
Patent JP-H06116688-A (JP)
Title: Finishing method for pt/feni clad wire
Inventor: WADA WATARU
IPC: C22F1/00
Filed: 1992-10-02
Abstract: PURPOSE:To provide a finishing method capable of satisfying the specification characteristics such as linearity, mechanical properties, wire diameter, crystalline grains or the like in a Pt/FeNi clad wire. CONSTITUTION:In the finishing of the clad wire in which the core material is constituted of FeNi and the outer surface material is constituted of Pt, tension annealing is executed by 50 to 250g back tension at 550 to 750 deg.C. In this way, working strains in the Pt/FeNi clad wire are removed.
Patent JP-H03149964-A (JP)
Title: Digital image processor
Inventor: YABANETA TSUYOSHI
IPC: G06T1/00
Filed: 1989-11-06
Abstract: PURPOSE:To eliminate the need of a troublesome key operation, etc., even if many designated areas exist by bringing a mark sheet in which an editing area is written to pre.scan before scanning a document which necessitates an editing operation, and defining the editing area in a real time. CONSTITUTION:By a pre-scan mode, a blocking processing for area filling uniformly a closed curve part of a linear image written in a mark sheet 6 is executed, and a code for designating an area (area surrounded by a mark 7a) of an original image brought to image processing is generated. Subsequently, based on its code, a gate signal for bringing an image in a designated area to area designation is generated, and based on this gate signal, such processing as passing (extraction), obstruction (erasion), inversion, superposition, etc., of an image of some area in the original image area executed selectively. In such a way, by bringing the mark sheet in which an editing area is written to pre.scan before scanning a document 8 which necessitates an editing operation, the editing area is defined in a real time, by which plural areas can be designat ed.
Patent JP-H04161181-A (JP)
Title: Pinball game machine
Inventor: OKADA KAZUO
IPC: A63F7/02
Filed: 1990-10-25
Abstract: PURPOSE:To equalize the chance for obtaining profits given to a player by providing a variable prize-winning device formed so that it can be converted to a first state being disadvantageous to the player and a second state being advantageous to the player with regard to prize-winning of a game ball discharged onto the game board surface. CONSTITUTION:When a game ball detector 21 detects a game ball passing through a passing chucker 6L or 6R, it is driven so that numerals of 0-9 are displayed variably on a variable indicator 7, and on the other hand, a random number is generated at every prescribed time and its value is decided, and after a prescribed time, the variable display is stopped by displaying the numeral corresponding to the value of the random number. As a result of random number decision, in the case the final display corresponds to a specific numeral, variable prize-winning devices 3L, 3C and 3R being start ports are driven to convert to a second state being advantageous to a player, and when a prescribed time elapses, the conversion driving is stopped and each variable prize-winning device 3L, 3C and 3R is reset to a first state. The variable prize-winning devices 3L, 3C and 3R become a first state by closing a pair of movable pieces installed on the game board surface, and becomes a second state by opening the movable pieces. In such a way, a chance for prize-winning to the variable prize-winning device and obtaining profits which follow it can be given equally to the player.
Patent JP-H03150874-A (JP)
Title: Semiconductor device
Inventor: KIKUTA KUNIKO
IPC: H01L29/43
Filed: 1989-11-07
Abstract: PURPOSE:To reduce contact resistances and avoid a junction breakdown and the like caused by metallic spike by a method wherein specific conductive materials are buried in a contact hole. CONSTITUTION:The diffused regions of an n-type channel MOS-FET, i.e., a source 2, a drain 3 and a gate 4 are formed in a p-type Si substrate 1 which is a first semiconductor and an insulating film 9. Further, second semiconductors such as Ge thin films 5 which have a same conductivity type as the diffused regions and have a narrower band gap than the first semiconductor are built up in the contact hole 8 on the sides of the source 2, drain 3 and gate 4. Then polycrystalline metal elements such as polycrystalline W films 6 are built up in the contact hole 8 and on the Ge thin films 5. Al wirings 7 are connected electrically to the source 2, drain 3 and gate 4 of the MOS-FET with the Ge thin films 5 and the W films 6. With this constitution, contact resistances can be reduced and, further, a junction breakdown and the like caused by metallic spike can be avoided.