Patent GB-734075-A (GB)
Title: Improvements in or relating to electronic digital computing devices
Inventor: WILLIAMS FREDERIC CALLAND
IPC: G11C11/23
Filed: 1949-06-22
Abstract: 734,075. Digital electric calculating-apparatus. NATIONAL RESEARCH DEVELOPMENT CORPORATION. June 5, 1950 [June 22, 1949], No. 16591/49. Divided out of 731,341. Class 106 (1). In an electronic series-mode digital computer including an arithmetic organ which comprises a cathode-ray tube storage device in which each digit of a stored number word is represented by a particular form of discrete electric potential charge on the tube screen, the arithmetic organ has 'a storage capacity of two screen lines each capable of storing one basic number word, and means are provided for scanning the lines alternately in stop with the operating rhythm of the computor, and for reversing the order of such scanning under control of an instruction word. The computer described is a modification of that described in Specification 731,341, employing C:R.T. stores as described in Specifications 645,691; 657,591 and 705,474. As shown, the accumulator A includes an add, instead of a subtract, unit 21, and a Y-shift generator AYSG for controlling the alternate scan of two lines Al, Am on the screen of the C.R.T. 16. The Y-shift potentials are obtained from a trigger-circuit FF to which is normally applied via gate G11 or G12 and gate G10 waveform HM or Hs (according to the condition of trigger circuit TC11); thus since FF is responsive to both positive and negative pulses it is normally switched over at the beginning of every beat, to produce the waveform of Fig. 10 (a). A 40-digit number, entered in seriesmode form through gate OTG during beat A2 into line Al of the accumulator, is converted to an 80-digit number by repeating the most significant digit. If this digit is " 1 " (indicating that the number is negative-written as a complement), gate 70 will be opened to pulse p39 which operates trigger circuit 71 to open gate 72 during the following beat (S3) so that a succession of dash or " 1 " pulses are sent to the line Am. For a test instruction, the most significant digit of the 80-digit number should be sensed during the beat A2 so that line Am, not Al should be scanned; the corresponding function digit combination set up in the staticisor therefore opens gate G13 to cause trigger circuit TC10 temporarily to close gate G10 so that a temporary reversal " waveform, Fig. 10 (b), is obtained from FF. The accumulator may be' used for addition and multiplication of numbers longer than 80 digits and programmes are described for addition and multiplication of 120-digit numbers separated into three 40-digit sections, line Am being used for storing carry digits. These programmes include an instruction (#) in which the functions of the lines Al, Am are reversed, the corresponding staticized function digit combination allowing a prepulse to operate trigger circuit TC11 to cause permanent reversal of the line-scanning order (see Fig. 10 (c)). Reference is made to the inultiplying arrangements described in Specification 712,172. Temporary reversal may be employed also to enable the contents of line Am to altered during beat A2, line Al being unchanged. Specifications 682,156, 692,853, 693,424, 705,477, [Group XL '(c)], 705,479, 734,071, 734,073 and 734,074 also are referred to.