Patent GB-1205103-A (GB)
Title: Self-adaptive timing system for traffic controller
Inventor: CRESS VERNOR BERT JR
IPC: G08G1/08
Filed: 1968-06-24
Abstract: 1,205,103. Road signals for controlling traffic. TAMAR ELECTRONICS INDUSTRIES Inc. 24 June, 1968, No. 30068/68. Heading G4Q. In a timing system for use with a traffic controller having first and second sets of traffic signals for controlling traffic on first and second intersecting streets and having a green extension timing interval for controlling the first set of signals, the timing system comprises a gap counter 20 (Fig. 1) including a clock pulse generator 110 (Fig. 5), vehicle detector 19 and a shift register means 112, 113 generating a timing signal in accordance with the gaps between traffic on the first street, at least one computing and control unit 14, 15, 37, each including means for computing the immediate state of traffic condition on one of the streets and control means 17, 35, 41 responsive to the outputs from the gap counter 20 and computing means for comparing these outputs and producing an output to the traffic controller 25 to control the extension of the green time. A pulse 12 is produced for each vehicle as it approaches the stop signal on the waiting street. Computer 14 determines the number of vehicles waiting during the stop and amber period and computer 15 is supplied with clock pulses 30 so as to determine the time of the longest waiting vehicle. Pulses 40, 18 from the vehicle detector 19 in the street in which the vehicles are moving for each vehicle are used in the traffic density computer 37 and gap counter 20 to determine the number of vehicles in a certain time and the time interval between vehicles. The outputs from these computers 14, 15 and 37 and the gap counter 20 are compared in logical control and minimum gap selecting circuits 17, 35 and 41, the outputs of which are passed via OR gate 21 to the traffic controller 25 to adjust the extension of the green time in accordance with the immediate traffic conditions. The timing system can be used in the traffic controller disclosed in Specification 1,164,131. Gap counter (Fig. 5).-A pulse 40 from detection of a vehicle in the moving street by detector 19 passes via OR gates 122, 118 to pulse shapers 123, 119 which produce differentiated pulses 124, 120 to reset the shift registers 112 and 113. This initiates the start of a counting period, the shift register 112 counting pulses from a clock pulse generator 110 via a frequency divider 111. When another vehicle is detected by 19, the registers 112 and 113 are reset so that their output corresponds to the time in seconds of the gap between vehicles. If the register 113  makes a complete count of 10 seconds, the count will be stopped and the registers reset. The registers 112 and 113 and frequency divider 111 may use flip-flop circuits. Vehicle waiting computer (Fig. 2).-A pulse 12 produced by each vehicle detected by an electrical switching pad on the waiting street passes via AND gate 46 and is counted by scaling counter 50, which may be in the form of a ring counter. When a certain number of vehicles has been detected as selected by switch 55, the counter 50 is reset via OR gate 70. This output from the counter 50 is counted in a register 60, each stage 61, 62, 63 divides by two and provides outputs 70, 71, 72. When the register 60 is full an inhibit signal is supplied via inverter 97 to the counter 50. If the traffic signal on the waiting street is at amber, a pulse from a pulse shaper 96 resets the counter 50 and the register 60. The outputs from the register 60 represent the number of vehicles waiting and these outputs are fed to AND gates 80, 81, 82 so that the appropriate output 70, 71 or 72 is fed to a switch 90 when the corresponding signal occurs to the inputs of these gates from the gap counter. The output from the switch 90 is fed via AND gate 92 and OR gate 94 to control the extension of the green time on the moving street. Additional AND gates (110, 111 and 117-121, Fig. 6, not shown), may be associated with the outputs 70-72 of the register 60 and with different gap times from the gap counter and fed to contacts 103 of switch 90. The gates may be diode or transistor, such as NOR gates. Time of longest waiting vehicle.-The computer 15 for determining the time of the longest waiting vehicle is similar to Fig. 2 except that the input AND gate 46 (131, Fig. 3, not shown), to the scaling counter has an input from a clock pulse generator (130) and the input from the detector 11 is fed via an AND gate (143) and flip-flop (140). The other input to AND gate (143) is from the output OR gate 44 (145) of the traffic red and amber signal control 42. When a vehicle is detected on the waiting street the AND gate (143) is enabled which changes the state of the flip-flop (140), this enables AND gate (131) to pass clock pulses to the scaling counter 133. Traffic density computer.-The Fig. 2 system can be modified (Fig. 4, not shown), by having an input AND gate (150) to a scaling counter (152) enabled by a green signal from the traffic control 95 so that the scaling counter (152) counts the number of vehicles occurring in a certain time. The scaling counter is reset after the certain time together with the register 60 by signals obtained from a clock pulse generator (160) via a delay line (162). Also gates (175) feeding an additional register (180) are connected between the outputs of the register 60 and the connections 70, 71, 72. These gates (175) enable the outputs from the register 60 to be transferred to the additional register (180) on occurrence of the clock pulses. The additional register (180) is reset by the output from the delay line so that its outputs indicate the number of vehicles which have passed during the predetermined time, such as ten seconds.