Patent GB-986280-A (GB)
Title: Improvements relating to multiplex transmission systems
Inventor: BARTLETT CHARLES JOHN CLIFFORD
IPC: H04J3/06
Filed: 1962-10-26
Abstract: 986,280. Multiplex pulse code signalling. ASSOCIATED ELECTRICAL INDUSTRIES Ltd. Oct. 17, 1963 [Oct. 26, 1962], No. 40604/62. Heading H4L. In a multiplex pulse code modulation system in which to provide a bipolar pulse train binary " 0 " is transmitted as the absence of a pulse and binary " 1 " is transmitted as a pulse but with successive pulses alternating in polarity and synchronizing signals are interleaved with the p.c.m. pulses, a synchronizing pulse is distinguished from the p.c.m. pulses by being a pulse of the same polarity as the immediately preceding p.c.m. pulse. Transmitter, Fig. 1. Incoming signals are supplied to a coder CR controlled by pulses KA1 at the digit repetition frequency. If a pulse appears at the output of the coder it sets a bi-stable circuit A which applies an output via a gate G1 to a gate G2. Pulses KA2 of the same repetition frequency but delayed with respect to the pulses KA1 are supplied to the gate G2 and the next pulse KA2 will be passed via the gate G2 to reset the bi-stable circuit A. It is assumed that a bi-stable circuit B is in its " set " condition producing an output on lead L14 so that when bi-stable circuit A is reset the bi-stable circuit B also is reset via gate G4. Thus a pulse is passed via gate G5 and applied to terminal X of an output circuit LCA to produce a positive pulse at the output Z. The next pulse at the output of the coder again sets the bi-stable circuit A and bi-stable circuit B is set via gate G3 so that a pulse is supplied via gate G6 to terminal Y to provide a negative pulse at output Z. When a synchronizing pulse is supplied by a generator SPG it is supplied via gate G1 to the gate G2 and the next pulse KA2 is passed via gate G2. Assuming that the output pulse immediately prior to the synchronizing pulse was negative, the bi-stable circuit B will be set and the bi-stable circuit A will have remained in its reset condition. Thus the pulse from gate G2 will be passed via gate G6 to produce a negative synchronizing pulse at output Z. Receiver, Fig. 2. The input circuit LCB produces pulses at output T7 corresponding to the positive pulses and pulses of the same form at output T8 corresponding to the negative pulses received, these pulses being supplied via gate G7 and digit frequency selector DFS to control pulse generating equipment PGE. The equipment PGE provides pulses KB1, KB2 (corresponding to pulses KA1, KA2) at the terminals T12, T10 respectively, and when its local oscillator is locked with the signal from DFS it supplies a signal at terminal T11. The gate G7 also supplies the unipolar pulses from LCB to a decoder DR which supplies the decoded signals to the respective channels and produces an " end-of-frame " signal at terminal T16. A bi-stable circuit C is arranged so that so long as pulses are produced alternately at terminals T7 and T8 of circuit LCB neither gate G8 nor G9 produces an output signal. When a synchronizing pulse is received, the resulting pulse at terminal T7 or T8 causes gate G8 or G9 to supply a signal to gate G10. When the apparatus is in synchronism the bi-stable circuit D is in its " set " condition so that no output appears on lead L51 and gate 16 does not supply inhibiting signals to gates G12, G13. In this case each end-of-frame signal from terminal T16 supplied to gate G15 coincides with an inhibiting signal from gate G10, and a delay DE prevents the "end-of-frame" signal from coinciding with the signal from gate G10 at gate G14. If the receiver goes out of synchronism the gate G15 produces an output to reset bi-stable circuit D to inhibit the gates G12, G13 and cause the decoder to remain temporarily in its " end-of-frame " condition. When a synchronizing signal causes a signal to be applied to gate G14 at a time when it is also receiving inputs from gate G11 and delay DE, the bi-stable device D is returned to its " set " condition so that the inhibiting inputs are removed from gates G12, G13.