baber/WOPTO huggingface dataset:
Patent TW-202332288-A (TW)
Title: Voice screen with tri-band audio characterized in that the voice screen with tri-band audio can generate high-range, mid-range and low-range sounds, thereby improving the practicality
Inventor: Xie yi-yun
IPC: H04R5/02
Filed: 2022-01-27
Abstract: The present invention provides a voice screen with tri-band audio, including: a screen housing, wherein, the front side of the screen housing is provided with a display screen, the rear side thereof is provided with at least one back board, and an inner vocal space is defined by the display screen and the back board; at least one mid-range/high-range sound source generating module electrically connected to a frequency divider, received in the inner vocal space and arranged on the display screen; and at least one low-range sound source generating module electrically connected to the frequency divider, received in the inner vocal space and mutually assembled with the back board. When the frequency divider receives a sound signal, the frequency divider transmits the mid-range and high-range sound signals to the mid-range/high-range sound source generating module. And, the mid-range/high-range sound source generating module vibrates and drives the display screen to generate mid-range sound source and high-range sound source. In addition, the frequency divider transmits the low-range sound signal of the sound signal to the low-range sound source generating module, and the low-range sound source generating module generates the low-range sound source.
Patent TW-202309902-A (TW)
Title: Memory circuits
Inventor: WANG YIH
IPC: G11C16/26
Filed: 2022-02-14
Abstract: A memory circuit includes a plurality of bitcells coupled to a plurality of bitlines, a plurality of wordlines, a plurality of source lines, and a control line. A first of the bitcells and a second of the bitcells are coupled to a first of the bitlines. The first bitcell is coupled to a first of the source lines. The second bitcell is coupled to a second of the source lines. The first source line is different from the second source line.
Patent TW-202241659-A (TW)
Inventor: THANU RAJKUMAR
IPC: B25J9/02
Filed: 2022-02-22
Abstract: 提供一種具有可變端效器間距之機器人裝置，其適合於適應（例如）兩個相鄰處理腔室之間或兩個相鄰裝載閘腔室之間的變化間距。機器人裝置可在雙基板搬運模式、單基板搬運模式或其組合下操作。機器人裝置亦可為離軸機器人。描述根據各種實施例之多種機器人裝置、包括此些機器人裝置之電子元件處理系統，及其使用方法。
Patent TW-202336317-A (TW)
Title: 皮件的製作方法
Inventor: WANG SHUI-MU
IPC: D06N3/00
Filed: 2022-03-03
Abstract: 一種皮件的製作方法，皮件包含撓性皮，皮件的製作方法包含以下步驟。提供皮件前驅物，皮件前驅物包含聚合物料。依序疊設離型件、皮件前驅物及加壓件以形成疊置組合，其中離型件及加壓件的其中至少一者形成有複數個通氣口。對疊置組合加熱及抽真空，使聚合物料形成撓性皮，而使皮件前驅物形成皮件。將皮件與離型件及加壓件分離。
Patent TW-202301646-A (TW)
Title: A 3dic device and forming the same
Inventor: CHUANG HARRY-HAK-LAY
IPC: H01L27/115
Filed: 2022-03-10
Abstract: In some embodiments, the present disclosure relates to a device that includes a silicon-on-insulator (SOI) substrate. A first semiconductor device is disposed on a frontside of the SOI substrate. An interconnect structure is arranged over the frontside of the SOI substrate and coupled to the first semiconductor device. A shallow trench isolation (STI) structure is arranged within the frontside of the SOI substrate and surrounds the first semiconductor device. First and second deep trench isolation (DTI) structures extend from the STI structure to an insulator layer of the SOI substrate. Portions of the first and second DTI structures are spaced apart from one another by an active layer of the SOI substrate. A backside through substrate via (BTSV) extends completely through the SOI substrate from a backside to the frontside of the SOI substrate. The BTSV is arranged directly between the first and second DTI structures.
Patent TW-202245004-A (TW)
Title: Substrate processing method and substrate processing apparatus
Inventor: SUMI NORITAKE
IPC: H01L21/08
Filed: 2022-03-21
Abstract: A substrate processing method according to the present invention comprises: a supercritical processing step for introducing a processing fluid into an internal space of a chamber housing a substrate, and processing the substrate using the processing fluid in supercritical state; a depressurizing step for discharging the processing fluid and depressurizing the internal space; an unloading step for unloading the substrate from the chamber; and a temperature adjusting step for adjusting the temperature of the internal space to a target temperature through introduction and discharging of the processing fluid into and out of the internal space from which the substrate has been unloaded. With the method, which relates to a technique for processing a substrate using a processing fluid in supercritical state in a chamber, it is possible to appropriately manage the temperature in the chamber after processing, and particularly to obtain stable processing efficiency when a plurality of substrates are processed in sequence.
Patent TW-202300454-A (TW)
Title: Silicon carbide powder, composition using same, and method for manufacturing silicon carbide powder
Inventor: MUTO MASARU
IPC: C01B32/984
Filed: 2022-03-22
Abstract: A silicon carbide powder according to the present invention is an aggregate of silicon carbide particles containing the element nitrogen. If the powder is measured in a region down to the depth of 12 nm from an outermost surface by X-ray photoelectron spectroscopy, an integral value of a ratio of a detection intensity of the element nitrogen to a total detection intensity of the element carbon and the element silicon is 0.05 or greater. Moreover, the slope of a change in the ratio thereof is -0.0008 or less. A specific surface area measured using nitrogen is preferably 5 m2/g to 40 m2/g. Furthermore, the 50% particle diameter D50 in a quantity distribution measured by observation with a scanning electron microscope is preferably 50 nm to 1000 nm. The present invention also provides a method for manufacturing the silicon carbide powder.
Patent TW-202247351-A (TW)
Inventor: HARADA NOZOMU
IPC: G11C11/401
Filed: 2022-03-22
Abstract: 本發明係設有與豎立於基板1上之Si柱2的底部相連的N + 層3a、以及與Si柱2的頂部相連的N + 層3b。N + 層3a與N + 層3b，當其中一者為源極時，另一者為汲極。並且，Si柱2的N + 層3a與N + 層3b之間成為通道區域7。而且，形成有圍繞該Si柱2之下部的第一閘極絕緣層4a、與圍繞Si柱2之上部的第二閘極絕緣層4b。此第一閘極絕緣層4a、第二閘極絕緣層4b係分別與作為此源極、汲極之N + 層3a,3b接觸或是靠近。而且，圍繞此第一閘極絕緣層4a而形成有第一閘極導體層5a、第二閘極導體層5b。並且，第一閘極導體層5a、第二閘極導體層5b係分離且圍繞此第一閘極絕緣層4a而形成。並且，形成有圍繞第二閘極絕緣層4b的第三閘極導體層5c。藉此，形成動態快閃記憶單元。
Patent TW-202244206-A (TW)
Title: Color pencil lead, method for manufacturing color pencil lead, and refill product comprising color pencil lead and refill case in which same is accommodated
Inventor: KANBAYASHI HIRONOBU
IPC: B43K19/18
Filed: 2022-03-29
Abstract: To provide: a color pencil lead having exceptional color development and erasability of writing, a smooth feel, and exceptional storage stability; a method for manufacturing a color pencil lead; and a refill product comprising a color pencil lead and a refill case in which the same is accommodated. The color pencil lead according to the present invention includes: a porous lead body that contains a body material, an inorganic binder, a coloring agent, and a high-boiling-point organic solvent having a boiling point of 250 DEG C or higher; and a refractory liquid with which the pores of the porous lead body are filled. The color pencil lead includes bringing a coloring agent solution that contains a coloring agent and a high-boiling-point organic solvent into contact with a porous lead body obtained through firing, furthermore bringing the coloring agent into contact with an insoluble refractory liquid, and filling the voids in the porous lead body with the refractory liquid. The refill product according to the present invention comprises the color pencil lead and a case.
Patent TW-202304199-A (TW)
Inventor: LIU SEAN SHENG-YING
IPC: H04N13/324
Filed: 2022-04-01
Abstract: 本發明針對一種從單視像影像創造多視像影像的多視像影像創造系統和創造方法。創造多視像影像包含導入單視像影像並且將單視像影像指派給合成多視像影像的第一多視像影像圖層。創造多視像影像進一步包含：將單視像影像複製到第一多視像影像圖層的複數個視像影像中；將第一多視像影像圖層的深度設定基於視像影像的序號轉換為對應視像影像的複數個偏移值；以及根據對應偏移值來偏移第一多視像影像圖層的視像影像；複數個多視像影像圖層可以在多視像顯示器上以預定義順序自動成像為合成多視像影像。
Patent TW-202308212-A (TW)
Title: Header cap of battery and assembly method thereof
Inventor: LIN HUNG-WEI
IPC: H01M50/147
Filed: 2022-04-14
Abstract: A header cap of the battery and an assembly method thereof are disclosed. The header cap of the battery includes a battery, a battery header, an insulating sleeve and a header cap. The battery includes a battery body and a battery case. The battery case has a groove near the opening of the battery case. The battery header is disposed at the opening of the battery case. The metal surface of the battery header is covered by the insulating sleeve. The header cap includes an electrode plane and a sidewall. The electrode plane has a cap opening to expose the metal electrode and the electrode plane is disposed on the insulating sleeve. The sidewall covers the end of the battery case and the end of the side wall is embedded into the groove. The structure provides the support of the header cap support and the insulation protection, and also enhances the sealing of the case.
Patent TW-202308972-A (TW)
Inventor: WOLTERS JOOST ROBERT
IPC: C07C31/20
Filed: 2022-04-15
Abstract: 本發明描述一種自含氨基甲酸乙酯之聚合物製造多元醇(polyhydric alcohol)之方法。該方法首先提供一種反應混合物，其包含該聚合物；包含可與該聚合物反應以使該聚合物解聚之聚醇(polyol)之溶劑；及包含觸媒顆粒之觸媒。該聚合物藉由與該聚醇反應而於該反應混合物中解聚以產生該多元醇。另一步驟使含該多元醇產物之該反應混合物分離成含該多元醇之上層產物相及主要含該聚醇及該觸媒之另一下層相。自該另一相回收觸媒，同時自該產物相回收該多元醇產物。
Patent TW-202328132-A (TW)
Title: ＰＩ３Ｋδ／γ雙重抑制劑化合物的半富馬酸鹽結晶及其製備方法
Inventor: Guo Zhen Rong
IPC: C07D473/34
Filed: 2022-04-15
Abstract: 本發明涉及一種PI3Kδ/γ雙重抑制劑化合物(S)-2-(1-(9H-嘌呤-6-基氨基)丙基)-3-(3-氟苯基)-4H-色烯-4-酮化合物的半富馬酸鹽結晶及其製備方法。本發明的結晶在物理性質和藥效/藥代動力學方面具有更優異的性質。
Patent TW-202300687-A (TW)
Inventor: AYDIN AYKUT
IPC: C23C16/513
Filed: 2022-04-20
Abstract: 示例性沉積方法可包括將含硼前驅物輸送到半導體處理腔室的處理區域。方法可包括以含硼前驅物輸送含摻雜劑前驅物。含摻雜劑前驅物可包括金屬。方法可包括在半導體處理腔室的處理區域內形成所有前驅物的電漿。方法可包括在設置在半導體處理腔室的處理區域內的基板上沉積摻雜硼材料。摻雜硼材料可在摻雜硼材料中包括大於或約80at.％的硼。
Patent TW-202313631-A (TW)
Inventor: SEAMON KYLE
IPC: C07D498/18
Filed: 2022-05-25
Abstract: 本揭示案係關於抑制RAS蛋白之方法。本揭示案亦含治療癌症之方法。
Patent TW-202307962-A (TW)
Title: Method of forming semiconductor device
Inventor: HO PO-KANG
IPC: H01L29/41
Filed: 2022-07-05
Abstract: A method includes forming a fin protruding from a semiconductor substrate; forming a dummy gate stack over the fin, wherein forming the dummy gate stack includes depositing a layer of amorphous material over the fin; performing an anneal process on the layer of amorphous material, wherein the anneal process recrystallizes the layer of amorphous material into a layer of polycrystalline material, wherein the anneal process includes heating the layer of amorphous material for less than one millisecond; and patterning the layer of polycrystalline material; forming an epitaxial source/drain region in the fin adjacent the dummy gate stack; and removing the dummy gate stack and replacing the dummy gate stack with a replacement gate stack.
Patent TW-202309512-A (TW)
Title: Optically transparent stacked body inspecting method and inspecting device
Inventor: SHIZEN KOJI
IPC: G01N21/892
Filed: 2022-07-25
Abstract: Provided is an optically transparent stacked body inspecting method with which it is possible to detect markedly smaller foreign matter than with a conventional method. An optically transparent stacked body inspecting method according to an embodiment of the present invention includes detecting a defect in an optically transparent stacked body comprising sheets, by performing a transmission inspection in a state in which four sides of the optically transparent stacked body are gripped and fixed in midair. In one embodiment, the inspecting method additionally includes imparting tension to the optically transparent stacked body. In one embodiment, the inspecting method detects defects having a size of 8 [mu]m to 50 [mu]m in the optically transparent stacked body. In one embodiment, the thickness of the optically transparent stacked body is at most equal to 300 [mu]m.
Patent TW-202331953-A (TW)
Title: Semiconductor package structure and method for preparing same
Inventor: CHUANG LING-YI
IPC: H01L23/28
Filed: 2022-08-03
Abstract: Embodiments of the present disclosure provide a semiconductor package structure and a method for preparing the same. The semiconductor package structure includes: a substrate; a first semiconductor chip located on the substrate, the first semiconductor chip having a first surface that is bare and the first surface having a silicon-containing surface; second semiconductor chip structures located on the first surface of the first semiconductor chip, the second semiconductor chip structures having second surfaces opposite to the first surface; a first package compound structure having a joint surface, the joint surface covering at least the first surface of the first semiconductor chip and the second surfaces of the second semiconductor chip structures. The joint surface has a silicon-containing surface.
Patent TW-202316734-A (TW)
Inventor: CLAVIJO SERGIO
IPC: H01Q1/36
Filed: 2022-09-14
Abstract: A waveguide antenna system, includes: an electromagnetic, EM, transition portion having a transition region having a signal feed interface and an open waveguide section, the EM transition portion configured to couple EM energy from the signal feed interface to a guided waveguide mode of EM energy to the open waveguide section via the transition region; and a leaky waveguide antenna portion configured and disposed to radiate electromagnetic energy received from the open waveguide section; wherein the EM transition portion is electromagnetically coupled to the leaky waveguide antenna portion, the EM transition portion being configured to support a transfer of electromagnetic energy from a signal feed structure to the leaky waveguide antenna portion.
Patent TW-202329346-A (TW)
Title: Semiconductor package having redistribution structure
Inventor: YOON Ok-Seon
IPC: H01L23/28
Filed: 2022-10-07
Abstract: A semiconductor package includes: a redistribution structure including a plurality of redistribution insulation layers, which are stacked, a plurality of redistribution line patterns on an upper surface and a lower surface of the plurality of redistribution insulation layers, and constituting a plurality of distribution layers at different vertical levels from each other, and a plurality of redistribution vias that penetrate at least one redistribution insulation layer of the plurality of redistribution insulation layers and are connected to some of the plurality of redistribution line patterns; and at least one semiconductor chip on the redistribution structure and electrically connected to the plurality of redistribution line patterns and the plurality of redistribution vias.
Patent TW-202323109-A (TW)
Title: Hinge comprising an unlocking member and folding bicycle
Inventor: POUPART FRANCOIS
IPC: B62K15/00
Filed: 2022-10-18
Abstract: A hinge (10) comprising a first tube portion (12) and a second tube portion (14) pivotable with respect to the first tube portion between an unfolded position and a folded position; a locking element (20) mounted pivotably to the first tube portion between a closed position in which it retains the second tube portion in the unfolded position and an open position in which it allows the displacement in the folded position of the second tube portion; an unlocking member (30) configured to bring the locking element from its closed position into its open position when it is placed in an active position; and a device (50) for actuating the unlocking member, configured to bring the unlocking member into the active position.
Patent TW-202334516-A (TW)
Title: 半導體處理之方法
Inventor: CANNONE JOEL L
IPC: C25D21/04
Filed: 2022-10-19
Abstract: 數個半導體處理之範例方法可包括執行一電鍍操作於一電鍍系統的一容器中的一電鍍浴中的一半導體基板上。此些方法可包括從電鍍浴移除半導體基板。此些方法可包括關閉與來自電鍍系統的一第一排放道相關的一閥。此些方法可包括增加流至電鍍系統之一第二排放道的流動。第二排放道可與來自電鍍系統的容器的一排放通道相關。
Patent TW-202326844-A (TW)
Title: Wafer processing method capable of forming elements in areas divided by a plurality of intersecting predetermined dividing lines
Inventor: YAMAMOTO NAOKO
IPC: H01L21/304
Filed: 2022-12-12
Abstract: Provided is a wafer processing method for increasing the number of elements per wafer. A method for processing a wafer, which is a method for processing a wafer with elements respectively formed in areas divided by a plurality of intersecting predetermined dividing lines on the front side, includes: a laser processing groove forming step 1002, which irradiates a laser beam having an absorbing wavelength for the wafer to the front of the wafer to form a laser processing groove along a predetermined dividing line; and a cutting step 1005 performed after the laser processing groove forming step 1002 is implemented, in which the dicing blade is used to cut the wafer along the predetermined dividing line to split the wafer while the dicing blade cuts from the back of the wafer to the depth of the laser processing groove. The method also includes a thin film arrangement step, in which the thin film is adhered to the front side of the wafer and is filled in a laser processing groove, after performing the laser processing groove forming step and before performing the cutting step.
Patent TW-202326281-A (TW)
Inventor: LEE HYUNG-JOO
IPC: G03F1/26
Filed: 2022-12-13
Abstract: A blank mask, a photomask and a manufacturing method of a semiconductor component are provided. The blank mask according to an embodiment includes a light-transmitting substrate, and a light-shielding film disposed on the light-transmitting substrate. The light-shielding film includes a first light-shielding layer and a second light-shielding layer disposed on the first light-shielding layer. The second light-shielding layer includes at least one of a transition metal, oxygen, and nitrogen. A reflectance of a surface of the light-shielding film with respect to light having a wavelength of 193 nm is 20% or more and 40% or less. A hardness value of the second light-shielding layer is 0.3 kPa or more and 0.55 kPa or less. In this case, when performing a high-sensitivity defect inspection on the light-shielding film surface, the accuracy of the defect inspection can be improved, and generation of particles can be effectively suppressed during the patterning process.
Patent UA-40835-A (UA)
Title: Method for producing antiblocking urea formaldehyde additive to urea
Inventor: MASLOSH VOLODYMYR ZINOVIIOVYCH
Filed: 2000-07-17
Abstract: A method for producing antiblocking urea formaldehyde additive to urea by condensation of urea and formaldehyde at a molar ratio of 1:(5.1 – 6.0) respectively, temperature of 92-95 ºC, pH at the first stage of 8.5-11.0 during two hours, then - at pH of 4.5-4.9 during one hour with subsequent neutralization and vacuum-drying at the temperature of 65-70 ºC up to achieving Kp 1.478-1.486.
Patent UA-41165-A (UA)
Title: Method of decreasing contamination of animal husbandry production with cesium-137
Inventor: ROMANOV LEONID MAKSYMOVYCH
Filed: 2001-03-14
Abstract: The invention relates to agriculture, to radioecology in veterinary medicine. A method of decreasing contamination of animal husbandry production with cesium-137 provides introduction to standard mixed fodders of fodder mix with radioprotective properties. Decrease in concentration of cesium-37 up to admissible levels in milk and meat of cattle is reached by introduction to standard mixed fodders of such preparation as ferocin in concentration of 0.6 % and feeding it in a doze of 1 kg a day.
Patent UA-50075-A (UA)
Inventor: KALIAKIN DMYTRO VIKTOROVYCH
Filed: 2001-06-14
Abstract: ⁁慣摲湡猠牰湩祧猠慨瑦栠獡琠敨攠摮⁳潣湮捥整⁤潴攠捡⁨瑯敨⁲楷桴愠⁮湩整浲摥慩整渠摯⁥楷桴漠瑵牥愠摮椠湮牥戠獵楨杮ⱳ椠据畬楤杮猠牰湩祧攠敬敭瑮⹳䄠⁴桴⁥数楲敭整⁲景挠湯慴瑣猠牵慦散⁳景琠敨戠獵楨杮⁳潨獵湩獧漠⁦潣楮慣⁬桳灡⁥牡⁥牰癯摩摥‬湩眠楨档猠牰湩祧攠敬敭瑮⁳牡⁥汰捡摥‬慥档漠⁦桴獯⁥慨⁳⁡敭慴⁬畢桳湩⁧景猠浡⁥潣楮慣⁬桳灡ⱥ眠瑩⁨湩敮⁲楦汬湩⁧景爠扵敢Ⱳ眠瑩⁨潰獳扩汩瑩⁹景搠獩汰捡浥湥⁴湡⁤楦慸楴湯椠⁮楧敶⁮潰楳楴湯മ
Patent UA-47691-A (UA)
Title: Еlectronic device for collecting bee venoms
Filed: 2001-07-20
Abstract: An electronic device for collecting bee venoms includes two generators, two amplifiers, a container for collecting the venoms with microphones, a startup scheme, a hand-controlled resistor, an electrically controlled resistor, a counter, a memorizing device, a waiting multivibrator and two conductors placed in the container for collecting the venoms, set on the hive.
Patent UA-51371-A (UA)
Inventor: TKACHOV ANATOLII IVANOVYCH
Filed: 2002-03-05
Abstract: 桔⁥牰灯獯摥愠瑬牥慮楴杮搭物捥⵴潶瑬条⁥潣癮牥整⁲潣瑮楡獮琠潷瀠渭瀭琠慲獮獩潴獲‬潬摡湩⁧汥浥湥獴‬湡⁤⁡牰浩牡⁹潰敷⁲畳灰祬甠楮⹴吠敨戠獡獥漠⁦潢桴琠敨琠慲獮獩潴獲愠敲挠湯敮瑣摥琠杯瑥敨⹲吠敨挠汯敬瑣牯漠⁦桴⁥楦獲⁴牴湡楳瑳牯椠⁳潣湮捥整⁤潴琠敨挠汯敬瑣牯漠⁦桴⁥敳潣摮琠慲獮獩潴⁲楶⁡桴⁥楦獲⁴潬摡湩⁧汥浥湥⹴吠敨攠業瑴牥漠⁦桴⁥敳潣摮琠慲獮獩潴⁲獩挠湯敮瑣摥琠⁯桴⁥楦獲⁴整浲湩污漠⁦桴⁥敳潣摮氠慯楤杮攠敬敭瑮‮摁楤楴湯污祬‬桴⁥潣癮牥整⁲潣瑮楡獮愠琠慲獮潦浲牥眠瑩⁨⁡牰浩牡⁹楷摮湩⁧湡⁤⁡敳潣摮牡⁹楷摮湩Ⱨ眠楨档椠⁳楤楶敤⁤湩潴琠潷栠污ⵦ楷摮湩獧眠瑩⁨桴⁥潣浭湯挠湯敮瑣潩⁮潰湩ⱴ愠摮琠潷搠潩敤⹳吠敨映物瑳琠牥業慮⁬景琠敨猠捥湯慤祲眠湩楤杮椠⁳潣湮捥整⁤潴琠敨攠業瑴牥漠⁦桴⁥敳潣摮琠慲獮獩潴⁲楶⁡桴⁥楦獲⁴楤摯⹥吠敨猠捥湯⁤整浲湩污漠⁦桴⁥敳潣摮牡⁹楷摮湩⁧獩挠湯敮瑣摥琠⁯桴⁥浥瑩整⁲景琠敨映物瑳琠慲獮獩潴⁲楶⁡桴⁥敳潣摮搠潩敤‮桔⁥整浲湩污漠⁦桴⁥潣浭湯挠湯敮瑣潩⁮潰湩⁴獩挠湯敮瑣摥琠⁯桴⁥楦獲⁴整浲湩污漠⁦桴⁥敳潣摮氠慯楤杮攠敬敭瑮‮桔⁥整浲湩污⁳景琠敨瀠楲慭祲眠湩楤杮愠敲挠湯敮瑣摥琠⁯桴⁥整浲湩污⁳景琠敨瀠楲慭祲瀠睯牥猠灵汰⁹湵瑩മ
Patent UA-54222-A (UA)
Title: Device for pouring of rimmer and semikilled steels for castings
Inventor: DUBYNA OLEH VIKTOROVYCH
Filed: 2002-06-14
Abstract: A device for pouring of rimmer and semikilled steel for the castings contains a narrowed downward ladle and metallic extension, working space of which is narrowed upwards. The thickness of the wall of extension is changeable on the height and in the plane of horizontal section of the top of extension is 1,05-2,2 times greater than the wall thickness in the plane of horizontal section of the bottom of the extension.
Patent UA-58005-A (UA)
Title: Microwave dielectric material based on barium, neodymium, and samarium titanates
Inventor: BILOUS ANATOLII HRYHOROVYCH
Filed: 2002-07-05
Abstract: The proposed microwave dielectric material based on barium, neodymium, and samarium titanates contains compounds BaCO3, Nd2O3, TiO3, and additionally, samarium oxide Sm2O3, lead oxide PbO, and calcium oxide CaO.
Patent AP-1606-A (AP)
Title: Antiprotozoal saponins.
Inventor: MAES LOUISE JULES ROGER MARIE
IPC: A61P33/02
Filed: 1999-12-15
Granted: 2006-05-03
Abstract: Saponins of formula (I), a stereoisomeric form thereof or a pharmaceutically acceptable addition salt thereof, wherein R1 to R12 have the meaning given in the description, can be isolated from plants of the family Myrsinaceae and used to decrease the infectiousness of and reduce the mortality associated with protozoan parasites of the genus Leishmania which are responsible for a group of conditions known as leishmaniases.
Patent DO-P2006000142-A (DO)
Title: Método para jugar póker
Inventor: BARSHACK LEONARD
IPC: A63F13/30
Filed: 2006-06-21
Abstract: The invention comprises multiple methods for playing a game of poker over a communication network such as the internet which are simple and easy to learn. In a first method, all participants place bets of equal value into a pot with no additional opportunities to raise or place additional bets. In a second method, players are provided with an option to place bets on various rules of winning, wherein bets are paid depending on the outcome of the three-card flop. In a third method, players are presented with timed intervals during which players can place a fixed bet into the pot to be eligible to stay in the hand. Significantly, all players decide whether to place additional bets simultaneously or during the same time interval rather than sequentially as is done in traditional versions of poker.
Patent DO-P2012000307-A (DO)
Title: Composiciones solidas
Inventor: HEITERMANN TANJA
Filed: 2012-12-07
Abstract: Composiciones sólidas que comprenden un compuesto lA lB, 1C o ID, o una sal farmacéuticamente aceptable de éste, en una forma amorfa. En una forma de realización, el compuesto lA, IB, lc o D, o una sal farmacéuticamente aceptable de éste, se formula en una dispersión sólida amorfa que comprende un polmero hidrofílico farmacéuticamente aceptable, y preferiblemente un agente tensioactivo farmacéuticamente aceptable.
Patent DO-P2014000030-A (DO)
Title: Procedimientos para la fabricación de medicamentos útiles para el tratamiento de infecciones virales
Inventor: WALKER JILL
IPC: A01N55/08
Filed: 2014-02-17
Abstract: La presente invención proporciona un procedimiento para la fabricación de medicamentos útiles para el tratamiento de Hepatitis C en un ser humano que lo necesite, el cual comprende un compuesto de las fórmulas (II) o (IIB) descrito en la presente, o una sal farmacéuticamente aceptable del mismo, en combinación con uno o más agentes terapéuticos alternativos para Hepatitis C.