baber/WOPTO huggingface dataset:
Patent JP-H111142-A (JP)
Title: Interior partitioning device of storing chamber
Inventor: KANDA YOSHIHIRO
IPC: B60P7/14
Filed: 1997-06-13
Abstract: PROBLEM TO BE SOLVED: To stably support a door body at the time of opening and closing the door body and easily lock an interior partitioning body by providing a supporting frame supporting the interior partitioning body on the ceiling part of a storing chamber, slidably guiding each door body via a guide member and oppositely forming an engagement recessed part which can be freely engaged/disengaged to/from the outer end edge of each door body on the inner surface of the storing chamber. SOLUTION: An interior partitioning body 10 is constituted of a pair of door bodies 11, 11 and a hinge 12 connecting the door bodies 11, 11. A packing 13 is fixed to the peripheral edge of an interior partitioning body. This interior partitioning body 10 is supported by a supporting frame 15. The supporting frame 15 is arranged so as to roll along guide rails 14, 14. Thus, each door body 11, 11 of the interior partitioning body 10 can be stably opened and closed and the interior partitioning body 10 can be extremely stably moved. On the inner surfaces of left and right side walls 2 of a load box 1, engagement recessed parts accepting the packing 13 of the interior partitioning body 10 and fixing the door bodies 11, 11 are provided. When the interior partitioning body 10 is fixed, the interior partitioning body 10 can be surely locked by the fitting of the packing 13 and the engagement recessed parts.
Patent JP-S6218988-A (JP)
Title: Speed controller for motor
Inventor: GOTO MAKOTO
IPC: H02P29/00
Filed: 1985-07-17
Abstract: PURPOSE:To largely reduce the irregular rotation of a motor by cancelling the detecting error of the rotating speed by correction data. CONSTITUTION:A speed control system and a phase control system are composed of a motor 11, the first pulse generator 12, a speed detector 13, the second pulse generator 14, a phase difference detector 16, a calculation compensator 21 and a power amplifier 18, and the rotating speed and phase of the motor 11 are controlled to the prescribed values. Switches SW1, SW2 are closed to measure the irregular rotation of one revolution of the motor 11. Then, the motor 11 is stopped, the second memory 25 is electrically separated from an arithmetic unit 22, a switch SW3 is closed to write the correction data of a correction data writer 33. Thereafer, a correction data forming unit 31 is not necessary, the switches SW1, SW2, SW3 are opened to separate the unit 31 from a speed controller.
Patent JP-H04233600-A (JP)
Title: Low-delay-code exciting-wire type prediction encoding for speech in 32 kb/s wide band
Inventor: ERITSUKU OODENTORITSUHI
IPC: G10L21/02
Filed: 1991-06-28
Abstract: PURPOSE: To efficiently encode and decode a signal including a speech by a method which communicates parameters of indexes of information over a com munication channel according to an input sequence by including a parqeter on which frequency correction of input information is reflected in parameters and making frequency corrections so that amplitude correction of specific fre quency and the total spectrum gradient are reflected. CONSTITUTION: The low-delay code excitation line type prediction (LD-CELP) proposed here to encode a 32 Kb/s wide-band speech preferably uses inverse LPC. The wide-band speech has data made unorganized to high level at a high frequency and the spectrum dynamic range is high, so it is difficult to encode it. The figure shows frequency response corrected as a result of the application of a typical practicing state.
Patent JP-S6313058-A (JP)
Title: Developer for electrostatic development
Inventor: NOGUCHI KOJI
IPC: G03G9/09
Filed: 1986-07-04
Abstract: PURPOSE:To stabilize image quality by incorporating a specific ratio of a carbon black and non-conductive black dye or black pigment as a coloring agent into a toner and incorporating magnetic particles and dispersant therein. CONSTITUTION:The semiconductive or insulating black coloring agent together with the generally used carbon black are used for the coloring agent. Such coloring agent is exemplified by metal-contg. azo dyes, nigrosine dye and aniline black. The satisfactory image density is not obtainable if the content of the carbon black is low and a decrease of the volumetric resistance of the toner by moisture absorption is resulted if the content is high; therefore, the content thereof is specified to a 1-5wt% range. The content of the other coloring agents is specified to a 2-9wt% range. The magnetic particles and dispersant are incorporated together with the coloring agent or in place of a part of the coloring agent in this case. The splashing property of the toner is prevented by the magnetic particles. The dispersant improves the dispersibility of the black pigment and magnetic particles and the flowability and flocculation resistance of the toner.
Patent JP-H10230067-A (JP)
Title: Pachinko information management and system for monitoring illegality
Inventor: ISHII KATSUHIKO
IPC: A63F7/02
Filed: 1997-06-02
Abstract: PROBLEM TO BE SOLVED: To easily discover a data alteration by providing the system with a general management computer for managing individual information of a pachinko machine and an aggregation replenishing computer for aggregating cash sales, card sales, the in/out of storage balls, etc., and outputting aggregated information through an inspecting box during business as necessary. SOLUTION: Multi-information display equipments 2 are arranged in the upper parts of the respective pachinko machines 1 in a store and the respective multi- information display equipments 2 are connected to the general management computer 3 and the aggregation replenishing computer 4 which are arranged in an indication managing room. Various kinds of sensors are arranged in the respective multi- information display equipments 2 so as to detect and monitor the operation states of the pachinko machines. Individual information such as starting numbers and the number of big hit times, etc., of the whole pachinko machines 1 is managed and recorded.  In the meantime, the aggregation replenishing computer 4 aggregates cash sales, card sales, the in/out of the storage balls, etc., connects an inspecting equipment to the inspecting box, reads aggregated information which changes from time to time and prevents the data alteration after closing the store.
Patent JP-H04356975-A (JP)
Title: Optically bistable element
Inventor: MORIMOTO MASAMICHI
IPC: H01L29/78
Filed: 1991-06-03
Abstract: PURPOSE:To provide an optically bistable element which can increase an extinction ratio, increase an incident light intensity range for realizing a bistable state, and improves stability of an operation and reliability, and to provide the bistable element which has high responding speed and low power consumption. CONSTITUTION:A MISFET having a negative resistance element 12 as an electric feedback element or a compound semiconductor substrate, is connected in series with a quantum well optical switch 11.
Patent JP-S5860073-A (JP)
Inventor: TAKADA TADAHIKO
IPC: D06M101/16
Filed: 1981-10-05
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S57145305-A (JP)
Title: Magnetic phase-shifter
Inventor: MEGURO TAKU
IPC: H01F29/14
Filed: 1980-11-11
Abstract: PURPOSE:To enhance a reliability and an economical efficiency of a magnetic phase-shifter by a method wherein an iron core excellent in an exciting current property and shock resisting property is obtained by using the core consisting of amorphous material for a saturable reactor. CONSTITUTION:A core consisting of an amorphous material is used for a saturable reactor constituting a magnetic phase-shifter. The amorphous material is weakened easily by a hot solution rapid cooling method and can be provided with various excellent properties through an appropriate heat treatment and a selecting of the composition. An exciting property also can be obtained by an appropriate selection. The exciting current property of amorphous core 5 of 0.022tFe70Ni8Si10B12, amorphous core 6 of 0.022t Fe73Ni8Si10B9 and armorphous core 7 of 0.024tFe72Co8Si5B15 are more preferable than those of other amorphous  materials 1-4 and they have the characteristic in the exciting current an show a specially high saturated current. According to such a constitution, the performance of the magnetic phase-shifter utilizing the aforesaid cores can be remarkably improved.
Patent JP-S6313347-A (JP)
Title: Manufacture of thin-film semiconductor device
Inventor: OOKAWANO SATOKO
IPC: H01L29/78
Filed: 1986-07-03
Abstract: PURPOSE:To obtain excellent electrical connection through an opening in a transparent conductive film by forming an silicon nitride film onto the transparent conductive film through a protective insulating film, shaping the opening section to the pattern of a gentle cross section and selectively applying and forming a conductive metallic film from the upper section of the silicon nitride film. CONSTITUTION:Chemical dry etching is conducted, using an insulating film 13 having an etching rate slower than a nitride film as a protective insulating film between a transparent conductive film 2 and an silicon nitride film 4. The silicon nitride 4 as an upper layer film progresses at a faster rate in etching, and etching advances in an isotropic manner because of chemical etching, thus acquiring the opening 8 of a wide-mouthed sectional pattern having a gentle inclination. Etching selectively progresses in response to substances in chemical etching, thus resulting in no damage to the transparent conductive film 2. Accordingly, the inside of the opening 8 is filled with the material of a conductive metallic film 17 for an interelectrode wiring optionally deposited and shaped from the upper section of the silicon nitride film 4 without any trouble, and the film 17 can be employed as an effective connection section to the transparent conductive film 2.
Patent JP-S5386491-A (JP)
Title: Conductor connecting method of single cored oil immersed cables
Inventor: SUZUKI SHIGERU
IPC: H02G15/24
Filed: 1976-12-27
Abstract: PURPOSE: To enable performing a connecting operation simply by decreasing an oil flow out from an end surface with facing a conductor end surface to upward at an operation to close between elementary wires gaps of a conductor end surface by welding. 
     COPYRIGHT: (C)1978,JPO&Japio
Patent JP-H097798-A (JP)
Title: Accelerating tube and accelerator
Inventor: AKIYAMA HIROSHI
IPC: H05H7/14
Filed: 1995-06-23
Abstract: PURPOSE: To obtain an accelerating tube which suppresses a dark current generated in the accelerating tube, and has a high electric field and little dark current. CONSTITUTION: When a high-frequency wave power 1 is inputted to the inside of an accelerating tube 20 through a waveguide 2 and a combined window 3, an accelerating high-frequency wave electric field shown in an electric line of force 5 is generated in an accelerating tube combining unit 4 by the high-frequency wave power 1. By the generated high-frequency wave electric field, electrons are drawn out and accelerated by the field emission from the metal of the inner wall surface of the accelerating tube 20, and the electrons strike to the inner wall of the accelerating tube 20 so as to generate the secondary electrons. As the material of the parts 4a, 22a, and the like of their striking, a material 9 whose secondary electron emission coefficient is smaller than '1' is used.  Consequently, the number of the generated secondary electrons is made fewer than the number of the striking electrons, and the breeding of the electrons can be suppressed.
Patent JP-H0322142-A (JP)
Title: Interruption control device for microprocessor
Inventor: YAMADA KAZUMI
IPC: G06F9/48
Filed: 1989-06-20
Abstract: PURPOSE:To accept an interruption request whose priority is maximum by making a highest interruption priority register hold the priority of the interruption request in the case where the priority of the interruption request is the priority higher than the priority outputted from the highest interruption priority register. CONSTITUTION:A first comparator 6 outputs an interruption generation signal to a microprocessor control part 8 in the case where interruption priority outputted from a synchronous register 3 or the interruption priority outputted from the highest interruption priority register 5 is the priority higher than the priority outputted from a control register 4. On the other hand, a second comparator 7 outputs a re-write signal to the highest interruption priority register 5 in the case where the priority outputted from the synchronous register 3 is the priority higher than the priority outputted from the highest interruption priority register 5. The highest interruption priority register 5 changes a value when both this re-write signal and a re-write permission signal outputted from the microprocessor control part 8 are active. Thus, it becomes possible to accept the interruption request whose priority is maximum.
Patent JP-H1013526-A (JP)
Title: Control circuit for voice switch
Inventor: FUJII KENSAKU
IPC: H04M1/60
Filed: 1996-06-19
Abstract: PROBLEM TO BE SOLVED: To prevent the production of howling by blocking echo circulation and to attain high speed changeover of a voice switch not attended with reception/transmission blocking with respect to the improvement of the control circuit for a voice switch used to build up a hand-free speech system. SOLUTION: The attenuation amount is controlled among a reception state, a transmission state, according to the presence of a voice signal, a reception reverberation state and a transmission reverberation state being intermediate states while being transited among them, and the attenuation of a transmitter side speech circuit in the case of transiting to the reception reverberation state is adjusted and controlled by referring to output of a circuit simulating the reverberation characteristic of a room.  It is controlled that a level of a leaked echo because of a small attenuation of the transmitter side adjusted by referring to an output of a circuit simulating the reverberation characteristic of a room and a receiver side signal level are compared and the voice switch is set to the transmission state when the former is higher and the the voice switch is set to the reception state when the latter is higher.
Patent JP-H0448572-A (JP)
Title: Thawing unit
Inventor: YOSHIDA AKIHIKO
IPC: B01D53/86
Filed: 1990-06-15
Abstract: PURPOSE:To remove the odor at the time of thawing by constituting a catalyst body with an electric heating element and a catalyst coating layer on its surface in a thawing unit having the deodorizing catalyst body. CONSTITUTION:When a nichrome heater wire 10 is excited, heat rays are radiated from the nichrome heater wire 10 in all directions. A catalyst coating layer 12 is installed to cover the whole outer periphery of a quartz tube 11, the heat rays radiated from the nichrome heater wire 10 in all directions are radiated to the catalyst coating layer 12, and the radiation heating of the catalyst coating layer 12 is efficiently performed. A catalyst heater heats the air nearby, thus a convection air stream is generated. When this air stream is brought into contact with the catalyst coating layer 12 heated to the activation temperature via the heating by the nichrome heater wire 10 or diffused into the coating layer 12, the odor component contained in the air near the catalyst heater is purified by the catalyst action.
Patent JP-H0450998-A (JP)
Title: Liquid crystal display device and driving method and driving device thereof
Inventor: FURUBAYASHI YOSHINORI
IPC: G02F1/133
Filed: 1990-06-15
Abstract: PURPOSE:To relieve the voltage distortions generated by display patterns and to allow high-grade display with lessened unequal display even with a large display-capacity panel by changing the changeover timing of the voltages impressed to the signal electrodes. CONSTITUTION:The signal electrodes of a liquid crystal panel 200 from which the signal electrodes are drawn out at every other piece are connected to two sets of signal electrode driving devices 201 and 202 and the signal voltage changeover control signals CVa and CVb inputted to the signal electrode driving devices 201 and 202 are separated. The changeover timing of the voltages impressed to the signal electrodes is changed at every prescribed signal electrode. The voltage distortions generated by the display patterns are relieved in this way and the high-grade display with the lessened unequal display is executed even with the large capacity panel in this way.
Patent JP-H107113-A (JP)
Title: Sterile packing method and continuous packing bag
Inventor: KUSHIOKA KOICHI
IPC: B65B55/08
Filed: 1996-06-19
Abstract: PROBLEM TO BE SOLVED: To provide a sterile packing method capable of sterilizing a packing bag without leaving a sterilizing liquid, etc., after sterilization. SOLUTION: A rolled-up body of a continuous packing bag comprising a large number of packing bags can be obtained by sealing a pair of continuous films. The rolled-up body is mounted in a supplying section 11. The continuous packing bag is let out from the rolled-up body of the supplying section 11. The continuous packing bag is irradiated with electron beam(EB) at an electron beam irradiation section 12 and the inside face and the outside face of the bag are sterilized. At a cutting section 13, the continuous packing bag is cut in the cross direction by a cutter so as to obtain packing bags. Thereafter, the packing bags are sent to a sterilizing filling chamber 15 and sealed after the packing bags are filled with contents in the sterilizing filling chamber 15.
Patent JP-H0696191-A (JP)
Title: Method for reconstituting three-dimensional image of object
Inventor: PIEERU GURANJIEETO
IPC: A61B6/03
Filed: 1993-06-04
Abstract: PURPOSE: To provide a method which reconstruct a three-dimensional image of an object defined by values obtained by functions on points of the object. CONSTITUTION: The sum of projections on a plane which are extracted from conical damping radiation passing an object 3 or radiation from the object due to conical sighting is operated. A two-dimensional detector array 4 is inclined at arbitrary angle ξ to the axis of revolution so that a mark in which an image will be reconstructed as the result of arbitrary selection is prescribed. After displacement parameters of the array and the conical radiation beam are measured, a formula is so introduced that the image may be reconstructed with a distortion limited. A position error as the result of a structure defect is taken into consideration in the operation after measurement. A parameter measuring protocol and an operation method accompanied with it are described.
Patent JP-H1013162-A (JP)
Title: Gate bias voltage-generating circuit
Inventor: NAKADA MINORU
IPC: H04B1/44
Filed: 1996-06-19
Abstract: PROBLEM TO BE SOLVED: To generate a stable gate bias voltage with a comparatively high level, without increasing the output of areference oscillator by increasing the level of a phase reference signal in an amplifier and an LC series resonance circuit and stabilizing the negative gate bias voltage in a constant voltage circuit. SOLUTION: The phase reference signal, generated in the reference oscillator 1, is amplified by the amplifier 2 and supplied to a PLL circuit and a rectifying circuit 4, inside a carrier wave oscillator 3 with the LC serial resonance circuit 6. The carrier wave oscillator 3 receives the phase reference signal which is amplified by the amplifier 2, generates the carrier wave signal with a frequency, corresponding to a desired channel and supplies it to a transmitting part 5. That is, the rectifying circuit 4 double voltage-rectifies a resonance signal which is supplied from the LC serial resonance circuit 6 and converts it into a negative D.C. voltage. The constant voltage circuit 7 voltage-stabilizes the negative D.C. voltage, applied from the rectifying circuit 4 and also adjusts the voltage, so as to apply it to the gate of FET 51 in the transmitting part 5 as the gate bias voltage.
Patent JP-H05113939-A (JP)
Title: Method and device for transferring data
Inventor: SUZUKI TOMOKO
IPC: G06F13/10
Filed: 1991-06-28
Abstract: PURPOSE:To apply the retry processing of the OS of a CPU to any type of I/O units in the same way in regard to a system where the data are transferred to the I/O unit from the CPU. CONSTITUTION:A data transfer circuit transfers the data to an I/O unit 3 from a CPU unit 1 via a bus 2. The unit 3 contains a 1st register 4 which is connected to the bus 2 and plural 2nd registers 5 which are connected to the register 4. Then the data received from the unit 1 are once stored in the register 4 and checked there. When no error of the data is checked, the data are directly transferred to one of registers 5. Thus the transfer of data is completed. When an error of data is detected, the data are not sent to any register 5.
Patent JP-H066566-A (JP)
Title: Facsimile equipment
Inventor: MASUO RIYOUSUKE
IPC: H04N1/32
Filed: 1992-06-17
Abstract: PURPOSE:To minimize waste of recording paper by printing out a transmission document printed out after the end of multiple address transmission onto the recording paper in the lump. CONSTITUTION:When multiple address transmission is implemented, a serial number (n) having been stored in a register A is stored in a register B. When a key entry section 3 is used for the operation of usual transmission, a CPU 13 discriminates it to be interrupt transmission and increments 1 to the serial number(n) stored in the register B and stores the result again to the register B. Through the processing above, the serial number(n) for succeeding multiple address transmission is counted. Then a FAX number with respect to an abbreviation number of the interrupt transmission is read and processed for the transmission and the communication result or the like is stored in each of areas 17a-17d of a communication management memory 17 after the end of transmission. Moreover, a multiple address communication flag in a multiple address communication storage area 17e remains '0'. Furthermore, in the case of the interrupt transmission, other serial number(n) than the serial number(n) for the multiple address transmission is given and stored in the serial number storage area 17a. After the communication document of the interrupt transmission is printed on the recording paper, when the transmission just before is the interrupt transmission, the FAX number corresponding to the serial number(n) incremented by one and stored in the register B is read and the multiple address transmission is repeated.