baber/WOPTO huggingface dataset:
Patent TW-439157-B (TW)
Title: Method for forming trench gate oxide layer
Inventor: JUNG YI-FU
IPC: H01L29/78
Filed: 1999-12-09
Granted: 2001-06-07
Abstract: A method is provide to alleviate the problem of having a thin trench gate oxide layer on the bottom corner of the trench, which comprises: first, providing a silicon substrate formed thereon a trench; next, applying a high density plasma chemical vapor phase deposition method to deposit a first oxide layer at the bottom of the trench; then, applying an etching back process to enable the first oxide layer at the bottom of the trench to maintain a thickness; applying a low pressure chemical vapor phase deposition method to deposit a second oxide layer and then performing an annealing process; then, applying an isotropic etching process to remove most of the second oxide layer but keep a small portion of second oxide layer at the corner of the trench and on the first oxide layer, thereby smoothing the corner of the corner of the trench bottom; and finally, applying a thermal oxidization process to form a third oxide layer on the sidewall of the trench for being used as a gate oxide layer.
Patent TW-478251-B (TW)
Title: Programmable delay element
Inventor: CHU ALBERT MANHEE
IPC: H03K5/13
Filed: 2000-02-21
Granted: 2002-03-01
Abstract: A programmable delay element having a fine delay circuit with fractional units of delay. The fine delay circuit has a fine delay circuit with a plurality of selectable delay paths, each delay path having an associated delay interval. The fine delay element is electrically-coupled to a data terminal for receiving and delaying an input signal. A control circuit is electrically-coupled to the fine delay circuit to select the delay path for the input signal. In a further aspect of the invention, the fine delay circuit is electrically-coupled to a coarse delay circuit having a plurality of selectable delay blocks in a repetitive block configuration. The coarse delay circuit is electrically-coupled to a second data terminal for receiving and inserting a second signal through said fine delay circuit. The control circuit is electrically-coupled to the selective delay path of the fine delay circuit and the coarse delay circuit such that either a fine delay, a coarse delay, or a coarse and a fine delay can be selected.
Patent TW-544511-B (TW)
Title: Helium-Neon laser light source generating two harmonically related, single-frequency wavelengths for use displacement and dispersion measuring interferometry
Inventor: SHULL WILLIAM A
IPC: H01L21/027
Filed: 2000-04-26
Granted: 2003-08-01
Abstract: The invention features a displacement and dispersion measuring interferometry system having a Helium-Neon laser light source. The light source can be a Helium-Neon laser that includes an intracavity doubling crystal and an intracavity etalon to generate two harmonically related, single-frequency wavelengths at sufficient powers for interferometric dispersion measurements. Alternatively, the light source can be a single-mode Helium-Neon laser that directs a single-frequency input beam into a resonant external cavity enclosing a doubling crystal to generate two harmonically related, single-frequency wavelengths at sufficient powers for interferometric dispersion measurements. In addition to dispersion measurements, the inherent wavelengths stability of the Helium-Neon source permits high-accuracy displacement measurements, Thus, the Helium-Neon laser light source is sufficient for the interferometry system to simultaneously measure displacement and dispersion, and correct the displacement measurement for air-turbulence using the dispersion measurement.
Patent TW-567363-B (TW)
Title: Method for driving electrooptical device, drive circuit, electrooptical device, and electronic device
Inventor: ISHII RYO
IPC: G09G3/20
Filed: 2000-05-12
Granted: 2003-12-21
Abstract: High-definition gray level display of the present invention is implemented by using high low level for the signal applied to a data line and by turning only on or off the drive of each pixel. When, for example, 8-level gray level display is implemented, one field (1f) is divided into seven sub-fields (Sf1-Sf7) according to the gray level characteristics of an electrooptical device. Conduction (ON) or non-conduction is controlled by writing H or L level to the first sub-field (Sf1). By writing H or L level to the sub-fields (Sf2-Sf7) corresponding to the gradation of pixels, the ratio of the on or off period of the pixel in one field is controlled.
Patent TW-472258-B (TW)
Title: Synchronous semiconductor memory device
Inventor: YAMAUCHI TADAAKI
IPC: G11C7/22
Filed: 2000-06-21
Granted: 2002-01-11
Abstract: A control signal generator, which decodes external control signals and generates internal control signals, is divided into a synchronous circuit and a timing adjustment circuit. The synchronous circuit includes latch circuits that respond to internal clock signals complementary to each other. It generates, in synchronization with the internal clock signals, state transition signals indicating operating modes. The timing adjustment circuit adjusts timings of the internal control signals with respect to rising or falling edges of these state transition signals. Thus, the design of the control signal generator is simple.
Patent TW-484321-B (TW)
Title: Image interpolation device
Inventor: ITO TOSHIMITSU
IPC: H04N7/01
Filed: 2000-07-13
Granted: 2002-04-21
Abstract: Out of a plurality of pairs of input pixels that face each other across a pixel to be interpolated, that pair which exhibits the highest correlation is selected. Assume that this pair is composed of a first and a second pixel, that the sign of the difference between the value of the input pixel lying adjacently on the left of the first pixel and the value of the first pixel is a, that the sign of the difference between the value of the input pixel lying adjacently on the left of the second pixel and the value of the second pixel is c, that the sign of the difference between the value of the input pixel lying adjacently on the right of the first pixel and the value of the first pixel is b, and that the sign of the difference between the value of the input pixel lying adjacently on the right of the second pixel and the value of the second pixel is d. If a=c or b=d, the average value of the values of the first and second pixels is determined as the value of the pixel to be interpolated.
Patent TW-557286-B (TW)
Title: Impregnated glass fiber strands and products including the same
Inventor: NOVICH BRUCE E
IPC: C08J5/08
Filed: 2000-07-29
Granted: 2003-10-11
Abstract: The present invention provides an at least partially coated fiber strand comprising a plurality of fibers, the coating comprising an organic component and lamellar particles having a thermal conductivity of at least 1 Watt per meter K at a temperature of 300K. The present invention also provides an at least partially coated fiber strand comprising a plurality of fibers, the coating comprising an organic component and non-hydratable, lamellar particles. The present invention further provides an at least partially coated fiber strand comprising a plurality of fibers having a resin compatible coating composition on at least a portion of a surface of at least one of said fibers, the resin compatible coating composition comprising: (a) a plurality of discrete particles formed from materials selected from non-heat expandable organic materials, inorganic polymeric materials, non-heat expandable composite materials and mixtures thereof, the particles having an average particle size sufficient to allow strand wet out; (b) at least one lubricious material different from said plurality of discrete particles; and (c) at least one film-forming material. The present invention also provides an at least partially coated fiber strand comprising a plurality of glass fibers having a resin compatible coating composition on at least a portion of a surface of at least one of said glass fibers, the resin compatible coating composition comprising: (a) a plurality of lamellar, inorganic particles having a Mohs' hardness value which does not exceed the Mohs' hardness value of said glass fibers; and (b) at least one polymeric material. The present invention further provides an at least partially coated fiber strand comprising a plurality of glass fibers having a resin compatible coating composition on at least a portion of a surface of at least one of said glass fibers, the resin compatible coating composition comprising: (a) a plurality of hollow, non-heat expandable organic particles; and (b) at least one lubricious material different from the at least one hollow organic particle.
Patent TW-519662-B (TW)
Title: Synchronous semiconductor memory device
Inventor: KOSUGI RYUICHI
IPC: G11C11/413
Filed: 2000-08-07
Granted: 2003-02-01
Abstract: A synchronous semiconductor memory device according to the present invention includes: a memory array circuit for performing reading/writing of data sent to or received at a data terminal with respect to a memory cell array; a write data retaining circuit and a write address retaining circuit for temporarily retaining write data and addresses corresponding to the write data, respectively; an address matching circuit for performing matching of an input address with addresses stored in the address retaining circuit; and a data path select circuit for outputting the write data temporarily stored in the write data retaining circuit to the data terminal according to the matching result. The address matching circuit is disabled during a clock cycle in which a writing operation is designated.
Patent TW-449867-B (TW)
Title: Planarization method for shallow trench isolation area
Inventor: WU JAU-JIUE
IPC: H01L21/76
Filed: 2000-09-04
Granted: 2001-08-11
Abstract: The present invention provides a planarization method for shallow trench isolation area which includes the following steps: first, providing a semiconductor substrate which in turn formed with a first shielding layer, a sacrificing layer and a second shielding layer and with shallow trench formed in the semiconductor substrate; next, entirely forming an insulation layer to fill up the shallow trench; planarizing the insulation layer and the second shielding layer to leave the second shielding layer with specific depth on the semiconductor substrate; etching away the residual second shielding layer and etching away the sacrificing layer to expose the first shielding layer; finally, planarizing the insulation layer in the shallow trench to make the height of the insulation layer almost the same as the first shielding layer. The inventive method can provide an excellent smoothness on the surface of shallow trench area and the final depth of the shallow trench area will be close to the designed depth.
Patent TW-446810-B (TW)
Title: High bandwidth recoiless microactuator
Inventor: CLEVELAND JASON P
IPC: G01Q60/00
Filed: 2000-09-19
Granted: 2001-07-21
Abstract: The bandwidth of a microactuator for a surface modification instrument or a surface measurement instrument is improved by inertially-balancing the microactuator to prevent the transfer of any net forces from the microactuator to its support structure by counteracting momentum generated upon operation of the microactuator, thereby inhibiting induced resonances in the support structure. Net force transfer prevention can be achieved using either (1) a multi-actuator assembly including a primary microactuator and a counteracting actuator operating substantially out-of-phase with respect to the primary microactuator, or (2) a single microactuator mounted on the microactuator's support structure so as to prevent momentum transfer to the support structure during microactuator operation. The instrument also preferably includes high internal damping to minimize the effect of any slight inertial misbalances on instrument operation.
Patent TW-488069-B (TW)
Title: Self-aligned non-volatile random access memory cell and process to make the same
Inventor: JOHNSON JEFFREY B
IPC: H01L29/792
Filed: 2000-12-06
Granted: 2002-05-21
Abstract: A self aligned method of forming a semiconductor memory array of floating gate memory cells in a semiconductor substrate has a plurality of spaced apart isolation regions on the substrate substantially parallel to one another. An active region is between each pair of adjacent isolation regions. The active and isolation regions are formed in parallel and in the column direction. In the row direction, strips of spaced apart silicon nitride are formed. A source line plug is formed between adjacent pairs of silicon nitride and is in contact with a first region in the active regions, and the isolation regions. The strips of silicon nitride are removed and isotropically etched. In addition, the materials beneath the silicon nitride are also isotropically etched. Polysilicon spacers are then formed in the row direction parallel to the source line plug and adjacent to the floating gates to form connected control gates. A second region is formed between adjacent, spaced apart, control gates. A bit line is formed in the bit line direction contacting the second region in the space between the control gates.
Patent TW-498208-B (TW)
Title: Data transmission control device and electron device
Inventor: SATO DAISUKE
IPC: G06F13/38
Filed: 2000-10-13
Granted: 2002-08-11
Abstract: The purpose of the present invention is to provide a data transfer control device and electronic equipment that make it possible to implement high-speed data transfer with reduced overhead processing of firmware and smaller hardware. A data transfer control device that conforms to the IEEE 1394 standard comprises an arbitration circuit that permits firmware (FW) transfer after the completion of one transaction (or one packet transfer) in the continuous packet transfer, if the CPU issues an FW transfer start command during the execution of continuous hardware transfer (HW transfer) processing by a SBP-2 core. If HWStart and FWStart signals go active together, the FW transfer has priority. A header area in RAM is divided into an ordinary header area and an HW header area, and an address generation circuit switches between generating addresses for the ordinary header area and addresses for the HW header area based on an HWDMARun signal from the arbitration circuit. A data area in RAM is divided into an ORB area and a stream area for the SBP-2 core.
Patent TW-507160-B (TW)
Title: Method for utilizing concurrent context switching to support isochronous processes
Inventor: FAIRMAN BRUCE
IPC: G06F9/46
Filed: 2000-10-18
Granted: 2002-10-21
Abstract: A method for utilizing concurrent context switching to support isochronous processes preferably comprises a main context that is configured to support system execution tasks, a first concurrent context that supports a first set of concurrent execution and loading procedures, and a second concurrent context that supports a second set of concurrent execution and loading procedures. A context control module preferably manages switching and loading procedures between the main context, the first concurrent context, and the second concurrent context. The context control module may perform successive concurrent context switching procedures by alternating between the first concurrent context and the second concurrent context to thereby sequentially support any desired number of isochronous processes.
Patent TW-505576-B (TW)
Title: Ink jet print head control circuit to proceed temperature compensation based on temperature measurement and analysis of ink dots distribution
Inventor: KAO CHIH-HUNG
IPC: B41J2/05
Filed: 2000-11-10
Granted: 2002-10-11
Abstract: The present invention provides an ink jet print head control circuit to proceed temperature compensation based on temperature measurement and analysis of ink dots distribution, the ink jet print head comprises plural ink chambers and plural corresponding heating devices, each ink chamber can accommodate ink and has a ink jet hole, the control circuit can generate a heating signal based on the plural printing data transmitted when the printing device proceeds the printing, and drive the plural heating devices based on the heating signal to provide energy for heating the corresponding ink chamber, and jets the ink from the ink jet hole to form the corresponding ink dots for printing. The control circuit comprises: a temperature measurement apparatus to measure the temperature of the ink jet print head and the plural ink chambers; a heat-accumulation weight value table to define the heat-accumulation weight value of the ink jet hole of the predetermined ink jet dot based on the position distribution between the ink jet hole of the predetermined ink jet dot and the adjacent ink jet hole of the predetermined ink jet dot; a computation module to calculate the heat-accumulation weight value of the ink jet hole of the predetermined ink jet dot all during each printing according to the computation method of the total weight value, and obtain the result of the computation of the total weight; and a processor to determine whether to generate a preheating signal or not according to the measured temperature by the temperature measurement apparatus and the computed result of the total weight, the computation circuit will provide preheating signal and heating signal to the corresponding heating device of the ink jet holes of all predetermined ink jet dots, so that the heating device can heat the ink chamber, and jets the ink from the ink jet hole for printing.
Patent TW-479098-B (TW)
Title: A solution for river pollution
Inventor: LIOU REN-RUEI
IPC: E02F7/00
Filed: 2000-11-20
Granted: 2002-03-11
Abstract: This invention of a solution for river pollution includes preparation procedure to make ready for pump and turbine. The installation procedures are included setting the turbine rigidly on riverbed and connected with the pump. And, the cleaning procedure is pumping some river water (or high pressure air) into the turbine for it to jet out compressed water (or high pressure air) to the river to stir the accumulation on the river bed, and the methane covered inside the accumulation up into the water for the flow to flush the accumulation and the air to dilute the methane.
Patent TW-473986-B (TW)
Title: Semiconductor-circuit arrangement and its production method
Inventor: HERZUM CHRISTIAN DR
IPC: H01L29/78
Filed: 2000-12-22
Granted: 2002-01-21
Abstract: This invention relates to a semiconductor-circuit arrangement with a circuit-element, which is integrated in a semiconductor-substrate (1) of the first conductive type and has at least one control-terminal (G1, G2) as well as a first (D) and a second electrode-terminal (S), where the first electrode-terminal (D) is constructed through a terminal-well, which is of the second conductive type and embedded in the semiconductor-substrate, and an under-well-region, which is of the second conductive type and located in the terminal-well. The under-well-region is doped higher than the terminal-well. This invention is characterized in that the under-well-region, which is of the second conductive type, formed in the main surface of the semiconductor-substrate and arranged to the first electrode-terminal (D), is ended before the well-region of the first conductive type of at least one control-terminal.
Patent TW-501123-B (TW)
Title: Optical recording medium and production method of the same
Inventor: KUNITOMO HARUO
IPC: G11B7/257
Filed: 2000-12-06
Granted: 2002-09-01
Abstract: The present invention relates to an optical recording medium having a protective layer and a phase-change recording layer on a substrate, said protective layer containing a metallic oxysulfide and an optical recording medium having a protective layer and a phase-change recording layer, said protective layer being formed by sputtering using a target comprising a metallic oxysulfide.
Patent TW-495372-B (TW)
Title: Adsorbent for dioxins
Inventor: HONDA KATSUHISA
IPC: B01D53/02
Filed: 2001-02-07
Granted: 2002-07-21
Abstract: Disclosed is an adsorbent for dioxins which is capable of enough removing dioxins in exhaust gas even with large amounts of tar components, being usable at high temperatures and capable of enough removing dioxins even at high temperatures. The adsorbent for dioxins contains at least one kind selected from among activated alumina, iron-type zeolite, aluminum-type zeolite, potassium-type zeolite and silica.
Patent TW-522408-B (TW)
Title: Method of handling a large structure in a reactor building
Inventor: AOKI MASATAKA
IPC: G21C13/00
Filed: 2001-02-13
Granted: 2003-03-01
Abstract: The present invention relates to a method of handling a large structure when a large component of a nuclear power plant (such as a rector pressure vessel, a large structure member in a reactor, etc) is replaced, or decommissioning of the nuclear power plant is conducted. The object of the present invention is to provide a handling method of large-sized structure within reactor building capable of significantly shortening the working process in the carrying-out or carrying-in work of a large-sized structure through an opening part provided on the roof of a reactor building. When the opening part is provided on the roof of the reactor building to carry out the large-sized structure within the reactor building through the opening part, a storage facility for executing the setting work of the opening part independently from the other work in the reactor building is provided on the roof prior to at least a part of the work of handling fuel within the reactor building and the work using an overhead crane.
Patent TW-I223942-B (TW)
Title: Contents transmission network system and creating method thereof
Inventor: LI WEI-MIN
IPC: H04L29/06
Filed: 2001-02-20
Granted: 2004-11-11
Abstract: A contents transmission network system comprises a communication network to provide the first node dedicated for subscriber's web access service, the second node dedicated for co-location service, the third node dedicated to connect the first node mainly for subscriber's web access with a cache server through the bandwidth exit, and to install a default route and VPN tunnel between the first node and second node. The cache server will store the information contents requested and transmitted. When the subscriber requests for an information, the system will firstly search the cache server; if the information is available, then the cache server forwards it directly to the subscriber; otherwise, the cache server raises information acquisition request to the second node through the VPN tunnel, and the default route transmits the acquired information to the subscriber, the cache server further records the host system data in association with the information transmission, thereby providing the second node to collect the payment from the client of the co-location service. The invention can solve the continuity issue of independent autonomous network to achieve the goal of independent network expansion.
Patent TW-515772-B (TW)
Title: Reclosable packaging bag and method for manufacturing same
Inventor: ICHIKAWA TOORU
IPC: B65D33/25
Filed: 2001-05-17
Granted: 2003-01-01
Abstract: A reclosable packaging bag comprises a main bag body having an opening portion and at least one heat-sealed portion; and a linear fastener provided on the opening portion of the main bag body. The linear fastener is provided along the opening portion of the main bag body by an insert injection molding so as not to extend to the heat-sealed portions. A method for manufacturing the bag comprises the three steps. First, the first and second linear fastening members are formed on a prescribed position of a sheet of film material by an insert injection molding so as to be spaced from each other. These fastening members are engageable with each other to form a linear fastener. Second, the sheet of film material is folded in two so that the fastening members can engage with each other. Third, each of opposite portions of the sheet of film material thus folded is heat-sealed to form side heat-sealed portions.