Patent GB-1314523-A (GB)
Title: Access-control equipment
IPC: G07C9/00
Filed: 1969-01-31
Abstract: 1314523 Releasable fastenings SMITHS INDUSTRIES Ltd 24 April 1970 [31 Jan 1969] 5303/69 Heading E2A [Also in Division G4] Access control equipment for selectively enabling access comprises a plurality of devices A, B, that are operated manually and individually, control means responding to a predetermined sequence of operation of the manually operable devices to enable access, and means 34 that is arranged to inhibit response of said control means if during operation of said manually operable devices in said sequence there is at any time less than a predetermined number of said devices operated. In the equipment shown the devices A and B are push buttons each of which carries permanent magnets 1 and 2, the magnets being associated with individual pairs of normally open reed switches 3, 4, 5 and 6. Depression of the push button A moves the magnet 1 to a position in which it closes the switches 3 and 4 and depression of the push button B moves the magnet 2 to a position in which it closes the switches 5 and 6; the switches 3 and 5 are connected in shunt with one another and to the negative pole of a battery 7 so that depression of either push button switches on the power supply to the control means and hence during operation of the device one or other of the buttons must be held depressed at all times otherwise response of the control means is inhibited. The sequence of operation is to first to depress the push button B; this first closes the switch 5 to connect the battery 7 to the control means and subsequently closes the switch 6; the application of power to the circuit via the switch 5 places both inputs of a nand gate 28 at logic 1 to open the gate and the gate remains open until the switch 6 is closed when one of its inputs goes to logic 0 and closes the gate. The opening of the gate 28 applies a pulse to a ring counter 19 to set the counter to a condition in which its 0 stage is in logic 0 condition and all its other stages are in logic 1 condition; the nand gate 28 via an inverter 29 also sets a register 16 to the condition in which all of its six stages are at logic 0. Closure of the switch 6 triggers a monostable circuit 10 to supply a negative-going pulse which is inverted in an inverter 13 and applied to a four-input nand gate 14; the nand gate 14 however remains closed since one of its inputs is connected to the 0 stage of the counter 19 which at this time is in the logic 0 state. Two milli-seconds after producing the negativegoing pulse, the monostable circuit 10 produces another negative going pulse which is applied to one input of a three-input nand gate 17; the other two inputs of the gate 17 are already at logic 1 since one of them is connected to the stage 7 of the ring counter 19 and the other is connected via an inverter to the output of the register 16, thus the gate 17 is opened by the trailing edge of the pulse from the monostable circuit and a pulse is applied to the counter 19 to step it from stage 0 to stage 1. The output of the gate 17 is also connected via an inverter 18 to a counter 11 and the opening of the gate causes the counter 11 to be reset to the binary count 111. The operator then holds the push button 1 depressed and depresses the push button A a number of times to signal the value in binary code of the first digit of a six-digit decimal combination; each depression of the push button A causes a monostable circuit 9 to supply a pulse via an inverter 12 to reduce the count of the counter 11 by unity and the resulting ones-complement count provided by the counter 11 is added in an adder 15 (without carry interconnections) to a binary number provided by a diode matrix which is energised by the ring counter 19; the counter 19 is at this time at its stage 1 so that the number provided by the matrix 20 is that appropriate to the first programmed digit; if the first digit has been signalled correctly the adder 15 produces an output 1111 and this opens a nand gate 21 which via an inverter 22 produces logic 1 at one of the inputs of the gate 14. Two other inputs of the gate 14 are connected to the stages 0 and 7 of the counter 19 and hence are at logic 1 and to open the gate 14 the operator holds the push button A down at the end of signalling the first digit and releases the push button B momentarily; the push button A being held down holds the switch 3 closed so that there is no interruption of the power supply from the battery and when the push button B is re-depressed the resulting negative-going pulse from the monostable circuit 10 via the inverter 13 opens the gate 14 and via an inverter 23 causes the register to shift to the right one step and to enter logic 1 into its first stage. The re-depression of the button B does not open the gate 28 since the holding of the push button A depressed holds one input of the gate 28 at logic 0. The second pulse from the monostable circuit 10 caused by the depression of the push button B and which occurs 2 milliseconds after the first pulse, operates as before to step the ring counter 19 from stage 1 to stage 2 and resets the counter 11 to the binary count 111. The button B is then held down and the button A is depressed the requisite number of times to signal the value of the second digit of the six digit combination with the circuit operating as described above. The procedure is repeated for all six digits and when the sixth digit has been completely signalled, the register 16 is then in the state in which all of its stages contain logic 1. The output of the register is directly connected to one input of a gate 24 and is also connected via an inverter to the gate 17 and hence when the output of the register is logic 1, logic 1 is applied to one input of the gate 24 and logic 0 to the gate 17 which closes the gate 17; when the sixth digit has been signalled, the push button A is held depressed as before and the push button B released and redepressed; this re-depression as previously sets the counter 11 to the 1111 state and moves the ring counter 19 from stage 6 to stage 7; stage 7 is then at logic 0 and this inhibits the operation of the gate 14; however the logic 0 from stage 7 is inverted in an inverter 30 to produce logic 1 as the other input of the gate 24 which therefore via an inverter 25 operates a catch release circuit 26 which results in the energization of a solenoid 27 of that circuit to release a catch which normally prevents a door bolt (not shown) from being operated. Energization of the solenoid 27 and release of the catch ceases immediately the operator releases the push button B since the switch 5 to the battery 7 then opens. Once the push button B has been released it is necessary to repeat the complete signalling operation before release of the catch is again obtained. This also happens if at any time during the sequence both push buttons A and B are released together. If during any sequence of operation of the push buttons A and B the digits signalled are different from the programmed combination then less than six stages of the register will contain the digit 0 and consequently the gate 24 does not open at the completion of the signalling and hence the catch is not released. No further signalling is effective after the ring counter 19 occupies state 7 since the gates 14 and 17 are inhibited when the ring converter is in this state. The diodes of the matrix may be connected to the matrix via reed switches which are opened and closed by moving individual magnets so that the combination can be changed as desired. Alternatively the diodes can be connected via plugs to a plug board. Two terminals of the catch release circuit 26 as shown are connected through a time controlled switch 32 which inhibits energization of the solenoid 27 until the time controlled switch is open. An alarm terminal 33 is provided for detecting tampering with the terminals 31 and a fuse link 34 is incorporated in the circuit 26 to prevent energization of the solenoid 27 via the terminals 31; it is stated that the push buttons A and B can be incorporated in the handle of a safe door to lie on its under surface facing the door so that their operation cannot readily be seen.