Patent GB-750577-A (GB)
Title: Improvements in or relating to electric pulse code modulation systems
Inventor: TREADWELL CYRIL GORDON
IPC: H03M1/00
Filed: 1954-07-12
Abstract: 750,577. Multiplex pulse code signalling. STANDARD TELEPHONES & CABLES, Ltd. July 12, 1954, No. 20295/54. Class 40 (5). Sample signal amplitudes are translated into groups of code digit pulses, compression of the sample amplitudes according to a given formula being effected during the translation process by effectively subtracting from the sample amplitude an amplitude which is a given function thereof. The formula is hyperbolic in the embodiment described. The invention is described as applied to the coder of Specification 750,578 and also in a complete multiplex communication system which includes the arrangements for signal expansion at the receiver. This system uses a binary pulse code in which the first digit indicates the polarity of the amplitude sample and the remaining digits its amplitude irrespective of polarity. The coder for these remaining digits uses the cyclic permutation code which is translated to the simple addition code before transmission. In order to produce amplitude compression, according to a hyperbolic law, in the coder of Specification 750,579, the fixed reference voltage is modified, during each coding cycle, by a voltage derived from the signal sample being coded by lengthening the sample pulse and deriving a fractional voltage therefrom by means of a potential divider, Figs. 1 to 4 (not shown). In the time division multiplex system transmitter, a delay line distributer controls channel units feeding two coders, one for the odd-numbered channel samples and the other for the even-numbered, which are connected to a mixer supplied also with wide synchronizing pulses and feeding a radio transmitter. The distributer and coders are controlled by a master pulse generator operating at 2 Mc/s. which supplies a source of coding pulses and an 8 Mc/s. pulse generator feeding the distributer, Fig. 5 (not shown). The channel units produce positive amplitudemodulated sample pulses from the channel signals, whatever their polarity, and only if they correspond to positive channel signal samples is a first digit pulse sent to the output mixer. The circuit of the channel units and a common buffer amplifier, for example for all the oddnumbered units, Fig. 7 (not shown), is described in Specification 750,579. The coder comprises an input lead 98, Fig. 8, supplying the positive amplitude-modulated sample pulses to the transformer 8, 148 and thence through the push-pull valves 144, 145 and output transformer 151 to the grid of valve 1. The sample pulse amplitude is modified, so that the required compression is produced by the coder, by applying it also through the cathode follower valve 154 to charge, for the duration of the coding, capacitor 324. The voltage thereacross multiplied by a predetermined factor, is fed subtractively by valve 155 to the grid of valve 1, through the secondary 153 of transformer 151. At the end of the coding period a positive rectangular timing pulse on lead 58 ceases, so that capacitor 324 discharges through rectifier 330 and valves 144, 145 are cut off. The remainder of the coding circuit including valves 1 and 2 is substantially as described in Specification 750,578. At the receiver, the odd- and evennumbered channels are separated by known methods and applied to separate decoders. Each decoder comprises a known binary decoder in which the first digit is lost, feeding an expander which is connected to a polarizer arranged to fix the polarity of its output pulse according to the presence or absence of a pulse from an initial digit separator. The channel output units are controlled by a delay-line distributer responsive to the synchronizing pulses, Fig. 10 (not shown). The initial digit separator comprises a gate valve fed with the incoming pulses and opened by a timing pulse occurring at the initial digit time. If the digit pulse is present it is fed to a flip-flop circuit producing an output pulse lasting for several digit periods, Fig. 11 (not shown). In the expander, the positive output pulses from the binary decoder on lead 197, Fig. 12, are applied through the cathode follower 231 to charge the capacitor 235 which has previously been discharged through valve 239 rendered conducting by a timing pulse on lead 170. The longer voltage pulse across capacitor 235 is applied to valve 252 and the corresponding negative voltage pulse at its anode is added at point 249 to a fixed voltage derived from a bias source 199. The resultant voltage charges a capacitor 248 through the inductor 250 and resistor 251 which are so dimensioned that the voltage across the capacitor rises linearly over the relevant time period. This rising voltage is applied to the grid of valve 265 whose cathode resistor 266 is common to valve 263. The voltage across the cathode resistor 254 of valve 252, which corresponds to the voltage across capacitor 235, is applied to the grid of valve 263. A multivibrator 267, 272 is triggered to one state by the negative pulse at the anode of valve 263, the rectifier 269 being momentarily conducting. After the grid of valve 265 has risen to such a potential that the common cathodes of valves 265, 263 have reached the grid potential of valve 263, the latter produces a positive anode pulse which triggers the multivibrator 267, 272 back to its initial state. A compressed duration-modulated pulse is thus produced at the anode of valve 267 and fed to the polarizer over lead 198. These pulses on lead 198, Fig. 13, are applied in parallel to valves 280, 281 the conductivity of which is alternatively controlled at their suppressor grids by the presence or absence of a pulse from the initial digit pulse separator over lead 295 applied to the transformer 294. The output pulses of these valves are of opposite polarity due to the inverting transformer 291 in the anode circuit of valve 281 and are together fed to cathode-follower stage 282. Between this and a further stage 283, supplying all the relevant channel units, are added longer positive pulses of fixed duration and amplitude to provide a positive D.C. component. These are supplied from the timing unit over lead 169 and transformer 301. Each channel unit comprises a gate valve 284 opened by distributer pulses supplied through circuit 312, 313, the gated signal pulses being applied to the utilization circuit 230 after removal of the pulse recurrence frequencies by a low-pass filter 315, and the D.C. component by transformer 316.