Patent GB-1284160-A (GB)
Title: Amplifier system
IPC: G01V1/24
Filed: 1970-08-10
Abstract: 1284160 Gain control TEXACO DEVELOPMENT CORP 10 Aug 1970 [4 Sept 1969] 38439/70 Heading H4R [Also in Division G4] In a system for converting input analogue signals g 1  . . . g n  (Fig. 1a) to floating point digital form, cascade connected D.C. coupled amplifiers B1, B2 ... B4 are selectively connected into circuit until the amplifier output triggers one of two threshold circuits H, I the number of amplifiers switched in representing the exponent of the digital signal and the output from the last amplifier switched in being digitized in an A/D converter to give the mantissa of the digital signal. The coded signals are recorded on magnetic tape. A negative feedback path is provided from the output of the last amplifier B4 to the input of the first B 1 and selectively switched in, under the control of feedback chopper switch, in out of phase relationship with the input so that when no measurement is being made and the input is earthed a signal corresponding to the drift of the cascade amplifiers is stored on a capacitor in an active filter M.N. in the feedback loop and fed back into the input of the amplifier out of phase with the drift to compensate first.  As described for digitizing signals from geophones the input may be fed through an input attenuator (Fig. 3, not shown) or by-pass it (under the control of a double pole single throw switch) to an input transformer which isolates the geophone from the input of an amplifier (A1) which amplifies the signal to overcome the input noise level of following filters. The amplification factor may be manually adjusted, the overall amplification being represented by binary signals (Y 1 , Y 2 , Y 3 ) which are fed to an exponent adder in control network J (Fig. 1a). The output of the first amplifier stage A which preferably has the same gain in all channels is fed to a bandwidth detector device D1 and via constant voltage source C1 (Fig. 5, not shown), which limits the input of the succeeding stage to prevent large signal overload, to the first of the cascade connected amplifiers B1. The devices B2, B3, B4 comprise non inverting operational amplifiers one input of which is connected to the input signal and one via a resistor (R2, Fig. 4, not shown) to earth, the gain being determined by resistors in the feedback loop. The device B1 is modified (Fig. 10, not shown) to receive at one end of the resistor (R2) the feedback path. In the embodiment of Fig. 1b (not shown) the feedback path is connected to an additional amplifier stage (P, Fig. 13, not shown) which provides a constant input impedance and is connected at its output to the first constant voltage source C 1 . The stage P comprises an operational amplifier with a gain of two in combination with resistors attenuating the gain by one-half. The devices D1, D2, ... D5 which link the outputs of amplifiers A, B ... B 2 , B 3 , B 4  to the threshold circuits H, I, via switches E1, E2 ... (Fig. 7, not shown) and amplifier transformer F comprise a phase compensation device, a gain calibration device to amplify or attenuate and an impedance transformer, a capacitor providing D.C. blocking (Fig. 6, not shown). The circuit may be modified (Fig. 6a, not shown) to give direct coupled D.C. amplification. The switches E (Fig. 7, not shown) preferably include F.E.T.'s. The switches E1 ... E5 of channel 1 are scanned sequentially the scanning being stopped when one of the two threshold circuits H, I which have the levels ŒV are triggered to enable an exclusive OR gate (Fig. 1c, not shown) in the digital control network J. The switch enabled when the threshold triggers is represented by the count in a switch counter the state of which is added to the amplification introduced by the stage A in an exponent register to give the three bit signal representing the exponent. Subsequent channels are then scanned sequentially. In a modification (Fig. 2a, not shown) of Fig. 1a the output of each channel is coupled to an associated transformer F each connected to a multiplexer having a common output connected to the threshold circuits H, I. The digital control network (J) simultaneously actuates the switches E 1  of all channels followed by the switches E2, E3, E4, E5, the multiplexer gating the signals out one at a time. Fig. 2b (not shown) is a similar modification of Fig. 1b.