Patent GB-1360004-A (GB)
Title: Overcurrent protective device
IPC: H02H3/08
Filed: 1971-04-20
Abstract: 1360004 Overcurrent protective arrangements WESTINGHOUSE ELECTRIC CORP 20 April 1971 [7 May 1970 (2)] 10063/71 Heading H2K [Also in Divisions G4 and H3] An overcurrent protective arrangement includes a current squaring circuit formed by means 230 for producing a voltage substantially proportional to the logarithm of the square of the current and means 240 responsive to this voltage for producing an output signal which is the antilogarithm of that voltage and so proportional to the square of the current, the output signal from the means 240 charging a capacitor C8, when permitted to do so by means 260, 290 on the current exceeding a predetermined value, until the capacitor is sufficiently charged to cause the operation of an output device. Fig. 2A shows a portion of an arrangement for protecting a three phase circuit, currents proportional to the line currents being rectified by rectifiers 50, 60, 70 having their D.C. output terminals connected in series so that their output is proportional to the highest line current and produces a voltage across a resistor R1. This voltage provides signal voltages V1, V2 and also charges a capacitor C6 which in conjunction with a shunt voltage regulator 140 comprising transistors Q1, Q2, Zener diodes Z1 Z2 and diodes D17, D18 provide the "power" supply for the protective arrangement. A control circuit 150 prevents operation of the arrangement until the charge on the capacitor C6 is adequate. Transistors Q5, Q8 provide a current signal proportional to the voltage across the resistor R1 for the squaring circuit 230, 240, in which silicon transistors Q6, Q7 produce between their bases a voltage V 0  proportional the logarithm of the input current from Q8. This voltage V 0  is applied as input signal to silicon transistors Q9, Q10 to provide an output current I 0  proportional to the square of the highest line current to charge the capacitor C8 when a level detector 260 causes a transistor Q17 to cease conducting so removing a shunt circuit from the capacitor. To obtain a long time delay, a pulse generating circuit 270 may control a further shunting transistor Q13 so that the output of the squaring circuit is shunted away from the capacitor except during brief periodic pulses. A further circuit element 250 permits operation of the squaring circuit only during those periodic pulses. A short delay tripping circuit 300 may be provided, this circuit comprising a level detector 310 which functions at a higher level of the voltage V1 than that at which the detector 260 functions, to permit a capacitor C12 to charge to provide a short fixed time delay. Instantaneous tripping may be effected by a circuit 400 in which a transistor Q20 is rendered conducting, when the voltage V1 reaches a still higher level, to produce a voltage drop across a resistor R34. The capacitors C8, C12 and the resistor R34 are connected through various isolating diodes to an output circuit, Fig. 2B (not shown) having transistor amplifiers, a trigger circuit and a silicon controlled rectifier to effect the energization of a circuit-breaker trip coil when the voltage across either capacitor C8, C12 or resistor R34 reaches a predetermined level. Reference is made to the use of an earth current transformer when earth fault protection is desired.