baber/WOPTO huggingface dataset:
Patent JP-S61207087-A (JP)
Title: Manufacture of piezoelectric device
Inventor: NAKAMURA TAKESHI
IPC: H01L41/22
Filed: 1985-03-11
Abstract: PURPOSE:To efficiently form an insulating protective film without using any special jig such as a mask and without being affected by precision of other processes such as formation of electrodes, by forming the insulating protective film with the protruded face of a piezoelectric thin film contacted with a flat surface. CONSTITUTION:A substrate 1 and a piezoelectric thin film 2 are curved with the piezoelectric thin film 2 into the protruded surface. The substrate 1 is overturned and arranged on a member 4 having a flat surface 3 such that the insulating thin film 2 is contacted with the flat surface 3. An insulating protective film 5 is formed on the substrate by a known thin film forming method. The insulating protective film 5 is formed not only on the back face but also on the side faces of the substrate and the periphery of the piezoelectric thin film 2. An electrode 6 is formed on the exposed part of the piezoelectric thin film 2 so that the periphery of the electrode 6 rides the insulating protective film 5. Accordingly, even if a mask for forming an electrode pattern is deviated in some way, it will not cause decrease in insulating resistance or short circuit because the piezoelectric thin film 2 is securely sealed by the insulating protective film 5 at its periphery also on the upper side thereof.
Patent JP-H01223761-A (JP)
Title: Semiconductor memory device
Inventor: EMA TAIJI
IPC: H01L27/11
Filed: 1988-03-02
Abstract: PURPOSE:To suppress a latch up phenomenon induced by an electric source noise and improve the reliability and integrity of SRAM cells by a method wherein specific delay circuits composed of resistors and capacitors are inserted between electric source sides and the branching points of the source wirings of a semiconductor memory device constituted by memory cells including a pair of CMOS inverters. CONSTITUTION:A delay circuit DVC composed of a resistor RFVC and a capacitor CV formed between the line and a substrate is inserted between the first feeding point Q1 in a cell array and a pad type VCC source terminal PVCC. Also, a delay circuit DVS composed of a resistor RVS and a capacitor CVS formed between the line and the substrate is inserted between the first feeding point Q2 of a high potential source trunk line MLVSS which, on one side end, bundles up grounding potential source VSS lines LVSS provided vertically between the columns of cells arranged vertically in the cell array. With this constitution, the rise of a noise voltage at the emitter of a parasitic bipolar transistor is made to be approximately equal to the rise of a noise voltage at the base of the parasitic bipolar transistor so that a high forward voltage which exceeds a forward potential difference of an emitter-base junction can not be induced between the emitter and base and the parasitic bipolar transistor can not be driven.
Patent JP-H08218151-A (JP)
Title: Austenitic stainless steel sheet for heat exchanger plate
Inventor: UEMATSU YOSHIHIRO
IPC: F28F21/08
Filed: 1995-02-14
Abstract: PURPOSE: To obtain an austenitic stainless steel sheet excellent in crevice corrosion resistance, stress cracking resistance, workability and antibacterial properties and suitable for a heat exchanger plate. CONSTITUTION: This stainless steel sheet has a compsn. contg. <=0.06% C, <=5.0% Si, <=1.0% Mn, <=0.045% P, <=0.003% S, 16 to 20% Cr, 8 to 17% Ni, 0.5 to 2.5% Mo, 1.0 to 4.0% Cu and <=0.1% N, and in which the surface roughness prescribed in JIS B0601 is regulated to the range of 0.6 to 7μm in terms of Rz. Since its crevice corrosion resistance is improved by the regulation of the surface roughness, the contents of Cr, Mo or the like are not needed to be increased, and its press workability to a heat exchanger plate is secured.
Patent JP-H05250831-A (JP)
Title: Disk driving device
Inventor: OKADA MITSUMASA
IPC: G11B21/21
Filed: 1992-03-06
Abstract: PURPOSE:To miniaturize the device and to reduce its weight and power consumption by lowering friction between a disk and a magnetic head at the start-up time of a spindle motor and reducing start-up torque. CONSTITUTION:Ultrasonic vibration is impressed between a floppy disk 1 and the magnetic head 3 by an ultrasonic vibration impressing means 4 only at the start-up time in response to a start-up signal for the spindle motor 2. By impressing the ultrasonic vibration, the friction between the floppy disk 1 and the magnetic head 3 is lowered, and hence the start-up torque is reduced.
Patent JP-H05250761-A (JP)
Title: Magnetic recorder/reproducer
Inventor: YATOMI TAKASHI
IPC: H04N5/76
Filed: 1992-03-06
Abstract: PURPOSE:To reduce frequency of replacing magnetic recording tape by arbitrarily registering a desired time for ending currently ongoing recording operation of a program thereby eliminating unnecessary recording part from the magnetic recording tape. CONSTITUTION:In the inventive magnetic recorder/reproducer, an ending time of currently ongoing recording operation of a program is set. On the other hand, recording operation end time information is registered through some information input means including keys. Consequently, flickering at the recording end time indicating section of an indicator 4 stops. Since the end time itself is set and registered, unnecessary recording part can be eliminated from a magnetic recording tape, magnetic tape supply capacity for reserved recording is enhanced, and the frequency of replacing the magnetic recording tape is lowered.
Patent JP-H04284826-A (JP)
Title: Method for purifying exhaust gas and apparatus therefor
Inventor: INUI SATOYUKI
IPC: F01N3/08
Filed: 1991-03-14
Abstract: PURPOSE:To purify exhaust gas by catalytically decomposing nitrogen oxide in the exhaust gas into N2 and O2 in a relatively low temp. region under an oxygen rich atmosphere by a coexisting catalyst. CONSTITUTION:An exhaust gas purifying method consists of a reducing agent introducing process introducing hydrocarbon into exhaust gas as a reducing agent and a catalytic decomposition process bringing a catalyst composed of metal-containing zeolite containing at least one kind of an element selected from copper, manganese, cobalt, iron, nickel, chromium and vanadium capable of relatively easily changing in valence as oxide into contact with the exhaust gas into which hydrocarbon is introduced to decompose nitrogen oxide. The aforementioned hydrocarbon is characterized in that the number of carbon atoms is set to 8-16.
Patent JP-S62206836-A (JP)
Title: Etching method for detecting striation of gaas single crystal wafer
Inventor: YOSHITAKE SHINJI
IPC: H01L21/308
Filed: 1986-03-06
Abstract: PURPOSE:To detect a striation by using an etchant, a waste liquor from which is treated easily and which has high safety, by dipping a GaAs single crystal wafer in a mixture, HF, H2SO4 and H2O2 therein are brought to a specific compounding ratio, in a short time at a normal temperature. CONSTITUTION:When a GaAs single crystal wafer 3 is dipped in an etchant 2 consisting of HF:H2SO4:H2O2=1:x:y (x and y each represent 0.5-2) for 3min at the longest, a striation appears in the surface of a wafer. Accordingly, no CrO3 having strong toxicity is employed, thus improving operation safety, then also simplifying the treatment of a waste liquor. A power circuit and a platinum electrode are unnecessitated, and the wafer need not also be heated, thus simplifying facilities.
Patent JP-S55140683-A (JP)
Title: Tying-up of buoy
Inventor: OKAMOTO HIROSHI
IPC: B63B21/50
Filed: 1979-04-21
Abstract: PURPOSE: To eliminate fear of tangling of chain etc. and reducing thereby costs, by determining on the ground two detaining points arranged on a straight line, which is to cross normally with the anticipated proceeding direction of surges, and by tying up the buoy by means of chains etc. in such a manner that it will be held in the  middle of those detaining points.  
     CONSTITUTION: When tying up a buoy on or below the water surface by means of chains, ropes etc., two detaining points 4e, 4f shall be determined on the ground with an approriate distance from each other on a straight line, which is to cross substantially normally with the anticipated proceeding direction 2 of surges, and the buoy 1b shall be connected to these detaining points 4e, 4f by the use of chains or ropes 5e, 5f, respectively, in such a manner that this buoy 1b is held in the middle of these points. According to this arrangement, the extent in which a buoy floats around can be lessened very much compared with the one-point tying-up method, and also the required number of chains or ropes, the total length and the diameter of the same can be reduced reasonably from the conventional number and values for the case where one empoys the multipoint tying-up method. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-S57162408-A (JP)
Title: Superconductive coil winding
Inventor: HIRAO TOSHIKI
IPC: H02K55/04
Filed: 1981-03-31
Abstract: PURPOSE:To hold securely a superconductive coil by inserting wedges between a bobbin and the superconductive coil. CONSTITUTION:A superconductive coil 3 is pressed in the lateral direction within a bobbin 16 with the help of a coil holder 18. So, when errors arise in the superconductive coil 3 in coil winding or in formation of compounds, a gap is created in the longitudinal direction. A wedge 19 is pushed in between the bobbin 16 and an insulator 17 within the bobbin to press the coil 3. Therefore, even if there is a dimension error, a gap between the bobbin 16 and the coil 3 does not appear, and the coil 3 is securely held. A similar effect can be expected with insertion of the wedge 19 between insulator 17 and coil 3.
Patent JP-S60193334-A (JP)
Title: Production of metallic electrode
Inventor: KAWAMOTO YOSHIHISA
IPC: H01L21/3065
Filed: 1984-03-15
Abstract: PURPOSE:To enable an electrode layer provided in an aperture to have an increased thickness, by providing a resist pattern on a semiconductor layer, and vapor depositing a metallic thin film while irradiating an electronic beam to the resist so as to shrink the same and to enlarge the aperture provided in the resist. CONSTITUTION:A GaAs layer 2 is epitaxially grown on a GaAs substrate 1, and a source electrode 3 and a drain electrode 4 are adhered on the surface of the layer 2 while a gate electrode forming region is remained empty. A spacer 5 having a larger thickness only on its periphery is then provided in the empty part, and resist 7 is applied on the whole surface so as to have an aperture at the center of the empty part. A metallic thin film 8 is then vapor deposited with an electronic beam irradiated on the film 7 so that the film 7 is shrunk to enlarge the aperture thereof. Subsequently, this film 7 is removed together with the film 8 deposited on the same, and a gate electrode 6 is formed at the central portion of the spacer part 5 having an enlarged area. In such a manner, the gate electrode 6 of an FET can be formed into a substantially large thickness and therefore the electrode 6 with a low resistance can be obtained.
Patent JP-S59175069-A (JP)
Title: Reproducer for disk recording medium
Inventor: SHIOTANI MASAMI
IPC: G11B21/08
Filed: 1983-03-24
Abstract: PURPOSE:To obtain an easy-to-see screen by repeating automatically both quick traversing and reproduction modes in a fixed time interval in a fast forward/ reproduction mode. CONSTITUTION:A right or left key of a keyboard switch 21 is pushed to deliver a digital signal corresponding to the target value from a command device 18. This digital signal is converted into the voltage by a D/A converter 17. In this case, the target voltage is changed every fixed time, and therefore the stepped target voltage is delivered. In a reproduction mode the signal is read out of a disk 1 by a pickup device 3, and the information is extracted through a demodulating circuit 20. Then the address information showing the position in the radius direction where the device 3 exists is extracted out of the information delivered from the circuit 20 by an address reading circuit 19.
Patent JP-H09247640-A (JP)
Title: Multi-point electronic conference method and multi-point electronic conference device
Inventor: KIDO RYOJI
IPC: H04M3/56
Filed: 1996-03-07
Abstract: PROBLEM TO BE SOLVED: To easily identify a talker even in the case of 2-way communication with plural points by making the identified talker explicit with its image and its voice or the like. SOLUTION: A monitor display device 1 displays plural communication participants on multi-screens and speakers 11-18 are arranged around the monitor display device 1. The monitor display device 1 belongs to a multi-point electronic conference device being a component of a 4-point electronic conference system, and the 8 speakers 11-18 are arranged around the monitor display device 1 and two speakers are provided to one communication participant. Thus, in the case of a monitor display device for a multi-point electronic conference device being a component of an N-point electronic conference system, 2N sets of speakers are arranged around the monitor display device.  Among the communication participants displayed on the multi-screen, a communication participant making utterance is specified as a talker, and the specified talker is explicit so as to make the specified talker explicit by its image and its voice.
Patent JP-H02231378-A (JP)
Title: Position display device for elevator
Inventor: NAKAJIMA YUTAKA
IPC: B66B3/02
Filed: 1989-03-03
Abstract: PURPOSE:To calm a state of mind of a passenger waiting in a hall by constituting the title device in such a way as driving a pointer in accordance with the movement of an elevator cage. CONSTITUTION:In the case of displaying the position of an elevator cage by a pointer S, a pulse adjusting unit 18 is provided in order to convert, into a pointer driving pulse 17, a pulse data 15 showing the position of the elevator cage. This pulse 17 drives and controls a pulse motor 19, adjusts its output by a reduction gear 6A, and thereafter turns a pointer 5. Thus, by driving the pointer 5 in response to the movement of the elevator cage, a state of mind of a passenger waiting in a hall can be calmed.
Patent JP-S60193402-A (JP)
Inventor: SAKUTA HIDEKI
IPC: A43D86/00
Filed: 1984-03-15
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S55142818-A (JP)
Title: Grout-injecting device
Inventor: SOGOU MINORU
IPC: E02D3/12
Filed: 1979-04-23
Abstract: PURPOSE: To obtain a device light in weight, easy to operate and little in danger and thereby raise the working efficiency by equipping one high-pressure hose with packer rubber, a needle valve etc.  
     CONSTITUTION: Packer rubber 2 and others are made to reach the place of execution of grout in a dug hole 8 and the grout is injected into a high-pressure hose 1. The grout injected reaches a needle valve 4, but since it does not open until the pressure is raised higher than the fixed level, the grout within the high-pressure hose flows out from lateral orifices 1a into a cavity part 2a of the bag-like packer rubber 2, expanding it until it closely fits to the wall of the dug hole 8. The rubber 2 prevents the leakage of grout under the condition. When the rubber 2 is filled up with the grout, the pressure at the needle valve 4 rises higher than that fixed by a pressure-regulating screw 4d and a spring 4c, a valve body 4a is lowered, the grout flows out from discharge orifices 4e, the dug hole positioned deeper than the rubber 2 is filled up with the pressurized grout, thus the grout is injected into a subsurface layer. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-S52132796-A (JP)
Title: Maintenance system for alarm monitoring board with recording functions
Inventor: TANEMURA KENSABUROU
IPC: G08B25/00
Filed: 1976-04-30
Abstract: PURPOSE: To enable the digital printer print test and the function test of the alarm monitor board simultaneously, by printing out all the coded signal representing the conditions of each terminal by the maintenance instruction. 
     COPYRIGHT: (C)1977,JPO&Japio
Patent JP-H028455-A (JP)
Title: Covering plate for floor panel opening
Inventor: NAKA HIROMASA
IPC: E04F15/024
Filed: 1988-03-03
Abstract: PURPOSE:To make it possible to easily provide ports for wiring and to make increase of equipment installation or change of installation layout easy by providing guide members on the surface and the underside of a covering plate for forming at least one port for wiring on the covering plate. CONSTITUTION:To a covering plate 1, guide members 2 and 3 are provided respectively on the surface and the underside to form U-shaped ports 8 for wiring, and the guide member 2 on the surface is made to be placed over the outer periphery of the guide member 3 of the underside. By piercing through the parts 7 encircled by these guide members 2 and 3 with a tool like plier, the U-shaped ports 8 for wiring are formed. When laying through of cables or the like is needed, the covering plate 1, with opened port 8, is engaged to an opening 23 of a floor panel, and when the laying through is not needed, the opening 23 of the floor panel is closed with the covering plate 1 being engaged to the opening 23.
Patent JP-S60195610-A (JP)
Title: Controlling method of industrial robot
Inventor: FUKUOKA HISAHIRO
IPC: G05B19/18
Filed: 1984-03-17
Abstract: PURPOSE:To improve sensing accuracy and to completely eliminate sensing errors, by correcting the position of the next sensing starting point and rotation of the sensing direction by using correcting values of the preceding sensing. CONSTITUTION:Firstly, a torch 4 is positioned to the 1st sensing starting point P1 and the sensing of Sensor Menu No.(SEM No.) 01 is executed. A computer 7 stores the positional information of a point P2' on a welding line WL as a result of the sensing and calculates the difference DELTAP2 between the positional information of the point P2' and the positional information of a point P2 at the time of teaching and stores the difference DELTAP2. Then the torch 4 is positioned to the 2nd sensing starting point P3 and the sensing of SEM No.01 is executed. Another point P4' on the welding line WL is found in the same way and the difference DELTAP4 between the positional information of the point P4' and that of a point P4 at the time of teaching is calculated and stored. Subsequently, the positional information of a point P5 at the time of teaching is corrected with the differences DELTAP2 and DELTAP4 and, after the position is corrected, a point P5' is calculated and stored. Thereafter, the torch 4 is positioned to the point P5 and the next sensing is commanded after the sensing direction is also corrected by using a rotational correcting value obtained from the correcting content DELTAP2 and DELTAP4.
Patent JP-S57164770-A (JP)
Title: Adjusting method for toner concentration
Inventor: MORI KIYOTAKA
IPC: G03G21/00
Filed: 1981-04-03
Abstract: PURPOSE:To decrease the concn. of a toner in a short time without making defective copies by providing a mode for reducing the amt. of the toner, and  according to the concns. of the toner, by putting each device in a halt state  while changing over the mode to the mode for reduction of amt. and forcibly  carrying out the toner. CONSTITUTION:Either one of an ordinary biasing electric power source 34 and a biasing electric power source 36 for reducing the atm. of the toner is selected with a switch 32 for a magnetic brush roll 26. In the stage of the mode for reducing the amt. of the toner for decreasing the toner concn., the switch 32 is changed over to the power source 36 for reducing, and in accordance with this, an electrostatic charging corotron 22, a toner supplying device 28, a transfer corotron 14 and a paper feed device are disabled. When a copying button is pushed after this, a drum 10 revolves in the same way as in ordinary copying. On the other hand, the minus potential much lower than the surface potential of the drum 10 is applied upon a developing roll 26, and the toner sticks over the entire surface of the drum irrespectively of the electrostatic pattern on the  drum surface, by which a large amt. of the toner is consumed from a developing device and the concn. is decreased in a short time.
Patent JP-H03251203-A (JP)
Title: Packing sticking method for inner sole of shoe
Inventor: OTA JUNICHI
IPC: A43D1/02
Filed: 1990-02-28
Abstract: PURPOSE:To nearly eliminate the need of the sixth sense and skill by measuring a pressure distribution of the sole by a pressure distribution measuring machine, determining to which of several kinds of sole pressure distribution patterns it belongs, and sticking prescribed packing to a prescribed part of the inner sole of a ready-made shoe. CONSTITUTION:An arch drawn by a bone between a first metatarsals 6 and a calcaneus 11 is an inside arch 12, and an arch drawn by a bone between a fourth metatarsals 9 and the calcaneus 11 is an outside arch 13. By height of the inside arch 12 and the outside arch 13, a pressure distribution of the sole is varied, and its distribution shape is divided, for instance, into five kinds of types. By placing a foot on a pressure distribution measuring machine, its distribution shape is measured, and to which type of five kinds of I type - V type the obtained pressure distribution shape of the foot belongs is discriminated, and thereafter, packing prepared in advance in accordance with its type is stuck to a prescribed part of the inner sole of a shoe. From the sticking work of the packing to the inner sole of the shoe, the part which depends on the sixth sense and skill of an individual decreases remarkably, and the shoe whose fitting property is satisfactory is obtained easily and quickly.
Patent JP-H02230340-A (JP)
Title: Error information logging system
Inventor: SATO TOSHIHIKO
IPC: G06F11/34
Filed: 1989-03-02
Abstract: PURPOSE:To prevent the deterioration of a processing speed in CPU, which follows error logging, by respectively installing error informing means in a memory control circuit and an input output control circuit and storing error information from the memory control circuit and the input output control circuit to CPU in response to an error informing signal. CONSTITUTION:The terminal 2 of a main memory control part 2 and the terminal 3 of an I/O control part 3 are respectively connected to the error informing circuits. As soon as the main memory control part 2 and the I/O control part 3 output error information to an interface bus 100, respective error informing circuits make an interface signal line 101 active. Error information on the interface bus 100 can be recorded in the memory in a logging circuit 4 and correctable error can be logged without the aid of CPU 1 by permitting the interface signal line 101 to be active. Thus, the deterioration of the processing speed in CPU 1 following the logging of error information can be prevented.
Patent JP-H02230336-A (JP)
Title: Information processor
Inventor: OKANO MASAKI
IPC: G06F11/28
Filed: 1989-03-02
Abstract: PURPOSE:To accurately retrieve the existence address of a target write instruction in a short time by setting a destroyed address from an external panel when the address is destroyed by means of a program bug. CONSTITUTION:When the address is destroyed by the program bug, the destroyed address is stored in a register 30 when the address where the instruction being the cause exists is retrieved. When a mode which has been set in a maintenance mode setting part 10 is a debug mode, the content of the register 30 comes to the input of a comparison circuit 50 by an AND circuit 40. On the other hand, the content of a write address storage register 70 storing the write address comes to be the input of the comparison circuit 50 when an instruction which is accompanied by a write action is executed. When the compared result coincide in the comparison circuit 50, address coincident signals 55 and 56 are turned on and a debug interruption occurs in a debug interruption generation circuit 95. Thus, the instruction address where the instruction exists is accurately and easily seized.