baber/WOPTO huggingface dataset:
Patent JP-H01140293-A (JP)
Title: Structure of sensor for self-fire informing system
Inventor: TERADA MOTOHARU
IPC: G08B17/06
Filed: 1987-11-26
Abstract: PURPOSE:To require no interface part and to lower a cost by providing a characteristic address setting part in a base mounted on a structure and disposing a sensor, a transmission signal processing part and a power source in a head removable from the base. CONSTITUTION:The base 3b is mounted on the structure and the characteristic address setting part 4 is disposed. When the removable head 3a having the transmission signal processing part 5, the power source part 6 and the sensor part 9 is mounted on the base, a transmission line 2 is connected to the address setting part 4 and the transmission signal processing part 5 receives and returns sense data. The sensor 9 senses a fire sensing element and feeds the data to the processing part 5. The power source 6 supplies a power to the signal processing part 5 and the sensor 9. According to this constitution, only the address setting part 4 may be mounted to the base 3b and the conventional interface can be saved, so that the cost of the sensor of a self-fire informing system can be reduced.
Patent JP-H06147108-A (JP)
Title: Protection structure at one side piston type variable displacement compressor
Inventor: KAWAGUCHI MASAHIRO
IPC: F04B49/10
Filed: 1992-11-09
Abstract: PURPOSE:To accomplish the protection of an outside drive source side without increasing the weight and cost of a compressor by providing at a support arm a weakened strength portion that is broken by overload. CONSTITUTION:The anti rotary load strength of a weakened strength portion 5c on a support arm 5a is set at strength to withstand sufficiently the maximum rotary load at the time of regular discharge work. Also, the anti rotary load strength of the weakened strength portion 5c is set at strength not to withstand excessive rotary load due to burning between a swash plate 11 and shoes 20 or a one-head piston 19 and a cylinder block 1. In addition, the anti rotary load strength of the weakened strength portion 5c is set at the lowest strength on a drive transmission route that is from a belt 7a to the swash plate 11. Accordingly, when burning occurs between the swash plate 11 and the shoes 20 or the one-head piston 19 and the cylinder block 1, the weakened strength portion 5c is immediately broken. As a result, excessive rotary load does not extend to a vehicle engine side.
Patent JP-2000116019-A (JP)
Title: Battery charging control device
Inventor: SATO JUN
IPC: H01M10/44
Filed: 1998-10-06
Abstract: PROBLEM TO BE SOLVED: To maintain the performance of a battery at its best. SOLUTION: A device is provided with a means 26 for controlling equal charging or normal charging from a charger 38 to a battery 32 when the charger 38 is connected to the battery 32 that is fitted to an electric car, and a first timer means 4 for counting elapsed time starting from the time when a power switch 24 of the electric car is turned off as the start time. Further, the control means 26 is provided with a first selection function 8 for selecting equal charging when the output of the first timer means 4 exceeds a preset value.
Patent JP-H09139032-A (JP)
Title: Disk device
Inventor: TAKAISHI KAZUHIKO
IPC: G11B21/08
Filed: 1995-11-17
Abstract: PROBLEM TO BE SOLVED: To perform a short distance seek in the extent of 1-4 tracks by such a short coarse time as several samples for a sector servo provided with a comaratively long sample period of the head position, and also to enable the seek in a short time of 10 samples or less including the setting time. SOLUTION: FF current by an FF current setting part 56, start of the target position by a position control part 64 and correction value by a correcting value setting part 60 are produced by the time elapsed from the started time of each seek, i.e. by each sample timing with the predetermined number of samples, then the positional feedback control by the difference between the target position and the actual position is performed in the position control part 64 together with the control by the FF current. The coarse time for the seeking distance of one track is set to 3 samples, for instance. By intentionally deviating the orbit of target position from an ideal value, the overshoot and under-shoot are suppressed.
Patent JP-2000124352-A (JP)
Title: Semiconductor integrated circuit device and manufacture thereof
Inventor: KIKUCHI TAKU
IPC: H01L23/12
Filed: 1998-10-21
Abstract: PROBLEM TO BE SOLVED: To eliminate the need of extension lines from a conductor layer to pads, avoid increase in the parasitic inductance and suppress the variation of power voltages by burying a chip capacitor for suppressing the power voltage variation in a package mounting board. SOLUTION: A chip capacitor C is buried in the interior of a package board S, and metal electrodes 2 provided above and below the chip capacitor C are adhered to a conductor layer 3 provided in the package board S to connect the capacitor C between a power source and ground. To reduce the parasitic inductance, the capacitor C is disposed just or near beneath a region A on which a semiconductor chip is mounted. The capacitor C has a structure having an insulation layer 1 made of a ceramic, org. material, etc. sandwiched between the metal electrodes 2 and a thickness of about 100-200 μm. Thus, the need of extension lines from the conductor layer 3 to pads can be eliminated to avoid increasing the parasitic inductance and suppress the variation of power voltages.
Patent JP-H05110062-A (JP)
Title: Rectifying semiconductor device
Inventor: WAKATABE MASARU
IPC: H01L29/861
Filed: 1991-10-18
Abstract: PURPOSE:To enable a semiconductor chip area to be saued by a method wherein a Schottky contact plane formed on one conductivity type semiconductor is decreased in electric field intensity, lessened in reverse leakage current up to a high reverse voltage region, and enhanced in forward current per chip area. CONSTITUTION:A second one conductivity semiconductor PEL region, which has nearly the same electron potential as the barrier height of a metal layer M which forms a Schottky contact with the upside and a part of the side face of a protrusion 1 formed by a trench groove 2 of a certain conductivity type semiconductor N, is formed, and an opposite conductivity type semiconductor region P<+> which as a larger electron potential than the barrier height of the metal layer M is formed on the base and the residual side face of the trench groove 2.
Patent JP-H03160463-A (JP)
Title: Carrier for developer
Inventor: SAKO HIROYUKI
IPC: G03G9/113
Filed: 1989-11-17
Abstract: PURPOSE:To reproduce a fine line image well without causing deterioration of image density and image fog by using core particles rugged on the surfaces and made of a specified magnetic material and having a small amount of resin applied on the surfaces and a current value in a specified range. CONSTITUTION:Higher peaks of the rugged surface of each core particle are not fully coated with the resin and disclosed to the surface of each carrier particle by coating the core particle with a small amount of resin and the recesses of the core particle are mainly coated with the resin. Formation of conductive passages and fluctuation of surface resistance are made proper by contact of magnetic brushes. The saturation magnetization of the core material is controlled to a comparatively high value of 45 - 60emu/g in order to control the contact of the brushes with each other due to inclination of the brushes accompanied by the centrifugal force of a sleeve, and the fluctuation of carrier resistance in a kinetic state due to change of the rotation speed of the sleeve can be suppressed, thus permitting a superior image high in density and sharp in fine image lines, and free from fog to be stably formed.
Patent JP-H07154213-A (JP)
Title: Semiconductor integrated circuit
Inventor: SATO YASUSHI
IPC: H03K3/356
Filed: 1993-11-30
Abstract: PURPOSE:To provide the semiconductor integrated circuit by which a high operating speed is attained. CONSTITUTION:A latch circuit is constituted by using N-channel MOS transistors(TRs) N1-N6 as major components. A P-channel MOS TR P1 is provided between an output terminal 4 and a power supply point VDD and a P-channel MOS TR P2 is provided between an output terminal 3 and the power supply point VDD respectively. With a clock signal CL set to an 'H' level, a level of the output terminals 4, 3 is set depending on a level of a data signal D and the level is latched by the MOS TR P1 and the TR N5 and the MOS TR P2 and the TR N6. Since the circuit is constituted by employing lots of N-channel MOS TRs whose carrier mobility is fast, a high operating speed is attained and the further faster operating speed is attained by optimizing the manufacture process of the N-channel MOS TRs.
Patent JP-H06127618-A (JP)
Title: Emergency stop device for stacker crane
Inventor: KOBAYASHI YOSHIMASA
IPC: B65G1/04
Filed: 1992-10-13
Abstract: PURPOSE:To prevent getting out of the shape of loads, which are conveyed by a stacker crane, due to urgency stop. CONSTITUTION:Various sensors 15 which detect the abnormality of the traveling- and vertically moving system of a stacker crane send the signals of a CPU 11 and a power circuit 12. When the vertically moving system is to be stopped, a relay inside the power circuit 12 which has received a signal operates to open a magnet switch 17 for vertically moving motor emergency stop and to break the circuit for feeding power to the vertically moving motor 14 in order to stop the elevating system. On the other hand, the traveling motor 13 is stopped with a magnet switch 16 for traveling motor emergency stop on, by going through the regular course of deceleration and stoppage with the action of the power circuit 12 controlled through the CPU 11.
Patent JP-2000130714-A (JP)
Title: Ceramic burner
Inventor: NAGAYAMA SATOSHI
IPC: F23D14/02
Filed: 1998-10-22
Abstract: PROBLEM TO BE SOLVED: To effectually suppress occurrence of vibratory combustion by constructing a ceramic plate by overlapping a plurality of plates having the same small hole disposition pattern one on another into a thick layer. SOLUTION: In a ceramic burner in which many small holes 2 are formed in the direction of the face and back of a ceramic plate 1, through which premixed air is passed for surface combustion, the ceramic plate is constructed into a thick layer by overlapping a plurality of plates 1a, 1b, 1c each with the same small hole disposition pattern. Since in the ceramic plate the length of the small holes can be taken longer than the diameter of the same, a pressure difference between burner internal pressure and furnace pressure can be taken larger, and since the premixed air is rectified and laminar flames can be formed, occurrence of vibratory combustion is effectually suppressed. Further, thermal stress is difficult to be exerted.
Patent JP-H03160553-A (JP)
Title: Learning method for neural network circuit
Inventor: AKIYAMA KOJI
IPC: G06F15/18
Filed: 1989-11-17
Abstract: PURPOSE:To decrease the total number of times for learning by investigating the rate of recognition each time learning is once executed to all inputs and setting learning gain by using this rate of recognition. CONSTITUTION:Two layers such as an input layer 101 and an output layer 102 are provided and in an orthogonal learning method, each time learning is once finished to all input vectors, the input vectors are successively inputted to a memory matrix at that time. Then, the rate of recognition is calculated by investigating how many correct output results can be obtained out of the input vectors. By using this rate of recognition, the learning gain is determined to be used in the next learning. Thus, learning can be speedily finished and the number of times for learning can be decreased.
Patent JP-H06142277-A (JP)
Title: Slot machine
Inventor: FUJISAWA HIDEJI
IPC: A63F5/04
Filed: 1992-11-11
Abstract: PURPOSE:To increase the chance of player's winning a prize by setting a universal pattern advantageous to a player. CONSTITUTION:At least one universal pattern (e.g. joker JK) is set in plural patterns. If the universal pattern JK is stopped and displayed on an effective line made effective in response to the number of thrown-in game medals and a prize mode is formed by the remaining patterns stopped and displayed on the effective line, a prize winning signal is output from a prize winning judging means 35 to an advantage applying means 50.
Patent JP-H03162137-A (JP)
Title: Automatic equalizer
Inventor: YAMAMOTO SHUHEI
IPC: H04B3/06
Filed: 1989-11-21
Abstract: PURPOSE:To always execute a stable equalizing operation by comparing a reference value and an error signal being sampled this time, and obstructing a feedback to an adaptive equalizing part of this error signal in the case this error signal exceeds the reference value. CONSTITUTION:An averaging part 4 averages N pieces of sampling error signals in the past, outputs an obtained average value to a multiplying part 5, and the multiplying part 5 brings an inputted average value to M folds, and outputs it as a reference value to a comparing part 3. The comparing part 3 compares an error signal brought to sampling this time inputted from a deciding part 2 and the reference value inputted from the multiplying part 5, and in the case it is compared that the error signal exceeds the reference value by the comparing part 3, the comparing part 3 does not feed back the error signal to an adaptive equalizing part 1. In such a way, even in the case an impulse noise, etc., are generated frequently, a stable equalizing operation can always be executed.
Patent JP-H01140361-A (JP)
Title: Data processing system with channel diagnostic function
Inventor: SATO SHINJI
IPC: G06F13/00
Filed: 1987-11-27
Abstract: PURPOSE:To diagnose the data transfer system of a channel without using an I/O interface by providing a path which performs data transfer between the channels in the channels, and performing the data transfer on the path at the time of diagnosing the channel. CONSTITUTION:The title system is constituted of a central processing unit 100, a main storage device 200, an input/output processor 300, the channels 400 and 500, and I/O devices 600 and 700. And a data transfer path 80 is provided between the channels 400 and 500, and each of the channels 400 and 500 switches the path of data from transfer paths 60 and 70 with an ordinary input/output device to the data transfer path 80 by a channel diagnosis execution command from the central processing unit 100, respectively. In such a way, it is possible to perform the diagnosis of the data transfer system without connecting a real I/O or a false I/O.
Patent JP-2001121278-A (JP)
Title: Method for laser cutting
Inventor: OKADA TAKESHI
IPC: B23K26/082
Filed: 1999-10-22
Abstract: PROBLEM TO BE SOLVED: To smooth the roughness of a cutting plane without decreasing a cutting speed at the time of carrying out laser cutting a piece to be worked by using a laser beam as a heat source. SOLUTION: A curvature varying mirror 1 for controlling the angle of the dispersion of a laser beam by elastically deforming a mirror plate 1a by a piezoactuator 1c is mounted on a laser working machine, and the laser cutting is carried out by vibrating the focal position of a laser beam 4 irradiating a piece to be worked from the laser working machine to the optical axial direction. Also, the focal vibration at that time satisfies the condition that frequency ranges from 150 Hz to 300 Hz and vibration width ranges from ±0.5 mm to ±3 mm.
Patent JP-S62155552-A (JP)
Title: Simultaneous manufacture of bipolar transistor and cmos transistor
Inventor: SCHABER HANS-CHRISTIAN
IPC: H01L21/28
Filed: 1986-12-16
Abstract: A process for the simultaneous production of bipolar transistors and complementary MOS transistors on a common silicon substrate wherein to accommodate the p-channel transistors, n-doped zones are produced in a p-doped substrate and npn bipolar transistors are provided in the n-doped zones where the n-zones form the collector of the transistor and the n-zones are superimposed over n+-doped zones. The latter are connected in the bipolar transistor zone by deeply extending collector terminals. The use of sidewall insulation on the p+- and n+-conducting structures composed of polysilicon or a silicide which are used for diffusing-out source/drain zones and base-emitter zones permit the formation of shorter channel lengths. The process is used to produce VLSI circuits which have high switching speeds.
Patent JP-H07125371-A (JP)
Title: Document processing device
Inventor: KATAOKA MISAO
IPC: B41J19/76
Filed: 1993-11-04
Abstract: PURPOSE:To provide a document processing device wherein line feed is performed automatically and printing can be started from an appropriate position without necessitating troublesome operation by only selecting a kind of a printing medium and inputting the same to the device. CONSTITUTION:In relation to a plurality of kinds of pieces of label paper, a length up to the upper end of a label from the upper end of paper and a length up to the left end of the label from the left end of the paper are stored in a paper format memory 20 of an ROM 12 and line feed and printing of a fixed quantity are performed by selecting the kind of the paper by a printing menue.
Patent JP-2001122693-A (JP)
Title: Ground substrate for crystal growth and method of producing substrate using the same
Inventor: SUNAKAWA HARUO
IPC: C30B29/38
Filed: 1999-10-22
Abstract: PROBLEM TO BE SOLVED: To significantly reduce crystal defects in an epitaxial crystal layer formed on a substrate of a different material, without complicating a process. SOLUTION: A GaN film 12 is formed on a sapphire (Al2O3) substrate 11 having a (0001) surface and then the GaN film 12 is wet etched while leaving the GaN film 12 in an island form. The upper part of the GaN film 12 having the island form is constituted of a single crystal layer. A GaN film 15 almost free from crystal defects is obtained by epitaxial growth in the state that the GaN film having the island form is left.
Patent JP-H10136272-A (JP)
Title: Picture input device
Inventor: MASAKI TOSHIMICHI
IPC: H04N5/357
Filed: 1996-10-25
Abstract: PROBLEM TO BE SOLVED: To miniaturize a picture input device with a built-in illumination device, which is difficult to be affected by disturbance, even if the semiconductor light-emitting element of a light-emitting diode is used by shutter-controlling a semiconductor light-emitting element and a solid-state image pickup element so that a light-emitting period and a light-receiving period are matched. SOLUTION: The solid-state image pickup element 1 is arranged in a position where an object image passing through a lens 2 is image-formed, and it photoelectrically converts the image and outputs an obtained image pickup signal S1 to a synchronizing signal overlap part 4 through an output buffer 3. A pair of light-emitting diodes 6a and 6b are arranged near both ends of the lens 2. LED 6a and 6b emitted/driven by a light-emitting command signal LS outputted from the control part through an LED driver 7 and they function as illumination devices illuminating the object.  For preventing the device from being easily affected by disturbance light, the light-receiving period for accumulating the signal charges in the photosensor Ph of the solid-state image pickup element 1 is matched with the light-emitting period for emitting LED 6a and 6b, and light is received by the photosensor Ph only when LED emits light.
Patent JP-H06145703-A (JP)
Title: Ti-ag alloy parts
Inventor: NOSE YASUTO
IPC: B22F3/02
Filed: 1992-11-11
Abstract: PURPOSE:To easily produce Ti and Ti alloy precision parts with a complicated shape in which oxidation and carbonization in an injection molding process can be prevented and excellent in characteristics by coating the surface of Ti powder with Ag. CONSTITUTION:The surface of Ti or Ti alloy powder is coated with Ag, which is kneaded with resin material into a compound, and compacting and sintering in vacuum are executed to obtain a Ti-Ag alloy sintered body contg. 2 to 10wt.% Ag. The Ti-Ag alloy sintered body obtd. by incorporating the same alloy with <=1wt.% of at least one kind among bismuth, tellurium, selenium and lead is subjected to cutting, grinding or polishing.
Patent JP-H04172456-A (JP)
Title: Dampen water-free original plate for lithography
Inventor: TAMURA KAZUTAKA
IPC: G03F7/00
Filed: 1990-11-06
Abstract: PURPOSE:To obtain an original plate for printing which can be easily developed and in which the adhesive strength between a silicon rubber layer and a sensitive layer is strong and whose printing resistance is enhanced by using as components of the sensitive layer a polymer having hydroxyl group in its side chain and an alkanoyl oxyboron compound. CONSTITUTION:In a dampen water-free plate for lithography having a silicon rubber layer and a sensitive layer provided on a base in this sequence, the sensitive layer contains as its components a polymer having hydroxyl group in its side chain, and an alkanoyl oxyboron compound. Any polymer can be used as the one used in the sensitive layer and containing hydroxyl group in its side chain only if it allows transmission of a sufficient amount of light of the same sensitive wave length as a sensitizing group contained in the sensitive layer, and polymers of ethylene unsaturated compounds, polyurethane, polyester, polyamide and the like can be mentioned as examples of the structure of the main chain of the polymer. The side chain of the polymer which has hydroxyl group is normally a hydroxyl group itself or a univalent organic group having at least one hydroxyl group. Additionally, an alkanoyl oxyboron compound is contained as an essential component in the sensitive layer and the amount by which the compound is added is desirably 0.5 to 50 wt% or more desirably 1 to 30 wt% of the total components of the amount of sensitization.
Patent JP-H06152154-A (JP)
Title: Enclosure with built-in board and its manufacture
Inventor: MATSUDA KAZUYUKI
IPC: B29C45/14
Filed: 1992-11-12
Abstract: PURPOSE:To sharply save a space, to achieve a high-density mounting operation and to make a product small-sized as a whole by a method wherein a board on which an electronic component has been mounted is sealed with a resin by an insertion injection molding method in the main-body part of an enclosure housing an electronic instrument. CONSTITUTION:Chip components 7,... are first mounted in prescribed positions on both the surface and the rear of a flexible board 5, this assembly is inserted into one pair of metal molds for injection molding use, and a molten resin is injected into the metal molds. After the molten resin has been solidified and cooled, an enclosure B, with a built-in board, in which a board part 3 has been sealed in a bottom plate part 1 and a side plate part 2 is taken out. After that, a rigid board 12 is fixed, by a bolt 13, to a rib part 4 in the enclosure B with the built-in board. A gap G corresponding to the height portion of the rib part 4 exists between the rigid board 12 and the bottom plate part 1. Consequently, chip components 13 are mounted on the surface and the rear of the rigid board 12. After that, an electronic instrument 15 is mounted on, and fixed to, the rigid board 12, and it is connected electrically to lead-out terminals of the board part 3.