Patent GB-982419-A (GB)
Title: Improvements in data-output systems in electronic computers
IPC: G06F9/48
Filed: 1963-07-08
Abstract: 982,419. Computer output systems. COMPAGNIE INDUSTRIELLE DES TELECOMMUNICATIONS. July 8, 1963 [July 16, 1962], No. 27012/63. Heading G4A. The invention relates to a computer output device feeding one or more printers. In the embodiment shown, the reading of a programmed instruction ordering output printing supplies a signal (46) 8  and one of eight signals A<SP>1</SP>(30) 8 --A<SP>1</SP>(37) 8  the latter being respectively concerned with eight output channels (printers). If, for example, the first output printer is selected, line A<SP>1</SP>(30) 8  is energized thus switching a bistable flip-flop 13 and zeroing an address counter 15. An 8-position ring 24 is stepped by advance pulses i 1  provided an AND gate 23 is open, thereby scanning in turn the eight output channels. With the first printer selected, when the ring 24 is at position one a signal G 1  from it enables AND gate 14 provided the first printer is free to receive a character (as evidenced by an input #E 1  = 0 to an inverter 10). The output from AND gate 14 passes through OR gate 21 and inverter 22 to close AND gate 23 and stop ring 24 at position one. A further signal G 2  from position one of ring 24 specifies the higher order digits of the address of the character to be extracted and these together with a signal from counter 15 specifying the lower order digits of the address are supplied to that part of the computer store 27 (random-access ferrite core type) concerned with output channel one. The signal from OR gate 21 which stopped ring 24 also passes to AND gate 26 to cause read-out of the character from store 27 through input/output register RESM to AND gate 17. The character read-out passes to the printer when AND gate 17 is enabled by a signal G 4  from the ring 24. A signal G 3  from the ring allows (at AND gate 16) an advance pulse i 2  to advance counter 15 by one to select the next character. As soon as printing of the first character starts, the signal #E 1  becomes 1 again thus enabling ring 24 to continue scanning the output channels. The other characters to be printed in channel one are printed in succeeding cycles of the ring 24, one per cycle, until all have been printed when a programmed carriage-return signal RC opens an AND gate 18 to a signal G 5  from the ring 24 to reset flip-flop 13. The computer continues with its programme whenever the output of OR gate 21 is zero. To avoid loss of data due to two print orders relating to the same printer following too closely upon one another, a sequence interruption may be programmed with diversion of the new order to an appropriate address, the interruption occurring either if the particular output channel required is in operation or if any one is. The following features of the computer are mentioned: the machine word consists of three seven-bit (includes parity bit) characters processed serially by character, the seven bits in parallel; an instruction counter is used for following the programme; the address word of the twoword instruction may be modified in response to the decoding of the logical word of the instruction; a sub-programme is used for arranging input to the computer.