Patent GB-1257142-A (GB)
IPC: G11C13/04
Filed: 1970-06-08
Abstract: 1,257,142. Statistical apparatus. NATIONAL CASH REGISTER CO. 8 June, 1970 [30 June, 1969], No. 27588/70. Heading G4M. Binary data are recorded on a record medium, e.g. a label, by a contiguous series of indicia having three possible detectable characteristics, no two adjacent indicia being the same, and sensing and decoding means produce output signals representing the data by sensing the indicia serially in a reading direction and detecting one binary digit as a transition between a first and a second, or the second and a third, or the third and the first characteristics, the other binary digit being detected as the reverse transitions. Label.-Data is recorded as a sequence of white, green and black bars, though different colours or magnetic characteristics could be used. The first and last transitions at the ends of the data word indicate the direction of scanning, e.g. white-green and black-white (white being the label background colour). The four transitions adjacent each direction bit represent a size code indicative of the length of the data word, one size code being the complement of the other and having the reverse order of bit significance. The next adjacent bit at each end is a parity bit selected so that the number of 0's is congruent, modulo 3, to the number of 1's. The remaining transitions represent 4-bit data characters. System operation.-The label is scanned by a .hand-held pen to and from which light is conducted by fibre optic cables. The components of light reflected from the label are separated into infra-red and non-infra-red by a dichroic mirror, and the outputs 108, 110 of two corresponding detectors are converted to signals on one of three leads 120-124 representing the colours sensed. A logic circuit 126, Figs. 6A, 6B (not shown), converts these signals to a train of binary bits on a single lead and provides a pulse for each bit detected. The data signals are supplied to an input register 128 from which they are transferred to a memory 130, comprising auxiliary and main shift registers 132, 134, under control of a synchronizing section 136. A programme counter 140 is stepped by a clock source 127 in synchronism with the stepping and recirculation of data in memory 130. Newly sensed data bits stored in register 128 are stepped towards the output stage of this register, and when the programme counter reaches zero the new bits are shifted into memory 130 to follow any previously stored bits, counter 140 being reset to zero when no new bits remain in register 128. Unit 138 detects the end of a label being scanned by detecting when a white portion at least four times as wide as the last green or black bar is sensed. At this point the last scanned direction bit and size code are held in auxiliary register 132 and comparison of this size code with the programme counter 140 contents is effected to determine the time for transferring the contents of memory register 134 to output register 148. The size codes held in registers 132 and 148 are then compared, taking account of the complementary and inverted relationship between them, and if equal a parity check is initiated. This check is performed by "0" and "1" modulo 3 counters and a comparator, and if satisfied, the data bits are transferred from register 148 to a utilization device, e.g. cash register display. Data can be shifted out of register 148 in either direction with or without complementing in dependence on the reading direction indicated by the sensed direction bits.