baber/WOPTO huggingface dataset:
Patent TW-482716-B (TW)
Title: Method and device for forming coating on the inner surfaces of a mold
Inventor: YONEMOCHI KENJI
IPC: B29C45/66
Filed: 2000-07-25
Granted: 2002-04-11
Abstract: By managing a coating material injection time and the like parameters so that they may be controlled within specifically determined ranges, an in-mold coating formation method is provided for manufacturing a molded product coated with a coating layer having a uniform quality in its outside appearance. By continuously and unifyingly managing a mold opening amount and a mold closing force, an in-mold coating formation method and an in-mold coating formation apparatus are provided which are so formed that, if the control of a mold closing force and the control of a mold opening amount are continuously changed and at the same time a high precision and a high response are maintained, it is possible to enlarge a selectable range for selecting a molding condition, thereby producing an integrally formed molded product having an excellent outside appearance and whose coating layer has a high adhesion strength. Further, there are provided a mold having a specifically formed auxiliary cavity and an in-mold coating formation method which employs said mold, so that it is possible to prevent a coating material from leaking out of the mold, thereby shortening the molding formation cycle, and making it possible to manufacture a molded product having a stabilized quality. Moreover, by controlling an internal pressure in the mold cavity under a predetermined condition after the injection of the coating material, there is provided a further in-mold coating formation method which makes it possible to obtain an integrally formed molded product whose coating layer has a sufficient strength with the molded product, without having to use a special coating material and a special resin to be used for molding. In addition, by using a mold having a specifically shaped sub-cavity, there is provided a still further in-mold coating formation method which can keep mold temperature at a relatively low value, cause the coating material to cure at a predetermined temperature and within a predetermined time period, thereby shortening the molding formation cycle, improving the productivity, improving the physical properties of a coating layer, thus obtaining a good molded product.
Patent TW-558837-B (TW)
Title: Method of fabricating top gate type polycrystalline silicon thin film transistor
Inventor: YOU CHUN-GI
IPC: H01L21/265
Filed: 2000-07-27
Granted: 2003-10-21
Abstract: A method of forming a top gate polysilicon type thin film transistor is set forth. Prior to ion implantation, a gate insulating layer except for a gate region is removed to lower an energy level for ion implantation. When two impurity types of a transistor are made on the same substrate, low energy ions are implanted to diminish a photoresist burning phenomenon. Therefore, it is possible to improve conductivity of polysilicon and alleviate damage to the polysilicon.
Patent TW-524800-B (TW)
Title: Production process for hydroxyalkyl ester
Inventor: UEOKA MASATOSHI
IPC: C07C67/26
Filed: 2000-07-28
Granted: 2003-03-21
Abstract: The present invention provide a production process for a hydroxyalkyl ester which comprises the step of carrying out a reaction between a carboxylic acid and an alkylene oxide in the presence of a catalyst, wherein the production process sufficiently enhances the conversion or selectivity in the reaction. The production process is characterized in that the reaction is carried out in a reaction liquid under conditions where a relationship a < b is kept throughout the reaction wherein ""a"" is a molar concentration (mol %) of the carboxylic acid in the reaction liquid and wherein ""b"" is a molar concentration (mol %) of the alkylene oxide in the reaction liquid.
Patent TW-464612-B (TW)
Title: Manufacturing method and apparatus for lamination rapid prototyping capable of selectively removing waste materials
Inventor: LIAU YUN-SHIUAN
Filed: 2000-09-19
Granted: 2001-11-21
Abstract: This invention relates to a manufacturing method and an apparatus for lamination rapid prototyping capable of selectively removing waste materials, mainly comprising to position a substrate having an adhesive layer and covered with a protective film on the worktable, press the substrate on the previous substrate with a pressing mechanism, tear off the protective film on the upmost substrate, cut the upmost substrate with protective film torn off into the predetermined shape of the layer with a high-energy optical cutter, and finely cut the interior and exterior waste materials into plural small pieces, make the exterior part of non-predetermined shape of the upper substrate lose the stickiness with low-energy optical cutter so as to make the interior and exterior waste materials not to adhere to the previous substrate, selectively remove the interior waste materials during lamination forming with a waste material removing mechanism, and remove the exterior waste materials after complete lamination forming, therefore, be able to manufacture product with complex interior shapes.
Patent TW-471040-B (TW)
Title: Lateral RF MOS device with improved breakdown voltage
Inventor: D ANNA PABLO EUGENIO
IPC: H01L27/088
Filed: 2000-09-30
Granted: 2002-01-01
Abstract: The lateral RF MOS device having two drain drift regions and a conductive plug source connection structure is disclosed. The usage of two drain drift regions results in the increased source-drain breakdown voltage and in increased maximum drain current density. The lateral RF MOS device of the present intention can be used for high power and high frequency applications.
Patent TW-I239956-B (TW)
Title: A process for preparing N-[1-(S)-ethoxycarbonyl-3-phenylpropyl]-L-alanine N-carboxyanhydride
Inventor: CHEN TSUNG-MING
IPC: C07C271/22
Filed: 2000-10-03
Granted: 2005-09-21
Abstract: A process for preparing N-[1-(S)-ethoxycarbonyl-3-phenylpropyl]-L-alanine N-carboxyanhydride of formula (I) is to react N-[l-(S)-ethyoxy carbonyl-3-phenylpropyl]-L-alanine with XCOOR, wherein X is halogen atom, R is C1-C6 alkyl, to obtain a N-alkoxycarbonyl compound, then reacting with an acyl group activation reagent, finally contact with water. The compound of formula (I) is a key intermediate of ACE inhibitors.
Patent TW-479268-B (TW)
Title: Method for in-situ cleaning of surfaces in a substrate processing chamber
Inventor: THILDERKVIST ANNALENA
IPC: H01L21/302
Filed: 2000-10-17
Granted: 2002-03-11
Abstract: A method of removing contaminants from a surface in a silicon substrate processing chamber. The method includes coating the surface which has been exposed to contaminants including metal particles with a material preferably including silicon. During coating, contaminants are collected by the material being applied. The method further includes removing the material and any contaminants that have been collected by the material during coating. The method can be performed after the surface has been exposed to contaminants from ambient air or moisture during cleaning or preventive maintenance procedures, for example. Also, the method is preferably performed before any baking procedures or before the chamber is heated to drive out any moisture that has been introduced to the chamber.
Patent TW-455929-B (TW)
Title: Graded ion implantation
Inventor: JENG PEI-REN
IPC: H01L21/265
Filed: 2000-11-21
Granted: 2001-09-21
Abstract: This invention uses graded ion implantation to form dual damascene pattern. On a given substrate, a dielectric layer is applied. A resist layer is subsequently formed on top of the dielectric layer and an area is defined for ion implantation. A dense area of the dielectric layer is formed by using graded ion implantation and also the resist layer as ion implantation mask, in which the dense area is a pre-determined trench area. After the resist layer is stripped off, a hardmask layer is formed on top of the dielectric layer and then a new resist layer is formed on top of the hardmask layer. An area for trench formation is defined on the resist layer to expose part of hardmask layer, in which part of the hardmask surface at least contains the dense area. An etching process is performed using the resist layer as etching mask to remove the hardmask layer and the dielectric layer to expose part of the substrate surface so that dual damascene pattern can be formed. The resist layer is removed to proceed interconnect process.
Patent TW-537974-B (TW)
Title: Elastic stretchable laminate sheet and it production method
Inventor: KOBAYASHI TOSHIO
IPC: B32B7/022
Filed: 2000-11-24
Granted: 2003-06-21
Abstract: To provide an elastic stretchable laminated sheet which has folds whose heights are not changed, even when stretched. This elastic stretchable laminated sheet 1 is obtained by bonding the second fiber layer 3 with high-unit weight region 12 and low-unit weight region 13 to the first elastic stretchable fiber layer 2. In the second fiber layer 3, the high-unit weight region 12 is formed thicker than the low-unit weight region 13. The first fiber layer 2 has low elastic stretchability at sites bonded to the high-unit weight region 12 and high elastic stretchability at sites bonded to the low-unit weight region 13.
Patent TW-524834-B (TW)
Title: Compact disk and utilized UV-hardening type compositions thereof
Inventor: MURAKAMI KAZUO
IPC: G11B7/24027
Filed: 2000-12-06
Granted: 2003-03-21
Abstract: The purpose of present invention provides a DVD that above the data record layer, utilizes the UV-hardening type compositions for affixing the basic plate with the film formed by silver or alloy whose main component is silver, and the technique for keeping the same permanence with the known DVD-5, DVD-10, DVD-9 utilized the gold or silicone series compound for semipermeable film. The UV-hardening type compositions are utilized by the CD whose the error rate is below 10 after the environment test of 80 DEG C and 85%RH-96hr, and by the CD whose water absorption of hardening paint film is below 2.0% by weight and water vapor transmission of 50 μm film thickness is below 70 g/m<SP>2</SP>*day.
Patent TW-589456-B (TW)
Title: Short-circuit inspection method of circuit board, inspection tool for the method, circuit board of the inspected object, short-circuit inspection apparatus of circuit board, and coil sensor for inspection
Inventor: YAMAOKA HIDEJI
IPC: H05K1/11
Filed: 2001-01-10
Granted: 2004-06-01
Abstract: The present invention provides a kind of short-circuit inspection apparatus and its method capable of inspecting short-circuit with excellent precision. In the circuit board disposed with at least two circuit pattern lines and the short-circuit pattern line where at least two pattern lines are made short circuit, the short-circuit inspection method for inspecting whether there is short-circuit or not is featured with the followings: adding the regulated inspection signal between two circuit patterns; detecting the current value of the inspection signal for conducting between two circuit patterns lines and the short-circuit pattern line; comparing the first detected current value of the inspection signal with the second current value of the inspection signal pre-recorded corresponding to the normal reference circuit board before the first current value, and determining that there is a short-circuit between these two circuit pattern lines when a difference is obtained between the first current value and the second current value.
Patent TW-I223941-B (TW)
Title: System and method for managing network access
Inventor: LEIFER DORY E
IPC: G06F15/00
Filed: 2001-02-20
Granted: 2004-11-11
Abstract: A system and method for managing network access. The method and system involve a policy server and a service gateway which send messages to one another via a user's network access application program. In one embodiment, the network access application program is an Internet web browser. The service gateway receives a network access request from a user and sends an authorization request message regarding the user to a policy server via the user's network application program. In one embodiment, the network access request is an Internet web site access request. The service gateway will then, if the policy server grants access, receive from the user's network access application program an authorization granted message regarding the user that was initiated by the policy server. The service gateway will then provide the user access to a network such as the Internet. The policy server receives an authorization request message from a user's network access application program that was initiated by the service gateway. The policy server processes payment information received from the user and, assuming that the payment information is sufficient, provides an authorization granted message regarding the user to the service gateway via the user's network access application program.
Patent TW-512314-B (TW)
Title: Data regenerator, data regenerating method, and record medium for recording data regenerating program
Inventor: TAKAHASHI YORIO
IPC: G11B20/10
Filed: 2001-02-15
Granted: 2002-12-01
Abstract: The present invention relates to the control of regenerating speed of the record medium which recorded with data, and for provides the data regenerator and the data regenerating method in which the regenerating speed the data is controlled according to the regenerating frequency of each data, for suppressing the consumed power and the generated heat. After regenerating the CD-DA type data which converted and outputted sequentially, in the first regenerating speed, when regenerating the CD-ROM type data which stored in the processing section, the data is regenerated in the third regenerating speed, which slower than the second regenerating speed and faster than the first regenerating speed.
Patent TW-535379-B (TW)
Title: Transmission apparatus and method, reception apparatus and method, management apparatus and method, charging apparatus and method, providing apparatus and method, and recording medium
Inventor: IIMA SHIN
IPC: G06Q50/00
Filed: 2001-04-03
Granted: 2003-06-01
Abstract: This invention relates to a transmission apparatus for transmitting digital content data via a communication medium, comprising attachment means for attaching cost information per unit data volume to the digital content data; and transmission means for transmitting the digital content data attached with the cost information after converting a data format of the digital content data attached with the cost information into a data format suitable to the communication medium.
Patent TW-524843-B (TW)
Title: Cerium based abrasive material, raw material thereof and method for their preparation
Inventor: ITO AKIFUMI
IPC: C01F17/235
Filed: 2001-05-03
Granted: 2003-03-21
Abstract: This invention provides a raw material for cerium based abrasive material, characterized in that it comprises a carbonate of a cerium base rare earth element and an oxide of a cerium base rare earth element and has a loss on ignition in the case of heating at 1000 DEG C for 1 hr of 0.5 to 25% on the basis of dry weight. The raw material is prepared by calcining a carbonate of a cerium base rare earth element at a specific temperature, to thereby convert a part of the carbonate of a cerium base rare earth element to an oxide of a cerium base rare earth element. The raw material can be sintered at a relatively low roasting temperature and thus is free from the occurrence of an extraordinarily grown grain.
Patent TW-I284928-B (TW)
Title: Method of decreasing capacitance for silicone compound
Inventor: LI LAIN-JONG
IPC: H01L21/205
Filed: 2001-05-28
Granted: 2007-08-01
Abstract: This invention relates to a method of decreasing capacitance for a silicone compound. It synchronously (in-situ) utilizes baking steps to remove the moisture of the silicone compound. It reduces the capacitance of silicone compound, especially for the low-coefficient dielectric loss material. Therefore, it causes the wafer reduce capacitance due to absorption moisture during manufacturing process. Because of without extra baking processes, it can speed up the manufacturing process. This invention provides the design of multi-slot baking room, and the wafer transferring system. Eventually, it improves the drawback of low-throughput for single-slot baking room.
Patent TW-497221-B (TW)
Title: Manufacture method and structure of nitride read only memory
Inventor: SUNG JIAN-LUNG
IPC: H01L21/8246
Filed: 2001-06-12
Granted: 2002-08-01
Abstract: This invention provides a manufacture method and structure of nitride read only memory (NROM). According to the invention, a layer or multiple layers of isolation layers are formed to cover the oxide-nitride-oxide (ONO) structure and the gate and a silicon nitride (SiNx) spacer is formed to protect the NROM unit. If there is direct contact between the silicon nitride spacer and the gate, threshold voltage of the NROM unit will increase. Therefore, this invention utilizes the isolation layer constituted by a layer or multiple layers of silicon oxide (SiOy) to separate the NROM device and the silicon nitride spacer. Not only protection of the NROM device can be achieved but also side effect resulting from the use of silicon nitride as the spacer and leakage current among devices can be avoided.
Patent TW-I222386-B (TW)
Title: Method and device for finishing surface of long material
Inventor: UMEMURA MITUGI
IPC: B24B29/06
Filed: 2001-07-11
Granted: 2004-10-21
Abstract: The present invention provides an inline-ready method of finishing the surface of a long material capable of preventing any environmental problem from occurring and the mechanical properties of the long material from deteriorating. The method for finishing surface of long material comprises the steps of: holding the long material by two or more elastic endless belts with a specified force, rotating the elastic endless belts in the same direction as or in the reverse direction to the moving direction of the long material by moving the long material and increasing or decreasing the rotating speed of the elastic endless belts more than or less than the moving speed of the long material, and loading powder and granular grinding material between the elastic endless belts, whereby the grinding material is moved relative to the long material to rub the grinding material against the long material so as to finish the surface of the long material.
Patent TW-542891-B (TW)
Title: Multistage compression refrigerating machine for supplying refrigerant from intercooler to cool rotating machine and lubricating oil
Inventor: KAWADA AKIHIRO
IPC: F25B31/00
Filed: 2001-07-18
Granted: 2003-07-21
Abstract: A multistage compression refrigerating machine is disclosed, which efficiently cools a rotating machine such as an electric motor and lubricating oil by using a refrigerant and increases the amount of refrigerant to be used to provide the refrigerating capacity in the evaporator, thereby improving the refrigerating capacity. The machine comprises a condenser for supplying a condensed refrigerant to an evaporator via an intercooler: a multistage compression system for absorbing the above refrigerant, absorbing a refrigerant evaporated from the intercooler, from an intermediate position between adjacent compressors, compressing the absorbed refrigerants together, and discharging it to the condenser; a rotating-machine cooler for cooling a rotating machine for driving the multistage compression system; and a lubricating-oil cooler for cooling lubricating oil. The refrigerant extracted from the intercooler is supplied to the rotating-machine cooler and the lubricating-oil cooler, and this refrigerant is returned to the evaporator after cooling.
Patent TW-I249828-B (TW)
Title: Packaging structure for semiconductor chip and the manufacturing method thereof
Inventor: LEE SHIH-CHANG
IPC: H01L21/56
Filed: 2001-08-07
Granted: 2006-02-21
Abstract: The present invention provides a packaging structure for semiconductor chip, which comprises: a semiconductor chip, having a metal plating layer directly formed on the back of the chip; an encapsulation, covering the chip to expose the metal layer on the back of the chip to the bottom surface of the encapsulation; in which, the encapsulation has a plurality of protrusions protruded from the bottom surface of the encapsulation, and a plurality of connecting wires, each having one end electrically connected to the semiconductor chip, and the other end exposed to the plurality of protrusions of the encapsulation for connecting to the external circuit. Preferably, the longitudinal length of the connecting wires exposed from the plurality of protrusions is more than four times of the wire diameter of the plurality of connecting wires. The present invention further provides a manufacturing method of the packaging structure for the semiconductor chip.
Patent TW-518417-B (TW)
Title: Strip holder for use in a test strip meter
Inventor: HOUSE ALLEN
IPC: G01N37/00
Filed: 2001-08-10
Granted: 2003-01-21
Abstract: Test strip holders for use with test strip meters are provided. The subject test strip holders include at least an opening and a lip associated with the opening. The lip element of the subject holders is capable of forming a liquid seal with the upper surface of a test strip upon insertion of the test strip into the opening. In many embodiments, the strip holder is configured to at least partially encompass a sample application region of a test strip upon insertion of the strip into the opening. Also provided are meters on which the subject test holders are present, as well as methods for using the same.
Patent TW-502429-B (TW)
Title: Method of fabricating an ESD protection device
Inventor: CHEN LI-CHE
IPC: H01L23/60
Filed: 2001-10-18
Granted: 2002-09-11
Abstract: A method of fabricating an ESD protection device is disclosed. A trench having an inverted triangle cross-sectional profile is formed in a substrate. The trench is formed incorporated with a conventional STI process by using one mask. After that, an isolation layer is filled into the trench and a doped (S/D) region is formed on either side of the trench. The ESD device according to the present invention shows reduced punch through voltage and device dimension.
Patent TW-502315-B (TW)
Title: Fabrication method for polysilicon layer containing different dopants
Inventor: LIN YO-SHENG
IPC: H01L21/265
Filed: 2001-10-19
Granted: 2002-09-11
Abstract: A fabrication method for polysilicon layer containing different dopants is provided, which is applicable to a semiconductor substrate containing a PMOS transistor region and an NMOS transistor region. A first gate insulation layer and a first polysilicon layer with an N type dopant are formed sequentially on a semiconductor substrate. Next, a photoresist pattern is formed covering the first polysilicon layer of the NMOS transistor region. The semiconductor substrate of the PMOS transistor region is then exposed by etching the first polysilicon layer and the first gate insulation layer using the photoresist pattern as the etching mask. A second gate insulation layer is formed on the exposed semiconductor substrate. A second polysilicon layer with a P type dopant is formed on the semiconductor substrate and the first polysilicon layer. The second polysilicon layer is further planarized by chemical mechanical polishing until the upper surface of the second polysilicon layer in the PMOS transistor region is in approximately the same height as the surface of the first polysilicon layer.
Patent TW-575461-B (TW)
Title: Process for the preparation of a mixture of epsilon-caprolactam and/or epsilon-caprolactam precursors
Inventor: GUIT RUDOLF PHILIPPUS MARIA
IPC: B01J23/46
Filed: 2001-10-26
Granted: 2004-02-11
Abstract: Process for the preparation of a mixture of epsilon-caprolactam and epsilon-caprolactam precursors by reductively aminating 5-formylvaleric acid and/or 5-formylvalerate ester(s) in water with hydrogen and an excess of ammonia in the presence of a hydrogenation catalyst, wherein the process is conducted in a reactor of which the inside reactor wall material is a material containing at most 8 wt.% nickel.