baber/WOPTO huggingface dataset:
Patent TW-581713-B (TW)
Title: Mesoporous films having reduced dielectric constants
Inventor: MACDOUGALL JAMES EDWARD
IPC: C04B35/622
Filed: 2001-06-04
Granted: 2004-04-01
Abstract: A process provides a ceramic film, such as a mesoporous silica film, on a substrate, such as a silicon wafer. The process includes preparing a film-forming fluid containing a ceramic precursor, a catalyst, a surfactant and a solvent, depositing the film-forming fluid on the substrate, and removing the solvent from the film-forming fluid on the substrate to produce the ceramic film on the substrate. The ceramic film has a dielectric constant below 2.3, a halide content of less than 1 ppm and a metal content of less than 500 ppm, making it useful for current and future microelectronics applications.
Patent TW-587188-B (TW)
Title: Display device with channels having a gradually decreasing depth
Inventor: BEL MATHEUS GODEFRIDUS JOHANNU
IPC: H01J17/49
Filed: 2000-12-20
Granted: 2004-05-11
Abstract: A display device (10), such as PALC or PDP, comprises a plate (36) with channels (20) in which electrodes (30, 31) are provided. The peripheral parts (50, 51) extend in a plane (III) between the bottom plane (I) though the bottoms of the channels and a plane (II) through the top of the channels. The channels comprise a sloping part (55) gradually sloping from the bottom plane (I) to the peripheral part plane (III).
Patent TW-494665-B (TW)
Title: Mobile phone using an earphone with microphone feature
Inventor: MASUDA MASAHISA
IPC: H04M1/05
Filed: 2000-12-29
Granted: 2002-07-11
Abstract: The invention provide earphone with reversible microphone feature formed as the audio frequency apparatus for portable telephone (mobile phone), which can be made to meet the practically necessary -60 dB with electrical interlock to be accommodated in mobile phone and can be detachable for small mobile phone. Therefore, take the figure 3 as reference and make the electrical feedback become -60 dB; use the characteristics of earphone with microphone to integrate the compressor and developer in cancellation circuit. Furthermore, house the cord of earphone in the mobile phone so that the earphone won't fall apart from the mobile phone.
Patent TW-490803-B (TW)
Title: Chip structure having outer layer connection on the protection layer
Inventor: LIN MAU-SHIUNG
IPC: H01L21/768
Filed: 2001-01-04
Granted: 2002-06-11
Abstract: A kind of chip structure that has outer layer connection on the protection layer includes the followings: a substrate, which has the first surface; multiple devices, which are disposed on the surface layer of the first surface of the substrate; at least one ESD protection circuit, which is disposed on the surface layer of the first surface of the substrate; a laminated layer covering the first surface of the substrate, in which the laminated layer has multiple metal interconnects for connecting devices and the ESD protection circuit; a protection layer, which covers the laminated layer to expose the ends of the metal interconnects; and a wide conducting wire layer covering the protection layer, in which the wide conducting wire layer includes the dielectric material and at least an external layer connection interlacing inside the dielectric material such that the external layer connection is electrically connected with the metal interconnect.
Patent TW-468049-B (TW)
Title: Accelerometer
Inventor: MALVERN ALAN RICHARD
IPC: G01P15/13
Filed: 2001-01-16
Granted: 2001-12-11
Abstract: The accelerometer is linear having a substantially planar plate-like proof mass (9) mounted by four or more flexible mounting legs (8) each co-planar with the proof mass (9) to a substantially planar plate-like support (10) fixedly mounted relative to the proof mass (9) and co-planar therewith. In this way the proof mass (9) is mounted for linear movement in a sensing direction in the plane containing the proof mass (9), mounting legs (8) and support (10) to sense acceleration change applied to the accelerometer. At least two spaced apart substantially planar capacitor plates (11) each co-planar with the proof mass, mounting legs and support, are provided for sensing linear movement of the proof mass (9) in the sensing direction C. The proof mass (9), mounting legs (8), supports (10), and capacitor blades (11) are formed from a single sheet of silicon and the mounting legs (8) extend substantially perpendicularly to the sensing direction C. Restoring means are provided for returning the proof mass (9) in the sensing direction C towards a null position.
Patent TW-523922-B (TW)
Title: Small type module for taking picture
Inventor: NAKAJOH YASUO
IPC: H01L31/0232
Filed: 2001-02-26
Granted: 2003-03-11
Abstract: The invented small type module of taking picture is to simplify the mounting operation and reduce the cost. The invention is provided with the followings: a substrate; semiconductor device chip for taking picture; lens rim body; filter for blocking infrared (IR) light; lens and diaphragm; transparent component; and glue agent. The substrate is manufactured by non-metal containing ceramic and so on. The semiconductor device chip for taking picture contains two-dimensional CMOS picture and sensor mounted on the substrate. The lens rim body is mounted inside the substrate containing semiconductor device chip for taking picture. The filter for blocking IR light, the lens and the diaphragm are individually mounted corresponding to the lens rim body stated above. The transparent component is located between the substrate and the lens rim body so as to install the surface portion capable of protecting the semiconductor device chip for taking picture. The glue agent is used to install electrode sheet capable of covering the peripheral portion of the semiconductor device chip for taking picture, and is used to joint the peripheral portion of the transparent component.
Patent TW-579544-B (TW)
Title: Low-temperature polysilicon process
Inventor: JANG DING-JANG
IPC: H01L21/20
Filed: 2001-03-07
Granted: 2004-03-11
Abstract: There is provided a low-temperature polysilicon process, which comprises utilizing a physical vapor deposition system to form an amorphous film with micro crystal nucelli; next, performing an annealing process for 6 to 16 hours at a temperature of 400 to 500 DEG C to form a polysilicon film; and performing a semiconductor manufacturing process on the polysilicon film to form a low-temperature polysilicon thin-film transistor.
Patent TW-528788-B (TW)
Title: Process for producing light-emitting phosphor
Inventor: ONO KEIJI
IPC: H01J11/22
Filed: 2001-03-13
Granted: 2003-04-21
Abstract: A process for producing a vacuum ultraviolet ray-excited light-emitting phosphor comprising the steps of mixing a phosphor with an aluminum-based coupling agent, and calcining the mixture.
Patent TW-538252-B (TW)
Title: Semiconductor device testing apparatus and method for testing semiconductor device
Inventor: NAKAYAMA HIROYASU
IPC: G01R31/3183
Filed: 2001-04-24
Granted: 2003-06-21
Abstract: Disclosed is a test signal supplying apparatus for a semiconductor device testing apparatus that tests a plurality of semiconductor devices, which includes: a test pattern generating unit for outputting an input signal pattern to the semiconductor devices and receiving a match signal which indicates the semiconductor device, to which the input signal pattern is applied, is passed in the test; and a match-fail detecting unit for receiving the match signal to detect a semiconductor device that fails in the test and outputting a match-fail signal for identifying the semiconductor device that fails in the test; and a stop signal output unit connected to the match-fail detecting unit for receiving the match-fail signal from the match-fail detecting unit, storing the match-fail signal, and outputting a first stop signal that stops an application of the input signal pattern to the semiconductor devices that fail in the test identified by the stored match-fail signal.
Patent TW-487975-B (TW)
Title: Active CMOS pixel device and method for making the same
Inventor: CHI MIN-HWA
IPC: H01L21/28
Filed: 2001-04-30
Granted: 2002-05-21
Abstract: An active CMOS pixel device comprises: a substrate; a floating gate layer; and a control gate layer; in which the substrate comprises a well region and a first and second doped regions in the well region. The well region and the first and second doped regions are all exposed on the surface of the substrate, and the first and the second doped regions are separated from each other. The well region has a first polarity and the first and the second doped regions have a second polarity. The floating gate layer is installed on the well region and the boundary of the second doped region on the surface of the substrate, and is insulated from the well region and the second doped region and in electrical contact with the first doped region. The control gate layer is installed on the floating gate layer and is insulated from the floating gate layer.
Patent TW-516054-B (TW)
Title: Solid electrolytic capacitor
Inventor: SHIRAISHI SEIGO
IPC: H01G9/08
Filed: 2001-05-22
Granted: 2003-01-01
Abstract: A solid electrolytic capacitor is capable of realizing miniaturization and large capacitance and obtaining the connection, in particular electrical connection between the anodes, with low resistance and high reliability. The solid electrolytic capacitor includes: a laminate including a plurality of capacitor units in which a dielectric layer (2), a solid electrolytic layer (3) and a cathode layer (4) are laminated in this order on a predetermined surface of an anode (1) made of a valve metal; a sealing body (8) for sealing the laminate; and an anodic conductive elastic body (6) formed outside the sealing body (8) and electrically connected to the anode (1). The anodes (1) are adhered to each other via the conductive elastic body (6). In the solid electrolytic capacitor, a part of the anode (1) is exposed to the outside of the sealing body (8), and the exposed portion is covered with a plating layer and electrically connected to the anodic conductive elastic body (6) via the covered exposed portion.
Patent TW-515054-B (TW)
Title: Flip chip pad arrangement on chip for reduction of impedance
Inventor: LIU SHIUE-JUNG
IPC: H01L23/485
Filed: 2001-06-13
Granted: 2002-12-21
Abstract: A flip chip pad arrangement at least comprises: a chip core conductive bump array; four circles of conductive bump circles, in which every conductive bump of the first circle is connected with a power ring and conductive bumps in the second circle are connected with a ground ring; and a signal I/O terminal primarily connected with the conductive bump circles of the third circle and the fourth circle. Moreover, in order to reduce the inductance resistance, every conductive bump of the conductive bumps of the third circle and the conductive bumps in the conductive bump circle of the fourth circle show an interlaced alignment to reduce the bending of conductive trace. The redistribution layer (RDL) of the flip chip is formed beneath the passivation layer and above the top conductor layer. According to the I/O buffer region of top conductor layer of the chip, grounding and power bus, the RDL is defined to reduce the length of conductive trace of conductive bumps of the signal output terminal and the outer two circles of conductive bump circles.
Patent TW-508781-B (TW)
Title: Lead frame and semiconductor device
Inventor: TAKAIKE KAZUO
IPC: H01L23/28
Filed: 2001-06-15
Granted: 2002-11-01
Abstract: There is provided a lead frame facilitating forming of a recess in a heat dissipation plate by deep drawing, the recess having a bottom providing a mount surface for mounting a semiconductor chip thereon and being too deep to be formed by usual deep drawing, the lead frame also effectively preventing exfoliation between the heat dissipation plate and a sealing resin. The lead frame 10 includes a heat dissipation plate 18 for mounting an oblong semiconductor chip 12 thereon and inner leads 24 electrically connectable with the semiconductor chip 12 mounted on the heat dissipation plate 18 through wires 32 or the like, the lead frame 10 being characterized in that a mount surface of the heat dissipation plate 18 for mounting a semiconductor chip 12 thereon is provided by a bottom 14 of an oblong recess 16 formed by deep drawing and the oblong recess 16 has corners defined by bent portions provided with a through hole 26 formed by blanking.
Patent TW-508503-B (TW)
Title: Internet advertisement system
Inventor: OKAMOTO FUMITAKA
IPC: G06Q30/00
Filed: 2001-06-27
Granted: 2002-11-01
Abstract: An Internet advertisement system is provided which utilizes an advertisement server site and at least one partner web site. The partner web site provides to end-user terminals by e-mail a web page on which one or more banners provided from an advertisement server site (3) are inserted. When a user clicks a browsed banner, content linked to banner clicked on is retrieved from a content database and delivered to the user by e-mail.
Patent TW-508335-B (TW)
Title: Container and method of producing the same
Inventor: ROSEN AKE
IPC: B31B19/74
Filed: 2001-07-26
Granted: 2002-11-01
Abstract: A container (1) comprising a compartment (4) which is defined by flexible walls and whose volume depends on the relative position of the walls, two opposite side walls (2) being joined along a common connecting portion (5). The container is characterised in that a first gas-filled duct means (11) is arranged in the connecting portion (5) along at least a first side (12) of the container (1). The invention also concerns a method of producing such a container by forming at least one gap in said side walls (2) in connection with the forming of the connecting portion (5) and, in connection with the filling of the container (1), filling each gap with gas and sealing it to form a gas-filled duct (11, 16, 18).
Patent TW-540229-B (TW)
Title: Sensor capable of preventing non-symmetrical coupling effect caused by excessive exposure intensity
Inventor: HUANG JIAN-JANG
IPC: H04N3/14
Filed: 2001-08-14
Granted: 2003-07-01
Abstract: A sensor capable of preventing a non-symmetrical coupling effect caused by an excessive exposure intensity comprises: a sensor cell, a buffer, and a clamping circuit connected with the buffer. The clamping circuit outputs a clamping voltage larger than twice of the start voltage so that the sensor cell can receive a high intensity photo signal from the outside so that the sensor cell operates in a linear region in order to avoid the sensor cell from entering a non-linear region or even turned off and generating a non-symmetrical coupling effect, thereby ensuring the quality of the image.
Patent TW-589643-B (TW)
Title: Nonvolatile semiconductor memory device
Inventor: MAKUTA KIICHI
IPC: H01L21/8247
Filed: 2001-10-29
Granted: 2004-06-01
Abstract: A nonvolatile semiconductor memory device includes a memory array which comprises a plurality of memory cells of a type wherein predetermined voltages are applied to selected memory cells to change their threshold voltages, whereby information are stored therein according to the difference between the threshold voltages, and whose some memory cells are used as spare memory cells. The nonvolatile semiconductor memory device is provided with a latch circuit connected to each bit line of the memory array through a transmission switch. The memory array is capable of storing therein at least substitutional information for replacing a defective bit by the spare memory cell. The substitutional information is transferred from the memory array to the latch circuit through the transmission switch and held in the latch circuit.
Patent TW-524766-B (TW)
Title: Steering device for bicycle and method of folding the steering device
Inventor: NAKAGOMI YOSHIO
IPC: B62K15/00
Filed: 2001-12-06
Granted: 2003-03-21
Abstract: To make it possible to fold up a handle in a small space. A bolt 76 is engaged with an eccentric shaft 72 provided at a lower end portion 71 of a handle post 7, and penetrates through a stem supported on a head pipe 21. A nut 78 is mated with an end portion of the bolt 76, and a stopper 79 with a bolt 80 as a pivot is intermediately disposed between the nut 78 and the stem 77. At the time of folding, a lever 73 attached to the eccentric shaft 72 is turned to deviate the bolt 76, thereby loosening the tension of members 71, 77, 79, 78. Next, the stopper 79 is raised, and the handle post 7 is rotated to the left side with the stem 77 as a shaft. After the left rotation by 90 degrees to set the handle along the vehicle body, the handle is turned in a substantially vertical plane along the vehicle body with the bolt 76 as a shaft to move the handle to the lower side, thereby finishing the folding.
Patent TW-I242821-B (TW)
Title: Manufacturing method of flip chip package
Inventor: FANG REN-GUANG
IPC: H01L21/60
Filed: 2001-12-24
Granted: 2005-11-01
Abstract: The present invention discloses a manufacturing method of flip chip package, which forms a bump having all planar contour on a chip, utilizes flip chip bonding technique to melt and bond the bumps together, or melts and bonds bump and the contact on the substrate. Using the plane on the bump can lower the contact stress while mutually bonding and enhance the reliability of packaging device.
Patent TW-559782-B (TW)
Title: Real-time music composition method
Inventor: LIN JENG-YUAN
IPC: G10L13/00
Filed: 2001-12-31
Granted: 2003-11-01
Abstract: The present invention uses the computer to real-time compose the music, which first records some basic word sound, which is the sound database of the system; after entering the score and lyrics for a song by the user, the music synthesizer produced according to the present invention can real-time synthesize the music. The major functions of the synthesizer include: arbitrarily rising or falling the tone, adjusting the volume, and scaling the tone lengths.
Patent TW-546665-B (TW)
Title: Column repair circuit of semiconductor memory
Inventor: LEE HYUNG-DONG
IPC: G11C29/04
Filed: 2002-01-15
Granted: 2003-08-11
Abstract: A column repair circuit of a semiconductor memory is disclosed, in which a column repair efficiency is increased in a row flexible redundancy structure. For a repair of a semiconductor memory which divides unit memory devices into an array unit, the memory devices are arranged by row lines and column lines crossing to each other. The column repair circuit of a semiconductor memory includes a plurality of column fuse boxes for outputting a column redundant signal for a repair by corresponding to a redundancy column line included in the respective arrays; and an array address inverter for outputting an array address which inputs and inverts a self-pair signal which checks that a row repair is performed in a corresponding array or another array address and a corresponding array address and for coding and outputting an address of a replaced array in case that a row repair is replaced in another array.
Patent TW-526313-B (TW)
Title: Screw pump and multiscrew extruder having a screw pump of this type
Inventor: CHSZANIECKI GREGOR
IPC: B29C48/58
Filed: 2002-02-21
Granted: 2003-04-01
Abstract: The invention relates to a screw pump having an inlet cross section and an outlet cross section for delivering flowing media, in particular plastic melts and rubber mixtures, having at least two screw shafts (20, 21) which are arranged with an axial spacing a in a pump housing (3), which has at least two partly overlapping housing bores (4, 5) which pass through the pump housing (3) in the longitudinal direction, which shafts can be driven in rotation in the same direction and on which a large number of arrangements of substantially closely intermeshing single-turn screw elements (1, 2) are arranged firmly so as to rotate with them. The invention also relates to a multiscrew extruder having a screw pump of this type.
Patent TW-529181-B (TW)
Title: Optical data connector
Inventor: SATO SHUNSUKE
IPC: H05K3/34
Filed: 2002-02-27
Granted: 2003-04-21
Abstract: The present invention is to provide an optical connector 20a which comprises a carrier 22, optical element assembly 24, circuit substrate 26, and spacer 32. The PGA substrate 22 comprises substrate 22a and a plurality of conductive leads 22b. The circuit substrate 26 has a pair of surfaces, on which are loaded with electronic components 34a-34e. The optical element assembly 24 comprises a semiconductor optical element 24f. The semiconductor optical element 24f is connected to a conductive layer on the circuit substrate 26. The spacer 32 is used to isolate the circuit substrate from the PGA substrate 22. Because the circuit substrate 26 which is isolated from the PGA substrate 22, is provided, the electronic components 34a-34e can be installed on both surfaces of the circuit substrate 22. Therefore, the loading area for the electronic components can be increased.
Patent TW-562932-B (TW)
Title: Method for manufacturing probes on a substrate and a probe card with the probes
Inventor: LIU JOHN
IPC: G01R1/06
Filed: 2002-03-19
Granted: 2003-11-21
Abstract: A method for manufacturing probes on a substrate is provided. A mold is installed in front of a nozzle of injection device, the mold forms a plurality of holes. A semi-molten metal is filled inside the injection device. Then, the injection device injects the semi-molten metal to a plurality of contacts of a provided substrate, so the shape of predetermined probes is formed on the contacts by injection molding.
Patent TW-554062-B (TW)
Title: ZnS-SiO2 sputtering target material and optical recording medium using the same to form ZnS-SiO2 phase transition type optical disk protective film
Inventor: YAHAGI MASATAKA
IPC: G11B7/2578
Filed: 2002-03-22
Granted: 2003-09-21
Abstract: This invention provides a ZnS-SiO2 sputtering target for forming a protective film on an optical disk, characterized in that it comprises one or more selected from Na, K and oxides thereof as an additive in an amount of 0.001 to 5 wt%; and an optical recording medium having a ZnS-SiO2 protective film for a phase change type optical disk formed by using the sputtering target. The sputtering target allows the stable preparation at a low cost of a ZnS-SiO2 sputtering target which has fine crystal grains and a high density of 95% or more and can leads to increase uniformity of the film formed and also the production efficiency for the film.
Patent TW-552552-B (TW)
Title: Audio playback system and method
Inventor: JAU NIAN-SHENG
IPC: G06F3/18
Filed: 2002-04-25
Granted: 2003-09-11
Abstract: The invention relates to an audio playback system and method using software along with computer structure to provide audio playback function under power-off condition of computer. The system includes an operating system installed in recording medium of a computer and a software playback program, which can use a CPU of computer bundled with a RAM to download operating system and software playback program for reading an audio file of an audio source apparatus and proceeding audio playback with a output apparatus under condition of letting main power off of computer while leaving partial components power on. As such, when user intends to have audio playback function under computer power-off condition, just need to provide power to CPU, RAM, recording medium, output apparatus, audio source apparatus and a bridge circuit bridging with the said components only without activating main power.
Patent TW-540160-B (TW)
Title: Schottky structure on GaAs semiconductor substrate
Inventor: LI CHENG-SHR
IPC: H01L29/12
Filed: 2002-07-12
Granted: 2003-07-01
Abstract: The present invention provides a Schottky structure on GaAs semiconductor substrate, which comprises: a GaAs semiconductor substrate; a Ti metal layer distributed on the GaAs semiconductor substrate to form the Schottky contact; a diffusion barrier layer on the metal Ti layer to block the diffusion of metal layer; and a first Cu metal layer on the diffusion barrier layer. By using the diffusion barrier layer, the Cu metal in the subsequent process can be directly plated on the first Cu metal layer.