Patent SG-11201900816T-A (SG)
Title: A hybrid memory device
Inventor: RYAN KEVIN J
IPC: H01L27/108
Filed: 2017-08-21
Abstract: MemoryController ; ' W O 20 18/0 44607 Al FIG. 6 600 Emamal Comp: moots (12) INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY (PCT) (19) World Intellectual Property Organization International Bureau (43) International Publication Date 08 March 2018 (08.03.2018) WIPO I PCT mu °million °nolo olomomiloolicomio oimIE (10) International Publication Number WO 2018/044607 Al (51) International Patent Classification: HO1L 2 7/1 0 8 (2006.01) (21) International Application Number: PCT/US2017/047787 (22) International Filing Date: 21 August 2017 (21.08.2017) (25) Filing Language: English (26) Publication Language: English (30) Priority Data: 15/252,886 31 August 2016 (31.08.2016) US (71) Applicant: MICRON TECHNOLOGY, INC. [US/US]; 8000 S. Federal Way, Boise, Idaho 83716-9632 (US). (72) Inventors: RYAN, Kevin J.; 8000 S. Federal Way, Boise, Idaho 83716-9632 (US). PRALL, Kirk D.; 8000 S. Feder- al Way, Boise, Idaho 83716-9632 (US). RAMASWAMY, Durai Vishak Nirmal; 8000 S. Federal Way, Boise, Idaho 83716-9632 (US). QUINN, Robert; 8000 S. Federal Way, Boise, Idaho 83716-9632 (US). (74) Agent: HARRIS, Philip W.; Holland & Hart LLP, P.O. Box 11583, Salt Lake City, Utah 84147 (US). (81) Designated States (unless otherwise indicated, for every kind of national protection available): AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW. (84) Designated States (unless otherwise indicated, for every kind of regional protection available): ARIPO (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW), Eurasian (AM, AZ, BY, KG, KZ, RU, TJ, TM), European (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR), OAPI (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG). = (54) Title: A HYBRID MEMORY DEVICE (57) : Methods, systems, and devices for a hybrid memory device are described. The hybrid memory device may include volatile and non-volatile mem- ory cells on a single substrate, or die. The non-volatile memory cells may have ferroelectric capacitors and the volatile memory cells may have paraelectric or linear dielectric capacitors for their respective logic storage components. In some examples, the volatile memory cells may be used as a cache for the non-volatile memory cells. Or the non-volatile memory cells may be used as a back-up for the volatile memory cells. By placing both types of cells on a single die, rather than separate dies, various performance metrics may be improved, including those re- lated to power consumption and operation speed. [Continued on next page] WO 2018/044607 Al MIDEDIMOMMIDIIMEEMOMMEHIMIHMEEM# Declarations under Rule 4.17: as to applicant's entitlement to apply for and be granted a patent (Rule 4.17(11)) as to the applicant's entitlement to claim the priority of the earlier application (Rule 4.17(iii)) Published: — with international search report (Art. 21(3))