Patent GB-1047942-A (GB)
Title: Gas etching of semiconductor material
IPC: C23C16/40
Filed: 1963-04-22
Abstract: <PICT:1047942/C6-C7/1> Si or Ge is etched or cleaned by placing a crystal element thereof on a planar support, positioning the support in a closed reaction chamber, heating the crystal element at a temperature below the melting point thereof and above a minimum temperature of 700 DEG C. in the case of Ge and of 850 DEG C. in the case of Si, and passing a mixture of H2 gas and a proportion by volume of gaseous hydrogen halide (e.g. HCl) less than that of the H2 over the heated crystal element.  SiO2 may be used as a mask during the etching and also during subsequent growth of an epitaxial layer of Si or Ge on the crystal, the Si or Ge not readily depositing on the SiO2 cleaned during the etching.  The Si or Ge may be grown by flowing a mixture of H2 with SiCl4, GeCl4 or SiCl3H over the crystal element while heating it.  The expitaxial layer may be doped while it grows by adding a hydride of a doping impurity to the gases, e.g. PH3, AsH3 or diborane.  Two epitaxial layers may be deposited to build up a PNP or NPN structure (e.g. as in Fig. 6, not shown).  The SiO2 may be formed as a complete layer over the crystal element and be etched away by HF in the parts to receive the epitaxial layer. The SiO2 may be formed on Si by oxidation in an atmosphere of O2 or water vapour at 750-1200 DEG C. and may be formed on Si or Ge by hydrolysis of SiCl4 vapour by H2O vapour.  Fig. 1 shows apparatus for performing the various treatments comprising a quartz reaction chamber 1, Ge or Si wafers 2 on a planar quartz slab 3 resting on a graphite or Mo susceptor 4 heated by an R.F. induction coil 5. Figs. 2-5 (not shown) illustrates forming a diode. Fig. 6 (not shown) illustrates additional processing to make a transistor. Fig. 7 (not shown) illustrates making two diode-like structures. Figs. 8 and 9 (not shown) illustrate making mesa type transistors.ALSO:Si is etched or cleaned by placing a crystal element thereof on a planar support, positioning the support in a closed reaction chamber, heating the crystal element at a temperature below the melting point thereof and above a minimum temperature of 850 DEG  C., and passing a mixture of H2 gas and a proportion by volume of gaseous hydrogen halide (e.g. HCl) less than that of the H2 over the heated crystal element. SiO2 may be used as a mask during the etching and also during subsequent growth of an epitaxial layer of Si on the crystal.  The Si may be grown by flowing a mixture of H2 with SiCl4; or SiCl3H over the crystal element while heating it.  The epitaxial layer may be doped by adding a hydride of a doping impurity to the gases, e.g. PH3, AsH3 or diborane.  Two epitaxial layers may be deposited to build up a PNP or NPN <PICT:1047942/C1/1> structure (e.g. as in Fig. 6, not shown). The SiO2 mask may be formed as a complete layer over the crystal element and be etched away by HF in the parts to receive the epitaxial layer. The SiO2 may be formed on Si by oxidation in an atmosphere of O2 or water vapour at 750-1200 DEG  C. or by hydrolysis of SiCl4 vapour by H2O vapour.  Fig. 1 shows apparatus for performing the various treatments comprising a quartz reaction chamber 1, Si wafers 2 on a planar quartz slab 3 resting on a graphite or Mo susceptor 4 heated by an R.F. induction coil 5.