baber/WOPTO huggingface dataset:
Patent JP-S61166974-A (JP)
Title: Coated sintered hard alloy
Inventor: HONDA HARUHIKO
IPC: C22C29/08
Filed: 1985-01-17
Abstract: PURPOSE:To improve the chipping resistance of a sintered hard alloy without reducing the wear resistance by forming a specified hard coating layer on the surface of the sintered hard alloy having a two-phase structure consisting of hard and soft phases. CONSTITUTION:A sintered hard alloy is provided with a composition contg. one or more kinds of compounds selected among the carbides, nitrides and carbonitrides of the group IVa, Va and VIa metals as the 1st component and one or more among Co, Ni, Fe, W, Mo and Cr as the 2nd component. A single or multiple coating layer of a compound selected among the carbides, nitrides, carbonitrides, oxycarbides, oxynitrides and oxycarbonitrides of the group IVa, Va and VIa metals, Al oxide and Al oxycarbide is formed on the surface of the sintered hard alloy having the hard and soft phases. The thickness of the coating layer is about 0.5-20mum. The coated sintered hard alloy has superior chipping resistance and can be used more widely.
Patent JP-H01183496-A (JP)
Title: Production of single crystal oxide superconducting thin film
Inventor: FUJITA JUNICHI
IPC: H01B13/00
Filed: 1988-01-14
Abstract: PURPOSE:To obtain the title thin film of a-axis orientation, high in superconductivity transition temperature, by irradiating the substrate with oxygen ions at specified conditions during a process in which a target is sputtered with neutral ion beams to form the title thin film of target composition on a SrTiO3 substrate. CONSTITUTION:A (100) substrate 12 consisting of SrTiO3 single crystal put in a vacuum tank 1 evacuated using a pump 3 is heated to temperatures of 575 to 700 deg.C and stabilized. Thence, a plasma formed in an ion beam source 4 with an inert gas (e.g., Ar)5 is drawn as ion beams 9, which are exposed to the electron shower from an electron source to effect neutralization. A target 11 of composition of the formula (-0.2<=x<=0.2; -0.4<=y<=0.4; -0.6<=z<=0.6) is then sputtered with the resulting neutral ion beams 9'; at the same time, said substrate 12 arranged against the target 11 is irradiated with oxygen ion beams 14 with an acceleration voltage of 5-60V and ionic current density of >=0.3mA/cm<2> from an oxygen ion source 13 to generate mixed plasma comprising the inert gas (e.g., Ar)5 and oxygen 15, thus forming the objective thin film of target composition.
Patent JP-S58124614-A (JP)
Title: Cleaning method of surface of film or sheet
Inventor: UCHIKAWA YASUTAKE
IPC: B29D1/00
Filed: 1982-01-20
Abstract: PURPOSE:To obtain a clean film which is useful as a wrapping material of medical instruments by such an arrangement wherein a web of film to be cleaned is brought in contact with the surface of a roll of synthetic resin film on which a layer of adhesive agent is provided, and dust particles adhered by static electricity to the surface of the film to be cleaned are removed by making the film run over the adhesive roll. CONSTITUTION:A roll 1 is formed by winding a long strip of synthetic resin (e.g. polyethylene, etc.) film or cellophane having a layer of an adhesive agent on its one side, so that the layer of adhesive agent comes outside, and a film or sheet of material to be cleaned 2 is made run over the roll 1 so that its surface to be cleaned is brought to contact with the adhesive layer of the roll 1 and by so doing, the surface of material to be cleaned is cleaned. As an adhesive agent, it is desirable to use an adhesive of acryl family of which adhesive strength is 30-200g/25mm..
Patent JP-S60151889-A (JP)
Title: Module memory device
Inventor: OBARA TAKAHIRO
IPC: G11C11/34
Filed: 1984-01-20
Abstract: PURPOSE:To read information of plural bits serially, to enhance action margin and to reduce power consumption by forming time series plural chip selection signals from a chip selection signal supplied from the outside and activating plural semiconductor memory chips provided inside in time series. CONSTITUTION:Chip selection signals -CS0-(-CSn) formed in time series by the next timing signal generator circuit TG are supplied to chip selection signal terminals of plural semiconductor memory chips RAM0-RAMn. The timing generator circuit TG receives chip selection signals -CS supplied from the outside, forms timing signals -CS0-(-CSn) generated in time series, and supplies them each semiconductor memory chips RAM0-RAMn. In order to form such timing signals -CS0-(-CSn) the timing generator circuit TG is provided with a shift registor.
Patent JP-H01183189-A (JP)
Title: Semiconductor laser
Inventor: IKUWA YOSHITO
IPC: H01S5/223
Filed: 1988-01-14
Abstract: PURPOSE:To radiate a high output laser beam of basic mode and to obtain a semiconductor laser having a low threshold value by providing an active region having a refractive index distribution of small refractive index difference near the end face of a laser beam radiating side and a refractive index distribution of large refractive index difference in other region. CONSTITUTION:A thickness t2 is reduced and an equivalent refractive index difference N2 is increased in a region except the vicinity of a resonator end face 4, while a thickness t1 is increased and an equivalent refractive index difference N1 is decreased near the end face 4. Accordingly, a light enclosure to an active region 1 is improved in the region except the end face 4 of the laser light radiating side, a laser light containing a high order mode excited by the region except the vicinity of the end face having large refractive index difference near the end face 4 of the laser beam radiating side is converted to a basic mode, and then irradiated. Thus, the invasion of the laser beam to a low refractive index region 3 is increased and its optical density is decreased, and its output can be enhanced.
Patent JP-S5291383-A (JP)
Title: Semiconductor memory device
Inventor: MOCHIZUKI HIDENOBU
IPC: H01L29/788
Filed: 1976-01-26
Abstract: PURPOSE:To reduce the width of voltage and signal for write-in and the leakage of write-in electric charge, by increasing the number of traps at the Al2O3 layer and SiO2 layer, thru making the gate section of the memory transistor as the gate electrode, Si3N4 layer, Al2O3 layer, SiO2 layer and MNAOS configuration of the semiconductor base.
Patent JP-H03211110-A (JP)
Title: Screw aligning device
Inventor: IMADA TETSUO
IPC: B65G47/14
Filed: 1990-01-17
Abstract: PURPOSE:To improve aligning capacity by providing a rotary blade, not to be brought into contact with aligned screws, on a shoot for conveying screws by the neck parts supported pendantly so as to eliminate nonaligned screws. CONSTITUTION:Screws for a supply drum 7 are supplied to the screw receiver 3a of a shoot 3, then supported pendantly by the screw neck parts at the aligning part 3b of the shoot 3 and conveyed toward the part 3c by vibration applied by a vibrator 8. Meanwhile, a rotary blade 5 is rotated to send nonaligned screws placed in nonalignement on the shoot 3 flying to eliminate them. With this constitution, screw aligning capacity can be ensured even without holding a screw aligning device horizontally.
Patent JP-S56108635-A (JP)
Title: Paper feeder
Inventor: KANEKO TAMAKI
IPC: B65H3/52
Filed: 1980-01-24
Abstract: PURPOSE: To simplify the structure of an upper side paper-feeding system by slanting a paper-placing base and equipping with paper-feeding rollers and the like.  
     CONSTITUTION: A paper-placing base 1 is slanted by an angle θ for sliding down laminated papers by their self-weight, and provided with a paper-feeding roller 2, a separation roller 3, and a regulation plate 7 at the top and paper-end arrangement rollers 6 and 6' at the rear end. In this construction, when a sheaf of papers of B5 size is placed on a paper-placing base 1, the top of the paper sheaf is brought near the paper-feeding roller 2 along the regulation plate 7, while its rear end is placed on the paper-end arrangment roller 6 distant from the center of the paper- feeding roller 2 by the length of a B5 size paper, a distance L 1 , and the lowest paper is fed by one by rotations of the paper-end arrangement roller 6, the paper- feeding roller 2, and the separation roller 3. Consequently, the operation of paper- feeding can be continued without using a mechanism to move the laminated papers vertically. 
     COPYRIGHT: (C)1981,JPO&Japio
Patent JP-H11269104-A (JP)
Title: Production of 1,4-bis(difluoroalkyl)benzene derivative
Inventor: TEJIMA SEIICHI
IPC: C07C22/08
Filed: 1999-01-14
Abstract: PROBLEM TO BE SOLVED: To produce the subject compound at a low cost in a simple process without requiring a special device, by reacting a specific compound with fluorine. SOLUTION: This method for producing a 1,4-bis(difluoroalkyl)benzene derivative of formula II [(k) is 0-4; G is a halogen, an alkyl, a perfluoroalkyl or an alkoxy; (m) is 0-4] comprises reacting a compound of formula l  X1 -X4 are each oxygen or sulfur; Y1 and Y2 are each Cn H2n [(n) is 2 or 3]} with fluorine (for example, a fluorocompound such as hydrogen fluoride pyridine, cesium fluoride or hydrogen fluoride). The reaction is preferably carried out in the presence of a bromine compound (for example, N-bromosuccinimide, 1,3- dibromo-5,5-dimethylhydantoin) in an organic solvent (for example, dichloromethane, chloroform, 1,2-dichloromethane) in an atmosphere where the gaseous phase portion of the reaction system has a water content of <=100 vol ppm.
Patent JP-H04247933-A (JP)
Title: Joint tape for inner liner of tubeless tire
Inventor: MATSUMOTO HIROSHI
IPC: B60C5/14
Filed: 1991-01-25
Abstract: PURPOSE:To prevent the separation of a tape end due to a mold releasing agent or the occurrence of cracks while keeping the reinforcing effect of an inner liner relative to a joint part by effecting the 200% modulus (m) of a joint tape before vulcanization and the optimization of thickness (a). CONSTITUTION:The thickness (a) mm and 200% modulus (m) kg f/cm<2> before vulcanization of a joint tape which is adhered to the joint part 2 of an inner liner 1 in a tube tire is allowed to be in the range of the ensuing formula, that is a <=0.2, 2.5<=a.m<=15.
Patent JP-H06214607-A (JP)
Title: Velocity type controller
Inventor: KAWAURA MASATO
IPC: G05B11/36
Filed: 1993-01-21
Abstract: PURPOSE:To prevent such a case where a velocity type controller including a proportional action is easy to response adversely its manipulation output in a narrow proportion band. CONSTITUTION:The controller consists of a limiter 3 having a function to limit the control deviation (e) in a small range around zero, a P computing element 4, an I computing element 5, a D computing element 6, an integrator 7, and a D/A converter 8. The output of the integrator 7 is added to the output of the element 6 so that a manipulated variable (z) is obtained and supplied to the converter 8. The output of the converter 8 is defined as the manipulation output MV. When the deviation (e) is limited at + or -1.5 times as much as a comparison band by the limiter 3, the velocity type manipulation output DELTAMV varies just by + or -150% regardless of variation of the set value or the measurement value. Therefore an overflow state is never caused in the middle of an operation and an adverse response can be prevented even if the operational resolution is set at 0.01% as long as the operational digit number is equal to about (3X10<4>).
Patent JP-H08204749-A (JP)
Title: Buffer management method for packet exchange
Inventor: UTSUKI TSUTOMU
IPC: H04L12/861
Filed: 1995-01-23
Abstract: PURPOSE: To prevent a data packet from being aborted even when non data packet is repetitively received by allocating some of plural buffers exclusively for non data packets. CONSTITUTION: When a packet processing section 1 judges a reception packet to be a data packet, the section 1 sets a parameter of a data reception buffer comprising a head address of the reception buffer and a reception byte number to a DMA control section 43 in a link control section 4. On the other hand, when the processing section 1 judges the received packet to be a non-data packet, the section 1 sets a parameter of a non-data reception buffer comprising a head address of the reception buffer and a divided byte number of the buffer to the control section 43. A new buffer is used every time a packet is received, but in the case of reception of non-data packet, some of data packets are divided into a prescribed number and no supplement of buffers is conducted.
Patent JP-H07219777-A (JP)
Title: Fuzzy rule construction method and its system
Inventor: HIRAYAMA YASUHIRO
IPC: G06F9/44
Filed: 1994-01-28
Abstract: PURPOSE:To facilitate editing such as adding, correcting, deleting, etc., a fuzzy rule. CONSTITUTION:Concerning the fuzzy rule stored in a knowledge storage part 1, a conversion processing part 4 generates first display data concerning in a state of a matrix, which consists of the name of a membership function given to first and second input variables and the name of a membership function given to corresponding output variables and second display data concerning the other fuzzy rules which can not be expressed in first display data with an input from an input part 2 and stores them in a display data storage part 7. At the time of updating the fuzzy rule, the conversion processing part 4 reads pertient first and second display data to display them on a display part 3 with the input from the input part 2, and adds, corrects and deletes the fuzzy rule with respect to first and second display data with the input from the input part 2 so as to update display data and the contents of the pertient fuzzy rule in the knowledge storage part 1.
Patent JP-H0421779-A (JP)
Title: Vacuum treating device
Inventor: YONEYAMA SHIMAO
IPC: C23C16/44
Filed: 1990-01-17
Abstract: PURPOSE:To eliminate the effect of a residual gas and to homogeneously vacuum-treat a body by providing a gate between a chamber for housing a cassette contg. the body and a process chamber to prevent the flowing of a gas remaining in the process chamber into the housing chamber. CONSTITUTION:This vacuum treating device is formed with a chamber 40 for housing a cassette 42 contg. a body 12 to be treated, a load-lock chamber mechanism and a process chamber, and the body 12 discharged from the cassette 42 is housed in a process chamber 10 and vacuum-treated. The housing chamber 40 is held at normal pressure when the cassette 42 is replaced and at negative pressure when the cassette is introduced into a load-lock chamber 30. A first gate 34 is provided to the mechanism, and the chamber 30 is closed when the body 12 is housed. A second gate 10a is opened, the body 12 is housed in the process chamber 10 from the chamber 30, then the second gate 10a is closed, and vacuum treatment is carried out.
Patent JP-H05193844-A (JP)
Title: Lift controller for article lift device
Inventor: TSUJIMOTO KAZUFUMI
IPC: B66B1/48
Filed: 1992-01-21
Abstract: PURPOSE:To improve reliability by generating a report of abnormality when a lift part is not detected by a passage detecting means even when the actual downlift amount from a downlift starting position reaches a downlift amount of reaching a passing point from the prestored downlift starting position. CONSTITUTION:In a control part 13, a downlift amount of a lift part 3 lowered from a downlift starting position till reaching a passing point L is obtained by information of a rotary encoder 12 and stored in a memory 16. Even when the downlift amount of the lift part 3, by its actual lowering action, from the downlift starting position reaches the downlift amount stored in the memory 16, a photo sensor 15 is decided abnormal by a discriminating means 102 when a passage signal is not output by the photo sensor 15. When decided abnormal, an abnormality informing means 103 is actuated to inform of abnormality. A lift control means 101 is set to a low speed such that the lift part 3 can be detected by the photo sensor 15 in a low position side, and further a speed decreased by a signal of the photo sensor 15 discriminated abnormal is set to a maximum lowering speed to continue lift control.
Patent JP-S60151134-A (JP)
Title: Alarm device for vehicle
Inventor: KODERA HARUYUKI
IPC: B60K28/06
Filed: 1984-01-20
Abstract: PURPOSE:To detect a state in which a driver is not awake and to give the driver an alarm, by providing an alarm signal generating circuit for monitoring a detected steering angle and for generating an alarm signal. CONSTITUTION:A steering angle detector 18 outputs a detection signal 100, which is supplied to an alarm signal generating circuit 24. The circuit 24 in turn supplies an alarm signal 102 to an alarm device 26. The circuit 24 is composed of a micro-computer as a main component, in which a first operational circuit 28 and a memory 30 are supplied with the signal 100. A monitoring reference value 104 read out from a memory 32 and a steering monitor value 106 obtained by a second operational circuit 30 are supplied to a comparator circuit 34. The monitor reference value 104 is obtained from average value of total steering amounts successively obtained in a predetermined time T upon starting of operation and a standard deviation value, and it is held in the memory 32, so that when a value is judged to exceed the reference value 104 an alarm signal 100 is generated.
Patent JP-S63279065-A (JP)
Inventor: KUROSAWA MOKICHI
IPC: F25B15/00
Filed: 1987-01-19
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S57122561-A (JP)
Title: Insulative semiconductor substrate and manufacture thereof
Inventor: NAKAJIMA SADAO
IPC: H01L27/00
Filed: 1981-01-22
Abstract: PURPOSE:To preferably prepare a C-MOS forming substrate by forming by an ion implantation an insulating layer having stoichoimetric composition ratio to retain a part of a semiconductor on the surface side of the substrate, and injecting a semiconductor forming element in the layer to convert a part into semi-insulating property. CONSTITUTION:O ions 11 are, for example, implanted in an Si substrate 10, and an insulating layer (SiO2)12 which can sufficiently satisfy the stoichiometric composition ratio is buried in the substrate. Then, Si ions 14 are implanted in the layer 12, and the layer 12 is partly converted into a semi-insulating layer 15. At this time the composition ratio of the layer 12 contacted with a semiconductor layer 13 at the surface side is set so as not to be changed. Subsequently, an epitaxial layer is accumulated on the layer 13, and MOSFETs 8, 9 are formed by an ordinary method. The strain of a depletion layer which deteriorates the withstand voltage can be corrected by an electrostatic shielding effect due to the conductivity of the semi-insulating layer to convert the FET into high dielectric strength. Further, since the potential variation of the substrate 10 can be absorbed, the substrate effect is reduced by applying to a complementary element, thereby stabilizing the characteristics.
Patent JP-S61170344-A (JP)
Title: Production of liquid extract of black tea
Inventor: OKONOGI SHIGEO
IPC: A23F3/20
Filed: 1985-01-22
Abstract: PURPOSE:To obtain the titled extract liquid for ice tea, having high clarity and excellent taste and flavor, by dissolving chitosan in an aqueous solution of edible organic acid, adding the solution to cooled extract of black tea, and removing the produced coagulum. CONSTITUTION:Chitosan is dissolved in an aqueous solution of an edible organic acid, and the solution (preferably having a pH of <=4) is added to cooled extract of black tea. The objective extract is obtained by removing the produced coagulum from the mixture. The amount of chitosan used is preferably about 1-2wt% based on the dry weight of the tea leaves used in the extraction process.
Patent JP-H02189686-A (JP)
Title: Method for correcting free curved surface based upon substitution of patch line
Inventor: UMEHARA TAKAKO
IPC: G05B19/4093
Filed: 1989-01-19
Abstract: PURPOSE:To simply create a surface into which numerical information is accurately integrated or a surface reduced its disturbance by substituting a free curved line created by dot group data applied from the external for a patch line to correct the surface. CONSTITUTION:Dot group data are data obtained by digitizing an object 3 by a digitizer 2 and a curved surface 1 can be obtained by setting up a floppy disk 4 on a computer body 5 and executing arithmetic processing. Or, the curved surface 1 can be also created by using a CAD, a graphic display 6 and a tablet 7. It is supposed that the patch line 8 on the curved surface 1 is disturbed. The disturbed patch line 8 on the curved surface 1 is substituted by a free curved line 9 formed by the CAD based upon the numerical information on the drawing or a free curved line 9 individually digitized by the digitizer 2. Consequently, the numerical information can be accurately integrated and a surface reduced its disturbance can be created.
Patent JP-S58127506-A (JP)
Inventor: SANO MASATAKA
IPC: H02B5/00
Filed: 1982-01-22
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H08197147-A (JP)
Title: Snap ring groove forming device of clutch drum
Inventor: TANAKA HARUO
IPC: B21D15/06
Filed: 1995-01-24
Abstract: PURPOSE: To form a snap ring groove with the roll over on a drum opening end side being suppressed small, and without causing any fall or crack in a device where the snap ring groove is formed in the half blanking in the tooth tip part of the internal gear spline to be formed on the circumferential wall part of a clutch drum. CONSTITUTION: A punch 9 to be bitten in the tooth tip part B of a clutch drum, and a work receiver 8 to be abutted on the outer circumferential surface of the clutch drum are provided. A clearance groove 8a to allow the outward extrusion of the chip accompanied by the biting of the punch 9 is formed in the work receiver 8. The clearance S between the groove wall surface on the drum opening end side of the clearance groove 8a and the punch 9 is <=4% of the thickness of the tooth tip part B to reduce the roll over L on the drum opening end side of the snap ring groove C. The radius R of curvature of a corner part on the drum opening end side of the clearance groove 8a is >=0.5mm so as to prevent the fall of the groove wall on the drum opening end side of the snap ring groove C and the generation of cracks.
Patent JP-S56108743-A (JP)
Title: 3-nitro-2-hydroxy-4-phenylbutyric acid derivative, its ester and preparation thereof
Inventor: FUJII TADASHI
IPC: C07C229/34
Filed: 1980-01-30
Abstract: NEW MATERIAL:A 3-nitro-2-hydroxy-4-phenylbutyric acid derivative and an ester thereof expressed by formula I (R 1  is H, OH, lower alkyl, etc.; R 2  is H or ester residue).  
     EXAMPLE: 3-Nitro-2-hydroxy-4-phenylbutyric acid.  
     USE: A precursor for synthesizing Bestatin useful as an anticancer agent, and readily convertible into 3-amino-2-hydroxy-4-phenylacetic acid derivative of formula II or an ester thereof which is a synthetic raw material by reducing the compound of formula I.  
     PROCESS: A 2-phenylnitroethane derivative of formula III is reacted with a glyoxylic acid of formula IV or an ester thereof in an organic solvent, e.g. methanol or acetone, in the presence of a base, e.g. pyridine or triethylamine, to give the compound of formula I. 
     COPYRIGHT: (C)1981,JPO&Japio