baber/WOPTO huggingface dataset:
Patent TW-427005-B (TW)
Title: Removal of silicon oxynitride on a capacitor electrode for hemispherical grain growth
Inventor: CHIOU RUNG-JAU
IPC: H01L27/108
Filed: 1999-07-20
Granted: 2001-03-21
Abstract: A method of forming a capacitor for a dynamic random access memory (DRAM) cell using a selective hemispherical grain (s-HSG) structure after the removal of SiON is disclosed. The method at least includes: Providing a semiconductor substrate having a semiconductor structure formed thereon; forming an interlayer dielectric layer over the semiconductor structure; patterning the interlayer dielectric layer; depositing an amorphous-silicon (a-Si) layer over the interlayer dielectric layer; depositing a SiON layer on the a-Si layer; patterning the SiON layer and the a-Si layer layer; removing the SiON layer by phosphoric acid wet etching; forming a s-HSG silicon layer over the patterned a-Si layer; depositing a conformal interpoly dielectric layer along a surface of the resulting structure; and finally forming a polysilicon layer over the interpoly dielectric layer.
Patent TW-421890-B (TW)
Title: Solid image detecting apparatus
Inventor: FURUMIYA MASAYUKI
IPC: H04N5/335
Filed: 1999-08-16
Granted: 2001-02-11
Abstract: This invention provides a kind of solid image detecting apparatus that includes the followings: (a) an optoelectronic converting apparatus, which is used to convert light into plural charges; (b) a converting apparatus, which is used to convert these charges; (c) a floating diffusion layer, which is used to convert the converted charges into a voltage; and (d) a multi-stage source coupling circuit, which is used to amplify or output this voltage. The separation distance L2 in between the layout of supplying the drain voltage and the gate electrode of the first stage MOSFET is larger than the distance L2 in the second stage or the following stage of MOSFETs. By using the solid image detecting apparatus provided by this invention, the capacitance capacity of the gate in the first stage MOSFET can be decreased so as to assure that the solid image detecting apparatus with small pixel size can still have high sensitivity.
Patent TW-464961-B (TW)
Title: High performance integrated circuit chip package
Inventor: JONES MARK R
IPC: H01L23/12
Filed: 1999-08-25
Granted: 2001-11-21
Abstract: A high performance IC package provides high density electrical interconnection and packaging for a high speed and high bandwidth IC chip and is easily connected to or disconnected from a printed circuit board. The IC package includes an enclosure; an integrated circuit chip having a front face and a back face wherein the back face is attached to an inner ceiling of the enclosure; contacts formed on die pads on the front face through a photolithography process where each of the contacts has a base portion vertically formed on the die pad, a horizontal portion whose one end is formed on the base portion, and a contact portion vertically formed on another end of the horizontal portion; and an encapsulant provided on the front face of the integrated circuit chip for air tightly sealing. The contacts are projected through the encapsulant, and the horizontal portion of each of the contacts produces a contact force when the contact is pressed against a contact target.
Patent TW-424128-B (TW)
Title: Operating process and motor device using additional compressed air injection operating on a mono-energy or dual-energy dual-or-triple-supply mode
Inventor: NEGRE GUY
IPC: F02B75/32
Filed: 1999-09-23
Granted: 2001-03-01
Abstract: Inlet-compression chamber motor process (1) and/or relief-exhaust chamber motor process (4) operating by alternating pistons with an independent twinned combustion chamber (2)-whereby the three chambers are separate-with a device controlling the stroke and provoking, over a long period of motor rotation, stoppage at the upper dead center of said piston (15) which, in this position, separates the combustion chamber from the relief-exhaust chamber, also including a high pressure compressed air tank (23) and ambient thermal energy and additional heating systems capable of operating in the single-energy air plus additional compressed air mode or in the dual-energy mode or with a traditional fuel by internal or external combustion or with the injection of a dose of additional compressed air thus producing the three operating modes in accordance with the intended use.
Patent TW-471960-B (TW)
Title: Manipulating a digital dentition model to form models of individual dentition components
Inventor: WEN HUAFENG
IPC: G06T1/00
Filed: 1999-12-28
Granted: 2002-01-11
Abstract: A programmed computer is used to create a digital model of an individual component of a patient's dentition. The computer obtains a 3D digital model of the patient's dentition, identifies points in the dentition model that lie on an inter-proximal margin between adjacent teeth in the patient's dentition, and uses the identified points to create a cutting surface that separates portions of the dentition model representing the adjacent teeth.
Patent TW-473490-B (TW)
Title: Silyl (meth)acrylate copolymer, the method for producing the same, an anti fouling paint composition comprising the copolymer, and an anti fouling coating film produced from the paint composition
Inventor: TSUBOI MAKOTO
IPC: C08F120/06
Filed: 1999-12-27
Granted: 2002-01-21
Abstract: Disclosed is a silyl (meth)acrylate copolymer which comprises 20 to 80% by weight of (a) silyl (meth)acrylate constituent units represented by the following formula (I), 0.01 to 40% by weight of (b) acrylic unsaturated monomer constituent units represented by the following formula (II) and 5 to 79.99% by weight of (c) unsaturated monomer constituent units other than the constituent units (a) and (b), with the proviso that the total amount of the constituent units (a), (b) and (c) is 100% by weight, and which has a weight-average molecular weight, as measured by GPC, of not more than 200,000. Wherein R1 is a hydrogen atom or a methyl group, and R2, R3 and R4 may be the same or different and are each an alkyl group, a cycloalkyl group or a phenyl group which may have a substituent group. Wherein R5 is a hydrogen atom or a methyl group, Z is an oxygen atom or -NR7, when Z is an oxygen atom, R6 is a hydroxyalkyl or hydroxycycloalkyl group which may have a substituent group or a polyalkylene glycol group represented by the formula -(R8O)nH (wherein R8 is an alkylene group and n is an integer of 2 to 50), and when Z is -NR7, R7 is an alkyl group which may be substituted with any of a halogen, a hydroxyl group, an amino group, a substituted amino group, an acyl group and an alkoxy group, and R6 is a hydrogen atom. Also disclosed are a process for preparing the silyl (meth)acrylate copolymer, an antifouling paint composition comprising the copolymer, a coating film formed from the paint composition, a hull with the coating film, and an antifouling method using the paint composition. By the use of the silyl (meth)acrylate copolymer, there can be produced an antifouling paint capable of forming an antifouling coating film which hardly suffers from occurrence of cracks, has excellent adhesive strength and thereby hardly suffers from peeling, can be favorably controlled in the hydrolysis rate, and is excellent in antifouling performance (antifouling activities) and long-term antifouling properties.
Patent TW-436992-B (TW)
Title: Manufacturing method of self-aligned source connection lines used in memory array
Inventor: SUNG HUNG-JENG
IPC: H01L21/768
Filed: 1999-12-30
Granted: 2001-05-28
Abstract: A manufacturing method of self-aligned source connection lines used in memory array comprises the steps of: sequentially forming a first insulation layer and a first conductive layer on a substrate; forming a first mask layer having a plurality of first opening exposed out of a portion of the first conductive layer; filling the first openings with a second insulation layer; forming a second conductive layer having a second opening exposed out of a portion of the first mask layer and the surface of the adjacent second insulation layer; removing the first mask layer in the second opening to expose the first conductive layer; removing the exposed first conductive layer and second conductive layer to form a third opening exposed out of the substrate; performing a source ion implantation via the third opening to form a source region; forming a first insulated separation layer  in the third opening; forming a third conductive layer electrically connected to the source region to fill up the third opening, thereby completing the manufacturing process of self-aligned source connection lines, and then performing the subsequent process of memory array.
Patent TW-506968-B (TW)
Title: Bis-β-hydroxyethyl terephthalate production process and purification process
Inventor: INADA SHUJI
IPC: C07C67/56
Filed: 2000-01-03
Granted: 2002-10-21
Abstract: An aromatic polyester is pre-decomposed by heating together with bis-β-hydroxyethyl terephthalate and/or a low condensate thereof and then, reacted with ethylene glycol to convert the terephthalic acid component of the pre-decomposed product into bis-β-hydroxyethyl terephthalate and/or a low condensate thereof. The thus obtained solution composition, that is, bis-β-hydroxyethyl terephthalate solution composition containing ethylene glycol, bis-β-hydroxyethyl terephthalate and cations and/or anions as impurities is brought into contact with a cation exchanger and/or an anion exchanger to remove cations and anions as impurities to produce bis-β-hydroxyethyl terephthalate having a small content of ions. The bis-β-hydroxyethyl terephthalate-containing mixture having a small content of ions is subjected to preliminary evaporation or distillation to distill off a compound having a boiling point lower than that of bis-β-tlydroxyethyl terephthalate and then, to evaporation or distillation under reduced pressure to give purified bis-β-hydroxyethyl terephthalate. Thus, purified bis-β-hydroxyethyl terephthalate having a cation and anion total content of 15 ppm or less is obtained.
Patent TW-555634-B (TW)
Title: Scribe device of brittle material
Inventor: SHIMOTOYODOME GYO
IPC: B44B3/06
Filed: 2000-01-07
Granted: 2003-10-01
Abstract: The present provides a scribe device which securely supports a cutter for forming a well-scribed line. A holder 20 movable in the vertical direction is supported on a body 10. Piezo-actuators 40 are located between the body 10 and the holder 20. The vibration of the piezo-actuators in the vertical direction is transmitted to the cutter 30 provided in the lower end of the holder 20, forming a scribed line on a workpiece 100. Said holder 20 is supported by means of an elastic component and a slider support portion 60 spaced apart by the piezo-actuators 40. The elastic component comprises a plate spring 61 and a ball 62 made of elastic material, which elastically supports the holder 20 in the vibrating direction.
Patent TW-463436-B (TW)
Title: Terminal-processed structure of tape-shaped cable including plurality of coaxial cables arranged in parallel and method for processing terminal of the same
Inventor: KUNII MASASHI
IPC: H01R12/59
Filed: 2000-02-17
Granted: 2001-11-11
Abstract: A method for processing a terminal of a cable including a plurality of fine coaxial cables arranged in parallel and a terminal-processed tape-shaped cable are provided. After sheaths closer to the terminal of a plurality of fine coaxial cables are removed to expose outer conductors, the outer conductors thus exposed are removed in such a way that the entirety of the outer conductors thus exposed are covered with a solder layer, then the solder layer and the outer conductors are separated at a processing groove formed at a predetermined position on this solder layer, and respective portions of the outer conductors closer to the end of the cable relative to the position of the separation are removed in a lump.
Patent TW-561303-B (TW)
Title: Thin-film transistor array and its manufacture
Inventor: MATSUMOTO SEIICHI
IPC: H01L29/786
Filed: 2000-02-19
Granted: 2003-11-11
Abstract: A thin-film transistor (TFT) array comprises: a transparent insulating substrate; a plurality of scanning lines formed of a first electrically conductive film on a transparent insulating substrate made of glass or the like; a plurality of signal lines formed of a second electrically conductive film; a plurality of pixel electrodes formed on a gate insulating film in areas surrounded with adjacent scanning lines and adjacent signal lines; a plurality of TFTs connected to the pixel electrodes; and a plurality of light shield films which are formed of the first electrically conductive film and form light-shielding overlap parts across outer peripheral parts and gate insulating films facing the signal lines of the respective pixel electrodes; wherein a plurality of correcting parts formed by the light shield films overlap the signal lines via the gate insulating films and a plurality of predefined areas of the light shielding films located at two ends of each signal line are projected toward the signal lines. One object if the present invention is to provide a thin-film transistor array and its manufacture for correcting the breaking of a signal line without having an increase in process load and influence on display.
Patent TW-518374-B (TW)
Title: Apparatus and method for producing single crystal ingot by Czochralski method
Inventor: HANAMOTO TADAYUKI
IPC: C30B15/14
Filed: 2000-03-21
Granted: 2003-01-21
Abstract: This invention provides both an apparatus and a method for producing a perfect single crystal in good reproducibility in a single crystal growth in an apparatus for producing a single crystal ingot by a Czochralski method. In this apparatus for producing a single crystal ingot by a Czochralski method, the apparatus is equipped with a measurement device for measuring the distance from the bottom of a heat shielding body to the liquid level of a raw material melt and the controls of pulling conditions such as the heat amount for the silicon melt, the liquid level of the silicon melt, pulling rate of silicon single crystal ingot, etc., are carried out based on the distance measured by the device. Consequently the temperature gradient of G1 region of the pulled silicon single crystal ingot is adjusted to give a perfect crystal in excellent reproducibility.
Patent TW-460911-B (TW)
Title: Chuck table
Inventor: NAMIOKA SHINICHI
IPC: H01L21/68
Filed: 2000-05-05
Granted: 2001-10-21
Abstract: A chuck table includes a pedestal having a circular depression formed in an upper surface thereof, and a disk-like chuck plate positioned in the depression of the pedestal. The chuck plate is fixed in the depression of the pedestal by means of an adhesive interposed between bottom surface of the depression of the pedestal and a lower surface of the chuck plate. A recess for accepting a surplus of the adhesive is formed in a lower end portion of a side surface of the depression of the pedestal.
Patent TW-459441-B (TW)
Title: Apparatus for interfacing generic and device-specific control codes
Inventor: NGUYEN LINH H
IPC: H04N1/00
Filed: 2000-05-22
Granted: 2001-10-11
Abstract: A fax machine (8) includes a print controller (30), a fax controller (14) and random access memory (44). Generic control code (54) is stored in ROM (42) of the print controller (30), and paper path code is stored in ROM (24) of the fax controller (14). Upon startup of the fax machine (8), the fax controller (14) passes copies of paper path code functions (50) and variable values (52) to the print controller (14). The print controller (14), in turn, writes the variable values (52) to a jump table (44a) in the random access memory (44), writes the functions (50) to designated portions (44c) of the random access memory (44), and writes starting addresses of the functions (50) to the jump table (44b). During operation of the fax machine (8), the print controller (30) executes the generic control code (54) and uses the jump table (44a, 44b) to access the variable values (52) and to execute the functions (50). Thus, the jump table (4a, 44b) allows the print controller (14) to interface the generic control code (54) with the device-specific variable values (52) and the functions (50).
Patent TW-466833-B (TW)
Title: Sampling system and method of the read channel of optical storage system
Inventor: HUANG KE-CHIANG
IPC: H03M1/00
Filed: 2000-06-03
Granted: 2001-12-01
Abstract: A sampling system and method of the read channel of optical storage system are disclosed, which comprises at least an analog-to-digital sampling device, a time recovery interpolation module, a 2T time equalization module, a DC bias control circuit, a two-times factor interpolation circuit module and a serial detector. The analog-to-digital converter device is to read the analog signal of the storage media with the frequency half or a little more than half of the channel baud rate, the time recovery interpolation module proceeds the interpolation to the sample outputted from the analog-to-digital sampling device, and proceed the high-frequency signal compensation with the 2T time equalization module, replenish the middle data between the adjacent data by the two-times factor interpolation circuit module with interpolation, then output the bit data of zero error rate by serial detector, wherein the DC component signal can be removed at any time before said two-times factor interpolation circuit module and after the analog-to-digital sampling.
Patent TW-455630-B (TW)
Title: Masking device for a colour cathode-ray display tube with a flat screen of the type comprising a support frame for a tensioned shadowmask, and tensioned shadowmask
Inventor: COZAR RICARDO
IPC: C22C38/52
Filed: 2000-06-21
Granted: 2001-09-21
Abstract: Masking device for a colour cathode-ray display tube with a flat screen of the type comprising a support frame for a tensioned shadowmask and a tensioned shadowmask mounted on the support frame so as to undergo tensioning at room temperature, in which device the support frame is made of a hardened Fe-Ni alloy having a thermal expansion coefficient between 20 DEG C and 150 DEG C of less than 5x10<SP>-6</SP> K<SP>-1</SP> and a yield stress Rp0.2 at 20 DEG C of greater than 700 MPa, and the tensioned shadowmask is made of a hardened FeNi or Fe-Ni alloy having a thermal expansion coefficient between 20 DEG C and 150 DEG C of less than 5x10<SP>-6</SP> K<SP>-1</SP>.
Patent TW-484200-B (TW)
Title: Method of forming capacitors, and methods of forming capacitor-over-bit line memory circuitry, and related integrated circuitry contructions
Inventor: LOWREY TYLER A
IPC: H01L21/8242
Filed: 2000-09-01
Granted: 2002-04-21
Abstract: Methods of forming capacitors, methods of forming capacitor-over-bit line memory circuitry, and related integrated circuitry constructions are described. In one embodiment, a capacitor storage node is formed having an uppermost surface and an overlying insulative material over the uppermost surface. Subsequently, a capacitor dielectric functioning region is formed discrete from the overlying insulative material operably proximate at least a portion of the capacitor storage node. A cell electrode layer is formed over the capacitor dielectric functioning region and the overlying insulative material. In another embodiment, a capacitor storage node is formed having an uppermost surface and a side surface joined therewith. A protective cap is formed over the uppermost surface and a capacitor dielectric layer is formed over the side surface and protective cap. A cell electrode layer is formed over the side surface of the capacitor storage node. In yet another embodiment, a plurality of capacitor storage nodes are formed arranged in columns. A common cell electrode layer is formed over the plurality of capacitor storage nodes. Cell electrode layer material is removed from between the columns and isolates individual cell electrodes over individual respective capacitor storage nodes. After the removing of the cell electrode layer material, conductive material is formed over portions of remaining cell electrode material thereby placing some of the individual cell electrodes into electrical communication with one another.
Patent TW-466206-B (TW)
Title: Platform apparatus for fetching and laying an object
Inventor: SHIU RUEI-HUANG
IPC: B65G13/02
Filed: 2000-10-18
Granted: 2001-12-01
Abstract: A platform apparatus for taking out and putting down an object includes a base with a transmission device, a sliding platform driven by the transmission device to take out and put down the object, and a ball device set between the base and the sliding platform to provide the relative motion between them.
Patent TW-460360-B (TW)
Title: Interconnection between two-surface or multi-surface thin strip-shaped layers that lie one on top of the other, in particular, between two metallic strips undergoing a continuous processing
Inventor: ZINSEN PETER
IPC: B21B15/00
Filed: 2000-10-25
Granted: 2001-10-21
Abstract: The invention relates to an interconnection between two overlapping end sections of metallic strips in which a quick and economical interconnection should be produced. To this end, the invention provides that several annular welds are provided in the overlapping area which are situated at a distance from the face ends of both strips.
Patent TW-467765-B (TW)
Title: Cap of treating chamber
Inventor: NIIYAMA KISABURO
IPC: C23F1/08
Filed: 2000-10-25
Granted: 2001-12-11
Abstract: A cap can be easily and simply used for preventing leakage of toxic gases, ozone, and vapor. In a treating chamber, a liquid B is treated in an inner portion A. The temperature of the inner portion A becomes higher than that of inner portion C, which easily causes temperature discrepancy. The cap 8 comprises a shielding plate 17 and a frame 18. Even though the shielding plate 17 seals an opening portion 5 of the treating chamber 1, a central portion is arranged to be a deformation center, due to temperature discrepancy. The frame 18 made of one piece is vertically installed on peripheral of the shielding plate 17 and forms a elongate rectangle shape in 5 to 10 times thicker than that of the shielding plate. The frame is installed with a surface shielding plate 21 whose strength is excellent, and the frame 18 forms gaps 20 between the opening portion 5 and the forming peripheral wall 6. Due to not transmitting heat of the inner portion A, the frame 18 will not deform because of temperature discrepancy.
Patent TW-546421-B (TW)
Title: The purification method for anodic film of aluminum sulfuric acid anodization process
Inventor: CHU CHIH-HUNG
IPC: C25F1/02
Filed: 2000-11-30
Granted: 2003-08-11
Abstract: The purification method for anodic film of aluminum and aluminum alloy has been created by adding a rinsing process with low concentrated nitric acid in the final cleaning step after anodization. The sulfur content in anodic film can be eliminated to a relatively low level where the requirements of cleanliness in ultra high vacuum (UHV) condition can be met.
Patent TW-492905-B (TW)
Title: Method of chemical-mechanical planarization
Inventor: PENG JENG-AN
IPC: B24B37/04
Filed: 2000-12-14
Granted: 2002-07-01
Abstract: The present invention relates to a method of chemical-mechanical planarization (CMP), which is applicable to polishing silicon oxide layer on a wafer using a silicon nitride layer as a stop layer, and comprises the following steps: (a) providing a planarization liquid having a first pH value and a polishing pad; (b) delivering the planarization liquid having the first pH value to the polishing pad; (c) pressing the wafer and the polishing pad with a pressure; (d) at least relatively moving the wafer or the polishing pad to perform a first stage polishing; and (e) changing the first pH value of the planarizatiion liquid to a second pH value and performing a second stage polishing.