Patent GB-1370636-A (GB)
Title: Anti-skid systems
IPC: B60T8/1761
Filed: 1971-12-29
Abstract: 1370636 Anti-skid systems ROBERT BOSCH GmbH 29 Dec 1971 [28 Dec 1970] 60365/71 Heading F2F An anti-skid control circuit operating a brake line pressure reducing valve comprises a generator which produces a waveform whose frequency is proportional to the rotational speed of a braked wheel, a converter circuit producing a D.C. voltage from the generator output inversely proportional to the wheel speed, a logarithmic amplifier producing a signal representative of the natural logarithm of the converter output, a differentiating stage for the logarithmic output and comparator means receiving outputs from the converter and the differentiator and producing signals dependent on wheel retardation for operating the valve. A pulse generator 11 supplies pulses in the form of negative voltage to a monostable trigger 12 comprising two interlinked transistors, Fig. 3 (not shown). The converter circuit comprises a sawtooth waveform generator 13 and a peak value rectifier 15. During the intervals when no pulses are emitted from the trigger 12, due to no input pulses, a capacitor in the generator 13 is charged by a constant current source to a value proportional to the time interval between successive pulses. The capacitor is discharged rapidly by a pulse from the trigger 12. The output therefrom is fed to the rectifier 15 charging a capacitor therein to a D.C. voltage proportional to the peak value voltage of the generator 13 and  proportional to the time interval between pulses. As an alternative, the peak value rectifier 15 is replaced by a sample and hold circuit having one input from the generator 13 and one input direct from the trigger 12; this produces a similar D.C. voltage. The control circuit uses the following equations Equation 63(a) is for maximum permissible deceleration wherein:-# is the time interval between successive pulses; ## is a constant (dependent on pulse generator characteristics); ## 0  is the maximum deceleration (predetermined). Equation 63(b) is for maximum permissible acceleration wherein:-## s  is the maximum acceleration (predetermined). Threshold values of ## 0  and ## s  are set by voltage dividers, are multiplied by the D.C. voltage representing #, and are fed into positive inputs of respective comparators 22, 21. The logarithmic stage 16 comprisingasemi-conductor diode, providing the logarithmic function, is connected in series with a differentiator 19, through a band-pass amplifier 17 to suppress some spurious pulses. The output from the differentiator 19 representing the right hand side of the equations (a), (b) is fed to the other, negative, inputs of the comparators 21, 22, the minus sign in equation (b) being accounted for by an inverter 20 before the comparator 21. The use of equation (b) for maximum permissible acceleration does not take into account optimum slip conditions which occur at a peak acceleration or when ## = 0 where This equation is compared at comparator 21 wherein the positive input is earthed, and the negative input from the inverter 20 is further differentiated by a second differentiator. This differentiator may be replaced by the comparator 21 having both inputs from the inverter 20, one input having a capacitor to effect a phase shift. To cut out all stray pulses without lengthening response time, a digital low-pass filter is incorporated at the output of the comparators, Fig. 4. The stage 23 at the output is either a monostable trigger or a bi-stable store having a monostable trigger 28 in a feed back loop. The filter comprises a monostable trigger 30, a comparator 32 having an input direct from the stage 23 and an input from the trigger 30, another monostable trigger 33, and a transistor 350. A comparator 24 has inputs from the filter and the stage 23 and comprises a power transistor; the output from the comparator is led to a solenoid operated pressure reducing valve 25.