baber/WOPTO huggingface dataset:
Patent JP-H10268149-A (JP)
Title: Light guide path device
Inventor: KITAMURA MITSUHIRO
IPC: G02B6/122
Filed: 1998-04-15
Abstract: PROBLEM TO BE SOLVED: To miniaturize the element size of an element (AWG) using an array guide path lattice by partially removing a clad layer at both side portions of a core at the curve portions of multiple guide paths forming the array guide path lattice. SOLUTION: Input/output guide paths 2, 6, star couplers 3, 5 on the input side and output side, and an array guide path lattice section 4 are formed on a guide path substrate 1 having GPSG (quartz glass doped with Ge, P) films as a clad layer and a core layer on the Si substrate 1. A groove forming region 12 forming a groove is provided at the side face section of the core layer at the curve portion of the array guide path lattice section 4. When the wavelength- multiplexed optical signal is introduced from one of input guide paths 2, it is applied with a phase shift corresponding to the optical path difference at the array guide path lattice section 4, and it is separated for each wavelength and outputted to the guide path 6 on the output side via the star coupler 5 on the output side.
Patent JP-2000298535-A (JP)
Title: Method for resuming computer device
Inventor: MOTOYAMA TAKAMI
IPC: G06F1/26
Filed: 1999-04-12
Abstract: PROBLEM TO BE SOLVED: To make it possible to quickly restore processing executed at the occurrence of an interruption when power supply is restarted after the interruption of power supply in a computer device communicating with another computer device through a network. SOLUTION: In a server 1, a connection queuing process 15 from clients is always driven. When a client 2 starts a connection process 25 for connecting it with the server 1 and outputs a connection request, the server 1 starts a client service process 16. When the power supply of the server 1 is interrupted, the process 16 is allowed to end, connection with the client 2 is cut off and the contents of a main memory are retreated to a hard disk. When the power supply is restarted, the retreated contents are copied in the main memory and processing is resumed from an interruption occurrence position.
Patent JP-H06162264-A (JP)
Title: Method and device for recognizing character
Inventor: YAMAUCHI TOSHIFUMI
IPC: G06K9/62
Filed: 1992-04-23
Abstract: PURPOSE:To provide a method and a device for recognizing characters capable of exceptionally improving recognition accuracy by recognizing character patterns by utilizing the relation of the position and the fluctuation amount of feature vectors in a feature space and the kind and the size of deformation given to the character patterns. CONSTITUTION:The inputted character patterns are stored in a character pattern memory 3 and pre-deformation feature vectors 13 and judged pre-deformation standard pattern numbers 11 are stored in a judgement data memory 7. Then, the deformation processing of the character patterns is performed in a pattern deformation part 8, feature extraction and judging processings are performed again and the post-deformation feature vectors 14 for the feature vectors and judged post-deformation standard pattern numbers 12 are stored. A judgement table 20 for outputting a judged result 22 with the kind and size of the deformation, the fluctuation amount of the feature vectors before and after the deformation or the standard pattern numbers before and after the deformation as addresses is provided. The judgement table 20 can be updated by a correction input category 21 while reading.
Patent JP-H08260534-A (JP)
Title: Faucet inside joint
Inventor: FUJITA MICHIO
IPC: E03C1/042
Filed: 1995-03-24
Abstract: PURPOSE: To facilitate attachment and detachment and prevent leakage by regulating the grip length so as to be fitted to various apertures or forms, and fixing a joint to a faucet or pipe in a mechanism for pulling a handle and a strut in combination against to each other. CONSTITUTION: When the protruding handles 8, 8 of a strut support pipe 7 are inserted into the cavity part of a faucet 5, and a grip regulating handle 15 is pulled down and rotated right, a grip 11 is pressed onto the inner wall of the faucet 5. When the handle 15 is further rotated right, the strut support pipe 7 is strongly pushed up to strongly pull a strut 2 downward, and the strut support pipe 7 is fixed to the faucet 5. When it is rotated left, the strut support pipe 7 is lowered and separated from the faucet 5 to push up a water jet equipment 18, the strut 2 is also pushed up, and the grip 11 is closed and separated from the inner wall of the faucet 5 so as to be removable. The thicknesses, lengths, and widths of the grip 11 and the strut 2 are set to those according to the aperture or thickness of a used pipe or cylinder to ensure the strength of the grip 11.
Patent JP-S5228638-A (JP)
Title: Relay with plural inputs
Inventor: IWASAKI MINORU
IPC: H02H3/02
Filed: 1975-08-30
Abstract: PURPOSE: Digital relay with modified mho and blinder characteristics which decides existence of failure in power system from instantaneous value sampled from voltage and current of power system with predetermined period. 
     COPYRIGHT: (C)1977,JPO&Japio
Patent JP-S5751711-A (JP)
Title: Production of impact-resistant thermoplastic resin
Inventor: OKANO YASUYUKI
IPC: C08F2/44
Filed: 1980-07-29
Abstract: PURPOSE: To prevent deposition of polymer scales on the wall or a like area of a polymerization kettle, by carryig out the polymerization in such a way that talc is added to the polymerization system and changing the state of the system in the course of the polymerization from an emulsion state to a suspension state by adding an electrolyte to the system.  
     CONSTITUTION: Titled resin is prepared by polymerizing 5W50wt% aqueous elastomer latex, e.g., polybutadiene latex and 95W50wt% monomer composition containing an aromatic vinyl monomer, e.g., styrene or vinyltoluene, in the presence of partially saponified polyvinyl alcohol with the aid of a radical polymerization initiator. In this polymerization, deposition of polymer scales on the wall or a like area of a polymerization kettle is prevented by carrying out the polymerization in such a way that 1W30wt%, based on monomer compsition, of talc is added to the polymerization system and 0.05W5wt% electrolyte, e.g., sodium chloride or magnesium sulfate, is added to the system in the course of the polymerization to change the state of the system from an emulsion state to a suspension state. 
     COPYRIGHT: (C)1982,JPO&Japio
Patent JP-H08276456-A (JP)
Title: Synthetic resin component with integral metal member and manufacture thereof
Inventor: YAMADA ATSUSHI
IPC: B29C69/00
Filed: 1995-04-06
Abstract: PURPOSE: To form a synthetic resin component having an integral metal member by forming two metal members which are superposed when the members disposed opposed in the using state are aligned and disposed in the developed state in the arranging direction in the integral state, and integrating it with synthetic resin body. CONSTITUTION: A metal member set is so formed that two metal members 21, 29 formed first by punching a metal plate and then bending it are superposed when they are disposed oppositely in the using state that they are aligned in the arranging direction in the developed state in such a manner that, when they are punched, one is disengaged from the arranging direction. At the time of bending, the one member is folded to the continued part to be disposed oppositely to the other material 29.
Patent JP-S61262379-A (JP)
Title: Inversion amplifier for video signal
Inventor: SUZUKI KIYOHISA
IPC: H04N5/08
Filed: 1985-05-16
Abstract: PURPOSE:To prevent the termination of a vertical oscillation due to ghost by supplementing the amplitude degree of a transistor which inverts and amplifies a video signal with the second transistor when the level of an integrated vertical synchronizing pulse goes under a reference level. CONSTITUTION:A signal S6 which inverts and amplifies an input signal S5 from a transistor Q2 is taken out and is inputted to a Q5. On the other hand, a signal S7 is impedance-converted by a Q3 and resistors R4 and R5 and after that, it is integrated at an integrating circuit 20. The circuit 20 is set so as to be a time constant which integrates only the vertical synchronizing pulse. A signal S8 after integration is inputted an emitter time constant circuit 30 including a Q4. At the circuit 30, when the level after the integration goes under a regulated voltage, the Q4 is conducted and signal S6 is amplified during a vertical pulse period. The signal is feedbacked to a Q1 passing through an emitter follower including the Q5 and a clamping in peak to peak is executed. Therefore, it is possible to perform the vertical oscillation by an amplified vertical synchronizing part even when a noise component, such as the ghost, etc. is mixed.
Patent JP-S62262356-A (JP)
Title: Metalic vapor discharge lamp
Inventor: ITO NAMIO
IPC: H01J61/34
Filed: 1986-05-09
Abstract: PURPOSE:To improve the starting characteristics of a discharge lamp by inserting loosely a luminous tube in inner rings made of metal and holding the inner rings with lead wires connected to electrodes of the luminous tube at several portions between both electrodes of the luminous tube so as several cooled portions where the metalic vapor can be condensed during turned off period of the lamp are generated and uniformity of the density of the metalic vapor at the time of relighting is reduced. CONSTITUTION:In inner rings 9 holded at the positions dividing the distance between the electrodes into four equal intervals by means of lead wires coated with glass using metalic plates 10, fixing plates 11 for the inner rings and the like, a luminous tube 3 is inserted loosely so as not to contact to the inner rings 9. When the supply of the discharge electric power is stopped the luminous tube 3 is turned off and the temperature in the vicinity of the metalic inner rings 9 inserted loosely between the electrodes 4 respectively is lowered rapidly. Thus cooled portions are generated on the wall of the luminous tube in the vicinity of the inner rings 9. Therefore the metalic vapor sealed in the tube can be condensed in the vicinity of the inner rings 9 too during the turned off period. Theraby the uniformity of the density of the metalic vapor at the time of lighting is reduced to improve the starting characteristics.
Patent JP-S60248625-A (JP)
Title: Monoclonal antibody for counteracting pseudomonas aeruginosa, its preparation and use
Inventor: FUKUDA TAMOTSU
IPC: C07K19/00
Filed: 1984-05-25
Abstract: PURPOSE:The titled antibody consisting essentially of a globulin selected from the group comprising IgM globulin and IgG globulin. CONSTITUTION:A human B lymphocyte having antigen-forming ability on common antigen PSC-A of Pseudomonas aeruginosa (molecular weight: 15,000; protein content: 24-55wt%, saccharide content: 3.0-5.0wt%, hexamine content: <=1.0wt%; property: light yellow powder; solubility: soluble in water, solution of salt, etc., slightly soluble in methanol, etc.; color reaction: positive in Lowry- Folin reaction, etc., negative in Erson-Morgan reaction, etc.; isoelectric point: PI=3.8-4.3) is infected with Eb virus, varied into a multiplication type capable of carrying out subculture, a clone that produces durably an antibody showing specificity to the PSC-A is selected, and a monoclonal antibody produced by it is collected. The antibody is useful as a reagent for diagnosing rapidly infectious diseases of Pseudomonas aeruginosa or as a preventive or remedy for injection with Pseudomonas aeruginosa.
Patent JP-H043917-A (JP)
Title: Method of diffusing impurity
Inventor: KIRISAWA MITSUAKI
IPC: H01L21/22
Filed: 1990-04-20
Abstract: PURPOSE:To obtain gettering action with excellent reproducibility without adding the usage and process of a special semiconductor substrate by introducing a semiconductor substrate having a phosphorus diffusion layer in high concentration on one surface side into a diffusion furnace besides a semiconductor substrate. CONSTITUTION:One hundred epitaxial wafers 10, in which n<-> epitaxial layers 2 are laminated on substrates 1 and boron atoms 3 are introduced into the specified regions of surfaces, are loaded upright on a boat, and ten dummy wafers for preventing the entrainment of the outside air or stabilizing the flow of nitrogen gas passed in a furnace at the flow rate of 5-8l/min are erected on both sides respectively. n-type collector diffusion wafers having n<+> layers by phosphorus diffusion on the whole surfaces are used as the dummy wafers. A p region 4 is formed through a driving process. The p region is utilized as the source-drain regions of a MOS device.
Patent JP-S59230376-A (JP)
Title: Solid-state image pickup device
Inventor: KODAMA YASUMASA
IPC: H04N5/335
Filed: 1983-06-14
Abstract: PURPOSE:To obtain a required exposure time over the entire range from a high speed to a low speed shutter mode by controlling properly the start timing when a shutter mechanism is transmitted from a fully closed state into a totally open state according to the brightness of an object. CONSTITUTION:A start signal from a shutter operating member 36 is applied to a control circuit 48, a vertical synchronizing signal generator 49, and a photometer 50. Further, the photometer 50 measures the brightness of an object, applies its information to the control circuit 48, and after the 1st vertical synchronizing signal is outputted, the control circuit 48 applies a shutter drive signal to a shutter mechanism 33 via a shutter drive circuit 45 after a prescribed period is elapsed. This shutter drive signal controls the operation start timing of the shutter mechanism 3, the shutter blade starts to be opened from the totally closed state being the steady-state and becomes the totally opened state after a prescribed time is elapsed.
Patent JP-H06296128-A (JP)
Title: Power circuit
Inventor: SAITO YOSHIHIRO
IPC: H03K17/78
Filed: 1993-04-07
Abstract: PURPOSE:To attain switching without provision of any contact. CONSTITUTION:A DC power supply 1 is connected to a drain of a MOSFET 3 and a load 2 is connected to a source of the MOSFET 3 respectively. A 1st photocoupler 5 of light-voltage conversion type and a 2nd photocoupler 6 of normally-on type are connected between the gate and the source of the MOSFET 3. With a switch 8 closed, a gate drive voge is applied by the 1st photocoupler 5 and the 2nd photocoupler 6 is interrupted. With the switch 8 opened, the 1st photocoupler generates no voltage and the 2nd photocoupler 6 is short-circuited, then the MOSFET 3 is surely and forcibly turned off.
Patent JP-H02284388-A (JP)
Title: Discharge lamp lighting device
Inventor: OKAMOTO FUTOSHI
IPC: H05B41/392
Filed: 1989-04-25
Abstract: PURPOSE:To simplify the constitution of circuits and make the cost low in spite of a lot of load conditions by receiving a signal for outputting an abnormality detecting signal, a dim signal, and a full lighting signal in this order to control switching elements for controlling the lighting condition of a discharge lamp. CONSTITUTION:An abnormality detecting circuit 4 generates an abnormality detecting signal when the lighting condition of a discharge lamp l becomes abnormal, while a signal generating circuit 5 generates a dim signal for decreasing the lamp current through the discharge lamp l and a full lighting signal for sending a rated lamp current to the discharge lamp l. A determining circuit 6 determines if the abnormality detecting signal, dimming signal and full lighting signal are generated or not, and outputs the abnormality detecting signal, dim signal and full lighting signal in this order. A control circuit Y receives a signal outputted by the determining circuit 6 and controls switching elements Q1, Q2 for controlling the lighting condition of the discharge lamp. The circuit constitution is thus simplified and the cost can be low in spite of a lot of load conditions.
Patent JP-H06312806-A (JP)
Title: Device for evening quantity of sludge inside of storing pit
Inventor: YOKOI MANABU
IPC: G05D9/00
Filed: 1993-05-06
Abstract: PURPOSE:To automatically even the height of the sludge inside of a storing pit by providing a means for stopping the operation of a sludge moving means in the case where the maximum value of sludge height detected values becomes nearly equal to the mean value. CONSTITUTION:A sludge height sensor 11, which is fitted to the upper part of a bucket 4 so as to be projected in the lateral direction, sends the ultrasonic wave toward a storing pit 1 and catches the ultrasonic wave reflected by the sludge 2. The storing pit 1 is divided into plural blocks previously, and the sensor 11 detects the height of the sludge 2 of these blocks. A control device 8 has a memory for storing the sludge height detected value from the sensor 11 and the block, a height judging unit for judging largeness of the sludge height detected value stored in this memory, and a mean value computer for computing the mean value area of the sludge height detected value stored in the memory. The control device 13 falls the sludge with the bucket 4 at an area, of which sludge height detected value is minimum, and stops the operation when the sludge height detected value arrives the mean value.
Patent JP-S5533505-A (JP)
Title: Air conditioning ventilation fan
Inventor: OKABE MASUMI
IPC: F24F7/007
Filed: 1978-08-29
Abstract: PURPOSE: To prevent drying by providing an air-permeable water absorber in a position where the dew formed through heat exchange is stored so as to impart appropriate moisture to the room air.  
     CONSTITUTION: On the heat exchange in a heat exchanger 18, the moisture contained in the warm room air is cooled by the cold outside air to be condensed into dew, and the dew dropping out of the heat exchanger 18 is received by and stored in a water absorber 26. Because the water absorber 26 is air-permeable and the room air from the room air suction port is sucked through the water absorber 26, the sucked room air gets wet while passing through the water absorber 26, before mixed with the outside air and discharged into the room. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-S588353-A (JP)
Title: Multiplier
Inventor: ISHII HIDESHI
IPC: G06F7/527
Filed: 1981-07-06
Abstract: PURPOSE:To improve the performance of a binary multiplier, by storing an output of a switching circuit to a register, shifting the output of the register by the specified number of bits and applying them to a carry save adder. CONSTITUTION:A multiplicand is stored to a register 1, a multiplier is stored in a register 2, and the content of the register 2 is outputted with multipliers 4- 9 via a switching device. The output is added via carry save adder CSA circuits 10 and 11 and after being stored in registers 16-19, the output is added at tree shaped CSA circuits 12-15. On the other hand, a part of the registers 1 and 2 is multiplied 27 and 28, one of the output is switched 29 and 30 and given to a register 25 via CSA circuits 22 and 23 with the output of the circuit 15.
Patent JP-S59230579-A (JP)
Inventor: TAKUSAGAWA YUZURU
IPC: B24B31/02
Filed: 1983-06-13
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S59230710-A (JP)
Inventor: MASUDA KATSUHIKO
IPC: B28B7/30
Filed: 1983-06-13
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S60247696-A (JP)
Inventor: SAKURAI KEIICHI
IPC: G10H1/36
Filed: 1984-05-24
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S61263144-A (JP)
Title: Semiconductor module
Inventor: MORI SATOSHI
IPC: H01L25/04
Filed: 1985-05-15
Abstract: PURPOSE:To omit a terminal base and a wiring bar, and to improve cost performance while miniaturizing and lightening a device by surrounding three sides of a terminal section exposed to the outer surface of a case for a semiconductor module by insulating wall surfaces. CONSTITUTION:Insulating wall surfaces 19 consisting of an insulating material such as a resin are fixed onto the side wall surfaces of an upper step surface 13c in a power transistor module 18 so as to surround three sides of an output terminal b8 by utilizing a groove 13e between upper step surfaces 13a and 13b. The insulating wall surfaces 19 are formed to approximately a U shape, and the output terminal 8 is surrounded by an inner circumferential wall surface 19a positioned at a section higher than the surface section of the output terminal 8. Three transistor modules 18 are juxtaposed, collector terminals 6 and emitter terminals 7 for each transistor module are mutually connected colectively by using wiring bars 14a and 14b, and wiring connecting sections from U-W terminals for a three-phase motor a re connected directly to several output terminal 8. Accordingly, creeping distances among the wiring connecting sections for the motor and the wiring bar 14b and further creeping distances among adjacent wiring connecting sections for the motor can be ensured sufficiently, and no trouble is generated even when the wiring connecting sections for the motor are connected directly.
Patent JP-H04334975-A (JP)
Title: Electromagnetic induction type non-contact power transmission system
Inventor: MATSUURA KUNIAKI
IPC: H02J50/00
Filed: 1991-05-10
Abstract: PURPOSE:To provide a non-contact power transmission system that applies a constant voltage to load irrespective of transmission distance and consumes less power in the network. CONSTITUTION:A power transmission system includes a coil 1 for receiving a.c. power by electromagnetic induction; a capacitor 2 connected in parallel with the coil 1 to form a parallel resonant circuit 3; a rectifier element S2 connected in series between the resonant circuit 3 and a load 5 for rectifying the voltage across the resonant circuit 3 to apply a voltage to the load; and a smoothing capacitor connected in parallel with the load. The resonance frequency of the resonant circuit 3 is higher than the frequency of the input voltage. A switching element S1 is connected in parallel with the capacitor in the resonant circuit 3. Control circuits 6 and 7 are provided to turn the switching element S1 on when the voltage applied from the resonant circuit 3 to the rectifier element S2 changes from negative to positive. The control circuits turn the switching element S1 off after a period of time corresponding to the d.c. voltage across the load 5.
Patent JP-H07311030-A (JP)
Title: Measuring device for nature of painted surface
Inventor: ASAE TERUO
IPC: G01B11/255
Filed: 1994-05-19
Abstract: PURPOSE:To enable three kinds of textures of a painted surface to be measured simultaneously using small and simple constitution by comparing the form of the outline of an extracted stripe image with a stripe image extracted from a flat painted surface, computing the degree of distortion of the outline, and computing the curvature of the painted surface. CONSTITUTION:A stripe-pattern image reflected via a painted surface is captured by a CCD camera and stored in an image memory 30, and only its outline is extracted by an outline-extracting part 32. A parabolic approximating part 34 adapts least-squares method to the data about the extracted outline and performs parabolic approximation processing. A painted surface curvature computing part 36 computes the four apexes of a paraboloid from the outline that has been subjected to parabolic approximation, then compares the apexes with the form of the outline of a stripe image which is expected to be extracted from a flat painted surface, and computes the degree of distortion of the extracted stripe image so as to compute the curvature of the painted surface, while outputting according to the curvature of the painted surface the corrections needed for calculating three kinds of textures expressing sharpness, such as feelings of smoothness, massiveness and glossiness.