baber/WOPTO huggingface dataset:
Patent JP-H04271637-A (JP)
Title: Repeater
Inventor: TAKASU NOBUAKI
IPC: H04L12/28
Filed: 1991-02-27
Abstract: PURPOSE:To make the management of the network system efficient by sending/ receiving various management data to/from a network management station. CONSTITUTION:A reception data multiplexer and transmission port instructing circuit 13 is provided with a virtual port X, to which a reply data to a management terminal equipment is sent from a network management controller 15. A reply data inputted to the virtual port X is sent to a repeater main controller 14 similarly to the case with a normal reception data from the network inputted via input output ports 11, 12 and after the data is subject to relay processing in the controller 14 and the result is outputted to the input output ports 11, 12. Furthermore, a management data from the management terminal equipment sent to the repeater is fetched by the network management controller 15, in which the data is collected and managed.
Patent JP-H09230013-A (JP)
Title: Photoelectric-magnetic field sensor probe and magneto-optical element
Inventor: ITOU NOBUKI
IPC: G01R33/032
Filed: 1996-02-21
Abstract: PROBLEM TO BE SOLVED: To provide a photoelectro-magnetic field sensor probe of very small size and having high measuring accuracy. SOLUTION: In a photoelectro-magnetic field sensor probe in which along the advancing direction of a light, an input optical fiber 6a, a first lens 5a, a polarizer 2, a magneto-optical element 1, an analyzer 3 of different polarized light transmitting direction from the polarizer 2, a second lens 5b, and an output optical fiber 6b are arranged, a magnetic field to be measured is detected as output light strength, the first and second lenses 5a, 5b are drum lenses, and a drum lend holder housing them is provided so as to constitute a confocal optical system. The material of magneto-optical element 1 is expressed by a chemical formulare (Bix Gdy Rz Y3-x-y-z ) (Fe5-w Gaw )O12 ), and in the composition range, 0.84<=x<=1.10, 0.73<=y<=1.22, 0.02<=z<=0.03, and rare earth iron garnet material satisfies 0.27<w<0.32 is used.
Patent JP-H03236788-A (JP)
Title: Production of glycoside by enzymatic method
Inventor: HATTORI TAKAO
IPC: C12P19/14
Filed: 1990-02-14
Abstract: PURPOSE:To efficiently obtain a glycoside by adding an enzyme to a buffer solution containing a saccharide donor, slightly water-soluble substrate and a surfactant to cause saccharide transformation reaction. CONSTITUTION:90 pts.wt. buffer solution (e.g. pH4-6 in the case of an enzyme derived from Aspergillus oryzae) containing 0.1-50 pts.wt. saccharide donor such as phenyl-alpha-glucoside, 0.5-10 pts.wt. slightly water-soluble substrate selected from (unsubstituted) substituted aliphatic or alicyclic 6-40C primary, secondary and tertiary alcohols and 0.1-10 pts.wt. surfactant such as polyoxyethylene alkyl ether to give a dispersion (A). Then the dispersion A is reacted with a buffer solution having dispersed 100-10,000 units alpha- and/or beta-glucosidase at 20-60 deg.C while stirring to give a reaction product (B). Then the component B is mixed with 400 pts.wt. ethanol, filtered to give a filtrate, which is concentrated and purified by silica gel column chromatography to produce a glycoside (e.g. octyl-beta-D-galactoside).
Patent JP-S52117139-A (JP)
Title: Filament covering device
Inventor: UENO TAKESHI
IPC: C03C25/12
Filed: 1976-03-26
Abstract: PURPOSE: In coating a liquid-form covering material uniformly on the surface of a filament through a die, adjusting of the hole diameter of the die is made possible by forming the die with an elastic material and providing a material which compresses the die in its central axial direction. 
     COPYRIGHT: (C)1977,JPO&Japio
Patent JP-H05235049-A (JP)
Title: Manufacture of field-effect transistor
Inventor: KITANO TOSHIAKI
IPC: H01L21/02
Filed: 1992-02-20
Abstract: PURPOSE:To improve the characteristics of a field-effect transistor by a method wherein a gate electrode is formed in a bilaterally asymmetrical recess region. CONSTITUTION:A semiconductor substrate 1 with its substrate surface slanted at an arbitrary angle is used, a bilaterally asymmetrical recess region 6 is formed in a gate electrode formation place of an N-type operating layer 2 formed on this substrate 1 by etching and a gate electrode 3 is provided in this region 6 to obtain a recessed offset gate field-effect transistor. Thereby, an offset gate is obtained and the field-effect transistor having an effect on a reduction in a source resistance, the improvement of a mutual conductance, the improvement of a breakdown strength and the like is obtained.
Patent JP-S61193936-A (JP)
Title: Continuously variable transmission for automobile
Inventor: HIRAMATSU TAKEO
IPC: B60W10/10
Filed: 1985-02-21
Abstract: PURPOSE:To raise the transmission efficiency of a continuously variable transmission and to effectively utilize low rotation speed and high torque region by controlling the output shaft of a slip type clutch so as to rotate at a rotation speed lower by a set slip amount than the rotation speed of an engine. CONSTITUTION:A slip type clutch 3 and a belt type continuously variable transmission 8 are operated by the oil pressure generated in an oil pump 18 which is coupled to the driving shaft 2 of an engine 1, and each is controlled by an electric and hydraulic controller 19 and an electric and hydraulic controller 20. Both the electric and hydraulic controllers 19, 20 control the slip type clutch 3 and the continuously variably transmission 8 in response to a control signal from an electronic controller 21. Signals from an engine rotation speed detector 211, a valve opening degree sensor 212, an output shaft rotation speed detector 213 and a vehicle speed detector 214 or the like are inputted to the electronic controller 21.
Patent JP-S57148415-A (JP)
Title: Quartz oscillator
Inventor: TAKAHASHI KUNIHIRO
IPC: H03H9/02
Filed: 1981-03-09
Abstract: PURPOSE:To obtain a high-precision quartz wrist watch which has less frequency variation over a wide temperature range, by allowing one of two quartz oscillators  connected in series or in parallel to perform flectional oscillation, and the other to  perform torsional oscillation. CONSTITUTION:An quartz oscillator 12 whose temperature Tp corresponding to the  peak frequency of frequency temperature characteristics (fT characteristics) is at a  high temperature side as shown by a curve 22, and a quartz oscillator 11 whose temperature Tp is at a low temperature side as shown by a curve 21 are connected in  parallel so that the oscillator 12 performs torsional oscillation, and the oscillator 11  performs flectional oscillation. Further, a quartz oscillator 31 which performs torsional  oscillation with characteristics 41 having the positive gradient of variation in frequency with temperature, and a quartz oscillator 32 which performs flectional oscillation  with characteristics 42 having the negative gradient are connected in series. Consequently, composite fT characteristics are as shown by a curve 23 and a chained line  43, obtaining a quartz oscillator having less frequency variation over a wide temperature range. A high-precision quartz wrist watch having superior shock resistance is  obtained by employing a turning fork type as the quartz oscillator for the flectional  oscillation or as both the quartz oscillators for the flectional oscillation and torsional  oscillation.
Patent JP-H02283225-A (JP)
Title: Device for packing poultry into box or receptacle
Inventor: HENDORIKUSU GERITSUTO BAN DEN
IPC: A01K45/00
Filed: 1990-02-14
Abstract: PURPOSE: To pickup poultry without injuring it and to move it into a box or a container by providing a specified feed controller under the discharge position of a poultry pickup device and packaging the poultry into the box or the container. CONSTITUTION: The poultry picked up by a finger-shaped projection 20 is moved from an inclined section 26 of a separator 25 to a conveyer belt 27 and sent through conveyer belts 28 and 29 to a feed controller 30. The poultry moved into a peripheral wall rotated around the rotational center of a disk 31 is moved from a discharge opening 33 through a guide board 34 into the container. A 1st section 41 on the door of the discharge opening 33 is opened/closed by a hydraulic cylinder 45.
Patent JP-H10233636-A (JP)
Title: Amplifier and semiconductor integrated circuit device
Inventor: OKADA KOJI
IPC: H03F3/34
Filed: 1997-02-18
Abstract: PROBLEM TO BE SOLVED: To provide the amplifier in which an offset voltage and a temperature drift are cancelled. SOLUTION: An amplifier 1 is provided with 1st and 2nd operational amplifier circuits 2, 3. The 1st operational amplifier circuit 2 configures a voltage follower circuit where its output terminal connects to an inverting, input terminal, and the output terminal is connected to an inverting input terminal of the 2nd operational amplifier circuit 3. The circuit configuration and the circuit components of the 1st and 2nd operational amplifier circuits 2, 3 are identical to each other, and then they have the same characteristic and the same offset voltage. Then the output terminal of the 1st operational amplifier circuit 2 is connected to the inverting input terminal of the 2nd operational amplifier circuit 3 to allow the offset voltages of the 1st and 2nd operational amplifier circuits 2, 3 to be cancelled with each other and then the offset voltage of the amplifier 1 is cancelled.
Patent JP-S62189294-A (JP)
Inventor: MURAZAKI KAZUO
IPC: E21B10/62
Filed: 1987-02-17
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S61194743-A (JP)
Title: Preparation for semiconductor device
Inventor: ETSUNO YUTAKA
IPC: H01L21/3205
Filed: 1985-02-22
Abstract: PURPOSE:To stabilize conductivity, by forming the dummy wiring corresponding to the first layer of electrode wiring with a coating film which is eliminated after making an aperture on the second insulation film, and forming the conductor layer in the manner of filling cavities. CONSTITUTION:On the P-type silicon substrate, the N<+> type buried layer 22 and the N-type epitaxial layer 23 are formed. On the surface of the epitaxial layer, moreover, the P-type base region 24, the N<+> type emitter region 25 and the P-type diffusion resistances 26 and 26 are formed. ON the substrate 21, the thermal oxidation film 27 is formed, and apertures are made at the position corresponding to each diffusion layer. On the whole surface, the silicon nitride film 28 is deposited and the dummy wiring is formed by patterning. After the CVD oxide film 29 is deposited on the whole surface, the aperture is made on the silicon nitride film 28 to expose the silicon nitride film 28. The silicon nitride film 28 as the dummy wiring is eliminated by etching through the aperture made on the CVD oxide film 29. The As doped polycrystalline silicon film 30 of low resistance is deposited, and then the patterning is performed. Thus, conduction property of the wiring is stabilized and the yield of product can be increased.
Patent JP-H04211780-A (JP)
Title: Hot and cold water mixing type hot water supply device
Inventor: YONEKUBO HIROAKI
IPC: G05D23/13
Filed: 1991-02-28
Abstract: PURPOSE:To provide a safe hot and cold water mixing type hot water supply device which uses a mixing valve for mixing hot and cold water so as to have a suitable temperature and which prevents supply of hot water having a temperature different from a set temperature and overshooting of mixed hot water. CONSTITUTION:A drive device for driving a mixing valve body is started and stopped in response to a start and a stop of supply of mixed hot water with the use of a hot water faucet 37, a thermistor 55 provided upstream of the hot water faucet 37 and a flow switch 59. Further, occurrence of supply of hot water from a mixing valve body can be prevented even upon resupply after stopping of hot water, and erroneous recognition of a detected temperature by the thermistor can be eliminated, thereby it is possible to prevent overshooting from increasing.
Patent JP-S60149777-A (JP)
Inventor: MOHAMETSUDO JIYABITSUDO HAKIMU
IPC: C23C16/34
Filed: 1984-02-24
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H11207733-A (JP)
Title: Apparatus for producing resin mold for casting concrete
Inventor: INADA TAKESHI
IPC: B29B7/30
Filed: 1998-01-29
Abstract: PROBLEM TO BE SOLVED: To produce a resin mold for casting a fuidized concrete material into a prescribed shape with good workability. SOLUTION: A resin mold producing apparatus is constituted from mixing teeming device 34 which mixes a resin main agent liquid and a curing agent liquid and ejects them with stirring, pumps 26, 28 for supplying the resin main agent liquid and the curing agent liquid separately to the teeming device 34, and a revolving arm 38 for supporting the ejector 34. The device 34 is in a form in which a teeming pipe 46 is extended from a snake-shaped meandering static mixer 44.
Patent JP-S58152384-A (JP)
Inventor: ONO NOBUYUKI
IPC: H01R13/58
Filed: 1982-03-04
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S62191087-A (JP)
Inventor: KOJIMA AKIO
IPC: B07C5/10
Filed: 1986-02-18
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H01210446-A (JP)
Title: Halogenated resin composition
Inventor: SATO YOSHINORI
IPC: C08L27/02
Filed: 1988-02-17
Abstract: PURPOSE:To obtain the title resin composition prevented from coloring and decreasing in mechanical strengths and improved in heat stability, by adding a specified amount of a metal salt of an organic acid and an acid adduct of melamine to a halogenated resin. CONSTITUTION:100 pts.wt. halogenated resin (e.g., vinyl chloride/ethylene copolymer or chlorinated polyethylene) is mixed with 0.01-1.5 pt.wt. total of at least one member selected from among salts of organic acids such as stearic acid and a phenol with metals such as zinc and barium and 0.001-5 pts.wt. acid adduct of melamine obtained by adding 0.01-1.5mol, per mol of melamine, of at least one acid selected from among inorganic acids (e.g., perchloric acid) and organic acids (e.g., lauric acid) to a warmed suspension of a fine melamine powder.
Patent JP-H04274339-A (JP)
Title: Semiconductor element inspection method and pattern for inspecting semiconductor element used for the same
Inventor: SHICHIEDA HIROYASU
IPC: G01R31/26
Filed: 1991-03-01
Abstract: PURPOSE:To enable a disconnection portion of a pattern for inspecting a semiconductor element and its cause to be solved easily and the inspection result to be fed back to a manufacturing process or a development process of the semiconductor element rapidly. CONSTITUTION:After a contact chain 100 and a semiconductor substrate 1 are connected electrically at least at one portion, a disconnection portion of the contact chain 100 can be easily specified and its cause can be solved quickly by observing a difference in brightness of a secondary electron image at the contact chain portion which is electrically connected to a semiconductor substrate 1 and the contact chain which is not electrically connected to the semiconductor substrate 1 due to disconnection using a focusing ion beam device or a scanning type electron microscope.
Patent JP-H06230051-A (JP)
Title: Electric field strength signal correcting device
Inventor: ISHITOBI KAZUNAGA
IPC: G01R29/08
Filed: 1993-01-29
Abstract: PURPOSE:To provide an electric field strength signal correcting device by which correction can be adjusted automatically and correcting accuracy can be also heightened. CONSTITUTION:A conversion table to show correspondence between an electric field strength signal of a receiving radio wave and a signal strength value to be outputted is registered in a plural conversion table registering part 8, and information on which conversion table is used and an offset value when it is used are stored in a storage part 9. A search in the conversion table corresponding to storage information of the storage part 9 is practiced by using a value obtained by correcting the inputted electric field strength signal by the offset value in the storage part 9, and a signal strength value to be outputted is determined, and registration in the conversion table registering part 8 is practiced only to a reference conversion table, and a correction value of the inclination is stored in the storage part 9 together with the offset value, and correction is practiced by using the reference conversion table in which the inclination is corrected.
Patent JP-S62196205-A (JP)
Title: Device for storing rotary type small molded product
Inventor: ODA TAKESHI
IPC: B65G1/133
Filed: 1986-02-20
Abstract: PURPOSE:To make a storing device compact by placing plural number of storing containers on a rotary table, controlling the rotation starting timing and the angle of rotation of said table by a control unit, and making said device transportable with caster wheels provided thereto. CONSTITUTION:Molded products supplied are stored in plural containers A placed on the rotary table 5 of a storing device 1. A body 4 is provided with a caster wheels 7. The rotary table 5 is rotatably supported by the body 4 and rotated intermittently at every predetermined angle by a driving device 6. A controller B is extended to the driving device 6 through a pipe 11 and fixed on the body via the drive device 6, and thus controlling the rotation starting timing and the angle of rotation of the rotary table 5. Thus, even if the container is made compact, as a lot of molded products can be stored therein and can be moved to another device, the whole size of the storing device can be made compact.
Patent JP-H04357094-A (JP)
Title: Manufacture of sheet for thermally perforated stencil printing
Inventor: NATORI YUJI
IPC: B41N1/24
Filed: 1991-02-06
Abstract: PURPOSE:To manufacture a sheet for stencil printing without shrinkage of a film and deterioration of thermal perforation properties. CONSTITUTION:A sheet for thermally perforated stencil printing is manufactured by laminating a thermal shrinkable plastic film of a crystallinity of 5% max. and an ink-permeable base using an adhesive which is soluble in a solvent. The adhesive has a solubility parameter in the range below; solubility parameter & (cal/cm<2>)<1/2>=5.0 to 8.0 or 11.5 to 30.0.
Patent JP-S59160157-A (JP)
Title: Electrophotographic apparatus
Inventor: AOIKE TATSUYUKI
IPC: G03G21/00
Filed: 1983-03-03
Abstract: PURPOSE:To shorten a time for making the first copy in a system for automatically controlling the potential level of a latent image by executing its control process after the end of copying and before the suspension of an apparatus. CONSTITUTION:A time length for warming up a copying apparatus is used to actuate it into an operation state, a latent model image is formed on the surface of a drum 1, the observed values of potentials on the light and the dark parts are calculated, controlled, and fed to a memory circuit 16 to compare them with the reference potentials, the high voltage transformers 17, 18 of primary and secondary electrostatic chargers 3, 4 are automatically controlled to output the primary and secondary charging currents of the correct calculated control values, and correct calculated control values within the allowable value range are stored in the circuit 16. Next, when a copy start key is pushed, this first copying cycle is executed in accordance with the charging current control values stored in the circuit 16. After the first cycle, similar measurement-control cycle is executed by using the first rotation time of the drum 1 to store those calculated control values in the circuit 16, and the following cycle is executed by those values. As a result, the first copying time can be shortened.
Patent JP-S62194737-A (JP)
Title: Semiconductor integrated circuit
Inventor: KITAGAKI KAZUKUNI
IPC: H03K19/094
Filed: 1986-02-21
Abstract: PURPOSE:To improve the circuit density by using four field effect transistors (TRs) whose drain is connected to one output node so as to obtain two OR or AND operating outputs thereby eliminating the need for a power line and a ground line. CONSTITUTION:Drains of enhancement N-channel TRs 1, 4 and enhancement P-channel TRs 2, 3 are connected to one output node 7, an input node 5 of the 1st logic signal input A of is connected to the source of the TRs 1, 2 and the gate of the TRs 1, 3 and an input node 6 of the 2nd logic signal input B is connected to the source of the TRs 3, 4 and the gate of the TRs 2, 4 to constitute an OR circuit. In using the type of conduction (P- and N-channels) of the TRs 1-4 conversely, an AND circuit is constituted.
Patent JP-S58154056-A (JP)
Title: Terminal device
Inventor: HINO YUUSUKE
IPC: G06F3/023
Filed: 1982-03-08
Abstract: PURPOSE:To prevent the incapability of control which is carried out by a host, by providing an input monitor device to a terminal device connected to the host and switching automatically the operation to a receiving mode when the input given from an operator is interrupted for a period longer than the prescribed time. CONSTITUTION:A terminal device 2 is connected to a host (not shown in the diagram) via a terminal controller 1. The screen is stored 4 via an interface control circuit 3 during reception from the host. Thus a character pattern is generated 5, and the characters are displayed 7 with a display control 6. In case an operator is under an input state from an input device 8 via an input controller 9, the circuit 3 reports the input state with a signal (i). Thus it is impossible to receive a command from the host. In case the operator is absent from his or her seat under an input mode and the input is interrupted for a fixed period, an input monitor device 10 supplies a signal (k) to enable the reception from the host. This can avoid the incapability of reception due to a misoperation of the operator and then prevents the generation of a fault.
Patent JP-2000234912-A (JP)
Title: Wafer thickness measuring equipment
Inventor: ISHIMORI HIDEO
IPC: G01B11/06
Filed: 1999-02-15
Abstract: PROBLEM TO BE SOLVED: To measure the wafer thickness exceeding the wavelength of light in an optical heterodyne interference measuring unit for measuring the wafer thickness by employing a sample piece having a known thickness equivalent to the wafer being arranged at a position corresponding the height position of the wafer and at a specified angle corresponding to flexure of the wafer. SOLUTION: The equipment for measuring the thickness of a wafer 1 comprises an optical heterodyne interference measuring unit 3, and absolute distance detectors 4, 5. A sample piece, e.g. a wafer piece, is measured at a plurality of points and detection values from the absolute distance detectors 4, 5 are stored in correspondence with the measurements of displacement, i.e., the relative distance measurements, from the optical heterodyne interference measuring unit 3. When the thickness of the wafer 1 is measured, detection values from the absolute distance detectors 4, 5 are obtained at a measuring point having a surface rear height face within the height range of a sample piece from which the corresponding measurements are obtained. The detection values can be expressed in terms of relative displacement data with reference to the corresponding data and the thickness can be determined according to a specified method.