baber/WOPTO huggingface dataset:
Patent JP-H04297814-A (JP)
Title: Three-dimensional roughness meter
Inventor: NAKAZAWA KAZUO
IPC: G01B11/30
Filed: 1991-03-27
Abstract: PURPOSE:To realize real time measurement of roughness on a surface to be measured without requiring mechanical movement by converging many light spots, obtained by splitting a flux of light having astigmatism, to a micro part on the surface to be measured. CONSTITUTION:An astigmatic 12 flux of light is diffracted 13 and split into a large number of light spots arranged regularly in matrix. The flux of light is then converged 15 and projected onto an objective surface A. The projecting flux of light varies in shape of light spot between a longitudinal ellipse, a right circle and a lateral ellipse according to the position of the objective surface A. A part of flux of light reflected on the objective surface A is further reflected on a half mirror 14a and a mirror 16 and then converted through a CCD camera 17 into an image signal. The image signal is temporarily stored in an image memory 23 and subsequently processed through a central processing unit 21. In other words, the CPU 21 calculates the distance to the light spot based on the shape of each recognized light spot and then calculates the three- dimensional roughness of the objective surface A based on the relative positional relationship between the distances of all light spots and these light spots.
Patent JP-S58203457-A (JP)
Title: Multicolor electrophotographic method
Inventor: KOBAYASHI HIROYUKI
IPC: G03G9/08
Filed: 1982-05-24
Abstract: PURPOSE:To enable superior multiple transfer performance, by controlling volume resitivity of each toner, and combining developers retaining good transferability even if an electric transfer field changes. CONSTITUTION:An electrostatic latent image formed on a photosensitive drum 1 by proper means is visualized with a developer in a developing device 16-1, and a developed toner powder image is transferred with a transfer corotron 21 onto a transfer material held on a transfer drum 19 with a gripper 20. At the second color transfer, a toner powder image developed with a developer in a developing device 16-2 is also transferred onto the transfer material with the transfer corotron 21, and the third color transfer is likewise executed. The transfer drum 19 grips the transfer material, while it rotates by the prescribed times to execute the multiple transfers of the images of the prescribed colors. The volume resistivity of the toner to be transferred first is preferably as low as possible, when only the multiple transfer is considered, but the min. resistivity needs to be >=10OMEGA.cm for the first color toner, preferably, >=10<10>OMEGA.cm.
Patent JP-S59213909-A (JP)
Title: Rankine cycle system
Inventor: KOMATSUZAKI SHIGEKI
IPC: F22B1/16
Filed: 1983-05-20
Abstract: PURPOSE:To improve reliability as a system by using a silicone oil for an intermediate heat medium in a Rankine cycle system in which said intermediate heat medium is directly brought in contact with a power operating medium. CONSTITUTION:An intermediate heat medium heated by a heat source is directly brought in contact with fleon which is delivered from a fleon pump, in a direct contacting regenerator, and the generated fleon vapor is sent to a turbine and, after carrying out work, liquefied in a condenser. On the other hand, the intermediate heat medium is again sent to an intermediate heat medium heater by means of an intermediate heat medium pump. A silicone oil is used for the intermediate heat medium. Thereby, the medium has very poor affinity for a metal corroding product, it can be easily separated when merely left to stand, and it is also stable against fleon.
Patent JP-S57203580-A (JP)
Title: Stepping motor controller for feeding carrier in printer
Inventor: SATOU TSUTOMU
IPC: B41J19/18
Filed: 1981-06-08
Abstract: PURPOSE:To enable the control of a stepping motor for feeding a carrier by a microprocessor of small capacity memory by forming data for controlling time by calculation and reducing the exclusive memory locations. CONSTITUTION:In a printer which employs a stepping motor for a motor for feeding a carrier and employs a microprocessor with time interrupt at the timing of switching the excitation phase of the stepping motor and a timer capable of presetting data capable of controlling the time, STEPS A, B, C are added to the control system. The value Z set to the timer is produced by substracting the special constant N of an initial value by the value at the rising time, thereby producing a timer preset value. The step C determines the number of rises and the falls. When the rises and fall of the motor are determined by a cosine curve, the equation is calculated with respect to the Z, and the result is preset at the timer.
Patent JP-S5611136-A (JP)
Title: Heat insulating plate for upper surface of feeder head
Inventor: NISHI ATSUSHI
IPC: B22D27/06
Filed: 1979-07-11
Abstract: PURPOSE: To provide a heat insulating plate for the upper surface of a feeder head having simultaneously rapid-burning property and durable slow-burning property, by piling a lower layer contg. larger amount of Al powder and an upper layer contg. smaller amount of oxidizing agent one upon another to form one body.  
     CONSTITUTION: A lower layer consisting of 10W40wt% 100 mesh Al powder, 30W60wt% +50W-10 mesh Al grains, 0W5wt% refractory material such as residual ash of aluminum, 0.5W1.5wt% heat-expansive material such as acid-treated graphite, 10W25wt% oxidizing agent such as iron oxide etc., 0.5W2.0wt% combustion improver such as creolite, 2.5W5wt% fibrous material such as pulp, and 3W7wt% binder such as phenol resin; and an upper layer consisting of 10W25wt% 20 mesh Al powder, 20W50wt% heat resistant material, 10W20wt% heat-expansive material, 5W20wt% oxidizing agent, 1.0W3.0wt% combustion improver, 2W5wt% fibrous material, and 3W7wt% binder, are molded to form one body. The upper layer of the two-layered heat insulating plate forms an expanding, porous, heat-insulating layer, which prevents the heat radiation through the lower layer, and inhibits also the burning of the lower layer because it burns spontaneously and prevents the supply of oxygen to the lower layer. 
     COPYRIGHT: (C)1981,JPO&Japio
Patent JP-S58206751-A (JP)
Inventor: NANBU MASAO
IPC: A61L15/22
Filed: 1982-05-26
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H06271735-A (JP)
Title: Oxyalkylene-containing polyvinyl alcohol resin composition
Inventor: TOMITA MUNETOSHI
IPC: C08L51/00
Filed: 1993-03-22
Abstract: PURPOSE:To obtain the object compsn. which is excellent in the resistances to solvents and heat. CONSTITUTION:An oxyalkylene contg. polyvinyl alcohol resin which contains 0.1wt.% or lower alkali metal acetate together with an acid with a pK of 5.0 or lower in an amt. of 0. 1-10mol based on 1mol of the acetate is melt mixed with 0.01-5wt.% at least one compd. selected from the group consisting of a phenol compd. having an m.p. of 50-250 deg.C, a thioether compd., and a phosphite compd., thus giving the objective compsn.
Patent JP-H11265986-A (JP)
Title: Semiconductor storage device
Inventor: MURAKAMI HITOSHI
IPC: H01L27/10
Filed: 1998-03-17
Abstract: PROBLEM TO BE SOLVED: To achieve the low cost of flash memories and the like by enhancing the arranging efficiency of logic cells and wiring in logic circuit parts such as the flash memories, reducing the size of the chip, increasing the lines of the cells provided in the logic circuit parts at the same time and increasing the number of the logic cells that can be provided at the respective cell lines. SOLUTION: In the flash memory and the like having a memory array MARY and a logic circuit part LOGC and having gate layers SG and metal wiring layers M1 and M2 of the first layer and the second layer as the wiring layers, cell lines CL1-CL8 of the logic circuit part LOGC are arranged at the perpendicular direction for the rectangular close side in the arranging pattern of the memory array MARY, that is, the lower short side. At the same time, gate layers SG and first-layer metal wiring layers M1 are arranged as the wirings in the cell. As the power-supply wiring for each logic cell 1 and the wiring channel for the wiring between the cells, the first-layer metal wiring layer M1 is used. As the outgoing wiring between the logic cell and the wiring channel, the gate layer SG is used.  Thus, the second metal wiring layer M2 can be arranged in the arbitral direction on the upper layer of the logic cell as the wiring between the cells.
Patent JP-H06275616-A (JP)
Title: Semiconductor device and its manufacture
Inventor: HARA RYUYA
IPC: H01L23/52
Filed: 1993-03-23
Abstract: PURPOSE:To provide the manufacturing method of a semiconductor device wherein the optimum polishing end time point for an interlayer insulating film can be surely detected, and the semiconductor device having an interlayer insulating film which is obtained by the method and has a desired flattened form. CONSTITUTION:A lower wiring layer 1 is formed on a semiconductor substrate 7, an interlayer insulating film 2 is formed on the semiconductor substrate 7, a dummy pattern 3 is formed on a semiconductor device, and a second interlayer insulating film 4 is formed on the semiconductor device. The second interlayer insulating film 4 is chemically and mechanically polished until the dummy pattern 3 is exposed, and an upper wiring layer 5 is formed on the second interlayer insulating film 4. Moreover, in the process of chemical and mechanical polishing, it is preferable that chemicals which react with the dummy pattern 3 and develop color are added to the chemical and mechanical polishing agent.
Patent JP-S63252417-A (JP)
Title: Equipment with failure storage function
Inventor: MIYATA EIJI
IPC: H01L21/02
Filed: 1987-04-09
Abstract: PURPOSE:To facilitate resolving failures quickly by a method wherein the details of failures caused during the operation are stored and, when a new failure occurs, checking order is determined by referring to the details of the failures in the past. CONSTITUTION:A wafer 1 taken out of a cassette 4 is transferred through measurement stages 7 successively and probe needles 10 are brought into contact with electrodes formed on chips to measure electric characteristics. If a failure is caused during the measurement operation, the operation of a wafer prober is immediately discontinued and the error created in the wafer prober is displayed on a CRT 11 and, simultaneously, the information on the failures in the past is displayed on the CRT 11 from a memory mechanism. At the same time, the detail of the error created this time is stored by the memory mechanism. The countermeasure against the failure caused this time is implemented by referring to the failure information.
Patent JP-H06274581-A (JP)
Title: Picture processing system
Inventor: NAKANISHI HIDETOSHI
IPC: G03F1/00
Filed: 1993-03-22
Abstract: PURPOSE:To provide a picture processing system to enable the operator of each picture processing terminal to execute his own work easily without being conscious of the file management structure of a center storage device. CONSTITUTION:In the center storage device 40, a first directory area Al in which both a data base management device 30 and the picture processing terminal 10 can be accessed and a second directory area A2 in which only the data base management device 30 can be accessed are provided. The data base management device 30 retrieves a picture file required for the work to be executed by each picture processing terminal 10 from among plural picture files stored in the second directory area A2, and transfers the retrieved picture file from the second directory area A2 to the first directory area A1. Each picture processing terminal 10 executes prescribed picture processing to the picture file stored in the first directory area A1. Further, after the finish of the work by each picture processing terminal, the data base management device 30 transfers the picture file reversely from the first director area A1 to the second directory area A2 so as to register it again.
Patent JP-H09282228-A (JP)
Title: Main memory controller
Inventor: SUGAYA YUJI
IPC: G06F12/08
Filed: 1996-04-10
Abstract: PROBLEM TO BE SOLVED: To provide a main memory controller capable of accelerating data access from a device capable of executting DMA(direct memory access) or a CPU to a main memory unit while securing the consistency of data between a cache memory inside the CPU having no snooping function and the main memory unit. SOLUTION: The CPU 1 and a DMA device 2 share an address area incapable of storage to the cache memory 1c and read buffer memories 3a and 3b and write butter memories 4a and 4b for storing the data to the area are provided. At the time of read access from the area shared by the CPU 1 or the device 2, in the case that access data are present inside the buffer memories 3a and 3b, the data inside the butter memories 3a and 3b are sent to the CPU 1 or the device 2. In the case that the access data are not present inside the buffer memories 3a and 3b, the CPU 1 or the device 2 reads the data of an address for which only a loworder fixed length bit is different from a read access address from the main memory unit 7, performs error detection and correction and stores them in the butter memories 3a and 3b.
Patent JP-H08287768-A (JP)
Title: Breaker for high frequency signal
Inventor: TAKENAGA KOTARO
IPC: H01H9/54
Filed: 1995-04-13
Abstract: PURPOSE: To provide a breaker which prevents overinput of a high frequency signal by setting a high frequency signal detecting circuit, operating a relay for high frequency when the detected value is equal to a setting value or more, and switching a high frequency signal line from a normal line to an abnormal line with a changeover switch of the relay for high frequency. CONSTITUTION: High frequency signals of a high frequency line 7 and a normal line 8 are detected as DC voltage with a detecting circuit 10 comprising a directional coupler 3 and a detector 4. A DC amplifier having a voltage comparing function operates a latching type relay 1 for high frequency when the detecting voltage of the detecting circuit 10 exceeds set voltage. A changeover switch 1A of the relay 1 for high frequency separates the high frequency signal line 7 from the normal line 8, and changes over to an abnormal line 9. The relay 1 for high frequency is simply returned with a release switch 6. By this constitution, a breaker for high frequency signal capable of preventing overinput to an appliance connected to an output terminal of the normal line 8 and simply returning can be obtained.
Patent JP-S5515823-A (JP)
Title: Electrostatic recording head
Inventor: TSUTSUMI TERUO
IPC: B41J2/39
Filed: 1978-07-21
Abstract: PURPOSE: To enable steady recording by providing a recording head movably perpendicular to a back face roller and an electrostatic recording medium, and arranging to be able to apply pressure with compression springs whose pressure are adjustable.  
     CONSTITUTION: On a fixing plate 25, an electronic distributing part 23, studs 26 and a recording head 21 are attached. Two studs 26 are fixed to the fixing plate 25, and on their lower parts, male screws are cut and adjusting nuts 27 are fitted. The adjusting nuts 27 are provided to adjust, with their upper parts, the set lengths of compression springs 28 fitted on the studs 26, and on the studs 26, angles 29 to which the recording head 21 is attached, blocks 30 fixed to the angles and bushes 31 fixed to the blocks 30 are fitted slidably. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-S5516024-A (JP)
Title: Preparation of polyester
Inventor: FUNAKOSHI WATARU
IPC: C08G63/00
Filed: 1978-07-21
Abstract: PURPOSE: To obtain a high-quality polyester with little softening point drop, good appearance, and useful for fibers, etc., by direct esterification between terephthalic acid and a glycol in the presence of a specific lactam and an organo-titanium compound followed by carrying out polycondensation.  
     CONSTITUTION: A direct esterification is carried out between terephthalic acid (along with a dicarboxylic acid such as adipic acid, sebacic acid, isophthalic acid, etc.) and a glycol such as ethylene glycol, 1,3-propanediol, neopentyl glycol, etc., in the presence of a lactam of formula (X is 3W5C alkylene, R is H or 1W4C alkyl), e.g. a pyrrolidone, ε-caprolactam, etc., and an organotitanium compound such as a titanium carboxylate, etc., in amounts of 5W100 millimol %, 0.5W50 millimol % (calculated and as titanium atom), both based on the dicarboxylic acid, respectively. The reaction product obtained above is subsequently subjected to polycondensation. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-S63309802-A (JP)
Inventor: GEETO KAARU BIIININGU
IPC: G01N37/00
Filed: 1988-04-12
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H10284901-A (JP)
Title: High frequency switch and transmission/reception changeover device
Inventor: SHIGEMATSU TOMONORI
IPC: H01P1/15
Filed: 1997-04-07
Abstract: PROBLEM TO BE SOLVED: To realize a high frequency switch broad frequency band system where a matching section is formed on the output terminal side of a switching element parallel-loaded at a position of a path apart by 1/4 wavelength from a branch point of the path. SOLUTION: In a single pole double throw(SPDT) switch, a PIN diode 3a (3b) whose other terminal connects to ground is parallel-loaded to a branch point of a path leading to an input terminal 1 via a DC-cut capacitor 9 and a 1st output line 4 whose length is equivalent to 1/4 wavelength with respect to a center frequency, a matching section 7 consisting of a 2nd output line 5 and a taper line 6 is connected to the one terminal and the other terminal of the section 7 is connected to an output terminal 2a (2b) via a DC-cut capacitor 9 and a 3rd output line 8. The characteristic impedance of the 2nd output line 5 is higher than that of the 1st output line 4 and the 3rd output line 8 and the taper line 6 converts the impedance of the 2nd output line 5 and the 3rd output line 8 when connecting the lines 5, 8 are connected.
Patent JP-S59213161-A (JP)
Title: Semiconductor device
Inventor: NAGANO KAZUTOSHI
IPC: H01L31/02
Filed: 1983-05-19
Abstract: PURPOSE:To enable to lead out the electric signal output by means of only photo input without necessitating the power source line for driving a semiconductor element from outside by electrically connecting a photo electric conversion element converting the input light into electric energy to the semiconductor element acting with the converted electric energy as the driving source. CONSTITUTION:The photoelectric conversion element 102 is irradiated with the input light 104, which light is then converted into electric energy, resulting in the generation of such a voltage that the terminal 106 becomes at a positive potential to both terminals 106 and 107. When a ring oscillator starts to operate by the supply of the generated voltage between the voltage terminals 117 and 118 of the semiconductor element 111 via wiring parts 109 and 110, the wave form of a pulse voltage can be obtained as the output in the output terminals 115 and 116 of said element 111. In this case, for example, a voltage stabilizing circuit 201 is provided in the halfway of the wiring parts 109 and 110 in order to supply the output voltage of said conversion element 102 to said element 111 by stabilization.
Patent JP-S5515255-A (JP)
Title: Control rectified semiconductor element
Inventor: KUDOU NAOTAKE
IPC: H01L29/74
Filed: 1978-07-19
Abstract: PURPOSE:To raise a gate sensibility without causing reduction of dv/dt amount by providing in a gate portion a region for preventing the current making no contribution to a trigger of a gate current to utilize the gate current effectively. CONSTITUTION:A n-type region nG is provided in a PB layer on the circumference of a gate electrode G and a junction J4 is provided between the PB layer and nG region. In this construction, when a gate voltage is impressed onto the intermediate between a gate G and a cathod K to turn the gate positive, because of the presence of the nB region, the current component of the current flowing through the junction Jl between the PB layer and nE layer is blocked, only the current component passing through the interior is appeared, and a SCR is turned on by a small gate current. Because the sensibility of the gate can be raised without increasing an injection efficiency of the junction Jl, the dv/dt amount can be sustained at a normal level. A nG region is formed together with the nE layer.
Patent JP-H02267847-A (JP)
Title: Ion implanter
Inventor: NISHIKAWA KAZUHIRO
IPC: H01J27/04
Filed: 1989-04-07
Abstract: PURPOSE:To detected the intensity distribution of ion beams and to output an abnormal signal when an abnormality is detected with a simple structure by detecting the rise time of a disc current from zero the first peak, and outputting an abnormal signal when the detected rise time is less than a preset value. CONSTITUTION:The voltage corresponding to a disc current ID is differentiated with a differentiating circuit 341 to obtain a signal S1, and the signal S1 is detected with comparators 342 or 343 when it is positive or negative respectively. A timer 344 is started by the rise of a signal S2 from the comparator 342 and stopped by the rise of a signal S3 from the comparator 343, thereby a rise time TA can be detected. Then the detected rise time TA is compared with a preset value in a comparator 345 to output an abnormal signal S0 when the value TA is less than the preset value.
Patent JP-H07296147-A (JP)
Title: Device and method for recognizing id of semiconductor wafer
Inventor: ITO YOSHINORI
IPC: H01L21/02
Filed: 1994-04-26
Abstract: PURPOSE:To provide the device and method for recognizing ID of semiconductor wafer capable of exactly recongiging an identifier in a short time. CONSTITUTION:A control circuit 11 receives information on the surface of a semiconductor wafer 7 from a host CPU4 for each manufacture process and adjusts the voltage or current of a light source 2 based on the information, so that the intencity of reflected light to be received at a photodetector 1 can be controlled.
Patent JP-S5612090-A (JP)
Title: Squeeze pump
Inventor: YAMASA KAZUHIKO
IPC: F04C5/00
Filed: 1979-07-12
Abstract: PURPOSE: To obtain a small-sized pump with a light weight by connecting a pump to an electric motor directly without disassembling a reduction gear.  
     CONSTITUTION: When an electric motor 17 is rotated, an intermediate transmission body 20 is rotated at a reduced speed by a planetary gearing mechanism composed of a sun gear 17a, a planet gear 23, and an internal gear 16b. In this construction, the speed is further reduced by the transmission of gears 20b and 24, and an internal gear 6e, and a hollow housing 6 containing all of these gears inside is rotated. Therefore, a pump is sealed up to be fitted with the electric motor 17 from the outside, and prevented from injuries externally given, as its noises being reduced. The electric motor 17 can be dismounted without disassembling the reduction gear part, and fitted only by inserting its shaft as engaging the sun gear 17a with a planetary gear 23. 
     COPYRIGHT: (C)1981,JPO&Japio
Patent JP-S63288237-A (JP)
Inventor: HENRI TEODOO RAAMESU
IPC: D06M101/16
Filed: 1988-04-13
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。