Patent GB-1185087-A (GB)
Title: Apparatus for Performing Electrical Functions on Analog Signals
Inventor: NUSSBAUMER HENRI
IPC: H04B1/62
Filed: 1967-06-01
Abstract: 1,185,087. Electric selective signalling. INTERNATIONAL BUSINESS MACHINES CORP. 1 June, 1967 [15 June, 1966], No. 25236/67. Heading G4H. The characters of a P.C.M. signal representing the amplitude of a first analogue signal are operated on so that they represent an analogue signal derived from the first signal by the performance of an electrical function. In the embodiment described in which the P.C.M. signal comprises a sign T1 bit and five magnitude bits, the electrical function may be filtering (Fig. 5, not shown), amplification by right or left shifting of the magnitude bits relative to the sign bit (Figs. 7, 8, not shown) or shaping (Fig. 14, not shown) by suppressing all bits except the sign bit and applying a clock pulse at time T6 to an OR gate so that the output characters represent a constant amplitude signal. Modulation may also be performed (Fig. 9) by applying the sign of the carrier on input E2 at time T1 so that the P.C.M. signal is given a positive sign when the carrier and coded signal are of the same sign and a negative sign otherwise. Half wave rectification may be effected by controlling a bistable (TA, Fig. 10, not shown) by the sign bit so that an AND gate is only enabled to pass the magnitude bits when the sign bit is positive. Full wave rectification may be effected by applying a clock pulse at time T1 to an OR gate to ensure that the sign bit is positive (Fig. 11, not shown). A synchronous detector (Fig. 12, not shown) transmits the signal unchanged when the carrier is positive and suppresses it when the carrier is negative. Invertion may be effected by applying the magnitude bits to an AND gate (131, Fig. 13, not shown) enabled at T1, the bits also being fed to an inverter the output from which is applied to an AND gate enabled only at T1. Multiplexed signals (Fig. 15, not shown) may be sequentially fed to any of the modifying circuits described, the resulting P.C.M. signals being converted to P.A.M. signals and distributed under the control of a clock on to separate leads. If the magnitude bits of the character represent the amplitude on a logarithmic scale a coded output representing log aE may be obtained by passing the sign bit unchanged through gate 161 (Fig. 16) and adding or subtracting a P.C.M. coded gain a (in dependence on the sign of a) in circuit 162. Circuitry (Fig. 17, not shown) is also described for suppressed carrier modulation in which two coded signals are multiplied. Frequency doubling can be effected by deriving from a signal E = e sin wt a signal delayed by #/2w that is - e cos wt and applying these to the circuitry of Fig. 17. An output signal f = #E N  B N  may be derived by storing in each row of a core memory a coded signal E i  and the multiplication factor B i . The rows are sequentially read out to registers RB, RE (Fig. 20) connected to a multiplier 205. The output of multiplier 205 is converted from logarithmic to linear form and added to the contents of accumulator 208 so that the running totals appear as an analogue output signal S.