Patent GB-1210355-A (GB)
Title: Improvements in or relating to digital display systems
Inventor: CAMPBELL THOMAS
IPC: G06F3/153
Filed: 1966-11-15
Abstract: 1,210,355. Cathode-ray tube displays. AUTOMATIC TELEPHONE & ELECTRIC CO. Ltd. 19 Oct., 1967 [15 Nov., 1966], No. 51091/66. Heading H4T. In an arrangement for displaying rows of characters on the screen of a cathode-ray tube by the application of bright-up pulses to a beam control electrode of the tube at appropriate instants during the formation of a line scanned raster, coded digital data words, representative of all the characters to be displayed in a complete row across the screen and arranged to specify a unique address, for each character, in a translation device which provides m sets of n bits controlling the application of the bright-up pulses for each character to be displayed, are read out of a store in the raster line period preceding that in which the top line of the row of characters is to be displayed and supplied to a character line store, comprising a plurality of multi-stage shift registers, a data word at a time in parallel form for each data word, each bit of each data word being supplied to a respective shift register in the order in which the characters are to be displayed and the multi-bit output, formed by the least significant stage of each shift register and defining the unique address, being recirculated into the most significant end of the respective shift registers as the character data words are shifted downwardly, the recirculation taking place during m-1 raster line periods commencing with the period following that in which the shift registers are loaded. As shown in Fig. 1, coded digital data words defining 64 characters (for a complete row on the tube screen) are read out of a core store CS and supplied via an input siwtch IS to a character line store CLS. Each data word consists of eight bits (seven address bits plus a parity bit) and the CLS comprises eight individual recirculating shift registers each of sixty-four bit capacity. When the store CLS is full (i.e. contains the data defining 64 characters) a reload/ playout control R/PC causes the data word defined by the bit in the least significant stage of each of the eight shift registers to be fed, in parallel form, to the parity check PC and the address decoder AD. This data word, which represents the first character, selects the appropriate combination of address leads for the translation device TM comprising a diode matrix supplying a "pattern" of "dot" outputs defining the characters in terms of a 7 Î 9 dot matrix (i.e. 7 dots in width x 9 raster lines in height) within a 10 dot x 9 raster line area, the first and last two dot areas being blanked to provide character separation. All the dot information is then supplied serially at the rate of an oscillator O (approximately 12À27 Mc/s.) via a staticizer STAT and serializer SC to produce the various blanking and bright-up requirements for production of the spacing and the elements forming the first line of the first character. The first line of the other 63 characters is produced in similar manner as the data in the store CLS is shifted, a bit at a time, from the least significant ends to the most significant ends of the shift registers and successive lines of all the characters are then produced in similar manner until all the 64 characters of the first row have been produced. The cycle is repeated with a fresh set of coded digital data defining the next thirty-one rows of characters being stored in CLS at the start of each cycle and the whole sequence is then repeated at the field rate of the display system. Instead of displaying 32 rows of characters on a single tube, which does not allow any space between character rows, two display tubes (monitors) may be employed each displaying 16 rows of characters with a space between each character equal to the height of a character. This arrangement may be extended to allow eight display tubes, in four pairs, each tube displaying rows of different characters to be driven from the same symbol generator SG and the capacity of the system may be further extended by driving more than one symbol generator SG from the same display backing store DBS. An arrangement of this kind in which six symbol generators SG each driving eight display tubes and controlled by a single display backing store DBS is described with reference to Fig. 2 (not shown). The Parity bit check PC operates when a parity discrepancy is detected to produce a vertical line before and after the character whose code word has such discrepancy. Underlining of characters and selection of a particular display tube is effected under the control of two further 8-bit words, respectively, derived from the casestore CS.