baber/WOPTO huggingface dataset:
Patent JP-H08321804-A (JP)
Title: Communication terminal equipment
Inventor: SUGITA TAKEHIRO
IPC: H04W52/02
Filed: 1995-05-24
Abstract: PURPOSE: To considerably reduce power consumption at the time of intermittent reception in a communication terminal equipment. CONSTITUTION: The state value of a second diffusion code generation means 62 at the time of next starting is set in a register means 73 and a timer means 70 is operated. Second and first diffusion code generation means 62 and 75 and a reception system circuit are stopped and a system becomes a sleep state. At the time or restarting by the time-out of the timer means 70, the reception system circuit is operated and the second diffusion code generation means 62 is operated from the state value which is set in the register means 73. Furthermore, an intermittent reception means 65 operating the first diffusion code generation means 75 from an initial state is provided. Thus, the first and second diffusion code generation means 75 and 62 can be stopped at the time of non- reception, and power consumption at the time of intermittent reception can considerably be reduced.
Patent JP-S63316456-A (JP)
Title: Semiconductor device and manufacture thereof
Inventor: KAWAMATA SHIGERU
IPC: H01L21/768
Filed: 1987-06-19
Abstract: PURPOSE:To fluidize a melted metal in a fine contact hole part and to bury it easily there, by forming a wiring metal on a wiring part of a semiconductor device with a base layer better in its wetting performance than the wiring metal in between. CONSTITUTION:After a substrate 1 is coated with an SiO2 insulating film 2, a prescribed pattern is formed on a contact region, and the insulating film 2 is etched up to the semiconductor substrate 1 so as to form a submicron contact hole 3. The semiconductor substrate 1 including a sidewall 5 of the contact hole 3 is coated with a base layer 4 made of MoSi2 by Co sputtering. Next, bias sputtering or the like is used to coat the base layer 4 with a wiring metallic film 6 made of Al. When the Al is made to be equal to or more than a melting point (660 deg.C) by a rapid annealing method which uses infrared rays, laser beams, or the like, a state of the Al rapidly changes from a solid phase to a liquid phase and the Al fluidizes on the base layer 4 and flows into the contact hole 3 from the contact region and its vicinity, so that the surface of the substrate is flattened. Hence a wiring metal can be easily fluidized and buried into the hole.
Patent JP-S6042919-A (JP)
Title: Ultrasonic wave delay line
Inventor: HAYAKAWA DAISHIROU
IPC: H03H9/36
Filed: 1983-08-18
Abstract: PURPOSE:To obtain a delay line having excellent unnecessary reflecting characteristics without increasing the size by making the length of an electroacoustic transducer at the input side longer than that of the output side among the electroacoustic transducers fitted to the same side of a delay medium. CONSTITUTION:The input-side and output-side electroacoustic transducers 13, 14 are fitted to the same side face of one side of the delay medium made of glass formed in the form of modified pentagon. The size of the transducer 13 is prolonged longer than the transducer 14. In this case, the transducer 13 is formed longer than a transducer 2 in conventional examples, its directive angle is narrowed and then the component becoming unnecessary reflection is at a lower level than the conventional examples. Further, the length of the transducer 14 is shorter than that of the conventional examples, but the mismatching caused thereby is cancelled by the other method in this case. Moreover, an absorbing agent 16 for eliminating an unnecessary reflection signal is fitted to a part except a major propagation path 15 of the ultrasonic wave.
Patent JP-H0314381-A (JP)
Title: Signal processor for digital signal
Inventor: MOGI HISAO
IPC: G11B27/036
Filed: 1989-06-13
Abstract: PURPOSE:To prevent the generation of no display on a monitor screen by linearly sequentially displaying a specific picture at the time of monitoring the screen. CONSTITUTION:Each of line memories 132, 134 included in a buffer memory means 130 can store a video signal for e.g. 2H (H is a horizontal period) period. Namely, video signals for one field are successively stored in a memory 62 in each 2H, and when writing operation is ended, the memory 62 is controlled at a reading mode until the succeeding video signal of 2H arrives, all the written video signals are read out and displayed on the monitor screen. Since the video signal of each 2H is stored in the memory 62, image information is increased on the monitor screen in the unit of 2H and the screen is displayed just like linear sequence. Consequently, the generation of no display on the screen in spite of the existence of reproduced sound can be prevented.
Patent JP-H08322017-A (JP)
Title: Reproducing device
Inventor: NAGANO SHUICHI
IPC: H04N5/44
Filed: 1995-05-26
Abstract: PURPOSE: To prevent a screen from being burned by decreasing the luminance level of an output video signal relating to video data when the fact that the display output of a video relating to the video data continues for prescribed time is detected. CONSTITUTION: When a video CD is reproduced, an MPEG video decoder 12 decodes image data of one frame from a picture read out from a disk and sends out a decode completion signal at every state in which an output condition for display is set. A system controller 22 starts the count of an internal timer by the decode completion signal, and preforms such control to decrease the luminance level of an outputted composite video signal or Y/C signal for an NTSC/PAL encoder 19 to some extent when the video of certain frame is displayed successively for the prescribed time. Also, such control to stop the execution of character display is performed on an OSD processing part 18. In this way, the screen is prevented from being burned, which sets a state in which a reproduced image is displayed as it is.
Patent JP-H10340951-A (JP)
Title: Semiconductor device and its manufacture
Inventor: SHINTAKU HIDEOMI
IPC: H01L23/522
Filed: 1997-06-09
Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device, wherein the size of a contact hole is smaller than the resolution of photolithography and irregularities in the dimension of the contact hole is restrained, and its manufacturing method. SOLUTION: An N-type impurity diffusion layer region 17 of the surface layer of a semiconductor substrate 3 and a wiring layer 5 are electrically connected by embedding a connection wiring layer 6 in a contact hole 2 penetrating an insulating film 4 and a slit formed on the wiring layer 5. When the contact hole 2 is patterned by photolithography, exposure to light is performed by using a mask having a mask pattern 2a with which a slit overlapping perpendicular to the slit of the wiring layer 5 is formed on a photoresist. When the contact hole 2 is formed by etching, only the insulating film 4 is eliminated by applying the selecting ratio of the insulating film 4 and the wiring layer 5. The size of the aperture of the contact hole 2 is prescribed on a region, in which the slit of the wiring layer 5 and the mask pattern 2a overlap with each other.
Patent JP-H06337594-A (JP)
Title: Image forming device
Inventor: SHOJI HISAFUMI
IPC: G03G15/08
Filed: 1993-05-28
Abstract: PURPOSE:To provide an image forming device which can obtain high image quality by means of a developing device which prevents toner which has once stuck to a photosensitive body in a developing area from being scraped and prevents scattering of toner. CONSTITUTION:The image forming device is provided with: a toner carrying means 3 which carries toner 1 to the developing area 2; a rotary magnetic field generating means 5, in the toner carrying means 3, which is arranged on the side of a toner pool 4 rather than the developing area 2; a magnetic field generating area 6 which changes with time on the specific area of the toner carrying means 3 by the rotary magnetic field generating means 5; and the developing device which, after mixing magnetic carrier 7 and the toner 1 in the magnetic field generating area 6, carries the toner 1 to the developing area 2 and develops an electrostatic latent image.
Patent JP-H0316428-A (JP)
Title: Logic circuit
Inventor: KANUMA AKIYOSHI
IPC: H03K19/096
Filed: 1989-06-14
Abstract: PURPOSE:To avoid a terminal set initially from being at a high impedance, to allow a circuit to hardly be affected with the influence of the software error and a leakage current and to attain low power consumption and the fining of element by holding the logic tentatively with a flip-flop. CONSTITUTION:A flip-flop FF composed of MOSFETs P22, N23 and an inverter 101 composed of MOSFETs P21, N22 and initial setting MOSFET N21 are provided on a logic circuit, and a combination circuit CC composed of MOSFETs N24-N29 where prescribed output signal X1-X6 are inputted to their gates and a MOSFET N210 supplying a prescribed level to the combination circuit CC are provided. 1st and 2nd clock pulse being in non-overlap relation are given to the FET N21 and the FET N210 to apply initial set to the flip-flop FF, the FET N210 is conductive to hold or revise the logic of the flip-flop FF responding to the logic of the combination circuit CC connected to the power supply or ground through the FET N210 and the input signal.
Patent JP-S6326018-A (JP)
Inventor: DANIERU SENDEROBUIKUSU
IPC: H03H15/00
Filed: 1987-06-19
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S5775037-A (JP)
Title: Fault search system for regenerative repeating transmission line
Inventor: KITASAGAMI HIROO
IPC: H04B17/40
Filed: 1980-10-29
Abstract: PURPOSE:To search a faulty repeating point while leaving a main transmission line as it is, by providing a pair of lines besides the main transmission line and by providing a code rule monitor circuit for the transmission signal in each regenerative repeater and by providing a measuring means for the DC resistance value of the line in a terminal station equipment. CONSTITUTION:A means is provided which short-circuits a pair of lines provided separately and measures a DC resistance to an abnormal repeating point from a terminal station equipment to detect the faulty repeating point when an abrnomality is detected during signal transmission by a repeater. For example, when detecting the disturbance of the code rule, a code monitoring circuit 7 of each repeater of optical communication generates a pulse, and a switch controlling circuit 8 operates a switch SW to short-circuit a line 10. Meanwhile, a terminal station equipment measures always a DC resistance value of the line 10 by a digital resistance measurer 11, and this DC resistance value is recorded by a recorder 12 to monitor and record always the abnormality of repeating points, thereby detecting a faulty repeating point wit high precision while leaving the main transmission line as it is.
Patent JP-H05324458-A (JP)
Title: High-speed page mode detection circuit for main storage device
Inventor: NARITA YOSHITAKA
IPC: G06F12/02
Filed: 1992-05-19
Abstract: PURPOSE:To execute the efficient high-speed page cycle of a DRAM by changing the number of comparative bits at an address comparator for detecting a high- speed page mode corresponding to the detected dynamic RAM. CONSTITUTION:The number of address inputs to the respective DRAM in a main storage device is set to setting means SW1 and SW2. On the other hand, when there is access from a CPU to the main storage device, which DRAM in the main storage device is accessed is detected by the address of an access object. Thus, the number of address inputs to the DRAM to be accessed is detected. Corresponding to the number of address inputs to the DRAM, a changing means 11 changes the number of bits at the address comparator for detecting the high-speed page mode. Thus, when the DRAM having a lot of address inputs and the DRAM having a little address inputs are mixed, the access in the high- speed page mode can be efficiently performed even concerning the DRAM having a lot of address inputs.
Patent JP-S5855418-A (JP)
Title: Remedy for hyperlipemia
Inventor: ENDOU AKIRA
IPC: A61K31/22
Filed: 1981-09-25
Abstract: PURPOSE:A cholesterol depressant that contains, as an active ingredient, a salt of monacholin K carboxylic acid or ML-236B carboxylic acid with an anion- exchanging basic macromolecular compound, thus showing high pharmacological activity, stability and safety. CONSTITUTION:The objective remedy contains a salt of monacholin K carboxylic acid of formulaIor ML-236B carboxylic acid of formula II with an anion-exchanging basic macromolecular compound such as basic protein or base polypeptide as an active ingredient. Preferable examples of the above macromolecular compound are protamine, lysozyme, cytochrome C, tripsin, papain and ficin. The above compound is novel and obtained by reaction between monacholin K carboxylic acid or ML-236B carboxylic acid and the macromolecular compound in an aqueous medium and the weight ratio of the former to the latter is 0.1-1.
Patent JP-H0314254-A (JP)
Title: Semiconductor wafer processing apparatus
Inventor: HIRAMATSU SHINICHI
IPC: H01L21/68
Filed: 1989-06-13
Abstract: PURPOSE:To eliminate the contamination of a semiconductor wafer in other process caused by the attaching of a metal film of the rear of the semiconductor wafer, and enable the loading and the unloading of semiconductor wafer on and from a pallet by belt conveying, by constituting the pallet on which a plurality of semiconductor wafer are mounted in two-layer structure. CONSTITUTION:In a semiconductor wafer processing apparatus which mounts a plurality of semiconductor wafers on a pallet and processes them en bloc, the pallet is constituted in a two-layer structure wherein the pallet is moved up and down via a guide bar 4. The lower pallet 1 is provided with the following; a semiconductor wafer mounting part 1a, penetrating holes 1b through which conveying mechanism 6a, 6b for conveying the semiconductor wafers 3 on the mounting part 1a can come and go, and penetrating holes 1c through which stopping bars 7a, 7b for stopping the conveyed semiconductor wafers 3 can come and go. The upper pallet 2 is provided with penetrating holes 2b for covering the periphery of the mounted semiconductor wafers 3, which holes are a little smaller than the diameter of the semiconductor wafer 3. The above two-layer structure pallet performs wafer processing, while the semiconductor wafers 3 are sandwiched by the upper and the lower pallets 2, 1.
Patent JP-2000339009-A (JP)
Title: Positioning control unit, cpu unit and programmable controller system
Inventor: SHIRAKI SHINJI
IPC: G05B19/4155
Filed: 1999-05-31
Abstract: PROBLEM TO BE SOLVED: To make the cooperation between the positioning processing and the control of a finishing machine closer and to improve both machining accuracy and machining speed by notifying a CPU unit of the state of a positioning control program of an MC unit via the interrupt processing and executing the prescribed interrupt processing via the CPU unit. SOLUTION: The instructions are successively decoded from a positioning control program and at the same time an interrupt request instruction is decoded while the servo control is carried out (404). Under such conditions, the interrupt request processing is executed (405, 406). At the same time, an interrupt request is given to a CPU unit immediately or in the timing that is designated by the interrupt request instruction. The CPU unit receives the interrupt request and executes a designated interrupt program. Thus, an MC unit cooperates with the CPU unit to quickly perform a work machining process, etc.
Patent JP-S638595-A (JP)
Inventor: KODAMA MITSUHIRO
IPC: G21C17/10
Filed: 1986-06-30
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H08143701-A (JP)
Title: Method of decomposing foamed plastic material
Inventor: RONARUDO ESU UIRIAMUZU
IPC: B29K27/00
Filed: 1995-06-19
Abstract: PURPOSE: To bring a foamed plastic material into a state of a concentrated fluid suited for storage, transportation, and final disposal or reclaiming and recycling by dissolving the plastic material in a resinic acid ester composition.  
     CONSTITUTION: The foamed plastic materials means a polystyrene foam, a polyethylene foam, an ABS foam, a cellular PVC or a vinyl foam. The resinic acid ester used may be a normally liquid one being a lower alkyl ester of an aliphatic monocarboxylic acid. It is exemplified by one prepared by transesterifying soybean oil with methyl alcohol. A solvent for the fatty acid is suitably one which reduces the viscosity, for example, N-methyl-2-pyrrolidone or the like. It is also possible that 3-10 wt.% based on the entire composition, known surfactant is added in order to improve the solubility of the plastic component. According to this method, any arbitrary type of foamed plastic such as a polystyrene foam can be disposed of without marked danger after it is decomposed in e.g. a container. 
     COPYRIGHT: (C)1996,JPO
Patent JP-H01318442-A (JP)
Title: Telephone terminal equipment
Inventor: MATSUMOTO SHOJI
IPC: H04M1/00
Filed: 1988-06-20
Abstract: PURPOSE:To set the incoming display form of a relevant telephone terminal equipment just with input of a prescribed number via numeric character input part by setting the incoming display form to an incoming display part in accordance with the number decided by an input deciding means. CONSTITUTION:A user of a telephone terminal equipment 13 select optionally the ringing from for the sound volume, the tone (frequency), etc., of the incoming display sound received from a ringer 5 out of plural types of forms set previously. In such a case, a special number decided previously for setting a ringing form and a ringing form number RP decided in accordance with each ringing form are inputted via a key pad 9. The equipment 13 decides the numeric characters received from the pad 9 via an input deciding part 8 and confirms the special number for setting the ringing form. Thus the equipment 13 stores the number RP received from the key pad 9 together with the special number in a memory part 2 as the ringer information 21.
Patent JP-S63316125-A (JP)
Title: Information retrieving device
Inventor: KATAYAMA RITSU
IPC: G06F17/30
Filed: 1987-06-18
Abstract: PURPOSE:To easily perform the registration of a specific area name to complement a retrieval condition, by providing a correspondence area name storage means which stores an area code corresponding to an area name and a relative area storage means which stores a specific area code corresponding to a user. CONSTITUTION:A memory 5 is provided with an area name correspondence table as the correspondence area name storage means and a relative area registration table as the relative area storage means. The area code inputted from a keyboard 2 is stored in the relative area registration table correspondingly to the user. And when retrieval is performed by complementing the area name as the retrieval condition, the area name stored in the area correspondence table shown as the area code stored in the relative area registration table corresponding to the user is complemented as the retrieval condition. In such a way, it is possible to perform the registration of the specific area name to complement the retrieval condition easily.
Patent JP-S5377237-A (JP)
Title: Curable c omposition
Inventor: NOGAMI SUMITAKA
IPC: C08G59/00
Filed: 1976-12-20
Abstract: PURPOSE: A resin composition for coating and molding having good adhesion to substrates, corrosion resistance and curing properties, which is composed of a resin containing reactive groups, a specific curing agent and a reaction product. 
     COPYRIGHT: (C)1978,JPO&Japio
Patent JP-S5275735-A (JP)
Title: Crawler with mud remove device
Inventor: NAKAGAWA MASAO
IPC: B62D55/088
Filed: 1975-12-20
Abstract: PURPOSE: Mud remove wheel is driven in synchronism with crawler drive sprocket, to remove mud sufficiently from mud outlet hole of the crawler. 
     COPYRIGHT: (C)1977,JPO&Japio
Patent JP-S5778647-A (JP)
Title: Optical recording and reproducing device
Inventor: TANAKA SHINICHI
IPC: G11B7/12
Filed: 1980-10-31
Abstract: PURPOSE:To prevent damage of an objective lens, by installing a cover to the objective lens when it is not used, and detaching it and briging it close to a disk when recording and reproducing. CONSTITUTION:When recording and reproducing, a plunger 31 is operated, a protective cover 28 is moved to the right through a coupling body, is opened, and an optical system 25 projects to the upper part of an upper plate 27. According to such a constitution, the objective lens is protected.
Patent JP-H10339595-A (JP)
Title: Heat exchanger
Inventor: HIRAO YASUHIKO
IPC: F28F1/32
Filed: 1997-06-10
Abstract: PROBLEM TO BE SOLVED: To reduce the dead water region of the basin of a heat transfer pipe and to improve heat transfer rate by forming a protrusion part where an upstream side projects against the flow direction of air and the part is inclined lower toward a downstream side and at the same time an inclination area is increased. SOLUTION: Each protruding part 10 for eliminating a dead water region being formed at the rear flow region of a heat transfer pipe 2 where an air flow 3 flows is formed between positions where the heat transfer pipe 2 of a flat fin 1 is inserted. The upstream side of the protruding part 10 projects against the flow direction of the air flow 3, the part 10 is continuously inclined lower toward a downstream side, and the area of its inclination surface is continuously widened. Also, a top part Q of a projecting edge is formed near a line E-E passing through each position where the heat transfer pipe 2 is inserted along the longer direction of the flat fin 1 or at the downstream side of an air flow 3 from the line E-E.
Patent JP-S6214066-A (JP)
Title: Digital cycle measuring circuit
Inventor: OKAMOTO CHIKAYUKI
IPC: G01P3/489
Filed: 1985-07-12
Abstract: PURPOSE:To obtain a speed comparator circuit which enables a higher accuracy simply, by determining the lowest order bit information on the basis of a sam pling value of a clock signal by an FG signal while the timing of applying a clock to a speed comparison counter and stopping it is determined by synchro nizing the FG signal with the clock signal. CONSTITUTION:FFs 61 and 62 sample a clock 21 at the leading edge of an FG signal 22 and send it to the Q output. Here, the Q output of the FF62 gives a preceding sampling value while the Q output of the FF61 outputs a new sampling value. Then, a logical gate 67 outputs a signal 85 which will be high when the clock 21 corresponds to a high level with the counts of a counter 34 reaching 4. A logical gate 66 outputs signals 84 and 84' which will be high when the clock 21 corresponds to a low level with the counts of a counter 64 reach 1 or 0, according to the output of a logical gate 70. The inversion of Q output of an FF63 having the outputs 84 and 85 as input gives signals 86 and 86'. The output of ANDing the signals and a raw clock signal 21 provides shaping clock pulses 82 and 82'.