Patent GB-1050592-A (GB)
IPC: G11C19/08
Abstract: 1,050,592. Circuits employing magnetic storage elements. WESTERN ELECTRIC CO. Inc. May 14, 1963 [May 21, 1962], No. 18995/63. Heading H3B. [Also in Division G4] A conductor 20, Fig. 1, is coated wholly or at intervals with anisotropic magnetic material 21 providing a circumferential easy direction of magnetization and a longitudinal hard direction, storage regions being defined by spaced solenoid windings 22 which when energized drive the adjacent material into the hard magnetization direction. Information stored in any one region is transferred to an adjacent region by simultaneously energizing one solenoid winding and de-energizing the other, the energized winding inducing a current in the conductor which determines the direction the relaxing field takes up along the easy direction in the region of the de-energized solenoid winding. Shifting register.-A series of lattice bridge networks formed by the coated conductors is shown in Fig. 3, each lattice bridge forming a section SEC. 1 to SEC. 4 two of which are needed for each information bit. Each storage region is defined by a solenoid winding A1-A4, B1-B4, C1-C4, D1-D4, section SEC. 1 storing a " 1 " and section SEC. 3 storing an " 0 " as indicated by the plus and minus rotation adjacent windings A1-A4 and D1-D4. Stored information in section SEC. 1, for example, is transferred to SEC. 2 by first pulsing windings A1 and C1 and de-energizing windings A2 and B2 in time position T1 as shown in Fig. 5. The regions associated with the A1 and C1 windings are switched to the hard direction and induce outputs in the lattice conductors which set the de-energized regions associated with windings A2, B2 to the " 1 " direction along the easy axis. Windings B1 and D1 are pulsed in time position T2 and windings C2 and D2 de-energized so that the regions associated with the latter windings relax into the easy direction representing a " 1 ". Similarly in time positions T3 and T4 the information bit stored in SEC. 2 is transferred to SEC. 3. The cross connections 33, 36 between sections SEC. 2 and SEC. 3 show how the information bit stored in the former section may be transferred to the latter section in complementary form. Fig. 7 shows a modification in which the information in three storage circuits 67-69 provides a majority input to a circuit 70, and the resultant signal is transferred in the same form to parallel circuits 71, 73 and in complementary form to circuit 72. Drive circuits.-The windings A1-D4 in Fig. 3 are connected in series groups A1, A3 (odd A's), A2, A4 (even A's) . . . etc. which are connected to respective drivers 46-49, Fig. 4. Each driver comprises transistors 50, 51 arranged in common emitter differential amplifying connection so that the solenoid windings ODD A's to ODD D's are normally energized through the respective, transistor 50. Whenever a positive pulse is applied to the transistor 51 of a driver the energization is transferred from the associated ODD to the EVEN windings Operation is controlled by an oscillator 37 which triggers bi-stable multivibrators 42, 43 in turn through AND gates 39-41. The drivers 46 and 49 for the A and D windings are positively energized when the respective bistable multivibrators 42 and 43 are in their " 1 " states. Driver 47 is positively energized through an AND gate 63 when bi-stable multivibrators 42 and 43 are both in the " 1 " state, and driver 48 is positively energized through an OR gate 66 when either multivibrator is in state " 1 ". Driver 47 selectively energizes the ODD B's and EVEN C's winding and driver 48 the ODD C's and EVEN B's windings, the resultant pattern of energizations being as shown in Fig. 5. Current amplitude in the windings connected to a driver is determined by adjustable resistor 52. Modified drive circuit providing non-destructive parallel output at terminals 31 of Fig. 3. Information stored in sections SEC. 1, SEC. 3 is transferred to SEC. 2, SEC. 4, and parallel readout is obtained from the outputs of regions defined by windings A and D. The transferred information is then restored to its original sections by a backward shift, this being accomplished by interchanging the functions of drives 47 and 48. The circuit modifications are shown in Fig. 8 in which the " 1 " and " 0 " outputs of multivibrator 42 are respectively applied to AND gates 77, 79 and 76, 78, gates 77 and 78 being controlled from circuit point 80, Fig. 4, and gates 76, 79 from circuit point 81. Modified drive circuit causing complementations of an entire word during the shift. The circuit shown in Fig. 9 replaces the circuits from points 82 and 83 in Fig. 4. Inversion is effected by reversing the phase sequence in a manner equivalent to the crossing of conductors 33, 36 in Fig. 3. The arrangement is controlled by a bi-stable unit 97 with normal operation when in state " 1 " and inversion operation when in state " 0 ".