Patent GB-1405937-A (GB)
Title: Coin discriminator
IPC: G07D5/02
Filed: 1972-08-09
Abstract: 1405937 Testing coins MARS Inc 9 Aug 1972 [16 Aug 1971 20 Jan 1972] 37228/72 Heading G4V In a coin tester first and second values are produced, these values being functions of respective first and second characteristics of the coin, the first and second values are compared, and an output signal produced if the difference between the values lies within a predetermined range. In the embodiment shown a coin 20 is released by pin 18 to roll down track 16 past eddy current braking magnet 23 and coin presence sensors, preferably phototransistors, 66 and 67. The two characteristics of the coin evaluated are the time (AB) of concurrent coin sensing by sensors 66, 67 and the time (AB) of coin sensing by sensor 67 alone. Time AB is dependent on the velocity (and hence electromagnetic properties) and chordal dimension C of the coin, whilst time AB is dependent on velocity but independent of the diameter of the coin, and for each denomination of coin the ratio of the two times is a constant independent of velocity. In the three denomination tester shown the sensors are positioned so that these ratios are 16/16, 21/16 and 29/16. During time AB pulses from clock generator 40 are passed via AND gate 35 and logic circuit 120 to the 2<SP>2</SP> stage of up-down counter 160 set to its "up count" mode by a signal on line 175. The higher stages of counter 160 are connected to a decoder 180 and at the end of time AB, if the count is within one of the expected ranges for the three denominations, a corresponding flip-flop 183, 185 or 187 will be set thus providing a tentative determination of the denomination and acceptability of the coin. During time AB the clock pulses are passed via AND gate 36, two-bit counter 100 and logic circuit 120 to the counter 160 which is now set to its "down count" mode by a signal on line 176. The two-bit counter 100 (see also Fig. 3a, not shown) provides pulses sequentially on lines 111 to 114 and according to which of flip-flops 183, 185 or 187 has been set these pulses are directed in a predetermined four-step cycle to particular ones of the 2<SP>0</SP> to 2<SP>4</SP> stages of the counter 160. Considering for example the third denomination of coin (with an AB to AB ratio of 29/16) the four pulses are directed to the 2<SP>4</SP>, 2‹, 2<SP>3</SP> and 2<SP>2</SP> stages thus producing a down count of 29, the up count for four pulses during time AB being 16. A decoder 190 determines whether the remainder in the counter, positive or negative, is less than a certain level and sets a flip-flop 191 accordingly. AND gates 192, 194 and 196 have as inputs respective outputs from flip-flops 183, 185 and 187 and the output from flip-flop 191 and at the end of time AB, if both initial count and remainder criteria have been met, corresponding flip-flops 193, 195 and 197 are set indicating the acceptability and denomination of the coin. In the embodiment of Figs. 4 and 5 (not reproduced) the clock pulses are all directed to the 2‹ stage of counter (360) in both up count and down count modes, but in the down count mode the number of pulses reaching the counter is determined by divider (310) and logic circuit (320) in accordance with the tentative determination of acceptability and denomination as indicated by flip-flops 183, 185 and 187. In the embodiment of Fig. 8 (not reproduced) pulses from clock generator (640) are passed to a six bit counter (610) which when full passes a pulse to the 2‹ stage of up-down counter (660) and then is automatically cleared and preset to a predetermined number by logic circuit (620). This number determines how many clock pulses are required to provide a count of one in counter (660) and depends on whether the counter (660) is being counted up in time AB or counted down in time AB and if so which flip-flop 183, 185 or 187 has been set. Instead of the coin being rolled past a magnet 23 the coin may initially be accelerated to a velocity dependent on its electromagnetic properties by a linear motor (Figs. 6 and 7, not shown). Two separate counters and a comparator may be used rather than the up-down counter preferred and other time intervals evaluated, for example, when the sensors are sufficiently spaced, the time after the first sensor has been obscured that neither sensors are obscured.