baber/WOPTO huggingface dataset:
Patent JP-2011213907-A (JP)
Title: Molded object, process for producing the same, member for electronic device, and electronic device
Inventor: IWAYA WATARU
IPC: C08J7/048
Filed: 2010-03-31
Abstract: PROBLEM TO BE SOLVED: To provide: a molded object having good gas-barrier properties, transparency, and folding-proof properties; a process for producing the same; a member for an electronic device comprising the molded object; and an electronic device provided with the member for the electronic device.SOLUTION: The molded object comprises a layer containing a polysilazane compound and clay mineral and is characterized in that the water vapor transmission at 40°C under an atmosphere of relative humidity of 90% is 6.0 g/m/day or less. The process for producing the molded object, a member for an electronic device comprising the molded object, and the electronic device provided with the member for the electronic device are also provided herein.
Patent JP-2011214100-A (JP)
Title: 9% Ni STEEL HAVING EXCELLENT STRENGTH, LOW TEMPERATURE TOUGHNESS AND BRITTLE CRACK PROPAGATION ARRESTING PROPERTY AND METHOD FOR PRODUCING THE SAME
Inventor: YUGA MASAO
IPC: C22C38/50
Filed: 2010-03-31
Abstract: PROBLEM TO BE SOLVED: To provide a 9% Ni steel having brittle crack propagation arresting properties more excellent than those of a Q-T material and having excellent strength and low temperature toughness, and a method for economically and stably producing the same.SOLUTION: The 9% Ni steel having excellent strength, low temperature toughness and brittle crack propagation arresting properties has a composition comprising, by mass, 0.03 to 0.10% C, 0.02 to 0.40% Si, ≤0.005% P, ≤0.005% S, 0.2 to 1.0% Mn, 8.5 to 9.5% Ni and 0.01 to 0.10% Al, and the balance Fe with inevitable impurities, and comprises retained austenite of 2.0 to 6.0% by volume, and in which the integration degree of the {110} texture in the face parallel to the surface of the steel sheet is ≥1.2 in the range of 3 mm from the surface of the steel sheet, and the integration degrees of the {100} and {211} textures in the faces parallel to the surface of the steel sheet are ≥1.2 to 3.0, respectively in the central part of the sheet thickness of the steel sheet.
Patent JP-2011216818-A (JP)
Title: Method of manufacturing semiconductor device
Inventor: OIDE HIROYUKI
IPC: H01L25/07
Filed: 2010-04-02
Abstract: PROBLEM TO BE SOLVED: To improve reliability of a semiconductor device, and to make the semiconductor device compact.SOLUTION: A method of manufacturing the semiconductor device includes: a step of supplying a supercritical fluid mixed with an under-fill material 24 into a high-pressure vessel in which a stacked unit 30 having a plurality of stacked semiconductor chips 22 is arranged; and a step of filling the under-fill material 24 in the space between the plurality of the semiconductor chips 22, by heating the stacked unit 30 placed in the high-pressure vessel and curing the under-fill material 24 infiltrated between the plurality of the semiconductor chips 22 by a polymerization reaction, while the supercritical fluid is being supplied.
Patent JP-2011221077-A (JP)
Title: Manufacturing method of multi-face substrate for color filter, and color filter substrate and color display using the same
Inventor: SAITO TAKUMI
IPC: G02F1/1335
Filed: 2010-04-05
Abstract: PROBLEM TO BE SOLVED: To provide a manufacturing method capable of adjusting the difference in pixel film thicknesses caused by the difference in pixel pitches, in a color filter substrate having multiple kinds of color filters with different pixel pitches laid out on a piece of large glass substrate, and to provide a color filter manufactured by the manufacturing method and a color display produced by using the color filter.SOLUTION: A manufacturing method of a multi-face substrate for a color filter in which a ratio of the narrowest to the widest pixel pitch ranges from 1.4 to 8 includes: a step for manufacturing the pixels by photolithography; and a reduced-pressure drying step for applying a photosensitive resin composition containing 75-90 mass% of solvent to the substrate and then drying the solvent in the photosensitive resin composition under reduced pressure. In a process of reducing the pressure to 200 Pa or lower which is conducted during the reduced-pressure drying step, the time required to reduce the pressure from 1,000 to 200 Pa is within the range of 21 to 60 seconds.
Patent JP-2011221180-A (JP)
Title: Display device
Inventor: ISOBE RYUICHIRO
IPC: G09G3/20
Filed: 2010-04-07
Abstract: PROBLEM TO BE SOLVED: To provide a display device with high definition and improved resolution.SOLUTION: A display device 1 comprises a display area 10 in which a plurality of display elements are arranged in matrix. The plurality of display elements include a first display element, a second display element, and a third display element and are arranged in a first direction in the following order: a first display element, a second display element, a third display element, a third display element, a second display element, and a first display element. The first display element, the second display element, and the third display element have different emission colors. The display device 1 comprises a low-pass circuit 14 for modulating image signals inputted to the display area.
Patent JP-2011222720-A (JP)
Title: Solid-state image pickup device and camera
Inventor: HARADA KOICHI
IPC: H04N5/361
Filed: 2010-04-08
Abstract: PROBLEM TO BE SOLVED: To provide a super-dark current solid-state image pickup device with dark current drastically reduced.SOLUTION: A substrate 100 contains a second conductivity type charge storage region 110 having a function of storing photoelectric charges, first and second conductivity type regions 120 and 130 formed on the first substrate surface 101 side of the charge storage region 110, and a first conductivity type charge storage region 170 formed in a surface portion on the second substrate surface 102 side (back side) opposite to the first substrate surface 101 side. A JFET structure 160 is formed by the regions 110, 120 and 130, and an embedded photosensor is formed by the regions 120, 110 and 170. A dark current drain for discharging (sweeping out) dark current occurring in the surface portion at the first substrate surface 101 side is formed in the second conductivity type region 130. In the JFET structure 160, one of the first conductivity type region 120 and the second conductivity type region 130 functions as a channel region having resistance that varies in accordance with stored charges in the charge storage region 110.
Patent JP-2011200216-A (JP)
Title: Pot and planter with fine drainage holes
Inventor: SHISHIME KUNIYA
IPC: A01G9/02
Filed: 2010-03-25
Abstract: PROBLEM TO BE SOLVED: To provide a pot and planter of a type free from the need of an underlay which is conventionally used for a pot and planter drainage hole and prevents cultivation soil from flowing out.SOLUTION: The pot and planter are provided with fine drainage holes in the bottom and the side of the pot and planter.
Patent JP-2010220228-A (JP)
Title: Transmission electric power level setting while performing channel assignment for interference balancing in cellular radio communication system
Inventor: WENGERTER CHRISTIAN
IPC: H04W52/24
Filed: 2010-04-14
Abstract: <P>PROBLEM TO BE SOLVED: To provide a method of reducing a signal to interference ratio of a mobile station suitable for an environment in which electric power control does not exist.  <P>SOLUTION: A base station apparatus to be used for a radio communication system includes a plurality of radio cells, while each of the radio cells includes a plurality of subcarrier block sets, and each of the subcarrier block sets includes a plurality of subcarrier blocks in which each of the subcarrier blocks includes a plurality of subcarriers. The base station apparatus has: a grouping means for extracting the plurality of subcarrier blocks, and for grouping the extracted subcarrier blocks to the subcarrier block sets; and an assigning means for assigning a transmission electric power level which is different from the other subcarrier block set to at least one subcarrier block set included in the radio cell of a cell cluster in the radio cell of the cell cluster by configuring the cell cluster by the radio cell and the other radio cell adjacent to the radio cell.  <P>COPYRIGHT: (C)2010,JPO&INPIT
Patent JP-2011228392-A (JP)
Title: Semiconductor device manufacturing method
Inventor: ISHIHARA YOSHITAKE
IPC: H01L23/52
Filed: 2010-04-16
Abstract: PROBLEM TO BE SOLVED: To provide a new manufacturing method for semiconductor devices.SOLUTION: A semiconductor device manufacturing method comprises a step of covering with a polyimide film a semiconductor substrate in which multiple wiring layers including Cu wiring as a lower layer of wiring and a Cu accessory for use in the formation of the Cu wiring, a step of exposing the surface of the top wiring layer of the multiple wiring layers and the surface of the Cu accessory, a step of forming a Cu corrosion-preventive layer over the surface of the top wiring layer and the surface of the Cu accessory by exposing the semiconductor substrate to vapor of a Cu corrosion-preventive agent, a step of selectively removing the Cu corrosion-preventive layer formed over the surface of the top wiring layer, and a step of baking the polyimide film in a state in which the Cu corrosion-preventive layer is formed over the surface of the Cu accessory.
Patent JP-2010263204-A (JP)
Title: Magnetic tunnel junction device, and method for manufacturing the same
Inventor: GAIDIS MICHAEL CHRISTOPHER
IPC: H01L43/08
Filed: 2010-04-19
Abstract: <P>PROBLEM TO BE SOLVED: To provide a magnetic tunnel junction device increased in a relative amount of current along an edge part of a device, and to provide a method for manufacturing the same.  <P>SOLUTION: In this magnetic tunnel junction device, a magnetic tunnel junction (MTJ) stack is formed over a patterning wiring layer 402. A low-conductivity layer 416 and a conductive hard mask 418 are formed thereon. A spacer material 420 including electrical conductivity different from that of the low-conductivity layer 416 is deposited. The spacer material 420 is etched so that the spacer material remains only on sidewalls of the hard mask 418 and a stud. A etching process is executed to leave the sidewall-spacer material 416 as a conductive link between a free magnetic layer 412 and the conductive hard mask 418, around the low-conductivity layer 416. A difference in electrical conductivity between the stud and the spacer material 420 enhances current flowing along the edges of the free layer 412 and through the spacer material 420 formed on the sidewalls.  <P>COPYRIGHT: (C)2011,JPO&INPIT
Patent JP-2011228094-A (JP)
Title: Fuel cell and method for manufacturing the same
Inventor: ITO NAOKI
IPC: H01M8/12
Filed: 2010-04-19
Abstract: PROBLEM TO BE SOLVED: To provide a fuel cell which prevents unusual oxidation of a metal substrate and cracking and peeling of an electrolyte layer, and a method for manufacturing the same.SOLUTION: A fuel cell comprises: a metal substrate with a gas permeable property; an electrode with catalytic activity disposed on the metal substrate; an electrolyte layer disposed on the electrode and comprising a solid oxide electrolyte and an ancillary material of which a melting point or a glass transition point is equal to or below a sintering starting temperature of the solid oxide electrolyte; and a movement inhibition layer disposed between the electrolyte layer and the electrode for inhibiting movement of the ancillary material to a metal substrate side.
Patent JP-2011225409-A (JP)
Title: Method for manufacturing silicon single crystal
Inventor: FUSEGAWA IZUMI
IPC: C30B29/06
Filed: 2010-04-22
Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing a good silicon single crystal with twin crystal defects suppressed, in manufacturing a non-defect silicon single crystal by a CZ method.SOLUTION: The silicon single crystal is manufactured by pulling up the silicon single crystal from a silicon melt in a chamber in the CZ method. The method is characterized in that the V/G value, the ratio of a speed V of pulling up the silicon single crystal to a crystal temperature gradient G is controlled so as to be larger by 0.2-0.5% than a V/G value at the boundary between a dislocation cluster region formed as an aggregate of interstitial silicon and a defect-free region dominated by interstitial silicon, and so as to be smaller than a V/G value at which an OSF region appears.
Patent JP-2011234432-A (JP)
Title: Boost charging circuit and xenon lamp lighting device using the same
Inventor: NISHIZAWA YOSHIO
IPC: H02M3/28
Filed: 2010-04-23
Abstract: PROBLEM TO BE SOLVED: To decrease circuit power consumption immediately before a charge end in a boost charging circuit for a xenon lamp lighting device.SOLUTION: A boost charging circuit comprises: switching boost means to step-up input voltage; charging means to rectify and smoothen the output of the switching boost means; detection means to detect a charging status of the charging means; and control means to control the output of the switching boost means based on the signal from the detection means. The detection means comprises: a voltage detection part to detect a divided voltage value of charging voltage of the charging means; and a current detection part to detect a charging current of the charging means. The boost circuit is configured to control the switching boost means, so that the sum of the divided voltage value and the voltage value corresponding to the charging current maintains a constant value.
Patent JP-2011231027-A (JP)
Title: Disulfide bond-containing benzoxazine compound and method for producing the same
Inventor: SATO NAO
IPC: C07D265/16
Filed: 2010-04-26
Abstract: PROBLEM TO BE SOLVED: To provide a disulfide bond-containing benzoxazine compound that is cleaved by heat or light and forms a radical, and a method for producing the same.SOLUTION: The disulfide bond-containing benzoxazine compound is represented by general formula [1] (wherein Ris 1-18C alkyl, aryl or alkyl substituted aryl). The disulfide bond-containing benzoxazine compound in general formula [1] (wherein Ris phenyl) is obtained by reacting bis(4-hydroxyphenyl)disulfide [II] with hexahydro-1,3,5-triphenyl-1,3,5-triazine and formaldehyde.
Patent JP-2011229627-A (JP)
Title: Storage bag for mattress made of soft polyurethane foam
Inventor: IHARADA YASUSHI
IPC: B65D85/07
Filed: 2010-04-26
Abstract: PROBLEM TO BE SOLVED: To prevent yellowing of striped shape or the like in a place corresponding to a fastener part, in a mattress made of soft polyurethane foam stored in a storage bag freely opened/closed by a fastener.SOLUTION: In the storage bag 1 storing a mattress made of soft polyurethane foam and freely opened/closed by a fastener part, there is installed along a first fastener part 4a one sheet of cover member 6 capable of covering a gap of the fastener part 4, for the purpose of preventing the striped yellowing from being produced in the mattress on account of infiltration of nitrogen oxide (NOx) in the air into the bag through the fastener part 4. In addition, this cover member 6 is given a width equal to or more than twice as wide as the fastener width c and a length nearly equal to that of the fastener part 4.
Patent JP-2011233735-A (JP)
Title: Insulating circuit substrate and method of manufacturing the same, base for power module and method of manufacturing the same
Inventor: MINAMI KAZUHIKO
IPC: H01L23/36
Filed: 2010-04-28
Abstract: PROBLEM TO BE SOLVED: To provide an insulating circuit substrate of low manufacturing cost and a method of manufacturing the same, and to provide a base for a power module using the insulating circuit substrate and a method of manufacturing the same.SOLUTION: Relating to an insulating circuit substrate 4, a circuit board 6 is brazed to one surface of an insulating board 5, and a surface on the opposite side of the surface of the circuit board 6 where the insulating board 5 is brazed constitutes a wiring surface 9 containing an electronic element mounting part 8. On the circuit board 6 of the insulating circuit substrate 4, a solder flow portion 11 is present where a molten solder flows to the wiring surface 9 side from between the insulating board 5 and the circuit board 6 at the time of brazing between the insulating board 5 and the circuit board 6. A solder holding recess 12 for holding solder is formed between the electronic element mounting part 8 on the wiring surface 9 of the circuit board 6 and the solder flow portion 11.
Patent JP-2011230398-A (JP)
Title: Method and equipment for manufacturing high pressure gas tank
Inventor: HATTA TAKESHI
IPC: F17C1/06
Filed: 2010-04-28
Abstract: PROBLEM TO BE SOLVED: To provide a new manufacturing technique useful for maintaining the shape of a high pressure gas tank which has a fiber-reinforced resin layer formed on the outer circumference of a resin liner.SOLUTION: An intermediate product tank 12 has the fiber-reinforced resin layer 20 to which an epoxy resin before thermosetting is immersed, on the outer circumference of the liner 10 made of resin container. Upon the thermosetting of the epoxy resin of the fiber-reinforced resin layer 20, while changing the internal pressure of the liner 10 of the intermediate product tank 12 which is journaled by a tank journal shaft 112 to repeat a positive pressure and a negative pressure alternately and, at the same time, rotating and heating the intermediate product tank 12, the epoxy resin is subject to thermosetting.
Patent JP-2011230681-A (JP)
Title: Support system for power train of vehicle
Inventor: SUZUKI SHINTARO
IPC: F16F13/06
Filed: 2010-04-28
Abstract: PROBLEM TO BE SOLVED: To suppress the transmission of vibration to a vehicle body, and to prevent a power train from moving toward the vehicle rear side to a large extent when an external force is applied to the vehicle.SOLUTION: In a support system for the power train of a vehicle in which a mount device including an outer cylinder and a center shaft connected to the inner periphery of the outer cylinder through a rubber vibration isolator is arranged on a side member, attaching brackets fixed to the front and rear of the outer cylinder are fastened to extension brackets arranged at an interval above the side member with bolts, a mount bracket fixed to the power train is connected to the lower end of the center shaft projected to the lower side of the outer cylinder, and a U-shaped stopper bracket surrounding the front, lower and rear parts of the mount bracket is attached to the lower part of the outer cylinder, the lower end of the stopper bracket is projected downward beyond the upper end of the extension brackets in the vehicle vertical direction, and the stopper bracket is arranged in a space between the extension brackets.
Patent JP-2011046445-A (JP)
Title: Spouting container
Inventor: KUWABARA KAZUHITO
IPC: B65D17/34
Filed: 2010-04-30
Abstract: <P>PROBLEM TO BE SOLVED: To spout efficiently a content in a container body by forming an air introducing hole connected to a spout in the body.  <P>SOLUTION: A spouting container 1 includes the container body 11 in which the content is stored and in which the spout is formed, and a lid body 14 connected to the container body 11 through a breakable weakened portion 13 and enclosing the spout. The air introducing hole connected to the spout is formed in the container body 11, and the lid body 14 integrally encloses the spout and the air introducing hole.  <P>COPYRIGHT: (C)2011,JPO&INPIT
Patent JP-2011234809-A (JP)
Title: Dish dryer
Inventor: KAWAKATSU TAKAFUMI
IPC: A47L15/46
Filed: 2010-05-07
Abstract: PROBLEM TO BE SOLVED: To provide a dish dryer which disables bacteria or viruses attached on a large amount of dishes in a drying chamber.SOLUTION: An electrostatic atomization device 10 including: a discharge electrode 10a to which a high voltage is applied; a counter-electrode 10b positioned oppositely to the electrode 10a; and a heat exchanging portion 10e including a cooling section 10c a heat radiating section 10d, is disposed at an air blowing path 9 extending from a blower 1 to a drying chamber 8. The electrostatic atomization device 10 is configured to cooperate with the blower 1 operated alone after drying dishes with hot air in a mode for drying dishes with hot air, and the device 10 stably supplies charged microdroplets which flow down into the narrow gaps between a large amount of stacked dishes to disable bacteria or viruses attached on the dishes.
Patent JP-2010264244-A (JP)
Title: Silk medical device containing antimicrobial agent and method of manufacture thereof
Inventor: RHEINNECKER MICHAEL
IPC: A61M37/00
Filed: 2010-05-13
Abstract: <P>PROBLEM TO BE SOLVED: To provide an improved medical device made from a silk protein membrane, fibers and combinations thereof.  <P>SOLUTION: The silk medical device (60) is manufactured from a silk protein material (15) that is loaded with a polymeric cationic antimicrobial (55), wherein the polymeric cationic antimicrobial (55) is polyhexamethylene biguanide (PHMB). The silk medical device (60) is useful for the treatment of wounds (70) to prevent infection.  <P>COPYRIGHT: (C)2011,JPO&INPIT
Patent JP-2010285691-A (JP)
Title: Method for manufacturing high-density reduced iron and device for manufacturing high-density reduced iron
Inventor: TSUTSUMI HIROBUMI
IPC: C21C5/52
Filed: 2010-05-14
Abstract: <P>PROBLEM TO BE SOLVED: To provide a method for manufacturing high-density reduced iron by which bulk reduced iron can be uniformly cooled without necessitating a large-scale briquetting machine, the objective degree of metallization as a whole product can be maintained, and strength reduction can be suppressed and to provide a device therefor.  <P>SOLUTION: A device for manufacturing high-density reduced ion from one bulk reduced iron R obtained by a direct reduction process includes: a pressurization apparatus 2 which pressurizes the bulk reduced iron at a high temperature to heighten the density; a guide apparatus 5 which guides the bulk reduced iron to the pressurization apparatus 2; extrusion parts 2a and 2b which are provided in the pressurization apparatus 2; hold the bulk reduced iron between their opposite sides, substantially wrap it, and pressurize the high-density bulk reduced iron at a high temperature; and a cooling apparatus 4 which cools the high-density reduced iron compressed and made denser by the extrusion parts 2a and 2b.  <P>COPYRIGHT: (C)2011,JPO&INPIT
Patent JP-2011243668-A (JP)
Title: Method for manufacturing semiconductor package
Inventor: AZUMA KAZUJI
IPC: H01L25/07
Filed: 2010-05-17
Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor package which is thin and has high quality.SOLUTION: The method comprises: a step for mounting first semiconductor chips 11A,11B on a wiring layer 12 formed on a silicon substrate 8; a step for filling peripheries of the first semiconductor chips 11A,11B with insulating resins 13,14; a step for setting the insulating resins 13,14 and the first semiconductor chips 11A,11B at a side opposing to the silicon substrate 8 side to the same level by thinly-polishing the insulating the resins 13,14 and/or the first semiconductor chips 11A,11B from the side opposing to the silicon substrate 8 side ; a step for forming re-wiring layer 22 on the side opposing to the silicon substrate 8 side in the first semiconductor chips 11A,11B and mounting second semiconductor chips 21A,21B on the re-wiring layer 22; and step for filling peripheries of the semiconductor chips 21A,21B with insulating resins 23,24.