Patent GB-1487331-A (GB)
Title: Processing circuit for television chromatic signals
IPC: H04N11/06
Filed: 1974-10-04
Abstract: 1487331 Colour television INDESIT INDUSTRIA ELETTRODOMESTICI ITALIANA SpA 4 Oct 1974 [12 Oct 1973 3 April 1974 18 Jan 1974] 43071/74 Heading H4F A demodulation circuit for a PAL colour television signal including "swinging" bursts, or bursts only in alternate line blanking periods, includes a burst gate 2, Fig. 2, controlled by circuits 18, 19 to open only during every second line blanking period; circuit 18 is reset by the output of a half line frequency selective circuit 17 if the gate 2 is passing the "wrong" bursts, circuit 17 receiving the output from B-Y demodulator 4. If gate 2 passes the bursts of phase + 135 degrees relative to the B-Y modulation axis subcarrier generator 16 produces a signal in phase with the B-Y modulation axis which is supplied to B-Y demodulator 4, and, via phase shifters 11, 12 and PAL switch 13, to R-Y demodulator 3; there is no component at half-line frequency in the output of demodulator 4 and circuit 17 produces no output. If, alternatively, gate 2 passes the bursts of phase 135 degrees relative to the B-Y modulation axis, subcarrier generator 16 produces a signal in phase with the R-Y modulation axis, and demodulators 3, 4 provide alternating signals, respectively Œ(B-Y) and Œ(R-Y); circuit 17 produces an output which resets circuit 18, which may be a multivibrator also controlled by line synchronizing pulses 5. If a signal having bursts only in alternate line blanking periods is received and gate 2 operates in the "wrong" phase, generator 16 will not be synchronized and circuit 17 again produces an output. Circuit 17 may receive inputs from both demodulators 3, 4. If generator 16 is a passive filter it will not produce an output when a monochrome signal is received and demodulators 3, 4 may be designed to produce no outputs in these circumstances. In a second embodiment phase shifter 12 and PAL-switch 13 are replaced by a PAL-switch (23, Fig. 3, not shown) connected to the input of demodulator 3 and receiving inputs from a oneline delay line (21) and an attenuator (22) both connected to the circuit input. In a further embodiment the PAL-switch is replaced by a gate (27, Fig. 4, not shown) connected to the circuit input and opened during alternate line periods by a half-line frequency generator (30) controlled by circuit 17 and line synchronizing pulses 5. The output of the gate (27) is connected to burst gate 2 which is opened during every line blanking period and, via the parallel connection of a one-line period delay line (28) and an attenuator (31), to the demodulator 3, the demodulator 4 receiving its input from the circuit input. In a modification of this last embodiment, for receiving PAL or NTSC signals, burst gate 2 supplies bursts via a subcarrier generator (35), as before, to a third demodulator (33, Fig. 5, not shown) which also receives the circuit input signal and is connected to a half line frequency selective circuit (36) which controls the phase of the half-line frequency generator (30). The subcarrier reference signals for demodulators 3, 4 are derived from a further subcarrier generator (34) receiving bursts from a further burst gate (32) which receives the circuit input signal and passes each burst, the further generator (34) averaging the phases of bursts successive line blanking periods. In a further embodiment for receiving a PAL or NTSC signal, the received signal is passed via a gate 27, Fig. 6, opened during alternate line periods by a half-line frequency generator, 30, to burst gate 2 and, via a one-line period delay line 28 and attenuator 31, to demodulator 3. As before circuit 17 controls the phase of generator 30 and receives the output of demodulator 4. When a PAL signal is received an additional demodulator 40 provides an alternating output which, via a half line frequency selective circuit 41, maintains a switch 42 open and burst gate 2 is connected to subcarrier generator 44 via a 45 degree phase shifter 43. When an NTSC signal is received circuit 41 supplies no output and switch 42 closes to connect burst gate 2 directly to subcarrier generator 44. In a further embodiment, which is a modification of the embodiment of Fig. 2, the circuit input is connected to a one line delay line (47, Fig. 7, not shown) the output of which is passed to two adders (52, 51) connected to the demodulators 3, 4 one adder receiving a second input from the circuit input via an attenuator and the other adder receiving a second input from the circuit input via an attenuator and a phase inverter. The signal for controlling the phase of operation of the circuit 18 is derived by a half line frequency selective circuit connected to the output of a demodulator (50) receiving the circuit input signal and the output of generator 16. A further embodiment, Fig. 10, uses a burst gate 102 opened during alternate line blanking periods, a subcarrier generator 111, phase shifters 112, 113, 115 and 116, a PAL switch 114 and four demodulators 104, 105, 106, 107. The demodulator outputs are connected via respective amplifiers 121, 122, 123, 124, subject to automatic gain control, respective half line frequency selective circuits 127, 128, 129, 130, adders 131, 132 and a differential amplifier 133 which controls the phase of half line frequency generator 110. If gate 102 separates the desired bursts the output of demodulators 104, 105, 106, 107 will be, respectively, R-Y, B-Y, Œ(RY), Œ(B-Y), the circuits 129 and 130 will provide outputs, amplifier 133 will receive a signal only from adder 132 and the phase of generator 110 will be unaltered. If, however, the "wrong" bursts are separated by gate 102 the outputs of demodulators 104, 105, 106, 107 will be, respectively Œ(B-Y), Œ(R-Y), - (B-Y) and (R-Y), amplifier 133 will receive a signal only from adder 131 and generator 110 will be reset. In another embodiment, Fig. 11, utilizing four demodulators 210, 212, 224, 227 and two PAL switches 220, 221, the circuit input signal is subject to automatic gain control at 202, 204, 215, 216 and 208, 234, 235, 237, 209. A burst gate 204 passes the burst in every second line blanking period and is controlled by a flip-flop 229 via a circuit 205, the phase of flip-flop 229 being controlled by a flip-flop 226. Burst gate 204, when operating at the desired phase, passes bursts at a phase - 135 degrees relative to the B-Y modulation axis to a comparator 217 which controls a subcarrier generator 219 to produce an output of R-Y phase. Half-line frequency selective circuits 239, 238 connected to the outputs of demodulators 224, 227 produce no outputs and the phase of flip-flops 226, 229 is unaltered. If gate 204 passes the "wrong" bursts demodulator 224 will produce an alternating signal Œ(R-Y) and demodulator 227 will produce an alternating signal Œ (B-Y). Circuits 239, 238 will produce outputs which are detected by amplitude detectors 241, 240 and added at 242 and open a gate 232 to stop the supply of line synchronizing pulses H to flip-flop 226. When flip-flop 226 restarts in the correct phase, the phase of flipflop 229 will also be corrected.