Patent GB-1376190-A (GB)
Title: Analogue to digital converters
IPC: H03M1/52
Filed: 1971-09-29
Abstract: 1376190 Analogue to digital converter SOLARTRON ELECTRONIC GROUP Ltd 25 Sept 1972 [29 Sept 1971] 45371/71 Heading G4H An auto ranging analogue to digital converter producing a digital signal which has N significant figures of resolution in a respective one of R ranges of the analogue signal comprises integrating means for converting the analogue signal to an intermediate digital signal having up to at least (N+R-I) significant figures when the analogue signal is in the highest range; means for selecting the N most significant figures as the digital output signal, means for producing a signal indicating the number of significant figures in the intermediate signal and hence the range and adjusting means responsive to the range signal for adjusting the integrator operation so that the magnitude of the integrated signal is within a single predetermined range, irrespective of the analogue signal magnitude. As described, the analogue voltage is applied at 10 and passes via switchable attenuator 11, switch S 1 and one or more of resistor R 1 -R 3  to integrator 16. Simultaneously clock pulses from source 48 are fed to the input 88 (i.e. the 100 stage) of six stage counter 112 and on output at F is produced after two counter cycles (20,000 count) which opens S1 and stops the integration. A voltage V ref  of opposite polarity to the analogue voltage (18 or 20) is then applied to the integrator until its output as detected by comparator 30 reaches zero (coarse romp) and simultaneously clock pulses are fed to the 100s input of the counter. The counter reading is then converted to its nines complement, and a voltage V ref /100 of opposite polarity to V ref  is applied to the integrator and the output (which is slightly beyond zero due to overshoot) is brought back to zero (fine romp) while clock pulses are fed to the units input of the counter. The reading in the counter is now the nines complement of the input voltage. Counter and display circuit.-The counter 112 comprises six, five bit stages 114 0 -114 5  each of which constitutes a Johnson ring with output connected to input via an inverter connected so that they can function either as a counter or as a shift register shifted by pulses on line 126. The highest significant figure stage 114 5  is connected to the lowest value stage 114 0  by switch S 9  and inverter 128 so that the nines complement of the value in 114 5  can be transferred to 114 0 . The output of stage 114 5  is connected to a twenty bit shift register 130 comprising four five bit stages 131 0 -131 3 . The most significant figure stage 131 3  is connected to a decoder which converts the value in the stage to decimal and to a display device 130 which displays the figure in stage 131 3  when activated by one of the six outputs of counter 162 driven at 1/5 of the clock frequency. The count during the coarse romp is converted to its "9"s complement by closing switch S9 which changes the counter to its shift register mode, passing the content of stage 114 5  to stage 114 0 , with attendant conversion stepping the shift register by 5 shift pulses and transferring again and repeating the procedure until all stages have been converted. The stages are reconverted to a counter and the fine romp count is added. They are then reconverted to a shift register and twenty shift pulses move the contents of stages 114 5 -114 2  into stages 131 2 -131 0  of shift register 130. If the value in stage 131 3  is a 9 indicating that the first significant figure has not been reached, the registers are stepped by five pulses and the value in stage 131 3  is again read, this being repeated until the value is not 9. When this occurs, the counter 112 and register 130 are disconnected, the output of register 130 is connected to its input via S10 and the contained values are cycled, and under the control of the output of counter 162 fed to the correct segment 140 of readout device 138. The number of additional stages of shifting needed has been detected by the logic circuits 180-195 and these provide the correct range and decimal point indication at the output device. The logic circuits also alter the value of the input resistor combination R 1 R 2 R 3  so that the integral of the input voltage falls in a predetermined range, preferably 1 to 10 volts. A switchable alternator 11 with an alternation factor of 100 may be added to increase the range of the device which is preferably a digital voltmeter. If the input signal is overrange an output is produced at F indicating counter overflow during the digitizing interval and the switches S6, S7 are reset for a higher range.