Patent GB-1258019-A (GB)
IPC: G01R31/26
Filed: 1969-12-12
Abstract: 1,258,019. Multiple test apparatus. SIGNETICS CORP. Dec.12, 1969 [Jan.8, 1969], No.60717/69. Heading G1U. In apparatus for carrying out a plurality of parameter tests on an electric circuit, e.g. an operational amplifier 10, the apparatus is fitted with a number of programme boards 18a-d selected for the particular circuit under test and the tests are carried out in sequence under control of a unit 19 which supplies either a pass/fail indication as each test is completed or a quantitative output for a selected test as this is carried out in the sequence. In the arrangement described the output of the amplifier 10 under test is connected to a high gain feedback amplifier 24 which in turn is connected via a switch K1 to the input of a high gain sample and hold amplifier 25. Both amplifiers 24, 25 supply negative feedback to the input of amplifier 10 via lines 26, 27 respectively. In general in each test conditions are established with switch K1 closed where due to the high gain of amplifiers 24, 25 the feedback on line 26 from amplifier 24 is forced to zero, then with switch K1 open, but with the initially obtained feedback still on line 27 because of the hold capabilities of amplifier 25, the amplifier 10 stimulus is changed to its other state and the feedback voltage from amplifier 24 now changes in proportion to the parameter being measured. For example for measuring the voltage gain of the amplifier switch KX23 is initially closed to supply -18v to the input circuit of amplifier 24. Since the feedback forces the voltage on line 26 to zero then the input to amplifier 24 must be zero so that amplifier 10 supplies a voltage to cancel that supplied via switch KX20. Switch K1 is then opened and switches KX23 and KX24 are changed over to supply +18v to the input circuit of amplifier 24. Amplifier 10 now has to supply a cancelling voltage of the same magnitude but opposite sign and the voltage input to provide this change is supplied on the feedback line 26 and is a measure of the amplifier gain. The tests described include the measurement of voltage gain with both low and high loads on the amplifier, common mode rejection in which the amplifier response is measured when the polarity of the amplifier input voltage is changed over, power supply sensitivity and input bias current and offset current tests. The test results on line 26 are applied to an amplifier 28 with means 18c provided for switching its gain at each test to supply a standard output signal. This signal is applied via A/D converter 29 to counter 31 which is set such that a count of 100 represents the border between pass and fail. The most significant bit stage of the counter is connected via the control unit 19 to pass or fail indicator 37. The control unit 19 includes a free running oscillator 58 which supplies a divided output to one input of AND gate 1. When e.g. start button PB is pressed a second input to the gate is provided via flip-flops 4 and 5. The sequencer 19<SP>1</SP> then supplies output pulses in turn to the pairs of lines T 1 , T 2  &c., the first line of each pair when energized controlling the initial set up of the associated test and the second line controlling the set up of the second part of the test. Timing pulse T 1  occurs during the second period to enable the counter 31 to receive the test result from the A/D converter. Additionally lamps are controlled to indicate the test being performed. Assuming a quantitative result is required from one of the tests, the associated test button PB is operated and when the second line 59 associated with that test is energized an AND gate 2-4 is energized which provides an input to a further AND gate 5. A second input to this gate is provided by timing pulse T 2 , which follows T 1  during the second period, and the count is transferred by gates 64 to a storage and display 32, 33.