Patent GB-1131349-A (GB)
Title: Improvements in or relating to electric signal amplifiers
Inventor: ROGERS ERNEST WILLIAM
IPC: H03F1/52
Filed: 1967-04-20
Abstract: 1,131,349. Radio transmitting apparatus; transistor circuits. REDIFON Ltd. 6 Oct., 1967 [20 April; 1967], No. 18205/67. Headings H3T and H4L. A transmitting amplifier is provided with automatic control whereby the drive to the final amplifying stages is reduced if either the D.C. current taken exceeds a predetermined amount or the output voltage exceeds a predetermined level; two separate control voltages are correspondingly developed, being either (1) compared in a comparison circuit, the greater voltage taking control, or (2) applied separately to control the gain of different stages in the preliminary parts of the amplifier. The arrangement is described as applied to a transmitter comprising R.F. amplifier 14, Fig. 1, which feeds via balance - to - unbalance transformer 16 an aerial tuning circuit comprising shunt variable capacitor 29 and tapped series inductor 26, an aerial having a capacitive reactance being connected to terminals 27, 28; tuning is performed using a tuning indicator 32 which is coupled to the transmitter output circuit by means of a current transformer 30. The D.C. supply to the final stage of amplifier 14 is obtained from terminal 53 via control voltage generator 35, to which a voltage derived by rectification of the amplifier output by means of diodes 33, 34 is applied, and the gain control voltage is supplied from this generator 35 to an early stage of the amplifier 14 via line 38. Amplifier.-A preliminary stage 40, Fig. 2, in common emitter connection is coupled by means of R.F. choke 52 and phase-splitting transformer 57 to a push-pull emitter-follower stage comprising transistors 60, 61; this is direct-coupled to output transistors 70, 71 which are in common emitter configuration. Diode rectifiers 33, 34 produce a D.C. voltage at terminal 37 proportional to the amplifier output. The gain of the preliminary stage 40 may be reduced by means of a control bias applied to its base from terminal 46 via diode 47 and R.F. choke 44; a standing base bias is obtained from terminal 48 via diode 49, the diodes 47, 49 preventing interaction between the biases. Control voltage generator.-The collector current of the amplifier output stage transistors 70, 71, Fig. 3, passes through resistor 82; an adjustable portion of the voltage thereby developed across this resistor is applied from potentiometer 85 to the base of a transistor D.C. amplifier 86, from the collector of which a voltage is applied to the anode of diode 99. The D.C. voltage produced by diode rectifiers 33, 34 in the output circuit of the amplifier output transistors 70, 71 is smoothed by an R.C. circuit comprising resistor 89 and capacitor 90 and is applied via a voltage-dropping Zener diode 91 to the base of a transistor D.C. amplifier 92, the standing emitter bias of which is determined by a resistance network 94, 95, 96 in which bias adjustment is made by means of variable resistor 94. From the collector of transistor 92 a voltage is applied to the anode of diode 98. The two diodes 98, 99 co-operate to pass the larger of the two voltages applied to them to a D.C. amplifier comprising cascaded transistors 100, 101 in emitter follower connection, the output at terminal 109 comprising the control bias which is applied to the preliminary stage of the amplifier (at terminal 46, Fig. 2). Alternative control voltage generator.-For use where substantial variations may occur in the voltage of the D.C. supply; the arrangement maintains the amplifier output at a substantially constant value for supply voltages in excess of the nominal value, but if the supply voltage falls below the nominal value the drive to the final amplifier stage is reduced so as to avoid excessive distortion. The D.C. voltage produced by diode rectifiers 33, 34, Fig. 4, in the output circuit of the amplifier output transistors 70, 71 is smoothed by R.C. network 113, 115 and applied via diode 114 to the base of a transistor D.C. amplifier 110 which receives a standing bias over high value resistor 116. The collector circuit of transistor 110 is coupled to a further D.C. amplifier comprising cascaded emitterfollowers 111, 112, the output at terminal 138 comprising the control bias which is applied to a preliminary stage of the amplifier (at terminal 46, Fig. 2). The load resistor 137 of transistor 110 is returned to the emitter of transistor 112. The emitter bias of transistor 110 is dependent upon the D.C. supply voltage, being derived from an adjustable potentiometer 118, which, with resistor 119 and potentiometer 120 is connected in a series chain including diodes 128- 132 across the D.C. supply terminals 43, 53; the slider of potentiometer 125 is connected via clamping diode 124 to the middle point of a further potentiometer network connected across the D.C. supply terminals 43, 53 and comprising resistor 122 and Zener diode 121. The arrangement is adjusted so that upon increase of the D.C. supply voltage the emitter of transistor 110 is clamped by diode 125 to the potential produced by Zener diode 121, whereas with decrease in voltage diode 125 cuts off and the emitter potential of transistor 121 follows the supply voltage down.