baber/WOPTO huggingface dataset:
Patent JP-S61136173-A (JP)
Title: Picture processor
Inventor: MITA YOSHINOBU
IPC: G06T5/00
Filed: 1984-12-07
Abstract: PURPOSE:To attain a picture processing with the suppression of moire by feeding the difference of mean density between periods before and after a dither processing back to a picture signal before the dither processing or to the threshold value of a dither matrix. CONSTITUTION:The VIDEO, i.e., an input picture signal is supplied to an adder 10, and the other input of the adder 10 is equal to a correction signal that suppresses the moire with the output given from a latch 24 and equivalent to a single picture element. The output of the adder 10 is supplied to a dither circuit 12 and turned into the binary picture signals. An X value counter 19 counts the picture element clocks and delivers '1' to a CA terminal when the count value is equal to X. Thus an L (load) terminal is set at '1', and the counter 19 is reset to its original value to start counting again. The block width is decided by the amount of X.
Patent JP-H04135805-A (JP)
Title: Fixing method for mold to platen
Inventor: INABA ZENJI
IPC: B29C33/30
Filed: 1990-09-28
Abstract: PURPOSE:To facilitate the handling of bolts and the automatization of the fixation of molds by a method wherein the molds are fixed to platens with through bolts inserted from the external surface side of each platen. CONSTITUTION:A plurality of inserting holes 7a and 7b are provided on a fixed platen 2 and on a movable platen 3. In addition, tapped holes 8a and 8b, which correspond to the inserting holes 7a and 7b, are produced on the mounting faces of respective molds 5a and 5b. Under the state that the platens 2 and 3 are opened the molds 5a and 5b, the fixed side and the movable side of which are put under the state being joined together, are hung down in a mold clamping part 1. After that, by realizing the mold touching state, the molds 5a and 5b are made to abut against the mold mounting faces of the platens 2 and 3. Then, by screwing the tips of the bolts 6a and 6b, which are inserted from the outer face sides of the platens 2 and 3 in the inserting holes 7a and 7b, into the tapped holes 8a and 8b, the molds 5a and 5b are fixed to the platens 2 and 3. Or the fixation of the mold to the other platen may well be performed with bolts, each of which can be operated with a tool, which can pass through a tool through hole provided on the one platen for operating said bolt.
Patent JP-2001084612-A (JP)
Title: Optical disk device
Inventor: ARAKAWA SHINICHIRO
IPC: G11B7/004
Filed: 1999-09-10
Abstract: PROBLEM TO BE SOLVED: To determine the physical address of its sector even when only one address section PID can be read. SOLUTION: An address detecting circuit 71 reproduces address information (address sections PID1-PID4) from an address signal. When a first sector bit in the address information is detected, the circuit outputs a polarity switching request signal to a CPU 215. When the CPU 25 receives the polarity switching request signal, the CPU 25 sends a tracking polarity switching signal to the changeover switch 62 of a tracking control circuit 60 which switches tracking polarity to reverse the present servo polarity, and an address deciding circuit 72 decides an address by a prescribed decision standard based on the address section PID of address information and a tracking polarity switching signal.
Patent JP-H11168271-A (JP)
Title: Surface-mountable flexible interconnection structure
Inventor: JOSEPH G GILLETTE
IPC: H01R12/62
Filed: 1998-08-27
Abstract: PROBLEM TO BE SOLVED: To realize a surface-mountable flexible interconnection which is not limited to the use for interconnecting a PCB(printed circuit board) to another PCB but adaptable to various manufacturing environments. SOLUTION: A surface-mountable flexible interconnection 100 which connects two electronic assemblies together is formed of a flexible film board 110. A conductive metal runner 120 runs along a bottom surface 114 of the board 110, an array of solder pads 122 each mounted with a solder bump 123 is connected to a second terminal 124 located at the second edge of the board 110. The hard sheet of a printed circuit board material 130 bonded to the top surface of the board 110 with a strong adhesive agent 142 is directly laid on the solder pad array to function as a stress relaxing mechanism. The second edge of the board 110 is attached to the top side 132 of the hard sheet with a temporary adhesive agent 140 of low adhesion.
Patent JP-H03120424-A (JP)
Title: Method and instrument for measuring level of molten metal
Inventor: MARUYAMA SATOSHI
IPC: G01F23/28
Filed: 1989-10-04
Abstract: PURPOSE:To accurately measure the level of molten metal by projecting light on the surface of the molten metal and receiving its reflected light at a position which deviates in azimuth angle by 5 - 10 deg. from the projection direction. CONSTITUTION:The fitting position of a two-dimensional image pickup device 9, i.e. the position of a window 5 for a camera deviates by an angle psi (=5 - 10 deg.) from the reflected light RB in the completely stationary state of the molten metal 3. Further, the reflection position R is set preferably close to the wall surface of a container 2 so as to eliminate the influence of the waving of the surface of the molten metal 3 in the container 2. Then a received image signal is sampled at specific intervals of time to find the means value and standard deviation of the center of gravity of picture elements when the total of picture element brightness of the obtained image is in a specific range or find the level of the molten metal from the mean value of the center of gravity of the picture elements when the standard deviation is smaller than a previously given threshold value. Consequently, only diffused light can be photodetected except direct reflected light from the surface of the molten metal which is a specular surface.
Patent JP-S63110016-A (JP)
Title: Air conditioner for vehicle
Inventor: SAKURAI YOSHIHIKO
IPC: B60H1/00
Filed: 1986-10-28
Abstract: PURPOSE:To improve the controllability, by detecting the cooling degree of a cooler and the opening of an airmix door then operating an air supply temperature based on said detection signals and controlling the delivery capacity of a compressor based on the operation result. CONSTITUTION:A duct sensor 30 detects the cooling degree at an air supply port of a cooler 10. The opening position of an airmix door 11 is detected by a potentiometer 32. These detection signals are inputted together with signals from a sunshine sensor 34, an outer air temperature sensor 35 and a temperature setter 37 to a computer 7 through an A/D converter 31. The computer 7 operates the temperature of supply air based on the cooling degree of the cooler and the opening of the airmix door, the control a compressor 15 through a magnet clutch drive circuit 21 based on said temperature thus controlling the delivery capacity. With such arrangement, energy is saved and the controllability can be improved.
Patent JP-S62116965-A (JP)
Title: Image forming device
Inventor: ADACHI HIDEKI
IPC: G03G15/04
Filed: 1985-11-18
Abstract: PURPOSE:To prevent a control from becoming unstable by regarding a position which lags an image exposure position in terms of time as a blank exposure position and controlling the blank exposure on the based on the front end of an image. CONSTITUTION:When the image of a specified area is extracted, a black exposure lamp 3 is turned off between positions S1 and S2 to extract a specified area 13 in a latent image area 14. In this case, the on-off timing control over the lamp 3 is carried out in the consideration of the spread edge (a) of the blank exposure at the position S1 and the spread edge (b) of the blank exposure at the position S2. Thus, when a scanner 20 reaches a specific position after the start of scanning, an image head sensor 1 turns on to put a timer in operation and the blank exposure lamp 3 is turned off after time t1 corresponding to distance (m+S1) on a photosensitive drum 8 and then turned off after time t2 corresponding to distance (m+S2+l). Consequently, the latent image from the S1 to the S2 in the peripheral direction of the photosensitive drum 8 is left.
Patent JP-H03120698-A (JP)
Title: Semiconductor non-volatile storage device
Inventor: TANAKA SUMIO
IPC: G11C16/06
Filed: 1989-10-03
Abstract: PURPOSE:To attain high speed reading by providing a write quantity checking sense amplifier checking the states of thresholds for respective transistors in a cell in addition to a data reading sense amplifier and selectively operating respective sense amplifiers. CONSTITUTION:The sense amplifier 28 is constituted of two stages of 281 and 282 and is used for reading. The sense amplifiers 411 and 412 are used for checking a write quantity, and the outputs of the sense amplifiers 282, 411, and 412 become the inputs of a post-stage logic circuit 42. The transistors 22 and 23 are used for selecting the write quantity checking sense amplifiers 411 and 412. Here, the write quantity contains the state of the threshold of the cell in a non-write state. Since the transistors 22 and 23 are removed between the sense amplifier 28 and bit lines 13 and 14 with such constitution, resistance components between them are reduced, and high speed reading is attained.
Patent JP-H0569122-A (JP)
Title: Soldering method by hydrogencharg system
Inventor: ARAI SUSUMU
IPC: B23K1/20
Filed: 1991-09-10
Abstract: PURPOSE:To provide a method characterized in that favorable soldering is carried out by endowing a metal of soldered joint with hydrogen by a method such as occlusion, etc., in advance and using the reduction of hydrogen. CONSTITUTION:The metals such as Cu, Ni, etc., to be soldered are endowed with hydrogen by a method such as occlusion endowed with hydrogen by a method such as occlusion and the like, in advance, the hydrogen generated from the metal interior by a heat at the time of soldering reduces and removes an oxide film on the metal surface, thus a favorable soldering can possibly be carried out.
Patent JP-H01104476-A (JP)
Title: Low heat input one-face and one-layer welding method
Inventor: SHIGA ATSUSHI
IPC: B23K9/173
Filed: 1987-10-15
Abstract: PURPOSE:To improve welding efficiency by providing a backing copper plate and forming a groove shape to an I type and further, regulating a root gap, a wire diameter, welding heat input, welding voltage and welding speed according to specific conditional inequalities. CONSTITUTION:The backing copper plate 2 with a groove is provided for forming a penetration bead of a weld zone and the groove shape is formed as the I type. At the time of performing gas metal arc welding, the root gap G is regulated within the range shown by the inequality I with respect to a base metal plate thickness (t) and the wire diameter D. The electrode wire diameter D is limited within the range shown by the inequality II with respect to the base metal plate thickness (t) and the welding heat input H and the welding voltage E are regulated according to the inequalities III and IV respectively with respect to the plate thickness (t), the gap G and the wire diameter D. Further, the welding speed V is regulated within the range shown by the inequality V. By this method, the occurrence of defects on the weld zone and embrittlement and softening of a heataffected zone of base metal are prevented and the welding speed is increased. Accordingly, the welding efficiency is improved.
Patent JP-H06110508-A (JP)
Title: Production managing device
Inventor: SAKAINO MASAMICHI
IPC: G05B19/418
Filed: 1992-09-28
Abstract: PURPOSE:To reduce load required for retrieving information and to effectively utilize throughput by hierarchizing and managing the information to be retrieved. CONSTITUTION:A screen control part 4 inputs screen configuration data stored in a screen configuration data storage part 20 and displays a prescribed picture according to these data. According to event source data stored in an event source data storage part 21, event information to be inputted from a programmable logic controller 1 through a communication processing part 3 is hierarchically managed. At this time, the event information is managed while being divided into the groups of kind classes such as the 'abnormality' of the event information at the end, for example. Therefore, the screen control part 4 monitors whether any abnormality is generated or not by inputting only the most significant node of the hierarchical structure. When this abnormality is recognized, the low-order node just for one stage of the hierarchical structure is retrieved, and the turned-on node is recognized.
Patent JP-H1198134-A (JP)
Title: Method for detecting fraudulent alteration and copy of cookie, and program storage medium
Inventor: KIKUCHI MITSUTAKA
IPC: H04L9/32
Filed: 1997-09-24
Abstract: PROBLEM TO BE SOLVED: To keep the security of WWW(the world wide web) service by detecting the fraudulent alteration of a Cookie (information used for control of transition of a service served for the user and the transfer of data between services by a WWW server) and detecting the use of a copy of the Cookie thereby preventing unauthorized use of the Cookie. SOLUTION: A computer 1 providing the WWW service that receives a service request from a user terminal 2 adds a series of or specific information to the Cookie and adds a digital signature to the information and encrypts the resulting information to conceal a data structure of the Cookie and sends it. Upon the receipt of the Cookie from a user terminal 2, it is decoded and the digital signature is extracted and it is authenticated. Furthermore, the unified relation between the served WWW service item and the user is confirmed by the series or specific information added to the Cookie.
Patent JP-H10124663-A (JP)
Title: Binarization compensating device and its method
Inventor: KO EISHUN
IPC: H04N1/409
Filed: 1997-09-24
Abstract: PROBLEM TO BE SOLVED: To execute binarization without being affected by peripheral environments by executing binarization processing for a video signal while changing a binarization reference luminance level. SOLUTION: The binarization compensating device 60 includes a 1st memory 602a, a 2nd memory 602b, a comparator circuit 604, a counter circuit 606, and a control part 608. The circuit 604 primarily compares the luminance levels of respective pixels of a binarized video signal outputted from an electronic part with an initial reference luminance level IR and outputs a primary comparison result signal CR1 to the circuit 606 and a switch 610. The circuit 606 includes a 1st AND gate 606a and a counter 606b and counts up the number of pixels having luminance levels higher than the reference luminance level based on the primary comparison result of the circuit 604.  The control part 608 secondarily compares the number CS of pixels counted by the circuit 606 with the sum of reference pixels values stored in the 2nd memory 602b and controls the reference luminance level based on the compared result.
Patent JP-H02105433-A (JP)
Title: Integrated circuit device
Inventor: NARA SHIGEKI
IPC: H01L21/60
Filed: 1988-10-13
Abstract: PURPOSE:To restrain a printed-circuit board from becoming large-sized without making a small multipin IC pellet large or without using a PGA by a method wherein an IC pellet and an external lead are connected electrically via a circuit wiring board. CONSTITUTION:A circuit wiring board 3 is pasted on an island of a lead frame; an IC pellet 1 is mounted on a mounting land 4, on the wiring board 3, formed by a plating technique; the IC pellet 1 and wiring patterns 5 on the board 3 are wire-bonded; in addition, the wiring patterns 5 and inner leads 2 of the lead frame are wire-bonded and connected electrically. Since the wiring patterns on the circuit wiring board are formed by using the plating technique, reduced wiring patterns can be formed; accordingly, the IC pellet can be connected to external leads via the wiring board without making it large.
Patent JP-H10103280-A (JP)
Title: Bubble generating device
Inventor: BUN SEIDAI
IPC: B01F25/64
Filed: 1996-09-30
Abstract: PROBLEM TO BE SOLVED: To provide a bubble generating device integrally composed with a pump. SOLUTION: A bubble generating device 100 is provided with a pump 180 to pump water to form a vacuum condition at a center part at the time of pumping, a drive source 140 to drive the pump 180, and an air feeder 110 to feed air to water by using differential air pressure between the pump center part in the vacuum condition and atmospheric air. The air feeder 110 includes a hollow shaft 112 in which air flows, a solenoid valve disposed to be adjacent to a first end part of the hollow shaft 112, and a ball valve disposed at a second end part of the hollow shaft 112. As the pump 180 is actuated to generate a vacuum pressure in the pump, the solenoid valve is opened to generate differential pressure between the pump 180 and the air feeder.  The ball valve of the air feeder 110 is opened by the differential pressure between the pump 180 and the air feeder 110 to feed air to the pump 180, thereby air bubbles are generated in pumped water.
Patent JP-H01101753-A (JP)
Title: Loop type local area network
Inventor: HATANO SATORU
Filed: 1987-10-14
Abstract: PURPOSE:To attain low power consumption and low cost by demultiplexing a signal inputted to a node once into a signal in the unit of low speed channel, processing the signal and multiplexing it and sending it after the frame is rearranged thereby enabling the signal in the node to be processed at a low speed. CONSTITUTION:A demultiplexing circuit 102 of each node 100 demultiplexes a signal into a low speed signal for each channel according to an output of a frame synchronizing circuit 101. A switch circuit 103 applies insertion and demultiplex as to a signal of a prescribed channel among outputs of the demultiplexing circuit 102 and passes a signal of other channel. A memory circuit 104 stores tentatively an output signal of the switch circuit 103 to adjust the timing. A multiplex circuit 105 multiplexes the output of the memory circuit 104 to arrange the transmission frame and sends the result of a loop type transmission line. Thus, the signal in the node is processed at a low speed to contrive low power consumption and low cost and uses the hardware in common as to all nodes.
Patent JP-H0598406-A (JP)
Title: Hot dip metal coating method and its apparatus
Inventor: YAMANAKA SHIZUO
IPC: C23C2/40
Filed: 1991-10-07
Abstract: PURPOSE:To solve dross defects on the surface of a continuously galvanized steel sheet without increasing the concn. of Al in a plating bath. CONSTITUTION:By executing plating in such a manner that the structure of a plating pot 7 is formed into a double one of a dross accumulating part and a plating part, a plating bath in the vicinity of a strip 3 and a sink roll 4 at the time of plating is kept clean. The above double structure is formed into a one in which a small-sized pot 1 is floated up and fixed on the conventional plating pot 7 and the side or bottom of the small-sized pot 1 is provided with a opening part 2, and the discharge of dross from the small-sized plating pot 1 to the conventional plating pot 7 is enabled.
Patent JP-H04138129-A (JP)
Title: Electrocardiograph
Inventor: ONODA MASAHIRO
IPC: A61B5/332
Filed: 1990-09-28
Abstract: PURPOSE:To enable an electrocardiogram waveform to be digitized and allow the long-time recording thereof by generating two data of time base differential and amplitude differential values from the single data of the electrocardiogram waveform, and compressing the data with the SAPA compression method for saving in semiconductor memory. CONSTITUTION:In the signal processing device 30 wherein output from an A/D converter 20 is entered for data processing, a differential value data generation means 31 generates time base differential value data and amplitude differential value data between a current sampling point and a compression start point. A comparator 32 compares the time base differential value data with a time base threshold value for limiting the data to the first bit. Another comparator 33 compares the amplitude differential value data with an amplitude threshold value for limiting the data to the second bit. Also, an operation means 34 obtains a ratio of the amplitude differential value data to the time base differential value data. A compression data generation means 35 generates compression data constituted with the first or second bit, according to comparison results from the comparators 32 and 33, and operation results from the operation means 34, and outputs the compressed data to a semiconductor memory 50 for saving.
Patent JP-H0598191-A (JP)
Title: Epoxy-based coating for coated floor
Inventor: NAKANO MINEO
IPC: C09D5/00
Filed: 1991-10-08
Abstract: PURPOSE:To obtain an epoxy-based coating for coated floors, having antistatic effects and colorable to optional colors by blending an epoxy-based resin with a specified polyester and, as necessary, propylene carbonate. CONSTITUTION:The objective coating is obtained by blending (A) 100 pts.wt. epoxy-based resin with (B) 5-50 pts.wt. polyester, containing a perchlorate and having alkylene oxide bonds and (C) 0-20 pts.wt. propylene carbonate.
Patent JP-S61137476-A (JP)
Title: Solid-state image pickup device
Inventor: TERAKAWA SUMIO
IPC: H04N5/335
Filed: 1984-12-07
Abstract: PURPOSE:To obtain a solid-state image pickup device with structure which eliminates a contradiction between a dynamic range and sensitivity fundamentally by providing a transfer gate and a vertical MOS shift register which transfer signal charges transferred to a vertical CCD vertically; and a signal storage part. CONSTITUTION:The vertical CCD uses CCD structure employing, for example, ion implantation. The signal of a photodiode is transferred to vertical CCDs with pulses generated by a vertical shift register 6 when vertical CCDs are all in a high level state. Then, transfer pulses for vertical transfer generated by a vertical register 11 are inverted by an inverter 16 into off pulses, which are applied to the vertical CCDs successively to transfer signals charged in the vertical CCDs toward the signal storage part 7 facing down in a figure as if they were pushed out. A voltage is applied between terminals 14 and 15 to apply the voltage to gates of the vertical CCDs upwardly, further improving the efficiency of the vertical transfer.
Patent JP-H0899631-A (JP)
Title: Carrier boarding method on pulse circulating type ropeway
Inventor: KUWANO AKIYOSHI
IPC: B61B12/00
Filed: 1994-09-29
Abstract: PURPOSE: To enable passengers to get on each carrier uniformly by providing partitions to form plural getting-on queues corresponding to individual carriers composing a carrier group in the getting-on zone of a carrier stop pivotally provided with a pulley, and assigning the carrier for the passengers to get on according to the getting-on queues to guide the passengers. CONSTITUTION: When a carrier 12a passes an inner queue 22c and a middle queue 22b and a middle carrier 12b is in course passing the inner queue 22c, an official in charge standing by in a getting-on zone 6a regulates so as not to allow passengers 16, 16,... to get on the front carrier 12a and the middle carrier 12b. The carriers 12 for the passengers 16, 16,... to get on are thus perdetermined according to the queues. That is, an outer queue 22a, the middle queue 22b and the inner queue 22c partitioned by fences 17a, 18a, 19a, 20a respectively correspond to the front carrier 12a, the middle carrier 12b and the rear carrier 12c, and the passengers 16, 16,... get on the corresponding carriers. The passengers can therefore get on the carriers 12, 12, 12 without being perplexed.