Patent GB-1025786-A (GB)
Title: Superconductive circuitry
Inventor: HARMAN MICHAEL GODFREY
IPC: G11C19/32
Filed: 1962-03-30
Abstract: 1,025,786. Superconductive circuits. NATIONAL CASH REGISTER CO. March 1, 1963 [March 30, 1962; Jan. 14, 1963], Nos. 12265/62 and 1584/63. Heading H3B. [Also in Division G4] A superconductive multistable circuit is energized from an A.C. source and changes its state with each reversal of the source current unless inhibited by current in a transfer circuit. Notation.-Figure 1A shows cryotron circuitry and Fig. 1B the same circuit using a simplified notation. The cryotrons 1-4 represented by a thick line in Fig. 1A are denoted by one or more short lines in Fig. 1B parallel to the circuit in which they are connected. The number of short parallel lines represents the relative number of turns of the respective control windings; thus, cryotron 2 has three times the control turns as cryotron 1. Where a crytron is associated with more than one control winding, such as element 3, this is denoted by the symbolism of Fig. 1B, the single line on the left indicating that winding 3c<SP>11</SP> normally acts in opposition to windings 3c and 3c<SP>1</SP>. The notation used for cryotron 4 indicates that two superconductive elements each gate the other element. Bi-stable trigger.-Two paths 5, 6, Fig. 2A, gating each other by cryotrons 8, 9 are connected in parallel to source ic. Only one path at a time can be conductive, and the conductive state transfers from path to path each time the source current reverses in direction. Each path gates and is gated by a transfer circuit 10 comprising parallel paths 11 and 12, the application of an inhibiting transfer current is preventing the conductive state from being transferred between the paths 5 and 6 when the source current ic reverses in direction. The path in the conductive state is indicated in "0" and "1" digit output lines 13, 14, each of which includes a cryotron controlled by paths 5 and 6 respectively. Shift register.-Each register stage P1-P4, Fig. 3, comprises a bi-stable trigger of the kind shown in Fig. 2A except that output lines are omitted. Information is shifted from right to left and conductive states of the left and right paths of each bi-stable trigger respectively denotes "0" and "1" digits. Stage P1 is set to a conductive state by means which are not shown, and the transfer circuit is energized by a steady direct current io on line 15. The path of the transfer current io through transfer lines 16-19 and 22, 23 of the register is determined by the conductive states of the register stages P1-P4, each of which controls cryotrons in the transfer circuit. Additionally the lines 18 and 23 gate the cryotrons. In operation transfer current io passes through line 16 if stage P1 is in state " 0," or through line 17 if the stage is in state "1." Subsequently, the transfer current passes through one of lines 18, 19, 22 or 23 depending on the stage of stage P2 and so on. If both P2 and P1 are in state "1," the triggering of P2 is inhibited by current in line 23 when the source current ic reverses direction, and stage P1 is switched to "0" unless inhibited by an input signal. If P2 and P1 are in states "0" and "1" respectively the transfer current passes through line 22 and permits P2 to switch to " 1 " when ic reverses. Corresponding operations take place if stage P2 is in state " 1 " or " 0 " and stage P1 is in state "0." In general the transfer line arrangement causes a stage to remain in the state of the stage immediately preceding if the two stages are in the same state "1" or "0." Binary counter.-As shown in Fig. 4, the transfer circuit is continuously energized by a direct current io, and the transfer lines 26-31 are so arranged that all the stages Q1-Q4 change their state with each reversal of ic up to and including that stage from right to left which is the first stage in the " 0 " state. Complementary binary counter.-The transfer lines 32-39 are arranged as shown in Fig. 5, the arrangement in uninhibited for " ones complement" operation by omitting any transfer currents. For "twos complement" the transfer line 32 is energized, and all the stages up to and including the stage storing the first " 1 " are left unchanged for each reversal of current ic. Succeeding stages are changed in state with each reversal of ic. Decimal counter.-Bi-stable triggers U1, U2, U4 and U8, Fig. 6, are allotted to the digits 1, 2, 4 and 8 respectively. Transfer current is applied to line 41, and if stages Ul and U8 are both registering a " 1 " (i.e. the counter is full) all the stages are set to " 0 " when the current ic reverses. The cryotrons in line 42 are conductive when stages U1 and U8 are in state 1 and the transfer current passes over this line as a carry to the next stage (not shown). The lines 43 are arranged in a similar manner to the counter in Fig. 4, all these lines being connected to a line 40 which passes a " no carry " output to the next stage. Parallel binary adder.-Two stages are shown in Fig. 7 with bi-stable triggers B2, B3 forming part of an addend B register and triggers A2, A3 forming part of an augend and sum A register. The A and B registers are energized by alternating and cirect currents i A  and i B  respectively, the direct current i B  maintaining the addend registration in the B register. The carry digit " 0 " or " 1 " from a preceding stage is applied to transfer lines 46 and 47 respectively, and after combination with the digit stored in trigger B2 is applied as a partial sum " 0," "1" or "2" to trigger A2 on lines 48-50. Trigger A2 is set to the sum when i A  reverses, and the carry digit " 0 " or " 1 " passes over lines 51, 52 to the A3 and B3 triggers where the operation is continued in like manner. Supply current control unit; subtraction.-A control bridge circuit for the adder of Fig. 7 is shown in Fig. 8. Only one A and one B register stage A 0 , B 0  is shown. Two cryotron bridge circuits 56, 57 are provided which are controlled by a bi-stable trigger X connected to an alternating source ic. For addition, transfer circuit 53 is energized and the trigger X remains in the same state with path 54 conducting. Consequently the bridge 56 will connect a direct current idc to trigger BO in the direction i B  shown, and bridge 27 will connect an alternating current ic to trigger A0 to provide a switching current i A . Adding takes place in the manner previously described. For subtraction the A 0  and B 0  stages are loaded with the diminuend and subtrahend respectively and line 53 is de-energized. At the first reversal of ic the trigger X changes state and the bridge circuits 56, 57 are switched, thereby reversing the direction of direct current i B  and reversing the phase of alternating current i A . Consequently the AO trigger will remain in its existing state, and the stage of the trigger BO will reverse so that the B register holds the " ones " complement of the subtrahend. At the next reversal of ic line 53 and a transfer line 66 are energized and trigger X remains in the state to which it was previously set. The current i A  will therefore reverse and reverse the state of trigger A0, so that the contents of the B register is added to the A register. Since line 67 is energized from line 66 an extra " one " will be added as well. This results in the " twos " complement of the subtrahend behind added to the diminuend, the final contents of the A register giving the required difference. Simplified bi-stable trigger.-In Fig. 9 two parallel paths 71, 72 are connected to an alternating current supply line 73 and neither path gates the other. An inhibiting transfer circuit 74 is provided which is gated by and gates the two paths. A bi-stable trigger circuit for use when thin film deposited circuitry is employed is shown in Fig. 11 which is arranged to form a stage of the shift register of Fig. 3. The trigger pair comprises two parallel paths 75, 76 connected in series with other stages to a source of alternating current ic. The doubledback paths 75, 76 minimises the inductance. The transfer circuitry is indicated. Alternative current control unit.-Two output lines 81, Fig. 12, are connected either to points 82, 83 or to points 86, 87, these points being respectively connected to alternating and direct current sources 88, 36 through reversing bridges. The bridges are controlled by lines 89-92 which in turn are controlled by bistable triggers L1 and L2. Transfer lines 84, 85 of the triggers control the connection of the output lines 81 to the points 82, 83 or 86, 87 respectively, and when one or the other of these lines is energized reversal of the triggers L1, L2 is inhibited. If energization is changed from one to the other of lines 84, 85 one of the sources 88, 36 is substituted for the other. The bridges are provided so that when such a change of current source takes place, the source replacing the disconnected source has the same relative polarity. Each of these bridges is controlled by a respective trigger L1, L2, the trigger which is associated with the unenergized line 84 or 85 reversing its state in response to current ic and controlling the associated bridge through one of lines 89-92. Multi-stable circuits.-In Fig. 13A a multistable circuit comprises four parallel paths 94-97 associated respectively with a count of " 0 " to " 3." When one path is conductive during any half cycle of ic it cuts off the other paths. The transfer circuit comprises four parallel lines 100-103 so arranged that all the paths of the multi-stable circuit are cut off except for the two paths (counting cyclically) corresponding to the count held and the next count up. Each time ic reverses the count advances by one. A modified transfer circuit is shown in Fig. 13B. In Fig. 13C the cryotron control turns are graded, as shown, so that the cryotrons by which adjacent paths of the multi-stable circuit gate each other have a critical current less than half that of the other cryotrons. Simplified multi-stable circuit.-The bi-stable triggers of Fig. 9 may be