Patent GB-984885-A (GB)
Title: Improvements in or relating to equipment testing systems
Inventor: MORTLEY WILFRID SINDEN
IPC: G01R31/50
Filed: 1962-10-02
Abstract: 984,885. Fault testing; voltage discrimination. MARCONI CO. Ltd. Sept. 11, 1963 [Oct. 2, 1962], No. 37231/62. Heading G1U. Test apparatus for locating faults of a complex multicircuit electrical equipment comprises a test device at each of plural test points which provides an output changing in predetermined manner on occurrence of a fault at the associated test point, means for cyclically and repeatedly sampling the outputs of the test devices, a cathode ray tube whose ray is caused to scan the screen in predetermined pattern synchronically with the cyclic sampling of the test device outputs so that the ray occupies a characteristic position when the output of each test device is sampled, and means applying the sampled outputs to modulate the intensity of the ray to produce on the tube screen a visible indication indicative of a fault, in a position in the scanned pattern indicative of the fault location. In continuously monitoring computing and communication apparatus for input and output faults in e.g. 50 cabinets each housing e.g. 10 chassis, comprising e.g. 10 printed circuit boards (Fig.1), there are provided 10, 000 test points each having a known test device P producing a predetermined voltage in absence of fault and a different voltage on occurrence of fault, at an electrode of an associated symmetrical sampling transistor T wherein the electrode receiving the greater voltage acting as emitter and the other acts as collector. The remaining transistor electrodes are connected in common to a capacitor K and the transistor bases to the outlets of a shift register S 1 , S 2 . . . . . S100 having 100 sections of 130 stages each; connections being made to stages 1 to 5, stage 6 being blank; stages 7 to 11, stages 12, 13 being blank; and so on with groups of 5 stages connected to transistors with one blank between each 5 and 2 blanks between each 10. A clock wave source C1 at 1 mc/s excites the shift registers to energize the 10, 000 transistors at 10 millisec intervals, and capacitor K is charged to 1 volt in the absence of fault but varies on fault occurrence. Its voltage is applied to a transistorised voltage discriminator VC such that when the input to the base of T 1  is within a predetermined voltage range the output at the common collector of T 2 , T 3  is substantially negative; while if the input falls below the range, T 2  is backed off and T 3  conducts; and if the input exceeds the range T 3  is backed off and T 2  conducts, so that the output voltage rises to zero. The base of the emitter-follower T 4  is supplied with a reference potential point RP of a variable potentiometer. The output is applied to a known non-interlaced 405 line television transmitter unit TV containing line and field time bases and blanking signal generators to produce a modulated carrier television signal fed to a known non-interlaced television receiver TR displaying on cathode ray tube CRT so that in absence of a fault the negative signal from VC gives a low beam intensity and in presence of a fault the zero signal gives a high beam intensity. The line and field time bases are synchronized in known manner from the transmitter, and line frequency signals are delayed at D 1  divided by two at FD, and applied to synchronize the 1 mc/c clock source C 1  and a further 5 kc/s clock source C 2  for a 160 stage shift register R 2 , whose outputs trigger the first stages of the shift registers S 1 , S 2 . . . . S100, each 5 outputs being separated by a blank output and each 10 outputs being separated by two blank outputs. The trigger pulse of the first stage of register R 2  is derived at field frequency from transmitter TV, which is blanked in known manner from pulse sources BP1, PB2 excited from clockwave sources C1 and C2. The cathode ray tube displays (Fig.2) an array of 10, 000 luminous dots of low intensity arranged in groups of 5; the groups being arranged in pairs vertically; the pairs being spaced by blank lines and by double blank lines after every 5th pair. Horizontally the pairs of groups are separated by spaces and by double spaces at every alternate group. Each dot of a vertical pair represents the input and output tests of a circuit board, and the display is divided horizontally into 10 columns representing the 10 chassis of 10 boards each, and vertically into 50 lines representing the 50 cabinets of 10 chassis'each. On fault occurrence in a circuit board, the appropriate dot is brightened, and the particular circuit affected may be identified by observation of the display. An alarm may be operated by connecting the output of VC to open a normally non conductive transistor (not shown) to energize a relay which may also operate a camera to photograph the display.