Patent GB-801219-A (GB)
Title: Electrical number or document sorting system
IPC: G11C19/20
Filed: 1957-01-25
Abstract: 801,219. Statistical machines. STANDARD TELEPHONES & CABLES, Ltd. Jan. 25, 1957 [Jan. 31, 1956], No. 2781/57. Class 106 (1). The invention relates to apparatus for sorting electrically represented numbers into an ordered sequence, the numbers being arranged initially in two random successions which are compared in turn each with a number from the other succession and with a previous number and according to the results of the comparison are merged into two new successions, the process being repeated until the numbers are arranged in the desired sequence. In the example described the numbers are the accounts numbers of a series of cheques and the apparatus is also adapted to sort the cheques themselves into an ordered sequence. The cheques are initially arranged in two stacks A, B, Fig. 1, in random order and fed in turn past sensing means and through a directing mechanism to one of two receiving pockets C, D there being a data store to receive the number of a first cheque which is passed to one of the pockets C, the numbers of the next cheques A and B in each stack being entered into data stores and compared with each other and with the first cheque C and, according to the results of the comparison, one of the cheques A or B is directed into the pocket C with the first cheque or into the other pocket D and another card is fed from that stack and the comparison process repeated. Assuming that it is desired to sort the cheques into ascending numerical order the purpose of the sorting process is to reduce the number of step-down sequences in the succession of cheques in the receiving pockets. Fig. 1 shows diagrammatically two streams of cheques A, B, the cheques being fed in turn past sensing means (not shown) to intermediate positions A<SP>1</SP>, B<SP>1</SP>. According to the relative values of their numbers one is fed to the directing position H and replaced by another from that stack and according to whether its number is higher or lower than the last card in pocket C it is sent to pocket C or pocket D. If cheque A has a higher number than cheque C and cheque B is higher than cheque A they may be fed to the same pocket in the order C, A, B without destroying the ascending order sequence. When the next card to be fed represents a step-down in number it is passed to the other receiving pocket to start a new sequence of cheques in ascending order. There may be a number of sorting stages in the machine, or the cheques may be passed through one stage several times. The apparatus is characterized by the provision of two shift registers each with n+1 stages (where n is the number of binary digits needed to represent each number) which registers store the numbers of the first cheques in each initial succesion and as each new number (A) is inserted into a register it is compared digit by digit with the number (C) previously stored therein and simultaneously compared digit by digit with the number (B) previously recorded in the other register, the comparison means governing the feed and direction of the cheques to the receiving pockets. For convenience of handling the cheques are enclosed in jackets each carrying a magnetic strip upon which the account number of the cheque is recorded in binary form together with other data. The magnetic strip also carries clock pulses, and is read by two magnetic heads, one for the clock pulse track and the other for the track containing the account number and other data. The output from the four reading heads is amplified and passed to the terminals PA1, PA2, PB1, PB2, Fig. 2: Terminals PA1 and PA2 receive clock pulses and data pulses respectively of a cheque passing from position A, Fig. 1, to position A<SP>1</SP>. Terminals PB1 and PB2 receive like pulses from a cheque passing from position B to position B<SP>1</SP>. Since cheques are fed in only one of the A or B streams at once and not in both simultaneously, the same amplifier and pulse shaping circuit can be used for the signals from both reading heads. The clock pulse inputs from terminals PA1 and PB1 are passed by gates G2, G3 to an Or gate G1 which represents this common circuitry, and the data pulses from terminals PA2, PB2 pass via gates G9 and G10 to common Or gate G11. Gates G2 and G9 and gates G3 and G10 are controlled by the outputs PA and PB respectively of comparator CP. These outputs determine whether the next cheque is to be fed from position A to A<SP>1</SP> or from B to B<SP>1</SP> and the other two outputs PC, PD control the directing mechanism which sends the cheque to either of the C or D pockets. Clock pulses through gates G2 or G3 pass via a monostable device MS1 which shapes the pulses and applies them through a mixer gate G4 to the shift inputs of shifting registers SRA, SRB, each having n+2 stages including a " 0 " stage. The data pulses from an " A " or " B " cheque passing through gate G11 are applied through gates G7 or G8 to the inputs of the shifting registers SRA or SRB. These gates G7 and G8 are controlled by the comparator outputs on terminals PA and PB respectively and also by a signal on terminal PO2 derived from a photocell device during the passage of a cheque from position A to position A<SP>1</SP> or from position B to position B<SP>1</SP>. By this means signals are only allowed to enter the registers when the card is in reading position and spurious pulses occurring at other times are blocked. The shifting registers have recirculating loops including gates G13 and G12 which when open allow the contents of the stores to circulate. As a cheque is fed from position A to position A<SP>1</SP> its number is entered simultaneously into the register SRA displacing the previous number digit by digit. During this process gate G13 is closed by a signal from terminal PA and gate G12 is opened by a signal from terminal PB so that recirculation is only permitted in register SRB. The comparator CP is arranged to compare digits successively appear at terminals PAB and PBA connected to stage 1 of the registers and it compares digits in the n+1 stages of each register with the digits in stage 1 of the same register. Connections to terminals PAB and PCA and to terminals PBA and PCB are made for this purpose. Since each number is represented by n digits a new number being entered into a register is compared digit by digit with the number previously contained therein. As a new number A enters register SRA to replace the previously stored number C and as a previously stored number B recirculates in register SRB comparisons are made between A and C, A and B and B is compared with itself. Similarly while a new B number is entered in register SRB to replace a number C previously stored, and the number A in register SRA recirculates, B is compared with A, B and C and A with itself. The last comparison in each case, is superfluous but serves as a check, and the two useful comparisons serve to determine the relative magnitudes of the three numbers A, B, C and accordingly to give an output on terminals PA or PB to cause an " A " cheque or a " B " cheque to be fed to the position H. The comparator also gives output signals on terminals PC or PD to cause the outgoing cheque to be directed to pocket C or D. The sorting process continues until one of the input stacks is exhausted, at which time the machine stops. Comparator. The comparator CP, Fig. 5, consists of three identical comparison circuits CPC, CPB and CPA in which the A number is compared with the B number, A with C and B with C respectively. In each circuit there are a pair of gates in which the signals from the shifting register stages on terminals PAB, PBA, PCA and PCB (Fig. 2), are each gated digit by digit with the inverted signal from another stage. Comparison pulses generated for each stage of the register by the clock pulses pass through one of the comparison gates to give a signal on one of the output terminals P5C, P6C. As soon as such a signal is produced further comparison pulses are blocked and the comparison is completed. This is because the binary digits occur in the order having the highest denomination first so that the number having the first " 1 " is the higher. The outputs from the comparison circuits set triggers BS3, BS5 and BS4 respectively which accordingly record the results of the comparisons as shown. These triggers are connected to a network of And and Or gates which control the setting of triggers BS6 and BS7 which in turn govern the output signals on terminals PD, PB, PA, PC according to the relative magnitudes of the number on cheques A, B and C. Trigger BS6 has a single input and operates as a scale of two counter. Subsidiary shifting registers may be provided to receive the other data recorded on the magnetic strip, e.g. the amount so that if a number of cheques occur on the same account number they may be sorted according to the amounts for which the cheques are drawn The numbers need not be associated with cheques or other documents but may for instance be telephone numbers. Such numbers accompanied by call costs may be recorded as calls are made in random order on a pair of magnetic tapes. These are used as the input of a sorting machine, the numbers and other data being recorded again after sorting, upon two output tapes. The process is repeated until the numbers are sequentially arranged. Specifications 663,574, 726,526, 766,317, [all in Group XL (c)], 766,318 and 783,000, [Group XL (b)], are referred to.