baber/WOPTO huggingface dataset:
Patent TW-200303396-A (TW)
Title: Rack latch assembly
Inventor: ROBERTSON KENNETH G
IPC: H05K7/14
Filed: 2002-10-31
Abstract: A rack latch assembly for securing a product (100) and bezel (200) to a rack (10), including a latch bracket (500) for securing to the product (100); a latch (512), extending from the latch bracket (500), for latching to the rack; and a lever (410), rotatably secured in the bezel, for releasing the latch (512) from the rack during rotation.
Patent TW-200300854-A (TW)
Title: Translucent reflection type photoelectric device, electronic machine and manufacturing method of translucent reflection type photoelectric device
Inventor: TAKENAKA MINU
IPC: G02B5/02
Filed: 2002-11-21
Abstract: The present invention provides a translucent reflection type photoelectric device capable of increasing the amount of display light no matter in the reflective mode or transmission mode, electronic machine having the same, and manufacturing method of translucent reflection type photoelectric device. To achieve the object, in the TFT array substrate 10 of the reflective photoelectric device 100, a rugged pattern 8g for forming a rugged formation layer 13a is formed by a first transparent resin with a refractive index of n1 on a lower layer side of the light reflective film 8a. An upper layer insulating film 7a composed of a second photo sensitive resin with an refractive index of n2 (n1> n2) is formed on the upper layer of the rugged formation layer 13a. Furthermore, a light penetrating window 8d is formed on a position overlapped with the recess part of the rugged pattern 8g. Therefore, the interface between the rugged formation layer 13a and the upper layer insulating film 7a is used as a focus lens to make the light emitted from the back side be refracted to the light penetrating window 8d to fulfill the function.
Patent TW-200409244-A (TW)
Title: Method for forming metal silicide on source and drain
Inventor: WU KUO-CHIEN
IPC: H01L21/44
Filed: 2002-11-29
Abstract: The present invention discloses a method for forming metal silicide on source and drain, which includes the following steps: providing a semiconductor silicon substrate formed with the active areas and the peripheral circuit area, wherein the peripheral circuit area is formed with a gate structure, and the semiconductor silicon substrate on both sides of the gate is formed with the source and drain; globally forming a barrier to cover the active area and the peripheral circuit area; forming a shielding layer covering the barrier of the active area; removing the barrier in the peripheral circuit area; removing the shielding layer; forming a metal layer covering the peripheral circuit area; and, conducting the heat treatment to let the silicon component in the metal layer and the source and drain to be reacted to form the metal silicide layer on the source and drain.
Patent TW-200411867-A (TW)
Title: Manufacturing method of IC package substrate bonding with replaceable IC carrier board unit
Inventor: LI SHIAN-JANG
IPC: H01L23/28
Filed: 2002-12-31
Abstract: A kind of manufacturing method of IC package substrate bonding with replaceable IC carrier board unit is provided in the present invention. The invention contains the following steps: (a) providing a stripe carrying plate that has a carrying frame with plural reception spaces capable of carrying and connecting plural IC carrier plate units; (b) inspecting the stripe carrier plate and comparing if the amount of passed IC carrier plate units is larger than that of failed IC carrying plate units; (c) removing the failed IC carrier plate units from the reception space to form an empty trough for placing into the passed IC carrier plate units when the number of passed IC carrier plate units is larger than that of failed IC carrying plate units; (d) trimming both long side edges corresponding to the carrier frame to obtain a regulated stripe carrying plate with all passed IC carrier plate units.
Patent TW-200412650-A (TW)
Title: Dual damascene process
Inventor: WU CHIH-NING
IPC: H01L21/768
Filed: 2003-01-07
Abstract: A method for eliminating nodule defects during a dual damascene process is disclosed. A semiconductor substrate provided thereon with a dielectric layer, a hard mask layer over the dielectric layer, and a first bottom anti-reflection coating (BARC) layer over the hard mask layer, wherein the hard mask layer comprises a metal layer. On the first BARC layer, a pattern of a first photoresist layer comprising a trench opening exposing a portion of the subjacent first BARC layer is formed. The exposed first BARC layer and the underlying hard mask layer is etched through the trench opening to form a trench recess in the hard mask layer. The first photoresist layer and the first BARC layer are stripped. A second BARC layer is deposited over the hard mask layer and filling the trench recess thereof. On the second BARC layer, a pattern of a second photoresist layer comprising a via opening, which is located above the trench recess, exposing a portion of the subjacent second BARC layer is formed. The exposed second BARC layer, the underlying hard mask layer and the dielectric layer are etched to form a via recess in an upper portion of the dielectric layer. Thereafter the second photoresist layer and the second BARC layer are etched by using a plasma created by a mixture etching gas containing oxygen and fluorocarbon substance, wherein the fluorocarbon substance contains hydrogen.
Patent TW-200400597-A (TW)
Title: Semiconductor device and method of fabricating the same
Inventor: YOKOYAMA YUICHI
IPC: H01L23/522
Filed: 2003-01-08
Abstract: A method of fabricating a semiconductor device includes steps of forming an interlayer dielectric film to cover upper sides of a bit line pad and a storage node pad defining a first conductive layer, simultaneously forming a plurality of contact holes reaching upper surface of the first conductive layer through the interlayer dielectric film, expanding in width upper portion of part of the aforementioned plurality of contact holes, thereby forming a trench for a second conductive layer, and arranging conductors in the aforementioned plurality of contact holes and the aforementioned trench for a second conductive layer. Thus, a bit line contact, a storage node contact and a bit line serving as the second conductive layer are obtained.
Patent TW-200412410-A (TW)
Title: Photovoltaic array module design for solar electric power generation systems
Inventor: CHEN LEON L C
IPC: H01L31/054
Filed: 2003-01-14
Abstract: A solar photovoltaic array module design, which can constitute either three or four steps of optical concentrations of photovoltaic electric power generation systems. A compound parabolic concentrator (CPC) is mounted under a first or a first and second optical concentrating fresnel lenses that concentrates the intensity of sunlight. Then the focused sunlight is further concentrated twenty times by the third optical concentrator CPC. The high mirror quality of CPC allows up to 98% of the reflected rays to be focused at the bottom of the CPC. At this point, the intensified sunlight is homogenized as it passes through a fourth optical concentrator glass lens, which with anti-reflection coating on the top of the glass lens' surface, incident on the multi-junction solar cell accomplish the fourth optical concentration for the photovoltaic electric energy conversion.
Patent TW-200403970-A (TW)
Title: Chewing gum and confectionery compositions with encapsulated stain removing agent compositions, and methods of making and using the same
Inventor: HOLME SAMANTHA KATHARINE-RACHAEL
IPC: A23G3/34
Filed: 2003-01-27
Abstract: A composition in the form of a chewing gum composition or a confectionery composition containing an encapsulated stain removing agent selected from anionic and non-ionic surfactants and methods of preparing and using the same to remove stains from dental material including teeth.
Patent TW-200415532-A (TW)
Title: Multi-functional vehicle recognition and management device
Inventor: LIAO LAWRANCE
Filed: 2003-02-26
Abstract: A multi-functional device providing vehicle theft protection, recognition and management add recognition chips inside vehicle and in plate. The two recognition chips are built in with specific comparison code or data. When the comparison codes or data in two recognition chips do not match after comparison, it can be recognized by specific detection equipment, or when the comparison codes of two recognition chips or data do not match, police, security personnel or managing personnel of parking lot can easily perform identity check, violation crackdown, traffic ticket or parking ticket writing by virtue of specific scan detection equipment to significantly increase duty performing efficiency and dramatically lower theft of vehicle or plate impacting on public security and further resulting in grievous crime of society.
Patent TW-200420254-A (TW)
Title: Power-free defogging mirror
Inventor: WU FENG-JUI
Filed: 2003-04-09
Abstract: The invention utilizes warm water or hot water to radiate heat on back side of mirror, solving the serious atomization on mirror in bathing. The product developed by the invention adds a container or tubular radiator on the back side of mirror and let the warm water or hot water in so as to attain the effect of raising the mirror temperature. Therefore, mirror can be kept clear without atomization. This invention also can solve the deadly risk hidden in power supply for operating under a wet environment persistently and hopefully keep the power supply away from the sink. If the product is made in a way of container, it can delay cold or hot water for 3~5 seconds so that the discomfort resulting from the sudden water temperature change (become colder or hotter) when taking a shower.
Patent TW-200401416-A (TW)
Title: Carrier, method of manufacturing a carrier and an electronic device
Inventor: GROENHUIS ROELF ANCO JACOB
IPC: A61K35/747
Filed: 2003-04-11
Abstract: The carrier (30) comprises a first etch mask (14), a first metal layer (11), an intermediate layer (12), a second metal layer (13) and a second etch mask (17). Both the first and the second etch mask (14, 17) can be provided in one step by means of electrochemical plating. After the first metal layer (11) and the intermediate layer (12) have been patterned through the first etch mask (14), an electric element (20) can be suitably attached to the carrier (30) using conductive means. In this patterning operation, the intermediate layer (12) is etched further so as to create underetching below the first metal layer (11). After the provision of an encapsulation (40), the second metal layer (13) is patterned through the second etch mask (17). In this manner, a solderable device (10) is obtained without a photolithographic step during the assembly process.
Patent TW-200423529-A (TW)
Title: Speed control device and method of three-phase brushless DC motor
Inventor: WANG ZHEN-YU
Filed: 2003-04-25
Abstract: The present invention discloses a speed control device and method of three-phase brushless DC motor, wherein the motor speed feedback signal and rotation speed command signal pass through the automatic frequency correction circuit and automatic phase correction circuit to generate frequency error and phase error respectively. An adder is used to add the two errors, and obtains a new control signal through a loop filter computation. The rotation speed feedback signal is processed by frequency-divider circuit, so as to avoid the rotation feedback error. Furthermore, the new control signal generated by the loop filter passes through the pulse width modulator and sequencer to generate the switching signal, so as to control the armature voltage of motor and correct the motor speed, thereby controlling the motor speed.
Patent TW-200422930-A (TW)
Title: Parallel method of flash memory
Inventor: GAN WEE-KUAN
IPC: G06F3/06
Filed: 2003-04-28
Abstract: A parallel method of flash memory is provided. It utilizes multiple independent data buses to move the data in the flash memory. The action principle is that the manager will use multiple page as a unit to take read/write action on flash memory when reading/writing many blocks. Through adopting parallel usage and inter-leave structures, the data movement at the same time period increases several times. The mother-child concept is applied cooperatively, that is, one logic site is owned by two entities, so the manager doesn't need to take move and erase actions repetitively on the flash memory during data writing. Hence the flash memory life is extended and the data write speed is increased. Besides, through the copy-back command, the busy state wait is reduced, so the data movement time is effectively lowered.
Patent TW-200308169-A (TW)
Title: Color conversion device and color conversion method
Inventor: KAGAWA SHUICHI
IPC: H04N1/60
Filed: 2003-05-05
Abstract: In a color conversion device, first color correction amounts are determined from first image data consisting of a plurality of first color data, and second color correction amounts are determined from characteristics information of the first image data is calculated, and the first color correction amounts. The second color correction amounts are added to the first image data, to determine the second image data. The characteristics information is determined by calculating the characteristics information by a calculation using the lightness information and the chroma information of the first image data, so that color conversion reflecting characteristics information including the lightness information and the chroma information of the image is achieved.
Patent TW-200406500-A (TW)
Title: Sputter process and apparatus for the production of coatings with optimized internal stresses
Inventor: HAAG WALTER
IPC: H01J37/34
Filed: 2003-05-22
Abstract: The present invention concerns a process and plant for the production of coating with optimized internal stresses, especially coatings substantially free of tensile stresses. By means of sputter processes in which a bipolar pulsed voltage pattern is produced at the target (cathode), where the positive voltage pulse at the target is set in such a manner as to make it take the place of a bias voltage applied to the substrate.
Patent TW-200411669-A (TW)
Title: Semiconductor memory device
Inventor: IZUTSU TAKASHI
IPC: G11C11/40
Filed: 2003-06-09
Abstract: In a memory cell, the cell ratio between an N-channel MOS transistor as a driver transistor and an N-channel MOS transistor as an access transistor is 1. To the first and second storage nodes, capacitors are connected, respectively. A word line driver receives a voltage obtained by boosting a power source voltage from a boosted power source voltage generating circuit and activates a word line with the boosted voltage. A bit line precharge circuit precharges bit lines to the power source potential when the word line is inactivated in accordance with a signal outputted from a BLPC signal generating circuit.
Patent TW-200407179-A (TW)
Title: Automatic high temperature venting for inflatable medical devices
Inventor: LUCHETTI CYNTHIA
IPC: A61M16/04
Filed: 2003-06-17
Abstract: The disclosed medical device includes an inflatable structure configured for positioning in an airway of a human patient and a valve in fluid communication with the inflatable structure. The valve includes a member that is movable between an open position and a closed position. The valve prevents fluid from escaping the inflatable structure when the member is in the closed position. The valve permits fluid to escape the inflatable structure when the member is in the open position. The valve includes a resilient element. The resilient element provides a first force that biases the member towards the closed position. The valve includes a temperature sensitive element. The temperature sensitive element generates a second force that biases the member towards the open position. The first force is greater than the second force when the ambient temperature is below a first value. The first force is smaller than the second force when the ambient temperature is above a second value.
Patent TW-200502562-A (TW)
Title: Power source detector and detecting method thereof
Inventor: CHEN CHIENG-CHUNG
IPC: G01R31/303
Filed: 2003-07-08
Abstract: A method as well as a circuit for an integrate circuit (IC) automatically self-configuring its data power level at an effective and inexpensive way. The embodiment of the present invention is particularly useful for a Dynamic Random Access memory (DRAM) not to have a preset data power level during its fabrication process.
Patent TW-200413169-A (TW)
Title: Multi-layer product containing polycarbonate
Inventor: GORNY RUDIGER
IPC: B32B27/36
Filed: 2003-07-09
Abstract: A multi-layer product comprising a coex layer and a base layer is disclosed. The coex layer contains a copolycarbonate derived from repeat units having the formula (I), where R1 to R4 are defined and repeat units having the formula (II), where R5 to R8 and X are defined. The base layer contains a polycarbonate characterized in that its chemical resistance is lesser than that of said copolycarbonate. The product is characterized by its improved resistance to chemical attack. Also disclosed are a uses of, and a method for producing the product.
Patent TW-200405243-A (TW)
Title: Display device and driving method thereof
Inventor: YANAGI TOSHIHIRO
IPC: G09G3/20
Filed: 2003-07-29
Abstract: The display device according to the present invention includes an inaction control circuit and a DCK-PLL circuit. The inaction control circuit stops driving of driving circuits, such as a signal line driving circuit, a scanning line driving circuit, analog circuit and the like, which are provided for driving an active matrix panel. The inaction control circuit stops the control circuits in a non-refresh period where all scanning lines become non-scanning state and provided between refresh periods for scanning a screen of the active matrix panel. The DCK-PLL circuit generates a clock signal which is used for taking a data signal into a data signal line in the active matrix panel. The inaction control circuit also stops driving of the DCK-PLL circuit in the non-refresh period, in addition to stopping driving of the driving circuits. On this account, since the DCK-PLL circuit consuming great power is stopped in the non-refresh period, the average power consumption of the refresh period and the non-refresh period can be greatly reduced.
Patent TW-200506758-A (TW)
Title: Method for merging photo frame and picture as digital image
Inventor: Nie peng-ju
IPC: G06T3/00
Filed: 2003-08-12
Abstract: A method for merging a photo frame and a picture as a digital image is provided. First step is to get a picture (or to catch an image) and to input a background image and a frame profile data. Then, going a process of image combination, including to scan the picture's pixels and the background image's pixels, and select one of the picture's pixels or the background image's pixels according to the frame profile data. Therefore, the picture's pixels can be displayed in the frame profile data and the background image's can be displayed out of the frame profile data. The final combination image is the picture merged with the photo frame.
Patent TW-200409012-A (TW)
Title: Information processing apparatus and display device switching method
Inventor: OGURA YOHZOH
IPC: G09G5/00
Filed: 2003-08-21
Abstract: A graphics controller acquires, from an external display device, information which is set in the display device and is required to determine the availability/non-availability of a display switching process, upon reception of a display switching instruction command from a CPU via a graphic memory controller hub. The graphics controller determines based on the acquired information and information of contents, which are to undergo the display switching process and held by the graphics controller, if the display switching process can be immediately executed in the current state.
Patent TW-200405573-A (TW)
Title: Integrated field-effect transistor with two control regions, use of this field-effect transistor and fabrication method
Inventor: KAKOSCHKE RONALD
IPC: H01L29/786
Filed: 2003-08-22
Abstract: Integrated field-effect transistor with two control regions, use of this field-effect transistor and fabrication method. An explanation is given of, inter alia, a field-effect transistor (10) fabricated as a so-called double gate transistor (10) using the SOI technique and the salicide technique. The transistor (10) is suitable for switching voltages of greater than five volts or even greater than nine volts and requires only a very small chip area.
Patent TW-200417157-A (TW)
Title: Active snubber for synchronous rectifier
Inventor: XIONG YA-HONG
IPC: H02M3/335
Filed: 2003-09-23
Abstract: The invention relates to an active snubber for synchronous rectifier. The active snubber is coupled across a synchronous rectifier having a first synchronous MOSFET and a second synchronous MOSFET coupled to a transformer in a power converter. The active snubber includes a series-coupled active switch and first snubber capacitor which is coupled between a drain terminal and a source terminal of the first synchronous MOSFET, a gate driver operative to keep the active switch conducting a specified period of time during a non-conduction interval of the first synchronous MOSFET. The gate driver is composed of an auxiliary winding, a capacitor, and a resistor, where in the auxiliary winding and the capacitor are connected in series and then coupled across the resistor in parallel, which is coupled between a gate and a source of the active switch.
Patent TW-200415095-A (TW)
Title: Access to one or more levels of material storage shelves by an overhead hoist transport vehicle from a single track position
Inventor: TAWYER JEFFREY T
IPC: B65G1/00
Filed: 2003-10-09
Abstract: An improved automated material handling system that allows an overhead hoist supported by a suspended track to access Work-In-Process (WIP) parts from storage locations beside the track. The automated material handling system includes an overhead hoist transport vehicle for transporting an overhead hoist on a suspended track, and one or more storage bins for storing WIP parts located beside the track. Each storage bin is either a movable shelf or a fixed shelf. To access a WIP part from a selected shelf, the overhead hoist transport vehicle moves along the suspended track to a position at the side of the shelf. Next, the movable shelf moves to a position underneath the overhead hoist. Alternatively, overhead hoist moves to a position above the fixed shelf. The overhead hoist is then operated to pick a desired WIP part directly from the shelf, or to place one or more WIP parts directly to the shelf. Once the WIP part is held by the overhead hoist, the overhead hoist transport vehicle moves the WIP part to a workstation or processing machine on the product manufacturing floor.
Patent TW-200420620-A (TW)
Title: Manufacturing method of polymer with sulfoalkyl group
Inventor: HAMADA MASAHIRO
IPC: C08G75/20
Filed: 2003-10-13
Abstract: The present invention relates to a manufacturing method of polymer with sulfoalkyl group, which can be used as an ion exchange resin. More specifically, such method of polymer with sulfoalkyl group is characterized by the leaving group X having side chain (I) of polymer represented by the following formula, (wherein, X represents leaving group, n represents integrate of 0 to 6) is substituted by acylthio group and then oxidized to form sulfonyl group. By this method, the leaving group X in the polymer matrix can be quantitatively converted to sulfonyl group, and the ion exchange resin with high exchange capability is obtainable.