Patent EA-001599-B1 (EA)
Title: Method and device for measuring the rate of flow of a flowing fluid
Inventor: BAZIN ALAIN
IPC: G01F1/66
Filed: 1997-06-30
Abstract: 1. A method for measuring the rate of flow of a fluid, in which two ultrasonic signals consecutively transmitted between two transducers spaced in the direction of flow of the fluid are propagated in opposite directions, each transducer receives a respective ultrasonic signal SIG1, SIG2, characterized in that said method consists of forming clock signals Cki, where i = from 1 to n, and n >= 4, having transition areas and mutually dephased by 2 π/n, comprising fixed-phase relation transitions relative to an excitation signal from the transducers and having the same frequency as this signal, are formed; a selection of characteristic part of a period of the first ultrasonic signal SIG1 received in the first direction of signal propagation; a selection of a first transition of the clock signal, that is produced immediately after the occurrence of said characteristic part; memorising the first clock signal called CLS; determining the time t1 corresponding to the sum over a whole number m of consecutive periods of each of the time lapses between the occurrence of the characteristic part of each of the m periods of the SIG1 signal and the occurrence of the first transition of the CLS signal which follows, identifying similar said characteristic part of each of the m periods of the SIG2, determining the time t2 corresponding to the sum over m consecutive periods of each of the time lapses between the occurrence of the characteristic part of each period and the occurrence of the first transition of the CLS signal which follows; forming the difference /t2-t1/; and deducing therefrom the rate of flow Q, which is proportional / t2-t1/. 2. The method as claimed in claim 1, characterized in that m = 1. 3. The method as claimed in claim 1, characterized in that m  [not equal]  1, and the period on which said characteristic part is chosen corresponds to the first of the m consecutive periods of the first received SIG1 signal. 4. The method as claimed in claim 1, characterized in that m  [not equal]  1, and the period on which said characteristic part is chosen precedes to the first of the m consecutive periods of the first received SIG1 signal. 5. The method as claimed in any one of the preceding claims, characterized in that said method comprises a preliminary conversion of being received SIG1` and SIG2 signals in a square pulse. 6. The method as claimed in claim 5, characterized in that said characteristic parts of periods of being received signals correspond to a mounting front of each impulse. 7. The method as claimed in claim 5, characterized in that said characteristic parts of periods of being received signals correspond to a descending front of each impulse. 8. The method as claimed in any one of the preceding claims, characterized in that the clock signal Cki has a form of square impulses. 9. The method as claimed in claim 1, characterized in that the first clock signal CKi has a form of a mounting front. 10. The method as claimed in claim 1, characterized in that the first clock signal CKi has a form of a descending front. 11. The method as claimed in any one of the preceding claims, characterized in that said method comprises forming respective differences SIG1 - CLS and SIG2 .- CLS between signals to obtain respective signals IEX1 and IEX2, permitting to determine respective times of t1 and t2. 12. The method as claimed in claims 5, 8 and 11, characterized in that the IEX1 and IEX2 have a form of a square pulse, said method comprises an expansion of the summed duration of all impulses to determine respective times of t1 and t2. 13. The method as claimed in any one of the preceding claims, characterized in that the clock signal CKi coincides by the phase with an exitation signal to secure the transducer's excitation. 14. The method as claimed in any one of the preceding claims, characterized in that comprises forming of four CKI clock signals, where m = 1 to 4. 15. The method as claimed in any one of the preceding claims 1 to 13, characterized in that comprises forming of eight CKI clock signals, where m = 1 to 8. 16. The method as claimed in any one of the preceding claims, characterized in that said method comprises forming for each being received signal, SIGs signal, which is dephased relative to the CK1 clock signal. 17. The method as claimed in claim 16, characterized in that the SIGs is dephased by 2 π/n, relative to to the CKI clock signal. 18. A device for measuring the rate of flow of a flowing fluid, comprising, at least, two ultrasonic transducers (T1, T2) spaced in the direction of flow of the fluid,  - means for forming an excitation signal of transducers associated with said transducers, - means for receiving two ultrasonic SIG1 and SIG2 signals, emitted successively and respectively by said transducers in the opposite directions, characterized in that further comprises - means (52,54,56;202-210) for forming n clock signals CKi where i = from 1 to n, and n >= 4, wherein the signals comprise transitions, dephased by 2 π/n, comprising fixed-phase relation transitions relative to an excitation signal from the transducers and having the same frequency as this signal, - means (76,78,80,82; 228-242) for identifying said characteristic part of the first period of being received signal SIG1 and for selection of the first transition of the clock signal CKi which appears immediately after occurrence said characteristic part, said means (76,78,80,82; 228-242) is associated with the means for forming m clock impulses CKi and with the means for receiving two ultrasonic signals. - means for memorising (84,86,88,90;244-258) said clock signal, called CLS, associated with the means for identifying and for selection, - means for determining time t1 corresponding to the sum over a whole number m of consecutive periods of each of the time lapses between the occurrence of the characteristic part of each of the m periods of the signal SIG1 and the occurrence of the first transition of signal CLS which follows, said means is associated with the means for memorising the clock signal and with the means for receiving two ultrasonic signals, - means (76,78,80,82; 228-242) for identifying similar characteristic part over m consecutive periods of the second signal SIG2, being received and associated with the means for forming n clock signals CK1 and with the means for receiving two ultrasonic signals, - means for determining time t2 corresponding to the sum of the time lapses between the occurrence of the characteristic part of each of the m periods of the signal SIG2 and the occurrence of the first transition of signal CLS which follows, said means is associated with the means for memorising the clock signal and with the means for receiving two ultrasonic signals, and - means for forming the difference /t2 -t1/ and deducing therefrom the rate of flow Q, which is proportional / t2-t1/. 19. The device as claimed in claim 18, characterized in that m = 1. 20. The device as claimed in claims 18 and 19, characterized in that the means for forming the clock signals CKi comprising a quartz oscillator (52, 202) with n/2 D-triggers (54,56;204;206,208,210), forming a divider and thus permitting to obtain signals CKi mutially dephased by by 2 π/n. 21. The device as claimed in claims 18 to 20, characterized in that the means for selecting the first transition of the clock signal comprises n D-triggers (76,78,80,82;228-242) "selection", wherein D-input of each of said triggers is connected to a common signal SIG1 and SIG2, while the clock input CK of each of the triggers receiving a corresponding clock signal CKi, which is different for each of said triggers, permits to activate said triggers by inputs of RAZ reset signal so that when said inputs of RAZ reset signal are set "1" and a common signal "1", then said triggers are sensible on the CKi signals. 22. The device as claimed in claims 18 to 20, characterized in that the means for selecting the first transition of the clock signal comprises n logic ports (101,103,105,107), each of which receives a common signal SIG1 or SIG2 via a corresponding input, and n monostable circuits (106,108,109,111), each of them receives different clock signals CKi, and an output signal is transmitted to another input respective one of n logical ports (101,103,105,107). 23. The device as claimed in claims 21 or 22, characterized in that the means for memorising the clock signal CLS comprises, firstly, n memorising D-triggers (84,86,88,90;244-258), each of them receives on the clock input CK a signal from Q-output of the corresponding selection trigger (76,78,80,82;228-242) and, secondly, a logical port "AND NOT" (278), having n inputs, each of them is connected with Q-output of a corresponding memorising trigger, the D-input of each memorising trigger is permanently set on "1", and a first signal received on the clock input CK of one of the triggers (84,86,88,90;244-258) activates its memorising function after which the Q-output of said trigger is set on "1", and its Q-output is set on "0", after which a blocking circuit (84,86,88,90;244-258) is activated providing blocking common signal SIG1 or SIG2. 24. The device as claimed in claim 23, characterized in that each of n logical ports "AND NOT" (92,94,96,98;260-274) receives a clock signal CKi and a signal from the Q-output of the corresponding memorising trigger (84,86,88,90;244-258) to the corresponding inputs, the output of each of the logical port "AND NOT" (100;276), having n inputs, wherein one of n logical ports (92,94,96,98;260-274) liberates the corresponding clock signal CKi, when the memorising function of a corresponding memorising trigger is activated.