Patent GB-1106427-A (GB)
Title: Data processing apparatus
IPC: G06F9/00
Filed: 1965-06-15
Abstract: 1,106,427. Electric digital computers. BARRY WRIGHT CORPORATION. 15 June, 1965 [26 June, 1964], No. 25261/65. Heading G4A. Data signal processing apparatus comprises a source of digital number signals to be processed, a source of operation signals for controlling the processing of the number signals, at least two accumulator registers for storing data comprising number signals and operation signals, means for selectively positioning prescribed ones of the number and operation signals in prescribed ones of the accumulator registers, and means for combining selected ones of the prescribed number signals with selected ones of the prescribed operation signals to provide processed accumulated digital number signals in a first of the accumulator registers. The Specification describes a digital electric computer, having a manually operated keyboard, is used to accept an instruction of the form A + (B) ¸ (C - D x E)F in this form. The keyboard, illustrated in Fig. 2 (not shown) contains digit keys 0-9, CLEAR keys, a PROGRAM MODE switch and several instruction keys including x, ¸, +, -, (, ), =. The arithmetic operations controlled by the appropriate instruction key are carried out in accordance with chart 1 (Fig. 4) mainly in Registers R1, R2, R3, R4 and Buffer Register B (Fig. 1, not shown). The PROGRAM MODE switch has four positions, NORMAL in which the program is carried out manually under the control of the operator who presses appropriate digit or instruction keys according to the equation, LEARN in which the program can be stored for automatic implementation when the AUTO key is pressed (Fig. 2, not shown), BRANCH in which the computer stops on AUTO position at the end of a sequence of designated program steps if and only if the result of the last arithmetic step is zero or positive and STOP in which the computer stops on AUTO position at the end of each selected program regardless of result. A SQUARE ROOT key operates a stored program for the computation using Newton's method of successive approximations. The stored program is contained in a 96 bit storage register, 77 (Fig. 1, not shown) which can thus contain twenty-four 4-bit codes each code being shifted as a new one enters. The layout of 48 bit registers is given in Fig. 3 (not shown). Stores.-During operation numbers may be stored in one of the storage registers 63 (Fig. 1, Fig. 5, not shown), the numbers passing via a BUFFER GATE to selection gates 93-95 and hence to an appropriate register 101-103. Normally the data is re-circulated through the storage registers, but when new data is to be inserted the circulation path is connected via selection gates 104-104 which provide the complement of the signal selected and return the complemented signal to the registers such that it adds with the circulated signal to provide zero. The stored number may be transferred to a buffer via the same gates 104-106 and a Select Function gating means and then back to the same store to preserve a non-destructive readout. The stores may be magnetic core or flip-flop registers. The numbers may be floating point numbers, the calculations retaining the decimal point in the correct position. Operation.-The computer operation is carried out under control of a cycle counter, the counter being capable of producing 28 different states each controlling an operation (Figs. 7, 8, 9, not shown). Each cycle generates appropriate subcommand signals listed in the Specification (numbers 1-78).