baber/WOPTO huggingface dataset:
Patent JP-H0288120-A (JP)
Title: Press fit quality discriminating device
Inventor: KANBARA TAKASHI
IPC: G01L5/00
Filed: 1988-09-21
Abstract: PURPOSE:To collect an improper product accurately discriminating a press fit for whether it is good or bad by receiving an output from each means of detecting a load and a stroke, comparing a press fit load and no-load after completing the press fit respectively with a preset value and discriminating the press fit for whether it is good or bad. CONSTITUTION:In order to press fit a bearing 7 to a hole 3a of a knuckle member 3, a head 6 is lowered by a cylinder 12, closing a limit switch 20 in the upper about 1mm of a lower limit position, here a load data Pm and a load data PM just after completion of press fit are read from a load cell 13 and stored in a memory. Next lifting the head 6, a load data Pn in no-load in the upper limit position is stored in the memory, and a preset load data PMO is compared with the data PM, in case of the normal, a preset load data Pmo is compared with the data Pm. When a press fit load is proper, the no-load data Pn is decided for whether it is O or not, in case of the normal, the press fit is decided to be normal, and conveying the knuckle member 3 to the next station, the press fit is judged to be improper sounding a buzzer when the press fit is decided to be NO in any step.
Patent JP-H04117812-A (JP)
Title: Voltage controlled oscillator device
Inventor: IGAWA KEIICHI
IPC: H03K3/023
Filed: 1990-09-07
Abstract: PURPOSE:To reduce power consumption of a voltage controlled oscillator by providing a digital Schmitt trigger circuit comprising two comparators whose threshold levels differ from each other and a coincidence logic circuit in place of an analog Schmitt trigger circuit to the voltage controlled oscillator. CONSTITUTION:A control voltage is fed from a control voltage input terminal 11 to a gain variable integration circuit 13. An output of the gain variable integration circuit 13 is inputted to a NOT circuit 14 with digital Schmitt trigger circuit. Then an oscillating output obtained from the NOT circuit 14 is outputted from an oscillation output terminal 12 and fed back to the input terminal of the gain variable integration circuit 13. An input voltage is fed from an input terminal 21 of the NOT circuit 14 with digital Schmitt trigger circuit to 1st and 2nd comparators 22, 23. The output of the 1st and the 2nd comparators 22, 23 are fed to an output control circuit 24 having a coincidence logic circuit and its output is fed digitally back to the control circuit 24.
Patent JP-2001059855-A (JP)
Title: Semiconductor integrated circuit and method for arranging terminal for observing power supply voltage in semiconductor integrated circuit to be used therefor
Inventor: IWATA TADASHI
IPC: G01R31/28
Filed: 1999-08-25
Abstract: PROBLEM TO BE SOLVED: To provide a method for arranging terminals for observing a power supply voltage in a semiconductor integrated circuit capable of directly and accurately observing a power supply potential in a semiconductor integrated circuit. SOLUTION: In this semiconductor integrated circuit 1, a VDD power supply wire 10 and GND power supply wire 11 are provided with a VDD observation terminal 30 and GND observation terminal 31 each connected to the VDD power supply wire 10 and GND power supply wire 11 separately from a VDD power supply terminal 20 and GND power supply terminal 21. By observing the terminals of the VDD observation terminal 30 and GND observation terminal 31, voltages in the VDD power supply wire 10 and GND power supply wire 11 in the semiconductor integrated circuit 1 are observed.
Patent JP-S60125422-A (JP)
Title: Disk brake gear
Inventor: KAITO HAROODO FUARUMAA
IPC: F16D65/18
Filed: 1984-11-13
Abstract: Disc brake assemblies (10) include a phenolic piston (16) disposed within a bore (14) of a housing (11), the piston (16) movable relative to said housing (11) in order to engage brake shoe pads (18, 20) with the disc (22) of the brake assembly. An interior seal ring (42) and an exterior boot seal (60) are disposed between the bore (14) and piston (16) in order to prevent contaminants from entering into the bore and damaging the phenolic piston. Located between an annular groove (40) receiving the interior seal ring (42) and an exterior opening (50) receiving one end of the exterior boot seal (60), is a land (70). The land (70) is protected by a corrosion resistant barrier (80) which protects the land from oxidation and subsequent lock-up of the phenolic piston (16), and provides a low friction surface for engagement with the slidable piston.
Patent JP-S6479677-A (JP)
Title: Semiconductor integrated circuit
Inventor: ISHIGURO MASATO
IPC: G01R31/28
Filed: 1987-09-22
Abstract: PURPOSE:To achieve a higher performance of a circuit, by arranging a test terminal, a test terminal processing means, an inverter and the like to eliminate the need for an input processing of the test terminal in normal operation. CONSTITUTION:In normal operation, when no test signal is applied to a test terminal T from outside, an NMOS 41 performs a function of a pull down resistance to turn an inverter 42 to 0 level on the input side thereof. Consequently, the inverter 42 is at 1 level on the output side thereof while an inverter 43 is at a 0 level on the output side thereof turning ON an NMOS 28 and OFF a PMOS 27. Thus, the NMOS 28 and the PMOS 27 perform a function of a pull down resistance and a pull up resistance respectively to allow the avoiding of the situation that a floating occurs at respective input terminals V1N1 and V1N2 into which external signals are inputted. This eliminates the need for a signal processing with respect to the terminal T. On the other hand, in a test, as a specified test signal is applied to the terminal T, MOS elements are all turned OFF thereby properly eliminating effect of the MOS element on the measurement of a current leakage.
Patent JP-S61103124-A (JP)
Inventor: UIRIAMU ARUDEN KUROSURANDO
IPC: C09K19/46
Filed: 1985-10-25
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S61117255-A (JP)
Title: Ferrous sintered alloy for valve seat
Inventor: KADOTA YUKIO
IPC: C22C38/44
Filed: 1984-11-12
Abstract: PURPOSE:To obtain the valve seat having superior wear resistance and low attackability to opposite materials, by dispersing, in a specific weight ratio, the hard particles consisting of Co-base alloy in the iron matrix mainly composed of pearlite. CONSTITUTION:The ferrous sintered alloy for a valve seat is obtained by dispersing, by 5-30% by weight ratio, the hard particles composed of the Co-base alloy consisting of, by weight, 0.5-2% C, 10-20% W, 10-40% Cr, 5-30% Ni, and the balance Co in the iron matrix mainly composed of pearlite. The total composition consists of, by weight, 1-28% C, 0.5-6% W, 0.5-12% Cr, 0.25-9% Ni, 0.4-22.4% Co, and the balance Fe with inevitable impurities, which is infiltrated with 1-20% Pb, if necessary.
Patent JP-S61116879-A (JP)
Title: Method of forming semiconductor pressure converter strain portion
Inventor: YAMASHITA NORIYASU
IPC: G01L7/08
Filed: 1984-11-12
Abstract: PURPOSE:To obtain a strictive portion of uniform thickness by laminating a reverse conductive type layer to low impurity density on the surface of one conductive type Si substrate of high impurity density, forming a strain gauge thereon, and then forming a mask formed on the periphery of the substrate of an SiO2 protective film and an Au protective film including NiCr when etching the center of the substrate until the back surface of the substrate is exposed. CONSTITUTION:An N type Si layer 8a is laminated on the surface of a P<+> type Si substrate 1b, and a plurality of strain gauges 2 are formed on the surface layer. Then, protective films 3, 4 laminated on the periphery of the back surface of the substrate 1b are formed, with the films 3, 4 as masks it is etched to expose only the back surface of the substrate 1b in a pressure converter. At this time, an SiO2 is formed on the film 3, and an Au containing Ni, Cr is used in the film 4, the substrate 1b as an anode, the opposed Pt as cathode to apply a DC voltage thereto. Thus, the protective films holds etching resistance during etching process, and are not separated until the bottom of the substrate 1b is exposed.
Patent JP-2000059554-A (JP)
Title: Information distribution system
Inventor: IKEGAMI MUNEMITSU
IPC: G03G21/00
Filed: 1998-08-10
Abstract: PROBLEM TO BE SOLVED: To provide an information distribution system which can output information such as an advertisement or news distributed from a central management unit for remote diagnosis connected to a copying machine by way of a public telephone line, from the copying machine. SOLUTION: Information such as an advertisement or news connected to a central management unit is regularly distributed to a copying machine. When the copying machine enters copying operation (S21), a CPU reads distribution data from a prescribed RAM area (S23), arranges a picture included in the distribution data or text data in a layout designated beforehand, generates the picture and displays it on an operation panel (S25). If an advertisement picture is not yet distributed from the central management unit immediately after the copying machine is activated, initial data prepared in a prescribed area of an ROM in advance are read (S24), the picture is generated and displayed (S25). When the copying operation is finished, the operation panel is returned to an original display.
Patent JP-H08101153-A (JP)
Title: Odor monitor
Inventor: OKAYAMA YOSHIAKI
IPC: G01N27/00
Filed: 1994-09-30
Abstract: PURPOSE: To provide an odor monitor having excellent versatility, which can display the absolute situation of the atmosphere in environment including distinction as to whether it is reductive or oxidative. CONSTITUTION: The odor monitor is composed of an odor sensor 2 to sense the atmosphere in environment, EEPROM 7 to accommodate information pertaining to the characteristics of the sensor 2, LCD 6 to display the output of the sensor 2, and MPU 4 which computes the information exhibiting the presence of at least the atmosphere in environment on the basis of the output of the sensor 2 and the information of the EEPROM 7 and controls the LCD 6, wherein a minus sign is marked in the display given on the LCD 6 in case where the value of information exhibiting the presence of the atmosphere in environment deflects to the negative side.
Patent JP-2000067397-A (JP)
Title: Road and vehicle communication system for warning of danger
Inventor: MINAKI MASAZUMI
IPC: B60K31/00
Filed: 1998-08-25
Abstract: PROBLEM TO BE SOLVED: To prevent a driver from being troubled by receiving a radio wave generated from a road side antenna by two antennas fitted to the front and rear part of a roof, judging whether the arrival direction of the radio wave is forward or backward from the positive/negative sign of a time difference between the received waves of both the antennas and discriminating a message from a road side system. SOLUTION: Received waves 8, 16 received by an on-vehicle receiving antennas 7b and a 2nd on-vehicle antenna 15 attached to the front and rear parts of the roof of a vehicle have respectively different propagation distances in accordance with the arrival direction of radio waves. The phases of the received waves 8, 16 are different in accordance with the different propagation distances, a case that the phase of the received wave 8 is advanced shows that a road side radio equipment is arranged forward and a case that the phase of the received wave 16 is advanced shows that the radio equipment is arranged backward. In this case a communication control part decodes the contents of a direction judging result 20 and at the time of recognizing that the information is for an opposite lane does not generate useless warning.
Patent JP-H0873445-A (JP)
Title: Production of 1,2,3-triazole
Inventor: KONNO YASUO
IPC: C07D249/04
Filed: 1994-09-06
Abstract: PURPOSE: To easily and safely obtain the subject compound useful as an intermediate for antibiotics, by reaction between a vinyl compound and an azide compound. CONSTITUTION: This compound, 1,2,3-triazole, of formula II is obtained by the reaction between a vinyl compound of formula I ((n) is 1-2; R<1> is a lower alkyl, lower alkenyl or aryl) and an azide compound of formula R<2> -N3 (R<2> is a lower alkyl-substituted silyl or alkali metal) in a solvent (e.g. DMF) in the presence, if needed, of a base (e.g. diisopropylethylamine) at 20 deg.C to the boiling point of the solvent for 10min to 72h. Compared with the conventional method using an explosive, flammable acetylene gas, there is no need of any special equipment or particular safety operation, also obviating the necessity of such a process as to eliminate the substituent(s) from a substituted 1,2,3-triazole derivative, therefore being industrially advantageous.
Patent JP-2000068408-A (JP)
Title: Manufacture of surface mounting circuit board using resin film, and the circuit board
Inventor: UMEDA YASUSHI
IPC: H05K3/38
Filed: 1998-08-25
Abstract: PROBLEM TO BE SOLVED: To provide a manufacture that can readily manufacture a circuit board for surface mounting package and with high yield. SOLUTION: Through-holes 14 are formed in a resin film 11. Subsequently, a predetermined element is adhered in advance in the portion of the resin film 13 where a conductor circuit pattern 12 is formed, then the conductor circuit pattern 12 is formed through plating. Next, the through-holes 14 are filled with a conductor layer through plating. The predetermined element supplies electrons to metal ions which constitute the conductor circuit in the plating bath during plating.
Patent JP-H0794913-A (JP)
Title: Irreversible circuit element
Inventor: DEJIMA HIROMOTO
IPC: H01P1/383
Filed: 1993-09-24
Abstract: PURPOSE:To provide an irreversible circuit element simplified at its manufacturing process, reduced at its cost and improved at its equipotential property by reducing earth impedance. CONSTITUTION:Three center conductors 10 to 12 and an earth conductor 25 are alternately laminated through respective insulator substrates 26 to 28 and the center conductors 10 to 12 are arranged so as to be mutually intersected to form a laminated electrode substrate 5 with four-layer structure.
Patent JP-H03101490-A (JP)
Title: Method and apparatus for picture information transmission
Inventor: OKI JUNICHI
IPC: H04N19/463
Filed: 1989-09-14
Abstract: PURPOSE:To prevent extreme increase in a code quantity with refresh by expressing a refresh line number or a refresh picture element number with less additional information, multiplexing the information onto a picture signal and sending the result. CONSTITUTION:A coder consists of a refresh control circuit 1, a subtractor 2, a quantizer 3, an adder 4, an in-frame prediction device 5, an inter-frame prediction device 6, a switch 7 and a variable length coder 8. In the case of applying periodic refresh, n-line each or n-picture element each of refreshment is implemented and the refresh line number or the picture element number is multiplexed onto a coding signal and the result is sent. Thus, huge increase in the code quantity due to refresh is prevented.
Patent JP-S60130415-A (JP)
Title: Manufacture of pipe
Inventor: TAKAYASU KIYOTERU
IPC: B21D9/04
Filed: 1983-12-17
Abstract: PURPOSE:To obtain a pipe having smooth inner and outer surfaces and subjecting to radial reduction efficiently with simple operation by inserting a bar consisting of a milder material than a pipe stock into the pipe stock and extracting the bar after radially reducing the pipe stock. CONSTITUTION:An Al is used for a bar consisting of a milder material than a pipe stock, and an Nb is used for the pipe stock, and then the Al bar is inserted into the pipe stock of Nb with a gap in reserve. Then, after several times of raductions by a swaging machine, etc., an Nb pipe having a prescribed diameter is obtained by extracting the Al bar. The obtained Nb pipe has smooth outer and inner surfaces.
Patent JP-S6392170-A (JP)
Title: Vertical synchronizing circuit
Inventor: NAKAMURA MASAHIKO
IPC: H04N5/05
Filed: 1986-10-06
Abstract: PURPOSE:To detect a vertical synchronizing signal even at a weak electric field by forming a signal for indicating the detection range of the vertical synchronizing signal from a vertical output pulse and adjusting the time position only of the trailing edge of this signal. CONSTITUTION:When an input 1 is inputted, a transistor TR2 is interrupted when the input 1 goes to low, the collector of the TR2 is opened. Since one of a variable resistance 3 is connected to a power source Vcc, the voltage waveform of a node 9 goes to a signal (b) in an integration circuit consisting of the resistance 3 and a capacitor 4. A comparator 5 compares the inputs at a certain threshold level VTH, at the time of the input lower than the VTH, an output goes to High, on the contrary, at the time of the input higher than it, the output goes to Low. Accordingly, the output has a waveform (c). The waveform (c) and a signal (d) are inputted to an AND circuit 7, thereby, a pulse (e) is outputted to an output terminal 8.
Patent JP-S6481966-A (JP)
Title: Carrier for binary dry developer
Inventor: ASAHINA YASUO
IPC: G03G9/113
Filed: 1987-09-25
Abstract: PURPOSE:To form an image high in quality by coating the surface of each carrier particle with a releasable resin containing a white type conductive agent or not and specifying intrinsic resistivity of the carrier. CONSTITUTION:The surface of each carrier particle is coated with the releasable resin containing the white type conductive agent or not, and the intrinsic resistivity of the carrier is controlled to 4.5X10<3>-1.5X10<16>OMEGA.cm when a DC electric field of 50V/cm is applied, and to 1.5X10<8>-9.5X10<15>OMEGA.cm when 100V/cm is applied. Such a severe regulation of the resistivity permits an image to be given a proper edge effect and made sharp, and accordingly, a high-quality image to be obtained.
Patent JP-H0687300-A (JP)
Title: Decorative film
Inventor: TANAKA HIROSHI
IPC: B32B3/30
Filed: 1992-09-07
Abstract: PURPOSE:To display the effects of a profundity-rich uneven pattern or a pattern with ink filled in an uneven area in a satisfactory manner. CONSTITUTION:An uneven pattern is formed using an embossing technique on the surface 2a of a base film consisting of thermally plastic resin, and the recessed part 3 of the uneven pattern is filled with ink 5 containing thermally plastic resin as a binder. Further, the recessed part 3 is slightly restored to its original shape, and a transparent film 6 with a pattern-printed layer 7 formed on the rear 6b is attached to the surface 2a, of the base film 2, after the ink 5 is injected into the surface 2a to obtain a decorative film 31. The surface 6a of the resin film 6 can be coated.
Patent JP-S6299851-A (JP)
Title: Data converting device
Inventor: SHIBATA YOSHIHISA
IPC: G06F13/12
Filed: 1985-10-25
Abstract: PURPOSE:To reduce the quantity of hardware by providing a pair of registers, a byte position counter, a selector and a combination circuit to convert data transferred every byte into the byte data of different numbers of bits. CONSTITUTION:A register 101 (REGA) and a register 102 (REGB) set 8-bit input data alternately. A selector 104 selects the outputs of both registers 101 and 102 in the form of combination REGA/B or REGB/A according to the value of a byte position counter 103 and produces and delivers 16-bit data. A combination circuit 105 extracts the data of consecutive 9 bits starting at the bit position designated by the value set at the counter 103 out of the output of the selector 104 and delivers it. The counter 103 counts up to 9-1=8 since the quotient obtained by dividing the least common multiple 72 between the bit number 8 of the input data byte and the bit number 9 of the output data byte is equal to 9. Thus the counter 103 is reset to 0 after 8.
Patent JP-H1083835-A (JP)
Title: Manufacture of non-aqueous electrolytic secondary battery
Inventor: SUZUKI TAKASHI
IPC: H01M10/0566
Filed: 1996-09-10
Abstract: PROBLEM TO BE SOLVED: To cause no energy density decrease, make no need of lithium storing process before battery assembly, avoid taking a long time for manufacture, and make usable immediate after battery assembly in the case a non aqueous electrolytic secondary battery comprising a cathode containing lithium, an anode of a carbonaceous material, and a non-aqueous electrolytic liquid is manufactured. SOLUTION: A lithium storing process carried out by immersing and passing the anode 2 in and through a solution produced by dissolving lithium in a solvent and then evaporating the solvent is employed as a prior process to a rolling process to spirally roll a cathode 1, an anode 2, and a separator 3 sandwiched between these electrodes. Consequently, lithium is stored in the carbonaceous material of the anode 2 and lithium equivalent to irreversible capacity caused in the anode 2 can be supplemented.
Patent JP-H08141402-A (JP)
Title: Catalyst for production of tertiary n-alkenylcarboxylic acid amide and production of tertiary n-alkenylcarboxylic acid amide
Inventor: SHIMAZAKI YOSHIHARU
IPC: B01J23/02
Filed: 1995-08-25
Abstract: PURPOSE: To continuously and efficiently produce tert. N-alkenylcarboxylic acid amide from tert. N-(2-hydroxyalkyl)carboxylic acid amide without using any subsidiary starting material. CONSTITUTION: When tert. N-(2-hydroxyalkyl)carboxylic acid amide is brought into a vapor phase intramolecular dehydration reaction to produce the objective tert. N-alkenylcarboxylic acid amide, a catalyst made of an oxide contg. an alkali metal and/or an alkaline earth metal and silicon is used.
Patent JP-H0580137-A (JP)
Title: Probe for squid
Inventor: UEDA MASAYUKI
IPC: G01R33/035
Filed: 1991-09-19
Abstract: PURPOSE:To decrease the amount of gas helium generation, suppress vibration due to gas passage, and reduce noise by forming each signal line connecting a superconductive quantum interferential element SQUID to a measuring circuit from a thin film conductor on a printed circuit board, and accomplishing a stratified twist pair structure. CONSTITUTION:Six signal lines connecting a SQUID element with a measuring circuit are formed from a conductive thin film wiring 4 on a printed circuit board 1, and three sets of twist pairs. That is, a plurality of substratum conductors 41, 41,... inclined in a specific direction are formed parallelly on the surface of the circuit board 1. Over it an insulative film 42 is formed, and thereover superstratum conductors 43, 43... are formed. The ends of these substrate and superstrate 41, 43 are connected with one another by contact holes 44, 44... penetrating the insulative film 42. The section areas of the wiring 4 and circuit board 1 can be lessened to a great extent, and the accomplished twist pair structure allows precise alignment of its loop areas. Accordingly heat influx from the ambient temperature lesser to a great extent to permit lessening of influence of the magnetic field on the signal lines.