baber/WOPTO huggingface dataset:
Patent JP-S6270749-A (JP)
Title: Fet sensor and its preparation
Inventor: SAKAI TADASHI
IPC: G01N27/414
Filed: 1985-09-25
Abstract: PURPOSE:To attain to prolong the life of the titled FET sensor, by supporting the responsive substance of the responsive layer of the FET sensor by an inorg. porous body. CONSTITUTION:A responsive layer 5 such as an ion responsive layer, an immobilized enzyme layer, a gas permeable layer, an immobilized bacteria layer, an ion non-resposive layer or an electrolyte layer is arranged on the insulating layer 4 of the gate part of FET to constitute a chemical sensor. At this time, by constituting the responsive layer 3 of a layer wherein a responsive substance is supported by an inorg. porous body, the adhesiveness with the insulating layer 4 is enhanced and the release of the responsive layer 5 is prevented and long life and stable characteristics are obtained.
Patent JP-H1096088-A (JP)
Title: Etchant, and surface roughening method for copper
Inventor: MORIKAWA YOSHIHIKO
IPC: C23F1/18
Filed: 1997-07-22
Abstract: PROBLEM TO BE SOLVED: To form a roughened surface excellent in acid resistance on the surface of copper, by specifying components contained in an etchant. SOLUTION: The etchant contains an oxo acid expressed by the formula or its derivative and a peroxide or its derivative as principal agents and an azol and a halide as additives. In the formula, X represents S, P and N, (m) represents integers of >=0 and (n) represents integers of >=1. For example, sulfuric acid as the oxo acid, hydrogen peroxide as the peroxide, sodium chloride as the chloride and benzotriazol as the azol are blended. By using the etchant, the roughened surface having deep recessed part and insoluble in acid is formed on the surface of copper. Then in the succeeding laminating process, an outer layer material such as a resin is strongly adhered on a copper electric conductive pattern. And copper oxide or the like is not generated and at the time of electroplating after forming a through-hole, the defect such as a pink ring is never generated.
Patent JP-H0373937-A (JP)
Title: Back projection type stereoscopic video projection televiation
Inventor: YOSHII MASAKI
IPC: G03B21/62
Filed: 1989-08-16
Abstract: PURPOSE:To improve the stereoscopic feeling of a video by using such a Fresnel lens sheet that the mean birefringence in the plate thickness section of the Fresnel lens sheet satisfies a specific condition. CONSTITUTION:The subject projection television is constituted by using the Fresnel lens sheet 2 whose mean birefringence  n in the plate thickness section satisfies expression 1, where (t) is the thickness of the Fresnel lens sheet 2, lambdais the wavelength of light transmitted through the Fresnel lens sheet 2, and theta1 is the angle of refraction after the incidence of light on the Fresnel lens sheet 2. Consequently, the polarization deviation of image light 3 which is already polarized due to the birefringence presenting in the plate thickness section of the Fresnel lens sheet 2 constituting a screen can be suppressed below a specific value as a phase difference, so the video light 3 which is polarized circularly to the right or left or polarized horizontally or vertically so as to obtain a stereoscopic video can be projected on the screen. Consequently, the video which provides stereoscopic feeling can be observed.
Patent JP-S6188611-A (JP)
Title: Oscillating circuit
Inventor: ISHIKAWA HIROYUKI
IPC: H03K3/0231
Filed: 1984-10-06
Abstract: PURPOSE:To obtain a stable output against the fluctuation of the power supply voltage by using the Zener voltage to limit the input voltage of an output transistor of a voltage comparator. CONSTITUTION:Output transistors (TR) 313 and 314 are connected complementally to each other for constitution of a comparator. The anode side of a Zener diode 315 is connected between the base of the npn TR313 of an output stage 3c an the earth so that said anode side is set at the earth side. In addition, the cathode side of a Zener diode 316 is connected between the base of the pnp TR314 of the stage 3c and the earth so that said cathode side is set at the earth side. Thus it is possible to keep a fixed ratio for the output of the comparator between the positive and negative voltage periods even to the fluctuation of the power supply voltage.
Patent JP-H09117290-A (JP)
Title: Recombinant alveolus surface active protein
Inventor: JIEEMUZU DABURIYU SHIRINGU
IPC: C12N15/85
Filed: 1996-08-08
Abstract: The complete coding sequence and amino acid sequences for both canine and human 10K alveolar surfactant proteins (ASP) are disclosed; clones encoding variants of the SP-18 and SP-5 forms of human protein are disclosed. Methods and vectors for obtaining these proteins in recombinant form are also described. An improved method for purification of the 32K protein takes advantage of its carbohydrate affinity.Pharmaceutical compositions in the treatment of respiratory deficiency syndromes use the 10K proteins with or without the 32K form.
Patent JP-H0662575-A (JP)
Title: Active filter
Inventor: GOTO MOTOOMI
IPC: H02M3/155
Filed: 1992-08-06
Abstract: PURPOSE:To provide an active filter which can increase a current transmission efficiency of a circuit and can provide a desired output voltage level. CONSTITUTION:The full-wane rectified output is divided into two systems and then active filters 10-1, 10-2 installed for the systems respectively turn on and off alternately on switching signals PW1, PW2 which are output from phase controllers 13-1, 13-2 and thereby the full-wave rectified voltage and the input current become in phase with each other. An output voltage level is set at the reference voltage by controlling a pulse width of the switching signals PW1, PW2 which command the on/off operation. Therefore, a desired output voltage level can be attained while increasing a current transmission efficiency.
Patent JP-H0554092-A (JP)
Title: Logical simulation device
Inventor: KOMOTA MICHIO
IPC: G06F17/50
Filed: 1991-08-22
Abstract: PURPOSE:To obtain a logical simulation device equipped with a wiring load extracting function which can calculate the characteristic data of the wiring load with good accuracy even when the wiring interval is narrow. CONSTITUTION:Wiring layout data D10 are converted into wiring load model circuit data D12 to prepare the wiring load model at respective divided wiring areas divided based on the difference in the number of adjoining wirings by a wiring area dividing part 1 and a wiring load model preparing part 3. A wiring load distribution constant calculating part 4 extracts the characteristic parameter in accordance with the number of the adjoining wirings of respective wiring load models of the circuit data D12 from a unit length wiring characteristic parameter group D13 composed of respective different characteristic parameters corresponding to the number of the adjoining wirings, and outputs distribution constant circuit data D14 to obtain the characteristic data of respective wiring load models based on the characteristic parameter and the wiring length of respective wiring load models. Thus, the characteristic data of the wiring load can be calculated with good accuracy.
Patent JP-S60103447-A (JP)
Title: X-y plotter
Inventor: NAKAZAWA YOSHIO
IPC: G06F3/13
Filed: 1983-11-09
Abstract: PURPOSE:To ensure a smooth shift to an X-Y plotter and at the same time to shorten the positioning time of an original point, by performing the uniform motions at a comparatively high speed to position the original point. CONSTITUTION:A control circuit 12 delivers a uniform motion instruction of a comparatively high speed to drive circuits 13 and 14 respectively with an initial set instruction for shifts of a sufficiently long distance in both directions -X and -Y. When a record pen reaches a prescribed position with said uniform motion instruction, both X and Y axis sensors 8 and 10 detect the shift of the record pen and stops the actuations of X and Y axis drive circuits 13 and 14. Then the circuit 12 delivers an instruction for microstep shifts of the record pen in both directions +X and +Y. When the record pen gets out of the sensing areas of both sensors 8 and 10, the circuit 12 delivers a stop instruction for microstep drives. Then an X-Y plotter starts its actuation with the stopped spot of the microstep drive defined as an original point.
Patent JP-2000047556-A (JP)
Title: Production of article having light diffracting structure
Inventor: AONO TAKASHI
IPC: B42D15/10
Filed: 1998-07-27
Abstract: PROBLEM TO BE SOLVED: To provide the production method of article having light diffracting structure with which an article is provided with a light diffracting structure performing the display of picture patterns or the like or recording of characters or images through the radiation of laser beams onto the light reflecting layer of the light diffracting structure without exerting any adverse influence caused by the heat of laser beams upon an object to be transferred. SOLUTION: Concerning the production of article having light diffracting structure with which a light diffracting structure forming layer 4 and a light reflecting layer 5 are transferred on the article while using light diffracting structure transfer foil constituted by laminating the light diffracting structure forming layer 4 and light reflecting layer 5 on a support 1, one part of the light reflecting layer 5 is destroyed by irradiating the light diffracting structure transfer foil with laser beams 10 before transferring the light diffracting structure forming layer 4 and light reflecting layer 5 to the article.
Patent JP-S6096948-A (JP)
Title: Interface means
Inventor: MAIKERU FURANSHISU KENPU
IPC: H04Q11/04
Filed: 1984-10-09
Abstract: An interface scheme is described which allows relatively convenient interconnection of, and re-configuration of, circuits for performing operations to digital signals from a bus. In one exemplary embodiment, a parallel bus (102), eight bits wide, having 320 channels per frame is provided. For each circuit (119) to be connected to the parallel bus a connection memory (106) and an input/output buffer (103) is provided to control the accessing of the parallel bus by each circuit.
Patent JP-S6453352-A (JP)
Title: Method for destroying and erasing optical disk information
Inventor: YASHIRO TORU
IPC: G11B7/00
Filed: 1987-08-24
Abstract: PURPOSE:To destroy and erase recording information in a short time, by spraying substance which shows responsiveness or solubility for a recording layer in a gaseous state or atomizing state in a space part between optical disk substrates, and making it bring into contact with the recording layer. CONSTITUTION:The recording layers 3 are formed in the internal planes of a pair of disk substrates 1, 1, and they are adhered sandwiching outside spacers 2, 2 and inside spacers 2', 2'. Chemical substance which shows the responsiveness or the solubility for the recording layer is introduced in the space part between the substrates via a spray nozzle 6 by spraying. Such chemical substance is brought into contact with the recording layer 3, and is destroyed in a state impossible to be regenerated. In such a way, it is possible to erase all information recorded on an optical disk in a short time and to destroy is unregenerately.
Patent JP-S6188232-A (JP)
Title: Optical and circuit
Inventor: INOUE NAOHISA
IPC: G02F3/00
Filed: 1984-10-08
Abstract: PURPOSE:To obtain the most basic optical AND circuit by providing the 1st light guide to which the 1st input light signal is inputted and at least the two 2nd light guides to which at least the two 2nd input light signals are inputted. CONSTITUTION:The light guides 11 and 12 guides two input light signals IinA and IinB to be ANDed optically. Those light guides 11 and 12 are formed from one end of a substrate 10 almost to the center of the substrate 10 and photoelectromotive force elements 31 and 32 are formed at end terminal parts of the light guides 11 and 12. The photoelectromotive force elements 31 and 32 use, for example, CdTe preferably. The distribution of light in the light guide 11 extends even to the photoelectromotive force element 31 only by vapor- depositing CdTe on the light guide 11 merely, so electromotive force is generated by the photoelectromotive force element 31. Thus, the optical AND circuit as the most basic logical circuit is obtained.
Patent JP-H0633546-A (JP)
Title: Reinforcement for building panel
Inventor: KAMAKURA KUNITOSHI
IPC: E04C2/38
Filed: 1992-07-15
Abstract: PURPOSE:To increase the strength and facilitate the installation work by forming a cross sectional area comprising reinforcement sections laid between the opposed long sides of a almost closed rectangular structure, and further providing a hole corresponding to a setscrew for fastening a reinforcement to the rear end of a building panel. CONSTITUTION:Reinforcement sections 15 are laid between the opposed long sides 13 and 14 of an approximately closed and rectangular structure 12. Also, holes 15 are formed in such a way as corresponding to setscrews for fastening a reinforcement 11 to the rear end of a building panel. According to this construction, the use of an attachment or the like is not required in providing the reinforcement 11 on the rear side of a building panel and, therefore, an installation work becomes easy. Also, strength increases, due to the existence of approximately closed and rectangular cross section.
Patent JP-S6369723-A (JP)
Title: Production of glass tube
Inventor: IKEJIRI MASAHISA
IPC: C03B37/016
Filed: 1986-09-08
Abstract: PURPOSE:To mass-produce a glass tube having good straightness and good surface condition for a short time, by dipping a molded gel having a tube shape into a specified liq., subjecting to aging and thereby improving the yield on a drying stage. CONSTITUTION:The tube-shaped gel is obtained by adding alkali to a sol prepared with mixing alkali silicate, a hydrochloric acid and a fine powdery silica, adjusting pH, pouring into a cylindrical container and gelling. Next, the tube- shaped gel is dipped in the liq. contg. the component of dispersion medium of sol (e.g. an aq. soln. of ethyl alcohol), aging at the higher temp. than the temp. for drying, then drying and sintering.
Patent JP-H04102549-A (JP)
Title: Loading pallet
Inventor: UESUGI SADASUKE
IPC: B65D21/02
Filed: 1990-08-08
Abstract: PURPOSE:To obtain a loading pallet, which has durability and does not become bulky even if may pallets are piled up, by bend-forming rectangular steel plates into an integral body and by including a horizontal rectangular flat-plate main body, legs swollen in the manner of tapering from the top surface to the under surface side in the vicinity of four corners of the main body and a curled part formed in the periphery of the main body. CONSTITUTION:In the subject pallet, rectangular steel plates are bend-formed into an integral body by a press and molding metal tool, and the pallet has a horizontal rectangular flat-plate main body 1, eight legs 2 distributed in the vicinity of four corners of the main body and in the intermediate between said corners and swollen in the manner of tapering from the top surface to the under surface side and a curled part 3 formed in the periphery of the main body in the manner of bending downward. The fork of a forklift enters between the legs 2 from four directions toward respective sides of the pallet. A spacer 4 almost equal in height to the curled part 3 is mounted to the under surface of the central part of the main body 1 by burring and caulking and the eave trough of the spacer 4 is adjustable in height by elastic deformation. When pallets are piled up, the intermediate part of the main body 1 bends downward so that the pallets are prevented from sticking each other and are easy to separate one by one.
Patent JP-H0874139-A (JP)
Title: Automatic knotting apparatus for harness
Inventor: NISHIMURA MICHIYOSHI
IPC: D03C3/40
Filed: 1994-09-05
Abstract: PURPOSE: To reduce labor for knotting a harness by enabling the direct knotting of the harness on a heald with constant tension while easily and speedily arranging the knotting position. CONSTITUTION: This automatic knotting apparatus for harness is composed of a rod-shaped heald holder 3, a harness-holding hook 4 and a harness tensing apparatus 6. The heald holder 3 has a roughly U-shaped recessed part on the upper end. The heald holder 3 holds a heald 2 along a longitudinal direction of the holder and is movable in vertical direction and rotatable around a longitudinal axis. The harness-holding hook 4 has a hook member 4B which has a U-shaped tip and placed in a cylindrical tube 4A. The hook member 4B is freely coming out and retreating from the front end of the cylindrical tube 4A which is freely movable in the longitudinal direction and can be inserted through a hole at the upper end of the heald 2 held by the heald holder 3 and the roughly U-shaped recessed part of the heald holder 2.  The harness-tensing apparatus is provided with chucking means 6a, 6b for the harness 1 and freely movable in vertical direction.
Patent JP-H0939312-A (JP)
Title: Printer, printing method and printing mechanism
Inventor: TODA MASANARI
IPC: G06F3/12
Filed: 1995-07-27
Abstract: PROBLEM TO BE SOLVED: To shorten the developing and drawing processing time of the intermediate language registered in an overlay by holding developed image data when the size of image data is smaller than the sum total size in the intermediate language. SOLUTION: A PDL code 201 is analyzed in the order sent according to a PDL analyzing program and converted to intermediate language to be stored in an intermediate language memory buffer 202. When an overlay registration start command 2011 is read, the intermediate language formed until an overlay registration completion command 2012 comes is stored in a file system 106. When the compression command 2012 is read, groups are formed based on the overlap degree of the stored intermediate languages and a combination of the intermediate languages wherein a size rasterized in a group unit becomes smaller than the total size of the intermediate languages is found. The intermediate languages contained in the groups are rasterized using a page buffer 107 to be re-registered in the file system 106 as intermediate languages.  By this constitution, each of the intermediate languages can be made small.
Patent JP-S60104828-A (JP)
Inventor: FUORUKAA HERUTERU
IPC: F16F9/46
Filed: 1984-10-08
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0765232-A (JP)
Title: Merchandise sale registration data processor
Inventor: MATSUSHITA KUNIO
IPC: G07G1/00
Filed: 1993-08-26
Abstract: PURPOSE:To speedily and easily stick a cellophane tape on a main body cover without spoiling the beauty of the outward appearance of the cover member by forming a partial cover member of one of a member which has a cellophane tape unit attachment/detachment part and a member which does not have it. CONSTITUTION:When a cellophane tape unit 31 is used at the food counter, etc., of a supermarket, the partial cover member is formed of a 1st member 20A and mounted on the main body cover 1. Then the cellophane tape unit 31 is fitted to the unit attachment/detachment part 21 of this member 20A. When the main body cover 1 is installed at a counter where the cellophane tape unit is not used, the partial cover member is formed of a 2nd member 20B and mounted on the main body cover 1. The 2nd member 20B has no unit attachment/detachment part, so its external surface can be formed without any sense of incongruity with other main body cover parts, and the beauty of the outward appearance of the main body cover 1 is never spoiled.
Patent JP-H0532096-A (JP)
Title: Recording device using pencil pen
Inventor: YUMOTO KAZUHIKO
IPC: B43L13/00
Filed: 1991-07-29
Abstract: PURPOSE:To supply leads assuredly with a simple structure by a recording device equipped with a lead supply device, wherein a lead chuck mechanism is provided in a lead storing receptacle, and hold releasing operations are performed by the mechanism successively so as to extend gradually a pencil lead in the lead storing receptacle. CONSTITUTION:A pencil lead supply device provided in a recording device comprises a pen block 1 for holding a pencil pen 7 on its moving pen holder 11 and moving on a medium (not shown in the figure) in a predetermined direction so as to perform a desired plotting, and a rotatable storage pen holder 2 for holding a plurality of recording pens including the pencil pen 7 reciprocally by cooperating with the moving pen holder 11. There are also provided a lead supply holder 42 capable of holding the pencil pen 7 reciprocally by cooperating with the storage pen holder 2 and a lead supply carriage 41 movable along a rail 43. Along the moving direction of the carriage 41, a lead storing receptacle holder 5 having a plurality of lead storing receptacles 51-54 and a lead discharging mechanism 6 for removing unnecessary leads of the pencil pen 7 are provided.
Patent JP-S58109575-A (JP)
Title: Bonding method
Inventor: TSUMATOU TERUO
IPC: C09J7/00
Filed: 1981-12-23
Abstract: PURPOSE:To form a bonded composite material having good adhesion over a temperature range of room temp. to 200 deg.C, by interposing a thin film composed of an arom. polysulfone between adherends and pressing them with heating. CONSTITUTION:An arom. polysulfone having a reduced viscosity of 0.3 (1g of polymer/ 100cm<3> of dimethyl formamide at 25 deg.C) and contg. 0.2 or less hydroxyl groups attached to arom. ring / 100 polymer repeating units, is molded into a thin film of 20-400mu in thickness by extrusion or injection molding. Then the  thin film is interposed between adherends and heated at 250-400 deg.C, while pressing them from both sides by means of a vise, to bond both adherends to each  other.
Patent JP-H0962409-A (JP)
Title: Leak current processing circuit and information processor with same
Inventor: KOGURE KAZUYA
IPC: G06F1/26
Filed: 1995-08-21
Abstract: PROBLEM TO BE SOLVED: To securely protect an operating circuit, etc., of the information processor against a leak current. SOLUTION: A diode D<1> for reverse current prevention is provided between the 1st power line 11 and 2nd power line 13 of the processor to prevent the leak current from flowing from an I/F connector 10 the 1st power line through a PullUp resistance RP. The 2nd power line 13 is connected to the I/F connector 10 through the PullUp resistance RP and to this 2nd power line 13, a leak current discharging circuit 18 which discharges the leak current flowing in from the I/F connector 10 and a stand-by circuit are connected. When the leak current is small, the entering leak current is discharged to a ground power source through voltage dividing resistances R1 and R2. When the leak current is large, a transistor TR1 has its gate connected between the voltage dividing resistances R1 and R2 turns on and a transistor TR2 turns on in response.  Consequently, the entering leak current is made to flow out of the transistor TR2 to the stand-by circuit.