baber/WOPTO huggingface dataset:
Patent JP-H02260238-A (JP)
Title: Production of magnetic recording medium
Inventor: NAMIKI TAKEMASA
IPC: G11B5/845
Filed: 1989-03-31
Abstract: PURPOSE:To obtain the magnetic field orientation sufficient for a magnetic tape by adjusting the evaporation from laminated constituting layers and the diffusion between the laminated layers to be applied in double layers and specifying the volume of the coating compd. in the recipe unit of the applied magnetic layer coating compd. within a specific range. CONSTITUTION:The laminated constituting layers including the magnetic layer are provided on a nonmagnetic base. The magnetic layer coating compd. in which the magnetic particles have an axial length ratio (r) and which has the recipe volume V occupying the total volume nu in the recipe and the constituting layer coating compd. are applied on the base. The evaporation of the coating compd. solvent form the laminated constituting layers and the diffusion between the laminated layers applied in the double layers are adjusted to maintain the volume V of the coating compd. in the recipe unit of the applied magnetic layer coating compd. within the range expressed by equation I in the orienting magnetic field position. The magnetic tape which is adjusted in the magnetic field orientation of the magnetic layer and has good S/N characteristics is obtd. in this way.
Patent JP-S58201219-A (JP)
Inventor: ISHIKAWA MASAHIDE
IPC: H01H51/06
Filed: 1982-05-19
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H11282686-A (JP)
Title: Network computer system
Inventor: KAWABATA RITSUKO
IPC: G06F15/16
Filed: 1998-03-30
Abstract: PROBLEM TO BE SOLVED: To provide technology for executing an application to be loaded and executed in a comfortable operation environment on a client terminal without having a user be conscious of the constitution of hardware or the operating condition of the application. SOLUTION: A program server device 120 receiving a program loading request from a client terminal 110 automatically selects an optimum program capable of realizing an executable operation environment required by a user from execution time priority information set up in each user about the machine constitution information of the terminal 110 and elements for determining a program execution environment and transfers the selected program.
Patent JP-S62271463-A (JP)
Title: Charge coupled semiconductor device
Inventor: FUKUDA TADAHARU
IPC: H04N5/335
Filed: 1987-04-03
Abstract: PURPOSE:To obtain a light-weight information processor having high resolution and high sensitivity by dividing a two-dimensional optoelectric transfer section with an optoelectric transducing layer and a time series signal conversion section into two and forming the optoelectric transducing section and the time series signal conversion section through a thin-film technique between an X row electrode and a Y row electrode. CONSTITUTION:With a time series signal conversion section 6, to which electric signal groups outputted from each of n-optoelectric transducers 29 for a two-dimensional optoelectric transducing section 1 are inputted in parallel and from which the electric signal groups are outputted in series, an insulating layer consisting of SiO2 is shaped to one part on a P-type silicon layer 25, isolated and independently formed n-transfer electrodes 27 are shaped onto the layer 26, an N<+> type silicon layer 28 is formed into the layer 25, and electrodes 30 connected at 1:1 by conductors 31 at each row electrode shaped at each optoelectric transducer 29 are formed onto the layer 28. Optoelectric transducing layers 32 are shaped among row electrodes Y and line electrodes X in the transducing section 1, and the transducing section 1 and the conversion section 6 are formed through a thin-film technique.
Patent JP-S5417854-A (JP)
Title: Thermal head
Inventor: ODA TAKASHIGE
IPC: B41J2/345
Filed: 1977-07-11
Abstract: PURPOSE:To obtain the thermal head provided with both advantages of thin film and thick film by loading a single resistance alley of thin film formed on a separate insulating substrate on another thick film substrate and wiring them together.
Patent JP-H05172907-A (JP)
Title: Circuit device for testing integrated circuit
Inventor: YOOZEFU HERUTSURE
IPC: H03K17/62
Filed: 1992-03-04
Abstract: PURPOSE: To flexibly execute a test by applying a signal to be tested to the input terminal of an OR circuit and applying a selection signal to the other input terminal of the OR circuit and guiding the output signal of an AND circuit to the output terminal of an integrated circuit. CONSTITUTION: The emitters of three transistors 10-12 connected mutually through emitters are connected to the collector of a fourth transistor 13 and the emitter of the transistor 13 is connected to the terminal of a first voltage supply source VEE through a resistor 14. The collectors of two transistors 10, 11 among the transistors 10-12 are connected to a second voltage supply source VCC. The base terminals of the transistors 10, 11 are the selection signal terminal 6 and test signal terminal 5 of an OR circuit 1. The collectors of the third transistors 12, 15 connected through emitters of both OR circuits 1, 2 are mutually connected and further connected to the terminal of the voltage supply source VCC of the OR circuit 2. The base terminals of transistors 12, 15 and 13, 18 are respectively connected to third and forth supply potentials V1, V2.
Patent JP-H02261218-A (JP)
Title: Digital integrated circuit
Inventor: ISHIDA KENJI
IPC: H03K17/04
Filed: 1989-03-31
Abstract: PURPOSE:To realize high speed logic operation by inserting a passive element in series with a switching transistor(TR) of a digital integrated circuit. CONSTITUTION:Passive elements L1, L2 being inductive components are inserted to MESFETs Q1, Q2 as switching TRs so as to constitute the resonance circuit in the cut-off frequency region of the circuit. Thus, the high frequency characteristic of the gain is improved and a capacitor CS includes all stray capacitance of the circuit such as wire. The output impedance at a high frequency is decreased by the presence of the capacitor CS and the gain is reduced. The inductance LP of the passive element is connected in parallel with the capacitor CS to constitute the parallel resonance circuit and the output impedance is increased at the cut-off frequency region of the circuit and the logic operation at high speed is realized in which the reduction of the gain is guaranteed.
Patent JP-H04223002-A (JP)
Title: Omunidirectional impact absorption type lamp mounting device
Inventor: BUANAKAN TATABOOSHIAN
IPC: F21S8/00
Filed: 1991-03-22
Abstract: PURPOSE: To provide a lamp mounting device damping a shock omnidirectionally by supporting a lamp by means of an elastic mounting part and applying a pressure from the rear end face of the lamp. CONSTITUTION: When a rubber ring 16 fitted in a glass tube 12b in a lamp 12 is positioned inside a counterbore hole in a recess part concentrical with a hole arranged in a reflection board 4d, the lamp 12 is fixed in the center of the inside of the hole in the reflection board 4d with a proper spacing. The height of the ring 16 is larger than the depth of the recess part in the counterbore hole, and a lamp main body 12a is kept in the position apart from the back face of the reflection board 4d. between the end part on the opposite side to the lamp main body 12a and a base member 4, a rubber strip 18 is arranged, and the strip 18 and the ring 16 cooperate with each other so as to elastically support the lamp 12. In this way, vibration or shock transmitted to the lamp 12 through the base 4 can be absorbed.
Patent JP-S578458-A (JP)
Title: Device for measuring frequency
Inventor: IGAI YASUHIRO
IPC: G01R23/09
Filed: 1980-06-19
Abstract: PURPOSE:To make the frequency of the signal to be measured measurable with high accuracy with simple circuit constitution by subtracting reference clock pulses from the prescribed preset value during the prescribed period of low frequency signals. CONSTITUTION:The frequency f to be measured entering from an input terminal 1 is divided by n by a gate signal generating circuit 2, to make gate signals. On the other hand, the output of a clock pulse generating circuit 10 built in with a quartz vibrator 9 is divided into (m) by a (m) frequency divider 11 and is inputted together with the gate signals to an AND gate circuit 4. The value prescribed times the reference value of the frequency to be measured is preset in a down counter 5 by a presetting circuit 6, so that the outputs of the gate circuit are down-counted. Upon ending of the counting, the output of the counter 5 is displayed in a display device 8 having a latch circuit. Thereby, the fluctuating components of the signal to be measured with respect to the reference value are measured accurately in real time.
Patent JP-S62240136-A (JP)
Title: Production of mold for shell molding
Inventor: SARUWATARI MASANORI
IPC: B22C9/02
Filed: 1986-04-11
Abstract: PURPOSE:To easily remove burr from a core and to prevent the damage of the core by arranging the second recess part connected to the recess part of a metallic mold, which forms a space for the core forming by joining the dividable metallic molds, and forming the burr at the time of forming the core. CONSTITUTION:In at least one side of one pair of the dividable metallic molds 11, 12, having the recess parts 11a, 12a for the core forming of a mold for shell molding, the second recess parts 13 having wedge-shape, etc., for the burr forming connected with the recess parts 11a, 12a, on the joining face of the molds. The dividable metallic molds 11, 12 are joined and shell sand is put into the core forming space of the mold for the shell molding, formed between these recess parts 11a, 12a. The above-mentioned shell sand is filled up into the second recess part 13 connected with these recess parts from the above space, tool. In this state, the dividable metallic molds 11, 12 are heated, to harden the above shell sand by heating. In this way, the core 15 of the mold for the shell molding and the burr part 16 for separation connected with the core 11 are formed. The burr part 16 is easily removed without any machining, etc., and any damage of the core 15.
Patent JP-H08285421-A (JP)
Title: Power source supplying system for fan
Inventor: KOMINAMI MITSURU
IPC: H04Q1/28
Filed: 1995-04-10
Abstract: PURPOSE: To reduce a probability in which an electrical supplying is terminated by a method wherein there is provided a double power source for supplying electricity to each of shelves and a fan, the power source in each of the systems is comprised of a plurality of system lines, electricity is supplied from the same numbered two system lines to each of the shelves and an electrical supplying for the fan is carried out from a different numbered system line. CONSTITUTION: Electricity is supplied from a system line 00 of a 0-system power source 2 and a system line 10 of a 1-system power source 3 to a shelf SH0 of a frame 1 and then a double-set power source is supplied. A system line 01 of the power source 2 of the 0 system and a system line 11 of the power source 3 of 1 system are connected to a shelf SH1 and similarly, the double-set power source is supplied to the shelf SH2 .... Then, a lower fan FANa is connected by a system line of the power source 2 of 0 system and a system line of the power source 3 of 1 system having different numbers. To the contrary, an upper FANb is also connected to a different system line. That is, the lower FANa is in the system line 01 of the power source 2 of the 0 system and in the system line 10 of the power source 3 of 1 system and the upper FANb is supplied with electricity from each of the system line 00 and the system line 1n, respectively.
Patent JP-S63261081-A (JP)
Inventor: KEBIN FURANSHISU SARIBAN
IPC: E05D15/34
Filed: 1988-04-04
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S61257968-A (JP)
Inventor: TOOMASU EFU BATSUKURII
IPC: C10M133/16
Filed: 1986-04-11
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S59212518-A (JP)
Title: Bearing and table for linear sliding motion
Inventor: TERAMACHI HIROSHI
IPC: F16C29/00
Filed: 1983-05-16
Abstract: PURPOSE:To reduce a production cost, by vertically forming internal surfaces opposed to each other of both sleeve parts formed in a slide bed of a bearing and side faces of a track bed opposed to said internal surfaces. CONSTITUTION:A slide bed 1 forms internal surfaces 8 opposed to each other in its both sleeve parts 6a, 6b into a vertical surface, and each of these internal surfaces 8 forms both almost a semicircular rolling groove 9a, 9b, having a curvature almost equal to the curvature of a ball 4, and a clearance ball hole 10 over the total length of longitudinal direction of said internal surface. While a track bed 2 forms its cross section into almost a rectangular shape, and its upper part fitted into a recessed part 7 of the slide bed 1 forms rolling grooves 14a, 14b of semicircular shape, having a curvature almost equal to the curvature of the ball 4, along the longitudinal direction of vertical side faces opposed to the internal surfaces 8 of each sleeve part 6a, 6b. Then a loaded ball area is formed by both rolling grooves 9a, 9b, 14a, 14b of the slide bed 1 and the track bed 2.
Patent JP-S5512535-A (JP)
Title: Control system for magnetic tape
Inventor: YAMAJI TOSHIROU
IPC: G11B27/36
Filed: 1978-07-12
Abstract: PURPOSE: To prevent the occurrence of reproduction disable state, by performing error display when the position display element of the same kind on magnetic tape is detected twice or more.  
     CONSTITUTION: The beginning end display signal given to the line 21 is directly given to the AND gate 25 and also to the AND gate 25 via the delay circuit 23 and the inverter circuit 24. The forward direction running signal is given to the AND gate 25 via the line 22. Accordingly, the signal C from the AND gate 25 is obtained at the leading part of the BOT marker. The signal C is given to the trigger terminal of FF26, which is set. The set output signal d and the beginning end display signal a are given to the AND gate 28, and if peeling off as the same kind of BOT marker is detected other than the BOT marker output 12, the error signal e is outputted on the line 29. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-H06261739-A (JP)
Title: Block for heating test bottle, culture device using block for heating the same test bottle and method of culture
Inventor: KITA MASAHARU
IPC: C12N1/00
Filed: 1993-03-17
Abstract: PURPOSE:To maintain temperature in a test bottle constant even in variation of temperature in a chamber. CONSTITUTION:A heat insulating member 6 is set at the opposite side of at least a heating means 3 side of a heat storage member 5 made of a metal having a supporting hole 12 into which a test bottle 11 is inserted.
Patent JP-S5420747-A (JP)
Title: Photo coupling element
Inventor: NAGANO KATSUYUKI
IPC: G02B6/32
Filed: 1977-07-15
Abstract: PURPOSE:To facilitate packaging and realize high efficiency coupling even for coupling of a semiconductor laser light source having isotropic exit light and an optical fiber by exposing the core of the optical fiber in conical form thereafter working the end in spherical form.
Patent JP-2000277292-A (JP)
Title: Target for x-ray generation
Inventor: NISHIKAWA TADASHI
IPC: H05G2/00
Filed: 1999-03-26
Abstract: PROBLEM TO BE SOLVED: To improve conversion efficiency of a soft X-ray region, even in single laser pulse irradiation conditions for not losing a short pulse of a generated X-ray by forming a target using laser induced plasma of a solid material having many of vertical pores of a nanometer size diameter on its surface. SOLUTION: Solid material having many of vertical pores of a nanometer size diameter on the surface is used as a target for X-ray generation. Such the solid material is a metal of a face-centered cubic close packed structure and is prepared by anodically oxidizing aluminum and forming an alumina film on the surface. An alumina film 23 of low average density, having many of vertical pores 22 of a nanometer size diameter, is formed on a surface of an aluminum plate 21. With this target, a laser beam travels deep into the inside of the target along the vertical pores on the surface of the target, even under a single laser pulse irradiation condition capable of maintaining a short pulse of the generated X-ray generated, an interaction region increases, laser induced plasma generation increases, and conversion efficiency into an X-ray from a laser beam is enhanced.
Patent JP-S63249067-A (JP)
Title: Integrated circuit testing apparatus
Inventor: MIZUSAWA TAKESHI
IPC: G01R31/28
Filed: 1987-04-06
Abstract: PURPOSE:To prevent erroneous judgement, by pulling up one of the output of a good integrated circuit to be tested to a high level by a resistor while pulling down the other by a resistor and comparing both outputs by a CMOS type comparing circuit. CONSTITUTION:An input pattern signal is inputted from an input pattern signal input terminal 3 and respectively inputted to a good integrated circuit 1 and an integrated circuit 2 to be tested. Output is supplied to a CMOS type EOR circuit from the output terminal A of the circuit 1 and a high level pull-up resistor 4 is connected to said output terminal A. Output is similarly supplied to the CMOS type EOR circuit from the output terminal B of the circuit 2 and a low level pull-down resistor 5 is earthed. By this constitution, in the high impedance state of the circuits 1, 2, the terminal A becomes '1' and the terminal B becomes '0'. Since the EOR circuit is the CMOS type and high in input impedance, the signal levels at both terminal A, B are inputted without variation. Therefore, by forcibly dividing pseudo-output into '1' and '0', it is eliminated that the pseudo-output is erroneously judged to be correct output.
Patent JP-S60227930-A (JP)
Title: Burring working method
Inventor: WATANABE OSAMU
IPC: B21D19/08
Filed: 1984-04-25
Abstract: PURPOSE:To obtain a product whose burring height is highly by executing the ironing by increasing successively the ironing diameter from a punch leading-in tip part, and varying a plate thickness decrease rate of a burring part by one stroke. CONSTITUTION:As for a multistage burring punch having different outside diameter dimensions d1, d2 of straight parts 7, 8 which follow the leading-in tip part, and of d1<d2, an effective length l1 of the straight part 7 exceeds a burring height of a product, and an effective length l2 of the straight part 8 is l1<l2. Also, this punch has both the straight parts 7, 8, a burring working part consisting of a smooth and connected curve, a straight part 9 held and pressed in a punch plate and a collar 10. By using said punch, first of all, the first burring working is executed by the small diameter part of the tip part, and subsequently, the re-burring working is executed by one stroke by the large diameter part, the plate thickness decrease rate of the burring part is made large, and a dimension whose burring height is high is obtained.
Patent JP-H08254279-A (JP)
Title: Solenoid switching valve
Inventor: HAMADA ZENZO
IPC: F16K31/06
Filed: 1995-03-17
Abstract: PURPOSE: To reduce pressure loss, reduce influence of fluid reaction, enable switching regardless of the flow-in direction of a fluid, and suppress leakage. CONSTITUTION: In a solenoid switching valve provided with a valve body 3 driven at a right angle to a valve seat by a solenoid coil 7, an inserting hole 2d having a relief groove which is provided with a valve seat on one end and which is arranged apart from the valve seat and a communicating hole 2a communicated with a first port 9, is arranged on a main body 1.  A valve body 3 is provided with a circular cone shaped head part 3a which is slidably inserted in an axial direction in the inserting hole 2d and which abuts on the valve seat on the most outer end, an annular cylindrical part 3e which is arranged aside on the circular cone shaped head part 3a of the valve body 3, which is opened/closed between a relief groove and the communicating hole 2a by a lap part 3c, and which is overlapped on the valve seat abutting position of the head part 3a, and a cylindrical supporting part 3b on the other end, and a second port 10 and both end part oiling chambers 11, 12 of the valve body 3 are communicated with each other.
Patent JP-H0577774-A (JP)
Title: Automatic lighting and illuminating device for bicycle
Inventor: NAKAMURA KIKUO
IPC: B60Q1/02
Filed: 1991-03-26
Abstract: PURPOSE:To realize automatic lighting/turning-off of a lamp and improve the handling efficiency by providing to a hub of a bicycle a hub-dynamo where a generator is built in, and realizing lighting by means of the hub-dynamo when the steering with lighting is necessary according to the output of a sensor to detect the surrounding lightness. CONSTITUTION:The light quantity to be received is large in the day time, and the resistance of a photosensor Cds is small. The voltage at the connection of a resistor R1 and the photosensor Cds is lower than the threshold voltage of a gate circuit G1, and transistors Q1, Q2 are not energized. Thus, a lamp (L) is turned off in the day time. On the other hand, the resistance of the photosensor Cds becomes large at night, and the voltage at the connection of the resistor R1 and the photosensor Cds becomes high, and when it exceeds the threshold voltage of the gate circuit G1, the output of the gate circuit G1 reaches (H), and as a result, the transistors Q1, Q2 are energized and the lamp (L) is lit. This arrangement allows the automatic lighting/turning-off of an illuminating lamp (L) during traveling according to the surrounding lightness.
Patent JP-S60227517-A (JP)
Title: Pull-up circuit of mos semiconductor integrated circuit element
Inventor: MITSUMOTO TOSHIO
IPC: H03K19/094
Filed: 1984-04-25
Abstract: PURPOSE:To stabilize the initialization of an MOS semiconductor integrated circuit after power supply is turned on to reduce the limitation on the operation of the integrated circuit, by selectively or statically pulling up the integrated circuit only when a voltage boosted to a level exceeding the supply voltage is requested. CONSTITUTION:An MOSFET3 for pulling up is connected with a timing generating circuit 1 containing an MOS capacity 2 for boosting and the active signal phiA of the supply voltage level is inputted in the gate of the FET3. Moreover, the drain of the FET3 is connected with a power source VCC and source is connected with the boosted signal output (phiOUT) line of the circuit 1. A pull-up circuit 4 composed of the 1st MOSFET6, 2nd MOSFET7, 3rd MOSFET5, and 4th MOSFET9, and MOS capacity 8 is connected with the signal output line. The repeat signal phiCK of the supply voltage level (VCC) is inputted in the drain of the FET5 of the circuit 4 and the initialization of a semiconductor integrated circuit after the power supply is turned on is stabilized by selectively or statically pulling up the integrated circuit only when a voltage boosted to a level exceeding the supply voltage is requested.
Patent JP-H04294969-A (JP)
Title: Polishing device
Inventor: YOKOYAMA TAIZO
IPC: B24B13/02
Filed: 1991-03-25
Abstract: PURPOSE:To miniaturize the device and yet to polish a large sized lens. CONSTITUTION:A rotation member 13 driven with its rotation by a motor, a conversion mechanism 17 converting the rotation motion of this rotation member 13 into a rocking motion, a rocking member 18 executing a rocking motion by being connected to the conversion mechanism 17 and provided with a work or polishing tool and a rotation driving means 20 driving the work or polishing tool with their rotation by supporting it are equipped, and the rotation center of the rotation member 13 is provided on the center line L of he rocking angle of the rocking member 18.