Patent GB-669401-A (GB)
Title: Improvements in or relating to electrical signalling systems
IPC: H04Q1/44
Filed: 1949-01-07
Abstract: 669,401. Automatic exchange systems. WESTERN ELECTRIC CO., Inc. Jan. 7, 1949 [Jan. 9, 1948], No. 493/49. Class 40 (iv). [Also in Groups XXXVI, XXXVIII and XL (c)] A signalling system, suitable for the transmission of digits in a telephone system, utilizes in one embodiment signals #i(t) satisfying the relationship according as i# or =j. A second embodiment employs signals # i (t) satisfying the relationship according as i # or = j. The signal receivers are arranged to produce voltages equal to these integrals and by testing for zero or a finite output to determine the presence or absence of a particular signal in the aggregate of signals received. In a particular case of the first embodiment the #'s are represented by sin 2#n#t where n is an integer. Each digit is represented by a particular combination of two out of five frequencies 12f, 13f ... 16f, the two frequencies being simultaneously superimposed on a standard frequency of 9f. In the receiver, Fig. 1, the standard frequency 9f is fed to a frequency converter having outputs 12f ... 16f. These are fed to multipliers M1 ... M5 to which the received signal is also fed and the product is then fed to integrators #1 ... #5, whose outputs are fed via a register connector to an electronic register. A control circuit, equipped to recognize the incidence of a signal, times the period of integration # (which = 1/f in this case). The control circuit may arrange to delay the integration for a short period in order to eliminate transients. In the case where the line is liable to produce unwanted phase shifts so that the signals applied to the multipliers may be out of phase, use is made of the following facts:- sin<SP>2</SP>B+cos<SP>2</SP>B=1. Accordingly the incoming signal is fed to two multipliers fed with locally generated signals 90 degrees out of' phase. The two outputs are then integrated, squared and added to give the required signal which is then fed to the register. In the second embodiment the functions # are of the form where k may be one of five integers. Fig. 6A shows a circuit which can be pulsed in the transmitter to produce the desired wave form, and can be used in the receiver to receive the damped wave form and produce the desired integral as its output. It is preferred however in the transmitter to produce the desired wave form by applying a unit step function to the circuit of Fig. 6B. In alternative circuits, Figs. 6C, 6D (not shown), the use of inductances is avoided by the use of amplifiers with capacitative feed-back. For purposes of illustration a testing arrangement for this type of signalling is described in which a series of eight-digit numbers, separated by short intervals are registered in a receiver to which the digits are fed by other means for comparison. The digits are signalled from the transmitter by keying any two of five such circuits (of different k) and the outputs are summed and fed to line, the keying being at a rate of 100 digits per second and controlled by a mains driven synchronous motor. In the receiver the incoming signals are fed via a low impedance amplifier A, Fig. 9, to the respective circuits 21 ... 25 whose outputs representing the desired integrals are fed through a detector 28 to a register 27. A start circuit 26 is provided to recognize the absence of signals between two numbers and thereupon to deliver a pulse to the steering circuit 31 to enable it for the duration of the next number. The " look pulse " circuit 32 synchronized to the same mains circuit as was used for the transmitter delivers a pulse 5 ms. after the start of each digit, the pulse being used to enable the detector and also to step the steering circuit which ensures that the successive digits are registered on the appropriate digit circuits in the register 27. Each digit frequency is registered on a relay controlled by the anode current of a valve and arrangements are provided that if a number of valves other than two are drawing current a " recycle "  relay is operated (see Group XL (c)), which may cause by means not specified the retransmission of the digit. If the received signal passes this test the digit is passed to the comparator 30 where it is compared with the correct number.