Patent SG-11201900741Y-A (SG)
Title: Coaxial connector feed-through for multi-level interconnected semiconductor wafers
Inventor: DRAB JOHN
IPC: H01L27/12
Filed: 2017-06-14
Abstract: UPPERSTRUCTUREa D 14a 10 AP INPUT 16-/ 14b CONTROL SIONA4 INPUT 2 R5 OUTPUT 18 -- LOWER STRUCTURE 12b RE -4— ^-14c INPUT —I D CONTROL SIGNAL GM 7 14d 10b 20 RF OUTPUT FIG. I W O 20 18/075 099 Al INPUT 2 (12) INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY (PCT) (19) World Intellectual Property Organization International Bureau (43) International Publication Date 26 April 2018 (26.04.2018) WIPO I PCT omit VIII °nolo III o IID 100 lionono iflo oimIE (10) International Publication Number WO 2018/075099 Al (51) International Patent Classification: HO1L 21/768 (2006.01) HO1L 23/48 (2006.01) HO1L 21/84 (2006.01) HO1L 27/12 (2006.01) (21) International Application Number: PCT/US2017/037462 (22) International Filing Date: 14 June 2017 (14.06.2017) (25) Filing Language: English (26) Publication Language: English (30) Priority Data: 15/297,803 19 October 2016 (19.10.2016) US (71) Applicant: RAYTHEON COMPANY [US/US]; 870 Winter Street, Waltham, Massachusetts 02451-1449 (US). (72) Inventors: DRAB, John, J.; 2324 Sonora Drive, Santa Bar- bara, California 93105-4632 (US). TESHIBA, Mary, A.; 2345 Santa Fe Avenue, Torrance, California 90501 (US). (74) Agent: MOFFORD, Donald, F. et al.; Daly, Crowley, Mofford & Durkee, LLP, 354A Turnpike St., Suite 301A, Canton, Massachusetts 02021 (US). (81) Designated States (unless otherwise indicated, for every kind of national protection available): AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW. (84) Designated States (unless otherwise indicated, for every kind of regional protection available): ARIPO (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW), Eurasian (AM, AZ, BY, KG, KZ, RU, TJ, TM), European (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR), OAPI (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG). Declarations under Rule 4.17: as to applicant's entitlement to apply for and be granted a patent (Rule 4.17(ii)) as to the applicant's entitlement to claim the priority of the earlier application (Rule 4.17(iii)) — (54) Title: COAXIAL CONNECTOR FEED-THROUGH FOR MULTI-LEVEL INTERCONNECTED SEMICONDUCTOR = WAFERS (57) : A semiconductor, silicon-on-oxide (SOI) structure having a silicon layer disposed on a bottom oxide (BOX) insulating layer. A deep trench isolation (DTI) material passes vertically through the silicon lay- er to the bottom oxide insulating layer. The deep trench isolation materi- al has a lower permittivity than the permittivity of the silicon. A coaxial transmission line having an inner electrical conductor and an outer elec- trically conductive shield structure disposed around the inner electrical conductor passing vertically through the deep trench isolation material to electrically connect electrical conductors disposed over the bottom oxide insulating layer to electrical conductors disposed under the contacts bot- tom oxide insulating layer. [Continued on next page] WO 2018/075099 Al MIDEDIMOMOIDEIREEMOMMODIEHOHOMEMOIS Published: — with international search report (Art. 21(3))