Patent GB-1264066-A (GB)
IPC: G06F11/36
Filed: 1970-06-24
Abstract: 1,264,066. Data processing. INTERNATIONAL BUSINESS MACHINES CORP. 24 June, 1970, No. 30732/70. Heading G4A. Data processing apparatus for executing a programme of instructions under microprogramme control, in which predetermined situations occurring during the execution of an instruction are designated programme events, includes means for indicating that a particular programme event or events is to be detected, each event having an associated microinstruction, means for detecting that an indicated event has occurred, means responsive to the detection of an indicated event for recording that the indicated event has occurred and means for completing the execution of the instruction during which the indicated event was detected. Possible types of events are: fetching of an instruction from a main store location in a prespecified range of addresses, alteration or use of a location in this range, successful execution of a branch instruction, alteration or use of any one of prespecified general purpose registers. Stored code bits specify which of these four types are to be detected and the identities of the general purpose registers, and the starting and ending addresses of the range of addresses are also stored. When a microinstruction relating to one of the types of events to be detected is reached then, provided the register identity or address is one of those prespecified if relevant, a programme event code and address (of instruction or of main store location or of branch instruction or of general purpose register) are set into a buffer and (except in the case of a "successful branch" event) a " programme event detected" " latch is set. In the case of alteration or use of a main store location or general purpose register, the testing of the address or register identity (to see if it is one of those prespecified) is done in a dedicated area of a work store to which various system registers (e.g. instruction counter, microinstruction address register, main store address register) are logged-out when it becomes clear this testing has to be done, so that the normal-processing values of the system registers are not altered. The dedicated area is also used for handling errors and system stop conditions. The microprogramme next goes to an instruction-fetch microinstruction and if the "programme event detected" " latch is set, the microprogramme branches to an interrupt analysis routine starting with transfer of the buffer contents to main store. This routine returns to the instructionfetch microinstruction. An exception is when the detected event is a successful branch in which case the microprogramme branches to the interrupt analysis routine direct without going to the instruction-fetch microinstruction and the test of the " programme event detected " latch (not set in this case). The detection of programme events as above is used for debugging and the whole facility may be inhibited by having a " programme event mode " latch (controlled by a bit in the programme status word) reset. The drawing shows a main store 1 including microprogramme control section and error correction code bits, addressed by SAR and reading out microinstructions to CDR. The work store is 8 and the general purpose registers are part of an auxiliary store 9. Other connections are as shown.