baber/WOPTO huggingface dataset:
Patent JP-S56155740-A (JP)
Title: Manufacture for ink roll
Inventor: SAKANO SHIYUNKAI
IPC: B29C55/00
Filed: 1980-05-06
Abstract: PURPOSE: To obtain an ink roll excellent in fluidity of ink and in continuous printing by vulcanizing highly foamed gelled form in the compressed state and by punching the same in the direction of compression.  
     CONSTITUTION: A rubber latex compound is made to foam by mixing air in it, and after a gelling agent such as sodium silicofluoride is mixed further therein, the mixture is filled up in a mold and thus the highly foamed gelled form whose foaming multiplication is 5 or more is obtained. Next, the form is turned into a form 3 for the ink roll having the density of 0.3W0.4g/cm 3  by vulcanizing the same in the compressed state and further the form 3 is made into the cylindrical ink roll by punching the same in the direction S of compression. Since the ink roll is subjected to vulcanization under compression, it is excellent in the continuity of foams and the directional property of pores 4 and also excellent in the fluidity of ink due to capillarity phenomenon. In addition, small-quantity various-kind production can also be applied since punching is conducted without using any expensive mold. 
     COPYRIGHT: (C)1981,JPO&Japio
Patent JP-H01235807-A (JP)
Title: Depth measuring instrument
Inventor: HAYASHI MASAKAZU
IPC: G01B11/22
Filed: 1988-03-16
Abstract: PURPOSE:To measure trench depth with high accuracy by providing reflectivity parts which respectively correspond to the intensity of the reflected light from the surface of an object to be measured and the intensity of the reflected light from the trench base to a reference mirror. CONSTITUTION:The parallel white light radiated from a white lamp 31 is divided to two beams of the white light by a beam splitter 32. The one beam is projected on a wafer 12 and the other is sent to the reference mirror 33. The reflected light rays from the trench base and surface are thereby sent from the wafer 21 to the beam splitter 32 and the respective reference light rays reflected from the different reflecting parts 33a, 33b of the mirror 33 are simultaneously sent to the beam splitter 32. The inclination of the mirror 33 in the x-, y-, and z-axis directions thereof and the displacement of the mirror 33 in the normal direction thereof are adjusted by a fine adjustment mechanism 34 at this time so that interference fringes appear. The images of the interference fringes are picked up by an industrial TV 36 and the image signals thereof are subjected to A/D conversion and storage 37. The interference fringes are thus projected on a monitor TV 38. The trench depth is measured from the displacement of a wafer-mounting table 20 displayed on a displacement display device 23 by moving the interference fringes.
Patent JP-H06276704-A (JP)
Title: Stator device of induction motor
Inventor: SAGARA HIROAKI
IPC: H02K17/08
Filed: 1993-03-19
Abstract: PURPOSE:To prevent the characteristic of a motor from being deteriorated and at the same time to increase the economical efficiency of the iron core of a stator. CONSTITUTION:The outer circumferential part of an outside stator 2 is flattened in part to form a flat part 6, and a notch part 5b on the inside of the flat part 6 in notch parts 5a, 5b provided in the inner circumferential surface of the outside stator 2 is provided on the center shaft side, so that the thickness may be kept substantially constant even when the outer diameter becomes smaller by the flat part. In an inside stator 1, a magnetic pole 4 corresponding to the flat part 6 is formed to be shorter than the other magnetic pole 3 so that the teeth parts 3a, 4a of the magnetic poles 3, 4 are fitted into the notch parts 5a, 5b of the outside stator 2.
Patent JP-S61218684-A (JP)
Title: Ground-reinforcing material utilizing factory wastes
Inventor: SHIDA YUKIMORI
IPC: C09K17/08
Filed: 1985-03-25
Abstract: PURPOSE:The titled ground modifier that contains a combination of a roasted product mainly consisting of CaO, Al2O3, Fe2O3 and SiO2 with a variety of substances curable with water and additionally SiO2, Al2O3, Fe2O3, CaO, MgO, Na2O and K2O, thus being suitable for use to strengthen soft ground. CONSTITUTION:Wastes from a variety of factories such as sugar refinery, rubber tire manufacturing and reclamation factories are roasted. Then, the product mainly containing CaO, Al2O3, Fe2O3 and SiO2 is used as a base and combined with a variety of substance curable with water such as cement or magnesium sulfate whereby SiO2, Al2O3, Fe2O3, CaO, MgO, Na2O and K2O are included in the composition. Soil particles are bound to strengthen the ground.
Patent JP-S55153929-A (JP)
Title: Exposure time and exposure lap time display method in automatic exposure device for microscope
Inventor: HIRANO YUTAKA
IPC: G03B17/00
Filed: 1979-05-18
Abstract: PURPOSE: To prevent the failure of photographing by displaying the integrated value to the lap time of exposure in the exposure device which converts the light from sample light to electric output, integrates this output and makes the time until it coincides with a reference value as its exposure time.  
     CONSTITUTION: When the light IL from the sample enters a photoelectric transducer 1, the voltage adding the voltage proportional to the logarithmic value of photo current i1 and bias voltages E1WE3 is generated at the A point by way of a logarithmic diode 2 and input voltage follower type amplifier 4. When the change- over switch is on the (a) side, the exposure time corresponding to the photo current i1 and set information (E1WE3) is displayed in a voltmeter 14. since the voltage at the B point is the integrated value of the current i2 revers-converting the voltage at the A point by a logarithmic diode 3, the voltage across the logarithmic diode, that is, the residual exposure amount, is displayed in the voltmeter 14 when the contacts of the switch 15 are on the (b) side. Hence, the calibration of exposure may be done and therefore the failure of photographing may be prevented. 
     COPYRIGHT: (C)1980,JPO&Japio
Patent JP-H03264150-A (JP)
Title: Method and apparatus for reduced pressure casting
Inventor: TARUNO YASUKI
IPC: B22D18/04
Filed: 1990-03-12
Abstract: PURPOSE:To prevent disturbance of molten metal and the development of oxide by pressurizing the molten metal surface in a furnace and reducing the pressure to the atmospheric pressure after filling up the molten metal into cavity in a mold through a stalk under pressure and then opening the mold under the atmospheric pressure or higher. CONSTITUTION:The pressure is given to the molten metal 12 surface in the furnace 14 through a servo valve 22. The cavity 16 in the mold 18 is filled with the molten metal 12 under this pressure through the stalk 20. In the above low pressure casting method, after the molten metal 12 in the mold 18 solidifies, the pressure on the above molten metal 12 surface is reduced. Under the pressure on this molten metal 12 surface at least higher than the atmo spheric pressure, the mold 18 is opened to take out the casting product. After that, the pressure on the above molten metal 12 surface is reduced to the atmospheric pressure to return the molten metal in the stroke 20 into the furnace 14. Then, both a first and second valves 24, 26 for discharging are arranged to the furnace 14, and after opening the pressure, the pressure on the molten metal 12 surface is reduced at a first pressure reducing speed and after that, it is desirable to reduced the pressure to the atmospheric pressure at a second pressure reduc ing speed faster that the first pressure reducing speed. By this method, the disturbance of molten metal 12 in the furnace 14 and the development of oxide are prevented and starting of leakage of the molten steel can be prevented.
Patent JP-S61219955-A (JP)
Title: Photomask
Inventor: FUKUDA HIROSHI
IPC: G03F1/00
Filed: 1985-03-27
Abstract: PURPOSE:To prevent the breakdown of a metallic film pattern of a photomask by forming a corner part of a semiconductor area, to an obtuse angle or a circular arc shape so that a distance between each semiconductor area becomes larger than a prescribed value, and using the photomask of the metallic film pattern. CONSTITUTION:In a semiconductor substrate consisting of an (n<->)-type single crystal silicon, a field insulating film is formed on a main surface on the substrate by using a photomask 22. This photomask 22 is used for a negative type photoresist by forming a chrome thin film 23 in a rectangular shape on a quartz substrate. In this regard, in accordance with the shape of the chrome thin film 23, a field insulating film is formed on the semiconductor substrate. A corner part 23A of this chrome thin film 23 is formed in a circular arc shape. This circular arc shape is formed so that a distance between each semiconductor area becomes larger than a prescribed value. Accordingly, when the photomask has been set to an exposing device, a corner part of a metallic pattern causes no melt breakdown, and a drop of the yield can be prevented.
Patent JP-S60208590-A (JP)
Inventor: TAKAHASHI TATSUHIKO
IPC: B66B11/02
Filed: 1984-03-30
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S54152941-A (JP)
Title: Execution address memory system of information processor
Inventor: KOYAMA MASAMICHI
IPC: G06F11/00
Filed: 1978-05-24
Abstract: PURPOSE: To simplify program debugging by providing a method of assigning the code of an effective instruction to be stored, a decoding method for the instruction code, and a memory method for the address of an instruction in process of execution in addition to an instruction-code coincidence detecting method.  
     CONSTITUTION: According to the instruction address set to address register 5, information on the address read out from memory 1 by memory register 3 is supplied to control part 4. At the same time, this instruction is sent to selecting method 9 via decoding method 7. Method 9 makes a check on the output of method 7 according to the assignment from decoding output assigning method 8 and when an assigned instruction signal exists, the output signal is supplied to address information memory method 10 while the content of register 5 is stored. To stop a program process at the time of access to a certain instruction address, a coincidence output is extracted from comparison method 12, when the address information set to address-information setting method 11 agrees with the content of register 5, and supplied to control part 4. Consequently, debugging is simplified. 
     COPYRIGHT: (C)1979,JPO&Japio
Patent JP-S59186078-A (JP)
Inventor: TOUICHI MASAKAZU
IPC: G07D1/00
Filed: 1983-04-07
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S63229322-A (JP)
Title: Interpolation system of rotary encoder
Inventor: SAKAMOTO KEIJI
IPC: G01D5/245
Filed: 1987-03-18
Abstract: PURPOSE:To obtain an accurate interpolation signal, by obtaining the interpolation signal by utilizing the part, where output linearily changes with respect to the quantity of rotation, in the sine wave output signal of a detection means detecting a pattern. CONSTITUTION:In a rotary encoder, A-phase and B-phase sine wave signals shifted by 90 deg. in a phase are obtained from a detection means detecting the rotation of a rotary disc. The A-phase and B-phase signals are compared with each other by comparators 23-26 and one cycle is divided into four regions on the basis of the magnitude of the signals A, B to obtain region signals E1-E4 showing the respective regions. Differentiation circuits 34, 35 detect the rising and falling of the signals, and forward and backward rotation signals PP, NP are outputted through AND circuits G5, G6 and counted by a reversible counter 36 to detect a position at every one cycle unit. Analogue switches 21-30 send the linear parts in the signals A, B at every region to A/D converters 31, 32 to convert the same to digital signals and the interpolation signal interpolated between the rotation signals PP, NP is obtained to acquire an accurate position signal.
Patent JP-S62217167-A (JP)
Title: Voltage level detecting circuit
Inventor: ADACHI KAZUHIRO
IPC: G01R19/165
Filed: 1986-03-19
Abstract: PURPOSE:To detect the voltage level of an optional node of a semiconductor integrated circuit by setting optionally a voltage level to be detected by the resistance ratio of two resistances and the number of diode elements in use. CONSTITUTION:This voltage level detecting circuit consists of the 1st circuit 1 composed of a resistance R1 with a sufficiently large resistance value, an (n) channel transfer gate transistor (TR) Q1, diode-connected (n) channel TRs Q2-Q3, and a resistance R2 and the 2nd circuit 2 composed of resistances R2 and R4. Denoting an input voltage VX when the transfer gate Q1 is on as V1X, V1X is expressed by an equation; when VX<V1X, VOUT=Vx+{VthX(n-1)} and when VX>V1X where VX rises and even one TR turns on, VOUT=VCC. The gate voltage of the Q1 is settable to an optional value by varying the resistance ratio of R3 and R4, and VTX is settable to an optional negative volt age level by increasing the number of TRs.
Patent JP-H11260695-A (JP)
Title: X-ray mask
Inventor: KICHISE KOJI
IPC: G03F1/22
Filed: 1998-03-12
Abstract: PROBLEM TO BE SOLVED: To provide an X-ray mask which is capable of preventing the occurrence of distortions in a transferring circuit pattern, even if it is irradiated with X-rays. SOLUTION: An X-ray mask 8 has a substrate, a membrane formed on the substrate and transmitting X-rays, and an X-ray absorber 4 formed on the membrane and shielding a transmission of X-rays. The substrate contains a window part 3 for aligning the membrane. The X-ray absorber 4 is formed in a region positioned on the window part 3, and also contains a transferring circuit pattern 5, in which a center is positioned so as to be overlapped on a center of the window part, as viewed from a direction in which X-rays are irradiated. A planar shape of an outer periphery, in a region where the transferring circuit pattern 5, is formed is substantially similar figure to the plane shape of the window part 3.
Patent JP-S60202997-A (JP)
Inventor: SUGIMURA TOSHIAKI
IPC: B65G47/28
Filed: 1984-03-28
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H02239836-A (JP)
Title: Connection state detector
Inventor: TSUTSUI TORU
IPC: A61B5/00
Filed: 1989-03-14
Abstract: PURPOSE:To obtain a connection state detector having the compatibility without giving changes to a relay cord, a voltage converter and a second connector by connecting a converting means for detecting bioinformation and a measuring means, detecting a current area to flow to the converting means or an impressed voltage, and detecting the connection state with the output. CONSTITUTION:Fifth and sixth connecting contact pins 7P5 and 7P6 are connected to a relay cord TC and connected through the contact cock seat and contact cock of the second connector to a disposable voltage converter. A contact cock seat 7S having fifth and sixth contact cock seat contact pins 7S5 and 7S6 is fitted to a measuring means 5, the fifth contact cock seat contact 7S5 is connected through a resistor 11 to compose a detecting element to a voltage source +Vcc, and the sixth contact cock seat contact 7S6 is grounded. The space between both terminals of the resistor 11 is connected to the input terminal of an amplifier 28, the output of the amplifier 28 is connected to the input terminal of one side of a comparator 12, and the input terminal of the other side of the comparator 12 is grounded. The current flowing to the resistor 11 is detected by the amplifier 28, thereafter, the level decision is executed by the comparator 12, and a USE/UNUSE signal is detected.
Patent JP-S54152454-A (JP)
Title: Mos inverter buffer circuit
Inventor: MISAIZU TETSUO
IPC: H03K17/687
Filed: 1978-05-22
Abstract: PURPOSE: To obtain a MOS inverter buffer circuit which can generate its own output under no direct influence of an external input and where a MOS transistor connected to the external input can be reduced in size while the input capacity is lessened.  
     CONSTITUTION: Drain terminals, gate terminals and source terminals of depletion MOS transistors Q31, Q33 and Q35, and enhancement MOS transistors Q32, Q34, Q36, Q37, and Q38 are connected as shown in the figure. Transistors Q31 and Q32, Q33 and Q34, and Q35 and Q36 form inverter circuits respectively and when the input is high in voltage, a certain ratio in size among MOS transistors is needed so as to keep the output at a low potential. Further, Q37 and Q38 constitute a buffer circuit and the size ratio between the both is unlimited. 
     COPYRIGHT: (C)1979,JPO&Japio
Patent JP-H05230803-A (JP)
Title: Temporary roadbed laying method and laying device thereof
Inventor: IDE SHINICHI
IPC: E01B37/00
Filed: 1992-02-17
Abstract: PURPOSE:To lay temporary roadbeds efficiently continuously over a long distance in a narrow available space by installing the temporary roadbed under a beam of a gate type stand, and connecting the temporary roadbed successively to the tip of the preceding temporary roadbed while making the stand travel on temporary rails. CONSTITUTION:A gate type stand 3 is composed of a horizontal beam 1 and vertical jacks 2 arranged on both the edges, and wheels 5 are arranged so as to be mountable/demountable freely. Temporary rails 6 are arranged on both sides of an expected laying site of a temporary roadbed 4. Next, the temporary roadbed 4 is installed in the under surface of beam 1, and the jacks 2 are extended, and the stand 3 is raised, and the stand 3 is made to travel on the temporary rails 6 by means of the wheels 5 in this condition. Next, it is stopped in a prescribed position, and the stand 3 is lowered, and the temporary roadbed 4 is connected to the tip of the previously laid temporary roadbed 4, and afterwards, the connection between the temporary roadbed 4 and the stand 3 is released.
Patent JP-S61221581-A (JP)
Title: Inverter
Inventor: TANAKA RYUTARO
IPC: H05B41/24
Filed: 1985-03-26
Abstract: PURPOSE:To stabilize the operation of an inverter by altering themagnetic characteristic of part of a core of a base inductor when the temperature of the core rises to reduce the inductance of the inductor, thereby preventing it from thermally running away. CONSTITUTION:Since the temperature in a vessel decreases when a discharge lamp 35 is initiated and lighted, a base inductor 31 becomes relatively large inductance. As the temperature in the vessel gradually rises, the temperature of the core of the inductor 31 gradually rises. When the core of the second inductor 312 arrives at its Curie Point, its magnetic property varies, and the inductance of the inductor 312 becomes substantially zero. Thus, the inductance of the entire inductor 31 decreases to the inductance of the first inductor 311, a circuit input reduces to prevent it from thermally running away.
Patent JP-H11257126-A (JP)
Title: Fuel injection controller of internal combustion engine
Inventor: MIYAMOTO KATSUHIKO
IPC: F02D41/14
Filed: 1998-03-12
Abstract: PROBLEM TO BE SOLVED: To provide a fuel injection controller of an internal combustion engine, capable of fully utilizing merit by extending the total execution time of lean combustion control by preventing emission from being increased caused by misjudgment. SOLUTION: In an ECU, the time change amount NTout of the output shaft revolutions NTout of a CVT(a continuously variable transmission) is input from a CVT-CU, and lean combustion control is performed when it is judged that a vehicle is n the stationary traveling state on the basis of the time change amount NTout. Since the traveling state is reliably judged on the basis of the time change amount NTout not to be affected by ratio control of the CVT, unsuitable lean combustion control during acceleration is avoided, and a threshold value to be used for the judgement can be set so that the execution time of lean combustion control may be extended.
Patent JP-H06275229-A (JP)
Title: Ion implanting device for emitting electron shower simultaneously with ion plantation
Inventor: NISHIDA ATSUHIRO
IPC: H01L21/265
Filed: 1993-03-22
Abstract: PURPOSE:To reduce the negative charge and damage on a semiconductor wafer and improve yield in an ion implanting device for emitting an electron shower to a semiconductor simultaneously with ion plantation. CONSTITUTION:An ion beam and electron shower is emitted from the upper part of an opening part 1 toward a semiconductor wafer 5 situated below it to implant ions to the wafer. A negative voltage is applied to the wafer 5 to generate a DC electric field 7 from the upper part toward a base. Since the electrons of the electron shower receive a force in the direction opposite to the moving direction, and the speed is decelerated to reduce the energy, thus, the negative charge and damage on the wafer is reduced, and yield can be improved.
Patent JP-H02242033-A (JP)
Title: Ventilating device
Inventor: TSUCHIDA YASUYUKI
IPC: E06B7/10
Filed: 1989-03-13
Abstract: PURPOSE:To obtain a ventilating device in which impression prevention of excessive voltage for an electric motor and electrification with good efficiency for a battery are performed by connecting a second diode with higher forward drop voltage than a first diode forward connected to the battery to a motor. CONSTITUTION:A shutter plate is opened and a battery is electrified with the use of electric power by a solar battery 16 in which a power source transfer switch SW1 is connected to a second diode D2 while an electric motor 6 is driven with the use of the electric power by the solar battery 16. The forward drop voltage of a first diode D1 is formed lower than that of the second diode D2. When the connection to the side of the second diode D2 in the power source transfer switch SW1 is performed or a shutter quick acting switch SW2 is closed by changing the forward drop voltage of the first diode D1 and the second diode D2, high voltage more than necessity is not impressed on the electric motor 6 with the use of the difference between the forward drop voltages and more electrification is performed by a battery B.
Patent JP-H08229516-A (JP)
Title: Color sorting device for bottles
Inventor: NUNOHARA TATSUYA
IPC: B07C5/38
Filed: 1995-02-24
Abstract: PURPOSE: To make it possible to collect bottles of arbitrary colors to arbitrary collection yards by providing the subject device with color allotment setting means for changing the color allotment to respective distributing means to the arbitrary colors selected from plural kinds of colors at the time of reutilizing recovered bottles by sorting the bottles by each color. CONSTITUTION: A conveyor belt is first driven to transport the bottles and simultaneously respective light sources 33a, 33b are turned on at the time of sorting the colors of the bottles. Next, the transportation of the bottles is detected by on of an image information taking-in switch 32. Respective CCD cameras 34a, 34b are turned on and the static images of the bottles are extracted. The image information is converted to the image information of hue H, lightness I and saturation S by an HSI converting means 72. In succession, the number of pixels having the respective gradations in the prescribed regions of the image information are counted by respective counter means 74A to 74D and the count values are discriminated in comparison with the thresholds of a storage means 73 by a discriminating means 75.  The dampers 51A, 51B of the respective bottle hitters are driven by a damper control means 63 of a control circuit 60 and the respective colors are allotted to the respective bottle hitters by a color alloting means 61.