baber/WOPTO huggingface dataset:
Patent JP-H1052745-A (JP)
Title: Thixo-pressure casting method
Inventor: YAMADA SADAYOSHI
IPC: B22D17/00
Filed: 1996-08-08
Abstract: PROBLEM TO BE SOLVED: To obtain a product having high strength without impurity by using a horizontal die-clamping and a vertical injection die casting machine and pressing a billet into the die with a plunger tip having smaller diameter than that of the billet in an injection sleeve. SOLUTION: The billet is laid on the plunger tip 11 having smaller diameter than that of the billet in the injection sleeve 10 under die opening condition and the plunger tip 11 is elevated and the billet is pressed into the metals 2, 3. Then, the outer shell of refractory material, etc., of the billet is left in the inner part of the injection sleeve 10 and only thixo-material of good quality without being oxidized is press-cast in the dies 2, 3. Thereafter, the plunger tip 11 is retreated and a thixo cast product is taken out to obtain the product of good quality.
Patent JP-2001057726-A (JP)
Title: Gas-insulated switchgear
Inventor: HOSHINA KOICHI
IPC: H02B13/02
Filed: 1999-08-10
Abstract: PROBLEM TO BE SOLVED: To obtain a gas-insulated switchgear that can withstand high voltage, can improve reliability, and at the same time can be miniaturized without increasing the pressure of a sealed gas. SOLUTION: A cylindrical barrier insulator 5 is inserted coaxially between a high-voltage conductor 1 and a metal container 2. The barrier insulator 5 is insulated and supported by a support insulator 6, that is mounted to the inner wall of the metal container 2, thus limiting the extension of discharge being generated from a metallic foreign object present at a gas space or the like, preventing insulation breakdowns for short-circuiting the insulation space from occurring, and hence securing high insulation performance.
Patent JP-H0676597-A (JP)
Title: Semiconductor memory
Inventor: YOSHIDA MAKOTO
IPC: G11C7/12
Filed: 1992-08-25
Abstract: PURPOSE:To completely relieve a short circuit between a bit line and a ground. CONSTITUTION:At the time of redundant relief, ATD and WR.BS becomes a 'L' level, all TN1, TN2, TN5, TN6 and TN7 are turned off and the supplying source of a current is interrupted. At the time of non-relieving, first at the time of standby, ATD=H, WR=L, TN5, TN6, TN7 are turned on, TN1, TN2 are turned off and bit lines B, the inverse of B are pulled up. At the time of reading, ATD=L, WR=H, TN1, TN2, TN5, TN6 and TN7 are turned off, the bit lines B, the inverse of B are driven by only a memory cell MC and a sufficient potential difference is generated between bit line pairs. At the time of writing, TN1 and TN2 are turned on so as to suppress a noise on the bit lines B, the inverse of B and prevent the destruction of data in the memory cell MC.
Patent JP-S615174-A (JP)
Inventor: MASUBUCHI HIDEO
IPC: E04H15/22
Filed: 1983-11-30
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H0894538-A (JP)
Title: Device for inspecting nonmetallic inclusion
Inventor: KANEKO KOJI
IPC: G01N21/93
Filed: 1994-09-21
Abstract: PURPOSE: To precisely inspect the amount and kind of any nonmetallic inclusion by constantly setting a threshold to an optimum value, and precisely distinguishing an image of any nonmetallic inclusion in a sample image from an image of metal. CONSTITUTION: An image input mechanism 2 photographs a sample 4 and produces an image signal, and after the reference threshold required to detect any nonmetallic inclusions is determined through the processing of the image signal by a processing mechanism 3, the width, length and concentration of each nonmetallic inclusion are measured per picture element, and the reference threshold is set to an optimum value to match the width and length of the nonmetallic inclusion so as to inspect the amount and kind of the nonmetallic inclusion in the sample 4.
Patent JP-H0741355-A (JP)
Title: Artificial mineral fiber molding and production thereof
Inventor: KAWAMURA HIDEYUKI
IPC: C04B28/14
Filed: 1993-07-28
Abstract: PURPOSE:To inexpensively improve the strength and fire resistance by rigidly bonding to keep bulk density by the effect of build-up of a slug fine powder formed by the reaction with a binder containing calcium sulfate or the like on the surface of a specified molding. CONSTITUTION:An artificial mineral fiber os previously crushed to obtain a crushed material of only a stiff part <=2mm in particle size. Next, an artificial mineral crushed fiber composition is ontained by blending >=5wt.% crushed material, the artificial mineral fiber, the inorganic binder containing calcium sulfate and calcium hydroxide, the slug fine powder, an adding material and an assistant material. Next, a molding is obtained by adding 20-50 pts.wt. water to 100 pts.wt. total solid matter in the composition, kneading and molding such as casting, pressing extruding and rolling. The artificial mineral fiber molding >=0.2 in bulk density is obtained by curing the molding by natural aging or wet heat aging and drying.
Patent JP-H0275021-A (JP)
Title: Source program editing system
Inventor: TAKEUCHI SATOSHI
IPC: G06F9/45
Filed: 1988-09-12
Abstract: PURPOSE:To improve the editing efficiency of a source program by producing a name cross-reference information table and a name table via a translator and displaying a name cross-reference table on a display device. CONSTITUTION:A translator 1 produces a name cross-reference information table 4 and a name table and also produces a name cross-reference table based on the table 4 and the name table. The name cross-reference table is displayed via a display means 8. Then the areas to be edited in the name cross-reference table are selectively designated and at the same time a text editor 7 is started. In such a constitution, the areas to be edited of a source program 2 can be easily known from the display of the name cross-reference table against the program 2. Then these areas of the program 2 can be carried out with a series of operations. Thus the editing efficiency is improved for the program 2.
Patent JP-S61103151-A (JP)
Title: Patterning method of multi-layered dielectric thin film.
Inventor: OKAZAKI AKIRA
IPC: G03F7/26
Filed: 1984-10-27
Abstract: PURPOSE:To execute fine lift-off patterning with good accuracy by forming an org. resist pattern having an inverted taper section and forming a metallic pattern having an inverted taper sectional shape by using said pattern. CONSTITUTION:A substrate coated with an org. resist is dipped in an arom. solvent such as chorobenzene or xylene by which the org. resist pattern 2 having the inverted taper sectional shape of the pattern is formed on the substrate 1. The film of a metal 3 such as Al, Ag or Cu is then formed thereon. The film formation is preferably executed data relatively low substrate temp., more preferably <=120 deg.C in order to avoid the deformation (shear drooping at edges) of the org. resist pattern 2. The substrate is treated by using a resist stripping soln. to remove the pattern 2 by which the metallic layer 3 is lifted off and the metallic pattern 4 having the inverted taper sectional shape is obtd. Multi- layered dielectric thin film 5 is then formed thereon. The pattern 4 is dissolved away, by which the multi-layered dielectric thin film is lifted off and the multi- layered dielectric thin film pattern 6 having the tapered sectional shape is obtd.
Patent JP-H0390072-A (JP)
Title: 1,5-benzothiazepine derivative
Inventor: INOUE HIROZUMI
IPC: A61K31/55
Filed: 1989-08-31
Abstract: NEW MATERIAL:The compound of formula I {ring A is (substituted) benzene ring or heterocyclic group; R<1> is lower alkyl or lower alkoxy; R<2> is heterocyclic group, lower alkoxy, etc.; Y is halogenophenyl or (OH-substituted) lower alkylene; Z is O or two H: R is group of formula II when Z is O or R is group of formula II or H when Z is two H; etc.} or its acid addition salt. EXAMPLE:(+ or -)-cis-2-(4-Methoxyphenyl)-3-(4-methylbenzyl)oxy-5-[2-(dimethylamino) ethyl]-2,3-dihydro-1,5-benzothiazepin-4(5H)-one. USE:A drug. A calcium antagonistic agent. It has little side effect and low toxicity and is useful as a remedy and preventive for cerebral diseases such as cerebrovascular contraction, cerebral ischemia and cerebral infraction and cardiac diseases such as stenocardia and myocardial infraction. PREPARATION:The compound of formula I can be produced by reacting a compound of formula III or its salt with a compound of formula IV (X<1> is reactive residue).
Patent JP-H0275048-A (JP)
Title: Channel connected scsi interface device
Inventor: MASUKO YASUHIRO
IPC: G06F13/12
Filed: 1988-09-12
Abstract: PURPOSE:To realize the input/output operations to the peripheral equipments having the SCSI interfaces with use of an existing channel control program by preparing a channel interface and an SCSI interface and performing the conversion of both interfaces. CONSTITUTION:A channel connected SCSI interface device 6 is connected to a channel device 3 of a computer and contains a channel interface and an SCSI interface. Then the device 6 performs the conversion of both interfaces. Then the input/output operations are carried out to the peripheral equipments 5 having channel interfaces based on a program of the computer. Thus data are once supplied to the device 6 and this device 6 controls the peripheral equipments 8 having SCSI interfaces. Thus the connection of the equipments 8 are attained via the device 3.
Patent JP-S59121259-A (JP)
Title: Sealing method
Inventor: AKITA HIROAKI
IPC: F16J15/12
Filed: 1982-12-27
Abstract: PURPOSE:To permit tight sealing by a method wherein the configuration or the like of a gasket is improved to adjust a contacting interfacial pressure between contacting faces into a favorable condition. CONSTITUTION:In the gasket 1, a gasket main body 2 consists of a metallic plate 3 of steel plate or the like, layers 4 of covering material of the mixture of asbestos and rubber, covered on both surfaces of the metallic plate 3, and adhesion preventing agent layers 5, covered on the surfaces of the layers 4 of the covering material to prevent the adhesion of the gasket onto the contacting surface of a flange or the like. A hole 6 for fluid and bolt holes 7 are penetrating the gasket main body 2 and a protrusion 8 is formed by press work so as to surround the holes 6, 7. In this sealing method, several kinds of the gasket 1, having different thicknesses t, are prepared and the gasket 1 having an optimum thickness is interposed between the contacting surfaces.
Patent JP-2001053111-A (JP)
Title: Flip-chip mounting structure
Inventor: TANAKA YASUSHI
IPC: H01L23/12
Filed: 1999-08-10
Abstract: PROBLEM TO BE SOLVED: To provide a flit-chip mounting structure preventing short circuits between bumps. SOLUTION: In this flip-chip mounting structure, solder bumps 3 are respectively formed in a plurality of element side electrodes, provided in a semiconductor element 1. Substrate side electrodes 4 are respectively formed at portions of a mounting substrate 2, corresponding to each solder bump 3, and pairs of grooves 5 are formed at portions between each substrate side electrode 4 in the mounting substrate 2. Here, the plane of the semiconductor element 1 forming the solder bump 3 is made to confront the mounting substrate 2, and the substrate side electrode 4 formed in the solder bump 3 and the mounting substrate 2 is positioned, and the semiconductor element 1 is mounted on the mounting substrate 2.  Thereafter, if the solder bump 3 is heated and bused, an element side electrode of the semiconductor element 1 is connected electrically and mechanically To the substrate side electrode 4 of the mounting substrate 2. At This time, since surplus solder runs over from the substrate side electrode 4 and flows into the groove 5 provided in the mounting substrate 2, short-circuiting the space between adjacent solder bumps 3 is prevented.
Patent JP-H1165474-A (JP)
Title: Electronic equipment device equipped with display member
Inventor: YAMAGISHI SHOHEI
IPC: H04N5/64
Filed: 1997-08-11
Abstract: PROBLEM TO BE SOLVED: To provide the electronic equipment device which facilitates operation for storing a display member in a container frame. SOLUTION: This device is constituted by fitting a support member 10 fitted with a display member 1 in a freely raisable and rotatable state to a coupling part 6 at the front part of a guide member sliding in the container frame 1 in the front-rear direction, providing this support member 10 with an operating plate 21 which moves forward and backward by the raising and rotation of the display member 1 while pressed against an operating surface 18 formed on the back of the display member 1, and providing this operating plate 21 with a correction shaft 24 and the coupling part 6 with a triangular correction hole 9 which consists of a peak part (a) meeting the correction shaft 24 in the retraction state of the operating plate 21 wherein the display part 1 is fallen and a couple of right and left slanting edges (b) and (b)  spreading therefrom and allows the correction shaft 24 to move to the right and left in the forward movement state of the operating plate 21 wherein the display member 1 is raised.
Patent JP-2000058787-A (JP)
Title: Semiconductor device and manufacture thereof
Inventor: KAWAZOE TAKAYUKI
IPC: H01L27/108
Filed: 1998-08-11
Abstract: PROBLEM TO BE SOLVED: To form an N+ and a P+ contact hole without using a photolithography process in a semiconductor device having a stacked capacitor structure. SOLUTION: A semiconductor device has on a semiconductor substrate a stacked capacitor structure constituted of a capacity contact hole 10, an N+ contact hole 21, and a P+ contact hole 30. The capacity contact hole 10 is constituted of a polysilicon layer doped with N type impurities. Thereon, a conductor layer 40 which will become a lower capacity electrode, a capacity insulation film 50, a capacity upper electrode 60, and interlayer insulation films 70, 80 are formed in order. The N+ contact hole 21 is filled with the conductor layer 40 which will become a lower capacity electrode and with a conductor layer 40 of the same quality. The P+ contact hole 30 is formed after the other contact holes are filled and is ion-implanted with P type semiconductor. During this process, the conductor layer 40 at the bottom of the N+ contact hole 21 is never transformed into P type.
Patent JP-H0870359-A (JP)
Title: Isdn terminal adapter
Inventor: AKAMATSU KENJI
IPC: H04M11/00
Filed: 1994-08-29
Abstract: PURPOSE: To bear a communication cost on a call termination side by disconnecting a line after a call is originated from a call origination side terminal to the call termination side, calling back from the call termination side and performing communication. CONSTITUTION: At the time of bearing the communication cost on the call termination side, a call origination side switches this ISDN terminal adapter 32 from a normal mode to a callback mode at the time of call origination, originates the call and disconnects connection with the line 31 after the lapse of prescribed time. On the call termination side, calling back the call origination side terminal is performed when an opposite terminal is discriminated by terminal identification information, a data channel with the call origination side terminal is connected when the call origination side confirms that it is the calling back corresponding to the call origination from the present terminal by the terminal identification information and the calling back from the call termination side terminal 35 is realized.  Thus, the cost of data communication is changed to the call termination side without changing an application software for the data communication.
Patent JP-H0677377-A (JP)
Title: Lead frame for semiconductor device
Inventor: ISHIKAWA SHIN
IPC: H01L23/50
Filed: 1992-08-26
Abstract: PURPOSE:To provide a lead frame for a semiconductor device having excellent solder bondability and improved adhesive properties of Ni alloy plated layer. CONSTITUTION:The lead frame for a semiconductor device comprises a base member made of copper or copper alloy, a lower Ni-alloy plated layer having a compression stress formed at least on a semiconductor element bonding part and a wire bonding part of the member, and an upper Ni-alloy plated layer having a compression stress of 5kg/m<2> or less of a stress difference between the upper layer and the lower layer formed on the lower layer.
Patent JP-S6469399-A (JP)
Title: Card automatic feeder for ink film eraser
Inventor: YAMAGATA TAKESHI
IPC: B41F23/00
Filed: 1987-09-10
Abstract: PURPOSE: To automatically feed out a card, by mounting a cam which expands opposite spring pieces for holding a card, and mounting a sliding plate connected with a pressing plate and having a groove, and a pin inserted in the groove and circularly moved. CONSTITUTION: A pin 30 is slided in a groove 28 by the rotation of a disc 31 to slide a sliding plate 29, that is a pressing plate 25 along a guide 27, a point of the pressing plate 25 pushes out the lowermost card C in a case 23 from a passage port 26 through a gap 24 to place the same on a table 22. On the other hand, a spring piece 21' of a grasp body 16 is brought into contact with a cam face of a cam 18 to be pressed and expanded, and advances while expanding a gap with the other spring piece 21 to be moved on the both side edge positions the card C on the table 22, then the spring piece 21' is separated from the cam face of the cam 18 to press the card C to the spring piece 21 side, and the both sides of the card C is grasped by the spring piece 21'.  A printed ink film of the card C is separated at a position of a jet nozzle and washed by the water, and one spring piece 21' is expanded at a releasing position to drop the card C from a chute.
Patent JP-S6381792-A (JP)
Inventor: WATANABE KAZUHIRO
IPC: H05B33/10
Filed: 1986-09-25
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-2000042515-A (JP)
Title: Regenerating treatment of waste sand dust and fluidized calcination furnace used for the same
Inventor: KATO KAZUHIKO
IPC: B09B5/00
Filed: 1998-07-28
Abstract: PROBLEM TO BE SOLVED: To provide a regeneration treatment method for waste sand dust which makes it possible to obtain the reusable regenerated dust by regenerating the waste sand dust and makes a contribution to the effective utilization of resources and the reduction in the volume of waste, and a fluidized bed calcination furnace using the same. SOLUTION: The waste sand dust 22 obtd. by collecting the dust generated in a dry process regeneration machine for regenerating the waste molding sand is supplied into a calcining chamber 4 of the fluidized bed calcination furnace 1 housing silica sand 21 as base sand 20 at the bottom. The waste sand dust subjected fluidized calcination in the calcining chamber 4 and is made to flow over from an overflow port 41 opened in the upper position of the fluidized bed formed in the calcining chamber 4. This sand is recovered as the regenerated dust 40.
Patent JP-S61108769-A (JP)
Inventor: NANBU MIKIO
IPC: D06M15/643
Filed: 1984-10-29
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-2000071106-A (JP)
Title: Measuring device and method for rotational cutting parameter for rail cross section
Inventor: SANCHEZ REVUELTA ANGEL LUIS
IPC: B23B5/28
Filed: 1999-08-11
Abstract: PROBLEM TO BE SOLVED: To allow high accurate measurement by operating a measuring probe with an operation cylinder according to request of an operator from a numerical control device itself, measuring a measured surface of a wheel with its feeler, and processing the measurement result with a computer. SOLUTION: This measuring device arranged on a tool feeding table 7 of a pit lathe has a support block 1 for supporting a measuring probe 3 having a feeler 4, and the measuring probe 3 is displaced by operation of an operation cylinder 2. The feeler 4 abuts to the cross section of a wheel at several points, coordinates measured by X-axis and Y-axis coders of the tool feeding table 7 are sent to a numerical control device through an electric cable 5, and provided data is displayed on a screen. A personal computer processes the data according to protocol and files it. After the measurement, if re-machining of a part is required, a reference value is stored in the computer, and then measurement process is performed.
Patent JP-S6383114-A (JP)
Title: Production of low-gloss thermoplastic resin excellent in impact resistance
Inventor: KISHIDA KAZUO
IPC: C08F2/00
Filed: 1986-09-26
Abstract: PURPOSE:To obtain the title low-gloss resin excellent in impact resistance and processability, by polymerizing a butadiene polymer latex and a mixture of a vinyl cyanide monomer with an aromatic vinyl monomer each in a specified amount and polymerizing the remaining portions. CONSTITUTION:0.1-5pts.wt. (in terms of solid matter) acid group-containing copolymer latex (b) obtained from 3-30wt% acid group-containing monomer, 97-35wt% 1-12C alkyl group-containing alkyl acrylate and 0-48wt% monomer copolymerizable therewith is added to 100pts.wt. butadiene polymer latex (a) of pH >=7, comprising 100-70wt% 1,3-butadiene units and units of a copolymerizable monomer having the group of the formula to obtain a butadiene polymer latex (A) of a particle diameter >=0.2mum. 20-80wt% portion of 20-70 pts.wt. (in terms of solid matter) component A and 20-80wt% portion of a mixture (B) of 15-40wt% vinyl cyanide monomer with 85-60wt% aromatic vinyl monomer are polymerized together and the remaining portions of components A and B are polymerized.
Patent JP-H04107248-A (JP)
Title: Manufacture of galvannealed steel sheet
Inventor: HORI MASAHIKO
IPC: C23C2/06
Filed: 1990-08-28
Abstract: PURPOSE:To reduce the defect in the film of a galvannealed steel sheet caused by foreign matters by heating a steel sheet after subjected to galvanizing, alloying the galvanizing layer and melting zinc on the surface layer away. CONSTITUTION:A steel sheet 1 is galvanized by a galvanizing bath 4 in a plating tank 3 and is thereafter heated by using an allaying furnace 8, and the galvanizing layer is subjected to alloying treatment in such a manner that zinc is left on the surface layer. After that, the steel sheet 1 is immersed in a pickling tank 11 to melt zinc on the surface away. In this way, the galvannealed steel sheet having a beautiful film surface can be obtd.
Patent JP-S59121970-A (JP)
Title: Complementary type metal oxide semiconductor integrated circuit device
Inventor: NOZAWA HIROSHI
IPC: H01L27/092
Filed: 1982-12-28
Abstract: PURPOSE:To increase the degree of integration, and to improve yield by forming metallic wiring layers of three layers including a gate electrode. CONSTITUTION:A silicon oxide film is formed thinly on the surface of an N type silicon substrate 1, and a P well region 2 is formed. Sections corresponding to the source region 6 and drain regions 6' and 6'' of an N channel MOS transistor formed in the P well 2 are bored in the oxide film 4, and the ions of an N type impurity such as arsenic are implanted from the openings, thus changing these regions into N<+> regions. Likewide, sections corresponding to the source region 7 and drain region 7' of a P channel MOS transistor formed in the N type substrate 1 and a P well potential extracting port 8 in the P well 2 are bored in the oxide film 4, and the ions of a P type impurity such as boron are implanted, thus changing these regions into P<+> regions. One part of the oxide film 4 in the upper section of the P well potential extracting port 8 in the P well 2 and the source region 6 adjacent to the port 8 is bored, and a ground wire 10 consisting of a film made of aluminum and a silicon alloy and a titanium film is formed.