Patent GB-1417721-A (GB)
Title: Detection apparatus
IPC: G01N21/956
Filed: 1972-11-20
Abstract: 1417721 Image analysis HITACHI Ltd 20 Nov 1972 [19 Nov 1971 3 Dec 1971 23 Feb 1972 29 March 1972 28 July 1972 23 Aug 1972] 53528/72 Heading G1A In an arrangement for processing a portion of a pattern, a video signal is provided from the pattern, a binary signal corresponding to selected picture elements is derived by sampling and quantizing tehniques and this signal is stored in a two dimensional buffer memory which is connected to the processing circuitry. The binary conversion (quantization) may be by means of a fixed threshold level or, preferably, by a floating threshold arrangement Fig. 5. The conversion may be performed before or after sampling. The signals may be stored in the buffer memory via shift registers or analogue delay lines. SIGNAL PROCESSING 1. Boundary space method. Defects or "cogs" in a two level pattern are identified by small signal extracting logic circuits which produce an output if the state of a selected element is opposite to those of a pair of elements one adjacent to one side of the element and one spaced from the opposite side of the  element Figs. 17 and 18. The defects are differentiated from "cogs" or boundary lines produced by the quantization process by a boundary extraction method in which elements displaced on either side of a selected element are examined to determine whether they are the same, indicating a possible defect, or different indicating a boundary. This may be achieved by appropriate logic gating circuits Figs. 19 and 20. The outputs of the boundary extracting circuit and small signal extracting circuit are compared. 2 Expansion-contraction method. If the dark areas of the pattern are expanded any small light defects are filled-in so that when contracted the original pattern less the light defects is obtained. Similarly if the light areas are expanded and then contracted any dark faults are eliminated. Logic circuits for comparing the elements surrounding a selected element may be used to generate expanded or contracted patterns from elements stored in the buffer memory, the outputs being stored in a second buffer memory Fig.26. These patterns are returned to their original size by a complementary contraction or expansion to produce patterns in a third buffer memory which can be compared element-by-element with the original pattern by exclusive OR circuits to produce outputs corresponding only to defects Fig. 28. 3 Boundary averaging method. Elements may be detected as part of a boundary by considering the surrounding elements and determining whether or not the majority are of the same state as the selected element. This may be achieved by a plurality of majority logic gates connected between two stores Fig. 32A or by a single such gate processing each row (or column) of the stored data on a sequential basis Fig. 32B. 4 Small portion extraction method. A selected element may be considered to be on a boundary if, on analyzing each of a plurality of fields which together completely surround the element, there is at least one field all the elements of which have the same state as the selected element. This function may be achieved by suitably connected logic circuits and its inverse (every field contains at least one element whose state differs from that of the selected element) indicates the presence of a defect. In each case the extracted defects may operate an alarm or be displayed for example on a colour TV if desired together with the complete pattern in another colour.