Patent GB-1522192-A (GB)
Title: Demodulator circuit for colour television signals
IPC: H04N11/16
Filed: 1975-07-23
Abstract: 1522192 Television receivers INDESIT INDUSTRIA ELETTRODOMESTICI ITALIANA SpA 23 July 1975 [26 July 1974 17 Sept 1974 12 June 1975] 30736/75 Heading H4F An arrangement for demodulating a received colour television signal of the type having chrominance signals modulated on respective quadrature subcarriers, one of which is phase-inverted during alternate lines, (e.g. PAL or ISA) includes a synchronous demodulating means which receives the modulated subcarriers and also locally generated quadrature subcarriers which lie at 45 degrees to the modulated subcarriers and are synchronized with the colour bursts. The arrangement also includes means for delaying the received signal by an odd number of lines, the demodulated signal being derived from the delayed and undelayed signals. In one embodiment, Fig. 2, the received PAL signal passes directly to demodulators 11, 13 and via one-line delay 15 to demodulators 12, 14. Burst gate 2 passes the colour bursts to switch 4 which passes the NTSC line bursts to subcarrier generator 5 and the PAL line bursts to generator 6, or vice versa, dependent on the phase of half line frequency bistable 7. In the former case the subcarrier R from generator 5 is therefore at + 135 degrees to the U axis, and the subcarrier R from 6 is at - 135 to the U axis. Reversing switch 18, switched at half line frequency, passes R and R alternately to demodulators 11, 12 while passing R and R alternately to demodulators 13, 14. If the component of the received signal S during NTSC lines is α on the R axis and # on the R axis, and the component of the signal during PAL lines is α' on the R axis and #<SP>1</SP> on the R axis, then demodulators 11-14 will respectively provide repeating sequences α, α<SP>1</SP>; #<SP>1</SP>, #; #, #<SP>1</SP>; α<SP>1</SP>, α. Adders 16, 17 therefore provide α+α<SP>1</SP> and #+#<SP>1</SP> respectively during each line, and these outputs are maintained should the phase of bistable 7 reverse. The outputs pass to a matrix circuit, Fig. 6 (not shown), which provides the R, G, B signals. In a modification, Fig. 1 (not shown), the outputs of generators 5, 6 are fed directly to demodulators 11, 12 and 13, 14 respectively, and the reversing switch 18 receives the outputs of adders, 16, 17. Alternatively, the reversing switch receives the delayed and undelayed signal 1 and feeds demodulators 11, 13 and 12, 14, respectively Fig. 3 (not shown). In a modification of this alternative, two burst gates 2 are provided, connected to respective outputs of the reversing switch, Fig. 4 (not shown). A further arrangement, Fig. 7, includes an adder 52 and subtractor 53 which receive the signal I directly and via delay 51 to generate B-Y and R-Y subcarrier components. Burst gate 2 and half line switch 4 direct alternate bursts to generator 5, 6. The subcarrier generated by 5 is at +135‹ or - 135 degrees to the U axis, dependent on the phase of bistable 7, and the subcarrier at the output of inverter 56, switched at half line frequency, is at - 135 degrees and + 45 degrees alternately, or + 135 degrees and - 45 degrees alternately, so that demodulators 55, 56 provide signals proportional to R-Y and B-Y respectively during each line. The circuit of Fig. 7 is modified, Fig. 8 (not shown), for reception of an ISA signal, in which the colour burst is at 180 degrees to the U axis and occurs only in alternate lines. The burst gate 2 passes the burst via + 45 degrees and - 45 degrees phase shifters (60, 61) to a reversing switch (62) whose output passes to the generators 5, 6.