baber/WOPTO huggingface dataset:
Patent JP-H01209833-A (JP)
Title: Data transmitter-receiver
Inventor: SAKATA TAKASHI
IPC: H04L7/04
Filed: 1988-02-18
Abstract: PURPOSE:To omit an exclusive transmission line for transmission and reception by adding a data of logical H to the head of the data, holding the level of the final and preceding stages to logic L and starting the conversion after the logic H is detected in the conversion to parallel data. CONSTITUTION:The transmission/reception timing is set according to a sampling clock CLs and a transfer clock CLt in common to the transmission/reception side generated from a transmission side 10 or a reception side 20 by a data transmitter-receiver 30. In case of the conversion to a serial data, a data validity display section 12 adding the data of logic H to the head of the serial data synchronously with the rise of the clock CLs and holding the final and preceding serial data to logic L is provided to the sender side 10. In case of conversion to the parallel data, a data reproduction instructing section 22 detecting the data of logic H and starting the conversion is provided to the reception side 20. A clock control section 8 sets the transmission/reception timing.
Patent JP-S61194957-A (JP)
Title: Noise discriminating display circuit
Inventor: KAMIMURA TAKUZO
IPC: G10L25/00
Filed: 1985-02-22
Abstract: PURPOSE:To prevent the malfunction of the switching of transmission/reception in advance and to obtain a stable call state by adding a function that generates a noise section display signal discriminating the noise section over the specified level to a sound discrimination circuit. CONSTITUTION:When a level difference between a noise component A2 and a sound signal component A1 exists, the first comparator 38 generates a sound discriminating signald Vo the signal section of which becomes at an H level corresponding to the sound signal component A1 by comparison of a peak value voltage VC1 with a VC2. Also at the second comparator 44, a level discriminating signal VN which becomes at the H level in a level section that the peak value voltage VC1 is over a reference voltage VrefN is generated by comparison of the peak value voltage VC1 with the reference voltage VrefN. As a result, in an AND circuit 48, the level discriminating signal VN and the inverted signal Vo of the sound discriminating signal Vo that is obtained through an inverter 46 are added and a noise display signal VNO the high leveled noise section of which becomes at H level by AND of both is obtained.
Patent JP-H05280112-A (JP)
Title: House
IPC: E04B1/74
Filed: 1992-01-24
Abstract: PURPOSE:To prevent condensation by linking the attic space to the underfloor space through a wall space to connect them with a ventilating port, and controlling a blowing machine and a ventilating fan by a sensor installed in a living space to set the air pressure in the living space higher than the outside air pressure. CONSTITUTION:Outside fresh air taken from an air intake 9a of a blower 9 is discharged to the underfloor space 3 through a blowing pipe 10. The discharged air is made to stay in the underfloor space 3, a wall space 7 and the attic space 1 and, at the same time, the air pressure in each living space is increased. In addition, air passing through a ventilating port 12 is supplied into the living space to increase the air pressure in the living space. After that, the polluted air is discharged to the outside by a ventilating fan 15 through a pipe 14 from an exhaust port 13, and the blowing amount of the blower 9 and the ventilating amount of the ventilating fan 15 are controlled by a sensor 16 in each loving space 2. Accordingly, the saturated steam amount in the room space can be increased to prevent the generation of condensation.
Patent JP-S54126904-A (JP)
Title: Support of superconductive field coil
Inventor: YAMAMOTO HIROE
IPC: H02K3/46
Filed: 1978-03-27
Abstract: PURPOSE: To securely fix coil in order to avoid the movement of coil even in case where cracks develop in epoxy resin impregnated into between coils by  the procedure in which the outside tip portion of the intercell spacer is formed into wider width and the outside circumference end portion of the superconductive field coil is fixed.  
     CONSTITUTION: The superconductive field coil 3 is mounted on the symmetrical position of the rotary body 1, and then the head spacer 11 whose tip portion has widish width is mounted with the bolt 14, for example, on the outside circumference of the bottom spacer 13 provided between the cells and then the outside circumference end portion of the field coil 3 is fixed with the epoxy resin putty 9. Thus, even in case where cracks develop in the epoxy resin putty 9 due to elongation and contraction by cooling, the movement of the field coil 3 can be prevented, thus assuring superconductive stator of great quinch current and no imbalance occurrence. 
     COPYRIGHT: (C)1979,JPO&Japio
Patent JP-S62191941-A (JP)
Title: Cpu load display device
Inventor: YOSHIDA HIROYA
IPC: G06F11/32
Filed: 1986-02-18
Abstract: PURPOSE:To grasp the state of a load visually and intuitively by changing the flicker speed of a table lamp in accordance with the load state. CONSTITUTION:An LED circuit 7 and external control elements such as a sensor, motor and solenoid are connected to PIAs 5 and 6, respectively. A CPU 1 accepts interruption requests from a timer 4 and the PIA 6, and shifts to task processing according to the interruption cause if said request is given. A ROM 2 previously stores a program corresponding to each task processing, and the PIA 5 outputs a switching signal to display the load state of the CPU 1to an LED circuit 7. A counter 70 is constituted in N-notation terms, and a flip flop 71 is inverted when it receives the count-up signal of the counter 70. An LED 72 is connected to the output terminal of the flip flop 71, and lights up when the output terminal of the flip flop 71 becomes L. When switching signals are counted N-times with the counter 70 initially standing at zero, the flip flop 71 is inverted. At the moment the flicker state of the LED 72 is inverted.
Patent JP-S58151297-A (JP)
Title: Heat-sensitive recording type label sheet
Inventor: MARUTA KEIICHI
IPC: B41M5/28
Filed: 1982-03-04
Abstract: PURPOSE:To provide the titled sheet enhanced in resistance to oil and preservability at high temperatures and free from decoloration at printed parts, by a method wherein a specified phenolic compound is used as a color developer, and a specified color forming adjuvant is futher added to a heat-sensitive color- forming layer. CONSTITUTION:A heat-sensitive color-forming layer comprising as main constituents a colorless or light-colored leuco dye as a color former and a developer for developing the color of the color former when heated is provided on one side of a base, an overcoat layer consisting of a water-soluble resin is provided thereon, and the other side is treated to render adhesive to obtain a heat-sensitive recording type label sheet. In said label sheet, a compound of formulaIis used as said color developer. Further, a compound of formula II (wherein R1 is 10-30C alkyl; R2 is 1-5C alkyl)[e.g., N-octadecyl-4-methoxycarbonylbenzamide]is incorporated into the color forming layer, preferably in such an amount that the weight ratio between the leuco dye, the compound of formulaIand the compound of formula II becomes 1:(2-5):(0.5-3.5).
Patent JP-S61194724-A (JP)
Title: Mask pattern adjustment and mask to be used therefor
Inventor: MORIUCHI NOBORU
IPC: H01L21/027
Filed: 1985-02-25
Abstract: PURPOSE:To attempt the enhancement of precision in adjusting the coordinates of a pattern position and in lithographical overlapping by adjusting the stress appearing in the periphery of the mask pattern forming section made of thin film by a physical means. CONSTITUTION:A thin film 2 composed of boron nitride is adhered on the upper surface of a circular silicon frame 1. A central, square section of the film 2 constitutes the pattern forming section 2a on the surface of which a prescribed gold pattern is found, and the peripheral section surrounding the pattern forming section 2a constitutes a stress adjusting region 4 thinner than the most outside circumference. Fluid jackets 5 are installed at eight points, four corners of the pattern forming section 2a and four points close to the mid-points of each sides. In the jackets 5, fluid at a prescribed temperature is flown from the inlet opening 5a to the exit opening 5b to maintain the stress adjusting section 4 partially at a desired temperature, allowing the adjustment of expansion or shrinkage of constituent members. By this, strain occurring in the pattern forming section 2a is removed to enable exact adjustment of the coordinates of a pattern.
Patent JP-H03238994-A (JP)
Title: Driver for color display device
Inventor: KADOKURA YUSUKE
IPC: H04N9/73
Filed: 1990-02-15
Abstract: PURPOSE:To vary the white balance adjustment characteristic externally by using a variable clamp circuit so as to adjust a SYNC tip level of a primary color signal fed to a white balance circuit. CONSTITUTION:When the operator uses a keyboard of a remote control unit 4 to give a white balance adjustment command, a control circuit 5 decodes the adjustment and gives a control voltage data in response to the content of command to D/A converters 6, 7. The D/A converters 6,7 convert a control voltage data to be applied into an analog control voltage and the result is fed to voltage division points J1, J3 via resistors R13, R14. Thus, the SYNC tip level of input primary color signals R, B is adjusted. Thus, a white color point on a color face formed by R, G, B components represented by the input primary color signals R, G, B is moved in an optional direction.
Patent JP-H10233369-A (JP)
Title: Manufacture of semiconductor device
Inventor: SUZUKI ATSUSHI
IPC: H01L21/225
Filed: 1997-02-19
Abstract: PROBLEM TO BE SOLVED: To increase impurity concentration in a diffusion layer to be formed by a method wherein, before impurities are diffused into a semiconductor substrate from a film containing the impurities, ions are implanted into a part near the interface between the semiconductor substrate and the film containing the impurities. SOLUTION: A film 12 which contains impurities is formed on a region in which a diffusion region is to be formed at a semiconductor substrate 11. Fluorine is ion-implanted under a condition that a projection range is situated near the interface between the substrate 11 and the film 12. Then, the semiconductor substrate 11 is heat-treated quickly, and boron as impurities in the film 12 containing the impurities is diffused to the semiconductor substrate 11. A heating operation at this time is performed, e.g. as a lamp heating operation, and its condition is set, e.g. at 950 deg.C and a heating time of 10 seconds. As a result, the diffusion layer 13 whose surface layer is bonded shallowly can be formed on the semiconductor substrate 11.  Since the fluorine ions are implanted, the part near the interface contains the fkuorine, the fluorine in the film 12 containing the impurities accelerates the diffusion of the boron, and the impurity concentration of the diffusion layer 13 can be increased.
Patent JP-S56129948-A (JP)
Title: Data processor
Inventor: SUGA HIDEFUSA
IPC: G06F9/00
Filed: 1980-03-18
Abstract: PURPOSE:To enable to execute the processing of service request independently of the operation of central processing device, by processing the various service request from the service processing device and central processing device with the microprogram of the maintenance processor. CONSTITUTION:The maintenance processor 6 having the control memory device erasable is provided between the central processing device 2 and service processor 3, and to various service request from the central processor 2 and service processor 3, the interpretation of control signal and the giving/reception of data are processed only with the microprogram of the maintenance processor 6. Thus, even if the central processor 2 is not operated, the processing of service request is made possible. Further, the content of the storage device is changed to the microprogram suitable for the request, allowing to cope with the addition and alternation of service request softly.
Patent JP-H10229880-A (JP)
Title: Dna sequence coding gamma-cyano-alpha-aminobutyric acid synthesis enzyme
Inventor: IKEMOTO MASAHIRO
IPC: C12R1/01
Filed: 1997-02-19
Abstract: PROBLEM TO BE SOLVED: To obtain a specific DNA sequence useful for producing the subject enzyme having high activity to O-acetyl L-homoserine and capable of effectively producing γ-cyano-α-aminobutyric acid. SOLUTION: The DNA sequence is a base sequence of the formula or its mutation sequence. This sequence is obtained by treating DNA, which is extracted from culture media of Bacillus stearothermophilus, in PCR process, Sothern hybridization, Argus gel electrophoresis. The subject enzyme developed by incubating the obtained transformant which is transformed from a microorganism (Bacillus coli) by a recombined plasmid (pGCB10, etc.,) having this DNA sequence, is capable of massively producing γ-cyano-α-aminobutylic acid from O-acetyl-L-homoserine, etc., and the cyano compounds (or a sulfer containing amino acid from O-acetyl-L-homoserine and a sulfide) free from by-products and manifests a high temperature stability (60 deg.C).
Patent JP-S63204593-A (JP)
Title: Method for accessing dynamic memory
Inventor: YOSHINO RYOZO
IPC: G11C11/406
Filed: 1987-02-19
Abstract: PURPOSE:To remove a memory access queuing time due to refreshing operation by refreshing the final memory access cycle in a refresh available cycles set up to several times the bank period of a memory access cycle with priority and executing the memory access of other cycles with priority. CONSTITUTION:Dynamic memories 6, 7 are memory banks for respective memory devices and execute memory accessing operation or refreshing operation based on a refresh request signal from AND gates 14, 15 or a memory access request signal from AND gates 12, 13. The refreshing operation is executed with priority in the final memory access cycle out of the refresh available cycles and the memory accessing operation is executed with priority in the other cycles. Banks other than a bank executing the memory accessing operation is capable of executing the refreshing operation. Consequently, the probability of waiting can be reduced even at the time of memory access based on a random address or continuous addresses.
Patent JP-H08225448-A (JP)
Title: Percutaneously absorptive tape for local anesthetization
Inventor: SETOGUCHI YUJI
IPC: A61K47/12
Filed: 1995-02-23
Abstract: PURPOSE: To provide a percutaneously absorptive tape containing an amount of lidocaine enough to manifest anesthetic effect in a pressure-sensitive adhesive in a perfectly compatibilized state, thus capable of manifesting locally anesthetic effect in a short time through instantaneous percutaneous absorption of the local anesthetic when applied on a target site. CONSTITUTION: This percutaneously absorptive tape is obtained by providing the surface of a substrate with a pressure-sensitive adhesive layer consisting of a pressure-sensitive adhesive composition comprising a rubber-based pressure- sensitive adhesive, lidocaine as a local anesthetic and at least one kind of percutaneously absorbing auxiliary selected from among isopropyl myristate, isopropyl palmitate and crotamiton. In this case, the weight ratio of the undissolved amount (A) to dissolved amount (B) of the lidocaine is set at 0.1-2.
Patent JP-H02215519-A (JP)
Title: Manufacture of resin bumper
Inventor: IWAMOTO KATSUTOSHI
IPC: B29K105/04
Filed: 1989-02-16
Abstract: PURPOSE:To obtain a bumper having sufficient strength, light weight and high rigidity, by a method wherein a reinforcing fiber layer is provided on the outside of a bumper substrate formed of a foam and an FRP (Fiber Reinforced Plastics) layer is formed by casting and infiltration resin into the fiber layer. CONSTITUTION:A bumper substrate 9 is formed by molding a foam such as polystyrene in the first process. Then a reinforcing fiber layer 10 is provided on the whole of the outside of the bumper substrate 9 with the second process. The reinforcing fiber layer 10 is provided by winding a continuous fiber comprised, for example, of a glass fiber at least one time around the whole of the bumper substrate 9 through a filament winding method. It is preferable that at least a layer of continuous strand mat is used for the continuous fiber. The bumper substrate 9 is inserted within molds 11, 12 and, for example, unsaturated polyester is cast within the molds 11, 12 by fixed pressure. With this construction, an FRP layer 13a having a closed section running along a bumper form can be formed easily.
Patent JP-S58152297-A (JP)
Inventor: NOSE ISAMU
IPC: G10L15/22
Filed: 1982-03-08
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H04215481-A (JP)
Title: Three-dimensional contactless nonvolatile memory cell and its manufacture
Inventor: JIIICHIEEN JIEI TSUEN
IPC: H01L27/115
Filed: 1991-02-05
Abstract: PURPOSE: To attain increase in device density by forming a 1st polysilicon layer, sufficiently thick so as to attain capacitive coupling to a control gate member along with the vertical area of a floating member. CONSTITUTION: After a gate oxide 11 has been formed, a 1st polysilicon layer 12 is deposited on a substrate 10. In order to increase capacitive coupling to the control gate member, the 1st polysilicon layer is formed sufficiently thick. By thickening the vertical dimension of the 1st polysilicon layer 12 as prescribed, capacitive coupling between a floating gate and a control gate is improved. Coupling is improved by increasing the vertical height of the floating gate, but the dimension of a device in the side direction is not enlarged by it. Therefore, the total density of cell is markedly improved.
Patent JP-S55129994-A (JP)
Title: Semiconductor memory device
Inventor: NOKUBO SEIJI
IPC: G11C11/417
Filed: 1979-03-26
Abstract: PURPOSE:To obtain a high-speed and large-capacity semiconductor memory device by using a MIS transistor for the memory cell and by using a bipolar transistor for the peripheral circuit. CONSTITUTION:Memory cell array 11 has a j-row and i-column constitution. X address inputs X0-Xm and Y addresses Y0-Yn are inputted to address buffers 12x ans 12y respectively, and their outputs are supplied to address driver circuits 13x and 13y, and array 11 is driven by their outputs. Read/write control circuit 14 sends a read/write control signal and the anti-phase signal of a write enable signal to array 11 and output sense amplifier circuit 15 respectively. Differential amplifier 17 is connected to each pair of digit lines of array 11, and read signal amplified by amplifier 17 is set to a desired output level by circuit 15 and is sent to terminal 18. By this constitution, power consumption and the occupied area are reduced by constituting array 11 by FFs consisting of MIS transistors, and the high-speed operation is possible by using the bipolar transistor for the peripheral circuit.
Patent JP-H03239182-A (JP)
Title: Control system of induction motor for compressor
Inventor: HAYASHI YOSHIO
IPC: F04B27/06
Filed: 1990-02-15
Abstract: PURPOSE:To continue operation of a compressor even if a malfunction occurs at a signal of a position detector by maintaining a driving torque of an induction motor during one revolution constant if a signal corresponding to the rotary angle of a compressing element is malfunctioned. CONSTITUTION:When a position detection signal is normally obtained, a torque control operation is performed at a set frequency being fr, and when the set frequency is between the frequency fr and a frequency fmax, a normal operation of a PWM waveform is performed. If a position detection signal is not normally obtained, the normal operation of the PWM waveform is conducted between a frequency f'R and a frequency fmax. When the set frequency is f'F is less, the set frequency can be raised to the f'F.
Patent JP-S57151647-A (JP)
Title: Thermoplastic resin composition
Inventor: SUZUKI ATSUSHI
IPC: C08L81/02
Filed: 1981-03-13
Abstract: PURPOSE: To prepare the titled composition having remarkably improved heat resistance and useful as automobile parts, etc., by adding a polyamide-imide resin to a polyarylene sulfide resin containing relatively large amount of fillers.  
     CONSTITUTION: (A) 25W50pts.wt. of a polyarylene sulfide resin having the recurring unit of formula [Ar-S] (Ar is bivalent organic residue having 6-membered ring) as main structural unit, is mixed with (B) 45W70pts.wt. of fillers (e.g. abrasion resistance improving agent, etc.) and (C) 0.1W5pts.wt. of a heat-resistance improving agent comprising a polyamide-imide resin having the recurring unit of formula (Ar' is trivalent aromatic residue having 6-membered ring; R is bivalent aromatic and/or aliphatic residue; R' is H, methyl or phenyl) as the main structural unit (70W100mol%), under melting and kneading at 250W400°C to obtain 100pts.wt. of the objective resin composition. 
     COPYRIGHT: (C)1982,JPO&Japio
Patent JP-H07220134-A (JP)
Title: Polishing and cleansing device for coin and medal
Inventor: OYA TAKATOSHI
IPC: B08B1/02
Filed: 1994-02-07
Abstract: PURPOSE:To provide a polishing/cleansing device which can clear away the stubborn stains attached on both sides of coins, medals, etc., by its high polishing/cleansing power. CONSTITUTION:A pair of upper and lower polishing cloths 1 and 2 are set opposite to each other between a pair of upper and lower case bodies 5 and 6 with a slight contact secured between both cloths. Then one of both ends of each of cloths 1 and 2 is mostly wound round each of center shaft 21 and 22 of both bodies 5 and 6 respectively. Meanwhile the other end of each of both cloths is attached to each of take-up shafts 23 and 24 of the take-up boxes 17 and 18 connected to the motors 19 and 20 respectively. The cleansing fluid applying tools 30 and 31 are vertically placed opposite to each other between the cloths 1 and 2 and a coin supply path 3. Then the cleansing fluid 13 is supplied to the tools 30 and 31 from a cleansing fluid tank 29 via the pipes 32 and 33. A path is formed for coins 7 between the path 3 and the cloths 1 and 2. A controller 28 is connected to both motors 19 and 20 and also to a coin count sensor 27. Then the motors 19 and 20 are driven by the signals received from the sensor 27.
Patent JP-S58153197-A (JP)
Inventor: FUKUHARA NORIO
IPC: G21C11/00
Filed: 1982-03-06
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S58151504-A (JP)
Title: Position detecting device
Inventor: NARIMATSU AKIYOSHI
IPC: G01B5/016
Filed: 1982-03-05
Abstract: PURPOSE:To execute a measurement even if an object to be measured is an insulator, by forming a conductive film on one of the holding members for holding an electrode contact, forming the other by an insulator, and providing a switching function. CONSTITUTION:An electrode contact 21 is fitted to one end of a stylus 22, and the other end is fixed to the first holding member (disk 23) in a housing 26. The circumferential part of the disk 23 forms a rotating curved surface body 24. On the bottom part of the housing 26, the second holding member 25 is provided,  and the rotating curved surface body 24 and the second holding member 25 are  made to press-contact by a spring 28. The contact face of the holding member 25 makes a concentrical circle with the electrode contact 21. On the rotating  curved surface body 24, metallic films 29a-29c are provided on positions which  are divided into three almost equally, and terminals 29a'-29c' are placed, are  drawn out by a lead wire, and are connected to an OR circuit OR. The rotating  curved surface body 24 consists of an insulator, and in a moment when the electrode contact 21 contacts with an object to be measured (conductor or insulator),  contact of the metallic film becomes an off-stage by mechanical displacement,  and the position is detected.