Patent GB-1401690-A (GB)
Title: Channel selecting apparatus
IPC: H04N5/44
Filed: 1972-12-07
Abstract: 1401690 Channel selecting apparatus; transistor meeting circuits MATSUSHITA ELECTRIC INDUSTRIAL CO Ltd 7 Dec 1972 [10 Dec 1971 (8)] 56430/72 Headings H3Q and H3T In a channel selecting apparatus comprising main and subordinate local oscillators 3, 6, Fig. 1, each alternately sweeping a frequency range equal to the frequency interval between channels, a detector 8 detects the difference frequency between the oscillators and provides output signals for alternately changing the sweeping and non-sweeping states of the oscillators and to a counter 16, a start selection means 21 generates a channel selection starting signal when two keys of a keying means 13 are depressed to start the sweeping of the oscillators 3, 6, a memory 15 is coupled to the keying means 13 for storing the channel selected by the keying means and a comparator 16 compares the outputs from the memory 15 and the counter 16 so that on coincidence a gate 18 operates to stop the sweep of the main oscillator 3. On operation of the second key an output j is obtained from a bi-stable flip-flop 21 which is differentiated and is fed as an input K to reset main and subordinate voltage sweep circuits 11 and 12, a bistable flip-flop 10 and a counter 16. This sets the subordinate local oscillator 6 to a reference channel frequency and starts the main voltage sweep circuit 11 to sweep the frequency of the main local oscillator 3. When the difference between the oscillators 3 and 6 is equal the channel frequency interval thus is detected by a frequency detector 8 which operates the flip-flop 10 to change over the oscillators so as to start the sweep of 6 and stop the sweep of 3. This continues until the count registered in counter 16 corresponds to that read in a memory 15 by the keyboard 13. Then the coincidence indicated by the comparator 17 stops the operation of the flip-flop 10 and stops the sweep of the operating oscillator 3, 6. The channel required is now selected and the tuning voltage is stored in a voltage storing circuit 11<SP>1</SP> which includes a FET (29, Fig. 4, not shown). The output from the voltage sweep circuit (26) 11 is fed to this FET via a switch (30) which is controlled to be closed on initiation of a channel selection and to be opened on establishing the required channel. While making a channel selection the power supplies to the VHF and UHF tuners (35, 36, Fig. 5, not shown) are disconnected by switching circuits (31, 32). Also during channel selection a transistor 41, Fig. 6 is turned on to disable an AGC voltage applied at 39 so as to render the IF amplifier 40, (4, Fig. 1) inoperative to mute the audio and vision signals. Alternatively the power supply of the IF amplifier may be disconnected or the amplification of the audio and video circuits 23, 24 are lowered. A cicuit is disclosed (Fig. 8, not shown) which prevents wrong operation of the channel selection if three keys are pressed the flip-flop 21 being shown as (45). A multiplexer circuit 20 operates to provide lower VHF, higher VHF and UHF band switching for the oscillators 3 and 6. Also the multiplexer 20 makes transistors (52 1 , 52 2 , 52 3 , Fig. 9, not shown) of a gain control circuit 22 selectively conductive to differently control the amplification of the subordinate IF amplifier 7 for the lower VHF, higher VHF and UHF bands. The circuit which determines the reference frequency of the subordinate sweep frequency is disclosed (Fig. 11, not shown). This includes a h.f. amplifier (57) for positioning between the local oscillator 6 and the mixer 5. The local oscillator is shown as (56) and has a reference voltage power source 60 connected to the varactor diode (59) of the local oscillator. The h.f. section (57) has a voltage produced by the emitter base voltage of a transistor (62) and the forward voltage of a group of diodes (63) equivalent to the power source (60) superposed on the tuning voltage from the sweep circuit (58). A character generator 19 is provided for displaying the number stored in the memory 15. Specifications 1,377,100 and 1,389,071 are referred to.