Patent GB-820309-A (GB)
Title: Improvements in and relating to electrical analogue signal multiplication circuits utilizing pulse width modulation
Inventor: ALLMARK REGINALD HUGH
IPC: G06G7/161
Filed: 1955-03-10
Abstract: 820,309. Electric analog calculating systems. ENGLISH ELECTRIC CO. Ltd. March 8, 1956 [March 10, 1955], No. 7117/55. Class 37. An electric analog multiplying circuit comprises in combination a pulse generator fed with a cyclically recurrent control signal operative to generate alternate negative and positive pulses of equal amplitude, width modulated in proportion to an input signal, a smoothing circuit deriving a direct current signal proportional in strength to the D.C. component of the generated pulse signal, a comparator circuit responsive to the difference between a first analog signal and such direct current signal to develop the input signal, whereby feedback action renders the width modulation of the pulse signal linearly dependent on the amplitude of the first analog signal; there being also provided an amplitude modulator operative upon the pulse signal in response to a second analog signal whereby the pulse amplitude is made proportional to the amplitude of the latter, and a further smoothing circuit deriving therefrom a direct output signal proportional to the D.C. component of the amplitude modulated pulse signal and to the product of the analog signals. In Fig. 2, a comparator 13 receives an input signal from amplifier 16 and a sawtooth waveform from generator 14 to develop a rectangular pulse train width modulated by the input signal Y which is converted by amplifier 15 to an output signal with sharply defined leading and trailing edges which varies between equal positive and negative excursions with respect to zero, and whose pulse width is linearly proportional to Y. This is fed back over a smoothing circuit 17 to a subtraction circuit 18 where it reduces the analog signal Y of amplifier 16 to a low value, whereby inaccuracies due to circuit non-linearities are removed and the pulse train output from amplifier 15 is accurately width modulated in response to Y. Analog signal X is phase split at 21 to signals Œ X energizing modulator 20 to proportionately amplitude modulate the output of amplifier 15 to a signal 22 which is passed through smoothing circuit 23 (having similar characteristics to smoothing circuit 17) and amplified to a D.C. signal proportional to XY. Fig. 3 shows a detailed embodiment wherein a comparator (Fig. 1, not shown) having a double triode with a common cathode resistance and a load resistance in one anode only receives at its grids respectively an input signal Y and a sawtooth waveform to develop a width modulated signal at grid 30a of a double triode 30 having distinct anode resistors, a common cathode resistor, and negatively biased grid 30b to operate as a squaring amplifier generating rectangular anode signals, which are antiphasely coupled to the grids of amplitude modulator double triode 34, which has a common cathode resistor and its anodes connected in series through double diode 37 and common anode resistance 38 to a high-tension source; the cathode follower triodes 35, 36 whose anodes are connected to high-tension and cathodes to the respective cathodes of 37, and the anodes of 34, being energized with phaseopposed signals Œ X. The circuits of anodes 34a, 37c; 34b, 37d; respectively are alternatively conductive and blocking on successive cycles of the width modulated signal on grid 30a, and voltages Œ X are superimposed across resistance 38 and the respective diodes so that the common anode voltage across resistance 38 represents the amplitude and width modulated signal 22 which after smoothing represents product XY. The signal at anode 30d after smoothing in circuit 17 is fed back inversely to the input of amplifier 16.