baber/WOPTO huggingface dataset:
Patent JP-2000122054-A (JP)
Title: Surface light source device and liquid crystal display device using the same
Inventor: SUGA YOSHINORI
IPC: G02F1/1335
Filed: 1998-10-12
Abstract: PROBLEM TO BE SOLVED: To make a liq. crystal display device with a simple and easily productive structure holding satisfactorily a broad angle of visibility property and elevating front brightness with using scattered light having high brightness and high directivity generating from a roughened surface, light scattering particulate or the like. SOLUTION: A surface light source device 10 is provided with one surface of a light emitting surface 15, light sources 12 in at least a pair of side end parts 11a, 11b placed opposite to each other in a light guide body 11 providing a light emitting system, and a light control sheet 17 on the light emitting surface 15. In this case, the angle of visibility distribution of a outgoing light beam 20 obtaining after transmitting the control sheet 17 by an incident light beam from only one side end part 11a is specified to be at a position, in which a peak position of brightness is leaned in an angle more than 5 degree from a normal 21 direction of the light emitting surface 15.
Patent JP-2000123051-A (JP)
Title: Device for optimizing design
Inventor: YAMAMOTO NAOHIRO
IPC: G06F17/50
Filed: 1998-10-12
Abstract: PROBLEM TO BE SOLVED: To provide a device for optimizing design for properly operating the layout design of a PCB(print circuit board) and LSI(large scale integrated circuit) design in a PCB level, that is, a board level by relating those design with each other. SOLUTION: This is a design optimizing device 100 for properly operating the layout design of a PCB and LSI design in a PCB level by relating those design with each other. This device is provided with a waveform characteristic analyzing part 110 for analyzing the waveform characteristics of each input and output terminal of the LSI in a PCB level by using arranged wiring information as a parameter by obtaining the characteristic information of the driver of the LSI at the LSI design side, and treating the circuit of the PCB as a distribution constant system circuit, or for analyzing the waveform characteristic of each input and output terminal of the LSI by using characteristic information 155 of the driver of the LSI at the LSI design side as a parameter by obtaining the arranged wiring information being the PCB layout design data at a PCB layout design part side,  and treating the circuit of the PCB as the distribution constant system circuit. Also, this device is provided with a library 120 constituted of the various kinds of characteristic information of the driver of the LSI at the LSI design side.
Patent JP-H01130687-A (JP)
Title: Furtive glance and interception preventing system
Inventor: KITA TERUHIDE
IPC: H04N7/16
Filed: 1987-11-17
Abstract: PURPOSE:To prevent the free glance and interception of a charged channel for a time more than a predetermined time by the viewer of a CATV by changing the processing sequence of a CATV terminal equipment. CONSTITUTION:When the charged channel is selected by the exceeding the number of times of predetermined free viewing, while keeping a state capable of input an intention that only the indication of CATV terminal equipment is a charged channel by recognizing a charged account and continuing viewing as the charged channel by the viewer, a television receiver indicates a free channel, as it is. Thereby, the charged channel can be prevented from being viewed free of charged and when the intention for recognizing the charged account is generated in the viewer, an input can be received.
Patent JP-H09132625-A (JP)
Title: Catalyst for isocyanurate-modified polyurethane foam and production of isocyanurate-modified polyurethane foam by using the same
Inventor: YOSHIMURA HIROYUKI
IPC: C08J9/04
Filed: 1995-11-08
Abstract: PROBLEM TO BE SOLVED: To obtain a highly active catalyst for the production of an isocyanate- modified polyurethane foam, which can give a lowly odorous foam by using an alkali metal nitrite or an alkaline earth metal salt as the principal component. SOLUTION: An alkali metal nitrite (e.g. sodium nitrile) or an alkaline earth metal salt (e.g. calcium nitrite) as the principal component is optionally mixed with a tert. amine (e.g. triethylamine) to prepare a catalyst, A polyol (e.g. polyetherpolyol) is reacted with a polyisocyanate (e.g. toluene diisocyanate) in the presence of the above catalyst and a blowing agent (e.g. hydrochlorofluorocarbon) to obtain an isocyanurate-modified polyurethane foam having an isocyanate index of desirably 110-500. The obtained foam has a low density and is excellent in resistance to surface friability, bonding strength, etc.
Patent JP-S63144071-A (JP)
Title: Decorating method for metallic blank material
Inventor: HIRAI MASATOSHI
IPC: B41M7/00
Filed: 1986-12-05
Abstract: PURPOSE:To enable a pattern or the like formed of a printing ink to be preserved for a long time without falling off, by subjecting a metallic blank material to a ground treatment, printing on the treated surface by using a non-conductive printing ink, and subjecting the ground-treated surface to an electrodeposition treatment, followed by baking. CONSTITUTION:A metallic blank material consists of a stainless steel or the like or a composite material comprising a plastic body the outer surface of which is plated with copper or the like, and a ground treatment for the blank material is an electrolytic or non-electrolytic chromate treatment or the like. Printing is conducted by forming characters, patterns or the like on the ground-treated surface by using a printing ink having excellent non-conductivity, while said ink is prepared by mixing a dye or pigment into a non-conductive vehicle, and drying the printed surface to harden the ink, followed by subjecting the ground-treated surface to an electrodeposition treatment. In the electrodeposition treatment, an electrodeposited surface is not provided on the parts facing the patterns or the like, but a lustrous beautiful electrodeposited surface is provided on the entire part of the metallic blank material except the patterns or the like, in a raised state, so that the patterns or the like is provided in a sunken state in the electrodeposited surface.
Patent JP-2001109192-A (JP)
Title: Toner for developer, fixing device in image forming device and fixing method
Inventor: KUROYAMA KOICHI
IPC: G03G9/08
Filed: 1999-10-13
Abstract: PROBLEM TO BE SOLVED: To obtain a well fixed image and to prevent the contamination of the image by offset toners and paper jamming at the time of fixing by preventing the wrapping of toners around a fixing roller and the offsetting of the toners while assuring good fixing performance in fixing by the fixing roller not coated with a silicone oil. SOLUTION: The toner image is formed by the toners having a melt index of 1 to 4 g/10 min at an environmental temperature of 150 deg.C on sheet paper P. This toner image is heated and press fixed by the fixing roller 17 having a fixing temperature of 160 to 190 deg.C and a nip time of 0.025 to 0.040 sec, by which the toners are sufficiently melted and the fixed image having a high smear level and toner remaining rate is obtained and the lowering of the viscosity of the toners is prevented. Then, the wrapping of the sheet paper around the fixing roller 17 not coated with the silicone oil and the toner offsetting are thus prevented.
Patent JP-H05100359-A (JP)
Title: Silver halide photographic sensitive material
Inventor: TODA SATORU
IPC: G03C1/76
Filed: 1991-10-11
Abstract: PURPOSE:To obtain a silver halide photographic sensitive material having high antistatic property without deteriorating photographic performance and film strength, preventing the occurrence of a mark of leaching on the surface of the sensitive material after development and causing no trouble to transfer in the drying zone of an automatic processing machine. CONSTITUTION:This silver halide photographic sensitive material has one or more silver halide emulsion layers on the base and contains a dispersed anionic crosslinked polymer represented by the formula, wherein A is a crosslinkable monomer having two or more copolymerizable ethylenic unsatd. groups, B is N,N-dimethylacrylamide or N-acryloyl-morpholine, D is a copolymerizable ethylenic unsatd. monomer, R is H, alkyl or halogen, L is a di-, tri- or tetravalent combining group, M is H or a cation, (k) is 0-1, (m) is 1-3, (x) is 1-70wt.%, (y) is 1-50wt.%, (z) is 25-98wt.%, (w) is 0-50wt.% and x+y+z+w=100 wt.%.
Patent JP-H10129607-A (JP)
Title: Packaging equipment
Inventor: HIRASAWA TORU
IPC: B65B9/073
Filed: 1996-10-31
Abstract: PROBLEM TO BE SOLVED: To provide quite epochmaking packaging equipment which has drastically improved positioning accuracy, can keep an object to be packaged at a constant interval and can process bag making nicely in an easy way by improving further the construction of a shutter panel. SOLUTION: A panel form positioning shutter body 15 is provided to lie between a film 1 folded in two at a transportation side from the input position of an input part 4 into which an object 3 to be packackaged is manually input or automatically input by supplying equipment and at the front side of transportation from horizontal sealing equipment. The shutter body 15 is so constructed that the same moves to the transportation side and to move upward for rotation turnout, and then returns downward for ratation movement to move to the front side of trarnsportation in a condition in which the shutter is kept closed.
Patent JP-H05218009-A (JP)
Title: Formation method of interlayer insulating film of semiconductor device
Inventor: KIN CHIYOUKEI
IPC: H01L21/3105
Filed: 1992-10-29
Abstract: PURPOSE: To provide a method of forming a layer-insulating film for semiconductor device at a low temp. with good flow by shutting off sulfuric acid boiling or reaction with the air atoms to reduce external shocks, thereby avoiding breaking of a high concn. BPSG. CONSTITUTION: This method comprises steps of depositing an insulation film contg. B and P at high concns. on a semiconductor substrate, treating the surface of the deposited film with a plasma 3, and reflowing it at a low temp.
Patent JP-H02136236-A (JP)
Title: Structure of reinforced part of car body
Inventor: ITO KAZUTOSHI
IPC: B32B15/08
Filed: 1988-11-17
Abstract: PURPOSE:To prevent a steel plate after baking treatment to be exposed and corroded by mixing a magnetic powder with the main body of a reinforcing member and providing the reinforcing member on an electrodeposition film formed into a panel and forming an intermediate coat film along with the electrodeposition film and the reinforcing member. CONSTITUTION:Cation electrodeposition coating treatment is applied to the inside surface of an outer panel 10a and baking treatment is subsequently applied thereto to form an electrodeposition film 13. A reinforcing member 12 is provided on this electrodeposition film 13 and a protective layer 12b is formed to said reinforcing member 12. The reinforcing main body 12a of the member 12 is magnetically attracted to the outer panel 10a by the magnetic force of a magnetic powder 14. When intermediate coating is applied to form an intermediate coat film 15, the reinforcing member 12 is strongly bonded to the panel. By this method, even when the electrodeposition film is contracted by cooling after baking treatment, a steel plate is not exposed and the corrosion thereof can be prevented.
Patent JP-S62150884-A (JP)
Title: Semiconductor device
Inventor: KISHI TAKAO
IPC: H01L29/72
Filed: 1985-12-25
Abstract: PURPOSE:To prevent a specific division transistor due to a current concentration from being deteriorated or damaged by compensating the aluminum wiring resistance difference of division transistors on the collector side by the aluminum wiring resistance difference on the emitter side to substantially equalize the aluminum wiring resistance of the transistors. CONSTITUTION:Stripelike or pectinated collector electrodes C and emitter electrodes E are alternately opposed in three divided transistors (stripe transistors) TR1-TR3. The electrodes C are connected via aluminum wirings Al1, and its terminal P1 is disposed near the TR1. The electrode E is, on the other hand, connected with aluminum wirings Al2, and its terminal P2 is disposed near the TR3, i.e., at the position opposite to P1. Thus, the wiring resistances to emitter and collector terminals from bonding pads P1, P2 become substantially the same to prevent a current concentration to the specific division transistors, thereby preventing the elements from being deteriorated or damaged.
Patent JP-H06115253-A (JP)
Title: Organic thin film and optical information recording medium using the same
Inventor: SATO TSUTOMU
IPC: G11B7/24035
Filed: 1992-10-05
Abstract: PURPOSE:To produce an optical information recording medium of high sensitivity and high resolution, by forming a film of an associated composition comprised of a specific compound and at least one compound selected from a group consisting of a secondary higher alcohol sulfate, sulfosuccinate and alkyl naphthalenesulfonic acid. CONSTITUTION:An organic thin film is obtained by using an associated composition comprised of a compound A represented by the formula and at least one compound B selected from a group consisting of secondary higher alcohol sulfate, sulfosuccinate, and alkyl naphthalenesulfonic acid, and by a thin film formation method, for example by dissolving the A and B compounds in a solvent and forming a film on a substrate by a solvent application method. In the formula, R<1>-R<4> each represent an alkyl group having 1-18 substituted or unsubstituted carbon atoms. R<1>-R<4> may be the same or different. X<-> represents acid anion. n represents 1 or 2.
Patent JP-S62148036-A (JP)
Title: Joining device for thin metallic plate
Inventor: INABA HIRAKAZU
IPC: B21D39/03
Filed: 1985-12-24
Abstract: PURPOSE:To join firmly a thin metallic plate by a simple device by using a die body as a split die and clamping its outside peripheral wall by a coil spring, at the time of bringing plural pieces of superposed thin metallic plates to an upsetting deformation by a punch and a die. CONSTITUTION:Two pieces of thin metallic plates are pressed by a punch 3, in a superposed state, and pressed against the upper end face of a die body 4. Also, the push-in stroke of the punch 3 is increased, the pressure receiving part of the thin metallic plate is bulged in the pressure direction, and a cylindrical projecting part 8 is formed. This die body 4 is a split die consisting of plural pieces of movable die pieces 4a-4d, and its outer peripheral wall surface is always clamped toward the center in the radial direction by a surrounding annular coil spring 7. Therefore, when the projecting part 8 stands still by the static pressure receiving surface 5 of a shaft-shaped pressure receiving member 6, it is bulged in the radial direction of a die hole 2 against a clamping force of the coil spring 7. In this way, the projecting part 8 is upset as integral structure, and two pieces of metallic thin plates are joined firmly.
Patent JP-S62152373-A (JP)
Title: Current detector for inverter
Inventor: KAI TORU
IPC: H02M7/48
Filed: 1985-12-24
Abstract: PURPOSE:To enable motor current to be detected even in the case of the full conduction of the transistors of a PWM inverter, by estimating motor current from carrier cycle, motor inductance, and power voltage. CONSTITUTION:A current amplifier for amplifying a deviation between current command and motor current with an operational amplifier 20 is formed, and a voltage comparator 21 modulates pulse length on carrier frequency. The pulse length modulation signal is converted to drive signal for transistors 1Tr, 2Tr, in a conversion circuit 33. A sampling pulse generation circuit 23 generates sampling pulse synchronized with the carrier frequency, and voltage sample-held by resistances 17-19 and an operational amplifier 24 is detected as the motor current.
Patent JP-H05130386-A (JP)
Title: Picture processing unit
Inventor: KADOWAKI TOSHIHIRO
IPC: H04N1/00
Filed: 1991-11-07
Abstract: PURPOSE:To attain reading, transfer and output of picture data in excess of a memory size of a picture memory. CONSTITUTION:Picture data read by a picture read section 17 and written in a picture memory 6 are sent from an external interface circuit 5 to a host computer 4 via a magnification/reduction circuit 20 under the control of a CPU 1. When a data size of the picture data to be commanded is larger than the memory size of the picture memory 6, the magnification/reduction circuit 20 reduces the size so as to be stored in the picture memory 6 and writes the reduced data to the picture memory 6. At the transfer of data to the host computer 4, the magnification/reduction circuit 20 is used to magnify the data with a magnification so as to obtain the data size commanded by the host computer 4. Even when the picture data written in the picture memory 6 are reduced by the magnification/reduction circuit 20 and transferred to the host computer 4 through the command, the magnification/reduction circuit 20 is used at the transfer to magnify the data with a magnification so as to obtain the size before the reduction.
Patent JP-H01130557-A (JP)
Title: Semiconductor memory and manufacture thereof
Inventor: SATO SHINICHI
IPC: H01L27/10
Filed: 1987-11-17
Abstract: PURPOSE:To increase the load of a stored charge in a passivle element region and to contrive the miniaturized formation of a device by a method wherein the passive element region between the sidewall surfaces of one block is taken wide. CONSTITUTION:Grooves 12 and 13 are formed on the side of the main surface 11 of a substrate 10 to section into a multitude of regions and blocks 14 are constituted. A capacitor region 16 is provided between the sidewall surfaces of one block and the grooves 12 and 13 and conducting layers 22 and 23 are formed. Moreover, an electrode layer 24 and an isolation region 25 are formed on the surface of the layer 23. By this constitution, the wide area of a capacitor can be secured. Thereby, a sufficiently large charge is stored in the region 16 and the microscopical formation of a device can be contrived without causing a reduction in reliability due to a soft error and so on.
Patent JP-H04163981-A (JP)
Title: Optical transmission circuit
Inventor: KANEKO TOMOYUKI
IPC: H04B10/50
Filed: 1990-10-29
Abstract: PURPOSE:To maintain an excellent transmitting state even if characteristics of a laser diode(LD) are deteriorated by providing a feedback loop for maintaining an optical peak output value in addition of a feedback loop for maintaining average optical output of the LD constant. CONSTITUTION:When characteristics of an LD are deteriorated, an average value of optical output waveform is increased by a feedback loop for passing a current average value detector 5, but the waveform of the optical output is lower than that in a normal state. Thus, a pulse current of a pulse current driving circuit 1 is increased by the loop for passing a current peak value detector 8, and the peak value becomes the same as an optical output waveform before deterioration. However, thus, since the average value is increased, two feedback loops are so operated that the average current value and the peak current value become the same at the initial to prevent decrease in S/N even if the LD characteristics are finally deteriorated.
Patent JP-H09134149-A (JP)
Title: Picture display device
Inventor: YAMAZAKI KOJI
IPC: G09G3/36
Filed: 1995-11-09
Abstract: PROBLEM TO BE SOLVED: To display a picture of high quality and resolution by preventing deterioration in the picture quality due to variance of a signal processing circuit of phase development, etc., in a picture display device performing phase development and displaying in a picture display means. SOLUTION: One of six phase-developed picture signals V1(i) which are held in each sample holder 51a-51f of a phase development circuit 50 is selected by analog switches 62a-62f of a rotation circuit 60 and is outputted as picture signals V(i) for panel drive. Further, by changing a combination selected by analog switches 62a-62f, an influence on the picture signals for panel drive V(i) due to variance of the circuit characteristics in the phase development circuits can be dispersed timewise and spacewise on a liquid crystal panel and picture quality is improved.
Patent JP-H01135179-A (JP)
Title: Facsimile equipment
Inventor: KATSURAGI SHIGERU
IPC: H04N1/32
Filed: 1987-11-20
Abstract: PURPOSE:To discriminate easily and surely an error page unable to be sent by recording the result of transmission and part of a picture of each page to each page of an original in each processing as a report representing the result of transmission. CONSTITUTION:If any error page not sent exists in the transmission of an original of plural pages, since part of the picture of each page sent correctly is recorded as the transmission management report, the error page unable to be sent is easily discriminated by collating the content of original and the recorded picture. In case of the transmission of different originals especially to the same destination for the plural number of times of transmission, there is a possibility to mis-discriminate the error page in a conventional equipment because of the mistaken correspondence between the items on the report and the original, but the content of original and the picture recording are collated in this way so as to discriminate surely without mistake of the error page.
Patent JP-S61235428-A (JP)
Inventor: UIRIAMU PEITON ROBAATSU
IPC: D06M101/16
Filed: 1985-12-24
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-H04167459-A (JP)
Title: Semiconductor logic ic
Inventor: WAKIMOTO KEIJI
IPC: H01L21/822
Filed: 1990-10-31
Abstract: PURPOSE:To reduce the influence caused by noise due to cross talk which a high-speed signal line gives, by arranging separately DC potential generating circuit portions in a semiconductor device, and by making a constitution in which the DC potential generating circuit portions are mutually connected. CONSTITUTION:Circuits 13 to 18 to generate DC potential are arranged in a total of 6 places with one place in each block, and 6 places are mutually connected. Cross talk from a high-speed signal generates in crossing portions 9-12. For example. the noise due to cross talk generated through the crossing portion 9 from a high-speed signal 4 gives an influence on the circuits near to the place where noise is generated. However, the fluctuation is absorbed in a DC potential- generating portion 13. Therefore, generation of noise is less than that of the case having no DC potential-generating portion 13. In addition, the noise hardly gives an influence on the circuits mounted on the left side from the potential- generating portion 13 or other blocks. At the same time, the noise due to cross talk generated in the crossing portion of wring connecting each block, e.g. 11, is absorbed in DC potential-generating portions 14, 17, 15, and 18, and it gives an influence only some circuits.