Patent GB-820494-A (GB)
Title: Adding mechanism
IPC: G06F7/495
Filed: 1956-02-10
Abstract: 820,494. Digital electric calculating-apparatus. INTERNATIONAL BUSINESS MACHINES CORPORATION. Feb. 10, 1956 [Feb. 14, 1955], No. 4180/56. Class 106 (1). An adder comprises input means adapted to receive addend and augend quantities and to present such quantities in coded form serially by digit so that digits from corresponding orders of said quantities are presented simultaneously, a pulse source adapted to deliver two trains of pulses interposed in time so that no pulse of one train coincides with a pulse of the other train, separate pulse transmitting means respectively connected to receive said trains of pulses and respectively operable under control of coded addend and augend digits to deliver from their associated pulse trains to a common output line numbers of pulses representing such coded digits, a pulse counter arranged to receive pulses appearing on said common output line and a register operable in synchronism with said input means to record serially by digit pulse totals manifested bv said counter. The device described accumulates multi-digit decimal numbers entered by a ten-key key-board and indicates their sum on an array of neon lights. Entered digits pass direct to a first register, Fig. 1, and on depression of an add key two switches 7, 8 change over and the sum of the numbers in the first register and in a third register are entered into a second register. A clear key is then depressed to clear the first and third registers and a second number can be entered into the first register. Depression of the add key then causes switches 7 and 8 to change back to their positions shown and the sum of the numbers in the first and second registers to be entered into the third register, and depression of the clear key clears the first and second registers. Further numbers are entered in a similar manner. Input and output.-Depression of a key of a ten-key key-board 2, Fig. 2a, energizes an associated relay 12 which causes 150 v. to be applied selectively to four leads 13-16 weighted 1, 2, 4, 8, respectively, which voltage is transmitted via the actuated contacts a, b, c, d of a relay 51, Fig. 2d (a stepping switch 19 being in its " 0 " position for the entry of the first digit and thus energizing relay 51) and via leads 62 to the first column of a matrix of coherers constituting the first storage register, selected ones of which then cohere to register the highest denominational digit. On the release of the depressed key the stepping solenoid 18, Fig. 2a, of the stepping switch 19 is de-energized, having been energized via the b contact of the energized relay 12, and the switch 19 advances to its " 1 " position thereby preparing the register for the entry of the next digit, the coherers in the other columns being connected to corresponding contacts of relays 51-60. Each coherer is paralleled by a neon lamp which glows when the coherer is cohered, thereby providing a visual indication of the contents of the register. No other read-out means are provided. After the entry of ten digits the switch 19 returns to its " 0 " position and the first addition can begin. Arithmetic unit.-The arithmetic unit comprises essentially two devices, called " emitters," each of which produces a sequence of pulses, the number of pulses produced being equal to a staticised binary-coded decimal digit. The pulses produced by the two emitters are staggered in time, so that they may be fed, over a common channel, to a counter to give the sum of two binary-coded decimal digits. By repeating this for corresponding pairs of digits of two multi-digit numbers, and providing carry storage means, the sum of two multi-digit numbers is obtained. Each of the two emitters 71 and 72, Fig. 2f, comprises a cascade connected chain of four triggers 74-77 driven by pulses from a multivibrator 73, Fig. 2c, controlled by a switch 88, so that in each 16-pulse cycle of the multivibrator gates 101-104 associated with triggers 74-77 receive respectively eight, four, two and one positive-going pulses. The other inputs of gates 101-104 are controlled by the staticised bits of a binary-coded decimal digit and thus the total number of pulses that are fed via gates 101-104 to an output lead 145 is equal to the staticised digit. When 16 multivibrator pulses have been passed to the emitter 71, a pulse is applied by the last trigger 77 via a lead 95 to the switch 88 to stop the multivibrator. Emitter 72 differs from emitter 71 in that the pulses driving it, although coming from the same multivibrator, are 180 degrees out of phase with those that drive emitter 71 and in that it has an extra gate 109 to which is applied a staticised carry bit from a previous denomination when multi-digit numbers are being added. Thus for each 16-pulse cycle the output lead 145 receives a number of pulses equal to the sum of the two decimal digits applied to the gates of the emitters together with a carry bit (if any). These pulses are passed to four triggers 147-150, Fig. 2c, connected with an inverter to count on a decimal radix, and any tens carry from these triggers is entered in a trigger 151. At the end of a 16-pulse cycle, when switch 88 stops the multivibrator, it also applies a pulse to two monostable flip-flops 161, 162, which, after a short delay, apply a pulse to each of five coincident gates 155-159, thus dynamicising on five parallel leads 165-169 the sum and carry digits registered in the counter, Operation.-After the entry of a number into the first storage register, Fig. 2d, an addition is initiated by momentarily depressing an add key 22, Fig. 2a, which causes (a) relays 26, 27 and 32 to be energized, relay 32 constituting switches 7 and 8 of Fig. 1 and (b) latch relay 24 to pick up resulting in the energization of relays 41, 42, 43 and in the turning on of a multivibrator constituted by relay 34. Every time relay 34 picks up a relay 21 is energized resetting all the triggers and starting a 16-pulse electronic multivibrator cycle, and every time relay 34 drops out stepping switch 19 advances one position, until eventually, when it reaches its " 9 " position the unlatch coil of relay 24 is energized causing relay 24 to fall out, thus stopping further oscillations of relay 34. Relays 26, 27 and 32 are arranged as a flip-flop so that they are either all energized or all de-energized, each depression of the add key changing their states. When multivibrator relay 34 first picks up a 16-pulse electronic cycle is initiated, the gates of the emitters 71 and 72 being connected respectively to the lowest denominational orders (extreme right-hand column) of the first register 3, Fig. 2d, and of the third storage register 5, Fig. 2e (relay 32 being energized) which is similar to the first register but differs in that it has an extra upper row of coherers for carry storage purposes, the output gates of the counter being connected to the second storage register 4, Fig. 2b, and the carry entry gate 109 of emitter 72 being connected to the carry storage row of the second register. Thus at the end of the first 16-pulse cycle the sum of the two lowest denominational digits in the first and third registers is entered into the second register together with the carry digit which is entered in the top row of the register. Soon after this relay 34 drops out and the stepping switch 19 advances one postion and then relay 34 picks up again to initiate a second 16-pulse cycle of addition during which the carry entry gate 109, Fig. 2f, is controlled by the carry digit registered in the second register in the previous 16-pulse cycle. Successive electronic cycles follow with each oscillation of relay 34 until the switch 19 has advanced through all its positions by when the sum of the numbers in the first and third registers will have been entered into the third register. A further number can then be accumulated by (a) depressing a clear key 23, Fig. 2a, which energizes solenoids 45 and 47 (relay 26 being energized) thus clearing the first and third registers, (b) entering the number highest denominational digit first into the first register and (c) momentarily depressing the add key, whereupon the sum of the numbers in the first and second registers is entered into the third register.