baber/WOPTO huggingface dataset:
Patent JP-2007332366-A (JP)
Title: Cellulose acylate film and its manufacturing method, and optical retardation film, polarizing plate and liquid crystal display device obtained using the same
Inventor: SASADA YASUYUKI
IPC: B29L11/00
Filed: 2007-05-18
Abstract: <P>PROBLEM TO BE SOLVED: To provide a cellulose acylate film that exhibits controlled optical anisotropy and directivity of mechanical properties and can be directly laminated on a polarizing plate.  <P>SOLUTION: The cellulose acylate film has an X-ray diffraction strength satisfying expression (I): 0.00≤Ic<SB>i</SB>/Ic<SB>o</SB><0.60 and a half-width value of a peak at 2θ<SB>2</SB>, observed from a cross-section in the direction parallel to a conveying direction of the film, of at most 2.8°. In expression (I), Ic<SB>i</SB>=Ic<SB>11</SB>/Ic<SB>12</SB>, and Ic<SB>o</SB>=ä(Ic<SB>21</SB>/Ic<SB>22</SB>)/+(Ic<SB>31</SB>/Ic<SB>32</SB>)}/2. Ic<SB>11</SB>-Ic<SB>32</SB>are calculated from expressions (II): Iam=I<SB>1</SB>+ä(I<SB>3</SB>-I<SB>1</SB>)/(2θ<SB>3</SB>-2θ<SB>1</SB>)×(2θ<SB>2</SB>-2θ<SB>1</SB>)} and (III): Ic=I<SB>2</SB>-Iam. Ic<SB>11</SB>and Ic<SB>12</SB>are calculated using a diffraction photograph when the film is observed from a direction perpendicular to the film surface and show Ic in the direction where I<SB>2</SB>is maximum and Ic in the direction crossing rectangularly thereto, respectively. Ic<SB>21</SB>and Ic<SB>22</SB>are calculated using a diffraction photograph when the cross-section in the direction parallel to the conveying direction of the film is observed. Ic<SB>31</SB>and Ic<SB>32</SB>are calculated using a diffraction photograph when the cross-section in the direction crossing rectangularly to the conveying direction of the film is observed. In expressions (II) and (III), 2θ<SB>1</SB>and 2θ<SB>2</SB>are each a specific 2θ; and I<SB>1</SB>, I<SB>2</SB>and I<SB>3</SB>are a diffraction strength at 2θ<SB>1</SB>, 2θ<SB>2</SB>and 2θ<SB>3</SB>, respectively.  <P>COPYRIGHT: (C)2008,JPO&INPIT
Patent JP-2008124423-A (JP)
Title: Method for manufacturing semiconductor device and semiconductor device
Inventor: KOBAYASHI YASUTAKA
IPC: H01L27/088
Filed: 2007-05-21
Abstract: <P>PROBLEM TO BE SOLVED: To obtain a semiconductor device including a fin-type FET having capability of changing the design of the gate width corresponding to an application and to provide a method for manufacturing the semiconductor device.  <P>SOLUTION: The method for manufacturing the semiconductor device includes: a process for forming on semiconductor substrate 11 a fin 12a having a first height and a fin 12b having a second height lower than the first height; a process for forming a silicon oxide film on the upper and side faces of each of the fins 12a and 12b; a process for forming a conductive polysilicon film on the silicon oxide film; a process for forming a gate insulating film 15 and a gate electrode 16 on from the upper face to the side face of each of the fins 12a and 12b by patterning the silicon oxide film and the polysilicon film; and a process for forming a couple of diffusion regions 14 in two regions clipping a region underneath the gate electrode 16 of each of the fins 12a and 12b.  <P>COPYRIGHT: (C)2008,JPO&INPIT
Patent JP-2008001896-A (JP)
Title: Organopolysiloxanethio-block vinyl copolymer comprising polymerizable group-containing polyether-modified silicone, composition comprising the copolymer, antifouling coating composition, its coating film and antifouling method
Inventor: YAMADA YOSHIO
IPC: C09D7/12
Filed: 2007-05-25
Abstract: <P>PROBLEM TO BE SOLVED: To provide an organopolysiloxanethio-block vinyl copolymer that has a light environmental load, exerts little influence on the human body, exhibits excellent antifouling properties and persistency thereof and can form an antifouling film excellent in mechanical strength, and an antifouling coating composition comprising the copolymer.  <P>SOLUTION: The organopolysiloxanethio-block vinyl copolymer comprises [A] a polymerizable group-containing polyether-modified silicone block, [B] a polyoxyalkylene group-containing vinyl copolymer block and [C] an organopolysiloxanethio-block and has a weight-average molecular weight (Mw) of 1,000-400,000 as measured by GPC. The antifouling coating composition comprises the copolymer.  <P>COPYRIGHT: (C)2008,JPO&INPIT
Patent JP-2008298433-A (JP)
Title: Prediction method for tunnel final displacement
Inventor: HAYASHI MINORU
IPC: G01C15/00
Filed: 2007-05-29
Abstract: <P>PROBLEM TO BE SOLVED: To provide a method capable of quickly performing measurement with little time fluctuations from excavation until initial measurement, which is less likely to be influenced by the presence existence of a heavy industrial machine or the presence or the kind of a timbering structure, or the like, of readily measuring optional or all the excavation cross sections, and predicting the final displacement more safely with higher accuracy than hitherto.  <P>SOLUTION: Displacement measurement in the tunnel elongation direction is performed, aimed at a working face after excavation by a total station 5, capable of measuring a distance and an angle installed in a tunnel pit, and the final displacement is predicted, based on the correlation data between displacement speed in the tunnel elongation direction held beforehand and the final displacement.  <P>COPYRIGHT: (C)2009,JPO&INPIT
Patent JP-2008299051-A (JP)
Title: Optical scanner and image forming apparatus using the same
Inventor: SHIMOMURA HIDEKAZU
IPC: B41J2/44
Filed: 2007-05-31
Abstract: <P>PROBLEM TO BE SOLVED: To obtain an optical scanner capable of making the optical scanner compact as a whole, and to obtain an image forming apparatus using the optical scanner.  <P>SOLUTION: The optical scanner is provided with a plurality of optical scanning units that are arranged side by side, each including two light source means, a deflecting means, an incident optical system for making two light fluxes incident on the deflecting means, and an imaging optical system arranged for every light flux, for guiding the two light fluxes to a surface to be scanned, and that are configured to scan two surface to be scanned with the rotating or oscillating operation of the deflecting means. The imaging optical system includes one or more imaging optical devices and two or more reflection optical devices. The light flux deflected by the deflection surface is made incident on at least one imaging optical device constituting the imaging optical device and passes through the imaging optical device, thereafter, reflected by at least one reflection optical device, thereafter, made incident on the imaging optical device again from a direction opposite to the incident direction, and then, passes through the imaging optical device. The two light fluxes deflected by the deflecting means mutually cross each other after passing through the imaging optical device again, in a space separated from the deflecting surface, and in the rotating axis direction or the oscillating direction of the deflecting means.  <P>COPYRIGHT: (C)2009,JPO&INPIT
Patent JP-2008298370-A (JP)
Title: Heating cooker
Inventor: KATO TAKAYUKI
IPC: H05K7/20
Filed: 2007-05-31
Abstract: <P>PROBLEM TO BE SOLVED: To prevent contact of lead wires with a heat sink even when the lead wires are positioned near the heat sink in a heating cooker.  <P>SOLUTION: A power source side electrically conducting path 14 and load side electrically conducting path 15 of a triac 2 are formed on a substrate 13. A connection part 14a of the power source side lead wire 16 on the power source side electrically conducting path 14 is set on one side of an arrangement portion of the heat sink 28, and a connection part 15a of the load side lead wire 17 on the load side electrically conducting path 15 is set on the other side of the arrangement portion of the heat sink 28. Due to this configuration, the lead wire 16 on one side and the lead wire 17 on the other side can be separately handled so as not to make the lead wires 16, 17 contact with the heat sink 28.  <P>COPYRIGHT: (C)2009,JPO&INPIT
Patent JP-2008300019-A (JP)
Title: Nonvolatile semiconductor memory device
Inventor: NAGASHIMA HIROYUKI
IPC: G11C16/04
Filed: 2007-06-04
Abstract: <P>PROBLEM TO BE SOLVED: To reduce the erroneous writing to a memory cell MC0 caused by an excessive boost voltage of a channel in a NAND type flash memory.  <P>SOLUTION: For example, when "1" is written in a memory cell MC, to precharge the channel, the select gate transistor SGD-Tr of a drain side is turned ON by a potential Vsg from a row control circuit. Simultaneously, the select gate transistor SGS-Tr of a source side is turned ON by a potential Vsg from the row control circuit to precharge the potential of the channel. Then, the potential of the channel is boosted by applying a potential Vpass from the row control circuit to wordlines WL1 to SL3 and a potential Vpgm to a wordline WLO.  <P>COPYRIGHT: (C)2009,JPO&INPIT
Patent JP-2008308362-A (JP)
Title: Transparent inorganic oxide dispersion liquid, transparent composite material, and their producing methods
Inventor: KURIO KEIKO
IPC: C08L101/00
Filed: 2007-06-14
Abstract: <P>PROBLEM TO BE SOLVED: To provide a transparent inorganic oxide dispersion liquid where a refractive index and a mechanical property can be enhanced and transparency can be kept by modifying the surfaces of fine inorganic oxide particles with a triol compound, a transparent composite material and their producing methods.  <P>SOLUTION: The transparent inorganic oxide dispersion liquid comprises fine inorganic oxide particles whose surfaces are modified with the triol compound and which have a mean dispersed particle diameter of 1 nm or more and 20 nm or less.  <P>COPYRIGHT: (C)2009,JPO&INPIT
Patent JP-2008029328-A (JP)
Title: Noodle cutting tool
Inventor: SUGITA SABURO
IPC: A23L7/109
Filed: 2007-06-18
Abstract: <P>PROBLEM TO BE SOLVED: To provide a noodle cutting tool enabling even an inexperienced person to evenly cut thinly expanded and folded dough of buckwheat noodles and Japanese wheat noodles when making noodles such as buckwheat noodles and Japanese wheat noodles.  <P>SOLUTION: This noodle cutting tool has a chopping board, a guide body 4 which is guided in parallel and on a straight line to the plane of the chopping board, a noodle press board which is guided to the guide body 4 in free up-and-down motion, a knife guide surface which is set at least on one side of the noodle press board, and a stopper which faces the expanded surface of the knife guide surface and is set on the guide body 4 on the chopping board top. The noodle press board and the guide body are slightly moved by inclining the upper edge of a knife after cutting noodles in a condition of bringing the blade edge of the knife into contact with the chopping board, and accordingly the blade edge contacts the edge of the stopper and the movement is stopped. The mobile width at that time is set by a clearance between the knife guide surface and the stopper, and the noodle dough can be accurately cut with the mobile width.  <P>COPYRIGHT: (C)2008,JPO&INPIT
Patent JP-2008311584-A (JP)
Title: Mounting structure of semiconductor package
Inventor: SASAKI MASARU
IPC: H01L23/32
Filed: 2007-06-18
Abstract: <P>PROBLEM TO BE SOLVED: To provide the mounting structure of a semiconductor package with high connection reliability without the breakage of a connection part by shortening a wiring length from a semiconductor chip to a wiring pattern on a surface opposite to the mounting surface of a printed wiring board and mitigating stress caused by the difference of linear expansion coefficients between the semiconductor chip and the printed wiring board.  <P>SOLUTION: The mounting structure 11 of the semiconductor package includes the printed wiring board 3 having a via 7 passing through the mounting surface 3a and the surface 3b on the opposite side, a via land 7a formed on the surface 3b on the opposite side so as to close the opening of the opposite side surface 3b of the via 7 and conducted to the via 7, the semiconductor chip 1 having a bump 2, and a thermosetting adhesive 9 filled between the semiconductor chip 1 and the mounting surface 3a of the printed wiring board 3. An anisotropic conductive material 8 is filled in the via 7, the bump 2 is inserted to the via 7, and the bump 2 and the via 7 are conducted by conductive particles 8a.  <P>COPYRIGHT: (C)2009,JPO&INPIT
Patent JP-2009004922-A (JP)
Title: User device, base station device, and channel state information communication method
Inventor: MIKI NOBUHIKO
IPC: H04W92/10
Filed: 2007-06-19
Abstract: <P>PROBLEM TO BE SOLVED: To communicate channel state information (CQI information) without deteriorating reception quality.  <P>SOLUTION: A user device estimates a channel state, encodes the channel state information indicating the estimated channel state, and transmits the channel state information over a plurality of transmission time intervals. A base station device receives the channel state information over the plurality of transmission time intervals, decodes the channel state information, and assigns resources based on the channel state information. The user device, base station device, and channel state information communication method are provided.  <P>COPYRIGHT: (C)2009,JPO&INPIT
Patent JP-2009004473-A (JP)
Title: Semiconductor laser apparatus, optical writer and printer device
Inventor: INANAGA HIROSHI
IPC: H01S5/0233
Filed: 2007-06-20
Abstract: <P>PROBLEM TO BE SOLVED: To reduce a difference between the operating temperatures of laser devices within a laser array chip and reduce a difference between the oscillation wavelengths of respective laser devices in a semiconductor laser apparatus comprising an end face emitting type laser array chip with laser devices having three devices or more in a state with the laser array chip being fixed to a heat sink via a sub-mount.  <P>SOLUTION: The width of the electrode of the laser device in the central part of the laser array chip is made larger than the width of the electrode of the laser device in the end part of the laser array chip.  <P>COPYRIGHT: (C)2009,JPO&INPIT
Patent JP-2007229923-A (JP)
Title: Non-woven fabric perforating device and its method
Inventor: MUTH MATHIAS
IPC: D04H1/00
Filed: 2007-06-21
Abstract: <P>PROBLEM TO BE SOLVED: To provide a non-woven fabric perforating device having a perforating roller 4 and counter roller 5.  <P>SOLUTION: The perforating roller 4 and counter roller 5 form a gap 9 in which a non-woven fabric 6 to be perforated is passed through and perforated. A non-woven fabric perforating device 1 has a non-woven fabric supply device 8 and non-woven fabric feeding device 12. The non-woven fabric supply device 8 is arranged to be conveyed onto the counter roller 10 before the non-woven fabric 6 to be perforated is conveyed to the gap 9. The non-woven fabric feeding device 12 is arranged to keep located on the perforating roller 4 after the perforated non-woven fabric 10 leaves the gap 9. Further, a perforating method and the corresponding non-woven fabric can be utilized.  <P>COPYRIGHT: (C)2007,JPO&INPIT
Patent JP-2009002839-A (JP)
Title: Analyzing apparatus
Inventor: ISHIGE HISASHI
IPC: G01N27/416
Filed: 2007-06-22
Abstract: <P>PROBLEM TO BE SOLVED: To provide an analyzing apparatus capable of simultaneously measuring many minute measuring samples.  <P>SOLUTION: The minute measuring samples 106 are arranged on electrodes 107, a medium 105 is arranged over a plurality of measuring samples 106, a liquid junction section of a reference electrode 109 is brought into contact with the medium 105, and the potential between the single reference electrode 109 and each electrode 107 via the medium 105 is measured using an electrometer 108.  <P>COPYRIGHT: (C)2009,JPO&INPIT
Patent JP-2008245500-A (JP)
Title: Voltage boosting power supply circuit and voltage boosting control method
Inventor: TONOMURA FUMIO
IPC: H02M3/07
Filed: 2007-06-27
Abstract: <P>PROBLEM TO BE SOLVED: To provide a power supply circuit capable of obtaining a predetermined output voltage from a wide range of supply voltages, without having to change the setting.  <P>SOLUTION: The power supply circuit includes a voltage-boosting capacitor (21), a first switch (13), a second switch (12), addition comparison circuits (60, 70), and a control circuit (80). The first switch (13) charges the voltage boosting capacitor (21) by applying a first voltage (VDC) thereto. The second switch (12) serially connects a second voltage (VDC) to the voltage-boosting capacitor (21) which has been charged, thereby boosting the voltage therein. The addition comparison circuits (60, 70) add the voltage of the voltage-boosting capacitors (21) to the second voltage, to compare the comparison result with a predetermined threshold. The control circuit (80) controls the on/off of the first switch (13), according to the comparison result of the addition comparison circuits.  <P>COPYRIGHT: (C)2009,JPO&INPIT
Patent JP-2009008605-A (JP)
Title: Vehicle-use display device
Inventor: SAITO MASAKI
IPC: G01D13/04
Filed: 2007-06-29
Abstract: <P>PROBLEM TO BE SOLVED: To make a material flexible which is used as a translucent member, and enable the translucency member to express a three-dimensional appearance.  <P>SOLUTION: A vehicle-use display device 1 has: a self-emission light display 10 for carrying out a display by using an organic substance which emits light by being applied with a prescribed voltage; and the translucent member 20 for covering a display surface 10a of the self-emission light display 10 so as to form a clearance S between itself and the display surface 10a, wherein display light passing through the translucent member 20 from the self-emission light display 10 is visibly recognized by a user. The vehicle-use display device 1 is characterized in that a circular polarizer 30 is disposed on the backside 20b of the translucent member 20 so as to prevent outside light from being reflected, and the translucent member 20 has a three-dimensional decoration section 21 which projects on the surface side 20a opposite to the backside 20b having the circular polarizer 30.  <P>COPYRIGHT: (C)2009,JPO&INPIT
Patent JP-2009015566-A (JP)
Title: Data transfer unit
Inventor: KADOTA HIROKI
IPC: G06F12/02
Filed: 2007-07-04
Abstract: <P>PROBLEM TO BE SOLVED: To provide a data transfer unit for improving a data transferring efficiency by preventing the frequent occurrence of piecemeal data transfer.  <P>SOLUTION: In a data transfer device (1000), a transfer destination device (12) is connected through a bus (200) on which data (D) and an address (A) are multiplexed to a transfer origin device (11), and a memory (13) is connected to the transfer destination device (12) for storing data (AD) transferred from the transfer origin device (11), and the transfer origin device (11) controls the transfer of data (AD) to the memory (13) according to the data receiving circumstances of the transfer destination device (12).  <P>COPYRIGHT: (C)2009,JPO&INPIT
Patent JP-2009016645-A (JP)
Title: Multilayer substrate
Inventor: OKUYAMA TETSUO
IPC: H05K3/46
Filed: 2007-07-06
Abstract: <P>PROBLEM TO BE SOLVED: To provide a multilayer substrate with less peeling of a polyimide film or the like in a ceramic multilayer substrate with the polyimide film laminated thereon laminated.  <P>SOLUTION: The multilayer substrate has a configuration wherein a heat resistant film is laminated on a ceramic layer, the heat resistant film is a film composed of polyimide obtained by making aromatic diamines having a benzoxazole structure react with aromatic tetracarboxylic dianhydrides, and its linear expansion coefficient is -2 to 10 ppm/°C.  <P>COPYRIGHT: (C)2009,JPO&INPIT
Patent JP-2009020824-A (JP)
Title: Energy saving effect analysis unit of air conditioner, air conditioning system, method and program for analyzing energy saving effect of air conditioner
Inventor: MASUDA YOSHIYUKI
IPC: F24F11/02
Filed: 2007-07-13
Abstract: <P>PROBLEM TO BE SOLVED: To easily and securely analyze the energy saving effect of an air conditioner.  <P>SOLUTION: An energy saving effect analysis unit 1 of air conditioners 2, 3 includes a reference power consumption set section 12, an acquisition section 13 of a first analysis power consumption, a peak detection section 14, a peak difference calculator 15, a second analysis power consumption calculator 16, a difference calculator 17, and an energy saving effect analyzer 18. A peak difference calculator 15 calculates a peak difference between a reference power consumption at the peak time of the reference power consumption set by the reference power consumption set section 12 and a first analysis power consumption of an air conditioner to be analyzed. The peak difference is subtracted or added from/to the first analysis power consumption at each predetermined time, so that a second analysis power consumption is calculated. Then, the difference between the second analysis power consumption and the reference power consumption is calculated. Based on the above difference, the energy saving effect analyzer 18 analyzes the energy saving effect of the air conditioner to be analyzed.  <P>COPYRIGHT: (C)2009,JPO&INPIT
Patent JP-2009024211-A (JP)
Title: Organic resin-coated steel material and building using the same
Inventor: YAMAZAKI TAKAO
IPC: B32B15/18
Filed: 2007-07-18
Abstract: <P>PROBLEM TO BE SOLVED: To provide an organic resin-coated steel material which has adhesion equal to or higher than that of a steel material subjected to a chromate treatment by a chemical conversion film formed without using the chromate treatment; and to provide a marine building using the same.  <P>SOLUTION: The organic resin-coated steel material is a steel material coated with an organic resin corrosion prevention layer, in which an aluminum phosphate chemical conversion film layer formed between the organic resin corrosion prevention layer and the steel material is composed of two layers, and the chemical conversion film provided on the steel material side has an average film thickness of 1-7 μm and the chemical conversion film provided on the organic resin side has an average film thickness of 10-40 μm, and the average element composition ratio satisfies following formula: 1,000≤(Fe<SB>1</SB>×Al<SB>2</SB>)/(Fe<SB>2</SB>×Al<SB>1</SB>)≤5,000, wherein Fe<SB>1</SB>is average molarity of iron element in the chemical conversion film provided on the steel material side; Fe<SB>2</SB>is average molarity of iron element in the chemical conversion film provided on the organic resin side; Al<SB>1</SB>is average molarity of aluminum element in the chemical conversion film provided on the steel material side; and Al<SB>2</SB>is average molarity of aluminum element in the chemical conversion film provided on the organic resin side. The building using the organic resin-coated steel material is also provided.  <P>COPYRIGHT: (C)2009,JPO&INPIT
Patent JP-2007306025-A (JP)
Title: Method for manufacturing bipolar transistor with low k material in emitter-base spacer region
Inventor: II-FEN CHAN
IPC: H01L29/41
Filed: 2007-07-19
Abstract: <P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a bipolar transistor with a low K material in an emitter-base spacer region.  <P>SOLUTION: The present invention provides the bipolar transistor located on a semiconductor wafer substrate. The bipolar transistor may include a collector located in the semiconductor wafer substrate, a base located in the collector, and an emitter located on the base and in contact with at least a portion of the base, wherein the emitter has a low K layer therein. The low K layer may be, for example, located in proximity to a side of the emitter, or located in proximity to opposing sides of the emitter. In all embodiments, however, the low K layer does not interfere with proper functions of the bipolar transistor, and substantially reduces the emitter-base capacitance typically associated with conventional bipolar transistors.  <P>COPYRIGHT: (C)2008,JPO&INPIT