Patent ES-381722-A1 (ES)
Title: Automatic telecommunication system
IPC: H04Q11/04
Filed: 1970-07-13
Abstract: In a t.d.m. switching system in which the signals on incoming p.c.m. highways have a bit rate which drifts or persistently overruns or underruns the bit rate in the time frames of the switching system, incoming p.c.m. codes are stored in channel stores associated with each incoming highway and are read out to a selected outgoing channel on an outgoing highway as and when addressed by a common control computer, writing of received p.c.m. codes into their associated channel stores being effected either at the beginning or the middle of a switching system channel slot so that should one of these writing periods happen to lie at the junction between received time slots the other period will be available clearly within a received time slot, it being a consequence of switching from one writing period to the other that should the channel store involved with the change of writing be at that time also addressed for reading, the channel code could be lost, it being arranged, by initially selecting the outgoing time slot in relation to the time slot of reception, that at the start of the writing in of codes reading out of those codes is effected after a spacing in time which ensures a predetermined future period of transmission across the exchange with no risk of loss due to writing time changeover. As shown in Fig. 1 incoming p.c.m. highways H0 to H(n-1) each have a channel store SS in which, row by row, 8 or 10-bit p.c.m. codes are set up as received by series to parallel converters S/P. The 10-bit codes transmit five 2-bit valves. A central computer, not shown, selectively reads out codes from the channel stores of SS to gate them, in parallel over an 8 or 10-wire intermediate highway IH, to an appropriate parallel to series converter P/S so as to place the code in a selected channel in an outgoing highway. The stores SS have 32 rows corresponding to 32 channels in each frame of a highway multiplex. In the case of 16 incoming and 16 outgoing highways, Fig. 2 shows how in each time slot of the switching system a p.c.m. code set up in a series to parallel converter S/P can be written into its associated channel store either in a writing period T A or a writing period T B . During the periods H0 to H15 distributed in the time slot as shown, read out can take place from the associated store or any other associated store as addressed by the control computer, in order to transfer a p.c.m. code in that time slot to one of the outgoing highways H0 to H15. If, as shown at b in Fig. 2, both writing periods T A and T B lie within the time slots on an incoming highway either may be employed for writing. If, however, as a result of drift or frequency difference, the incoming time slots shift relative to the time slots of the switching system a time arrives when, as shown at c in Fig. 2, one of the writing periods coincides with the junction between two received time slots and is consequently of no use. Whenever a writing period moves into a position of inutility, writing is switched from that period to the other period thereby reducing or increasing by half a time slot the storage time of the p.c.m. codes according to whether the exchange is overtaking or is being overtaken by the incoming highway. Whenever it becomes necessary in respect of a highway to switch from one writing period to the other the possibility of code loss exists if a channel store is subject to reading in the same exchange time slot as is involved in changeover of writing period. From the onset of a connection when a time slot is chosen on an outgoing highway (such time slots being the time slots of the switching system) it is possible to predict the time to the first coincidence of writing period changeover and channel store read-out from the nature of the difference between the incoming channel frequency and the switching system frequency and, more particularly, from the initial spacing in time between the incoming and outgoing time slots. In accordance with the invention, therefore, the controlling computer inspects the synch signals on all incoming highways to keep a record of relative displacements between incoming and switching system time slots, the switching system time slots being those used on all outgoing highways. Such displacement records are updated at intervals of about one minute by means of the circuit of Fig. 3, not shown, which gates a nominated highway to a synch code detector and records time of receipt in accordance with the switching system time frame. Given the time slot of a received channel the computer establishes the currently coincident time slot in the switching system. Choice of the coincident time slot for the outgoing highway would result immediately in coincidence of writing in and reading out of the incoming channel store, with consequent code loss should change of writing period take place. To avoid this the computer bars choice of this time slot for the outgoing channel and thereby ensures a specific delay of some few minutes before a code loss due to writing period changeover occurs. The masking from choice of just this one slot will be sufficient in the case of an ordinary speech connection. In the case of a high grade speech connection three slots are masked to extend the specific delay before a code loss occurs by an order of magnitude. In the case of data signalling, either across the switching system or to the system computer by way of a dedicated highway, a mask extending over ten slots is employed. If the difference between incoming and switching system clocks is variable about a mean synchronism the masks employed are symmetrical about the switching system time slot coincident with incoming time slot. If, however, the difference is constantly one way over prolonged periods the masks extend from the coincident time slot in one direction or the other depending on the direction of the difference. With four-wire connections the mask required for one direction of transmission across the switching system is the inverse of that for the other direction.