baber/WOPTO huggingface dataset:
Patent TW-521258-B (TW)
Title: Method to display multi-national character, graph, symbol on screen
Inventor: SHIE SHING-CHIAN
IPC: G09G5/00
Filed: 2000-07-28
Granted: 2003-02-21
Abstract: A method to display multi-national characters, graphs, symbols on screen is disclosed, the method at least comprises the following steps: obtain the object to be displayed, set up a blank picture, call a graph program to print the object to be displayed on the picture, convert the picture into a file, output the file and release the memory space, bring back the displayed data from the memory, display data on the LCD panel, so that the ASCII and non-ASCII character, graph, symbol can be converted to an image and displayed on the screen without a built-in font or a device storing the font, so as to achieve the purpose of avoiding displaying random code and being applied in multi-national characters, graphs, symbols universally.
Patent TW-523962-B (TW)
Title: A controlled performance dielectric ceramic filter
Inventor: KITAJIMA MASAHIKO
IPC: H01P1/205
Filed: 2000-08-05
Granted: 2003-03-11
Abstract: A ceramic block filter with a series of transmission holes spaced a distance from one another, and a trap hole wherein the filter has a transmission hole diameter to filter height ratio of 0.16-0.21:1 and a ratio of transmission hole diameter to distance between transmission holes of 0.45-0.5:1. The trap hole is spaced a distance of one and one half to twice the distance between said at least two transmission holes. The zero point of this filter is controlled without effecting critical parameters, such as filter dimensions, insertion loss and attenuation, by adjusting the ratio of transmission hole diameter to filter height and the transmission hole diameter to distance between the transmission holes.
Patent TW-I238253-B (TW)
Title: Method for VLSI chip design
Inventor: PETERSEN REX MARK
IPC: G06F17/50
Filed: 2000-08-18
Granted: 2005-08-21
Abstract: A method of designing a VLSI chip and a chip designed according to the method are described. The method includes the steps of early consideration of resistive and capacitive values during a VLSI chip design process. The method provides for estimation of signal routes 104 between nodes of functional blocks to be incorporated in the chips. The estimation may be based on a floor plan 101 describing the positioning of the functional blocks, a connectivity description 102 identifying connections between ports of the blocks and physical and mechanical configuration parameters 103. The functional blocks and design of the layout may be hierarchical in nature. The signal route estimation may be based on control factors 105 such as the specification of signal route establishment algorithms. The next step is to foliate 106 the nodes followed by determining resistance and capacitance values corresponding to all or parts of the estimated signal routes. The resistive and capacitive values may be incorporated into a model and a connectivity net list may be generated.
Patent TW-486805-B (TW)
Title: Semiconductor device incorporating module structure
Inventor: BABA SHINJI
IPC: H01L25/18
Filed: 2000-09-11
Granted: 2002-05-11
Abstract: A semiconductor device comprises a plurality of semiconductor block modules mounted on a system board. The semiconductor block module comprises a block socket and a module board fitted thereto. The block socket assumes an annular shape and has connection terminals on upper and lower peripheral surfaces thereof and has an inner groove formed on the inner surface thereof. The module board has at least a semiconductor chip mounted thereon and is fitted into the inner groove of the block socket. The module board is electrically connected to the block socket. The connection terminals on the upper peripheral surface of the module socket may be mechanically fitted into and electrically connected to the connection terminals on the lower peripheral surface of other block socket having the same structure.
Patent TW-530258-B (TW)
Title: Autoswitch for a riser card
Inventor: MAZZARINI ANTHONY L
IPC: G06F13/40
Filed: 2000-11-24
Granted: 2003-05-01
Abstract: A riser card compatible with the AC '97 specification includes an autoswitch that senses whether a primary codec is on an AC-link interface and configures a codec on the riser card accordingly. The autoswitch sets the codec to act as the primary codec if no other primary codec is present or to act as secondary codec if the AC-link interface has a primary codec. One embodiment of the autoswitch uses the PRIMARY_DN# signal from the AC-link interface as a select signal that selects an ID number for the codec and selects the routing of a data signal from the codec to the AC-link interface.
Patent TW-503544-B (TW)
Title: Thermal joint and method of use
Inventor: YOU SEUNG-MUN
IPC: F28F23/00
Filed: 2000-12-13
Granted: 2002-09-21
Abstract: A thermal joint for facilitating heat transfer between two components is described. The thermal joint is formed from an alloy of at least two constituents. The alloy has a liquid temperature and a solid temperature. When the operating temperature falls between the liquid temperature and the solid temperature, the alloy has at least one liquid phase which is in substantial equilibrium with at least one solid phase. The thermal joint is used between a heat-generating component, such as a semiconducting device, and a heat-dissipating component, such as a heat sink. Such thermal joint substantially reduces the thermal resistance between the two components.
Patent TW-507071-B (TW)
Title: Apparatus for fast detection of X-rays
Inventor: CARTER TONY
IPC: G01N23/207
Filed: 2000-12-22
Granted: 2002-10-21
Abstract: This invention relates to the field of X-ray inspection systems and more particularly those that use X-ray diffraction to analyse an object under inspection. X-ray diffraction has long been used as an aid to structural analysis and information about a diffracting material is commonly derived by one of two methods: energy dispersion or angular dispersion. Essential to prior art diffraction systems employing angular dispersion is the provision of a monochromatic incident X-ray beam. Conventionally, this is provided by filtering out the desired spectral peak from a polychromatic or quasi-monochromatic X-ray beam by means of the balanced filter technique. There are disadvantages to this technique in that it requires two diffraction images to be subtracted from one another in order to get the desired spectral peak. This results in beam attenuation and data of poor statistical quality. The invention proposes the use of an array of semiconductor detector elements and associated electronics which are capable of extracting an essentially monochromatic diffraction pattern from scattered polychromatic or quasi-monochromatic X-rays.
Patent TW-536718-B (TW)
Title: Membrane switch structure providing electrostatic discharge protection
Inventor: YEE DAWSON
IPC: H01H13/702
Filed: 2001-01-31
Granted: 2003-06-11
Abstract: A membrane switch structure providing electrostatic discharge (ESD) protection has three layers of insulating material, including two outer layers containing on their inside opposing surfaces printed conductive circuit patterns which may be selectively brought into electrical contact with each other through contact apertures provided in an intermediate insulting layer. An ESD protection circuit is provided in close proximity to at least one of the two outer layers, e.g., by printing the pattern on a backside of one of the outer layers in the same manner that printing of the circuit pattern is carried out. The ESD protection circuit pattern replicates, at least generally, all or a portion of the layout of the conductive circuit patterns. The ESD protection circuit can be efficiently fabricated and offers effective protection of the membrane switches from ESD events that can cause device operation problems in, for example, computer keyboards.
Patent TW-I276211-B (TW)
Title: Board member and method for making semiconductor device
Inventor: SAKAMOTO NORIAKI
IPC: H01L21/56
Filed: 2001-02-16
Granted: 2007-03-11
Abstract: In the present invention there is formed a sheet-like board member 50 having conductive coating films, such as first pads 55 and die pads 59, formed thereon or a sheet-like board member 50 which has been half-etched by using conductive coating films such as first pads 55 and die pads 59. A hybrid IC can be manufactured by means of utilization of post-processing processes of a semiconductor manufacturer. Further, a hybrid IC can be manufactured without adoption of a support board, and hence there can be manufactured a hybrid IC which is of lower profile and has superior heat dissipation characteristics.
Patent TW-495848-B (TW)
Title: Reduced fluorine contamination for tungsten CVD
Inventor: HERNER SCOTT BRAD
IPC: H01L21/285
Filed: 2001-03-28
Granted: 2002-07-21
Abstract: A chemical vapor deposition process for depositing a tungsten film on a substrate disposed in a substrate processing. The method includes depositing nucleation and bulk deposition tungsten layers. The nucleation layer is deposited by flowing a first process gas comprising tungsten hexafluoride, silane, molecular hydrogen and argon into said substrate processing chamber, where the flow ratio of molecular hydrogen to argon is at least 1.5:1 and the partial pressure of tungsten hexafluoride is less than or equal to 0.5 Torr. The bulk deposition layer is then deposited over the nucleation layer by flowing a second process gas comprising tungsten hexafluoride and a reduction agent into the substrate processing chamber.
Patent TW-516292-B (TW)
Title: A device for encoding/decoding n-bit source words into corresponding m-bit channel words, and vice versa
Inventor: KAHLMAN JOSEPHUS ARNOLDUS HENR
IPC: H03M7/14
Filed: 2001-04-06
Granted: 2003-01-01
Abstract: A device is disclosed for encoding a stream of data bits of a binary source signal (S) into a stream of data bits of a binary channel signal (C1), wherein the bit stream of the source signal is divided into n-bit source words (x1, x2), which device comprises converting means (LC) adapted to convert said source words into corresponding m-bit channel words (y1, y2, y3). Each n-bit source word together with another n-bit source word forms a pair of source words. The values of the n-bit source words differ only in the value of the bit in the qth bit position, q being a constant. The pairs of source words is divided into a first part of pairs and a remaining part of pairs. The converting means (LC) are further adapted to convert n-bit source words belonging to the first part of pairs into corresponding m-bit channel words, in such a manner that the conversion for each of said n-bit source words is parity preserving, and to convert n-bit source words belonging to the remaining part of pairs into corresponding m-bit channel words, in such a manner that the conversion for each of said n-bit source words is parity inverting (table I) (Fig. 1). Furthermore, a decoding device is disclosed for decoding the channel signal obtained by means of the encoding device.
Patent TW-495973-B (TW)
Title: Manufacturing method for semiconductor integrated circuit device
Inventor: HIROSHI MIKI
IPC: H01L27/108
Filed: 2001-06-06
Granted: 2002-07-21
Abstract: The object of the present invention is to increase the charge capacity for data storage capacitors and reduce the current leakage. The solution is to manufacture the data storage capacitor according to the following steps: (1) forming semi-spherical silicon crystals on the surface of the polysilicon as the lower electrode; (2) conducting plasma nitridation reaction at a low temperature around 550 DEG C on the surface of the lower electrode to form the silicon nitride film with the film thickness over 1.5 nm; (3) depositing the amorphous Ta2O5 and making crystallization. The advantage is to improve the anti-oxidation of the silicon nitride film and reduce the current leakage and the result can eliminate the oxidation on the lower electrode of the polysilicon to increase the electrostatic capacity of data storage capacitor and eliminate the current leakage at the same time.
Patent TW-490724-B (TW)
Title: Interlocking management method and system in semiconductor material supply equipment
Inventor: GUO SHIN-YU
IPC: H01L21/00
Filed: 2001-06-11
Granted: 2002-06-11
Abstract: The present invention relates to a system of interlocking material supply equipment in a semiconductor manufacturing system, which comprises at least a collecting device for collecting data of the user and the material; a communication device, for transmitting the user and the material data; a controller, for communicating the material supply equipment with the collecting device via the communication device, which is used to send out a plurality of alert messages; and, an alert device, connected with the material supply equipment and communicating with the controller via the communication device, which is used to display the alert message and the control material supply equipment. A method for material change of interlocking management material supply equipment in a semiconductor manufacturing system, which at least comprises: collecting a material change data for the material supply equipment; using a controller to compare with the material change data, wherein the controller is communicating with the material supply equipment; sending out an alert message to the material supply equipment from the controller; and, disabling the corresponding material supply equipment based on the alert message.
Patent TW-567349-B (TW)
Title: Manufacturing process for electrophoretic display
Inventor: LIANG RONG-CHANG
IPC: G02F1/1679
Filed: 2001-06-28
Granted: 2003-12-21
Abstract: This invention relates to a method of manufacturing a micro-cup array. Such an array may find use in a number of applications such as, for example, a video display. The micro-cups find particular use in electrophoretic or liquid crystal displays.
Patent TW-581742-B (TW)
Title: Process for purifying ammonia
Inventor: OTSUKA KENJI
IPC: C01C1/02
Filed: 2001-07-25
Granted: 2004-04-01
Abstract: There are disclosed a process for purifying ammonia which comprises bringing crude ammonia into contact with a catalyst comprising manganese oxide as an effective ingredient to remove oxygen and/or carbon dioxide that are contained as impurities in the ammonia, and a process for purifying ammonia which comprises bringing crude ammonia into contact with a catalyst comprising manganese oxide as an effective ingredient, and thereafter with a synthetic zeolite having a pore diameter in the range of 4 to 10 Å to remove at least one impurity selected from the group consisting of oxygen, carbon dioxide and moisture that are contained in the crude ammonia. It is made possible by the above process to remove impurities to an extremely low concentration from crude ammonia available on the market for industrial use and crude ammonia from a gallium nitride compound semiconductor without decomposition of ammonia to generate hydrogen.
Patent TW-548294-B (TW)
Title: Heat resistant resin composition, a heat resistant film or sheet thereof and a laminate comprising the film or the sheet as a substrate
Inventor: TANIGUCHI KOUICHIROU
IPC: H05K3/00
Filed: 2001-08-07
Granted: 2003-08-21
Abstract: A heat resistant resin composition comprising 70 to 30 wt% of a crystalline polyarylketone resin having a peak melting temperature of crystal of 260 DEG C or higher and 30 to 70 wt% of a noncrystalline polyetherimide resin, wherein said composition has at least 2 peaks of loss tangent (tan delta) between 140 DEG C and 250 DEG C, determined by dynamic mechanical measurement.
Patent TW-511071-B (TW)
Title: Image display apparatus for writing display information with reduced electric consumption
Inventor: KAWAHARA ISAO
IPC: G09G3/28
Filed: 2001-08-21
Granted: 2002-11-21
Abstract: An image display apparatus for displaying gray-scale images by writing display information to an image display area of a panel. The display information includes values of a plurality of sub-fields that constitute one field. The image display apparatus converts an input image signal into a piece of display information so that a difference between sub-fields in correspondence with each other in adjacent high gray-scale levels becomes less. The image display apparatus displays a gray-scale image in accordance with the piece of display information.
Patent TW-544674-B (TW)
Title: Photo-information recording medium
Inventor: NARA RYOSUKE
IPC: C09B47/00
Filed: 2001-08-23
Granted: 2003-08-01
Abstract: A photo-information recording medium having recording layer provided on the transparent substrate, which is characterized in comprising the derivative compounds of porphrin represented by the following formula (I): (In the formula, R1 to R15 represent the groups described in the specification, and n represents an integer of 1 or above.)
Patent TW-541440-B (TW)
Title: Surface light source device
Inventor: MABUCHI KOJI
IPC: G09F9/00
Filed: 2001-08-24
Granted: 2003-07-11
Abstract: A surface light source device can secure a maximum area of a light outgoing surface while preventing a bright line. The flat light source device 10 comprises a linear light source 12, and the light emitted from the linear light source 12 gets into one side surface of a light guide plate 16, and goes out from the upper surface 16a of the light guide plate 16. A display panel 22, having two display areas of which, light transmission rats are different from each other, is arranged so as to cover the upper surface of the light guide plate 16. A shading sheet 28 shading the light going out from the light guide plate 16 is arranged between the light guide plate 16 and the display plane 22. The light shielding property becomes low in proportion with distance from one end surface 16c of the light guide plate 16, and the unevenness of the light going out from the light guide plate 16 is absorbed in the light shielding plate 28. By the above, the brightness of the light going out from the display panel 22 is prevented from becoming suddenly high at the neighboring area of the linear light source 12, therefore, even the neighboring area of the linear light source 12 can be utilized as the light outgoing surface.
Patent TW-554241-B (TW)
Title: Edge bead remover for thick film photoresists
Inventor: OBERLANDER JOSEPH E
IPC: G03F7/16
Filed: 2001-09-05
Granted: 2003-09-21
Abstract: An edge bead remover for a photoresist composition disposed as a film on a surface, consisting essentially of a solvent mixture comprising from about 50 to about 80 parts by weight, based on the weight of the solvent mixture, of at least one di(C1-C3)alkyl carbonate and from about 20 to about 50 parts by weight, based on the weight of the solvent mixture, of cyclopentanone. A method is also provided for treating a photoresist composition film disposed on a surface which method comprises contacting the photoresist composition with a solvent mixture, in an amount sufficient to produce a substantially uniform film thickness of the photoresist composition across the surface, wherein the solvent mixture comprises from about 50 to about 80 parts by weight, based on the weight of the solvent mixture, of at least one di(C1-C3)alkyl carbonate and from about 20 to about 50 parts by weight, based on the weight of the solvent mixture, of cyclopentanone.
Patent TW-521380-B (TW)
Title: Method for forming isolation layer of semiconductor device
Inventor: KIM CHANG-GYU
IPC: H01L21/76
Filed: 2001-11-13
Granted: 2003-02-21
Abstract: A method for forming an isolation layer of a semiconductor device is disclosed. The method has a wet etching separately performed two times or more without a conventional chemical mechanical polishing process. In the method, a silicon substrate in which an active region and a field region are defined is provided, and a trench is formed in the silicon substrate within the field region. An insulating layer to be used as the isolation layer is then formed on the silicon substrate including the trench. Thus the trench is filled with the insulating layer. Next, a capping layer is formed on a resultant entire structure including the insulating layer, and selectively removed to expose an upper portion of the insulating layer in the active region. The exposed insulating layer in the active region is then removed by a first wet etching, and the residual capping layer is removed by a second wet etching. Accordingly, the isolating layer is obtained from the insulating layer remaining in the trench.
Patent TW-I239267-B (TW)
Title: Phosphonite ligands, catalyst compositions and hydroformylation process utilizing same
Inventor: BUNEL EMILIO ENRIQUE
IPC: C07C45/50
Filed: 2001-11-16
Granted: 2005-09-11
Abstract: Phosphonite ligands, catalyst compositions containing such ligands and a hydroformylation process using such catalyst compositions involving a bidentate phosphonite ligand having the structure represented by the following, wherein the Ar groups are either the same or different unbridged organic aromatic groups such as substituted or unsubstituted phenyl, substituted or unsubstituted naphthyl, mixtures thereof or the like are disclosed. The ligands in combination with a group VIII metal or group VIII metal compound are particularly useful in a hydroformylation process for reacting an ethylenically unsaturated compound to produce linear alkenals at high selectivity.
Patent TW-I241066-B (TW)
Title: Output Buffer with Reduced Noise
Inventor: SHIAU MING-CHUEN
IPC: H03K19/0175
Filed: 2001-11-29
Granted: 2005-10-01
Abstract: This invention provides one novel output buffer with reduced noise, which not only has simple circuit structure but also effectively prevents the level of ground voltage from floating and avoids noise from occurring, and simultaneously can enhance the stability of the whole chip. The output buffer mainly comprises one CMOS inverter composed of one PMOS transistor M1 and NMOS transistor M2, one first NPN transistor Q1, one second NPN transistor Q2, and one delayed circuit 1. When the input signal IN changes from high threshold to low threshold, the delayed time provided by the delayed circuit can enable the NMOS transistor M2 in the CMOS inverter to be turned on for a period of time, by means of which part of the drain current of PMOS transistor M1 can be absorbed away to let the base current in the first NPN transistor Q1 decrease and hence reduce the transient collector current (i.e. output current) flowing through the second NPN transistor Q2, which results in more moderated current variation rate of the output current and the maximum value of output current becoming smaller, which therefore can not only effectively suppress the transient potential difference induced by the grounding end, but also prevent the level of ground voltage from floating and noise from occurring, and simultaneously enhance the stability of the whole chip.
Patent TW-541284-B (TW)
Title: Inhomogeneous silicas for elastomer compounds
Inventor: BLUME ANKE DR
IPC: C01B33/18
Filed: 2001-12-19
Granted: 2003-07-11
Abstract: The present invention relates to silicas with an inhomogeneous structure as well as the manufacturing process and use of such silicas in elastomer compounds. Silicas containing at least two silica fractions, characterized in that at least two silica fractions differ in at least one measured value for BET surface area, CTAB surface area and DBP absorption by at least 10%, the respective proportion of the silica fractions in the silica is between 5 and 95% by weight, and they are present in the form of particles with an average particle size of more than 80mum, wherein the silica exhibits the following physicochemical data: BET surface area 80-300 m<2>/g CTAB surface area 80-300 m<2>/g DBP absorption 150-350 g/100 g.