Patent GB-722179-A (GB)
IPC: H04Q3/42
Abstract: 722,179. Automatic exchange systems. POSTMASTER GENERAL. May 3, 1951 [May 17, 1950], No. 12386/50. Class 40 (4). The pulse position in a cycle of a train of pulses indicative of one out of a group of circuits is registered in a register marked out of a group of such registers, each register comprising a plurality of groups of registering means (e.g. gas tubes), by the operation of one registering means in each group, each such combination defining one pulse position. General description. Connections are established over multiplex systems in a manner somewhat similar to that described in Specification 694,092, but the multiplex cycle has 99 pulse positions, all pulses in those positions being produced as a result of coincidence between two sets of pulses, the two sets being spaced at 9 and 11 times the fundamental pulse interval respectively as described in Specification 707,384, [Group XL (c)]. These sets of pulses will hereinafter be referred to a 9-phase and 11-phase pulse series there being 9 staggered 9-phase pulse series which are designated P1/9 ... P9/9 and 11 staggered 11-phase pulse series which are designated P1/11 ... P11/11. Each time position in the multiplex cycle is thus obtained from the coincidence of a pair of pulse trains Px/9, Py/11. A circuit is caused to produce marking pulses which in the case of a selector are produced by the application of a marking potential to an input to a marking multiplex, and in the case of a line-finder are obtained from the speech multiplex. The marking pulses are then fed to a master register comprising two sets of gas tubes for registering the phase numbers of the 9-phase and 11-phase trains whose coincidence determines the pulse position of the first marking pulse received. The registrations are then transferred to a slave register associated with a marked circuit on the other side of the speech multiplex to the marked circuit. In the case of a selector the circuit marking is obtained from preceding selector stages, but in the case of a line finder a free circuit is temporarily marked artificially by a slave-marker which receives marking pulses over a multiplex circuit from all free circuits and registers one of them in a manner similar to that of the master register. The line finder and selector are designed for use in the complete exchange system described in Specification 722,172. Specifications 707,379, [Group XL (c)], and 722,174, also are referred to. Fig. 9 illustrates the pulse trains generated by common means and used in the equipment described. Pulses KS1, of 0.2Ás duration, are spaced by 1Ás and are each centred on one of the nine-phase and on one of the eleven phase pulses, Px/9, Py/11, which latter are of 0.8Ás duration. Pulses KS2 and KS3 are delayed 0.5 and 0.6Ás respectively on the corresponding KS1 pulses. Px/9n and Py/11n are negative versions of pulses Px/9 and Py/11. Selector action. Setting the master register. Connection S, Fig. 10, is completed but LF1, Fig. 10, and LF2, Fig. 13, are not. An incoming circuit marked by 10 Kc. current on pair 13, Fig. 11, is required to be connected to one of a group of outgoing circuits marked by positive potential on lead 6. The outgoing circuit is allotted a time position in the multiplex cycle corresponding to the coincidence of the pulses Px/9 and Py/11 and, with the circuit marked over lead 6, pulses at this time position are fed over a multiplex circuit to valve V8 after which they are restricted in duration by combining with pulse KS1 in a coincidence circuit and are then amplified and fed through the gate V10 and lead 10 to the master register, Figs. 13, 14. The pulses are fed via a pulse lengthening circuit to valve V55A which is thereupon cut off and with V55B normally cut off the potential of lead 26 rises to enable the register circuits of Fig. 14, and also to enable V59. Which in turn enables V58 which then repeats the incoming pulses from lead 10, the first of which triggers the blocking oscillator V47. The latter thereupon passes a 0.8Ás pulse to the gate valve V43 which opens to pass the corresponding KS3 pulse to the blocking oscillator V42 which produces a 0.8Ás "set-up" pulse and is then disabled (by condenser C68) for 150Ás to prevent operation by subsequent pulses from any other marked outlets. This set-up pulse occurs approximately 1Ás later than the corresponding marking pulse due to the delays introduced in the various stages and is applied to the input gates of 9 valves such as V29, V32 and 11 valves such as V35, V38. The input gates of these tubes are fed by pulses having a phase number, one greater than those of the phase numbers they represent, to allow for the abovementioned 1Ás transit delay. Thus, if the 9-phase number of the pulse corresponding to the marked outlet is 1, so that the input gate to V29 must be operated, that gate is fed with a P2/9n pulse. Valve V29 thereupon conducts to strike that gas-filled tube V27 corresponding to the 9-phase number 1. A cold cathode tube such as V35 is similarly struck in the 11-phase register group. The drop in voltage of lead 26 due to the firing of the thyratrons disables tube V43 to prevent further pulses being fed to the blocking oscillator V42 after its inert period has expired. Checking the setting of the master register. The firing of V27, V33 admits pulses P1/9n, P1/11n to the respective common anode leads of the two register groups and these are combined in a coincidence circuit comprising rectifiers W72, W73 to produce a pulse corresponding to the multiplex pulse position indicated by the combination of the two fired tubes. The operation of the coincidence circuit is inhibited by the conduction of rectifier W71 until an instant 350Ás after the application of H.T. to lead 26, after which V39 conducts to back-bias W71. This prevents false operation of the coincidence circuit due to transients when the H.T. is first applied. The pulse output from the coincidence circuit triggers the blocking oscillator V41 which produces a 0.8Ás "secretary" pulse. This is fed to a coincidence circuit comprising rectifiers W81, W82 which is also fed by pulses incoming from the lead 10. The output of the coincidence circuit is lengthened to 1Ás and makes V50 conduct. The secretary pulse also feeds the network R104, R105, C74, W84, the last being back-biased at the trailing edge of the pulse to cut off V51. If the register tubes have fired correctly, the secretary pulse and the incoming pulse from lead 10 will coincide and current will be maintained by V50 in anode resistor R107 when V51 is cut off. If, however, the incoming and secretary pulses do not coincide, current will cease in R107, thereby triggering V55B to its operated condition so lowering the potential on lead 26 sufficiently to restore the master register to normal, whereupon a further attempt may be made when V55B restores. Setting the slave register and completing the connection. The rise in cathode potential of the master register tubes V27, V33 raises the potential of the striker electrodes of corresponding gas tubes V19, V22 in all the slave registers, Fig. 12. The marking on the pair 13 of the incoming circuit is applied via leads 13a to a voltage doubler circuit which lowers the potentials of the common cathode leads 20, 21 of the 9- and 11-phase registers of the slave associated with the particular incoming circuit. The valves V19, V22 of this slave thus fire and pulses P1/9n, P1/11n are thereby admitted to the common anode leads 18, 19 which are connected to the coincidence circuit comprising rectifiers W44, W45. The presence of the common cathode resistors R45, R46 prevents any further tubes in the slave register being fired. The output, which is fed to lead 11, consists of a pulse in the time position of the pulse received over lead 10. The pulse on lead 11 is fed over lead 9 to the gate valve V10 where it suppresses the corresponding pulse on lead 10. Hence with lack of coincidence between an incoming pulse and a secretary pulse V51 is cut off as described above, thereby causing valve 55B to conduct and depress the potential on lead 26 to restore the master register. In Fig. 10 speech signals received over pair 1 are applied to the coincidence circuit comprising rectifiers W1, W2, fed by the appropriate 9-phase and 11-phase pulses to modulate the coincidence pulse (provided a holding 10 Kc. signal is applied to pair 2) the modulated pulse being fed over the multiplex lead 8 to the circuit of Fig. 11 where the pulse is then gated by pulses from lead 11 to the valve V13, demodulated by the low-pass filter F2, and fed to pair 15 of the outgoing circuit. The signals are also rectified to enable the oscillator V14 which transmits 10 Kc. holding signals over pair 16. Speech incoming over lead 12 modulates pulses received over lead 11, the modulated pulses passing over the multiplex lead 7 after which they are gated out by a coincidence circuit fed by the appropriate 9- and 11-phase pulses to valve V6. The resulting output is demodulated by low-pass filter F1, and passed to pair 3. The pulses are also rectified to enable the oscillator V7 which passes a 10 Kc. hold signal to pair 4. Forced release of master register. If due to faulty operation the register fails to release, condenser C73 charges up sufficiently after 15 ms. to fire tube V49 so depressing the potential of lead 26 sufficiently to release the master selector. Line finder action. This action is similar to the selector action with the exception that the marking pulses are replaced by calling pulses and since no hold signal will be present automatically to indicate which outgoing circuit such as that of Fig. 11 is to be used, equipment, Fig. 15, is provided to produce such a signal. Links LF1, LF2 are provided and link S removed. Calling pulses are produced by the coincidence circuit W1, W2, Fig. 10, which may now be enabled by the rise in potential over resistance R18 in