baber/WOPTO huggingface dataset:
Patent TW-534961-B (TW)
Title: Rope deflection and suitable synthetic fiber rope and rope drive
Inventor: DE ANGELIS CLAUDIO
IPC: F16H7/04
Filed: 2000-10-05
Granted: 2003-06-01
Abstract: On a rope deflection, such as preferably on a traction sheave drive for elevator installations, the diameter (20) of a traction sheave (5), or of a rope pulley, or of a rope drum, and the lay length of a synthetic fiber rope (3) passing over it are adapted to each other in such a way that within the angle of wrap (18) each of the strands (14, 15, 16) of the covering layer of strands lies on the traction sheave (5) at least three times. According to the invention, this achieves a permanently reliable rope drive with a synthetic fiber rope (3) for use on pulleys or traction sheaves, with which irreversible displacements of strands in the covering layer of strands of the synthetic rope can be reliably avoided.
Patent TW-457380-B (TW)
Title: Assembling method of optical filter device
Inventor: SU YUE-YI
IPC: G02B6/34
Filed: 2000-10-19
Granted: 2001-10-01
Abstract: An optical filter device is assembled according to the invention as an independent unit in an optical add/drop multiplexer. The optical filter device is glued to a hollow tubular holder by itself. The hollow part of the holder consists of a blocking surface and a mounting surface. These two surfaces have different depths and stepwise cross section. The filter is glued to the mounting surface inside the holder and the holder is installed such that the filter is situated between two collimators of the optical add/drop multiplexer. Since the filter device is not glued to the collimator, the filter can be recovered easily when the manufacturing process goes wrong. Also, the optical add/drop multiplexer produced is smaller in size, easily assembled, and suitable for mass production.
Patent TW-513762-B (TW)
Title: Plasma treatment for polymer removal after via etch
Inventor: RAKHSHANDEHROO MOHAMMAD R
IPC: H01L21/311
Filed: 2000-10-23
Granted: 2002-12-11
Abstract: A method and article of manufacture of a via in a semiconductor layered device. The method can include applying an OH/H containing plasma, such as H2O or O2 or a forming gas, to a via which has been etched in a layer of the device. A mixture of oxygen and fluorine-based plasma is applied to complete cleaning of the via to provide a clean via with very little loss of dimensional and surface quality. In another aspect the OH/H containing plasma and the oxygen and fluorine-based plasma are applied together to clean the via.
Patent TW-506050-B (TW)
Title: Method for preventing cross contamination of copper ions by using metal layer as a barrier
Inventor: JANG CHING-YU
IPC: H01L21/76
Filed: 2000-11-16
Granted: 2002-10-11
Abstract: A method for preventing a cross contamination of copper ions by using a metal layer as a barrier comprises: prior to entering a copper process, depositing an inter layer dielectric material prior to forming a metal contact; turning over the chip; depositing a metal barrier layer on the back side of the chip to prevent the cross contamination of copper ions during a copper process; depositing an oxide layer on the barrier layer to prevent the barrier layer from directly contacting the wafer bearing seat.
Patent TW-463463-B (TW)
Title: Data receiver
Inventor: SONG KI-WHAN
IPC: H03K3/356
Filed: 2000-11-28
Granted: 2001-11-11
Abstract: A data receiver is provided for stabilizing a reference voltage to which input data is compared. The data receiver includes a differential amplification flip flop for comparing input data to a reference voltage in response to a clock signal, an amplifier for amplifying the results of the comparison, a latch for storing the logic level of the input data, and a counter coupling circuit for reducing the variation of the reference voltage caused by the operation of the differential amplification flip flop in response to an inverted clock signal. In the data receiver, the reference voltage is stably preserved without minimized variation. Also, there is substantially no consumption of direct current (DC) when the data receiver operates.
Patent TW-I255189-B (TW)
Title: Enzyme treatment
Inventor: ANDERSON DAVID M
IPC: A23K20/195
Filed: 2001-03-07
Granted: 2006-05-21
Abstract: Enzymes of a particular class, characterized by the ability to cleave a linkage that effects release of a cell-surface protein or carbohydrate, which does not contain an anti-infection agent, display significant anti-infectious activity. Upon oral administration, these enzymes are effective, for example, in the treatment of digestive tract infections in humans and in animals. In the latter, there are benefits of significantly improved growth rate, feed efficiency, and overall health.
Patent TW-594761-B (TW)
Title: Method of programming a flash memory cell
Inventor: KIM MIN-KYU
IPC: G11C16/02
Filed: 2000-12-19
Granted: 2004-06-21
Abstract: There is disclosed a method of programming a flash memory cell, which is performed applying a given voltage a gate and a drain and maintaining a source and a substrate at a ground potential. The method variably applies a given voltage, with two or more steps, to one of the gate and drain terminals while applying a given voltage to the other of the gate and drain terminals, thus reducing the programming current per cell. Accordingly, the present invention can improve reliability and throughput of the flash memory cell.
Patent TW-486810-B (TW)
Title: Semiconductor integrated circuit and method generating internal supply voltage in semiconductor integrated circuit
Inventor: KATO YOSHIHARU
IPC: G11C11/407
Filed: 2001-01-04
Granted: 2002-05-11
Abstract: The invention aims at securely generating an internal supply voltage when turning on the power supply of internal circuits in a semiconductor integrated circuit where the operation voltage is low, and securely resetting the internal circuits. The voltage generator generates an internal supply voltage supplied to the internal circuits based on the reference voltage by using the external supply voltage supplied from the exterior. That is, the voltage generator forcibly supplies the external supply voltage as internal supply voltage when the power-on reset signal is activated. Therefore, when the external supply voltage is low at the time of turning-on of the power, and the voltage generator does not operate normally, the internal supply voltage can be securely generated following the external supply voltage so as to be supplied to the internal circuits.
Patent TW-497058-B (TW)
Title: Management system of on-line transaction website
Inventor: YANG CHENG-SHI
Filed: 2001-01-05
Granted: 2002-08-01
Abstract: There is provided a management system of on-line transaction website, in which a enterprise website is established in a server, and the enterprise website allows the enterprise owner to perform an electronic commercial transaction with the supplier and customer via the Internet. The enterprise website is established primarily by a company website management system. The company website management system further comprises: a company data management system; a supplier data management system; a customer data management system; and a company web-page data management system. The object of the present invention is to enable the enterprise to easily integrate the information among the company, supplier and customer, and establish an electronic commercial transaction website to electronically automate the enterprise and save the cost and labor for establishing and maintaining website.
Patent TW-524772-B (TW)
Title: Method for manufacturing hydrophobic colloidal silica
Inventor: ERIYAMA YUICHI
IPC: C01B33/149
Filed: 2001-01-29
Granted: 2003-03-21
Abstract: The invention relates to a new method of manufacturing colloidal silica which exhibits good dispersibility in an organic solvent, an organic resin, a paint containing an organic solvent or resin, or the like, is stable for a long period of time in a medium containing a hydrophobic organic solvent as a major component, and has a low metal ion impurity content under mild conditions. The new method comprises the steps of taking a colloidal silica dispersed in an aqueous dispersant; replacing a substantial amount of the aqueous dispersant with one or more hydrophilic organic solvent(s); preparing hydrophobic colloidal silica by reacting the colloidal silica with an hydrophobizing agent; and finally replacing the liquid phase of the dispersion comprising the organic hydrophilic solvent with one or more hydrophobic organic solvent(s) to obtain a hydrophobic colloidal silica dispersed in a hydrophobic organic solvent.
Patent TW-466612-B (TW)
Title: Method for forming electrode with hemispherical silicon grains
Inventor: CHEN WENG-YI
IPC: H01L21/28
Filed: 2001-02-08
Granted: 2001-12-01
Abstract: The present invention provides a method for forming an electrode of a capacitor in DRAM, which comprises: providing a semiconductor structure having a dielectric layer formed thereon; forming at least one first conductive electrode comprising silicon in the dielectric layer and on the surface; forming a second conductive layer on a sidewall of the first conductive electrode; and forming a plurality of hemispherical silicon grains on the second conductive layer, wherein the hemispherical silicon grain on the second conductive layer has a well-controlled growing thickness.
Patent TW-567202-B (TW)
Title: Process for producing novel silicone polymer, silicone polymer produced by the same process, thermosetting resin composition, resin film, metal foil with insulating material
Inventor: BABA HIDEO
IPC: C08L83/05
Filed: 2001-03-30
Granted: 2003-12-21
Abstract: A process for producing a silicone polymer, characterized by hydrolyzing/condensation-polymerizing one or more silane compounds comprising 35 to 100 mol% silane compound represented by the formula (I): R'm(H)kSiX4-(m+k), [wherein X represents a group capable of undergoing hydrolysis and polycondensation, such as halogen, e.g., chlorine or bromine, or -OR (wherein R represents C1-4 alkyl or C1-4 alkylcarbonyl); R' represents a nonreactive group such as C1-4 alkyl or aryl, e.g., phenyl; and k is 1 or 2 and m is 0 or 1, provided that m+k is 1 or 2] and subjecting the resultant reaction product to hydrosilylation with a hydrosilylating agent.
Patent TW-490876-B (TW)
Title: Nonaqueous electrolyte secondary battery
Inventor: NIRASAWA TAKAO
IPC: H01M10/0525
Filed: 2001-04-10
Granted: 2002-06-11
Abstract: A nonaqueous electrolyte secondary battery includes a positive electrode having a positive electrode active material, a negative electrode containing a negative electrode active material capable of being doped/undoped with lithium, and a nonaqueous electrolyte. The nonaqueous electrolyte contains at least one of thiols, thiophenes, thioanisoles, thiazoles, thioacetates, aromatic sulfones, and the derivatives thereof. The capacity of the battery is not significantly degraded after cycling and its cycle life is significantly long.
Patent TW-I289561-B (TW)
Title: Process for the preparation of 6-(4-chlorophenyl)-2,2-dimethyl-7-phenyl-2,3-dihydro-1H-pyrrolizin-5-ylacetic acid
Inventor: KAMMERMEIER THOMAS
IPC: A61K31/407
Filed: 2001-05-09
Granted: 2007-11-11
Abstract: The present invention relates to a process for the preparation of the compound of the formula I, where the compound of the formula III, is reacted with oxalyl chloride and the product obtained is treated with hydrazine and an alkali metal hydroxide in the aqueous phase at elevated temperature, after treatment is complete a three-phase system is produced by addition of an ether and the compound of the formula I is obtained by acidifying the middle phase. The invention moreover relates to a polymorph of the compound of the formula I.
Patent TW-480687-B (TW)
Title: Pin surface mounting process of pin grid array package
Inventor: DUNG YI-JUNG
IPC: H01L23/28
Filed: 2001-05-15
Granted: 2002-03-21
Abstract: The present invention relates to a pin surface mounting process of pin grid array package, which is a process using damascene pins on the surface of a substrate to form a pin grid array packet. The process comprises: first providing an organic wiring substrate formed thereon a circuit pattern, the substrate has at least one surface comprising a pad for carrying at least one conductive pin; forming a protective layer on the surface of the wiring substrate, patterning the protective layer to expose the pad, and forming a well surrounding the periphery of the pad; placing pins and soldering material on the pad in the well, wherein the protective layer can make the soldering material be fully filled in the gap between the pad periphery and protective layer without covering any part of the pad; under a temperature capable of melting the soldering material, soldering the pins to the pad, and encapsulating the pad by the soldering material so as to fix the pad, thereby completing the pin surface mounting process of pin grid array package.
Patent TW-529226-B (TW)
Title: Structure of stator line slot seat with a loop-closed stable device
Inventor: SHIU JIUN-FU
IPC: H02K3/48
Filed: 2001-06-12
Granted: 2003-04-21
Abstract: In order to enhance the effective operating efficiency of the motor and generator, there is provided a structure which separates the stator teeth part from the stator part as an individual one, and sleeves the same on the stator line slot seat with a loop-closed stable device, thereby pursuing a stator coil capable of being installed in the insulating line slot seat with a larger area occupying rate and establishing two side up face parts at the left and right ends of the teeth back end part of the insulating line slot seat, which are matched with each other to form a loop-closed stable bonding for eliminating the exciting and oscillating phenomenon caused by the reaction between the armature of the rotator magnet and the stator teeth that separates from the stator part and re-assembled with the same, and enhancing the strength of the mechanical structure of the assembled stator part, thereby keeping the operation of the armature reaction between the stator and the rotator magnet in a stable operating state.
Patent TW-511095-B (TW)
Title: Semiconductor memory device having row repair circuitry
Inventor: LEE JUNG-SEOP
IPC: G11C29/00
Filed: 2001-06-27
Granted: 2002-11-21
Abstract: The disclosure is a semiconductor memory device cooperated with row repair circuitry by which defective wordlines are substituted with redundant wordlines regardless of locations of cell array blocks, the redundant wordlines being arranged in a specific cell array block. The semiconductor memory device includes a plurality of memory blocks at least one of which includes a plurality of redundant wordlines; a plurality of row repair fuse boxes the number of which is the same with the number of the redundant wordlines, the fuse boxes being divisionally arranged with the same number respective in the memory blocks; and repair means to repair a defective wordline with the redundant wordline, the redundant wordlines corresponding to the row repair fuse boxes each by each.
Patent TW-I252103-B (TW)
Title: Pharmaceutical compositions for the treatment of painful, inflammatory and ulcerative conditions of moist epithelial surfaces such as mucositis, stomatitis and Behcet's syndrome
Inventor: MASTRODONATO MARCO
IPC: A61K31/196
Filed: 2001-07-26
Granted: 2006-04-01
Abstract: Pharmaceutical compositions comprising as active ingredients effective doses of hyaluronic acid, glycyrrhetinic acid and polyvinylopyrrolidone, for the treatment of painful, inflammatory and ulcerative conditions of moist epithelial surfaces such as mucositis, stomatitis and Behcet's syndrome.
Patent TW-499732-B (TW)
Title: Gap filling process for gap with step shape sidewall
Inventor: DU YOU-LUEN
IPC: H01L21/76
Filed: 2001-08-16
Granted: 2002-08-21
Abstract: This invention provides a method of gap filling for gap with step shape sidewall using high density plasma filling process. Firstly, the deposition/sputtering ratio of the high density plasma deposition process is increased to form deposited film with a overhang structure on the step shape sidewall of the gap. Subsequently, the deposition operation of the high density plasma deposition is stopped and the sputtering operation remains to remove the overhang structure and to form gently inclined surface on the residual film layer of the gap sidewall. The deposition/sputtering ratio of the high density plasma deposition process is further reduced to resume film deposition and thus form filling material in the gap.
Patent TW-508559-B (TW)
Title: Liquid crystal display device
Inventor: FURUHASHI TSUTOMU
IPC: G09G3/36
Filed: 2001-08-17
Granted: 2002-11-01
Abstract: The present invention discloses a liquid crystal display device comprising: a liquid crystal panel for displaying a tone in correspondence with a potential difference between a drain voltage and a common voltage; a drain driver circuit for generating the drain voltage corresponding to the display data and applying the drain voltage to the liquid crystal panel; and a gate driver circuit for selecting a scanning line in the liquid crystal panel to which the drain voltage is applied; a power-supply circuit for executing a comparative calculation of a reference common voltage whose potential level having been adjusted and a feedback common voltage fed back from the liquid crystal panel, and then applying the common voltage obtained as a result of the comparative calculation to the liquid crystal panel. The power-supply circuit can also make the gate cutoff voltage for the gate of the cutoff switching element in the liquid crystal display panel to have high impedance, and supply it to the gate driver circuit.
Patent TW-515099-B (TW)
Title: Stacked structure for parallel capacitors and method of fabrication
Inventor: HUI FRANK YAUCHEE
IPC: H01L23/522
Filed: 2001-08-30
Granted: 2002-12-21
Abstract: A semiconductor device comprising: at least first and second levels of interconnect conductor for connection to a semiconductor layer; and a stack of alternating conductive and insulative layers formed in vertical alignment with respect to an underlying plane and formed between the first and second levels of conductor, including a first conductive layer, a first insulator layer formed over the first conductive layer, a second conductive layer formed over the first insulative layer, a second insulator layer formed over the second conductive layer, and a third conductive layer formed over the second insulative layer, with the first and third conductive layers commonly connected.
Patent TW-511284-B (TW)
Title: Cell structure and manufacture method of once-programmable ROM that can be programmed after process completion
Inventor: WEN WEN-YING
IPC: H01L27/115
Filed: 2001-09-14
Granted: 2002-11-21
Abstract: Cell structure and manufacture method of once-programmable ROM that can be programmed after process completion are provided. Set two oxide layers on the semiconductor substrate. There are plural doped regions on the substrate. Each of the two oxide layers has a window type insulated channel corresponding to the doped regions. Finally, form a poly-silicon layer on the thick oxide layer surface to be the gate region. When implement the post process programming, the poly-silicon layer can be punched through the thin oxide of the window type insulated channel and form a PN junction with the doped regions.
Patent TW-568963-B (TW)
Title: Method for producing polyester fiber suitable for a draw-texturing raw yarn
Inventor: IWADE TAKASHI
IPC: D02J1/22
Filed: 2001-09-28
Granted: 2004-01-01
Abstract: This invention provides a polyester fiber which has physical properties such as a double refraction Deltan of up to 0.07, an elongation after fracture of at least 80%, and a specific weight of at least 1.35 g/cm<3> and is suitable for a draw-texturing raw yarn, and which is produced by cooling polyester filaments melt-spun from spinnerets to up to a glass transition temperature by a cooling air while filaments are being taken up by a take-up roller at at least 3000 m/min, and by heating them to above a glass transition temperature while they are being wound up from the take-up roller into a package by a winding device.
Patent TW-538592-B (TW)
Title: Output buffer with charge-pumped noise cancellation
Inventor: MALONEY TIMOTHY J
IPC: H03K19/003
Filed: 2001-09-28
Granted: 2003-06-21
Abstract: A circuit is provided that has an output buffer connected to one of a plurality of output pads. A power source is connected to one of the plutrality of output pads. A first pair of capacitors is connected to the power source. A second pair of capacitors is connected to the first pair of capacitors and the power source. A first pair of signal sources are connected to the first pair of capacitors. A second pair of signal sources connected to the second pair of capacitors. The first pair of signal sources and the second pair of signal sources control discharge to the power source and recharge to the power source of the first pair of capacitors and the second pair of capacitors to cancel out noise caused by either a voltage or current switching transient. Also, a method is provided for sending data to an output buffer, determining data to be clocked the next cycle, and controlling a charge-pump circuit to compensate for a voltage transition from one of high-to-low and low-to-high. The method also provides that noise resulting from a voltage transition at an output is cancelled before occuring by the charge-pump circuit.
Patent TW-522512-B (TW)
Title: Forming method of dual-oxide structure in trench bottom portion
Inventor: CHUANG CHIAO-SHUN
IPC: H01L21/762
Filed: 2001-10-04
Granted: 2003-03-01
Abstract: A kind of forming method of dual-oxide structure in trench bottom portion is disclosed in the present invention. The invention is featured with the followings. After defining the trench, the first conformal oxide layer is formed on the sidewall and the bottom portion of the trench. Then a photoresist layer is deposited to fill up the space inside the trench. After that, the photoresist layer is etched back such that the height of the remaining photoresist layer inside the trench is smaller than the trench depth, and is followed by performing a solidifying process onto the photoresist layer to remove the residual solvent in the remaining photoresist layer. Then, part of the first oxide layer is stripped off. The remaining photoresist layer is removed such that the first oxide layer having a recessed face is formed on the trench bottom portion. After that, the second conformal oxide layer is formed on the trench sidewall and the remaining first oxide layer. Thus, a dual-oxide structure composed of the remaining first oxide layer and the second oxide layer is formed on the trench bottom portion.
Patent TW-554071-B (TW)
Title: Process and plant for the continuous hot dip-coating of a metal strip
Inventor: DAUCHELLE DIDIER
IPC: C23C2/26
Filed: 2001-11-09
Granted: 2003-09-21
Abstract: The subject of the invention is a process for the continuous dip-coating of a metal strip (1) in a tank (11) containing a liquid metal bath (12), in which process the metal strip (1) is made to run continuously through a duct (13), the lower part (13a) of which is immersed in the liquid metal bath (12) in order to define with the surface of the said bath a liquid seal (14). A natural flow of the liquid metal from the surface of the liquid seal (14) is set up in two overflow compartments (25, 29) made in the said duct (13) and each having an internal wall which extends the duct (13) in its lower part and the level of liquid metal in the said compartments is maintained at a level below the surface of the liquid seal (14). Another subject of the invention is a plant for implementing the process.