Patent UA-78850-U (UA)
Title: Shaper of single packet of meander-type pulses with programmable width and number of pulses in packet
Inventor: KOROBKOV MYKOLA HRYHOROVYCH
IPC: H03K3/78
Filed: 2012-06-05
Abstract: A shaper of a single packet of meander-type pulses with programmable width and number of pulses in a packet comprises two reversible binary counters, first of which is a countdown counter, comprising a clock input, a counting mode enable input, an asynchronous reset input, an overflow output; moreover, the first counter comprises a synchronous parallel loading enable input and loading inputs, an inverter, two OR elements; a circuit comprising in series connected a resistor and a capacitor; a start-stop device comprising a synchronous d-type flip-flop having an asynchronous reset, first and second elements two-input AND elements. The overflow output of first counter forming the shaper output, is connected to the inverter input, input of first element OR, and set in the summation/subtraction mode of second counter input, the inverter output is connected to the counting mode enable input of first counter, the overflow output of second counter is connected to the second input of first element OR, whose output is connected to the synchronous parallel loading enable input of first counter. The common point of series connected resistor and capacitor is connected to the information input of d-type flip-flop, with inputs of first and second elements AND, the output of first element AND is connected to the input of d-type flip-flop asynchronous reset, the output of d-type flip-flop is connected to the first input of second element OR, whose output is connected to the second input of second AND element, the output of second element AND is connected to the inputs of asynchronous reset of first and second counters. The clock inputs of first and second counters are connected to one another forming the input of shaper – an input for supply to periodic pulse sequence of output pulses from output of an external generator. The clock input of d-type flip-flop forms an input for start pulses supply; the synchronous parallel loading inputs of first counter form inputs for adjustment to preset length of output pulses comprising the clock input, counting mode enable input, asynchronous reset input, overflow output; moreover, the first counter comprises a synchronous parallel loading enable input and loading inputs, an inverter, two OR elements; a circuit comprising in series connected a resistor and a capacitor; a start-stop device comprising a synchronous d-type flip-flop having asynchronous reset, first and second elements two-input AND elements. The shaper comprises the third element AND, third element OR, third reversible binary countdown counter comprising clock input, first counter comprises synchronous parallel loading enable input and loading inputs, counting mode enable input, asynchronous reset input, overflow output; the overflow output of third counter is connected to the second input of second element OR, first inputs of third element AND, whose output forms the shaper output, third element OR, whose output is connected to the synchronous parallel loading enable input of third counter. The second input of third element OR is connected to the counting mode enable input of third counter, the third input of second element OR and output of first OR element. The second input of third element AND is connected to the inverter output and to the second input of element AND. The inputs of parallel loading of third counter form inputs for adjustment of the shaper to preset width of output pulses in a packet. The clock input of third counter is connected to the shaper input; the asynchronous reset of third counter is connected to the output of second element AND.