baber/WOPTO huggingface dataset:
Patent JP-H0227192-A (JP)
Title: Upper seal plug for re-installation of internal pump
Inventor: OKADA SHIGERU
IPC: F04D29/60
Filed: 1988-07-18
Abstract: PURPOSE:To eliminate the residual air at the time of water pouring without the necessity of delicate adjusting of the differential pressure by providing a claw for cooperating with a channel of the internal peripheral surface of the inner guide in a diffuser, at the tip of a pair of link fastened on the shaft of a boiling water reactor rod comprising an internal pump. CONSTITUTION:A hollow cylinder shaped rod guide 34 is concentrically provided on the upper end surface of an upper guide 32, passing through it. A rod 35 is slidably engaged with a lower guide 33 at its lower end, passing through the rod guide 34. An opening part 38 is provided on the middle part of the shaft direction of the hollow cylinder shaped main part 31, locating at the both ends of one diameter, and a claw 40 pivotally mounted on the tip of a link 39 fastened on the shaft of the rod 35 with its one end is faced to this opening. The claw 40 cooperates with a channel 37a of an inner guide 37 of a diffuser and its movement in the shaft direction is restricted.
Patent JP-S6333708-A (JP)
Title: Optical multiplexer/demultiplexer
Inventor: SEKI MASAFUMI
IPC: G02B6/122
Filed: 1986-07-28
Abstract: PURPOSE:To improve the yield by coupling a multiplexing waveguide to a common waveguide on a linear waveguide part and coupling a demultiplexing waveguide to the common waveguide by reflection on an interference filter. CONSTITUTION:Buried waveguides 2, 3, and 4 are formed on a transparent substrate 10 like a glass plate, and single mode waveguides where the used optical wavelength is in the single mode are used as waveguides 2 and 3, and a multimode waveguide is used as the waveguide 4. Waveguides 2, 3, and 4 are perpendicular to sides of the substrate 1 near short sides 11 and 12 of the substrate 1, and waveguides 2 and 3 are coupled by a waveguide 20 near a filter insertion groove 5, and an interference filter 6 is put in the groove 5. The waveguide 4 has a cross section larger than a reflection image 21 of the waveguide 2 related to a face normal 6A of the filter 6. In a multiplexer/demultiplexer 100, the light having a wavelength lambda1 which is made incident on the common waveguide 2 from a fiber 9 is reflected on the interference filter 6 and is coupled to the demultiplexing waveguide 4 and is made incident on a fiber 13. The light having a wavelength lambda2 which is made incident on the multiplexing waveguide 3 from a fiber 10 is transmitted through the interference filter 6 and is coupled to the common waveguide 2 and is made incident on the fiber 9. Thus, the light to be multiplexed is efficiently coupled to the common waveguide.
Patent JP-S6420728-A (JP)
Title: Syndrome calculation circuit
Inventor: HODOHARA KIYOAKI
IPC: H03M13/00
Filed: 1987-07-16
Abstract: PURPOSE:To attain high speed operation by clearing the circuit after a syndrome of a received signal to be inputted is calculated before the syndrome of the reception signal given next is calculated. CONSTITUTION:The syndrome calculation of the reception signal to be inputted is finished and the calculation result of one bit width is outputted and a syndrome calculation means 4 is cleared at the input of the next reception signal and the control signal inputted at the same time switches the switching means 6 from the syndrome calculation means to the storage means. Thus, the next reception signal is not fetched in the 1st stage storage means in the syndrome calculation means 4 but fetched in the storage means 5 not cleared and appears at the input side of the storage means of the next stage via the switching means 6. When clearing is released, the signal is fetched in the storage means of the next stage and the switching means 6 is restored and the next reception signal is subject to EX-OR for the 2nd bit and the result is fetched in the storage means of the 1st stage, then the syndrome is calculated correctly. That is, the result of calculation of the syndrome by one bit width is outputted, then the possibility of the circuit not driven at high speed is reduced.
Patent JP-S6070138-A (JP)
Title: Manufacture of alloy
Inventor: DOUNOMOTO TADASHI
IPC: B22D19/14
Filed: 1983-09-26
Abstract: PURPOSE:To obtain an alloy having a uniform composition and structure free from crack and macro-segregation by etching a porous molded body of the 1st metal and infiltrating a melt of the 2nd metal having a lower m.p. than the 1st metal into the molded body under pressure. CONSTITUTION:Powder, shavings or short fibers of the 1st metal or a mixture thereof, e.g., Co powder is filled into a cylindrical recess defined by the body 2 of a compression molding tool and an under punch 4, and the powder is compressed with an upper punch 3 to form a molded body 5. This body 5 is etched by immersion in an etching soln. 6 consisting of distilled water, hydrochloric acid and sulfuric acid, and the etched body 5 is dried. This body 5 is preheated in an Ar atmosphere and set in a preheated casting mold 7. Molten pure Al 8 is then charged into the mold 7, pressurized with a plunger 9, and thoroughly solidified in the state.
Patent JP-S5967648-A (JP)
Title: Semiconductor device and manufacture thereof
Inventor: WATANABE TETSUO
IPC: H01L21/76
Filed: 1982-10-12
Abstract: PURPOSE:To inhibit the generation of an oxidation induced stacking fault, and to prevent the deterioration of the isolation dielectric resistance of a p-n junction by forming an oxide film isolation region in an epitaxial layer and forming the epitaxial layer under the region in the same conduction type as a substrate. CONSTITUTION:A buffer layer 31 diffused to the epitaxial layer in which an impurity in the channel stopper section 25 of the semiconductor substrate has no crystal damage is formed between the channel stopper section 25 and the oxide film isolation region 26 on the stopper section 25. Consequently, since a crystal damage section is not oxidized directly, the generation of the oxidation induced stacking fault in the p-n junction section of the semiconductor device with isolation structure isolating a semiconductor element is inhibited, and isolation dielectric resistance can be improved. Accordingly, the yield of a transistor can be enhanced.
Patent JP-H1020674-A (JP)
Title: Developing device and image forming device
Inventor: ENDO ISAO
IPC: G03G15/09
Filed: 1996-07-08
Abstract: PROBLEM TO BE SOLVED: To stably obtain an image with high-image quality by applying application voltage intermittently provided with AC component on an electrode part, and applying DC voltage on the developer carrier (developing sleeve). SOLUTION: As for this device, the DC bias voltage is applied on the developing sleeve 81 through protective resistance R1 by a power source E1 . Moreover, on the electrode part 83a, the bias voltage added with the AC element on the DC component is applied from the DC power source E3 and the AC power source E4 through protective resistance R2 . On the electrode part 83a, the AC voltage charged in the same polarity as toner in the developer is applied. In the developing device 8, by the bias voltage application, a DC electric field is formed between a photoreceptor drum 10 and the developing sleeve 81, while an oscillating electric field is generated between the electrode part 83a of the control electrode 83 and the developing sleeve 81.  Since the toner particle in the developer D reaching the electrode part 83a vicinity is forced to oscillate in the direction vertical to the line of electric force by the this oscillating electric fields, the toner cloud in a multitudious state is allowed to rise satisfactorily.
Patent JP-S6069532-A (JP)
Title: Indentation hardness tester
Inventor: FUKUMOTO MITOSHI
IPC: G01N3/42
Filed: 1983-09-26
Abstract: PURPOSE:To obtain length signals of the 1st and the 2nd diagonals of an indentation given to a sample by using a linear scanning image pickup device to makes a linear scan on the indentation and pick up its image. CONSTITUTION:Light from a light source 44 is made incident to the sample 2 mounted on a sample placing table 1 through the lens 45 provided in a cylinder 42, the half-mirror provided in a cylinder 41, and the lens 47 provided in the cylinder 41. Its reflected light is made incident to the linear scanning image pickup device 21. Solid-state image pickup elements are arrayed linearly in a line on the reverse surface of a movable board 22 so that the array line passes the axis (a) of a holding base 23 and coincides with a line c-c crossing a line b-b at right angles. The linear scanning image pickup device 21 is driven and controlled with pulses from a clock pulse generating circuit 50. Then, the linear image pickup device 21 makes the linear scan on the indentation 3 of the sample and picks up its image in an in-focus state.
Patent JP-H05340109-A (JP)
Title: Column jointing method in construction of new structure
Inventor: NAKAJIMA TATSUO
IPC: E02D27/00
Filed: 1992-06-12
Abstract: PURPOSE:To make it possible to join a permanent column with a temporary beam carried laterally and hence facilitate joint work in a column joint method in the construction of a new building. CONSTITUTION:A temporary beam 4b is installed to a temporary bearing pile at a position deviated by a specified quantity from a permanent column installation position where a temporary rack is built on the temporary beam. Then, after a foundation pile and the temporarily fit-up permanent beam are constructed, the temporary beam 4b is carried up to the permanent column installation position by using a transfer device. The lower part of a permanent column 23 is once turned into an adjustable state in every direction, say horizontally and vertically so that a lower part 11a of a column joint material for the temporary installation beam may be positioned with the upper part 23a of the permanent column 23 and then jointed with each other. The lower part of the permanent column 23 is installed to a foundation pile 22, fastened and fixed with anchor bolts 31. Mortar 32 is filled up around the foundation pile 22, thereby producing one piece structure.
Patent JP-2001007790-A (JP)
Title: Data communication retransmission method
Inventor: INUZUKA TAKAYUKI
IPC: H04L1/18
Filed: 1999-06-24
Abstract: PROBLEM TO BE SOLVED: To guarantee the order of continuous data with the minimum buffers, even when any frame after a certain reception frame has errors. SOLUTION: When a request frame 2 is an NACK, a transmission side transmits a transmission frame 1 of the frame number, and when the request frame 2 is an ACK, the transmission side transmits the transmission frame 1 of the next number to the previous transmission frame number. When the received transmission frame 1 has an error, the reception side transmits the request frame 2(NACK) of the number of a frame to be received the next, and when the received transmission frame 1 does not have errors and the frame is already received, the reception side transmits the same request frame 2 as one frame before, and when the frame is not received, the reception side transmits the request frame (ACK) of the number of the transmission frame 1 to be received in the case of the transmission frame 1 to be received, and the reception side transmits the request frame 2(NACK)  of the number of the transmission frame 1 to be received in the other case.
Patent JP-S6157097-A (JP)
Title: Dynamic semiconductor memory
Inventor: NAKAIZUMI KAZUO
IPC: G11C11/406
Filed: 1984-08-27
Abstract: PURPOSE:To simplify an external controller by providing a refresh controller means to be shifted to a self-refresh mode when an -RAS clock goes to ''0'' level for a predetermined period at a -CAS before-RAS-refresh mode. CONSTITUTION:A memory is operated at a -CAS before-RAS refresh mode from time t31-t32 and at a self-refresh mode from time t32-t33. When -RAS clock is goes to ''0'' level at t31 and if a -CAS clock goes to ''0'' level, a -RAS timing generator circuit 20 is actuated to refresh the output from a refresh/address counter 23. The mode is shifted to the self-refresh mode at t32 to refresh the output from a refresh/address counter 23. When the -RAS clock goes to level ''1'' at t33, the self-refresh mode is relieved, thereby controlling the self-refreshing operation.
Patent JP-S6285817-A (JP)
Inventor: RIYUSHIEN GEE FUARUKO
IPC: G01N21/17
Filed: 1986-07-30
Abstract: (57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。
Patent JP-S6071895-A (JP)
Title: Heat transmitting device
Inventor: YANATORI MICHIO
IPC: F28D15/02
Filed: 1983-09-28
Abstract: PURPOSE:To contrive to improve the heat exchange efficiency and the heat controllability by a method wherein condensing pipes, evapolating pipes, steam transmitting pipes and fluid returning pipes with a bubble pump are divided into plural fluid circulating loops, and input to an individual heater for a bubble pump is provided or cut necessarily. CONSTITUTION:Steam transmitting pipes 5-a-5-c, fluide return pipes 6-a-6-c, riser pipes 8-a-8-c, tanks 7-a-7-c and pressure equalizing pipes 11-a-11-c are connected. And heaters 10-a-10-c are arranged at the base of each riser pipe 8-a-8-c. Hereby, a circulating loop with 1-a, a circulating loop with 1-b, and a circulating loop with 1-c operate all independently with others, and fins 4 around each evapolating pipe and fins 2 around condensing pipes all work well as heat transmitting surfaces, and highten the heat exchange efficiency of the whole devices, because refrigeration medium in evapolation pipes 3-a in the upper stream will not concentrately condense in the upper stream pipes 1-c for the condenser.
Patent JP-H0733378-A (JP)
Title: Opening/closing device for manhole cover
Inventor: BABA KAZUNORI
IPC: B66B31/00
Filed: 1993-07-19
Abstract: PURPOSE:To provide an opening/closing device of a manhole cover capable of easily opening or closing the heavy manhole cover. CONSTITUTION:This opening/closing device of a manhole cover is provided with a slide rail 10 continuously installed between immediately below a manhole 8 and an underfloor interior 5 around the manhole 8 and sliding a manhole cover 9 to store it in the underfloor interior 5 around the manhole 8 and a support bolt 11 vertically movably fitted to the slide rail 10, supporting the manhole cover 9, and lowering the cover 9 onto the slide rail 10.
Patent JP-S6333827-A (JP)
Title: Manufacture of semiconductor device
Inventor: ODA TAKESHI
IPC: H01L21/316
Filed: 1986-07-28
Abstract: PURPOSE:To form a thick PSG film having a suitable phosphorus by adding the steps of forming an insulating film and a phosphorus layer on an oxide film before or after the step of forming the oxide film. CONSTITUTION:A silicon wafer 1 is covered with a thermal SiO2 film 2 of certain thickness, and a phosphorus is deposited on the film 2 to form a first phosphorus-deposited layer 3. Then, a CVD SiO2 film is formed by a low pressure chemical vapor deposition method (LPCVD method) on the layer 3, and a phosphorusdoped SiO2 film 4 is simultaneously formed. Thereafter, a phosphorus is deposited on the film 4 to form a second phosphorus-deposited layer 5, a phosphorus sintering is executed to sufficiently drive the phosphorus from the layers 3 and 5 to the film 4 to form a phosphosilicate glass film (PSG film) 6. Thus, the phosphorus is sufficiently diffused upward or downward in the oxide film to obtain a PSG film having a suitable density.
Patent JP-H0343057-A (JP)
Title: Preparation of fermented soybean
Inventor: SUZUKI TAKAAKI
IPC: A23L11/00
Filed: 1989-07-11
Abstract: PURPOSE:To enable the control of temperature corresponding to the raw material and fermentation condition without using a skilled labor and to obtain fermented soybean having uniform quality by controlling the room temperature of a fermentation chamber while varying the room temperature stepwise within a prescribed temperature range including a preset room temperature in such a manner as to approach the soybean temperature to the target soybean temperature. CONSTITUTION:The preset target soybean temperature Ho is compared with the present soybean temperature Ht. When there is a discrepancy between the temperatures, a heating and cooling apparatus is operated to change the room temperature Rt of the fermentation chamber by a prescribed temperature in such a manner as to approach the real soybean temperature Ht toward the target soybean temperature Ho. The above procedure is repeated until the temperature change of the room temperature Rt falls within the prescribed temperature range of the preset room temperature Ro. The temperature control of the fermentation chamber can be performed by the above process.
Patent JP-2001011699-A (JP)
Title: Manufacture of aluminum supporting body for lithographic printing plate
Inventor: NISHINO ATSUO
IPC: C25F3/04
Filed: 1999-06-24
Abstract: PROBLEM TO BE SOLVED: To provide a method for stably and inexpensively manufacturing an aluminum supporting body for lithographic printing plate by which treatment irregularity, called streak/picture quality irregularity, caused by the difference in the aluminum dissolving rate due to the difference in the azimuth of crystal grains is hardly generated. SOLUTION: An aluminum plate is subjected to the etching treatment and/or the desmutting treatment in an acidic aqueous solution, followed by the preliminarily electrochemical surface roughnening treatment with an electric quantity of 1 to 300 C/dm2 by using an alternating current in a hydrochloric acid aqueous solution and further followed by the electrochemical surface roughening in the acidic aqueous solution. Furthermore, the aluminum plate is subjected to the 0.01 to 5 g/m2 etching treatment and/or the desmutting treatment in the acidic aqueous solution, followed by the anodizing treatment to manufacture the aluminum supporting body for lithographic printing plate.
Patent JP-S57102646-A (JP)
Title: Electrophotographic receptor
Inventor: HASHIMOTO MITSURU
IPC: C09B11/26
Filed: 1980-12-19
Abstract: PURPOSE:To obtain a highly sensitive receptor having flat sensitivity all over the visible region by forming a charge generating layer contg. a specified disazo pigment and a charge transferring layer contg. a specified diarylmethane compound on an electrically conductive support. CONSTITUTION:A prescribed amount of a disazo pigment represented by formula Iis dissolved in THF, and a prescribed amount of a compound represented by formula II (where R1 is 1-11C alkyl, phenyl or heterocyclic, each of R2 and R3 is H, 1-4C alkyl, hydroxyalkyl, chloroalkyl or aralkyl, and R4 is H, 1-4C alkyl, alkoxy or halogen) is dissolved in THF separately from the pigment. The former soln. contg. the pigment of formulaI is applied to an electrically conductive support 11 of Al or the like to form a charge generating layer 22, and the latter soln. contg. the compound of formula II is applied to the layer 22 to form a charge transferring layer 33. Thus, an electrophotographic receptor is obtd.
Patent JP-2001005344-A (JP)
Title: Image forming device
Inventor: OKUNISHI KAZUO
IPC: G03G15/01
Filed: 1999-06-24
Abstract: PROBLEM TO BE SOLVED: To speed up start of image formation, after switching of an operation mode by pre-implementing a second image stabilization control, capable of being implemented in both operation modes, when a second operation mode is set. SOLUTION: In the case the device decides image stabilization control is necessary (S102) and the operation mode is a color mode (S105), rough adjustment is made for each of colors, M, C, Y and K, as necessary under the color mode (S107). Then, fine adjustment is made for each of the colors M, C, Y and K under the color mode (S108). In the case of a monochromatic mode (S105), rough adjustment is made for each of the colors, M, C, Y and K under a monochromatic mode (S109). Then, fine adjustment is made for the color K under the monochromatic mode (S110). By the implementation of image stabilization control in advance, capable of being implemented even in monochromatic mode, the control for determination of development bias for each of the colors M, C and Y can be omitted after switching to the color mode, and therefore, start of image formation is speeded up.
Patent JP-S6156938-A (JP)
Title: Method and apparatus for measuring viscosity
Inventor: HACHITANI NORITAKA
IPC: G01N11/14
Filed: 1984-08-27
Abstract: PURPOSE:To make it possible for perform continuous and accurate measurement, by obtaining the number of rotation with the torque of a viscosimeter being constant at high viscosity, obtaining the torque with the number of rotation being constant at low viscosity, and obtaining the viscosity at a specified temperature by a programmable operator. CONSTITUTION:A speed control motor 8, a tacho-generator 9, which detects the number of rotation, and a torque detector 6 are provided. A rotary cylinder type viscosimeter is composed of those devices, a rotary cylinder 1, which is connected to the detector 6, an outer tube 2 for the cylinder and an overflow tube 3. The rotation of a motor is controlled so that the torque of the rotary cylinder 1 is constant in a high viscosity region. The change in number of rotation at this time is measured. In a low viscisity region, the rotation of the motor is made constant, and the change in torque at this time is measured. The results are inputted to a programmable operator, and the viscosity value at the specified temperature is obtained. Thus the viscosity of liquid at arbitrary temperature can be measured accurately and continuously.
Patent JP-H1117370-A (JP)
Title: Heat sink for electronic equipment
Inventor: KOMURA KEIICHI
IPC: F28D15/02
Filed: 1997-06-19
Abstract: PROBLEM TO BE SOLVED: To provide a heat sink for electronic equipment with high cooling capability. SOLUTION: The upstream side of a second heat sink body 3 with a semi- closed structure, where the upstream side and a downstream side are opened, is provided at the downstream side end part of a first heat sink body 2 with a semi-closed structure where the upstream and downstream sides are opened, a first forced cooling means 5 for circulating a refrigerant in the first and second heat sink bodies 2 and 3 and cooling the first and second heat sink bodies 2 and 3 from the inside is provided at the upstream side opening part, and at the same time, a second forced cooling means 6 for cooling the outside of the second heat sink body 3 is provided near the second heat sink body 3.
Patent JP-S6070828-A (JP)
Title: Squelch level setting device
Inventor: MIYAMOTO TSUTOMU
IPC: H04B1/10
Filed: 1983-09-27
Abstract: PURPOSE:To set optimum squelch level without confirming a set level by a scale by comparing an input electric field strength voltage applied to an input terminal and a squelch level and connecting a sound output when the electric field strength voltage is larger. CONSTITUTION:A DC voltage proportional to an input electric field of a receiver is applied to a terminal 21 and given to each one input of 10 comparators 40- 49. A standard voltage divided by a resistor 31 is applied to other terminal 22. The output is set in the order of the comparators 40-49 as the input electric field to the terminal 21 rises, a diode corresponding to a light emitting diode array 110 is lighted sequentially. Each output of comparators 50-59 to which an output of a variable resistor 32 adjusting the squelch level is applied is also given to a light emitting diode array 120. A comparator 60 compares the input electric field strength voltage with the squelch level and when the electric field strength voltage is larger, an on-output is given to a terminal 23 so as to apply on/off-control to the sound output of a sound amplifier 7.