Patent SG-11201900341W-A (SG)
Title: Apparatuses including multi-level memory cells and methods of operation of same
Inventor: TORTORELLI INNOCENZO
IPC: G11C11/56
Filed: 2017-07-21
Abstract: INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY (PCT) (19) World Intellectual Property MD HIM 0 11101 HOE 3E1 0 0111E011H 01 010 HIDE ill 011 Organization International Bureau (10) International Publication Number (43) International Publication Date .....0\"\"\" WO 2018/031217 Al 15 February 2018 (15.02.2018) WIP0 I PCT (51) International Patent Classification: Agostino; Via Pompeo Marchesi, 57, 20153 Milano (IT). G11C 11/56 (2006.01) REDAELLI, Andrea; Via San Giovanni Bosco 2, 23880 (21) International Application Number: Casatenovo (IT). FRATIN, Lorenzo; Via Vivaldi 8, 80090 PCT/US2017/043245 Buccinasco (IT). PELLIZZER, Fabio; 6142 E. Settlement Court, Boise, Idaho 83716 (US). (22) International Filing Date: (74) Agent: DORSEY & WHITNEY LLP et al.; 701 5th Ave, 21 July 2017 (21.07.2017) Suite 6100, Seattle, Washington 98104 (US). (25) Filing Language: English (81) Designated States (unless otherwise indicated, for every (26) Publication Language: English kind of national protection available): AE, AG, AL, AM, (30) Priority Data: AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, 15/231,518 08 August 2016 (08.08.2016) US CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FL GB, GD, GE, GH, GM, GT, HN, (71) Applicant: MICRON TECHNOLOGY, INC. [US/US]; HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, 8000 South Federal Way, Boise, Idaho 83716 (US). KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, (72) Inventors: TORTORELLI, Innocenzo; Via Verdi 2 A, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, 20063 Cernusco Sul Naviglio (IT). MEYER, Russell L.; 6495 Escarpment, Boise, Idaho 83716 (US). PIROVANO, Title: APPARATUSES INCLUDING MULTI-LEVEL MEMORY CELLS AND METHODS OF OPERATION OF SAME (54) = 200 = = 220-M = 220-1 . . . = 220-0 225 -.0 -41111110. = = = 230-N . 225 . . = = 0 0 = — 230- I 225 = 230-0 = FIG. 2 ,-, Ir ----- (57) : Disclosed herein is a memory cell including a memory element and a selector device. Data may be stored in both the 1-1 N memory element and selector device. The memory cell may be programmed by applying write pulses having different polarities and Il magnitudes. Different polarities of the write pulses may program different logic states into the selector device. Different magnitudes of f .r1 the write pulses may program different logic states into the memory element. The memory cell may be read by read pulses all having 0 ---- the same polarity. The logic state of the memory cell may be detected by observing different threshold voltages when the read pulses GC , I are applied. The different threshold voltages may be responsive to the different polarities and magnitudes of the write pulses. 0 ei O [Continued on next page] WO 2018/031217 Al MIDEDIMOMOIDEIREEMODHOMOH1010Enin SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW. (84) Designated States (unless otherwise indicated, for every kind of regional protection available): ARIPO (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW), Eurasian (AM, AZ, BY, KG, KZ, RU, TJ, TM), European (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR), OAPI (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG). Published: — with international search report (Art. 21(3))