baber/WOPTO huggingface dataset:
Patent TW-359941-B (TW)
Title: Method and basis-station-system to configure a radio interface between a mobile station and a basis-station of time-multiplex mobile radio system for a packet-data transmission
Inventor: MENZEL CHRISTIAN
IPC: H04Q7/38
Filed: 1997-11-13
Granted: 1999-06-01
Abstract: For a signalization to configure a radio interface to a packet-data transmission (GPRS), time-slots are assigned to the mobile station through a basis-station according to a pre-determinable sequence to signalization independent from a packet-data transmission. The time to configure the radio interface can also be reduced as follows: many time-slots for signalization are combined to become a signalization-block or the signalization to many mobile stations is carried out within a time-slot. This signalization is used to determine and adjust the timing advance (TA).
Patent TW-399077-B (TW)
Title: The manufacture of the cork EVA foamed body
Inventor: SHIU JU-SHENG
IPC: C08J9/04
Filed: 1997-11-13
Granted: 2000-07-21
Abstract: This is a manufacturing method of the cork EVA foamed body that mixes the following raw material: pigment, foamed agent, bridging agent, facilitating agent, Vinyl acetic vinyl ester resin (EVA), PE, fillings, cork filings after excluding the EVA incompatibles. The mixture is then machine-kneaded to form a lump spheral semi-product. It is then mixed in a mixer into homogeneous to form a long-bench shape. After cooling, it is cut, weighted, foamed into the final format.
Patent TW-436473-B (TW)
Title: Process for the production of aromatic amines by gas phase hydrogenation
Inventor: LANGER REINHARD
IPC: C07C209/36
Filed: 1997-12-04
Granted: 2001-05-28
Abstract: The present invention relates to a process for the production of aromatic amines by catalytic hydrogenation of corresponding aromatic nitro compounds in the gas phase on immobilised catalysts which contain one or more metals of groups VIIIa, Ib, IIb, IVa, Va, VIa, IVb and Vb of the periodic system of elements (Mendeleyev) on a ceramic support material having a BET surface area of less than 40 m<SP>2</SP>/g, at molar ratios of hydrogen to nitro group or nitro groups of 3:1 to 30:1 and temperatures in the catalyst bed of 180 to 500 DEG C, characterised in that loading of the catalyst with the aromatic nitro compounds used is increased continuously or step-wise from 0.01-0.5 to 0.7-5.0 kg/l*h, wherein maximum loading is achieved  within 10 to 1000 hours. The process according to the invention may be performed on an industrial scale without problems and ensures an elevated space/time yield combined with improved productivity of the catalysts used.
Patent TW-399229-B (TW)
Title: The test method of radio frequency circuit and its device
Inventor: JUNG YUAN-SHENG
IPC: H01L21/00
Filed: 1998-02-03
Granted: 2000-07-21
Abstract: The radio frequency circuit test device locates between the radio frequency interface circuit and a radio frequency producer. It contains a signal detection device to examine the multiple input/output signals; a switch selection device to switch at least one input control signal of the radio frequency producer between an interface control status and a manual status; and a power detection device for checking the setup power of the radio frequency interface circuit and the power of the radio frequency producer. The method of testing radio frequency interface circuit comprises of following steps. First, turn on the radio frequency producer and examine the launch signal of the radio frequency interface circuit. Detect the power set up signal of the radio frequency interface circuit and the power supply of the radio frequency producer. Check the activated status of the radio frequency producer. Afterwards, input the launch signal into the radio frequency producer and check the starting status. Then change the power setup signal to measure the forward power of the radio frequency producer.
Patent TW-388919-B (TW)
Title: Optical proximity correction method for intermediate-pitch peatures using sub-resolution scattering bars
Inventor: CHEN JANG-FUNG
IPC: G03F1/00
Filed: 1998-03-02
Granted: 2000-05-01
Abstract: A method for providing scattering bars for optical proximity effect correction on a mask used in a lithographic process. Scattering bar spacing and characterisitics are adjusted and varied along with primary feature edge location in order to control CD's of  features that are spaced a distance greater than the minimum pitch of a lithographic process but less than a nominal distance for two feature edges having independent scattering bars.
Patent TW-493326-B (TW)
Title: A radio communication system selectively using multicast with variable offset time
Inventor: LANGLET GARL ERIK JOAKIM
IPC: H04B7/06
Filed: 1998-03-04
Granted: 2002-07-01
Abstract: A digital base station improves downlink coverage by allocating multicast and non-multicast channels based on the propagation property of an RF link between a mobile unit and a base station. The non-multicast channels are time slots during which information is transmitted from one antenna, and multicast channels are time slots during which information is transmitted from multiple diversity antennas. Transmission timing is offset from the diversity antennas by an amount that corresponds to the multipath propagation properties of the RF link.
Patent TW-513585-B (TW)
Title: Fiber optic connector
Inventor: ERDMAN DAVID D
IPC: G02B6/38
Filed: 1998-04-28
Granted: 2002-12-11
Abstract: A fiber optic connector comprises a housing (4) retaining a ferrule assembly (1). The ferrule assembly(l) comprises a generally tubular rear portion defining a rear passage (11) along a longitudinal axis (20) of the ferrule assembly (1). A clamping insert (12) and a sleeve (13) are disposed within the rear passage (11). The sleeve (13) telescopically receives the insert (12) and exerts a radial force on the clamping insert (12) to align and retain a terminating fiber (35).
Patent TW-591111-B (TW)
Title: Method for identifying or selecting compounds with potential for treating neoplasia
Inventor: PAMUKCU RIFAT
IPC: G01N33/574
Filed: 1998-05-25
Granted: 2004-06-11
Abstract: This invention provides a method to identify compounds potentially useful for the treatment of neoplasia in mammals. The phosphodiesterase inhibitory activity of a compound is determined along with COX inhibitory activity. Growth inhibitory and apoptosis inducing effects on cultured tumor cells are also determined. Compounds that exhibit phosphodiesterase inhibition, growth inhibition and apoptosis induction, but not substantial prostaglandin inhibitory activity, are desirable for the treatment of neoplasia.
Patent TW-375825-B (TW)
Title: ESD (electrostatic discharge) protective design for integrated circuits with mixed-voltage power supply
Inventor: KER MING-DOU
IPC: H01L23/60
Filed: 1998-07-07
Granted: 1999-12-01
Abstract: This invention discloses a protective circuit for integrated circuits having mixed voltage power supply, it comprises: a first voltage source, a second voltage source and at least one first silicon rectifier. The first silicon rectifier has its negative serially connected with the positive of the next first silicon rectifier, where the first positive is connected to the first voltage source, and the last negative is connected to the second voltage source. When an N type silicon rectifier is used as the first silicon rectifier, the control gate of every first silicon rectifier is connected to its positive. When a P type silicon rectifier is used as the first silicon rectifier, the control gate of every first silicon rectifier is connected to its negative.
Patent TW-388945-B (TW)
Title: Filp-chip connecting method, filp-chip connected structure and electronic device using the same
Inventor: ISADA NAOYA
IPC: H01L21/603
Filed: 1998-07-17
Granted: 2000-05-01
Abstract: A stable low-connecting resistance connection arrangement having a high yield rate without using any special meterial or process for a substrate. A flip-chip connecting structure in which the semiconductor integrated circuit (IC) chip is mounted directly on an organic circuit substrate. To achieve reliable connection and low-connecting resistance, the present invention absorbs variation of the heights of projecting electrodes formed on a semiconductor IC chip and substrate electrodes of an organic circuit substrate for example, by deforming the substrate electrodes and/or substrate layer of the organic circuit substrate. Resin of a conductive paste disposed between the projecting electrodes and substrate electrodes is squeezed out leaving a high density conductive particle layer to lower a contact resistance between such electrodes.
Patent TW-472165-B (TW)
Title: Array substrate for display device, liquid crystal display device having array substrate and the manufacturing method of array substrate
Inventor: INADA KATSUHIKO
IPC: G02F1/1362
Filed: 1998-07-24
Granted: 2002-01-11
Abstract: The subject of the present invention is to provide an array substrate of a display device, method for manufacturing it, and a liquid crystal display device equipped with an array substrate of high quality and yield. The solution of the present invention is to provide a plurality of signal lines 32 and scan lines in matrix, and a plurality of pixel electrodes forming a display region on a glass substrate of an array substrate. The signal line and scan line comprise lead-out wiring parts 46 which are extended outside the display region respectively, and each lead-out wiring part of the signal line comprises a conduction part 64 comprising a first wire 46a and a second wire 46b laminated via an insulating film, and electrically conductive to the first and second wires with each other at two points, and two non-duplex parts 66, wherein, between conductive parts, the first and second wires are displaced with respect to each other in the surface direction of the glass substrate. If a short circuit occurs between lead-out wires, the first or the second wires are cut at the non-duplex part.
Patent TW-546199-B (TW)
Title: Layered absorbent structure
Inventor: EVERETT ROB DAVID
IPC: A61F13/15
Filed: 1998-10-08
Granted: 2003-08-11
Abstract: A distinctive absorbent article includes an absorbent core having multiple absorbent layers, wherein the absorbent layers interact in such a manner which preferentially locates absorbed liquid in an appointed, high saturation wicking layer. The localization of the liquid within this wicking layer increases the potential of this layer to move liquid through capillary action due to the higher saturation level and increased amount of liquid available. The intake capability of the absorbent system is maintained or improved over current systems by keeping a second layer of the absorbent system at low saturation levels through as many insults of the product as possible, while providing optimum intake performance through appropriate control of the composite properties. The low saturation in this layer provides void volume for the incoming insult as well, as a high permeability, thus increasing the intake rate of the absorbent system as a whole, but the structure of the low saturation layer is also balanced to provide an appropriately high level of capillary tension to provide enough control of the liquid to stop leakage from occurring. This low saturation layer is used in addition to a surge material and provides intake functionality in addition to that provided by the surge material. In particular aspects of the invention, the body side layer of the absorbent core does not extend over the entire surface of the overall absorbent core, therefore is not used as the high saturation, wicking layer, but as the intake layer. This arrangement also allows the intake layer to be in direct contact with the incoming liquid, therefore allowing for more immediate access and improved intake function.
Patent TW-512246-B (TW)
Title: Electric power source circuit having temperature compensation function and liquid crystal display device having that built therein
Inventor: CHIBA SHINSAKU
IPC: G02F1/13
Filed: 1998-11-16
Granted: 2002-12-01
Abstract: The object of the present invention is to provide an electric power source circuit having stable temperature compensation function and small scale thereof. In order to achieve the object describe above, the electric power source circuit having temperature compensation function according to the present invention comprises a first booster circuit (L2-1 to 2-3, TR2, TR3, C1, C2, D1, D2) for generating a positive driving voltage VH by raising the predetermined input voltage Vdd, a second booster circuit (L2-1 to 2-3, TR2, TR3, C3, C4, D3, D4) for generating a negative driving voltage VL around the predetermined control voltage Vpc, a DC-DC converter circuit for regulating the positive driving voltage and the negative driving voltage in accordance with the predetermined control voltage Vpc supplied from externally, wherein the DC-DC converter circuit has a plurality of resistors (R1 to R5) dividing a voltage between the positive driving voltage and the predetermined reference voltage GND and operation amplifier OP1 supplying the control voltage, and a thermistor element TH is provided in parallel the first resistor as one of the plurality of resistors.
Patent TW-394916-B (TW)
Title: Color Display Device
Inventor: OKITA MASAYA
IPC: G02F1/13357
Filed: 1998-12-11
Granted: 2000-06-21
Abstract: A color display device has a single light guiding plate, and first, second and third light sources that respectively independently exhibit three primary colors. On a one end surface of the light guiding plate there are disposed the first and second light sources that exhibit two different ones of the three primary colors. On the other end surface side of the light guiding plate there is disposed the third light source that exhibits the remaining one primary color. Since the light guiding means is needed only one in number, the structure can be simplified and miniaturized. Also, on the one end surface of the light guiding means there are disposed, of the three light sources exhibiting the three primary colors, the first and second light sources that exhibit two different ones of the three primary colors. And, on the other end surface side of the light guiding means there is disposed the third light source that exhibits the remaining on e primary color. Therefore, the probability that the light which enters into the light guiding means from one light source is hindered by another light source decreases. Accordingly, the loss of the light becomes lessened and the amount of light emission increases.
Patent TW-422738-B (TW)
Title: Improved process for recovering olefins
Inventor: ENGLER YVES
IPC: C07C7/144
Filed: 1998-12-16
Granted: 2001-02-21
Abstract: A process for recovering olefins from a gas stream containing olefins and hydrogen. The process comprises compressing the gas stream in at least one compression stage to form a compressed gas stream, contacting the compressed gas stream with a membrane at conditions effective to obtain a permeate stream rich in hydrogen and a retentate stream depleted in hydrogen, and introducing the permeate stream into a pressure swing adsorption system at conditions effective to obtain a nonadsorbed stream rich in hydrogen and a desorbed stream comprising olefins.
Patent TW-410301-B (TW)
Title: Methods for compressing and re-constructing a color image in a computer system
Inventor: CHEN LIANG-JI
IPC: G06T9/00
Filed: 1999-02-24
Granted: 2000-11-01
Abstract: We discloses an efficient method for compressing a color image, visual block pattern truncation coding (VBPTC), in which the conventional block truncation coding (BTC) serves to encode an original image. This method defines the edge block according to human visual perception. If the difference between the two quantized values of BTC in a block is larger than a threshold which is defined by visual characteristics, the block will be identified as an edge block. In an edge block, the bitmap is adapted to compute block gradient orientation and to match the block pattern.
Patent TW-417294-B (TW)
Title: Process of SRAM vertical TFT with load device
Inventor: YANG CHING-NAN
IPC: H01L27/11
Filed: 1999-05-18
Granted: 2001-01-01
Abstract: A process to produce a vertical thin film transistor (TFT) that has gate oxide surrounded channel and shifted drain. The first dielectric layer is formed upon the substrate to provide an insulated region and the first poly-silicon layer with patterned gate oxide is formed upon the first dielectric layer. Then, the second dielectric layer is formed upon the first poly-silicon layer and an opening with vertical TFT pattern is made through the layer combined by the first dielectric layer, the first poly-silicon layer and the second dielectric layer. Shortly after, the third dielectric layer surrounded by the first poly-silicon layer is formed upon the sidewall of the opening and the second poly-silicon which thickness is thinner than the first dielectric layer is deposited upon the bottom part of the opening to form the drain and offset drain regions. Finally, undoped poly-silicon layer is deposited on the second poly-silicon layer and the third poly-silicon layer with source is formed on the substrate and filled in the opening to get the source region.
Patent TW-417185-B (TW)
Title: Heat process apparatus and heat process method
Inventor: SADA TETSUYA
IPC: H01L21/68
Filed: 1999-06-24
Granted: 2001-01-01
Abstract: Pins that are small protrusions are disposed on the upper surface of a heat process board. Through-holes are formed between the pins so as to deaerate from a space thereof. In a predetermined time period in the initial stage of the heat process, a deaerating process is performed using the through-holes. Thus, a negative pressure is applied to the space between the lower surface of the substrate and the upper surface of the heat process board so as to contact the substrate and the heat process board. Thereafter, the vacuum degree is lowered. Due to the rigidity of the substrate, the substrate and the heat process board are separated. In the initial stage of the heat process, since the substrate and the heat process board directly contact, the temperature of the substrate quickly and equally rises. In addition, when the heat shrinkage is large, since the substrate and the heat process board are separated, static electricity due to friction hardly takes place. Thus, a static breakdown can be prevented. Consequently, a heat process apparatus and a heat process method that allow the entire substrate to be heat-processed are provided.
Patent TW-I237572-B (TW)
Title: Composition containing at least one active substance having an influence on the levels of lipids in the blood
Inventor: BERTHOLD ACHIM
IPC: A61P9/14
Filed: 1999-07-06
Granted: 2005-08-11
Abstract: A medical composition containing at least one active substance having an influence on the lipid blood levels of an organism is characterized in that it is present in the form of a transdermal therapeutic patch containing the active substance in a self-adhesive matrix layer which can be covered at the side facing away from the skin with an active substance-impermeable backing layer.
Patent TW-462044-B (TW)
Title: Semiconductor memory device and a computer having the same
Inventor: CHO CHANG-BUM
IPC: G11C11/408
Filed: 1999-07-07
Granted: 2001-11-01
Abstract: A highly integrated DRAM semiconductor device connected to a less highly integrated DRAM controller is provided. The semiconductor memory device for receiving a predetermined number of addresses from a controller device and storing or reading data includes a plurality of memory array blocks, each of which includes a plurality of word lines, a first word line driver activated by a predetermined number of row address signals for selecting the word lines in the memory array blocks, and a second word line driver which is always activated regardless of the row address signals, wherein the word lines are selected by the combination of the first and second word line driver. It is possible to enlarge the memory capacity by connecting a less highly integrated DRAM controller to a highly integrated semiconductor memory device.
Patent TW-410482-B (TW)
Title: Thin film transistor with self-aligned offset structure
Inventor: LIOU JIA-CHENG
IPC: H01L29/786
Filed: 1999-07-09
Granted: 2000-11-01
Abstract: The invention includes a step of forming polysilicon pattern on a substrate. A spacer is formed on the sidewall of the polysilicon pattern. A first dielectric layer is formed on the substrate and patterned polysilicon layer. The first dielectric layer has a first via defined therein. A second polysilicon layer is deposited on the first dielectric layer and filled in the first via. An etch back process is utilized to etch the polysilicon layer, such that the residual portion below the via can be used as a first doping area. Then, an un-doped polysilicon layer is deposited along the surface of the first via and extended to the upper face of the first dielectric layer. Next, an insulating structure is filled in the first via. A gate oxide layer is deposited on the un-doped polysilicon layer. A second via is formed to expose the surface of the first polysilicon layer. The pattern of the gate is defined, and used as a mask to execute an ion doping process, so as to form a second doping region.
Patent TW-523519-B (TW)
Title: Bridged metal complexes
Inventor: ASHE ARTHUR J III
IPC: C08F4/643
Filed: 1999-10-25
Granted: 2003-03-11
Abstract: A group 4 transition metal complex containing a boron or aluminum bridging group containing a nitrogen containing electron donating group, especially an amido group. A group 4 transition metal complex corresponding to the formula: wherein: M is titanium, zirconium, or hafnium; Q is independently each occurrence chloride, C1-6 hydrocarbyl, or dimethylamido, or two groups together are 1,4-diphenyl-1,3-butadiene; R1 is independently each occurrence C1-4 alkyl or phenyl; R2 is independently each occurrence hydrogen or C1-20 hydrocarbyl or two adjacent R2 group are joined together, thereby forming a fused ring structure; and R3 is a C1-20 hydrocarbyl group.
Patent TW-434948-B (TW)
Title: Attachment structure of semiconductor device socket
Inventor: TASHIRO KAZUHIRO
IPC: H01R33/76
Filed: 1999-12-17
Granted: 2001-05-16
Abstract: An attachment structure between a semiconductor device socket and a test circuit substrate is provided. The semiconductor device socket includes a socket body and a contact film disposed therein. Extension conductive wires extended from a contact portion to be connected to a semiconductor device are formed on the contact film. The contact film is also provided with socket connectors connected to the extension conductive wires. The test circuit substrate is provided with circuit substrate connectors corresponding to the socket connectors. The socket connectors and the circuit substrate connectors are in a male-female connector relationship.
Patent TW-483948-B (TW)
Title: Power supply device for discharge surface treating and a surface treating method with electric discharge
Inventor: GOTO AKIHIRO
IPC: B23H1/02
Filed: 2000-01-31
Granted: 2002-04-21
Abstract: A first pulse width T1 and a first peak value Ip1 are determined so that the current density between an electrode and a work is in such a predetermined range that the release of an electrode material is controlled. During the first pulse width T1, after the diameter of the discharge arc column reaches a sufficient value, the discharge current is increased to a second peak value Ip2 so that a predetermined amount of hard coating material is supplied by the release of the electrode material according to the predetermined processing conditions during a second pulse width T2. Then a discharge is caused between the electrodes to efficiently form a hard coating on the work. Thus the surface treatment cost is lowered and a dense hard coating is formed on a work.