baber/WOPTO huggingface dataset:
Patent TW-541348-B (TW)
Title: Film depositing method and film depositing apparatus
Inventor: MIKAMI TAKASHI
IPC: C23C14/32
Filed: 1999-04-02
Granted: 2003-07-11
Abstract: An object of the invention is to provide a film depositing method for depositing a film, which performs film deposition with plasma as well as irradiation with ion beams, and can perform the ion beam irradiation without a difficulty while suppressing problems such as occurrence of abnormal discharge in an ion beam producing electrode system of the ion source, and another object of the invention is to provide a film depositing apparatus for implementing the method, which can have a simple and small structure. A film is deposited on a target object by exposing the target object to film deposition plasma obtained by supplying an electric power for plasma excitation to a film deposition material gas while irradiating the target object with ion beams. An ion source is used for the irradiation with the ion beams. The ion source produces the ion beams from plasma produced from an ion material gas in a plasma container by applying a voltage to an ion beam producing electrode system formed of four electrodes arranged in an ion beam producing port of the plasma container. Potentials are placed on the plasma container and the four electrodes forming the ion beam producing electrode system during producing of the ion beams such that the plasma container and the first electrode among the four electrodes located in an inner position nearest to the plasma container carry a positive potential, the second electrode immediately outside the first electrode carries a negative potential, the third electrode immediately outside the second electrode carries a positive potential and the fourth electrode in the outer position remotest from the plasma container carries a ground potential, or such that the plasma container and the first electrode among the four electrodes located in an inner position nearest to the plasma container carry a positive potential, the second electrode immediately outside the first electrode carries a lower potential than the film deposition plasma, the third electrode immediately outside the second electrode carries a higher potential than the film deposition plasma and the fourth electrode in the outer position remotest from the plasma container carries a ground potential.
Patent TW-493140-B (TW)
Title: Distributed instruction completion logic
Inventor: NGUYEN DUNG QUOC
IPC: G06F9/38
Filed: 1999-05-28
Granted: 2002-07-01
Abstract: Each execution unit within a superscalar processor has an associated completion table that contains a copy of the status of all instructions dispatched but not completed. A central completion table maintains the status of every dispatched instruction as reported by the dispatch unit and the individual execution units. Execution units send finish signals to the completion table responsible for retiring a particular type of instruction. The central completion table retires instructions that may cause an interrupt and instructions whose results may target the same register. The execution units associated completion tables retire the balance of the instructions and the execution units send instruction status to the central completion table and to each execution unit. This reduces the number of instructions that are retired by the central completion table, increasing the number of instructions retired per clock cycle.
Patent TW-444169-B (TW)
Title: A method and apparatus for improvement of sparse matrix evaluation performance
Inventor: QUARLES THOMAS L
IPC: G06F17/50
Filed: 1999-07-26
Granted: 2001-07-01
Abstract: A device for reducing evaluation time of a matrix representing an electrical circuit. Conductance values of each circuit component in the circuit are written to corresponding models utilizing non-blocking writing techniques. The matrix is represented by a reduced memory structure where each matrix node is represented by a matrix element structure having at least one pointer to a conductance value contained in a model structure corresponding to a circuit component that contributes to a value of the matrix node. A set of rows or columns of the matrix are then processed to calculate final matrix node values independently.
Patent TW-445472-B (TW)
Title: Control shaft device for motor
Inventor: BAUER ROLF DIETER
IPC: H01H73/04
Filed: 1999-08-13
Granted: 2001-07-11
Abstract: There is provided a control shaft device for motor, which comprises a control shaft body (2) and a contact lever (3) fixed at the control shaft body. Hoods (8) are mounted on two opposite sides of the control shaft body for covering and containing the control shaft body. There can be a clamping device installed in the control shaft device to clamp the contact lever tightly, the clamping device is installed outside the space occupied by the contact lever, but is still inside the control shaft body or is covered on the control lever.
Patent TW-459155-B (TW)
Title: Liquid crystal display and its production
Inventor: YOSHIKAWA CHIKANORI
IPC: G02F1/1368
Filed: 1999-11-15
Granted: 2001-10-11
Abstract: The present invention is to produce a reflection type liquid crystal display device in the same production process as a transmission type liquid crystal display device. A mask for photolithography capable of forming both a gate electrode 22 and a reflective layer 23, and a mask for photolithography capable of forming only the gate electrode 22 are prepared, and a reflection type liquid crystal display device with both the gate electrode 22 and the reflective layer 23 formed on a transparent insulating substrate 21 or a transmission type liquid crystal display device with only the gate electrode 22 formed on the transparent insulating substrate 21 is selectively produced using one of the masks.
Patent TW-431881-B (TW)
Title: Dish washer
Inventor: TSUKITANI KEIJI
IPC: A47L15/14
Filed: 1999-11-30
Granted: 2001-05-01
Abstract: The construction of a dish washer of this invention includes: a washer body; a wash basin that has an upper opening portion for receiving dishes and that can be pulled out from the washer body in a substantially horizontal direction; an inner cover for covering the opening of the wash basin; a sealing member for sealing the inner cover and the opening portion; and a drip removing mechanism that can remove water-drops on the inner side of  the inner cover when the wash basin is pulled out. By means of the above construction, when the wash basin is pulled out forwardly during operation, the washing water adhered to the inner cover will drop to the inside of a bottom side of the washer body so that the washer body, formed from steel plate, is prevented from rusting if water leaks to the outside of the washer body.
Patent TW-452860-B (TW)
Title: Wiring, thin-film transistor substrate with the wiring, method of manufacture thereof, and liquid crystal display device
Inventor: SASAKI MAKOTO
IPC: H01L29/45
Filed: 1999-12-08
Granted: 2001-09-01
Abstract: The present invention relates to a wiring using low-resistance Cu as a material for forming an electrode or wiring, TFT (thin film transistor) substrate using the same, manufacturing method of the TFT substrate, and LCD (liquid crystal display). The features in the present invention are: a gate electrode (wiring) (40) having a Cu layer (40a) surrounded by a coating film (40b) made of titanium or titanium oxide; a TFT substrate (31) comprising the gate electrode (wiring) (40) and a LCD comprising a pair of opposing substrates, wherein a TFT substrate (31) is disposed at one of the pair of opposing substrates.
Patent TW-432557-B (TW)
Title: Chip-scale package and its manufacturing method
Inventor: HUANG JIAN-PING
IPC: H01L23/495
Filed: 1999-12-14
Granted: 2001-05-01
Abstract: There are provided a lead-frame-based chip-scale package and its manufacturing method. The invention is characterized in using a specially designed lead frame and forming a sub-lead portion bent downwardly or a downward protrusion portion on each inner lead, so as to raise the inner lead portion to a specific height by the support of the sub-lead portion or protrusion portion. In the process of packaging the resin body, because the inner lead portion is raised, the upper and lower faces of the inner lead portion can be encapsulated by the resin body for securely holding the inner lead portion, so that the packaged resin body is not likely to have micro cracks as encountered in the conventional skill.
Patent TW-444288-B (TW)
Title: Semiconductor wafer and semiconductor device provided with columnar electrodes and methods of producing the wafer and device
Inventor: IHARA YOSHIHIRO
IPC: H01L21/60
Filed: 2000-01-26
Granted: 2001-07-01
Abstract: A semiconductor wafer provided with columnar electrodes which have plated nickel, palladium, and gold films successively formed at the top thereof, or have a plated solder film at their top. The semiconductor wafer can be preferably used for producing a chip-sized semiconductor device provided with columnar electrodes to which an external connection terminal, such as a solder ball, is to be bonded. Methods of producing the semiconductor wafer and device by use of plating are also disclosed.
Patent TW-495612-B (TW)
Title: High frequency current detecting apparatus
Inventor: IWASAKI NORIYOSHI
IPC: H01F38/28
Filed: 2000-02-25
Granted: 2002-07-21
Abstract: There is provided a high frequency current detecting apparatus which can measure a high frequency current with high precision without cutting a circuit conductor. The high frequency current detecting apparatus includes a core having a hollow portion, a first conductive material inserted in the hollow portion of the core and having both ends respectively protruding from both ends of the hollow portion to form probe portions, a second conductive material electrically insulated from the first conductive material and inserted in the hollow portion of the core, a resistor for generating a voltage corresponding to a high frequency current flowing through the second conductive material while the first conductive material is made a primary coil and the second conductive material is made a secondary coil, and a shield provided around the core.
Patent TW-472189-B (TW)
Title: Processor with best function
Inventor: HIKONE KAZUFUMI
IPC: G06F11/22
Filed: 2000-03-31
Granted: 2002-01-11
Abstract: Self-testing can be implemented by providing random-number instruction generator 123, which generates testing instructions randomly, and random-number data generators, which generates and sends random-number data based on instruction information signals 134 created by the random-number instruction generator.
Patent TW-564317-B (TW)
Title: Semiconductor integrated circuit and the checking method
Inventor: OHTA MITSUYASU
IPC: G01R31/3183
Filed: 2000-04-27
Granted: 2003-12-01
Abstract: In the method for checking the semiconductor integrated circuit, the signal propagation routes connecting the checking signal generation point and observation point are checked with good efficiency, and more signal propagation routes are checked for the delay faults with less checking number of times. In the semiconductor circuit on which a checking circuit 100 is mounted, a number of the pre-determined signal propagation routes are selected as the checked objects, from the plural signal propagation routes on the logical circuit 100a which constitutes the checking circuit, the checking pulses having the periods commensurate with the designed delay time with respect to the selected signal propagation routes are input into a register (checking signal generation point) 201, and the registers (checking signal observation points) 202, 203 from a checking timing signal generator 210, and conduct at the registers the checking signal generation and observation, respectively.
Patent TW-445469-B (TW)
Title: Semiconductor device and method for manufacturing the same
Inventor: KUNIKIYO TATSUYA
IPC: H01L21/8242
Filed: 2000-05-20
Granted: 2001-07-11
Abstract: Implemented are a semiconductor device comprising a trench type capacitor having such a structure that a soft error tolerance is excellent, a contact resistance between an electrode and a metal wiring has a small value, a fringe capacitance on an end is reduced and area penalty is not increased, and a method for manufacturing the semiconductor device. The trench type capacitor is formed to have a bottom face in a BOX layer (2) without penetrating the BOX layer (2). Moreover, an end of the capacitor, that is, each of ends of a first electrode (6), a dielectric film (7) and a second electrode (8) is flattened. An insulating film (16) and a side wall (9) are formed to cover the ends of the first electrode (6), the dielectric film (7) and the second electrode (8). Furthermore, a contact plug (10) for connecting the second electrode (8) to a metal wiring (14a) provided as an upper layer is buried in a region surrounded by the side wall (9). Then, a metal silicide (12) and a metal nitride film (13) are formed in a connecting portion of the contact plug (10) and the metal wiring (14a).
Patent TW-449797-B (TW)
Title: Integrated surface-emitting type electro-optical module and the fabrication method thereof
Inventor: WU WENG-JIN
IPC: G02B6/42
Filed: 2000-09-22
Granted: 2001-08-11
Abstract: The present invention is an integrated surface-emitting type electro-optical module and the fabrication method thereof, wherein a lithography process is used to define the width of a V-groove for placing fiber on the silicon substrate, and a dielectric layer is grown on the silicon substrate after a vertical V-groove is dry etched to protect the vertical wall, so that the widening of groove can be avoided in the following wet etching. Then a 45 DEG mirror is formed so that an electro-optical device can be placed on the mirror in flip-chip manner. Since a complete silicon substrate is used to assemble the surface-emitting type electro-optical device and fiber of the electro-optical module of the present invention in the way of passive alignment, the misalignment problem of separated assembling can be reduced.
Patent TW-469585-B (TW)
Title: Copper interconnect seed layer treatment methods and apparatuses for treating the same
Inventor: HYMES DIANE J
IPC: H01L21/288
Filed: 2000-09-29
Granted: 2001-12-21
Abstract: A method for making semiconductor interconnect features in a dielectric layer is provided. The method includes depositing a copper seed layer over a barrier layer that is formed over the dielectric layer and into etched features of the dielectric layer. The copper seed layer is then treated to remove an oxidized layer from over the copper seed layer. The method then moves to electroplating a copper fill layer over the treated copper seed layer. The copper fill layer is configured to fill the etched features of the dielectric layer.
Patent TW-I269918-B (TW)
Title: LCD panel and method of fabricating same
Inventor: SASAKI TAKESHI
IPC: G02F1/1341
Filed: 2000-12-14
Granted: 2007-01-01
Abstract: A method of fabricating an LCD panel is provided, which forms a uniform gap between a pair of transparent substrates over the whole display area, provides high display quality, and decreases the contamination level to liquid crystal of sealing material. This method comprises the steps of: (a) providing a first transparent substrate; (b) providing a second transparent substrate; (c) forming a first sealing member on the first transparent substrate to surround a display area; the first sealing member being used for sealing a liquid crystal; the first sealing member having a first closed pattern; (d) forming a second sealing member on the first or second substrate to surround the first sealing member; the second sealing member having a second closed pattern; (e) dropping a liquid crystal on the first or second substrate in the display area; (f) coupling the first and second substrate with each other to form a gap between the first and second substrates in a vacuum atmosphere, forming a closed inner space between the first and second substrates by the first and second sealing members; the liquid crystal being confined in the inner space; (g) curing the second sealing member after the step (f); and (h) curing the first sealing member after the step (f). The steps (g) and (h) are performed at different times from each other.
Patent TW-520501-B (TW)
Title: Bias device for a magneto-resistive random access memory
Inventor: TAI JY-DER
IPC: G11C11/15
Filed: 2000-12-29
Granted: 2003-02-11
Abstract: A magneto-resistive random access memory (MRAM) includes a bias source, a first magneto-resistor and an address decoder. The bias source includes a current mirror for mirroring current, and a bandgap circuit connected to the current mirror for providing a fixed voltage across a second magneto-resistor. The first magneto-resistor has an array of magneto-resistors electrically connected to the bias source for storing bit information. The address decoder is electrically connected to the first magneto-resistor for selecting the array of magneto-resistors so as to access the bit information. The current mirror mirrors current onto the first magneto-resistor to generate a sensing current through the first magneto-resistor so that the voltage across the second magneto-resistor is proportional to a voltage across the first magneto-resistor.
Patent TW-562791-B (TW)
Title: Method for inhibiting the premature polymerization of ethylenically unsaturated monomers
Inventor: BENAGE BRIGITTE
IPC: C07C15/44
Filed: 2001-01-03
Granted: 2003-11-21
Abstract: Disclosed herein is a method for inhibiting the premature polymerization of ethylenically unsaturated monomers comprising adding to said monomers an effective amount of: (A) at least one stable hindered nitroxyl compound having the structural formula, wherein R1 and R4 are independently selected from the group consisting of hydrogen, alkyl, and heteroatom-substituted alkyl and R2 and R3 are independently selected from the group consisting of alkyl and heteroatom-substituted alkyl; and X1 and X2 (1) are independently selected from the group consisting of halogen, cyano, COOR7, -S-COR7, -OCOR7, (wherein R7 is alkyl or aryl), amido, -S-C6H5, carbonyl, alkenyl, or alkyl of 1 to 15 carbon atoms, or (2) taken together, form a ring structure with the nitrogen; and (B) at least one phenylenediamine, and, optionally, (C) at least one nitroaromatic compound.
Patent TW-479343-B (TW)
Title: Electrostatic discharge protection circuit and its method for silicon integrated circuit on the insulating layer
Inventor: CHEN SHIAU-SHIAN
IPC: H01L23/60
Filed: 2001-02-08
Granted: 2002-03-11
Abstract: A electrostatic discharge (ESD) protection circuit and its method for silicon integrated circuit on the insulating layer are disclosed in the present invention. The ESD protection circuit includes a conductive pad and a conductive wire segment, which are formed on an insulating layer. The conductive wire segment connects directly the conductive pad to a node. The first diode is formed on the insulating layer and is coupled in between the node and the first voltage supply terminal. When a negative current, which generates a voltage that is negative relative to the first voltage supply terminal, is applied to the conductive pad, the first diode is biased in a reverse direction and a discharge route is formed between the conductive pad and the first voltage supply terminal. The second diode is formed on the insulating layer and is coupled in between the node and the second voltage supply terminal. When a positive current, which generates a voltage that is positive relative to the second voltage supply terminal, is applied to the conductive pad, the second diode is biased in a reverse direction and a discharge route is formed between the conductive pad and the second voltage supply terminal. The node of the ESD protection circuit is coupled to the SOI integrated circuit to be protected. The invented ESD protection circuit can effectively protect SOI integrated circuit to avoid the impact of high voltage stress, can make the related process complexity lower to the minimum, and can decrease the used area.
Patent TW-593662-B (TW)
Title: Process for removing mercury from hydrocarbons
Inventor: FRANKIEWICZ THEODORE C
IPC: C10G29/10
Filed: 2001-02-20
Granted: 2004-06-21
Abstract: Mercury is removed from crude oils, natural gas condensates and other liquid hydrocarbons by first removing colloidal mercury and solids that contain adsorbed mercury and then treating the hydrocarbons with an organic or inorganic compound containing at least one sulfur atom reactive with mercury. The sulfur compound reacts with dissolved mercury that contaminates the hydrocarbons to form mercury-containing particulates that are then removed from the hydrocarbons to produce a purified product having a reduced mercury content. Preferably, the treating agent is an organic sulfur-containing compound such as a dithiocarbamate or sulfurized isobutylene.
Patent TW-504713-B (TW)
Title: Magnetic element with insulating veils and fabricating method thereof
Inventor: CHEN EUGENE YOUJUN
IPC: H01L43/08
Filed: 2001-04-13
Granted: 2002-10-01
Abstract: An improved and novel device and fabrication method for a magnetic element, and more particularly a magnetic element (10) including a first electrode (14), a second electrode (18) and a spacer layer (16). The first electrode (14) and the second electrode (18) include ferromagnetic layers (26 and 28). A spacer layer (16) is located between the ferromagnetic layer (26) of the first electrode (14) and the ferromagnetic layer (28) of the second electrode (16) for permitting tunneling current in a direction generally perpendicular to the ferromagnetic layers (26 and 28). The device includes insulative veils (34) characterized as electrically isolating the first electrode (14) and the second electrode (18), the insulative veils (34) including non-magnetic and insulating dielectric properties. Additionally disclosed is a method of fabricating the magnetic element (10) with insulative veils (34) that have been transformed from having conductive properties to insulative properties through oxygen plasma ashing techniques.
Patent TW-583582-B (TW)
Title: Microcomputer and associated method for reducing memory usage of the microcomputer
Inventor: CHEN PEI-CHOW
IPC: G06F9/445
Filed: 2001-05-11
Granted: 2004-04-11
Abstract: A microcomputer and an associated method for reducing memory usage of the microcomputer. The microcomputer has a flash memory, a volatile memory, and a processor. The flash memory stores a flash memory driver for controlling operations of the flash memory so as to write data into the flash memory. The method has following step: duplicating the flash memory driver and relative programs into the volatile memory to avoid the processor reading any data from the flash memory when the processor executes the flash memory driver to write data into the flash memory.
Patent TW-535259-B (TW)
Title: Wiring structure of semiconductor device
Inventor: KOHNO TAKAKI
IPC: H01L21/822
Filed: 2001-05-31
Granted: 2003-06-01
Abstract: A method is provided for wiring semiconductor integrated circuits which produces a shielding effect while increasing the wiring area to a small extent. On one side of each of a plurality signal wires, a shielding wire made of the same material and having the same length as the signal wire is provided. The shielding wires are set to the ground potential via aluminum wiring extended from GND pads. Shielding wire segments are separated by cranking points.