Patent EP-0849917-A3 (EP)
Inventor: BLANC ALAIN
IPC: H04L49/111
Filed: 1997-08-19
Abstract: A switching module including a storage section that comprises a set of M receiver means (10), a set
of M input routers (2) for realizing the connection of the M input ports to anyone of the different
locations of a cell storage (1). The storage section includes a set of M ASA registers (20, 21) for
providing to input routers (2) with the addresses to be used for storing the cells into the cell storage
(1). Additionaly, the switching module includes a retrieve section that comprises a set of M output
routers for retrieving the data located into any locations of said cell storage (1), a set of M ARA
registers for providing to said output routers (3) the addresses of the cells which are to be outputted
from said cell storage. 
     Further, a specific control section provides with the input process and the output process of the cells
that are entered into the switch. The input control section address generating means (FAQ 5) for
providing the addresses of the empty locations into cell storage (1) and first multiplexing means
(106, 107, 112, 113) for providing either the addresses generated by said address generating means
(FAQ 5) or addresses provided by a first external bus (509, 510) to said M ASA registers (20, 21). A
set of holding registers (60, 63) is used for retaining the module routing header as long as the cells
are being inputted in the cell storage (1). 
     The output control section comprises a set of M queueing means (OAQ 50, 51) for queueing the
addresses of the locations within said cell storage (1) that contains cells that are to be transmitted to
output ports. Each queuing means has an input receiving the contents of said ASA registers (20, 21)
and is associated to a corresponding one of said M output ports. Additionaly control means (150,
200) receive the module routing header retained by the holding registers and generate control signals
(WEs, 210) for all the queuing means (50, 51) so that the contents of said ASA registers can be
simultaneously loaded into the particular queuing means (OAQ queues 50, 51) that corresponds to
the ouput ports according to the module routing header, that is to say in accordance with the
particular output ports to which the cell should be duplicated. Second multiplexing means (800, 26,
27) are provided so as to provide to said M ARA registers either with addresses provided by the
queuing means (OAQ 50, 51) or the addresses provided by a second external bus (520, 521).
A specific registration circuit (7) is used for preventing an address into cell storage (1) to be made
available as long as the last occurence of the considered address disappear from the contents of the
queuing means. 
     By means ofthe first and second multiplexor it becomes possible to realize the routing process
internally or externally. Indeed, the addresses that are used for performing both the input and output
process may either be generated by means of the internally located circuits, including the addresses
generating means and control circuit (200), or still may be achieved by means of an external circuitry
(with the respect to the module being considered).